1 /******************************************************************************
2 *
3 * Copyright(c) 2019 Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 *****************************************************************************/
15 #define _HAL_MCC_C_
16 #include "hal_headers.h"
17 #include "hal_mcc.h"
18
19 #ifdef CONFIG_MCC_SUPPORT
20 #define _mcc_fill_slot_bt_coex(_dbg_hal_i, _en) ((struct rtw_phl_mcc_dbg_hal_info *)_dbg_hal_i)->btc_in_group = _en;
21
_mcc_update_slot_dbg_info(struct rtw_phl_mcc_dbg_hal_info * dbg_hal_i,bool bt_role,u16 macid,u16 dur)22 void _mcc_update_slot_dbg_info(struct rtw_phl_mcc_dbg_hal_info *dbg_hal_i,
23 bool bt_role, u16 macid, u16 dur)
24 {
25 struct rtw_phl_mcc_dbg_slot_info *dbg_slot_i = NULL;
26 u8 idx = 0;
27
28 for (idx = 0; idx < dbg_hal_i->slot_num; idx++) {
29 dbg_slot_i = &dbg_hal_i->dbg_slot_i[idx];
30 if (dbg_slot_i->bt_role) {
31 if (bt_role) {
32 dbg_slot_i->dur = dur;
33 break;
34 }
35 } else if (false == bt_role && dbg_slot_i->macid == macid) {
36 dbg_slot_i->dur = dur;
37 break;
38 }
39 }
40 }
41
_mcc_update_dbg_info(struct rtw_phl_mcc_en_info * info,struct rtw_phl_mcc_bt_info * bt_info)42 void _mcc_update_dbg_info(struct rtw_phl_mcc_en_info *info,
43 struct rtw_phl_mcc_bt_info *bt_info)
44 {
45 u8 idx = 0;
46
47 if (bt_info->bt_dur > 0) {
48 _mcc_fill_slot_bt_coex(&info->dbg_hal_i, true);
49 } else {
50 _mcc_fill_slot_bt_coex(&info->dbg_hal_i, false);
51 }
52 for (idx = 0; idx < info->mrole_num; idx++) {
53 _mcc_update_slot_dbg_info(&info->dbg_hal_i, false,
54 info->mcc_role[idx].macid,
55 info->mcc_role[idx].policy.dur_info.dur);
56 }
57 }
58
_mcc_fill_slot_dbg_info(struct rtw_phl_mcc_dbg_hal_info * dbg_hal_i,struct rtw_phl_mcc_role * mrole)59 void _mcc_fill_slot_dbg_info(struct rtw_phl_mcc_dbg_hal_info *dbg_hal_i,
60 struct rtw_phl_mcc_role *mrole)
61 {
62 struct rtw_phl_mcc_dbg_slot_info *dbg_slot_i = NULL;
63 if (dbg_hal_i->slot_num >= SLOT_NUM) {
64 PHL_TRACE(COMP_PHL_MCC, _PHL_ERR_, "_mcc_fill_hal_dbg_info(): Fill fail, dbg_hal_i->slot_num(%d) >= SLOT_NUM(%d), please check code\n",
65 dbg_hal_i->slot_num, SLOT_NUM);
66 goto exit;
67 }
68 dbg_slot_i = &dbg_hal_i->dbg_slot_i[dbg_hal_i->slot_num];
69 dbg_slot_i->bt_role = mrole->bt_role ? true : false;
70 dbg_slot_i->dur = mrole->policy.dur_info.dur;
71 if (false == dbg_slot_i->bt_role) {
72 dbg_slot_i->ch = mrole->chandef->chan;
73 dbg_slot_i->macid = mrole->macid;
74 }
75 dbg_hal_i->slot_num++;
76 exit:
77 return;
78 }
79
_mcc_add_bt_role(struct hal_info_t * hal,u8 group,struct rtw_phl_mcc_slot_info * slot_i,struct rtw_phl_mcc_dbg_hal_info * dbg_hal_i)80 enum rtw_hal_status _mcc_add_bt_role(struct hal_info_t *hal, u8 group,
81 struct rtw_phl_mcc_slot_info *slot_i,
82 struct rtw_phl_mcc_dbg_hal_info *dbg_hal_i)
83 {
84 enum rtw_hal_status status = RTW_HAL_STATUS_FAILURE;
85 struct rtw_phl_mcc_role mrole = {0};
86
87 mrole.policy.dur_info.dur = (u8)slot_i->slot;
88 mrole.bt_role = true;
89 mrole.group = group;
90 PHL_TRACE(COMP_PHL_MCC, _PHL_ERR_, "_mcc_add_bt_role(): add bt role\n");
91 _mcc_fill_slot_dbg_info(dbg_hal_i, &mrole);
92 status = rtw_hal_mac_add_mcc(hal, &mrole);
93 return status;
94 }
95
_mcc_add_wifi_role(struct hal_info_t * hal,u8 group,struct rtw_phl_mcc_slot_info * slot_i,struct rtw_phl_mcc_dbg_hal_info * dbg_hal_i)96 enum rtw_hal_status _mcc_add_wifi_role(struct hal_info_t *hal,
97 u8 group, struct rtw_phl_mcc_slot_info *slot_i,
98 struct rtw_phl_mcc_dbg_hal_info *dbg_hal_i)
99 {
100 enum rtw_hal_status status = RTW_HAL_STATUS_FAILURE;
101 struct rtw_phl_mcc_role *mrole = slot_i->mrole;
102
103 if (NULL == mrole) {
104 PHL_TRACE(COMP_PHL_MCC, _PHL_ERR_, "_mcc_add_wifi_role(): Fail, NULL == mrole, Please check code\n");
105 goto exit;
106 }
107 PHL_TRACE(COMP_PHL_MCC, _PHL_ERR_, "_mcc_add_wifi_role(): add wifi role\n");
108 mrole->group = group;
109 _mcc_fill_slot_dbg_info(dbg_hal_i, mrole);
110 status = rtw_hal_mac_add_mcc(hal, mrole);
111 if (status != RTW_HAL_STATUS_SUCCESS) {
112 PHL_TRACE(COMP_PHL_MCC, _PHL_ERR_, "_mcc_add_wifi_role(): Add mcc failed\n");
113 goto exit;
114 }
115 status = rtw_hal_mcc_update_macid_bitmap(hal, group,
116 (u8)mrole->macid,
117 &mrole->used_macid);
118 if (status != RTW_HAL_STATUS_SUCCESS) {
119 PHL_TRACE(COMP_PHL_MCC, _PHL_ERR_, "_mcc_add_wifi_role(): Add MACID bitmap failed\n");
120 goto exit;
121 }
122 exit:
123 return status;
124 }
125
_mcc_fill_role_setting(struct hal_info_t * hal,struct rtw_phl_mcc_en_info * info)126 enum rtw_hal_status _mcc_fill_role_setting(struct hal_info_t *hal,
127 struct rtw_phl_mcc_en_info *info)
128 {
129 enum rtw_hal_status status = RTW_HAL_STATUS_FAILURE;
130 struct rtw_phl_mcc_slot_info *slot_i = info->m_pattern.slot_order;
131 u8 i = 0;
132
133 if (info->m_pattern.slot_num > SLOT_NUM) {
134 PHL_TRACE(COMP_PHL_MCC, _PHL_ERR_, "_mcc_fill_role_setting(): Fial, slot_num(%d) > SLOT_NUM(%d), please check code\n",
135 info->m_pattern.slot_num, SLOT_NUM);
136 goto exit;
137 } else if (info->m_pattern.slot_num < MIN_TDMRA_SLOT_NUM) {
138 PHL_TRACE(COMP_PHL_MCC, _PHL_ERR_, "_mcc_fill_role_setting(): Fial, slot_num(%d) < MIN_TDMRA_SLOT_NUM(%d), please check code\n",
139 info->m_pattern.slot_num, MIN_TDMRA_SLOT_NUM);
140 goto exit;
141 }
142 for (i = 0; i < info->m_pattern.slot_num; i++) {
143 if (!slot_i[i].bt_role) {
144 if (RTW_HAL_STATUS_SUCCESS!= _mcc_add_wifi_role(hal,
145 info->group, &slot_i[i], &info->dbg_hal_i)) {
146 PHL_TRACE(COMP_PHL_MCC, _PHL_ERR_, "_mcc_fill_role_setting(): Add wifi role failed\n");
147 goto exit;
148 }
149 } else {
150 if (RTW_HAL_STATUS_SUCCESS != _mcc_add_bt_role(hal,
151 info->group, &slot_i[i], &info->dbg_hal_i)) {
152 PHL_TRACE(COMP_PHL_MCC, _PHL_ERR_, "_mcc_fill_role_setting(): Add bt role failed\n");
153 goto exit;
154 }
155 }
156 }
157 status = RTW_HAL_STATUS_SUCCESS;
158 exit:
159 return status;
160 }
161
_mcc_replace_pattern(struct hal_info_t * hal,struct rtw_phl_mcc_en_info * ori_info,struct rtw_phl_mcc_en_info * new_info,struct rtw_phl_mcc_bt_info * new_bt_info)162 enum rtw_hal_status _mcc_replace_pattern(struct hal_info_t *hal,
163 struct rtw_phl_mcc_en_info *ori_info,
164 struct rtw_phl_mcc_en_info *new_info,
165 struct rtw_phl_mcc_bt_info *new_bt_info)
166 {
167 enum rtw_hal_status status = RTW_HAL_STATUS_FAILURE;
168 struct rtw_phl_mcc_role *ref_role =
169 &new_info->mcc_role[new_info->ref_role_idx];
170 bool btc_in_group = false;
171
172 PHL_TRACE(COMP_PHL_MCC, _PHL_INFO_, ">>> _mcc_replace_pattern\n");
173 if (RTW_HAL_STATUS_SUCCESS != rtw_hal_mac_get_mcc_group(hal, &new_info->group)) {
174 PHL_TRACE(COMP_PHL_MCC, _PHL_ERR_, "_mcc_replace_pattern(): Allocate group fail\n");
175 goto exit;
176 }
177 _os_mem_set(hal_to_drvpriv(hal), &new_info->dbg_hal_i, 0,
178 sizeof(struct rtw_phl_mcc_dbg_hal_info));
179 status = _mcc_fill_role_setting(hal, new_info);
180 if (status != RTW_HAL_STATUS_SUCCESS) {
181 PHL_TRACE(COMP_PHL_MCC, _PHL_ERR_, "_mcc_replace_pattern(): Fail fill role setting\n");
182 goto exit;
183 }
184 if (new_info->sync_tsf_info.sync_en) {
185 status = rtw_hal_mcc_sync_enable(hal, new_info);
186 if (status != RTW_HAL_STATUS_SUCCESS) {
187 PHL_TRACE(COMP_PHL_MCC, _PHL_ERR_, "_mcc_replace_pattern(): Sync enable failed\n");
188 goto exit;
189 }
190 }
191 if (new_bt_info->bt_dur > 0) {
192 btc_in_group = true;
193 _mcc_fill_slot_bt_coex(&new_info->dbg_hal_i, true);
194 } else {
195 _mcc_fill_slot_bt_coex(&new_info->dbg_hal_i, false);
196 }
197 status = rtw_hal_mac_start_mcc(hal, new_info->group,
198 (u8)ref_role->macid, new_info->tsf_high,
199 new_info->tsf_low, btc_in_group, 1, ori_info->group);
200 if (status != RTW_HAL_STATUS_SUCCESS) {
201 PHL_TRACE(COMP_PHL_MCC, _PHL_ERR_, "_mcc_replace_pattern(): Start MCC failed\n");
202 goto exit;
203 }
204 status = RTW_HAL_STATUS_SUCCESS;
205 exit:
206 PHL_TRACE(COMP_PHL_MCC, _PHL_INFO_, "<<< _mcc_replace_pattern(): Ststus(%d)\n",
207 status);
208 return status;
209 }
210
rtw_hal_mcc_get_2ports_tsf(void * hal,u8 group,u16 macid_x,u16 macid_y,u32 * tsf_x_h,u32 * tsf_x_l,u32 * tsf_y_h,u32 * tsf_y_l)211 enum rtw_hal_status rtw_hal_mcc_get_2ports_tsf(void *hal, u8 group,
212 u16 macid_x, u16 macid_y, u32 *tsf_x_h, u32 *tsf_x_l,
213 u32 *tsf_y_h, u32 *tsf_y_l)
214 {
215 enum rtw_hal_status status = RTW_HAL_STATUS_FAILURE;
216
217 status = rtw_hal_mac_mcc_request_tsf(hal, group, (u8)macid_x, (u8)macid_y);
218 if (status != RTW_HAL_STATUS_SUCCESS) {
219 PHL_TRACE(COMP_PHL_MCC, _PHL_ERR_, "rtw_hal_mcc_get_2ports_tsf(): Req tsf failed\n");
220 goto exit;
221 }
222 status = rtw_hal_mac_get_mcc_tsf_rpt(hal, group, tsf_x_h, tsf_x_l,
223 tsf_y_h, tsf_y_l);
224 if (status != RTW_HAL_STATUS_SUCCESS) {
225 PHL_TRACE(COMP_PHL_MCC, _PHL_ERR_, "rtw_hal_mcc_get_2ports_tsf(): Get tsf rpt failed\n");
226 goto exit;
227 }
228 exit:
229 PHL_TRACE(COMP_PHL_MCC, _PHL_INFO_, "rtw_hal_mcc_get_2ports_tsf(): Ststus(%d)\n",
230 status);
231 return status;
232 }
233
rtw_hal_notify_mcc_macid(void * hal,struct rtw_phl_mcc_role * mrole,enum rtw_phl_tdmra_wmode wmode)234 enum rtw_hal_status rtw_hal_notify_mcc_macid(void *hal,
235 struct rtw_phl_mcc_role *mrole,
236 enum rtw_phl_tdmra_wmode wmode)
237 {
238 enum rtw_hal_status sts = RTW_HAL_STATUS_FAILURE;
239
240 if (wmode == RTW_PHL_TDMRA_AP_CLIENT_WMODE ||
241 wmode == RTW_PHL_TDMRA_2CLIENTS_WMODE) {
242 if (sts != rtw_hal_bb_upd_mcc_macid(hal, mrole)) {
243 PHL_TRACE(COMP_PHL_MCC, _PHL_ERR_, "%s: Notify BB MCC MACID bitmap failed\n",
244 __FUNCTION__);
245 goto exit;
246
247 }
248 }
249 sts = RTW_HAL_STATUS_SUCCESS;
250 exit:
251 return sts;
252 }
253
rtw_hal_mcc_update_macid_bitmap(void * hal,u8 group,u16 macid,struct rtw_phl_mcc_macid_bitmap * info)254 enum rtw_hal_status rtw_hal_mcc_update_macid_bitmap(void *hal, u8 group,
255 u16 macid, struct rtw_phl_mcc_macid_bitmap *info)
256 {
257 enum rtw_hal_status status = RTW_HAL_STATUS_FAILURE;
258
259 status = rtw_hal_mac_mcc_macid_bitmap(hal, group, (u8)macid,
260 (u8 *)info->bitmap, info->len);
261 if (status != RTW_HAL_STATUS_SUCCESS) {
262 PHL_TRACE(COMP_PHL_MCC, _PHL_ERR_, "rtw_hal_mcc_update_macid_bitmap(): Add MACID bitmap failed\n");
263 }
264 PHL_TRACE(COMP_PHL_MCC, _PHL_INFO_, "rtw_hal_mcc_update_macid_bitmap(): Ststus(%d)\n",
265 status);
266 return status;
267 }
268
rtw_hal_mcc_sync_enable(void * hal,struct rtw_phl_mcc_en_info * info)269 enum rtw_hal_status rtw_hal_mcc_sync_enable(void *hal,
270 struct rtw_phl_mcc_en_info *info)
271 {
272 enum rtw_hal_status status = RTW_HAL_STATUS_FAILURE;
273 struct rtw_phl_mcc_role *ref_role = &info->mcc_role[info->ref_role_idx];
274
275 if (info->sync_tsf_info.sync_en) {
276 status = rtw_hal_mac_mcc_sync_enable(hal, ref_role->group,
277 (u8)info->sync_tsf_info.source,
278 (u8)info->sync_tsf_info.target,
279 (u8)info->sync_tsf_info.offset);
280 if (status != RTW_HAL_STATUS_SUCCESS) {
281 PHL_TRACE(COMP_PHL_MCC, _PHL_ERR_, "rtw_hal_mcc_sync_enable(): Sync enable failed\n");
282 goto exit;
283 }
284 } else {
285 PHL_TRACE(COMP_PHL_MCC, _PHL_ERR_, "rtw_hal_mcc_sync_enable(): sync_en == false, please check code\n");
286 goto exit;
287 }
288 status = RTW_HAL_STATUS_SUCCESS;
289 exit:
290 return status;
291 }
292
_mcc_set_duration(void * hal,struct rtw_phl_mcc_en_info * info,struct rtw_phl_mcc_bt_info * bt_info)293 enum rtw_hal_status _mcc_set_duration(void *hal,
294 struct rtw_phl_mcc_en_info *info,
295 struct rtw_phl_mcc_bt_info *bt_info)
296 {
297 enum rtw_hal_status status = RTW_HAL_STATUS_FAILURE;
298
299 status = rtw_hal_mac_set_duration(hal, info, bt_info);
300 if (status != RTW_HAL_STATUS_SUCCESS) {
301 PHL_TRACE(COMP_PHL_MCC, _PHL_ERR_, "_mcc_set_duration(): set duration failed\n");
302 } else {
303 _mcc_update_dbg_info(info, bt_info);
304 }
305 PHL_TRACE(COMP_PHL_MCC, _PHL_INFO_, "_mcc_set_duration(): Ststus(%d)\n",
306 status);
307 return status;
308 }
309
rtw_hal_mcc_change_pattern(void * hal,struct rtw_phl_mcc_en_info * ori_info,struct rtw_phl_mcc_en_info * new_info,struct rtw_phl_mcc_bt_info * new_bt_info)310 enum rtw_hal_status rtw_hal_mcc_change_pattern(void *hal,
311 struct rtw_phl_mcc_en_info *ori_info,
312 struct rtw_phl_mcc_en_info *new_info,
313 struct rtw_phl_mcc_bt_info *new_bt_info)
314 {
315 enum rtw_hal_status status = RTW_HAL_STATUS_FAILURE;
316 /* mcc_set_duration only can change 2 wifi slot,
317 otherwise we shall create new pattern and replace previous pattern*/
318 if (new_info->m_pattern.slot_num == 2 &&
319 new_info->m_pattern.bt_slot_num == 0 &&
320 ori_info->m_pattern.slot_num == 2 &&
321 ori_info->m_pattern.bt_slot_num == 0) {
322 status = _mcc_set_duration(hal, new_info, new_bt_info);
323 } else {
324 status = _mcc_replace_pattern(hal, ori_info, new_info,
325 new_bt_info);
326 }
327 PHL_TRACE(COMP_PHL_MCC, _PHL_INFO_, "rtw_hal_mcc_change_pattern(): status(%d)\n",
328 status);
329 return status;
330 }
331
rtw_hal_mcc_reset(void * hal,u8 group,enum rtw_phl_tdmra_wmode wmode)332 enum rtw_hal_status rtw_hal_mcc_reset(void *hal, u8 group,
333 enum rtw_phl_tdmra_wmode wmode)
334 {
335 enum rtw_hal_status status = RTW_HAL_STATUS_FAILURE;
336
337 status = rtw_hal_mac_reset_mcc_group(hal, group);
338 if (status != RTW_HAL_STATUS_SUCCESS) {
339 PHL_TRACE(COMP_PHL_MCC, _PHL_ERR_,
340 "%s(): reset group(%d) failed\n",
341 __func__, group);
342 goto exit;
343 }
344 if (wmode == RTW_PHL_TDMRA_AP_CLIENT_WMODE ||
345 wmode == RTW_PHL_TDMRA_2CLIENTS_WMODE) {
346 rtw_hal_bb_mcc_stop(hal);
347 }
348
349 status = RTW_HAL_STATUS_SUCCESS;
350 exit:
351 PHL_TRACE(COMP_PHL_MCC, _PHL_INFO_, "%s(): status(%d)\n",
352 __func__, status);
353 return status;
354 }
355
rtw_hal_mcc_disable(void * hal,u8 group,u16 macid,enum rtw_phl_tdmra_wmode wmode)356 enum rtw_hal_status rtw_hal_mcc_disable(void *hal, u8 group, u16 macid,
357 enum rtw_phl_tdmra_wmode wmode)
358 {
359 enum rtw_hal_status status = RTW_HAL_STATUS_FAILURE;
360
361 status = rtw_hal_mac_stop_mcc(hal, group, (u8)macid);
362 if (status != RTW_HAL_STATUS_SUCCESS) {
363 PHL_TRACE(COMP_PHL_MCC, _PHL_ERR_, "rtw_hal_mcc_disable(): Stop mcc failed\n");
364 goto exit;
365 }
366 status = rtw_hal_mac_del_mcc_group(hal, group);
367 if (status != RTW_HAL_STATUS_SUCCESS) {
368 PHL_TRACE(COMP_PHL_MCC, _PHL_ERR_, "rtw_hal_mcc_disable(): Delete group failed\n");
369 goto exit;
370 }
371 if (wmode == RTW_PHL_TDMRA_AP_CLIENT_WMODE ||
372 wmode == RTW_PHL_TDMRA_2CLIENTS_WMODE) {
373 rtw_hal_bb_mcc_stop(hal);
374 }
375
376 #ifdef RTW_WKARD_HALRF_MCC
377 rtw_hal_rf_dpk_switch(hal, true);
378 #endif /* RTW_WKARD_HALRF_MCC */
379 status = RTW_HAL_STATUS_SUCCESS;
380 exit:
381 PHL_TRACE(COMP_PHL_MCC, _PHL_INFO_, "rtw_hal_mcc_disable(): Ststus(%d)\n",
382 status);
383 return status;
384 }
385
rtw_hal_mcc_enable(void * hal,struct rtw_phl_mcc_en_info * info,struct rtw_phl_mcc_bt_info * bt_info,enum rtw_phl_tdmra_wmode wmode)386 enum rtw_hal_status rtw_hal_mcc_enable(void *hal, struct rtw_phl_mcc_en_info *info,
387 struct rtw_phl_mcc_bt_info *bt_info,
388 enum rtw_phl_tdmra_wmode wmode)
389 {
390 enum rtw_hal_status status = RTW_HAL_STATUS_FAILURE;
391 struct rtw_phl_mcc_role *ref_role = &info->mcc_role[info->ref_role_idx];
392 bool btc_in_group = false;
393
394 if (RTW_HAL_STATUS_SUCCESS != rtw_hal_mac_get_mcc_group(hal, &info->group)) {
395 PHL_TRACE(COMP_PHL_MCC, _PHL_ERR_, "rtw_hal_mcc_enable(): Allocate group fail\n");
396 goto exit;
397 }
398 #ifdef RTW_WKARD_HALRF_MCC
399 rtw_hal_rf_dpk_switch(hal, false);
400 #endif /* RTW_WKARD_HALRF_MCC */
401 if (RTW_HAL_STATUS_SUCCESS != _mcc_fill_role_setting(hal, info)) {
402 PHL_TRACE(COMP_PHL_MCC, _PHL_ERR_, "rtw_hal_mcc_enable(): Fail fill role setting\n");
403 goto exit;
404 }
405 /*fill start setting*/
406 if (info->sync_tsf_info.sync_en) {
407 status = rtw_hal_mcc_sync_enable(hal, info);
408 if (status != RTW_HAL_STATUS_SUCCESS) {
409 PHL_TRACE(COMP_PHL_MCC, _PHL_ERR_, "rtw_hal_mcc_enable(): Sync enable failed\n");
410 goto exit;
411 }
412 }
413 if (bt_info->bt_dur > 0) {
414 btc_in_group = true;
415 _mcc_fill_slot_bt_coex(&info->dbg_hal_i, true);
416 } else {
417 _mcc_fill_slot_bt_coex(&info->dbg_hal_i, false);
418 }
419 status = rtw_hal_mac_start_mcc(hal, info->group,
420 (u8)ref_role->macid, info->tsf_high,
421 info->tsf_low, btc_in_group, 0, 0);
422 if (status != RTW_HAL_STATUS_SUCCESS) {
423 PHL_TRACE(COMP_PHL_MCC, _PHL_ERR_, "rtw_hal_mcc_enable(): Start MCC failed\n");
424 goto exit;
425 }
426
427 if (wmode == RTW_PHL_TDMRA_AP_CLIENT_WMODE ||
428 wmode == RTW_PHL_TDMRA_2CLIENTS_WMODE) {
429 status = rtw_hal_bb_mcc_start(hal, &info->mcc_role[0],
430 &info->mcc_role[1]);
431 if (status != RTW_HAL_STATUS_SUCCESS) {
432 PHL_TRACE(COMP_PHL_MCC, _PHL_ERR_, "rtw_hal_mcc_enable(): Notify MCC start failed\n");
433 }
434 }
435
436 status = RTW_HAL_STATUS_SUCCESS;
437 exit:
438 PHL_TRACE(COMP_PHL_MCC, _PHL_INFO_, "rtw_hal_mcc_enable(): Ststus(%d)\n",
439 status);
440 return status;
441 }
442 #endif /* CONFIG_MCC_SUPPORT */
443