1*4882a593Smuzhiyun /******************************************************************************
2*4882a593Smuzhiyun *
3*4882a593Smuzhiyun * Copyright(c) 2007 - 2019 Realtek Corporation.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify it
6*4882a593Smuzhiyun * under the terms of version 2 of the GNU General Public License as
7*4882a593Smuzhiyun * published by the Free Software Foundation.
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * This program is distributed in the hope that it will be useful, but WITHOUT
10*4882a593Smuzhiyun * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11*4882a593Smuzhiyun * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12*4882a593Smuzhiyun * more details.
13*4882a593Smuzhiyun *
14*4882a593Smuzhiyun *****************************************************************************/
15*4882a593Smuzhiyun #ifndef __STA_INFO_H_
16*4882a593Smuzhiyun #define __STA_INFO_H_
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun #ifdef CONFIG_CORE_TXSC
19*4882a593Smuzhiyun #include <rtw_xmit_shortcut.h>
20*4882a593Smuzhiyun #endif
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun #ifdef CONFIG_RTW_CORE_RXSC
23*4882a593Smuzhiyun #include <rtw_recv_shortcut.h>
24*4882a593Smuzhiyun #endif
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun #define IBSS_START_MAC_ID 2
27*4882a593Smuzhiyun #define NUM_STA MACID_NUM_SW_LIMIT
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun #ifndef CONFIG_RTW_MACADDR_ACL
30*4882a593Smuzhiyun #define CONFIG_RTW_MACADDR_ACL 1
31*4882a593Smuzhiyun #endif
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun #ifndef CONFIG_RTW_PRE_LINK_STA
34*4882a593Smuzhiyun #define CONFIG_RTW_PRE_LINK_STA 0
35*4882a593Smuzhiyun #endif
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun #define NUM_ACL 16
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun #define RTW_ACL_PERIOD_DEV 0
40*4882a593Smuzhiyun #define RTW_ACL_PERIOD_BSS 1
41*4882a593Smuzhiyun #define RTW_ACL_PERIOD_NUM 2
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun #define RTW_ACL_MODE_DISABLED 0
44*4882a593Smuzhiyun #define RTW_ACL_MODE_ACCEPT_UNLESS_LISTED 1
45*4882a593Smuzhiyun #define RTW_ACL_MODE_DENY_UNLESS_LISTED 2
46*4882a593Smuzhiyun #define RTW_ACL_MODE_MAX 3
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun #if CONFIG_RTW_MACADDR_ACL
49*4882a593Smuzhiyun extern const char *const _acl_period_str[RTW_ACL_PERIOD_NUM];
50*4882a593Smuzhiyun #define acl_period_str(mode) (((mode) >= RTW_ACL_PERIOD_NUM) ? "INVALID" : _acl_period_str[(mode)])
51*4882a593Smuzhiyun extern const char *const _acl_mode_str[RTW_ACL_MODE_MAX];
52*4882a593Smuzhiyun #define acl_mode_str(mode) (((mode) >= RTW_ACL_MODE_MAX) ? "INVALID" : _acl_mode_str[(mode)])
53*4882a593Smuzhiyun #endif
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun #ifndef RTW_PRE_LINK_STA_NUM
56*4882a593Smuzhiyun #define RTW_PRE_LINK_STA_NUM 8
57*4882a593Smuzhiyun #endif
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun struct pre_link_sta_node_t {
60*4882a593Smuzhiyun u8 valid;
61*4882a593Smuzhiyun u8 addr[ETH_ALEN];
62*4882a593Smuzhiyun };
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun struct pre_link_sta_ctl_t {
65*4882a593Smuzhiyun _lock lock;
66*4882a593Smuzhiyun u8 num;
67*4882a593Smuzhiyun struct pre_link_sta_node_t node[RTW_PRE_LINK_STA_NUM];
68*4882a593Smuzhiyun };
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun #ifdef CONFIG_TDLS
71*4882a593Smuzhiyun #define MAX_ALLOWED_TDLS_STA_NUM 4
72*4882a593Smuzhiyun #endif
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun enum sta_info_update_type {
75*4882a593Smuzhiyun STA_INFO_UPDATE_NONE = 0,
76*4882a593Smuzhiyun STA_INFO_UPDATE_BW = BIT(0),
77*4882a593Smuzhiyun STA_INFO_UPDATE_RATE = BIT(1),
78*4882a593Smuzhiyun STA_INFO_UPDATE_PROTECTION_MODE = BIT(2),
79*4882a593Smuzhiyun STA_INFO_UPDATE_CAP = BIT(3),
80*4882a593Smuzhiyun STA_INFO_UPDATE_HT_CAP = BIT(4),
81*4882a593Smuzhiyun STA_INFO_UPDATE_VHT_CAP = BIT(5),
82*4882a593Smuzhiyun STA_INFO_UPDATE_ALL = STA_INFO_UPDATE_BW
83*4882a593Smuzhiyun | STA_INFO_UPDATE_RATE
84*4882a593Smuzhiyun | STA_INFO_UPDATE_PROTECTION_MODE
85*4882a593Smuzhiyun | STA_INFO_UPDATE_CAP
86*4882a593Smuzhiyun | STA_INFO_UPDATE_HT_CAP
87*4882a593Smuzhiyun | STA_INFO_UPDATE_VHT_CAP,
88*4882a593Smuzhiyun STA_INFO_UPDATE_MAX
89*4882a593Smuzhiyun };
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun struct rtw_wlan_acl_node {
92*4882a593Smuzhiyun _list list;
93*4882a593Smuzhiyun u8 addr[ETH_ALEN];
94*4882a593Smuzhiyun u8 valid;
95*4882a593Smuzhiyun };
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun struct wlan_acl_pool {
98*4882a593Smuzhiyun int mode;
99*4882a593Smuzhiyun int num;
100*4882a593Smuzhiyun struct rtw_wlan_acl_node aclnode[NUM_ACL];
101*4882a593Smuzhiyun _queue acl_node_q;
102*4882a593Smuzhiyun };
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun struct stainfo_stats {
105*4882a593Smuzhiyun systime last_rx_time;
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun u64 rx_mgnt_pkts;
108*4882a593Smuzhiyun u64 rx_beacon_pkts;
109*4882a593Smuzhiyun u64 rx_probereq_pkts;
110*4882a593Smuzhiyun u64 rx_probersp_pkts; /* unicast to self */
111*4882a593Smuzhiyun u64 rx_probersp_bm_pkts;
112*4882a593Smuzhiyun u64 rx_probersp_uo_pkts; /* unicast to others */
113*4882a593Smuzhiyun u64 rx_ctrl_pkts;
114*4882a593Smuzhiyun u64 rx_data_pkts;
115*4882a593Smuzhiyun u64 rx_data_bc_pkts;
116*4882a593Smuzhiyun u64 rx_data_mc_pkts;
117*4882a593Smuzhiyun u64 rx_data_qos_pkts[TID_NUM]; /* unicast only */
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun u64 last_rx_mgnt_pkts;
120*4882a593Smuzhiyun u64 last_rx_beacon_pkts;
121*4882a593Smuzhiyun u64 last_rx_probereq_pkts;
122*4882a593Smuzhiyun u64 last_rx_probersp_pkts; /* unicast to self */
123*4882a593Smuzhiyun u64 last_rx_probersp_bm_pkts;
124*4882a593Smuzhiyun u64 last_rx_probersp_uo_pkts; /* unicast to others */
125*4882a593Smuzhiyun u64 last_rx_ctrl_pkts;
126*4882a593Smuzhiyun u64 last_rx_data_pkts;
127*4882a593Smuzhiyun u64 last_rx_data_bc_pkts;
128*4882a593Smuzhiyun u64 last_rx_data_mc_pkts;
129*4882a593Smuzhiyun u64 last_rx_data_qos_pkts[TID_NUM]; /* unicast only */
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun #ifdef CONFIG_TDLS
132*4882a593Smuzhiyun u64 rx_tdls_disc_rsp_pkts;
133*4882a593Smuzhiyun u64 last_rx_tdls_disc_rsp_pkts;
134*4882a593Smuzhiyun #endif
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun u64 rx_bytes;
137*4882a593Smuzhiyun u64 rx_bc_bytes;
138*4882a593Smuzhiyun u64 rx_mc_bytes;
139*4882a593Smuzhiyun u64 last_rx_bytes;
140*4882a593Smuzhiyun u64 last_rx_bc_bytes;
141*4882a593Smuzhiyun u64 last_rx_mc_bytes;
142*4882a593Smuzhiyun u64 rx_drops; /* TBD */
143*4882a593Smuzhiyun u32 rx_tp_kbits;
144*4882a593Smuzhiyun u32 smooth_rx_tp_kbits;
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun u64 tx_pkts;
147*4882a593Smuzhiyun u64 last_tx_pkts;
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun u64 tx_bytes;
150*4882a593Smuzhiyun u64 last_tx_bytes;
151*4882a593Smuzhiyun u64 tx_drops; /* TBD */
152*4882a593Smuzhiyun u32 tx_tp_kbits;
153*4882a593Smuzhiyun u32 smooth_tx_tp_kbits;
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun #ifdef CONFIG_LPS_CHK_BY_TP
156*4882a593Smuzhiyun u64 acc_tx_bytes;
157*4882a593Smuzhiyun u64 acc_rx_bytes;
158*4882a593Smuzhiyun #endif
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun /* unicast only */
161*4882a593Smuzhiyun u64 last_rx_data_uc_pkts; /* For Read & Clear requirement in proc_get_rx_stat() */
162*4882a593Smuzhiyun u32 duplicate_cnt; /* Read & Clear, in proc_get_rx_stat() */
163*4882a593Smuzhiyun u32 rxratecnt[128]; /* Read & Clear, in proc_get_rx_stat() */
164*4882a593Smuzhiyun u32 tx_ok_cnt; /* Read & Clear, in proc_get_tx_stat() */
165*4882a593Smuzhiyun u32 tx_fail_cnt; /* Read & Clear, in proc_get_tx_stat() */
166*4882a593Smuzhiyun u32 tx_fail_cnt_sum; /* cumulative counts */
167*4882a593Smuzhiyun u32 tx_retry_cnt; /* Read & Clear, in proc_get_tx_stat() */
168*4882a593Smuzhiyun u32 tx_retry_cnt_sum; /* cumulative counts */
169*4882a593Smuzhiyun u64 total_tx_retry_cnt;
170*4882a593Smuzhiyun u32 rx_retry_cnt;
171*4882a593Smuzhiyun #ifdef CONFIG_RTW_MESH
172*4882a593Smuzhiyun u32 rx_hwmp_pkts;
173*4882a593Smuzhiyun u32 last_rx_hwmp_pkts;
174*4882a593Smuzhiyun #endif
175*4882a593Smuzhiyun };
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun #ifndef DBG_SESSION_TRACKER
178*4882a593Smuzhiyun #define DBG_SESSION_TRACKER 0
179*4882a593Smuzhiyun #endif
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun /* session tracker status */
182*4882a593Smuzhiyun #define ST_STATUS_NONE 0
183*4882a593Smuzhiyun #define ST_STATUS_CHECK BIT0
184*4882a593Smuzhiyun #define ST_STATUS_ESTABLISH BIT1
185*4882a593Smuzhiyun #define ST_STATUS_EXPIRE BIT2
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun #define ST_EXPIRE_MS (10 * 1000)
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun struct session_tracker {
190*4882a593Smuzhiyun _list list; /* session_tracker_queue */
191*4882a593Smuzhiyun u32 local_naddr;
192*4882a593Smuzhiyun u16 local_port;
193*4882a593Smuzhiyun u32 remote_naddr;
194*4882a593Smuzhiyun u16 remote_port;
195*4882a593Smuzhiyun systime set_time;
196*4882a593Smuzhiyun u8 status;
197*4882a593Smuzhiyun };
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun /* session tracker cmd */
200*4882a593Smuzhiyun #define ST_CMD_ADD 0
201*4882a593Smuzhiyun #define ST_CMD_DEL 1
202*4882a593Smuzhiyun #define ST_CMD_CHK 2
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun struct st_cmd_parm {
205*4882a593Smuzhiyun u8 cmd;
206*4882a593Smuzhiyun struct sta_info *sta;
207*4882a593Smuzhiyun u32 local_naddr; /* TODO: IPV6 */
208*4882a593Smuzhiyun u16 local_port;
209*4882a593Smuzhiyun u32 remote_naddr; /* TODO: IPV6 */
210*4882a593Smuzhiyun u16 remote_port;
211*4882a593Smuzhiyun };
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun typedef bool (*st_match_rule)(_adapter *adapter, u8 *local_naddr, u8 *local_port, u8 *remote_naddr, u8 *remote_port);
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun struct st_register {
216*4882a593Smuzhiyun u8 s_proto;
217*4882a593Smuzhiyun st_match_rule rule;
218*4882a593Smuzhiyun };
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun #define SESSION_TRACKER_REG_ID_WFD 0
221*4882a593Smuzhiyun #define SESSION_TRACKER_REG_ID_NUM 1
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun struct st_ctl_t {
224*4882a593Smuzhiyun struct st_register reg[SESSION_TRACKER_REG_ID_NUM];
225*4882a593Smuzhiyun _queue tracker_q;
226*4882a593Smuzhiyun };
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun void rtw_st_ctl_init(struct st_ctl_t *st_ctl);
229*4882a593Smuzhiyun void rtw_st_ctl_deinit(struct st_ctl_t *st_ctl);
230*4882a593Smuzhiyun void rtw_st_ctl_register(struct st_ctl_t *st_ctl, u8 st_reg_id, struct st_register *reg);
231*4882a593Smuzhiyun void rtw_st_ctl_unregister(struct st_ctl_t *st_ctl, u8 st_reg_id);
232*4882a593Smuzhiyun bool rtw_st_ctl_chk_reg_s_proto(struct st_ctl_t *st_ctl, u8 s_proto);
233*4882a593Smuzhiyun bool rtw_st_ctl_chk_reg_rule(struct st_ctl_t *st_ctl, _adapter *adapter, u8 *local_naddr, u8 *local_port, u8 *remote_naddr, u8 *remote_port);
234*4882a593Smuzhiyun void rtw_st_ctl_rx(struct sta_info *sta, u8 *ehdr_pos);
235*4882a593Smuzhiyun void dump_st_ctl(void *sel, struct st_ctl_t *st_ctl);
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun #ifdef CONFIG_TDLS
238*4882a593Smuzhiyun struct TDLS_PeerKey {
239*4882a593Smuzhiyun u8 kck[16]; /* TPK-KCK */
240*4882a593Smuzhiyun u8 tk[16]; /* TPK-TK; only CCMP will be used */
241*4882a593Smuzhiyun } ;
242*4882a593Smuzhiyun #endif /* CONFIG_TDLS */
243*4882a593Smuzhiyun
244*4882a593Smuzhiyun #ifdef DBG_RX_DFRAME_RAW_DATA
245*4882a593Smuzhiyun struct sta_recv_dframe_info {
246*4882a593Smuzhiyun
247*4882a593Smuzhiyun u8 sta_data_rate;
248*4882a593Smuzhiyun u8 sta_sgi;
249*4882a593Smuzhiyun u8 sta_bw_mode;
250*4882a593Smuzhiyun s8 sta_mimo_signal_strength[4];
251*4882a593Smuzhiyun s8 sta_RxPwr[4];
252*4882a593Smuzhiyun u8 sta_ofdm_snr[4];
253*4882a593Smuzhiyun };
254*4882a593Smuzhiyun #endif
255*4882a593Smuzhiyun
256*4882a593Smuzhiyun #ifdef CONFIG_RTW_MESH
257*4882a593Smuzhiyun struct mesh_plink_ent;
258*4882a593Smuzhiyun struct rtw_ewma_err_rate {
259*4882a593Smuzhiyun unsigned long internal;
260*4882a593Smuzhiyun };
261*4882a593Smuzhiyun
262*4882a593Smuzhiyun /* Mesh airtime link metrics parameters */
263*4882a593Smuzhiyun struct rtw_atlm_param {
264*4882a593Smuzhiyun struct rtw_ewma_err_rate err_rate; /* Now is PACKET error rate */
265*4882a593Smuzhiyun u16 data_rate; /* The unit is 100Kbps */
266*4882a593Smuzhiyun u16 total_pkt;
267*4882a593Smuzhiyun u16 overhead; /* Channel access overhead */
268*4882a593Smuzhiyun };
269*4882a593Smuzhiyun #endif
270*4882a593Smuzhiyun
271*4882a593Smuzhiyun struct sta_info {
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun _lock lock;
274*4882a593Smuzhiyun _list list; /* free_sta_queue */
275*4882a593Smuzhiyun _list hash_list; /* sta_hash */
276*4882a593Smuzhiyun /* _list asoc_list; */ /* 20061114 */
277*4882a593Smuzhiyun /* _list sleep_list; */ /* sleep_q */
278*4882a593Smuzhiyun /* _list wakeup_list; */ /* wakeup_q */
279*4882a593Smuzhiyun _adapter *padapter;
280*4882a593Smuzhiyun
281*4882a593Smuzhiyun struct rtw_phl_stainfo_t *phl_sta;
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun /* move to phl station info */
284*4882a593Smuzhiyun /* struct cmn_sta_info cmn; */
285*4882a593Smuzhiyun
286*4882a593Smuzhiyun struct sta_xmit_priv sta_xmitpriv;
287*4882a593Smuzhiyun struct sta_recv_priv sta_recvpriv;
288*4882a593Smuzhiyun
289*4882a593Smuzhiyun #ifdef DBG_RX_DFRAME_RAW_DATA
290*4882a593Smuzhiyun struct sta_recv_dframe_info sta_dframe_info;
291*4882a593Smuzhiyun struct sta_recv_dframe_info sta_dframe_info_bmc;
292*4882a593Smuzhiyun #endif
293*4882a593Smuzhiyun _queue sleep_q;
294*4882a593Smuzhiyun unsigned int sleepq_len;
295*4882a593Smuzhiyun
296*4882a593Smuzhiyun uint state;
297*4882a593Smuzhiyun uint qos_option;
298*4882a593Smuzhiyun u16 hwseq;
299*4882a593Smuzhiyun
300*4882a593Smuzhiyun #ifdef CONFIG_RTW_80211K
301*4882a593Smuzhiyun u8 rm_en_cap[5];
302*4882a593Smuzhiyun u8 rm_diag_token;
303*4882a593Smuzhiyun #endif /* CONFIG_RTW_80211K */
304*4882a593Smuzhiyun
305*4882a593Smuzhiyun systime resp_nonenc_eapol_key_starttime;
306*4882a593Smuzhiyun uint ieee8021x_blocked; /* 0: allowed, 1:blocked */
307*4882a593Smuzhiyun uint dot118021XPrivacy; /* aes, tkip... */
308*4882a593Smuzhiyun union Keytype dot11tkiptxmickey;
309*4882a593Smuzhiyun union Keytype dot11tkiprxmickey;
310*4882a593Smuzhiyun union Keytype dot118021x_UncstKey;
311*4882a593Smuzhiyun union pn48 dot11txpn; /* PN48 used for Unicast xmit */
312*4882a593Smuzhiyun union pn48 dot11rxpn; /* PN48 used for Unicast recv. */
313*4882a593Smuzhiyun s8 hw_decrypted; /* STA HW security is ready or not */
314*4882a593Smuzhiyun
315*4882a593Smuzhiyun #ifdef RTW_PHL_TX
316*4882a593Smuzhiyun u8 iv_len;
317*4882a593Smuzhiyun u8 icv_len;
318*4882a593Smuzhiyun u8 iv[18];
319*4882a593Smuzhiyun u8 icv[16];
320*4882a593Smuzhiyun #endif
321*4882a593Smuzhiyun
322*4882a593Smuzhiyun #ifdef CONFIG_RTW_CORE_RXSC
323*4882a593Smuzhiyun u32 rxsc_idx_new;
324*4882a593Smuzhiyun u32 rxsc_idx_cached;
325*4882a593Smuzhiyun struct core_rxsc_entry rxsc_entry[NUM_RXSC_ENTRY];
326*4882a593Smuzhiyun #endif
327*4882a593Smuzhiyun ATOMIC_T keytrack;
328*4882a593Smuzhiyun #ifdef CONFIG_RTW_MESH
329*4882a593Smuzhiyun /* peer's GTK, RX only */
330*4882a593Smuzhiyun u8 group_privacy;
331*4882a593Smuzhiyun u8 gtk_bmp;
332*4882a593Smuzhiyun union Keytype gtk;
333*4882a593Smuzhiyun union pn48 gtk_pn;
334*4882a593Smuzhiyun #ifdef CONFIG_IEEE80211W
335*4882a593Smuzhiyun /* peer's IGTK, RX only */
336*4882a593Smuzhiyun enum security_type dot11wCipher;
337*4882a593Smuzhiyun u8 igtk_bmp;
338*4882a593Smuzhiyun u8 igtk_id;
339*4882a593Smuzhiyun union Keytype igtk;
340*4882a593Smuzhiyun union pn48 igtk_pn;
341*4882a593Smuzhiyun #endif /* CONFIG_IEEE80211W */
342*4882a593Smuzhiyun #endif /* CONFIG_RTW_MESH */
343*4882a593Smuzhiyun #ifdef CONFIG_GTK_OL
344*4882a593Smuzhiyun u8 kek[RTW_KEK_LEN];
345*4882a593Smuzhiyun u8 kck[RTW_KCK_LEN];
346*4882a593Smuzhiyun u8 replay_ctr[RTW_REPLAY_CTR_LEN];
347*4882a593Smuzhiyun #endif /* CONFIG_GTK_OL */
348*4882a593Smuzhiyun #ifdef CONFIG_IEEE80211W
349*4882a593Smuzhiyun _timer dot11w_expire_timer;
350*4882a593Smuzhiyun #endif /* CONFIG_IEEE80211W */
351*4882a593Smuzhiyun
352*4882a593Smuzhiyun u8 bssrateset[16];
353*4882a593Smuzhiyun u32 bssratelen;
354*4882a593Smuzhiyun
355*4882a593Smuzhiyun u8 cts2self;
356*4882a593Smuzhiyun u8 rtsen;
357*4882a593Smuzhiyun u8 hw_rts_en;
358*4882a593Smuzhiyun
359*4882a593Smuzhiyun u8 init_rate;
360*4882a593Smuzhiyun
361*4882a593Smuzhiyun struct stainfo_stats sta_stats;
362*4882a593Smuzhiyun
363*4882a593Smuzhiyun #ifdef CONFIG_TDLS
364*4882a593Smuzhiyun u32 tdls_sta_state;
365*4882a593Smuzhiyun u8 SNonce[32];
366*4882a593Smuzhiyun u8 ANonce[32];
367*4882a593Smuzhiyun u32 TDLS_PeerKey_Lifetime;
368*4882a593Smuzhiyun u32 TPK_count;
369*4882a593Smuzhiyun _timer TPK_timer;
370*4882a593Smuzhiyun struct TDLS_PeerKey tpk;
371*4882a593Smuzhiyun #ifdef CONFIG_TDLS_CH_SW
372*4882a593Smuzhiyun u16 ch_switch_time;
373*4882a593Smuzhiyun u16 ch_switch_timeout;
374*4882a593Smuzhiyun /* u8 option; */
375*4882a593Smuzhiyun _timer ch_sw_timer;
376*4882a593Smuzhiyun _timer delay_timer;
377*4882a593Smuzhiyun _timer stay_on_base_chnl_timer;
378*4882a593Smuzhiyun _timer ch_sw_monitor_timer;
379*4882a593Smuzhiyun #endif
380*4882a593Smuzhiyun _timer handshake_timer;
381*4882a593Smuzhiyun u8 alive_count;
382*4882a593Smuzhiyun _timer pti_timer;
383*4882a593Smuzhiyun u8 TDLS_RSNIE[20]; /* Save peer's RSNIE, used for sending TDLS_SETUP_RSP */
384*4882a593Smuzhiyun #endif /* CONFIG_TDLS */
385*4882a593Smuzhiyun
386*4882a593Smuzhiyun /* for A-MPDU TX, ADDBA timeout check */
387*4882a593Smuzhiyun _timer addba_retry_timer;
388*4882a593Smuzhiyun
389*4882a593Smuzhiyun /* for A-MPDU Rx reordering buffer control */
390*4882a593Smuzhiyun struct recv_reorder_ctrl recvreorder_ctrl[TID_NUM];
391*4882a593Smuzhiyun ATOMIC_T continual_no_rx_packet[TID_NUM];
392*4882a593Smuzhiyun /* for A-MPDU Tx */
393*4882a593Smuzhiyun /* unsigned char ampdu_txen_bitmap; */
394*4882a593Smuzhiyun u16 BA_starting_seqctrl[16];
395*4882a593Smuzhiyun
396*4882a593Smuzhiyun
397*4882a593Smuzhiyun #ifdef CONFIG_80211N_HT
398*4882a593Smuzhiyun struct ht_priv htpriv;
399*4882a593Smuzhiyun #endif
400*4882a593Smuzhiyun
401*4882a593Smuzhiyun #ifdef CONFIG_80211AC_VHT
402*4882a593Smuzhiyun struct vht_priv vhtpriv;
403*4882a593Smuzhiyun #endif
404*4882a593Smuzhiyun
405*4882a593Smuzhiyun #ifdef CONFIG_80211AX_HE
406*4882a593Smuzhiyun struct he_priv hepriv;
407*4882a593Smuzhiyun #endif
408*4882a593Smuzhiyun
409*4882a593Smuzhiyun #ifdef CONFIG_RTW_MBO
410*4882a593Smuzhiyun struct mbo_priv mbopriv;
411*4882a593Smuzhiyun #endif /* CONFIG_RTW_MBO */
412*4882a593Smuzhiyun
413*4882a593Smuzhiyun /* Notes: */
414*4882a593Smuzhiyun /* STA_Mode: */
415*4882a593Smuzhiyun /* curr_network(mlme_priv/security_priv/qos/ht) + sta_info: (STA & AP) CAP/INFO */
416*4882a593Smuzhiyun /* scan_q: AP CAP/INFO */
417*4882a593Smuzhiyun
418*4882a593Smuzhiyun /* AP_Mode: */
419*4882a593Smuzhiyun /* curr_network(mlme_priv/security_priv/qos/ht) : AP CAP/INFO */
420*4882a593Smuzhiyun /* sta_info: (AP & STA) CAP/INFO */
421*4882a593Smuzhiyun
422*4882a593Smuzhiyun unsigned int expire_to;
423*4882a593Smuzhiyun
424*4882a593Smuzhiyun #ifdef CONFIG_AP_MODE
425*4882a593Smuzhiyun
426*4882a593Smuzhiyun _list asoc_list;
427*4882a593Smuzhiyun _list auth_list;
428*4882a593Smuzhiyun
429*4882a593Smuzhiyun unsigned int auth_seq;
430*4882a593Smuzhiyun unsigned int authalg;
431*4882a593Smuzhiyun unsigned char chg_txt[128];
432*4882a593Smuzhiyun
433*4882a593Smuzhiyun u16 capability;
434*4882a593Smuzhiyun int flags;
435*4882a593Smuzhiyun
436*4882a593Smuzhiyun int dot8021xalg;/* 0:disable, 1:psk, 2:802.1x */
437*4882a593Smuzhiyun int wpa_psk;/* 0:disable, bit(0): WPA, bit(1):WPA2 */
438*4882a593Smuzhiyun int wpa_group_cipher;
439*4882a593Smuzhiyun int wpa2_group_cipher;
440*4882a593Smuzhiyun int wpa_pairwise_cipher;
441*4882a593Smuzhiyun int wpa2_pairwise_cipher;
442*4882a593Smuzhiyun
443*4882a593Smuzhiyun u32 akm_suite_type;
444*4882a593Smuzhiyun
445*4882a593Smuzhiyun u8 bpairwise_key_installed;
446*4882a593Smuzhiyun #ifdef CONFIG_RTW_80211R
447*4882a593Smuzhiyun struct rtw_sta_ft_info_t ft_peer;
448*4882a593Smuzhiyun u8 ft_pairwise_key_installed;
449*4882a593Smuzhiyun #endif
450*4882a593Smuzhiyun
451*4882a593Smuzhiyun #ifdef CONFIG_NATIVEAP_MLME
452*4882a593Smuzhiyun u8 wpa_ie[32];
453*4882a593Smuzhiyun
454*4882a593Smuzhiyun u8 nonerp_set;
455*4882a593Smuzhiyun u8 no_short_slot_time_set;
456*4882a593Smuzhiyun u8 no_short_preamble_set;
457*4882a593Smuzhiyun u8 no_ht_gf_set;
458*4882a593Smuzhiyun u8 no_ht_set;
459*4882a593Smuzhiyun u8 ht_20mhz_set;
460*4882a593Smuzhiyun u8 ht_40mhz_intolerant;
461*4882a593Smuzhiyun #endif /* CONFIG_NATIVEAP_MLME */
462*4882a593Smuzhiyun
463*4882a593Smuzhiyun #ifdef CONFIG_ATMEL_RC_PATCH
464*4882a593Smuzhiyun u8 flag_atmel_rc;
465*4882a593Smuzhiyun #endif
466*4882a593Smuzhiyun
467*4882a593Smuzhiyun u8 qos_info;
468*4882a593Smuzhiyun
469*4882a593Smuzhiyun u8 max_sp_len;
470*4882a593Smuzhiyun u8 uapsd_bk;/* BIT(0): Delivery enabled, BIT(1): Trigger enabled */
471*4882a593Smuzhiyun u8 uapsd_be;
472*4882a593Smuzhiyun u8 uapsd_vi;
473*4882a593Smuzhiyun u8 uapsd_vo;
474*4882a593Smuzhiyun
475*4882a593Smuzhiyun u8 has_legacy_ac;
476*4882a593Smuzhiyun unsigned int sleepq_ac_len;
477*4882a593Smuzhiyun
478*4882a593Smuzhiyun #ifdef CONFIG_P2P
479*4882a593Smuzhiyun /* p2p priv data */
480*4882a593Smuzhiyun u8 is_p2p_device;
481*4882a593Smuzhiyun u8 p2p_status_code;
482*4882a593Smuzhiyun
483*4882a593Smuzhiyun /* p2p client info */
484*4882a593Smuzhiyun u8 dev_addr[ETH_ALEN];
485*4882a593Smuzhiyun /* u8 iface_addr[ETH_ALEN]; */ /* = hwaddr[ETH_ALEN] */
486*4882a593Smuzhiyun u8 dev_cap;
487*4882a593Smuzhiyun u16 config_methods;
488*4882a593Smuzhiyun u8 primary_dev_type[8];
489*4882a593Smuzhiyun u8 num_of_secdev_type;
490*4882a593Smuzhiyun u8 secdev_types_list[32];/* 32/8 == 4; */
491*4882a593Smuzhiyun u16 dev_name_len;
492*4882a593Smuzhiyun u8 dev_name[32];
493*4882a593Smuzhiyun #endif /* CONFIG_P2P */
494*4882a593Smuzhiyun
495*4882a593Smuzhiyun #ifdef CONFIG_WFD
496*4882a593Smuzhiyun u8 op_wfd_mode;
497*4882a593Smuzhiyun #endif
498*4882a593Smuzhiyun
499*4882a593Smuzhiyun #if !defined(CONFIG_ACTIVE_KEEP_ALIVE_CHECK) && defined(CONFIG_80211N_HT)
500*4882a593Smuzhiyun u8 under_exist_checking;
501*4882a593Smuzhiyun #endif
502*4882a593Smuzhiyun
503*4882a593Smuzhiyun u8 keep_alive_trycnt;
504*4882a593Smuzhiyun
505*4882a593Smuzhiyun #ifdef CONFIG_AUTO_AP_MODE
506*4882a593Smuzhiyun u8 isrc; /* this device is rc */
507*4882a593Smuzhiyun u16 pid; /* pairing id */
508*4882a593Smuzhiyun #endif
509*4882a593Smuzhiyun
510*4882a593Smuzhiyun #endif /* CONFIG_AP_MODE */
511*4882a593Smuzhiyun
512*4882a593Smuzhiyun #ifdef CONFIG_RTW_MESH
513*4882a593Smuzhiyun struct mesh_plink_ent *plink;
514*4882a593Smuzhiyun
515*4882a593Smuzhiyun u8 local_mps;
516*4882a593Smuzhiyun u8 peer_mps;
517*4882a593Smuzhiyun u8 nonpeer_mps;
518*4882a593Smuzhiyun
519*4882a593Smuzhiyun struct rtw_atlm_param metrics;
520*4882a593Smuzhiyun /* The reference for nexthop_lookup */
521*4882a593Smuzhiyun BOOLEAN alive;
522*4882a593Smuzhiyun #endif
523*4882a593Smuzhiyun
524*4882a593Smuzhiyun #ifdef CONFIG_IOCTL_CFG80211
525*4882a593Smuzhiyun u8 *pauth_frame;
526*4882a593Smuzhiyun u32 auth_len;
527*4882a593Smuzhiyun u8 *passoc_req;
528*4882a593Smuzhiyun u32 assoc_req_len;
529*4882a593Smuzhiyun #endif
530*4882a593Smuzhiyun
531*4882a593Smuzhiyun u8 IOTPeer; /* Enum value. HT_IOT_PEER_E */
532*4882a593Smuzhiyun #ifdef CONFIG_LPS_PG
533*4882a593Smuzhiyun u8 lps_pg_rssi_lv;
534*4882a593Smuzhiyun #endif
535*4882a593Smuzhiyun
536*4882a593Smuzhiyun /* To store the sequence number of received management frame */
537*4882a593Smuzhiyun u16 RxMgmtFrameSeqNum;
538*4882a593Smuzhiyun
539*4882a593Smuzhiyun struct st_ctl_t st_ctl;
540*4882a593Smuzhiyun u8 max_agg_num_minimal_record; /*keep minimal tx desc max_agg_num setting*/
541*4882a593Smuzhiyun u8 curr_rx_gi_ltf;
542*4882a593Smuzhiyun u16 curr_rx_rate;
543*4882a593Smuzhiyun u16 curr_rx_rate_bmc;
544*4882a593Smuzhiyun #ifdef CONFIG_RTS_FULL_BW
545*4882a593Smuzhiyun bool vendor_8812;
546*4882a593Smuzhiyun #endif
547*4882a593Smuzhiyun
548*4882a593Smuzhiyun #ifdef CONFIG_RTW_TOKEN_BASED_XMIT
549*4882a593Smuzhiyun u8 tbtx_enable; /* Does this sta_info support & enable TBTX function? */
550*4882a593Smuzhiyun // u8 tbtx_timeslot; /* This sta_info belong to which time slot. */
551*4882a593Smuzhiyun #endif
552*4882a593Smuzhiyun
553*4882a593Smuzhiyun /*
554*4882a593Smuzhiyun * Vaiables for queuing TX pkt a short period of time
555*4882a593Smuzhiyun * to wait something ready.
556*4882a593Smuzhiyun */
557*4882a593Smuzhiyun u8 tx_q_enable;
558*4882a593Smuzhiyun struct __queue tx_queue;
559*4882a593Smuzhiyun _workitem tx_q_work;
560*4882a593Smuzhiyun
561*4882a593Smuzhiyun #ifdef CONFIG_CORE_TXSC
562*4882a593Smuzhiyun u32 txsc_cache_hit;
563*4882a593Smuzhiyun u32 txsc_cache_miss;
564*4882a593Smuzhiyun u32 txsc_path_slow;
565*4882a593Smuzhiyun u32 txsc_path_ps;
566*4882a593Smuzhiyun u8 txsc_cur_idx; /* next entry to add */
567*4882a593Smuzhiyun u8 txsc_cache_idx; /* latest cache idx */
568*4882a593Smuzhiyun u8 txsc_cache_num; /* num of txsc entry */
569*4882a593Smuzhiyun struct txsc_entry txsc_entry_cache[CORE_TXSC_ENTRY_NUM];
570*4882a593Smuzhiyun u8 debug_buf[CORE_TXSC_DEBUG_BUF_SIZE];
571*4882a593Smuzhiyun #endif /* CONFIG_CORE_TXSC */
572*4882a593Smuzhiyun };
573*4882a593Smuzhiyun
574*4882a593Smuzhiyun #ifdef CONFIG_RTW_MESH
575*4882a593Smuzhiyun #define STA_SET_MESH_PLINK(sta, link) (sta)->plink = link
576*4882a593Smuzhiyun #else
577*4882a593Smuzhiyun #define STA_SET_MESH_PLINK(sta, link) do {} while (0)
578*4882a593Smuzhiyun #endif
579*4882a593Smuzhiyun
580*4882a593Smuzhiyun #define sta_tx_pkts(sta) \
581*4882a593Smuzhiyun (sta->sta_stats.tx_pkts)
582*4882a593Smuzhiyun
583*4882a593Smuzhiyun #define sta_last_tx_pkts(sta) \
584*4882a593Smuzhiyun (sta->sta_stats.last_tx_pkts)
585*4882a593Smuzhiyun
586*4882a593Smuzhiyun #define sta_rx_pkts(sta) \
587*4882a593Smuzhiyun (sta->sta_stats.rx_mgnt_pkts \
588*4882a593Smuzhiyun + sta->sta_stats.rx_ctrl_pkts \
589*4882a593Smuzhiyun + sta->sta_stats.rx_data_pkts)
590*4882a593Smuzhiyun
591*4882a593Smuzhiyun #define sta_last_rx_pkts(sta) \
592*4882a593Smuzhiyun (sta->sta_stats.last_rx_mgnt_pkts \
593*4882a593Smuzhiyun + sta->sta_stats.last_rx_ctrl_pkts \
594*4882a593Smuzhiyun + sta->sta_stats.last_rx_data_pkts)
595*4882a593Smuzhiyun
596*4882a593Smuzhiyun #define sta_rx_data_pkts(sta) (sta->sta_stats.rx_data_pkts)
597*4882a593Smuzhiyun #define sta_last_rx_data_pkts(sta) (sta->sta_stats.last_rx_data_pkts)
598*4882a593Smuzhiyun
599*4882a593Smuzhiyun #define sta_rx_data_uc_pkts(sta) (sta->sta_stats.rx_data_pkts - sta->sta_stats.rx_data_bc_pkts - sta->sta_stats.rx_data_mc_pkts)
600*4882a593Smuzhiyun #define sta_last_rx_data_uc_pkts(sta) (sta->sta_stats.last_rx_data_pkts - sta->sta_stats.last_rx_data_bc_pkts - sta->sta_stats.last_rx_data_mc_pkts)
601*4882a593Smuzhiyun
602*4882a593Smuzhiyun #define sta_rx_data_qos_pkts(sta, i) \
603*4882a593Smuzhiyun (sta->sta_stats.rx_data_qos_pkts[i])
604*4882a593Smuzhiyun
605*4882a593Smuzhiyun #define sta_last_rx_data_qos_pkts(sta, i) \
606*4882a593Smuzhiyun (sta->sta_stats.last_rx_data_qos_pkts[i])
607*4882a593Smuzhiyun
608*4882a593Smuzhiyun #define sta_rx_mgnt_pkts(sta) \
609*4882a593Smuzhiyun (sta->sta_stats.rx_mgnt_pkts)
610*4882a593Smuzhiyun
611*4882a593Smuzhiyun #define sta_last_rx_mgnt_pkts(sta) \
612*4882a593Smuzhiyun (sta->sta_stats.last_rx_mgnt_pkts)
613*4882a593Smuzhiyun
614*4882a593Smuzhiyun #define sta_rx_beacon_pkts(sta) \
615*4882a593Smuzhiyun (sta->sta_stats.rx_beacon_pkts)
616*4882a593Smuzhiyun
617*4882a593Smuzhiyun #define sta_last_rx_beacon_pkts(sta) \
618*4882a593Smuzhiyun (sta->sta_stats.last_rx_beacon_pkts)
619*4882a593Smuzhiyun
620*4882a593Smuzhiyun #define sta_rx_probereq_pkts(sta) \
621*4882a593Smuzhiyun (sta->sta_stats.rx_probereq_pkts)
622*4882a593Smuzhiyun
623*4882a593Smuzhiyun #define sta_last_rx_probereq_pkts(sta) \
624*4882a593Smuzhiyun (sta->sta_stats.last_rx_probereq_pkts)
625*4882a593Smuzhiyun
626*4882a593Smuzhiyun #define sta_rx_probersp_pkts(sta) \
627*4882a593Smuzhiyun (sta->sta_stats.rx_probersp_pkts)
628*4882a593Smuzhiyun
629*4882a593Smuzhiyun #define sta_last_rx_probersp_pkts(sta) \
630*4882a593Smuzhiyun (sta->sta_stats.last_rx_probersp_pkts)
631*4882a593Smuzhiyun
632*4882a593Smuzhiyun #define sta_rx_probersp_bm_pkts(sta) \
633*4882a593Smuzhiyun (sta->sta_stats.rx_probersp_bm_pkts)
634*4882a593Smuzhiyun
635*4882a593Smuzhiyun #define sta_last_rx_probersp_bm_pkts(sta) \
636*4882a593Smuzhiyun (sta->sta_stats.last_rx_probersp_bm_pkts)
637*4882a593Smuzhiyun
638*4882a593Smuzhiyun #define sta_rx_probersp_uo_pkts(sta) \
639*4882a593Smuzhiyun (sta->sta_stats.rx_probersp_uo_pkts)
640*4882a593Smuzhiyun
641*4882a593Smuzhiyun #define sta_last_rx_probersp_uo_pkts(sta) \
642*4882a593Smuzhiyun (sta->sta_stats.last_rx_probersp_uo_pkts)
643*4882a593Smuzhiyun
644*4882a593Smuzhiyun #ifdef CONFIG_RTW_MESH
645*4882a593Smuzhiyun #define update_last_rx_hwmp_pkts(sta) \
646*4882a593Smuzhiyun do { \
647*4882a593Smuzhiyun sta->sta_stats.last_rx_hwmp_pkts = sta->sta_stats.rx_hwmp_pkts; \
648*4882a593Smuzhiyun } while(0)
649*4882a593Smuzhiyun #else
650*4882a593Smuzhiyun #define update_last_rx_hwmp_pkts(sta) do {} while(0)
651*4882a593Smuzhiyun #endif
652*4882a593Smuzhiyun
653*4882a593Smuzhiyun #define sta_update_last_rx_pkts(sta) \
654*4882a593Smuzhiyun do { \
655*4882a593Smuzhiyun int __i; \
656*4882a593Smuzhiyun \
657*4882a593Smuzhiyun sta->sta_stats.last_rx_mgnt_pkts = sta->sta_stats.rx_mgnt_pkts; \
658*4882a593Smuzhiyun sta->sta_stats.last_rx_beacon_pkts = sta->sta_stats.rx_beacon_pkts; \
659*4882a593Smuzhiyun sta->sta_stats.last_rx_probereq_pkts = sta->sta_stats.rx_probereq_pkts; \
660*4882a593Smuzhiyun sta->sta_stats.last_rx_probersp_pkts = sta->sta_stats.rx_probersp_pkts; \
661*4882a593Smuzhiyun sta->sta_stats.last_rx_probersp_bm_pkts = sta->sta_stats.rx_probersp_bm_pkts; \
662*4882a593Smuzhiyun sta->sta_stats.last_rx_probersp_uo_pkts = sta->sta_stats.rx_probersp_uo_pkts; \
663*4882a593Smuzhiyun sta->sta_stats.last_rx_ctrl_pkts = sta->sta_stats.rx_ctrl_pkts; \
664*4882a593Smuzhiyun update_last_rx_hwmp_pkts(sta); \
665*4882a593Smuzhiyun \
666*4882a593Smuzhiyun sta->sta_stats.last_rx_data_pkts = sta->sta_stats.rx_data_pkts; \
667*4882a593Smuzhiyun sta->sta_stats.last_rx_data_bc_pkts = sta->sta_stats.rx_data_bc_pkts; \
668*4882a593Smuzhiyun sta->sta_stats.last_rx_data_mc_pkts = sta->sta_stats.rx_data_mc_pkts; \
669*4882a593Smuzhiyun for (__i = 0; __i < TID_NUM; __i++) \
670*4882a593Smuzhiyun sta->sta_stats.last_rx_data_qos_pkts[__i] = sta->sta_stats.rx_data_qos_pkts[__i]; \
671*4882a593Smuzhiyun } while (0)
672*4882a593Smuzhiyun
673*4882a593Smuzhiyun #define STA_RX_PKTS_ARG(sta) \
674*4882a593Smuzhiyun sta->sta_stats.rx_mgnt_pkts \
675*4882a593Smuzhiyun , sta->sta_stats.rx_ctrl_pkts \
676*4882a593Smuzhiyun , sta->sta_stats.rx_data_pkts
677*4882a593Smuzhiyun
678*4882a593Smuzhiyun #define STA_LAST_RX_PKTS_ARG(sta) \
679*4882a593Smuzhiyun sta->sta_stats.last_rx_mgnt_pkts \
680*4882a593Smuzhiyun , sta->sta_stats.last_rx_ctrl_pkts \
681*4882a593Smuzhiyun , sta->sta_stats.last_rx_data_pkts
682*4882a593Smuzhiyun
683*4882a593Smuzhiyun #define STA_RX_PKTS_DIFF_ARG(sta) \
684*4882a593Smuzhiyun sta->sta_stats.rx_mgnt_pkts - sta->sta_stats.last_rx_mgnt_pkts \
685*4882a593Smuzhiyun , sta->sta_stats.rx_ctrl_pkts - sta->sta_stats.last_rx_ctrl_pkts \
686*4882a593Smuzhiyun , sta->sta_stats.rx_data_pkts - sta->sta_stats.last_rx_data_pkts
687*4882a593Smuzhiyun
688*4882a593Smuzhiyun #define STA_PKTS_FMT "(m:%llu, c:%llu, d:%llu)"
689*4882a593Smuzhiyun
690*4882a593Smuzhiyun #define sta_rx_uc_bytes(sta) (sta->sta_stats.rx_bytes - sta->sta_stats.rx_bc_bytes - sta->sta_stats.rx_mc_bytes)
691*4882a593Smuzhiyun #define sta_last_rx_uc_bytes(sta) (sta->sta_stats.last_rx_bytes - sta->sta_stats.last_rx_bc_bytes - sta->sta_stats.last_rx_mc_bytes)
692*4882a593Smuzhiyun
693*4882a593Smuzhiyun #ifdef CONFIG_WFD
694*4882a593Smuzhiyun #define STA_OP_WFD_MODE(sta) (sta)->op_wfd_mode
695*4882a593Smuzhiyun #define STA_SET_OP_WFD_MODE(sta, mode) (sta)->op_wfd_mode = (mode)
696*4882a593Smuzhiyun #else
697*4882a593Smuzhiyun #define STA_OP_WFD_MODE(sta) 0
698*4882a593Smuzhiyun #define STA_SET_OP_WFD_MODE(sta, mode) do {} while (0)
699*4882a593Smuzhiyun #endif
700*4882a593Smuzhiyun
701*4882a593Smuzhiyun #define AID_BMP_LEN(max_aid) ((max_aid + 1) / 8 + (((max_aid + 1) % 8) ? 1 : 0))
702*4882a593Smuzhiyun
703*4882a593Smuzhiyun struct sta_priv {
704*4882a593Smuzhiyun
705*4882a593Smuzhiyun u8 *pallocated_stainfo_buf;
706*4882a593Smuzhiyun u8 *pstainfo_buf;
707*4882a593Smuzhiyun _queue free_sta_queue;
708*4882a593Smuzhiyun
709*4882a593Smuzhiyun _lock sta_hash_lock;
710*4882a593Smuzhiyun _list sta_hash[NUM_STA];
711*4882a593Smuzhiyun int asoc_sta_count;
712*4882a593Smuzhiyun _queue sleep_q;
713*4882a593Smuzhiyun _queue wakeup_q;
714*4882a593Smuzhiyun
715*4882a593Smuzhiyun _adapter *padapter;
716*4882a593Smuzhiyun
717*4882a593Smuzhiyun u32 adhoc_expire_to;
718*4882a593Smuzhiyun
719*4882a593Smuzhiyun int rx_chk_limit;
720*4882a593Smuzhiyun
721*4882a593Smuzhiyun #ifdef CONFIG_AP_MODE
722*4882a593Smuzhiyun _list asoc_list;
723*4882a593Smuzhiyun _list auth_list;
724*4882a593Smuzhiyun _lock asoc_list_lock;
725*4882a593Smuzhiyun _lock auth_list_lock;
726*4882a593Smuzhiyun u8 asoc_list_cnt;
727*4882a593Smuzhiyun u8 auth_list_cnt;
728*4882a593Smuzhiyun
729*4882a593Smuzhiyun unsigned int auth_to; /* sec, time to expire in authenticating. */
730*4882a593Smuzhiyun unsigned int assoc_to; /* sec, time to expire before associating. */
731*4882a593Smuzhiyun unsigned int expire_to; /* sec , time to expire after associated. */
732*4882a593Smuzhiyun
733*4882a593Smuzhiyun /*
734*4882a593Smuzhiyun * pointers to STA info; based on allocated AID or NULL if AID free
735*4882a593Smuzhiyun * AID is in the range 1-2007, so sta_aid[0] corresponders to AID 1
736*4882a593Smuzhiyun */
737*4882a593Smuzhiyun struct sta_info **sta_aid;
738*4882a593Smuzhiyun u16 max_aid;
739*4882a593Smuzhiyun u16 started_aid; /* started AID for allocation search */
740*4882a593Smuzhiyun bool rr_aid; /* round robin AID allocation, will modify started_aid */
741*4882a593Smuzhiyun u8 aid_bmp_len; /* in byte */
742*4882a593Smuzhiyun u8 *sta_dz_bitmap;
743*4882a593Smuzhiyun u8 *tim_bitmap;
744*4882a593Smuzhiyun
745*4882a593Smuzhiyun u16 max_num_sta;
746*4882a593Smuzhiyun
747*4882a593Smuzhiyun #if CONFIG_RTW_MACADDR_ACL
748*4882a593Smuzhiyun struct wlan_acl_pool acl_list[RTW_ACL_PERIOD_NUM];
749*4882a593Smuzhiyun #endif
750*4882a593Smuzhiyun
751*4882a593Smuzhiyun #if CONFIG_RTW_PRE_LINK_STA
752*4882a593Smuzhiyun struct pre_link_sta_ctl_t pre_link_sta_ctl;
753*4882a593Smuzhiyun #endif
754*4882a593Smuzhiyun #ifdef CONFIG_RTW_TOKEN_BASED_XMIT
755*4882a593Smuzhiyun u8 tbtx_asoc_list_cnt;
756*4882a593Smuzhiyun struct sta_info *token_holder[NR_MAXSTA_INSLOT];
757*4882a593Smuzhiyun struct sta_info *last_token_holder;
758*4882a593Smuzhiyun ATOMIC_T nr_token_keeper;
759*4882a593Smuzhiyun #endif
760*4882a593Smuzhiyun #endif /* CONFIG_AP_MODE */
761*4882a593Smuzhiyun
762*4882a593Smuzhiyun #ifdef CONFIG_ATMEL_RC_PATCH
763*4882a593Smuzhiyun u8 atmel_rc_pattern[6];
764*4882a593Smuzhiyun #endif
765*4882a593Smuzhiyun u8 c2h_sta_mac[ETH_ALEN];
766*4882a593Smuzhiyun u8 c2h_adapter_id;
767*4882a593Smuzhiyun struct submit_ctx *gotc2h;
768*4882a593Smuzhiyun };
769*4882a593Smuzhiyun
770*4882a593Smuzhiyun
wifi_mac_hash(const u8 * mac)771*4882a593Smuzhiyun __inline static u32 wifi_mac_hash(const u8 *mac)
772*4882a593Smuzhiyun {
773*4882a593Smuzhiyun u32 x;
774*4882a593Smuzhiyun
775*4882a593Smuzhiyun x = mac[0];
776*4882a593Smuzhiyun x = (x << 2) ^ mac[1];
777*4882a593Smuzhiyun x = (x << 2) ^ mac[2];
778*4882a593Smuzhiyun x = (x << 2) ^ mac[3];
779*4882a593Smuzhiyun x = (x << 2) ^ mac[4];
780*4882a593Smuzhiyun x = (x << 2) ^ mac[5];
781*4882a593Smuzhiyun
782*4882a593Smuzhiyun x ^= x >> 8;
783*4882a593Smuzhiyun x = x & (NUM_STA - 1);
784*4882a593Smuzhiyun
785*4882a593Smuzhiyun return x;
786*4882a593Smuzhiyun }
787*4882a593Smuzhiyun
788*4882a593Smuzhiyun
789*4882a593Smuzhiyun extern u32 _rtw_init_sta_priv(struct sta_priv *pstapriv);
790*4882a593Smuzhiyun extern u32 _rtw_free_sta_priv(struct sta_priv *pstapriv);
791*4882a593Smuzhiyun
792*4882a593Smuzhiyun #define stainfo_offset_valid(offset) (offset < NUM_STA && offset >= 0)
793*4882a593Smuzhiyun int rtw_stainfo_offset(struct sta_priv *stapriv, struct sta_info *sta);
794*4882a593Smuzhiyun struct sta_info *rtw_get_stainfo_by_offset(struct sta_priv *stapriv, int offset);
795*4882a593Smuzhiyun
796*4882a593Smuzhiyun extern struct sta_info *rtw_alloc_stainfo(struct sta_priv *pstapriv, const u8 *hwaddr);
797*4882a593Smuzhiyun
798*4882a593Smuzhiyun extern struct sta_info *rtw_alloc_stainfo_sw(struct sta_priv *stapriv, const u8 *hwaddr);
799*4882a593Smuzhiyun extern u32 rtw_alloc_stainfo_hw(struct sta_priv *stapriv, struct sta_info *psta);
800*4882a593Smuzhiyun
801*4882a593Smuzhiyun extern u32 rtw_free_stainfo(_adapter *padapter , struct sta_info *psta);
802*4882a593Smuzhiyun u32 rtw_free_stainfo_sw(_adapter *padapter, struct sta_info *psta);
803*4882a593Smuzhiyun extern void rtw_free_all_stainfo(_adapter *padapter);
804*4882a593Smuzhiyun extern struct sta_info *rtw_get_stainfo(struct sta_priv *pstapriv, const u8 *hwaddr);
805*4882a593Smuzhiyun extern struct sta_info *rtw_get_bcmc_stainfo(_adapter *padapter);
806*4882a593Smuzhiyun
807*4882a593Smuzhiyun u32 rtw_free_self_stainfo(_adapter *adapter);
808*4882a593Smuzhiyun u32 rtw_init_self_stainfo(_adapter *adapter);
809*4882a593Smuzhiyun
810*4882a593Smuzhiyun #ifdef CONFIG_AP_MODE
811*4882a593Smuzhiyun u16 rtw_aid_alloc(_adapter *adapter, struct sta_info *sta);
812*4882a593Smuzhiyun void dump_aid_status(void *sel, _adapter *adapter);
813*4882a593Smuzhiyun #endif
814*4882a593Smuzhiyun
815*4882a593Smuzhiyun #if CONFIG_RTW_MACADDR_ACL
816*4882a593Smuzhiyun extern u8 rtw_access_ctrl(_adapter *adapter, const u8 *mac_addr);
817*4882a593Smuzhiyun void dump_macaddr_acl(void *sel, _adapter *adapter);
818*4882a593Smuzhiyun #endif
819*4882a593Smuzhiyun
820*4882a593Smuzhiyun #if CONFIG_RTW_PRE_LINK_STA
821*4882a593Smuzhiyun bool rtw_is_pre_link_sta(struct sta_priv *stapriv, u8 *addr);
822*4882a593Smuzhiyun struct sta_info *rtw_pre_link_sta_add(struct sta_priv *stapriv, u8 *hwaddr);
823*4882a593Smuzhiyun void rtw_pre_link_sta_del(struct sta_priv *stapriv, u8 *hwaddr);
824*4882a593Smuzhiyun void rtw_pre_link_sta_ctl_reset(struct sta_priv *stapriv);
825*4882a593Smuzhiyun void rtw_pre_link_sta_ctl_init(struct sta_priv *stapriv);
826*4882a593Smuzhiyun void rtw_pre_link_sta_ctl_deinit(struct sta_priv *stapriv);
827*4882a593Smuzhiyun void dump_pre_link_sta_ctl(void *sel, struct sta_priv *stapriv);
828*4882a593Smuzhiyun #endif /* CONFIG_RTW_PRE_LINK_STA */
829*4882a593Smuzhiyun
830*4882a593Smuzhiyun #endif /* _STA_INFO_H_ */
831