xref: /OK3568_Linux_fs/external/rkwifibt/drivers/rtl8852be/include/autoconf.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /******************************************************************************
2*4882a593Smuzhiyun  *
3*4882a593Smuzhiyun  * Copyright(c) 2007 - 2019 Realtek Corporation.
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * This program is free software; you can redistribute it and/or modify it
6*4882a593Smuzhiyun  * under the terms of version 2 of the GNU General Public License as
7*4882a593Smuzhiyun  * published by the Free Software Foundation.
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  * This program is distributed in the hope that it will be useful, but WITHOUT
10*4882a593Smuzhiyun  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11*4882a593Smuzhiyun  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12*4882a593Smuzhiyun  * more details.
13*4882a593Smuzhiyun  *
14*4882a593Smuzhiyun  *****************************************************************************/
15*4882a593Smuzhiyun /***** temporarily flag for IC development phase *******/
16*4882a593Smuzhiyun #define CONFIG_SINGLE_IMG
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun /*#define CONFIG_NO_FW*/
19*4882a593Smuzhiyun /*#define CONFIG_DISABLE_ODM*/
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun #define RTW_WKARD_CORE_RSSI_V1
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun #ifdef RTW_WKARD_CORE_RSSI_V1
24*4882a593Smuzhiyun #define CONFIG_RX_PSTS_PER_PKT
25*4882a593Smuzhiyun #define CONFIG_SIGNAL_STAT_PROCESS
26*4882a593Smuzhiyun #endif
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun #ifndef DBG_MEM_ALLOC
29*4882a593Smuzhiyun #define DBG_MEM_ALLOC
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun #define DBG_PHL_MEM_ALLOC
32*4882a593Smuzhiyun #define DBG_HAL_MAC_MEM_MOINTOR
33*4882a593Smuzhiyun #define DBG_HAL_MEM_MOINTOR
34*4882a593Smuzhiyun #endif
35*4882a593Smuzhiyun /*#define CONFIG_PHL_USE_KMEM_ALLOC*/
36*4882a593Smuzhiyun #define CONFIG_HW_RTS
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun /*
39*4882a593Smuzhiyun  * Work around Config
40*4882a593Smuzhiyun  */
41*4882a593Smuzhiyun #define RTW_WKARD_DIS_PROBE_REQ_RPT_TO_HOSTAPD
42*4882a593Smuzhiyun 
43*4882a593Smuzhiyun /***** temporarily flag *******/
44*4882a593Smuzhiyun /*
45*4882a593Smuzhiyun  * Public  General Config
46*4882a593Smuzhiyun  */
47*4882a593Smuzhiyun #define AUTOCONF_INCLUDED
48*4882a593Smuzhiyun #define DRV_NAME "rtl8852be"
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun #define CONFIG_PCI_HCI
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun #define CONFIG_PCIE_TRX_MIT
53*4882a593Smuzhiyun #ifdef CONFIG_PCIE_TRX_MIT
54*4882a593Smuzhiyun 	#define PCIE_RX_INT_MIT_TIMER 4096
55*4882a593Smuzhiyun 	/*#define CONFIG_PCIE_TRX_MIT_FIX*/ /*  if defined, the mitigation mode will be set to fixed */
56*4882a593Smuzhiyun 	#ifndef CONFIG_PCIE_TRX_MIT_FIX
57*4882a593Smuzhiyun 	#define CONFIG_PCIE_TRX_MIT_DYN
58*4882a593Smuzhiyun 	#endif
59*4882a593Smuzhiyun #endif
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun #define CONFIG_RPQ_AGG_NUM 30
62*4882a593Smuzhiyun 
63*4882a593Smuzhiyun /*
64*4882a593Smuzhiyun  * Wi-Fi Functions Config
65*4882a593Smuzhiyun  */
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun /*#define CONFIG_RECV_REORDERING_CTRL*/
68*4882a593Smuzhiyun 
69*4882a593Smuzhiyun #define CONFIG_80211N_HT
70*4882a593Smuzhiyun #define CONFIG_80211AC_VHT
71*4882a593Smuzhiyun #define CONFIG_80211AX_HE
72*4882a593Smuzhiyun #ifdef CONFIG_80211AC_VHT
73*4882a593Smuzhiyun 	#ifndef CONFIG_80211N_HT
74*4882a593Smuzhiyun 		#define CONFIG_80211N_HT
75*4882a593Smuzhiyun 	#endif
76*4882a593Smuzhiyun #endif
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun #ifdef CONFIG_80211AX_HE
79*4882a593Smuzhiyun 	#ifndef CONFIG_80211N_HT
80*4882a593Smuzhiyun 		#define CONFIG_80211N_HT
81*4882a593Smuzhiyun 	#endif
82*4882a593Smuzhiyun 	#ifndef CONFIG_80211AC_VHT
83*4882a593Smuzhiyun 		#define CONFIG_80211AC_VHT
84*4882a593Smuzhiyun 	#endif
85*4882a593Smuzhiyun #endif
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun #define CONFIG_BEAMFORMING
88*4882a593Smuzhiyun #ifdef CONFIG_BEAMFORMING
89*4882a593Smuzhiyun /*#define RTW_WKARD_TX_DISABLE_BFEE*/
90*4882a593Smuzhiyun #endif
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun /*#define CONFIG_IOCTL_CFG80211*/
93*4882a593Smuzhiyun #ifdef CONFIG_IOCTL_CFG80211
94*4882a593Smuzhiyun 	/*#define RTW_USE_CFG80211_STA_EVENT*/ /* Indecate new sta asoc through cfg80211_new_sta */
95*4882a593Smuzhiyun 	#define CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER
96*4882a593Smuzhiyun 	/*#define CONFIG_DEBUG_CFG80211*/
97*4882a593Smuzhiyun 	#define CONFIG_SET_SCAN_DENY_TIMER
98*4882a593Smuzhiyun #endif
99*4882a593Smuzhiyun #define CONFIG_TX_AMSDU
100*4882a593Smuzhiyun #ifdef CONFIG_TX_AMSDU
101*4882a593Smuzhiyun 	#ifdef CONFIG_PLATFORM_RTL8198D
102*4882a593Smuzhiyun 	#define CONFIG_TX_AMSDU_HW_MODE	1
103*4882a593Smuzhiyun 	#else
104*4882a593Smuzhiyun 	#define CONFIG_TX_AMSDU_SW_MODE	1
105*4882a593Smuzhiyun 	#endif
106*4882a593Smuzhiyun #endif
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun /*
109*4882a593Smuzhiyun  * Internal  General Config
110*4882a593Smuzhiyun  */
111*4882a593Smuzhiyun /*#define CONFIG_PWRCTRL*/
112*4882a593Smuzhiyun #define CONFIG_TRX_BD_ARCH	/* PCI only */
113*4882a593Smuzhiyun #define USING_RX_TAG
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun #define CONFIG_EMBEDDED_FWIMG
116*4882a593Smuzhiyun 
117*4882a593Smuzhiyun #ifdef CONFIG_EMBEDDED_FWIMG
118*4882a593Smuzhiyun 	#define	LOAD_FW_HEADER_FROM_DRIVER
119*4882a593Smuzhiyun #endif
120*4882a593Smuzhiyun /*#define CONFIG_FILE_FWIMG*/
121*4882a593Smuzhiyun 
122*4882a593Smuzhiyun /* #define CONFIG_XMIT_ACK */
123*4882a593Smuzhiyun #ifdef CONFIG_XMIT_ACK
124*4882a593Smuzhiyun 	#define CONFIG_ACTIVE_KEEP_ALIVE_CHECK
125*4882a593Smuzhiyun #endif
126*4882a593Smuzhiyun 
127*4882a593Smuzhiyun #define BUF_DESC_ARCH		/* if defined, hardware follows Rx buffer descriptor architecture */
128*4882a593Smuzhiyun 
129*4882a593Smuzhiyun #ifdef CONFIG_POWER_SAVING
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun 	#define CONFIG_IPS
132*4882a593Smuzhiyun 	#ifdef CONFIG_IPS
133*4882a593Smuzhiyun 	#endif
134*4882a593Smuzhiyun 
135*4882a593Smuzhiyun 	#define CONFIG_LPS
136*4882a593Smuzhiyun 
137*4882a593Smuzhiyun 	#if defined(CONFIG_LPS)
138*4882a593Smuzhiyun 		/*#define CONFIG_LPS_LCLK*/ /* 32K */
139*4882a593Smuzhiyun 	#endif
140*4882a593Smuzhiyun 
141*4882a593Smuzhiyun 	#ifdef CONFIG_LPS_LCLK
142*4882a593Smuzhiyun 		#define CONFIG_XMIT_THREAD_MODE
143*4882a593Smuzhiyun 		#define LPS_RPWM_WAIT_MS 300
144*4882a593Smuzhiyun 	#endif
145*4882a593Smuzhiyun #endif
146*4882a593Smuzhiyun 
147*4882a593Smuzhiyun #ifdef CONFIG_POWER_SAVE
148*4882a593Smuzhiyun 	/* #define CONFIG_RTW_IPS */
149*4882a593Smuzhiyun 	/* #define CONFIG_RTW_LPS */
150*4882a593Smuzhiyun 
151*4882a593Smuzhiyun 	#ifdef CONFIG_RTW_LPS
152*4882a593Smuzhiyun 		#define CONFIG_RTW_LPS_RFOFF
153*4882a593Smuzhiyun 	#endif
154*4882a593Smuzhiyun 
155*4882a593Smuzhiyun 	#if defined(CONFIG_RTW_IPS) || defined(CONFIG_RTW_LPS)
156*4882a593Smuzhiyun 		#define CONFIG_PS_FW_DBG
157*4882a593Smuzhiyun 	#endif
158*4882a593Smuzhiyun #endif
159*4882a593Smuzhiyun 
160*4882a593Smuzhiyun 	/*#define CONFIG_ANTENNA_DIVERSITY*/
161*4882a593Smuzhiyun 
162*4882a593Smuzhiyun 
163*4882a593Smuzhiyun /*#define CONFIG_PCI_ASPM*/
164*4882a593Smuzhiyun #ifdef CONFIG_PCI_ASPM
165*4882a593Smuzhiyun #define CONFIG_PCI_DYNAMIC_ASPM
166*4882a593Smuzhiyun #endif
167*4882a593Smuzhiyun 
168*4882a593Smuzhiyun #define CONFIG_AP_MODE
169*4882a593Smuzhiyun #ifdef CONFIG_AP_MODE
170*4882a593Smuzhiyun 	#define CONFIG_NATIVEAP_MLME
171*4882a593Smuzhiyun 	#ifndef CONFIG_NATIVEAP_MLME
172*4882a593Smuzhiyun 		#define CONFIG_HOSTAPD_MLME
173*4882a593Smuzhiyun 	#endif
174*4882a593Smuzhiyun 	/*#define CONFIG_FIND_BEST_CHANNEL*/
175*4882a593Smuzhiyun 	/*#define CONFIG_AUTO_AP_MODE*/
176*4882a593Smuzhiyun #endif
177*4882a593Smuzhiyun 
178*4882a593Smuzhiyun #define CONFIG_P2P
179*4882a593Smuzhiyun #ifdef CONFIG_P2P
180*4882a593Smuzhiyun 	/* The CONFIG_WFD is for supporting the Wi-Fi display */
181*4882a593Smuzhiyun 	#define CONFIG_WFD
182*4882a593Smuzhiyun 
183*4882a593Smuzhiyun 	#define CONFIG_P2P_REMOVE_GROUP_INFO
184*4882a593Smuzhiyun 
185*4882a593Smuzhiyun 	/*#define CONFIG_DBG_P2P*/
186*4882a593Smuzhiyun 
187*4882a593Smuzhiyun 	#define CONFIG_P2P_PS
188*4882a593Smuzhiyun 	/*#define CONFIG_P2P_IPS*/
189*4882a593Smuzhiyun 	#define CONFIG_P2P_OP_CHK_SOCIAL_CH
190*4882a593Smuzhiyun 	#define CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT  /* replace CONFIG_P2P_CHK_INVITE_CH_LIST flag */
191*4882a593Smuzhiyun 	/*#define CONFIG_P2P_INVITE_IOT*/
192*4882a593Smuzhiyun #endif
193*4882a593Smuzhiyun 
194*4882a593Smuzhiyun /* Added by Kurt 20110511 */
195*4882a593Smuzhiyun #ifdef CONFIG_TDLS
196*4882a593Smuzhiyun 	#define CONFIG_TDLS_DRIVER_SETUP
197*4882a593Smuzhiyun #if 0
198*4882a593Smuzhiyun 	#ifndef CONFIG_WFD
199*4882a593Smuzhiyun 		#define CONFIG_WFD
200*4882a593Smuzhiyun 	#endif
201*4882a593Smuzhiyun 	#define CONFIG_TDLS_AUTOSETUP
202*4882a593Smuzhiyun #endif
203*4882a593Smuzhiyun 	#define CONFIG_TDLS_AUTOCHECKALIVE
204*4882a593Smuzhiyun 	/* #define CONFIG_TDLS_CH_SW */	/* Enable this flag only when we confirm that TDLS CH SW is supported in FW */
205*4882a593Smuzhiyun #endif
206*4882a593Smuzhiyun 
207*4882a593Smuzhiyun #define CONFIG_SKB_COPY	/* for amsdu */
208*4882a593Smuzhiyun 
209*4882a593Smuzhiyun /*#define CONFIG_RTW_LED*/
210*4882a593Smuzhiyun #ifdef CONFIG_RTW_LED
211*4882a593Smuzhiyun 	/*#define CONFIG_RTW_SW_LED*/
212*4882a593Smuzhiyun 	#ifdef CONFIG_RTW_SW_LED
213*4882a593Smuzhiyun 		/*#define CONFIG_RTW_LED_HANDLED_BY_CMD_THREAD*/
214*4882a593Smuzhiyun 	#endif
215*4882a593Smuzhiyun #endif /* CONFIG_RTW_LED */
216*4882a593Smuzhiyun 
217*4882a593Smuzhiyun #define CONFIG_GLOBAL_UI_PID
218*4882a593Smuzhiyun 
219*4882a593Smuzhiyun /*#define CONFIG_ADAPTOR_INFO_CACHING_FILE*/ /* now just applied on 8192cu only, should make it general...*/
220*4882a593Smuzhiyun /*#define CONFIG_RESUME_IN_WORKQUEUE*/
221*4882a593Smuzhiyun /*#define CONFIG_SET_SCAN_DENY_TIMER*/
222*4882a593Smuzhiyun #define CONFIG_LONG_DELAY_ISSUE
223*4882a593Smuzhiyun /*#define CONFIG_SIGNAL_DISPLAY_DBM*/ /* display RX signal with dbm */
224*4882a593Smuzhiyun #ifdef CONFIG_SIGNAL_DISPLAY_DBM
225*4882a593Smuzhiyun /*#define CONFIG_BACKGROUND_NOISE_MONITOR*/
226*4882a593Smuzhiyun #endif
227*4882a593Smuzhiyun 
228*4882a593Smuzhiyun 
229*4882a593Smuzhiyun /*
230*4882a593Smuzhiyun  * Software feature Related Config
231*4882a593Smuzhiyun  */
232*4882a593Smuzhiyun 
233*4882a593Smuzhiyun #define CONFIG_SCAN_BACKOP_STA
234*4882a593Smuzhiyun #define CONFIG_RTW_REDUCE_MEM
235*4882a593Smuzhiyun 
236*4882a593Smuzhiyun /*
237*4882a593Smuzhiyun  * Interface  Related Config
238*4882a593Smuzhiyun  */
239*4882a593Smuzhiyun 
240*4882a593Smuzhiyun /* #define CONFIG_RTW_FORCE_PCI_MSI_DISABLE */
241*4882a593Smuzhiyun 
242*4882a593Smuzhiyun /*
243*4882a593Smuzhiyun  * HAL  Related Config
244*4882a593Smuzhiyun  */
245*4882a593Smuzhiyun #define CONFIG_RX_PACKET_APPEND_FCS
246*4882a593Smuzhiyun 
247*4882a593Smuzhiyun 
248*4882a593Smuzhiyun #define DISABLE_BB_RF	0
249*4882a593Smuzhiyun 
250*4882a593Smuzhiyun #ifdef CONFIG_MP_INCLUDED
251*4882a593Smuzhiyun 	#define MP_DRIVER 1
252*4882a593Smuzhiyun #else
253*4882a593Smuzhiyun 	#define MP_DRIVER 0
254*4882a593Smuzhiyun #endif
255*4882a593Smuzhiyun 
256*4882a593Smuzhiyun #ifndef EFUSE_MAP_PATH
257*4882a593Smuzhiyun 	#define EFUSE_MAP_PATH "/system/etc/wifi/wifi_efuse.map"
258*4882a593Smuzhiyun #endif
259*4882a593Smuzhiyun #ifndef WIFIMAC_PATH
260*4882a593Smuzhiyun 	#define WIFIMAC_PATH "/data/wifimac.txt"
261*4882a593Smuzhiyun #endif
262*4882a593Smuzhiyun 
263*4882a593Smuzhiyun /* Use cmd frame to issue beacon. Use a fixed buffer for beacon. */
264*4882a593Smuzhiyun #define CONFIG_BCN_ICF
265*4882a593Smuzhiyun 
266*4882a593Smuzhiyun #ifdef CONFIG_HWSIM
267*4882a593Smuzhiyun /* Use pure sw beacon */
268*4882a593Smuzhiyun #undef CONFIG_BCN_ICF
269*4882a593Smuzhiyun #endif
270*4882a593Smuzhiyun 
271*4882a593Smuzhiyun /* #define RTL8814BE_AMPDU_PRE_TX_OFF */
272*4882a593Smuzhiyun 
273*4882a593Smuzhiyun /*
274*4882a593Smuzhiyun  * Platform  Related Config
275*4882a593Smuzhiyun  */
276*4882a593Smuzhiyun 
277*4882a593Smuzhiyun 
278*4882a593Smuzhiyun /* #define	CONFIG_TX_EARLY_MODE */
279*4882a593Smuzhiyun 
280*4882a593Smuzhiyun 
281*4882a593Smuzhiyun /*
282*4882a593Smuzhiyun  * Debug Related Config
283*4882a593Smuzhiyun  */
284*4882a593Smuzhiyun #define DBG	1
285*4882a593Smuzhiyun 
286*4882a593Smuzhiyun 
287*4882a593Smuzhiyun /*#define DBG_CONFIG_ERROR_DETECT*/
288*4882a593Smuzhiyun /* #define DBG_CONFIG_ERROR_DETECT_INT */
289*4882a593Smuzhiyun /* #define DBG_CONFIG_ERROR_RESET */
290*4882a593Smuzhiyun 
291*4882a593Smuzhiyun /* #define DBG_IO */
292*4882a593Smuzhiyun /* #define DBG_DELAY_OS */
293*4882a593Smuzhiyun /* #define DBG_MEM_ALLOC */
294*4882a593Smuzhiyun /* #define DBG_IOCTL */
295*4882a593Smuzhiyun 
296*4882a593Smuzhiyun /* #define DBG_TX */
297*4882a593Smuzhiyun /* #define DBG_XMIT_BUF */
298*4882a593Smuzhiyun /* #define DBG_XMIT_BUF_EXT */
299*4882a593Smuzhiyun /* #define DBG_TX_DROP_FRAME */
300*4882a593Smuzhiyun 
301*4882a593Smuzhiyun /* #define DBG_RX_DROP_FRAME */
302*4882a593Smuzhiyun /* #define DBG_RX_SEQ */
303*4882a593Smuzhiyun /* #define DBG_RX_SIGNAL_DISPLAY_PROCESSING */
304*4882a593Smuzhiyun /* #define DBG_RX_SIGNAL_DISPLAY_SSID_MONITORED "jeff-ap" */
305*4882a593Smuzhiyun 
306*4882a593Smuzhiyun /* #define DBG_ROAMING_TEST */
307*4882a593Smuzhiyun 
308*4882a593Smuzhiyun /* #define DBG_HAL_INIT_PROFILING */
309*4882a593Smuzhiyun 
310*4882a593Smuzhiyun /*#define DBG_MEMORY_LEAK*/
311*4882a593Smuzhiyun /* #define CONFIG_FW_C2H_DEBUG */
312*4882a593Smuzhiyun 
313*4882a593Smuzhiyun #define CONFIG_DBG_COUNTER
314*4882a593Smuzhiyun #define	DBG_RX_DFRAME_RAW_DATA
315*4882a593Smuzhiyun /*#define	DBG_TXBD_DESC_DUMP*/
316*4882a593Smuzhiyun #define CONFIG_RTW_EFUSE_DBG_DUMP	1
317*4882a593Smuzhiyun 
318*4882a593Smuzhiyun #define CONFIG_PCI_BCN_POLLING
319*4882a593Smuzhiyun //#define RTW_PHL_TEST_FPGA //For 8852A PCIE FPGA TEST
320*4882a593Smuzhiyun 
321*4882a593Smuzhiyun /* #define CONFIG_DMA_USE_COHERENT_MEM */
322*4882a593Smuzhiyun 
323*4882a593Smuzhiyun #ifdef CONFIG_DMA_USE_COHERENT_MEM
324*4882a593Smuzhiyun /*#define CONFIG_DMA_TX_USE_COHERENT_MEM*/
325*4882a593Smuzhiyun #define CONFIG_DMA_RX_USE_COHERENT_MEM
326*4882a593Smuzhiyun #else
327*4882a593Smuzhiyun #ifndef CONFIG_DIS_DYN_RXBUF
328*4882a593Smuzhiyun #define CONFIG_DYNAMIC_RX_BUF
329*4882a593Smuzhiyun #endif
330*4882a593Smuzhiyun #endif
331*4882a593Smuzhiyun 
332*4882a593Smuzhiyun /*#define CONFIG_RTW_BTM_ROAM*/
333*4882a593Smuzhiyun /*#define CONFIG_RTW_80211R*/
334*4882a593Smuzhiyun 
335*4882a593Smuzhiyun #ifdef CONFIG_RTW_MBO
336*4882a593Smuzhiyun 	#ifndef CONFIG_RTW_WNM
337*4882a593Smuzhiyun 		#define CONFIG_RTW_WNM
338*4882a593Smuzhiyun 	#endif
339*4882a593Smuzhiyun 	#ifndef CONFIG_RTW_80211K
340*4882a593Smuzhiyun 		#define CONFIG_RTW_80211K
341*4882a593Smuzhiyun 	#endif
342*4882a593Smuzhiyun #endif /* CONFIG_RTW_MBO */
343*4882a593Smuzhiyun 
344*4882a593Smuzhiyun /* Separate TRX path into different CPUs */
345*4882a593Smuzhiyun /*#define CONFIG_PHL_CPU_BALANCE*/
346*4882a593Smuzhiyun #ifdef CONFIG_PHL_CPU_BALANCE
347*4882a593Smuzhiyun 
348*4882a593Smuzhiyun #define CONFIG_PHL_CPU_BALANCE_TX
349*4882a593Smuzhiyun #define CPU_ID_TX_PHL_0 1
350*4882a593Smuzhiyun 
351*4882a593Smuzhiyun /*#define CONFIG_PHL_CPU_BALANCE_RX*/
352*4882a593Smuzhiyun #define CPU_ID_RX_CORE_0 2
353*4882a593Smuzhiyun 
354*4882a593Smuzhiyun #endif
355*4882a593Smuzhiyun 
356*4882a593Smuzhiyun #ifdef RTW_PHL_TEST_FPGA
357*4882a593Smuzhiyun 
358*4882a593Smuzhiyun 	#ifndef RTW_PHL_TX
359*4882a593Smuzhiyun 	#define RTW_PHL_TX
360*4882a593Smuzhiyun 	#endif
361*4882a593Smuzhiyun 	#ifndef RTW_PHL_RX
362*4882a593Smuzhiyun 	#define RTW_PHL_RX
363*4882a593Smuzhiyun 	#endif
364*4882a593Smuzhiyun 	#ifndef DIRTY_FOR_WORK
365*4882a593Smuzhiyun 	#define DIRTY_FOR_WORK
366*4882a593Smuzhiyun 	#endif
367*4882a593Smuzhiyun 	#ifndef CONFIG_DYNAMIC_RX_BUF
368*4882a593Smuzhiyun 	#define CONFIG_DYNAMIC_RX_BUF
369*4882a593Smuzhiyun 	#endif
370*4882a593Smuzhiyun 	#ifndef RTW_PHL_DBG_CMD
371*4882a593Smuzhiyun 	#define RTW_PHL_DBG_CMD
372*4882a593Smuzhiyun 	#endif
373*4882a593Smuzhiyun 	#ifndef CONFIG_DRV_FAKE_AP
374*4882a593Smuzhiyun 	#error "Please enable CONFIG_DRV_FAKE_AP in Makefile before Beacon ready\n"
375*4882a593Smuzhiyun 	#endif
376*4882a593Smuzhiyun 	#ifndef RTW_PHL_FWDL
377*4882a593Smuzhiyun 	#define RTW_PHL_FWDL
378*4882a593Smuzhiyun 	#endif
379*4882a593Smuzhiyun 
380*4882a593Smuzhiyun 	#ifdef CONFIG_RTW_NAPI
381*4882a593Smuzhiyun 	#undef CONFIG_RTW_NAPI
382*4882a593Smuzhiyun 	#endif
383*4882a593Smuzhiyun 	#ifdef CONFIG_RTW_GRO
384*4882a593Smuzhiyun 	#undef CONFIG_RTW_GRO
385*4882a593Smuzhiyun 	#endif
386*4882a593Smuzhiyun 	#ifdef CONFIG_RTW_NETIF_SG
387*4882a593Smuzhiyun 	#undef CONFIG_RTW_NETIF_SG
388*4882a593Smuzhiyun 	#endif
389*4882a593Smuzhiyun 
390*4882a593Smuzhiyun 	#if 1
391*4882a593Smuzhiyun 	#define	DBGP(fmt, args...)	printk("dbg [%s][%d]"fmt, __FUNCTION__, __LINE__, ## args)
392*4882a593Smuzhiyun 	#else
393*4882a593Smuzhiyun 	#define DBGP(arg...) do {} while (0)
394*4882a593Smuzhiyun 	#endif
395*4882a593Smuzhiyun 
396*4882a593Smuzhiyun #else //RTW_PHL_TEST_FPGA
397*4882a593Smuzhiyun 
398*4882a593Smuzhiyun 	#define DBGP(arg...) do {} while (0)
399*4882a593Smuzhiyun 
400*4882a593Smuzhiyun #endif
401*4882a593Smuzhiyun 
402*4882a593Smuzhiyun /* Platform dependent config, shall put on the bottom of this file */
403*4882a593Smuzhiyun #ifdef CONFIG_PLATFORM_RTL8198D
404*4882a593Smuzhiyun #include "autoconf_mips_98d.h"
405*4882a593Smuzhiyun #endif
406*4882a593Smuzhiyun 
407*4882a593Smuzhiyun /* Platform dependent config, shall put on the bottom of this file */
408*4882a593Smuzhiyun #ifdef CONFIG_I386_BUILD_VERIFY
409*4882a593Smuzhiyun #include "autoconf_i386_ap_func.h"
410*4882a593Smuzhiyun #endif
411*4882a593Smuzhiyun 
412*4882a593Smuzhiyun #ifdef CONFIG_ARCH_CORTINA
413*4882a593Smuzhiyun #include "autoconf_arm_9617b.h"
414*4882a593Smuzhiyun #endif /* CONFIG_ARCH_CORTINA */
415*4882a593Smuzhiyun 
416