1*4882a593Smuzhiyun /****************************************************************************** 2*4882a593Smuzhiyun * 3*4882a593Smuzhiyun * Copyright(c) 2007 - 2017 Realtek Corporation. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify it 6*4882a593Smuzhiyun * under the terms of version 2 of the GNU General Public License as 7*4882a593Smuzhiyun * published by the Free Software Foundation. 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * This program is distributed in the hope that it will be useful, but WITHOUT 10*4882a593Smuzhiyun * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11*4882a593Smuzhiyun * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12*4882a593Smuzhiyun * more details. 13*4882a593Smuzhiyun * 14*4882a593Smuzhiyun *****************************************************************************/ 15*4882a593Smuzhiyun #ifndef __RTW_RF_H_ 16*4882a593Smuzhiyun #define __RTW_RF_H_ 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun #define NumRates (13) 19*4882a593Smuzhiyun #define B_MODE_RATE_NUM (4) 20*4882a593Smuzhiyun #define G_MODE_RATE_NUM (8) 21*4882a593Smuzhiyun #define G_MODE_BASIC_RATE_NUM (3) 22*4882a593Smuzhiyun /* slot time for 11g */ 23*4882a593Smuzhiyun #define SHORT_SLOT_TIME 9 24*4882a593Smuzhiyun #define NON_SHORT_SLOT_TIME 20 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun #define CENTER_CH_2G_NUM 14 27*4882a593Smuzhiyun #define CENTER_CH_2G_40M_NUM 9 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun #define CENTER_CH_5G_20M_NUM 28 /* 20M center channels */ 30*4882a593Smuzhiyun #define CENTER_CH_5G_40M_NUM 14 /* 40M center channels */ 31*4882a593Smuzhiyun #define CENTER_CH_5G_80M_NUM 7 /* 80M center channels */ 32*4882a593Smuzhiyun #define CENTER_CH_5G_160M_NUM 3 /* 160M center channels */ 33*4882a593Smuzhiyun #define CENTER_CH_5G_ALL_NUM (CENTER_CH_5G_20M_NUM + CENTER_CH_5G_40M_NUM + CENTER_CH_5G_80M_NUM) 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun #define CENTER_CH_6G_20M_NUM 64 /* 20M center channels */ 36*4882a593Smuzhiyun #define CENTER_CH_6G_40M_NUM 32 /* 40M center channels */ 37*4882a593Smuzhiyun #define CENTER_CH_6G_80M_NUM 16 /* 80M center channels */ 38*4882a593Smuzhiyun #define CENTER_CH_6G_160M_NUM 8 /* 160M center channels */ 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun #define MAX_CHANNEL_NUM_2G CENTER_CH_2G_NUM 41*4882a593Smuzhiyun #define MAX_CHANNEL_NUM_5G CENTER_CH_5G_20M_NUM 42*4882a593Smuzhiyun #define MAX_CHANNEL_NUM_6G CENTER_CH_6G_20M_NUM 43*4882a593Smuzhiyun #define MAX_CHANNEL_NUM_2G_5G (MAX_CHANNEL_NUM_2G + MAX_CHANNEL_NUM_5G) 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun #define MAX_CHANNEL_NUM ( \ 46*4882a593Smuzhiyun MAX_CHANNEL_NUM_2G \ 47*4882a593Smuzhiyun + (CONFIG_IEEE80211_BAND_5GHZ ? MAX_CHANNEL_NUM_5G : 0) \ 48*4882a593Smuzhiyun + (CONFIG_IEEE80211_BAND_6GHZ ? MAX_CHANNEL_NUM_6G : 0) \ 49*4882a593Smuzhiyun ) 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun extern u8 center_ch_2g[CENTER_CH_2G_NUM]; 52*4882a593Smuzhiyun extern u8 center_ch_2g_40m[CENTER_CH_2G_40M_NUM]; 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun u8 center_chs_2g_num(u8 bw); 55*4882a593Smuzhiyun u8 center_chs_2g(u8 bw, u8 id); 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun extern u8 center_ch_5g_20m[CENTER_CH_5G_20M_NUM]; 58*4882a593Smuzhiyun extern u8 center_ch_5g_40m[CENTER_CH_5G_40M_NUM]; 59*4882a593Smuzhiyun extern u8 center_ch_5g_20m_40m[CENTER_CH_5G_20M_NUM + CENTER_CH_5G_40M_NUM]; 60*4882a593Smuzhiyun extern u8 center_ch_5g_80m[CENTER_CH_5G_80M_NUM]; 61*4882a593Smuzhiyun extern u8 center_ch_5g_all[CENTER_CH_5G_ALL_NUM]; 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun u8 center_chs_5g_num(u8 bw); 64*4882a593Smuzhiyun u8 center_chs_5g(u8 bw, u8 id); 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun u8 rtw_get_scch_by_cch_offset(u8 cch, u8 bw, u8 offset); 67*4882a593Smuzhiyun u8 rtw_get_scch_by_cch_opch(u8 cch, u8 bw, u8 opch); 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun u8 rtw_get_op_chs_by_cch_bw(u8 cch, u8 bw, u8 **op_chs, u8 *op_ch_num); 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun u8 rtw_get_offset_by_chbw(u8 ch, u8 bw, u8 *r_offset); 72*4882a593Smuzhiyun u8 rtw_get_center_ch(u8 ch, u8 bw, u8 offset); 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun u8 rtw_get_ch_group(u8 ch, u8 *group, u8 *cck_group); 75*4882a593Smuzhiyun 76*4882a593Smuzhiyun typedef enum _CAPABILITY { 77*4882a593Smuzhiyun cESS = 0x0001, 78*4882a593Smuzhiyun cIBSS = 0x0002, 79*4882a593Smuzhiyun cPollable = 0x0004, 80*4882a593Smuzhiyun cPollReq = 0x0008, 81*4882a593Smuzhiyun cPrivacy = 0x0010, 82*4882a593Smuzhiyun cShortPreamble = 0x0020, 83*4882a593Smuzhiyun cPBCC = 0x0040, 84*4882a593Smuzhiyun cChannelAgility = 0x0080, 85*4882a593Smuzhiyun cSpectrumMgnt = 0x0100, 86*4882a593Smuzhiyun cQos = 0x0200, /* For HCCA, use with CF-Pollable and CF-PollReq */ 87*4882a593Smuzhiyun cShortSlotTime = 0x0400, 88*4882a593Smuzhiyun cAPSD = 0x0800, 89*4882a593Smuzhiyun cRM = 0x1000, /* RRM (Radio Request Measurement) */ 90*4882a593Smuzhiyun cDSSS_OFDM = 0x2000, 91*4882a593Smuzhiyun cDelayedBA = 0x4000, 92*4882a593Smuzhiyun cImmediateBA = 0x8000, 93*4882a593Smuzhiyun } CAPABILITY, *PCAPABILITY; 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun enum _REG_PREAMBLE_MODE { 96*4882a593Smuzhiyun PREAMBLE_LONG = 1, 97*4882a593Smuzhiyun PREAMBLE_AUTO = 2, 98*4882a593Smuzhiyun PREAMBLE_SHORT = 3, 99*4882a593Smuzhiyun }; 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun #define rf_path_char(path) (((path) >= RF_PATH_MAX) ? 'X' : 'A' + (path)) 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun /* Bandwidth Offset */ 104*4882a593Smuzhiyun #define HAL_PRIME_CHNL_OFFSET_DONT_CARE 0 105*4882a593Smuzhiyun #define HAL_PRIME_CHNL_OFFSET_LOWER 1 106*4882a593Smuzhiyun #define HAL_PRIME_CHNL_OFFSET_UPPER 2 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun typedef enum _BAND_TYPE { 109*4882a593Smuzhiyun BAND_ON_2_4G = 0, 110*4882a593Smuzhiyun BAND_ON_5G = 1, 111*4882a593Smuzhiyun #if CONFIG_IEEE80211_BAND_6GHZ 112*4882a593Smuzhiyun BAND_ON_6G = 2, 113*4882a593Smuzhiyun #endif 114*4882a593Smuzhiyun BAND_MAX, 115*4882a593Smuzhiyun } BAND_TYPE, *PBAND_TYPE; 116*4882a593Smuzhiyun 117*4882a593Smuzhiyun #ifdef CONFIG_NARROWBAND_SUPPORTING 118*4882a593Smuzhiyun enum nb_config { 119*4882a593Smuzhiyun RTW_NB_CONFIG_NONE = 0, 120*4882a593Smuzhiyun RTW_NB_CONFIG_WIDTH_5 = 5, 121*4882a593Smuzhiyun RTW_NB_CONFIG_WIDTH_10 = 6, 122*4882a593Smuzhiyun }; 123*4882a593Smuzhiyun #endif 124*4882a593Smuzhiyun 125*4882a593Smuzhiyun extern const char *const _band_str[]; 126*4882a593Smuzhiyun #define band_str(band) (((band) >= BAND_MAX) ? _band_str[BAND_MAX] : _band_str[(band)]) 127*4882a593Smuzhiyun 128*4882a593Smuzhiyun extern const u8 _band_to_band_cap[]; 129*4882a593Smuzhiyun #define band_to_band_cap(band) (((band) >= BAND_MAX) ? _band_to_band_cap[BAND_MAX] : _band_to_band_cap[(band)]) 130*4882a593Smuzhiyun 131*4882a593Smuzhiyun 132*4882a593Smuzhiyun extern const char *const _ch_width_str[]; 133*4882a593Smuzhiyun #define ch_width_str(bw) (((bw) < CHANNEL_WIDTH_MAX) ? _ch_width_str[(bw)] : "CHANNEL_WIDTH_MAX") 134*4882a593Smuzhiyun 135*4882a593Smuzhiyun extern const u8 _ch_width_to_bw_cap[]; 136*4882a593Smuzhiyun #define ch_width_to_bw_cap(bw) (((bw) < CHANNEL_WIDTH_MAX) ? _ch_width_to_bw_cap[(bw)] : 0) 137*4882a593Smuzhiyun 138*4882a593Smuzhiyun enum opc_bw { 139*4882a593Smuzhiyun OPC_BW20 = 0, 140*4882a593Smuzhiyun OPC_BW40PLUS = 1, 141*4882a593Smuzhiyun OPC_BW40MINUS = 2, 142*4882a593Smuzhiyun OPC_BW80 = 3, 143*4882a593Smuzhiyun OPC_BW160 = 4, 144*4882a593Smuzhiyun OPC_BW80P80 = 5, 145*4882a593Smuzhiyun OPC_BW_NUM, 146*4882a593Smuzhiyun }; 147*4882a593Smuzhiyun 148*4882a593Smuzhiyun extern const char *const _opc_bw_str[OPC_BW_NUM]; 149*4882a593Smuzhiyun #define opc_bw_str(bw) (((bw) < OPC_BW_NUM) ? _opc_bw_str[(bw)] : "N/A") 150*4882a593Smuzhiyun 151*4882a593Smuzhiyun extern const u8 _opc_bw_to_ch_width[OPC_BW_NUM]; 152*4882a593Smuzhiyun #define opc_bw_to_ch_width(bw) (((bw) < OPC_BW_NUM) ? _opc_bw_to_ch_width[(bw)] : CHANNEL_WIDTH_MAX) 153*4882a593Smuzhiyun 154*4882a593Smuzhiyun /* global op class APIs */ 155*4882a593Smuzhiyun bool is_valid_global_op_class_id(u8 gid); 156*4882a593Smuzhiyun s16 get_sub_op_class(u8 gid, u8 ch); 157*4882a593Smuzhiyun void dump_global_op_class(void *sel); 158*4882a593Smuzhiyun u8 rtw_get_op_class_by_chbw(u8 ch, u8 bw, u8 offset); 159*4882a593Smuzhiyun u8 rtw_get_bw_offset_by_op_class_ch(u8 gid, u8 ch, u8 *bw, u8 *offset); 160*4882a593Smuzhiyun int get_supported_op_class(_adapter *padapter, u8 *op_set, int len); 161*4882a593Smuzhiyun 162*4882a593Smuzhiyun struct op_ch_t { 163*4882a593Smuzhiyun u8 ch; 164*4882a593Smuzhiyun u8 static_non_op:1; /* not in channel list */ 165*4882a593Smuzhiyun u8 no_ir:1; 166*4882a593Smuzhiyun s16 max_txpwr; /* mBm */ 167*4882a593Smuzhiyun }; 168*4882a593Smuzhiyun 169*4882a593Smuzhiyun struct op_class_pref_t { 170*4882a593Smuzhiyun u8 class_id; 171*4882a593Smuzhiyun BAND_TYPE band; 172*4882a593Smuzhiyun enum opc_bw bw; 173*4882a593Smuzhiyun u8 ch_num; /* number of chs */ 174*4882a593Smuzhiyun u8 op_ch_num; /* channel number which is not static non operable */ 175*4882a593Smuzhiyun u8 ir_ch_num; /* channel number which can init radiation */ 176*4882a593Smuzhiyun struct op_ch_t chs[]; 177*4882a593Smuzhiyun }; 178*4882a593Smuzhiyun 179*4882a593Smuzhiyun int op_class_pref_init(_adapter *adapter); 180*4882a593Smuzhiyun void op_class_pref_deinit(_adapter *adapter); 181*4882a593Smuzhiyun 182*4882a593Smuzhiyun #define REG_BEACON_HINT 0 183*4882a593Smuzhiyun #define REG_TXPWR_CHANGE 1 184*4882a593Smuzhiyun #define REG_CHANGE 2 185*4882a593Smuzhiyun 186*4882a593Smuzhiyun void op_class_pref_apply_regulatory(_adapter *adapter, u8 reason); 187*4882a593Smuzhiyun 188*4882a593Smuzhiyun struct rf_ctl_t; 189*4882a593Smuzhiyun void dump_cap_spt_op_class_ch(void *sel, struct rf_ctl_t *rfctl, bool detail); 190*4882a593Smuzhiyun void dump_reg_spt_op_class_ch(void *sel, struct rf_ctl_t *rfctl, bool detail); 191*4882a593Smuzhiyun void dump_cur_spt_op_class_ch(void *sel, struct rf_ctl_t *rfctl, bool detail); 192*4882a593Smuzhiyun 193*4882a593Smuzhiyun /* 194*4882a593Smuzhiyun * Represent Extention Channel Offset in HT Capabilities 195*4882a593Smuzhiyun * This is available only in 40Mhz mode. 196*4882a593Smuzhiyun * */ 197*4882a593Smuzhiyun typedef enum _EXTCHNL_OFFSET { 198*4882a593Smuzhiyun EXTCHNL_OFFSET_NO_EXT = 0, 199*4882a593Smuzhiyun EXTCHNL_OFFSET_UPPER = 1, 200*4882a593Smuzhiyun EXTCHNL_OFFSET_NO_DEF = 2, 201*4882a593Smuzhiyun EXTCHNL_OFFSET_LOWER = 3, 202*4882a593Smuzhiyun } EXTCHNL_OFFSET, *PEXTCHNL_OFFSET; 203*4882a593Smuzhiyun 204*4882a593Smuzhiyun typedef enum _VHT_DATA_SC { 205*4882a593Smuzhiyun VHT_DATA_SC_DONOT_CARE = 0, 206*4882a593Smuzhiyun VHT_DATA_SC_20_UPPER_OF_80MHZ = 1, 207*4882a593Smuzhiyun VHT_DATA_SC_20_LOWER_OF_80MHZ = 2, 208*4882a593Smuzhiyun VHT_DATA_SC_20_UPPERST_OF_80MHZ = 3, 209*4882a593Smuzhiyun VHT_DATA_SC_20_LOWEST_OF_80MHZ = 4, 210*4882a593Smuzhiyun VHT_DATA_SC_20_RECV1 = 5, 211*4882a593Smuzhiyun VHT_DATA_SC_20_RECV2 = 6, 212*4882a593Smuzhiyun VHT_DATA_SC_20_RECV3 = 7, 213*4882a593Smuzhiyun VHT_DATA_SC_20_RECV4 = 8, 214*4882a593Smuzhiyun VHT_DATA_SC_40_UPPER_OF_80MHZ = 9, 215*4882a593Smuzhiyun VHT_DATA_SC_40_LOWER_OF_80MHZ = 10, 216*4882a593Smuzhiyun } VHT_DATA_SC, *PVHT_DATA_SC_E; 217*4882a593Smuzhiyun 218*4882a593Smuzhiyun typedef enum _PROTECTION_MODE { 219*4882a593Smuzhiyun PROTECTION_MODE_AUTO = 0, 220*4882a593Smuzhiyun PROTECTION_MODE_FORCE_ENABLE = 1, 221*4882a593Smuzhiyun PROTECTION_MODE_FORCE_DISABLE = 2, 222*4882a593Smuzhiyun } PROTECTION_MODE, *PPROTECTION_MODE; 223*4882a593Smuzhiyun 224*4882a593Smuzhiyun #define RF_TYPE_VALID(rf_type) (rf_type < RF_TYPE_MAX) 225*4882a593Smuzhiyun 226*4882a593Smuzhiyun extern const u8 _rf_type_to_rf_tx_cnt[]; 227*4882a593Smuzhiyun #define rf_type_to_rf_tx_cnt(rf_type) (RF_TYPE_VALID(rf_type) ? _rf_type_to_rf_tx_cnt[rf_type] : 0) 228*4882a593Smuzhiyun 229*4882a593Smuzhiyun extern const u8 _rf_type_to_rf_rx_cnt[]; 230*4882a593Smuzhiyun #define rf_type_to_rf_rx_cnt(rf_type) (RF_TYPE_VALID(rf_type) ? _rf_type_to_rf_rx_cnt[rf_type] : 0) 231*4882a593Smuzhiyun 232*4882a593Smuzhiyun extern const char *const _rf_type_to_rfpath_str[]; 233*4882a593Smuzhiyun #define rf_type_to_rfpath_str(rf_type) (RF_TYPE_VALID(rf_type) ? _rf_type_to_rfpath_str[rf_type] : "UNKNOWN") 234*4882a593Smuzhiyun 235*4882a593Smuzhiyun void rf_type_to_default_trx_bmp(enum rf_type rf, enum bb_path *tx, enum bb_path *rx); 236*4882a593Smuzhiyun 237*4882a593Smuzhiyun enum rf_type trx_num_to_rf_type(u8 tx_num, u8 rx_num); 238*4882a593Smuzhiyun enum rf_type trx_bmp_to_rf_type(u8 tx_bmp, u8 rx_bmp); 239*4882a593Smuzhiyun bool rf_type_is_a_in_b(enum rf_type a, enum rf_type b); 240*4882a593Smuzhiyun u8 rtw_restrict_trx_path_bmp_by_trx_num_lmt(u8 trx_path_bmp, u8 tx_num_lmt, u8 rx_num_lmt, u8 *tx_num, u8 *rx_num); 241*4882a593Smuzhiyun u8 rtw_restrict_trx_path_bmp_by_rftype(u8 trx_path_bmp, enum rf_type type, u8 *tx_num, u8 *rx_num); 242*4882a593Smuzhiyun void tx_path_nss_set_default(enum bb_path txpath_nss[], u8 txpath_num_nss[], u8 txpath); 243*4882a593Smuzhiyun void tx_path_nss_set_full_tx(enum bb_path txpath_nss[], u8 txpath_num_nss[], u8 txpath); 244*4882a593Smuzhiyun 245*4882a593Smuzhiyun #if CONFIG_IEEE80211_BAND_6GHZ 246*4882a593Smuzhiyun int rtw_6gch2freq(int chan); 247*4882a593Smuzhiyun #endif 248*4882a593Smuzhiyun 249*4882a593Smuzhiyun int rtw_ch2freq(int chan); 250*4882a593Smuzhiyun int rtw_ch2freq_by_band(BAND_TYPE band, int ch); 251*4882a593Smuzhiyun int rtw_freq2ch(int freq); 252*4882a593Smuzhiyun BAND_TYPE rtw_freq2band(int freq); 253*4882a593Smuzhiyun bool rtw_freq_consecutive(int a, int b); 254*4882a593Smuzhiyun bool rtw_chbw_to_freq_range(u8 ch, u8 bw, u8 offset, u32 *hi, u32 *lo); 255*4882a593Smuzhiyun 256*4882a593Smuzhiyun struct rf_ctl_t; 257*4882a593Smuzhiyun 258*4882a593Smuzhiyun void txpwr_idx_get_dbm_str(s8 idx, u8 txgi_max, u8 txgi_pdbm, SIZE_T cwidth, char dbm_str[], u8 dbm_str_len); 259*4882a593Smuzhiyun 260*4882a593Smuzhiyun #define MBM_PDBM 100 261*4882a593Smuzhiyun #define UNSPECIFIED_MBM 32767 /* maximum of s16 */ 262*4882a593Smuzhiyun 263*4882a593Smuzhiyun void txpwr_mbm_get_dbm_str(s16 mbm, SIZE_T cwidth, char dbm_str[], u8 dbm_str_len); 264*4882a593Smuzhiyun s16 mb_of_ntx(u8 ntx); 265*4882a593Smuzhiyun 266*4882a593Smuzhiyun #if CONFIG_TXPWR_LIMIT 267*4882a593Smuzhiyun struct regd_exc_ent { 268*4882a593Smuzhiyun _list list; 269*4882a593Smuzhiyun char country[2]; 270*4882a593Smuzhiyun u8 domain; 271*4882a593Smuzhiyun char lmt_name[0]; 272*4882a593Smuzhiyun }; 273*4882a593Smuzhiyun 274*4882a593Smuzhiyun void dump_regd_exc_list(void *sel, struct rf_ctl_t *rfctl); 275*4882a593Smuzhiyun void rtw_regd_exc_add_with_nlen(struct rf_ctl_t *rfctl, const char *country, u8 domain, const char *lmt_name, u32 nlen); 276*4882a593Smuzhiyun void rtw_regd_exc_add(struct rf_ctl_t *rfctl, const char *country, u8 domain, const char *lmt_name); 277*4882a593Smuzhiyun struct regd_exc_ent *_rtw_regd_exc_search(struct rf_ctl_t *rfctl, const char *country, u8 domain); 278*4882a593Smuzhiyun struct regd_exc_ent *rtw_regd_exc_search(struct rf_ctl_t *rfctl, const char *country, u8 domain); 279*4882a593Smuzhiyun void rtw_regd_exc_list_free(struct rf_ctl_t *rfctl); 280*4882a593Smuzhiyun 281*4882a593Smuzhiyun void dump_txpwr_lmt(void *sel, _adapter *adapter); 282*4882a593Smuzhiyun void rtw_txpwr_lmt_add_with_nlen(struct rf_ctl_t *rfctl, const char *lmt_name, u32 nlen 283*4882a593Smuzhiyun , u8 band, u8 bw, u8 tlrs, u8 ntx_idx, u8 ch_idx, s8 lmt); 284*4882a593Smuzhiyun void rtw_txpwr_lmt_add(struct rf_ctl_t *rfctl, const char *lmt_name 285*4882a593Smuzhiyun , u8 band, u8 bw, u8 tlrs, u8 ntx_idx, u8 ch_idx, s8 lmt); 286*4882a593Smuzhiyun struct txpwr_lmt_ent *_rtw_txpwr_lmt_get_by_name(struct rf_ctl_t *rfctl, const char *lmt_name); 287*4882a593Smuzhiyun struct txpwr_lmt_ent *rtw_txpwr_lmt_get_by_name(struct rf_ctl_t *rfctl, const char *lmt_name); 288*4882a593Smuzhiyun void rtw_txpwr_lmt_list_free(struct rf_ctl_t *rfctl); 289*4882a593Smuzhiyun #endif /* CONFIG_TXPWR_LIMIT */ 290*4882a593Smuzhiyun 291*4882a593Smuzhiyun #define BB_GAIN_2G 0 292*4882a593Smuzhiyun #if CONFIG_IEEE80211_BAND_5GHZ 293*4882a593Smuzhiyun #define BB_GAIN_5GLB1 1 294*4882a593Smuzhiyun #define BB_GAIN_5GLB2 2 295*4882a593Smuzhiyun #define BB_GAIN_5GMB1 3 296*4882a593Smuzhiyun #define BB_GAIN_5GMB2 4 297*4882a593Smuzhiyun #define BB_GAIN_5GHB 5 298*4882a593Smuzhiyun #endif 299*4882a593Smuzhiyun 300*4882a593Smuzhiyun #if CONFIG_IEEE80211_BAND_5GHZ 301*4882a593Smuzhiyun #define BB_GAIN_NUM 6 302*4882a593Smuzhiyun #else 303*4882a593Smuzhiyun #define BB_GAIN_NUM 1 304*4882a593Smuzhiyun #endif 305*4882a593Smuzhiyun 306*4882a593Smuzhiyun int rtw_ch_to_bb_gain_sel(int ch); 307*4882a593Smuzhiyun void rtw_rf_set_tx_gain_offset(_adapter *adapter, u8 path, s8 offset); 308*4882a593Smuzhiyun void rtw_rf_apply_tx_gain_offset(_adapter *adapter, u8 ch); 309*4882a593Smuzhiyun 310*4882a593Smuzhiyun /* only check channel ranges */ 311*4882a593Smuzhiyun #define rtw_is_2g_ch(ch) (ch >= 1 && ch <= 14) 312*4882a593Smuzhiyun #define rtw_is_5g_ch(ch) ((ch) >= 36 && (ch) <= 177) 313*4882a593Smuzhiyun #define rtw_is_same_band(a, b) \ 314*4882a593Smuzhiyun ((rtw_is_2g_ch(a) && rtw_is_2g_ch(b)) \ 315*4882a593Smuzhiyun || (rtw_is_5g_ch(a) && rtw_is_5g_ch(b))) 316*4882a593Smuzhiyun 317*4882a593Smuzhiyun #define rtw_is_5g_band1(ch) ((ch) >= 36 && (ch) <= 48) 318*4882a593Smuzhiyun #define rtw_is_5g_band2(ch) ((ch) >= 52 && (ch) <= 64) 319*4882a593Smuzhiyun #define rtw_is_5g_band3(ch) ((ch) >= 100 && (ch) <= 144) 320*4882a593Smuzhiyun #define rtw_is_5g_band4(ch) ((ch) >= 149 && (ch) <= 177) 321*4882a593Smuzhiyun #define rtw_is_same_5g_band(a, b) \ 322*4882a593Smuzhiyun ((rtw_is_5g_band1(a) && rtw_is_5g_band1(b)) \ 323*4882a593Smuzhiyun || (rtw_is_5g_band2(a) && rtw_is_5g_band2(b)) \ 324*4882a593Smuzhiyun || (rtw_is_5g_band3(a) && rtw_is_5g_band3(b)) \ 325*4882a593Smuzhiyun || (rtw_is_5g_band4(a) && rtw_is_5g_band4(b))) 326*4882a593Smuzhiyun 327*4882a593Smuzhiyun #define rtw_is_6g_band1(ch) ((ch) >= 1 && (ch) <= 93) 328*4882a593Smuzhiyun #define rtw_is_6g_band2(ch) ((ch) >= 97 && (ch) <= 117) 329*4882a593Smuzhiyun #define rtw_is_6g_band3(ch) ((ch) >= 121 && (ch) <= 189) 330*4882a593Smuzhiyun #define rtw_is_6g_band4(ch) ((ch) >= 193 && (ch) <= 237) 331*4882a593Smuzhiyun 332*4882a593Smuzhiyun bool rtw_is_long_cac_range(u32 hi, u32 lo, u8 dfs_region); 333*4882a593Smuzhiyun bool rtw_is_long_cac_ch(u8 ch, u8 bw, u8 offset, u8 dfs_region); 334*4882a593Smuzhiyun 335*4882a593Smuzhiyun #endif /* _RTL8711_RF_H_ */ 336