1*4882a593Smuzhiyun /****************************************************************************** 2*4882a593Smuzhiyun * 3*4882a593Smuzhiyun * Copyright(c) 2007 - 2017 Realtek Corporation. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify it 6*4882a593Smuzhiyun * under the terms of version 2 of the GNU General Public License as 7*4882a593Smuzhiyun * published by the Free Software Foundation. 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * This program is distributed in the hope that it will be useful, but WITHOUT 10*4882a593Smuzhiyun * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11*4882a593Smuzhiyun * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12*4882a593Smuzhiyun * more details. 13*4882a593Smuzhiyun * 14*4882a593Smuzhiyun *****************************************************************************/ 15*4882a593Smuzhiyun #ifndef __RTL8710B_HAL_H__ 16*4882a593Smuzhiyun #define __RTL8710B_HAL_H__ 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun #include "hal_data.h" 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun #include "rtl8710b_spec.h" 21*4882a593Smuzhiyun #include "rtl8710b_rf.h" 22*4882a593Smuzhiyun #include "rtl8710b_dm.h" 23*4882a593Smuzhiyun #include "rtl8710b_recv.h" 24*4882a593Smuzhiyun #include "rtl8710b_xmit.h" 25*4882a593Smuzhiyun #include "rtl8710b_cmd.h" 26*4882a593Smuzhiyun #include "rtl8710b_led.h" 27*4882a593Smuzhiyun #include "Hal8710BPwrSeq.h" 28*4882a593Smuzhiyun #include "Hal8710BPhyReg.h" 29*4882a593Smuzhiyun #include "Hal8710BPhyCfg.h" 30*4882a593Smuzhiyun #ifdef DBG_CONFIG_ERROR_DETECT 31*4882a593Smuzhiyun #include "rtl8710b_sreset.h" 32*4882a593Smuzhiyun #endif 33*4882a593Smuzhiyun #ifdef CONFIG_LPS_POFF 34*4882a593Smuzhiyun #include "rtl8710b_lps_poff.h" 35*4882a593Smuzhiyun #endif 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun #define FW_8710B_SIZE 0x8000 38*4882a593Smuzhiyun #define FW_8710B_START_ADDRESS 0x1000 39*4882a593Smuzhiyun #define FW_8710B_END_ADDRESS 0x1FFF /* 0x5FFF */ 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun typedef struct _RT_FIRMWARE { 42*4882a593Smuzhiyun FIRMWARE_SOURCE eFWSource; 43*4882a593Smuzhiyun #ifdef CONFIG_EMBEDDED_FWIMG 44*4882a593Smuzhiyun u8 *szFwBuffer; 45*4882a593Smuzhiyun #else 46*4882a593Smuzhiyun u8 szFwBuffer[FW_8710B_SIZE]; 47*4882a593Smuzhiyun #endif 48*4882a593Smuzhiyun u32 ulFwLength; 49*4882a593Smuzhiyun } RT_FIRMWARE_8710B, *PRT_FIRMWARE_8710B; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun /* 52*4882a593Smuzhiyun * This structure must be cared byte-ordering 53*4882a593Smuzhiyun * 54*4882a593Smuzhiyun * Added by tynli. 2009.12.04. */ 55*4882a593Smuzhiyun typedef struct _RT_8710B_FIRMWARE_HDR { 56*4882a593Smuzhiyun /* 8-byte alinment required */ 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun /* --- LONG WORD 0 ---- */ 59*4882a593Smuzhiyun u16 Signature; /* 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut */ 60*4882a593Smuzhiyun u8 Category; /* AP/NIC and USB/PCI */ 61*4882a593Smuzhiyun u8 Function; /* Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions */ 62*4882a593Smuzhiyun u16 Version; /* FW Version */ 63*4882a593Smuzhiyun u16 Subversion; /* FW Subversion, default 0x00 */ 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun /* --- LONG WORD 1 ---- */ 66*4882a593Smuzhiyun u8 Month; /* Release time Month field */ 67*4882a593Smuzhiyun u8 Date; /* Release time Date field */ 68*4882a593Smuzhiyun u8 Hour; /* Release time Hour field */ 69*4882a593Smuzhiyun u8 Minute; /* Release time Minute field */ 70*4882a593Smuzhiyun u16 RamCodeSize; /* The size of RAM code */ 71*4882a593Smuzhiyun u16 Rsvd2; 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun /* --- LONG WORD 2 ---- */ 74*4882a593Smuzhiyun u32 SvnIdx; /* The SVN entry index */ 75*4882a593Smuzhiyun u32 Rsvd3; 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun /* --- LONG WORD 3 ---- */ 78*4882a593Smuzhiyun u32 Rsvd4; 79*4882a593Smuzhiyun u32 Rsvd5; 80*4882a593Smuzhiyun } RT_8710B_FIRMWARE_HDR, *PRT_8710B_FIRMWARE_HDR; 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun #define DRIVER_EARLY_INT_TIME_8710B 0x05 83*4882a593Smuzhiyun #define BCN_DMA_ATIME_INT_TIME_8710B 0x02 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun /* for 8710B 86*4882a593Smuzhiyun * TX 32K, RX 16K, Page size 128B for TX, 8B for RX */ 87*4882a593Smuzhiyun #define PAGE_SIZE_TX_8710B 128 88*4882a593Smuzhiyun #define PAGE_SIZE_RX_8710B 8 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun #define TX_DMA_SIZE_8710B 0x8000 /* 32K(TX) */ 91*4882a593Smuzhiyun #define RX_DMA_SIZE_8710B 0x4000 /* 16K(RX) */ 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun #ifdef CONFIG_WOWLAN 94*4882a593Smuzhiyun #define RESV_FMWF (WKFMCAM_SIZE * MAX_WKFM_CAM_NUM) /* 16 entries, for each is 24 bytes*/ 95*4882a593Smuzhiyun #else 96*4882a593Smuzhiyun #define RESV_FMWF 0 97*4882a593Smuzhiyun #endif 98*4882a593Smuzhiyun 99*4882a593Smuzhiyun #ifdef CONFIG_FW_C2H_DEBUG 100*4882a593Smuzhiyun #define RX_DMA_RESERVED_SIZE_8710B 0x100 /* 256B, reserved for c2h debug message */ 101*4882a593Smuzhiyun #else 102*4882a593Smuzhiyun #define RX_DMA_RESERVED_SIZE_8710B 0x80 /* 128B, reserved for tx report */ 103*4882a593Smuzhiyun #endif 104*4882a593Smuzhiyun #define RX_DMA_BOUNDARY_8710B\ 105*4882a593Smuzhiyun (RX_DMA_SIZE_8710B - RX_DMA_RESERVED_SIZE_8710B - 1) 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun /* Note: We will divide number of page equally for each queue other than public queue! */ 109*4882a593Smuzhiyun 110*4882a593Smuzhiyun /* For General Reserved Page Number(Beacon Queue is reserved page) 111*4882a593Smuzhiyun * Beacon:MAX_BEACON_LEN/PAGE_SIZE_TX_8710B 112*4882a593Smuzhiyun * PS-Poll:1, Null Data:1,Qos Null Data:1,BT Qos Null Data:1,CTS-2-SELF,LTE QoS Null*/ 113*4882a593Smuzhiyun #define BCNQ_PAGE_NUM_8710B (MAX_BEACON_LEN/PAGE_SIZE_TX_8710B + 6) /*0x08*/ 114*4882a593Smuzhiyun 115*4882a593Smuzhiyun 116*4882a593Smuzhiyun /* For WoWLan , more reserved page 117*4882a593Smuzhiyun * ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:2,GTK EXT MEM:2, AOAC rpt 1, PNO: 6 118*4882a593Smuzhiyun * NS offload: 2 NDP info: 1 119*4882a593Smuzhiyun */ 120*4882a593Smuzhiyun #ifdef CONFIG_WOWLAN 121*4882a593Smuzhiyun #define WOWLAN_PAGE_NUM_8710B 0x0b 122*4882a593Smuzhiyun #else 123*4882a593Smuzhiyun #define WOWLAN_PAGE_NUM_8710B 0x00 124*4882a593Smuzhiyun #endif 125*4882a593Smuzhiyun 126*4882a593Smuzhiyun #ifdef CONFIG_PNO_SUPPORT 127*4882a593Smuzhiyun #undef WOWLAN_PAGE_NUM_8710B 128*4882a593Smuzhiyun #define WOWLAN_PAGE_NUM_8710B 0x15 129*4882a593Smuzhiyun #endif 130*4882a593Smuzhiyun 131*4882a593Smuzhiyun #ifdef CONFIG_AP_WOWLAN 132*4882a593Smuzhiyun #define AP_WOWLAN_PAGE_NUM_8710B 0x02 133*4882a593Smuzhiyun #endif 134*4882a593Smuzhiyun 135*4882a593Smuzhiyun #define TX_TOTAL_PAGE_NUMBER_8710B\ 136*4882a593Smuzhiyun (0xFF - BCNQ_PAGE_NUM_8710B -WOWLAN_PAGE_NUM_8710B) 137*4882a593Smuzhiyun #define TX_PAGE_BOUNDARY_8710B (TX_TOTAL_PAGE_NUMBER_8710B + 1) 138*4882a593Smuzhiyun 139*4882a593Smuzhiyun #define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8710B TX_TOTAL_PAGE_NUMBER_8710B 140*4882a593Smuzhiyun #define WMM_NORMAL_TX_PAGE_BOUNDARY_8710B\ 141*4882a593Smuzhiyun (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8710B + 1) 142*4882a593Smuzhiyun 143*4882a593Smuzhiyun /* For Normal Chip Setting 144*4882a593Smuzhiyun * (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_8710B */ 145*4882a593Smuzhiyun #define NORMAL_PAGE_NUM_HPQ_8710B 0x0C 146*4882a593Smuzhiyun #define NORMAL_PAGE_NUM_LPQ_8710B 0x02 147*4882a593Smuzhiyun #define NORMAL_PAGE_NUM_NPQ_8710B 0x02 148*4882a593Smuzhiyun #define NORMAL_PAGE_NUM_EPQ_8710B 0x04 149*4882a593Smuzhiyun 150*4882a593Smuzhiyun /* Note: For Normal Chip Setting, modify later */ 151*4882a593Smuzhiyun #define WMM_NORMAL_PAGE_NUM_HPQ_8710B 0x30 152*4882a593Smuzhiyun #define WMM_NORMAL_PAGE_NUM_LPQ_8710B 0x20 153*4882a593Smuzhiyun #define WMM_NORMAL_PAGE_NUM_NPQ_8710B 0x20 154*4882a593Smuzhiyun #define WMM_NORMAL_PAGE_NUM_EPQ_8710B 0x00 155*4882a593Smuzhiyun 156*4882a593Smuzhiyun 157*4882a593Smuzhiyun #include "HalVerDef.h" 158*4882a593Smuzhiyun #include "hal_com.h" 159*4882a593Smuzhiyun 160*4882a593Smuzhiyun #define EFUSE_OOB_PROTECT_BYTES (96 + 1) 161*4882a593Smuzhiyun 162*4882a593Smuzhiyun #define HAL_EFUSE_MEMORY 163*4882a593Smuzhiyun #define HWSET_MAX_SIZE_8710B 512 164*4882a593Smuzhiyun #define EFUSE_REAL_CONTENT_LEN_8710B 512 165*4882a593Smuzhiyun #define EFUSE_MAP_LEN_8710B 512 166*4882a593Smuzhiyun #define EFUSE_MAX_SECTION_8710B 64 167*4882a593Smuzhiyun 168*4882a593Smuzhiyun /* For some inferiority IC purpose. added by Roger, 2009.09.02.*/ 169*4882a593Smuzhiyun #define EFUSE_IC_ID_OFFSET 506 170*4882a593Smuzhiyun #define AVAILABLE_EFUSE_ADDR(addr) (addr < EFUSE_REAL_CONTENT_LEN_8710B) 171*4882a593Smuzhiyun 172*4882a593Smuzhiyun #define EFUSE_ACCESS_ON 0x69 173*4882a593Smuzhiyun #define EFUSE_ACCESS_OFF 0x00 174*4882a593Smuzhiyun 175*4882a593Smuzhiyun #define PACKAGE_QFN32_S 0 176*4882a593Smuzhiyun #define PACKAGE_QFN48M_S 1 //definiton 8188GU Dongle Package, Efuse Physical Address 0xF8 = 0xFE 177*4882a593Smuzhiyun #define PACKAGE_QFN48_S 2 178*4882a593Smuzhiyun #define PACKAGE_QFN64_S 3 179*4882a593Smuzhiyun #define PACKAGE_QFN32_U 4 180*4882a593Smuzhiyun #define PACKAGE_QFN48M_U 5 //definiton 8188GU Dongle Package, Efuse Physical Address 0xF8 = 0xEE 181*4882a593Smuzhiyun #define PACKAGE_QFN48_U 6 182*4882a593Smuzhiyun #define PACKAGE_QFN68_U 7 183*4882a593Smuzhiyun 184*4882a593Smuzhiyun typedef enum _PACKAGE_TYPE_E 185*4882a593Smuzhiyun { 186*4882a593Smuzhiyun PACKAGE_DEFAULT, 187*4882a593Smuzhiyun PACKAGE_QFN68, 188*4882a593Smuzhiyun PACKAGE_TFBGA90, 189*4882a593Smuzhiyun PACKAGE_TFBGA80, 190*4882a593Smuzhiyun PACKAGE_TFBGA79 191*4882a593Smuzhiyun }PACKAGE_TYPE_E; 192*4882a593Smuzhiyun 193*4882a593Smuzhiyun #define INCLUDE_MULTI_FUNC_GPS(_Adapter) \ 194*4882a593Smuzhiyun (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS) 195*4882a593Smuzhiyun 196*4882a593Smuzhiyun #ifdef CONFIG_FILE_FWIMG 197*4882a593Smuzhiyun extern char *rtw_fw_file_path; 198*4882a593Smuzhiyun extern char *rtw_fw_wow_file_path; 199*4882a593Smuzhiyun #ifdef CONFIG_MP_INCLUDED 200*4882a593Smuzhiyun extern char *rtw_fw_mp_bt_file_path; 201*4882a593Smuzhiyun #endif /* CONFIG_MP_INCLUDED */ 202*4882a593Smuzhiyun #endif /* CONFIG_FILE_FWIMG */ 203*4882a593Smuzhiyun 204*4882a593Smuzhiyun /* rtl8710b_hal_init.c */ 205*4882a593Smuzhiyun s32 rtl8710b_FirmwareDownload(PADAPTER padapter, BOOLEAN bUsedWoWLANFw); 206*4882a593Smuzhiyun void rtl8710b_FirmwareSelfReset(PADAPTER padapter); 207*4882a593Smuzhiyun void rtl8710b_InitializeFirmwareVars(PADAPTER padapter); 208*4882a593Smuzhiyun 209*4882a593Smuzhiyun void rtl8710b_InitAntenna_Selection(PADAPTER padapter); 210*4882a593Smuzhiyun void rtl8710b_DeinitAntenna_Selection(PADAPTER padapter); 211*4882a593Smuzhiyun void rtl8710b_CheckAntenna_Selection(PADAPTER padapter); 212*4882a593Smuzhiyun void rtl8710b_init_default_value(PADAPTER padapter); 213*4882a593Smuzhiyun 214*4882a593Smuzhiyun 215*4882a593Smuzhiyun u32 indirect_read32_8710b(PADAPTER padapter, u32 regaddr); 216*4882a593Smuzhiyun void indirect_write32_8710b(PADAPTER padapter, u32 regaddr, u32 data); 217*4882a593Smuzhiyun u32 hal_query_syson_reg_8710b(PADAPTER padapter, u32 regaddr, u32 bitmask); 218*4882a593Smuzhiyun void hal_set_syson_reg_8710b(PADAPTER padapter, u32 regaddr, u32 bitmask, u32 data); 219*4882a593Smuzhiyun #define HAL_SetSYSOnReg hal_set_syson_reg_8710b 220*4882a593Smuzhiyun 221*4882a593Smuzhiyun 222*4882a593Smuzhiyun /* EFuse */ 223*4882a593Smuzhiyun u8 GetEEPROMSize8710B(PADAPTER padapter); 224*4882a593Smuzhiyun 225*4882a593Smuzhiyun #if 0 226*4882a593Smuzhiyun void Hal_InitPGData(PADAPTER padapter, u8 *PROMContent); 227*4882a593Smuzhiyun void Hal_EfuseParseIDCode(PADAPTER padapter, u8 *hwinfo); 228*4882a593Smuzhiyun void Hal_EfuseParseTxPowerInfo_8710B(PADAPTER padapter, 229*4882a593Smuzhiyun u8 *PROMContent, BOOLEAN AutoLoadFail); 230*4882a593Smuzhiyun void Hal_EfuseParseEEPROMVer_8710B(PADAPTER padapter, 231*4882a593Smuzhiyun u8 *hwinfo, BOOLEAN AutoLoadFail); 232*4882a593Smuzhiyun void Hal_EfuseParsePackageType_8710B(PADAPTER pAdapter, 233*4882a593Smuzhiyun u8 *hwinfo, BOOLEAN AutoLoadFail); 234*4882a593Smuzhiyun void Hal_EfuseParseChnlPlan_8710B(PADAPTER padapter, 235*4882a593Smuzhiyun u8 *hwinfo, BOOLEAN AutoLoadFail); 236*4882a593Smuzhiyun void Hal_EfuseParseCustomerID_8710B(PADAPTER padapter, 237*4882a593Smuzhiyun u8 *hwinfo, BOOLEAN AutoLoadFail); 238*4882a593Smuzhiyun void Hal_EfuseParseAntennaDiversity_8710B(PADAPTER padapter, 239*4882a593Smuzhiyun u8 *hwinfo, BOOLEAN AutoLoadFail); 240*4882a593Smuzhiyun void Hal_EfuseParseXtal_8710B(PADAPTER pAdapter, 241*4882a593Smuzhiyun u8 *hwinfo, u8 AutoLoadFail); 242*4882a593Smuzhiyun void Hal_EfuseParseThermalMeter_8710B(PADAPTER padapter, 243*4882a593Smuzhiyun u8 *hwinfo, u8 AutoLoadFail); 244*4882a593Smuzhiyun void Hal_EfuseParseBoardType_8710B(PADAPTER Adapter, 245*4882a593Smuzhiyun u8 *PROMContent, BOOLEAN AutoloadFail); 246*4882a593Smuzhiyun #endif 247*4882a593Smuzhiyun 248*4882a593Smuzhiyun void rtl8710b_set_hal_ops(struct hal_ops *pHalFunc); 249*4882a593Smuzhiyun void init_hal_spec_8710b(_adapter *adapter); 250*4882a593Smuzhiyun u8 SetHwReg8710B(PADAPTER padapter, u8 variable, u8 *val); 251*4882a593Smuzhiyun void GetHwReg8710B(PADAPTER padapter, u8 variable, u8 *val); 252*4882a593Smuzhiyun u8 SetHalDefVar8710B(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); 253*4882a593Smuzhiyun u8 GetHalDefVar8710B(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); 254*4882a593Smuzhiyun 255*4882a593Smuzhiyun /* register */ 256*4882a593Smuzhiyun void rtl8710b_InitBeaconParameters(PADAPTER padapter); 257*4882a593Smuzhiyun void rtl8710b_InitBeaconMaxError(PADAPTER padapter, u8 InfraMode); 258*4882a593Smuzhiyun void _8051Reset8710(PADAPTER padapter); 259*4882a593Smuzhiyun 260*4882a593Smuzhiyun void rtl8710b_start_thread(_adapter *padapter); 261*4882a593Smuzhiyun void rtl8710b_stop_thread(_adapter *padapter); 262*4882a593Smuzhiyun 263*4882a593Smuzhiyun #ifdef CONFIG_GPIO_WAKEUP 264*4882a593Smuzhiyun void HalSetOutPutGPIO(PADAPTER padapter, u8 index, u8 OutPutValue); 265*4882a593Smuzhiyun #endif 266*4882a593Smuzhiyun 267*4882a593Smuzhiyun void CCX_FwC2HTxRpt_8710b(PADAPTER padapter, u8 *pdata, u8 len); 268*4882a593Smuzhiyun 269*4882a593Smuzhiyun u8 MRateToHwRate8710B(u8 rate); 270*4882a593Smuzhiyun u8 HwRateToMRate8710B(u8 rate); 271*4882a593Smuzhiyun 272*4882a593Smuzhiyun #ifdef CONFIG_USB_HCI 273*4882a593Smuzhiyun void rtl8710b_cal_txdesc_chksum(struct tx_desc *ptxdesc); 274*4882a593Smuzhiyun #endif 275*4882a593Smuzhiyun 276*4882a593Smuzhiyun 277*4882a593Smuzhiyun #endif 278