xref: /OK3568_Linux_fs/external/rkwifibt/drivers/rtl8822cs/include/rtl8192e_recv.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /******************************************************************************
2*4882a593Smuzhiyun  *
3*4882a593Smuzhiyun  * Copyright(c) 2012 - 2017 Realtek Corporation.
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * This program is free software; you can redistribute it and/or modify it
6*4882a593Smuzhiyun  * under the terms of version 2 of the GNU General Public License as
7*4882a593Smuzhiyun  * published by the Free Software Foundation.
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  * This program is distributed in the hope that it will be useful, but WITHOUT
10*4882a593Smuzhiyun  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11*4882a593Smuzhiyun  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12*4882a593Smuzhiyun  * more details.
13*4882a593Smuzhiyun  *
14*4882a593Smuzhiyun  *****************************************************************************/
15*4882a593Smuzhiyun #ifndef __RTL8192E_RECV_H__
16*4882a593Smuzhiyun #define __RTL8192E_RECV_H__
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun #if defined(CONFIG_USB_HCI)
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun 	#ifndef MAX_RECVBUF_SZ
21*4882a593Smuzhiyun 		#ifdef CONFIG_MINIMAL_MEMORY_USAGE
22*4882a593Smuzhiyun 			#define MAX_RECVBUF_SZ (4000) /* about 4K */
23*4882a593Smuzhiyun 		#else
24*4882a593Smuzhiyun 			#ifdef CONFIG_PREALLOC_RX_SKB_BUFFER
25*4882a593Smuzhiyun 				#define MAX_RECVBUF_SZ (rtw_rtkm_get_buff_size()) /*depend rtkm*/
26*4882a593Smuzhiyun 			#elif defined(CONFIG_PLATFORM_HISILICON)
27*4882a593Smuzhiyun 				#define MAX_RECVBUF_SZ (16384) /* 16k */
28*4882a593Smuzhiyun 			#else
29*4882a593Smuzhiyun 				#define MAX_RECVBUF_SZ (32768) /* 32k */
30*4882a593Smuzhiyun 			#endif
31*4882a593Smuzhiyun 			/* #define MAX_RECVBUF_SZ (20480) */ /* 20K */
32*4882a593Smuzhiyun 			/* #define MAX_RECVBUF_SZ (10240)  */ /* 10K */
33*4882a593Smuzhiyun 			/* #define MAX_RECVBUF_SZ (16384) */ /* 16k - 92E RX BUF :16K */
34*4882a593Smuzhiyun 			/* #define MAX_RECVBUF_SZ (8192+1024) */ /* 8K+1k		 */
35*4882a593Smuzhiyun 			#ifdef CONFIG_PLATFORM_NOVATEK_NT72668
36*4882a593Smuzhiyun 				#undef MAX_RECVBUF_SZ
37*4882a593Smuzhiyun 				#define MAX_RECVBUF_SZ (15360) /* 15k < 16k */
38*4882a593Smuzhiyun 			#endif /* CONFIG_PLATFORM_NOVATEK_NT72668 */
39*4882a593Smuzhiyun 		#endif
40*4882a593Smuzhiyun 	#endif /* !MAX_RECVBUF_SZ */
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun #elif defined(CONFIG_PCI_HCI)
43*4882a593Smuzhiyun 	/* #ifndef CONFIG_MINIMAL_MEMORY_USAGE */
44*4882a593Smuzhiyun 	/*	#define MAX_RECVBUF_SZ (9100) */
45*4882a593Smuzhiyun 	/* #else */
46*4882a593Smuzhiyun 	#define MAX_RECVBUF_SZ (4000) /* about 4K
47*4882a593Smuzhiyun 	* #endif */
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun #elif defined(CONFIG_SDIO_HCI)
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun 	#define MAX_RECVBUF_SZ (16384)
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun #endif
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun /* Rx smooth factor */
58*4882a593Smuzhiyun #define Rx_Smooth_Factor (20)
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun /* *************
61*4882a593Smuzhiyun  * [1] Rx Buffer Descriptor (for PCIE) buffer descriptor architecture
62*4882a593Smuzhiyun  * DWORD 0 */
63*4882a593Smuzhiyun #define SET_RX_BUFFER_DESC_DATA_LENGTH_92E(__pRxStatusDesc, __Value)		SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 0, 14, __Value)
64*4882a593Smuzhiyun #define SET_RX_BUFFER_DESC_LS_92E(__pRxStatusDesc, __Value)	SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 15, 1, __Value)
65*4882a593Smuzhiyun #define SET_RX_BUFFER_DESC_FS_92E(__pRxStatusDesc, __Value)		SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 16, 1, __Value)
66*4882a593Smuzhiyun #define SET_RX_BUFFER_DESC_TOTAL_LENGTH_92E(__pRxStatusDesc, __Value)		SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 16, 15, __Value)
67*4882a593Smuzhiyun 
68*4882a593Smuzhiyun #define GET_RX_BUFFER_DESC_OWN_92E(__pRxStatusDesc)		LE_BITS_TO_4BYTE(__pRxStatusDesc, 31, 1)
69*4882a593Smuzhiyun #define GET_RX_BUFFER_DESC_LS_92E(__pRxStatusDesc)		LE_BITS_TO_4BYTE(__pRxStatusDesc, 15, 1)
70*4882a593Smuzhiyun #define GET_RX_BUFFER_DESC_FS_92E(__pRxStatusDesc)		LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 1)
71*4882a593Smuzhiyun #define GET_RX_BUFFER_DESC_TOTAL_LENGTH_92E(__pRxStatusDesc)		LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 15)
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun /* DWORD 1 */
75*4882a593Smuzhiyun #define SET_RX_BUFFER_PHYSICAL_LOW_92E(__pRxStatusDesc, __Value)		SET_BITS_TO_LE_4BYTE(__pRxStatusDesc+4, 0, 32, __Value)
76*4882a593Smuzhiyun #define GET_RX_BUFFER_PHYSICAL_LOW_92E(__pRxStatusDesc)		LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 0, 32)
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun /* DWORD 2 */
79*4882a593Smuzhiyun #define SET_RX_BUFFER_PHYSICAL_HIGH_92E(__pRxStatusDesc, __Value)		SET_BITS_TO_LE_4BYTE(__pRxStatusDesc+8, 0, 32, __Value)
80*4882a593Smuzhiyun 
81*4882a593Smuzhiyun /* *************
82*4882a593Smuzhiyun  * [2] Rx Descriptor
83*4882a593Smuzhiyun  * DWORD 0 */
84*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_PKT_LEN_92E(__pRxStatusDesc)			LE_BITS_TO_4BYTE(__pRxStatusDesc, 0, 14)
85*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_CRC32_92E(__pRxStatusDesc)			LE_BITS_TO_4BYTE(__pRxStatusDesc, 14, 1)
86*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_ICVERR_92E(__pRxStatusDesc)			LE_BITS_TO_4BYTE(__pRxStatusDesc, 15, 1)
87*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_DRVINFO_SIZE_92E(__pRxStatusDesc)		LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 4)
88*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_SECURITY_92E(__pRxStatusDesc)			LE_BITS_TO_4BYTE(__pRxStatusDesc, 20, 3)
89*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_QOS_92E(__pRxStatusDesc)				LE_BITS_TO_4BYTE(__pRxStatusDesc, 23, 1)
90*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_SHIFT_92E(__pRxStatusDesc)				LE_BITS_TO_4BYTE(__pRxStatusDesc, 24, 2)
91*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_PHY_STATUS_92E(__pRxStatusDesc)		LE_BITS_TO_4BYTE(__pRxStatusDesc, 26, 1)
92*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_SWDEC_92E(__pRxStatusDesc)			LE_BITS_TO_4BYTE(__pRxStatusDesc, 27, 1)
93*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_EOR_92E(__pRxStatusDesc)				LE_BITS_TO_4BYTE(__pRxStatusDesc, 30, 1)
94*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_OWN_92E(__pRxStatusDesc)				LE_BITS_TO_4BYTE(__pRxStatusDesc, 31, 1)
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun #define SET_RX_STATUS_DESC_PKT_LEN_92E(__pRxStatusDesc, __Value)		SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 0, 14, __Value)
98*4882a593Smuzhiyun #define SET_RX_STATUS_DESC_EOR_92E(__pRxStatusDesc, __Value)		SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 30, 1, __Value)
99*4882a593Smuzhiyun #define SET_RX_STATUS_DESC_OWN_92E(__pRxStatusDesc, __Value)		SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 31, 1, __Value)
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun /* DWORD 1 */
102*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_MACID_92E(__pRxDesc)					LE_BITS_TO_4BYTE(__pRxDesc+4, 0, 7)
103*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_TID_92E(__pRxDesc)					LE_BITS_TO_4BYTE(__pRxDesc+4, 8, 4)
104*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_MACID_VLD_92E(__pRxDesc)				LE_BITS_TO_4BYTE(__pRxDesc+4, 12, 1)
105*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_AMSDU_92E(__pRxDesc)					LE_BITS_TO_4BYTE(__pRxDesc+4, 13, 1)
106*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_RXID_MATCH_92E(__pRxDesc)			LE_BITS_TO_4BYTE(__pRxDesc+4, 14, 1)
107*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_PAGGR_92E(__pRxStatusDesc)			LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 15, 1)
108*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_A1_FITS_92E(__pRxStatusDesc)			LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 16, 4)
109*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_TCPOFFLOAD_CHKERR_92E(__pRxStatusDesc)			LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 20, 1)
110*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_TCPOFFLOAD_IPVER_92E(__pRxStatusDesc)			LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 21, 1)
111*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_TCPOFFLOAD_IS_TCPUDP_92E(__pRxStatusDesc)		LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 22, 1)
112*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_TCPOFFLOAD_CHK_VLD_92E(__pRxStatusDesc)		LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 23, 1)
113*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_PAM_92E(__pRxStatusDesc)				LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 24, 1)
114*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_PWR_92E(__pRxStatusDesc)				LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 25, 1)
115*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_MORE_DATA_92E(__pRxStatusDesc)			LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 26, 1)
116*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_MORE_FRAG_92E(__pRxStatusDesc)			LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 27, 1)
117*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_TYPE_92E(__pRxStatusDesc)			LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 28, 2)
118*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_MC_92E(__pRxStatusDesc)				LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 30, 1)
119*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_BC_92E(__pRxStatusDesc)				LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 31, 1)
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun /* DWORD 2 */
122*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_SEQ_92E(__pRxStatusDesc)					LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 0, 12)
123*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_FRAG_92E(__pRxStatusDesc)				LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 12, 4)
124*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_RX_IS_QOS_92E(__pRxStatusDesc)			LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 16, 1)
125*4882a593Smuzhiyun 
126*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_WLANHD_IV_LEN_92E(__pRxStatusDesc)			LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 18, 6)
127*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_HWRSVD_92E(__pRxStatusDesc)			LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 24, 4)
128*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_FCS_OK_92E(__pRxStatusDesc)			LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 31, 1)
129*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_RPT_SEL_92E(__pRxStatusDesc)			LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 28, 1)
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun /* DWORD 3 */
132*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_RX_RATE_92E(__pRxStatusDesc)				LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 0, 7)
133*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_HTC_92E(__pRxStatusDesc)					LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 10, 1)
134*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_EOSP_92E(__pRxStatusDesc)					LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 11, 1)
135*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_BSSID_FIT_92E(__pRxStatusDesc)			LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 12, 2)
136*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_DMA_AGG_NUM_92E(__pRxStatusDesc)			LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 16, 8)
137*4882a593Smuzhiyun 
138*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_PATTERN_MATCH_92E(__pRxDesc)			LE_BITS_TO_4BYTE(__pRxDesc+12, 29, 1)
139*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_UNICAST_92E(__pRxDesc)			LE_BITS_TO_4BYTE(__pRxDesc+12, 30, 1)
140*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_MAGIC_WAKE_92E(__pRxDesc)			LE_BITS_TO_4BYTE(__pRxDesc+12, 31, 1)
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun /* DWORD 6 */
143*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_SPLCP_92E(__pRxDesc)			LE_BITS_TO_4BYTE(__pRxDesc+16, 0, 1)
144*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_LDPC_92E(__pRxDesc)			LE_BITS_TO_4BYTE(__pRxDesc+16, 1, 1)
145*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_STBC_92E(__pRxDesc)			LE_BITS_TO_4BYTE(__pRxDesc+16, 2, 1)
146*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_BW_92E(__pRxDesc)			LE_BITS_TO_4BYTE(__pRxDesc+16, 4, 2)
147*4882a593Smuzhiyun 
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun /* DWORD 5 */
150*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_TSFL_92E(__pRxStatusDesc)				LE_BITS_TO_4BYTE(__pRxStatusDesc+20, 0, 32)
151*4882a593Smuzhiyun 
152*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_BUFF_ADDR_92E(__pRxDesc)		LE_BITS_TO_4BYTE(__pRxDesc+24, 0, 32)
153*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_BUFF_ADDR64_92E(__pRxDesc)		LE_BITS_TO_4BYTE(__pRxDesc+28, 0, 32)
154*4882a593Smuzhiyun 
155*4882a593Smuzhiyun 
156*4882a593Smuzhiyun #ifdef CONFIG_SDIO_HCI
157*4882a593Smuzhiyun 	s32 rtl8192es_init_recv_priv(PADAPTER padapter);
158*4882a593Smuzhiyun 	void rtl8192es_free_recv_priv(PADAPTER padapter);
159*4882a593Smuzhiyun 	s32 rtl8192es_recv_hdl(_adapter *padapter);
160*4882a593Smuzhiyun #endif
161*4882a593Smuzhiyun 
162*4882a593Smuzhiyun #ifdef CONFIG_USB_HCI
163*4882a593Smuzhiyun 	void rtl8192eu_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf);
164*4882a593Smuzhiyun 	s32 rtl8192eu_init_recv_priv(PADAPTER padapter);
165*4882a593Smuzhiyun 	void rtl8192eu_free_recv_priv(PADAPTER padapter);
166*4882a593Smuzhiyun #endif
167*4882a593Smuzhiyun 
168*4882a593Smuzhiyun #ifdef CONFIG_PCI_HCI
169*4882a593Smuzhiyun 	s32 rtl8192ee_init_recv_priv(PADAPTER padapter);
170*4882a593Smuzhiyun 	void rtl8192ee_free_recv_priv(PADAPTER padapter);
171*4882a593Smuzhiyun #endif
172*4882a593Smuzhiyun 
173*4882a593Smuzhiyun void rtl8192e_query_rx_desc_status(union recv_frame *precvframe, u8 *pdesc);
174*4882a593Smuzhiyun 
175*4882a593Smuzhiyun #endif /* __RTL8192E_RECV_H__ */
176