xref: /OK3568_Linux_fs/external/rkwifibt/drivers/rtl8822cs/hal/phydm/halrf/halrf_psd.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1 /******************************************************************************
2  *
3  * Copyright(c) 2007 - 2017 Realtek Corporation.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of version 2 of the GNU General Public License as
7  * published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12  * more details.
13  *
14  *****************************************************************************/
15 
16 /*@===========================================================
17  * include files
18  *============================================================
19  */
20 #include "mp_precomp.h"
21 #include "phydm_precomp.h"
22 
_sqrt(u64 x)23 u64 _sqrt(u64 x)
24 {
25 	u64 i = 0;
26 	u64 j = (x >> 1) + 1;
27 
28 	while (i <= j) {
29 		u64 mid = (i + j) >> 1;
30 
31 		u64 sq = mid * mid;
32 
33 		if (sq == x)
34 			return mid;
35 		else if (sq < x)
36 			i = mid + 1;
37 		else
38 			j = mid - 1;
39 	}
40 
41 	return j;
42 }
43 
halrf_get_psd_data(struct dm_struct * dm,u32 point)44 u32 halrf_get_psd_data(
45 	struct dm_struct *dm,
46 	u32 point)
47 {
48 	struct _hal_rf_ *rf = &(dm->rf_table);
49 	struct _halrf_psd_data *psd = &(rf->halrf_psd_data);
50 	u32 psd_val = 0, psd_reg, psd_report, psd_point, psd_start, i, delay_time = 0;
51 
52 #if (DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE)
53 	if (dm->support_interface == ODM_ITRF_USB || dm->support_interface == ODM_ITRF_SDIO) {
54 		if (psd->average == 0)
55 			delay_time = 100;
56 		else
57 			delay_time = 0;
58 	}
59 #endif
60 #if (DEV_BUS_TYPE == RT_PCI_INTERFACE)
61 	if (dm->support_interface == ODM_ITRF_PCIE) {
62 		if (psd->average == 0)
63 			delay_time = 1000;
64 		else
65 			delay_time = 100;
66 	}
67 #endif
68 
69 	if (dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8821C)) {
70 		psd_reg = R_0x910;
71 		psd_report = R_0xf44;
72 	} else {
73 		psd_reg = R_0x808;
74 		psd_report = R_0x8b4;
75 	}
76 
77 	if (dm->support_ic_type & ODM_RTL8710B) {
78 		psd_point = 0xeffffc00;
79 		psd_start = 0x10000000;
80 	} else {
81 		psd_point = 0xffbffc00;
82 		psd_start = 0x00400000;
83 	}
84 
85 	psd_val = odm_get_bb_reg(dm, psd_reg, MASKDWORD);
86 
87 	psd_val &= psd_point;
88 	psd_val |= point;
89 
90 	odm_set_bb_reg(dm, psd_reg, MASKDWORD, psd_val);
91 
92 	psd_val |= psd_start;
93 
94 	odm_set_bb_reg(dm, psd_reg, MASKDWORD, psd_val);
95 
96 	for (i = 0; i < delay_time; i++)
97 		ODM_delay_us(1);
98 
99 	psd_val = odm_get_bb_reg(dm, psd_report, MASKDWORD);
100 
101 	if (dm->support_ic_type & (ODM_RTL8821C | ODM_RTL8710B)) {
102 		psd_val &= MASKL3BYTES;
103 		psd_val = psd_val / 32;
104 	} else {
105 		psd_val &= MASKLWORD;
106 	}
107 
108 	return psd_val;
109 }
110 
halrf_psd(struct dm_struct * dm,u32 point,u32 start_point,u32 stop_point,u32 average)111 void halrf_psd(
112 	struct dm_struct *dm,
113 	u32 point,
114 	u32 start_point,
115 	u32 stop_point,
116 	u32 average)
117 {
118 	struct _hal_rf_ *rf = &(dm->rf_table);
119 	struct _halrf_psd_data *psd = &(rf->halrf_psd_data);
120 
121 	u32 i = 0, j = 0, k = 0;
122 	u32 psd_reg, avg_org, point_temp, average_tmp, mode;
123 	u64 data_tatal = 0, data_temp[64] = {0};
124 
125 	psd->buf_size = 256;
126 
127 	mode = average >> 16;
128 
129 	if (mode == 2)
130 		average_tmp = 1;
131 	else
132 		average_tmp = average & 0xffff;
133 
134 	if (dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8821C))
135 		psd_reg = R_0x910;
136 	else
137 		psd_reg = R_0x808;
138 
139 #if 0
140 	dbg_print("[PSD]point=%d, start_point=%d, stop_point=%d, average=%d, average_tmp=%d, buf_size=%d\n",
141 		point, start_point, stop_point, average, average_tmp, psd->buf_size);
142 #endif
143 
144 	for (i = 0; i < psd->buf_size; i++)
145 		psd->psd_data[i] = 0;
146 
147 	if (dm->support_ic_type & ODM_RTL8710B)
148 		avg_org = odm_get_bb_reg(dm, psd_reg, 0x30000);
149 	else
150 		avg_org = odm_get_bb_reg(dm, psd_reg, 0x3000);
151 
152 	if (mode == 1) {
153 		if (dm->support_ic_type & ODM_RTL8710B)
154 			odm_set_bb_reg(dm, psd_reg, 0x30000, 0x1);
155 		else
156 			odm_set_bb_reg(dm, psd_reg, 0x3000, 0x1);
157 	}
158 
159 #if 0
160 	if (avg_temp == 0)
161 		avg = 1;
162 	else if (avg_temp == 1)
163 		avg = 8;
164 	else if (avg_temp == 2)
165 		avg = 16;
166 	else if (avg_temp == 3)
167 		avg = 32;
168 #endif
169 
170 	i = start_point;
171 	while (i < stop_point) {
172 		data_tatal = 0;
173 
174 		if (i >= point)
175 			point_temp = i - point;
176 		else
177 			point_temp = i;
178 
179 		for (k = 0; k < average_tmp; k++) {
180 			data_temp[k] = halrf_get_psd_data(dm, point_temp);
181 			data_tatal = data_tatal + (data_temp[k] * data_temp[k]);
182 
183 #if 0
184 			if ((k % 20) == 0)
185 				dbg_print("\n ");
186 
187 			dbg_print("0x%x ", data_temp[k]);
188 #endif
189 		}
190 #if 0
191 		/*dbg_print("\n");*/
192 #endif
193 
194 		data_tatal = phydm_division64((data_tatal * 100), average_tmp);
195 		psd->psd_data[j] = (u32)_sqrt(data_tatal);
196 
197 		i++;
198 		j++;
199 	}
200 
201 #if 0
202 	for (i = 0; i < psd->buf_size; i++) {
203 		if ((i % 20) == 0)
204 			dbg_print("\n ");
205 
206 		dbg_print("0x%x ", psd->psd_data[i]);
207 	}
208 	dbg_print("\n\n");
209 #endif
210 
211 	if (dm->support_ic_type & ODM_RTL8710B)
212 		odm_set_bb_reg(dm, psd_reg, 0x30000, avg_org);
213 	else
214 		odm_set_bb_reg(dm, psd_reg, 0x3000, avg_org);
215 }
216 
backup_bb_register(struct dm_struct * dm,u32 * bb_backup,u32 * backup_bb_reg,u32 counter)217 void backup_bb_register(struct dm_struct *dm, u32 *bb_backup, u32 *backup_bb_reg, u32 counter)
218 {
219 	u32 i ;
220 
221 	for (i = 0; i < counter; i++)
222 		bb_backup[i] = odm_get_bb_reg(dm, backup_bb_reg[i], MASKDWORD);
223 }
224 
restore_bb_register(struct dm_struct * dm,u32 * bb_backup,u32 * backup_bb_reg,u32 counter)225 void restore_bb_register(struct dm_struct *dm, u32 *bb_backup, u32 *backup_bb_reg, u32 counter)
226 {
227 	u32 i ;
228 
229 	for (i = 0; i < counter; i++)
230 		odm_set_bb_reg(dm, backup_bb_reg[i], MASKDWORD, bb_backup[i]);
231 }
232 
233 
234 
_halrf_psd_iqk_init(struct dm_struct * dm)235 void _halrf_psd_iqk_init(struct dm_struct *dm)
236 {
237 	odm_set_bb_reg(dm, 0x1b04, MASKDWORD, 0x0);
238 	odm_set_bb_reg(dm, 0x1b08, MASKDWORD, 0x80);
239 	odm_set_bb_reg(dm, 0x1b0c, 0xc00, 0x3);
240 	odm_set_bb_reg(dm, 0x1b14, MASKDWORD, 0x0);
241 	odm_set_bb_reg(dm, 0x1b18, BIT(0), 0x1);
242 
243 	if (dm->support_ic_type & ODM_RTL8197G)
244 		odm_set_bb_reg(dm, 0x1b20, MASKDWORD, 0x00040008);
245 	if (dm->support_ic_type & ODM_RTL8198F)
246 		odm_set_bb_reg(dm, 0x1b20, MASKDWORD, 0x00000000);
247 
248 	if (dm->support_ic_type & (ODM_RTL8197G | ODM_RTL8198F)) {
249 		odm_set_bb_reg(dm, 0x1b24, MASKDWORD, 0x00030000);
250 		odm_set_bb_reg(dm, 0x1b28, MASKDWORD, 0x00000000);
251 		odm_set_bb_reg(dm, 0x1b2c, MASKDWORD, 0x00180018);
252 		odm_set_bb_reg(dm, 0x1b30, MASKDWORD, 0x20000000);
253 		/*odm_set_bb_reg(dm, 0x1b38, MASKDWORD, 0x20000000);*/
254 		/*odm_set_bb_reg(dm, 0x1b3c, MASKDWORD, 0x20000000);*/
255 	}
256 
257 	odm_set_bb_reg(dm, 0x1b1c, 0xfff, 0xd21);
258 	odm_set_bb_reg(dm, 0x1b1c, 0xfff00000, 0x821);
259 	odm_set_bb_reg(dm, 0x1b28, MASKDWORD, 0x0);
260 	odm_set_bb_reg(dm, 0x1bcc, 0x3f, 0x3f);
261 }
262 
_halrf_iqk_psd_init_8723f(void * dm_void,boolean onoff)263 void _halrf_iqk_psd_init_8723f(void *dm_void,	 boolean onoff)
264 {
265 	struct dm_struct *dm = (struct dm_struct *)dm_void;
266 	u8 s;
267 
268 	s = (u8)odm_get_bb_reg(dm, 0x1884, BIT(20));
269 
270 	if (onoff) {
271 		/*01_8723F_AFE_ON_BB_settings.txt*/
272 		odm_set_bb_reg(dm, 0x1c38, MASKDWORD, 0x0);
273 		odm_set_bb_reg(dm, R_0x1830, BIT(30), 0x0);
274 		odm_set_bb_reg(dm, R_0x1860, 0xF0000000, 0xf);
275 		odm_set_bb_reg(dm, R_0x1860, 0x0FFFF000, 0x0041);
276 		odm_set_bb_reg(dm, 0x09f0, 0x0000FFFF, 0xbbbb);
277 		odm_set_bb_reg(dm, 0x1d40, BIT(3), 0x1);
278 		odm_set_bb_reg(dm, 0x1d40, 0x00000007, 0x3);
279 		odm_set_bb_reg(dm, 0x09b4, 0x00000700, 0x3);
280 		odm_set_bb_reg(dm, 0x09b4, 0x00003800, 0x3);
281 		odm_set_bb_reg(dm, 0x09b4, 0x0001C000, 0x3);
282 		odm_set_bb_reg(dm, 0x09b4, 0x000E0000, 0x3);
283 		odm_set_bb_reg(dm, R_0x1c20, BIT(5), 0x1);
284 		odm_set_bb_reg(dm, R_0x1e24, BIT(31), 0x0);
285 		odm_set_bb_reg(dm, R_0x1e28, 0x0000000F, 0x1);
286 		odm_set_bb_reg(dm, R_0x824, 0x000F0000, 0x1);
287 		odm_set_bb_reg(dm, R_0x1cd0, 0xF0000000, 0x7);
288 		odm_set_bb_reg(dm, R_0x2a24, BIT(13), 0x1);
289 		odm_set_bb_reg(dm, R_0x1c68, BIT(24), 0x1);
290 		odm_set_bb_reg(dm, R_0x1864, BIT(31), 0x1);
291 		odm_set_bb_reg(dm, R_0x180c, BIT(27), 0x1);
292 		odm_set_bb_reg(dm, R_0x180c, BIT(30), 0x1);
293 		odm_set_bb_reg(dm, R_0x1e24, BIT(17), 0x1);
294 		odm_set_bb_reg(dm, R_0x1880, BIT(21), 0x0);
295 		odm_set_bb_reg(dm, R_0x1c38, MASKDWORD, 0xffffffff);
296 		/*02_IQK_Preset.txt*/
297 		//odm_set_rf_reg(dm, RF_PATH_A, 0x05, BIT(0), 0x0);
298 		//odm_set_rf_reg(dm, RF_PATH_B, 0x05, BIT(0), 0x0);
299 		odm_set_bb_reg(dm, R_0x1b08, MASKDWORD, 0x00000080);
300 		//odm_set_bb_reg(dm, R_0x1bd8, MASKDWORD, 0x00000002);
301 		//switch path  10 od 0x1b38 0x1/0x3 [1:0]
302 		if (s == 0)
303 			odm_set_bb_reg(dm, R_0x1b00, MASKDWORD, 0x00000008);
304 		else
305 			odm_set_bb_reg(dm, R_0x1b00, MASKDWORD, 0x0000000a);
306 
307 		odm_set_bb_reg(dm, R_0x1b18, MASKDWORD, 0x40010101);
308 		odm_set_bb_reg(dm, R_0x1b14, MASKDWORD, 0x40010100);
309 		//odm_set_bb_reg(dm, R_0x1b1c, MASKDWORD, 0xA2103C00);
310 		odm_set_bb_reg(dm, R_0x1b0c, 0x00000C00, 0x2);
311 		odm_set_bb_reg(dm, R_0x1bcc, 0x0000003F, 0x3f);
312 		//DbgPrint("[PSD][8723F]iqkpsd init!\n");
313 	} else {
314 		/*10_IQK_Reg_PSD_Restore.txt*/
315 		//odm_set_bb_reg(dm, R_0x1b1c, MASKDWORD, 0xA2103C00);
316 		odm_set_bb_reg(dm, R_0x1b08, MASKDWORD, 0x00000000);
317 		odm_set_bb_reg(dm, R_0x1b38, BIT(0), 0x0);
318 		odm_set_bb_reg(dm, R_0x1bcc, 0x0000003F, 0x0);
319 		//odm_set_rf_reg(dm, RF_PATH_A, 0x05, BIT(0), 0x1);
320 		//odm_set_rf_reg(dm, RF_PATH_B, 0x05, BIT(0), 0x1);
321 		/*11_8723F_restore_AFE_BB_settings.txt*/
322 		odm_set_bb_reg(dm, 0x1c38, MASKDWORD, 0x0);
323 		odm_set_bb_reg(dm, R_0x1830, BIT(30), 0x1);
324 		odm_set_bb_reg(dm, R_0x1e24, BIT(31), 0x1);
325 		odm_set_bb_reg(dm, R_0x2a24, BIT(13), 0x0);
326 		odm_set_bb_reg(dm, R_0x1c68, BIT(24), 0x0);
327 		odm_set_bb_reg(dm, R_0x1864, BIT(31), 0x0);
328 		odm_set_bb_reg(dm, R_0x180c, BIT(27), 0x0);
329 		odm_set_bb_reg(dm, R_0x180c, BIT(30), 0x0);
330 		odm_set_bb_reg(dm, R_0x1880, BIT(21), 0x0);
331 		odm_set_bb_reg(dm, R_0x1c38, MASKDWORD, 0xffa1005e);
332 		//DbgPrint("[PSD][8723F]iqkpsd resotre!\n");
333 	}
334 }
335 
_halrf_psd_iqk_init_8814c(struct dm_struct * dm)336 void _halrf_psd_iqk_init_8814c(struct dm_struct *dm)
337 {
338 	odm_set_bb_reg(dm, 0x1b04, MASKDWORD, 0x0);
339 	odm_set_bb_reg(dm, 0x1b08, MASKDWORD, 0x80);
340 	odm_set_bb_reg(dm, 0x1b0c, 0xc00, 0x3);
341 	odm_set_bb_reg(dm, 0x1b14, MASKDWORD, 0x0);
342 	odm_set_bb_reg(dm, 0x1b18, BIT(0), 0x1);
343 	odm_set_bb_reg(dm, 0x1b28, MASKDWORD, 0x0);
344 	odm_set_bb_reg(dm, 0x1b30, MASKDWORD, 0x40000000);
345 	odm_set_bb_reg(dm, 0x1bcc, 0x3f, 0x3f);
346 }
347 
348 
halrf_get_iqk_psd_data(void * dm_void,u32 point)349 u64 halrf_get_iqk_psd_data(void *dm_void, u32 point)
350 {
351 	struct dm_struct *dm = (struct dm_struct *)dm_void;
352 	struct _hal_rf_ *rf = &(dm->rf_table);
353 	struct _halrf_psd_data *psd = &(rf->halrf_psd_data);
354 	u64 psd_val, psd_val1, psd_val2;
355 	u32 psd_point, i, delay_time = 0;
356 
357 #if (DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE)
358 	if (dm->support_interface == ODM_ITRF_USB || dm->support_interface == ODM_ITRF_SDIO) {
359 		if (dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8723F | ODM_RTL8814C))
360 			delay_time = 1000;
361 		else
362 			delay_time = 0;
363 	}
364 #endif
365 #if (DEV_BUS_TYPE == RT_PCI_INTERFACE)
366 	if (dm->support_interface == ODM_ITRF_PCIE) {
367 		if (dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8814C))
368 			delay_time = 1000;
369 		else
370 			delay_time = 150;
371 	}
372 #endif
373 	psd_point = odm_get_bb_reg(dm, R_0x1b2c, MASKDWORD);
374 
375 	psd_point &= 0xF000FFFF;
376 
377 	point &= 0xFFF;
378 
379 	psd_point = psd_point | (point << 16);
380 
381 	odm_set_bb_reg(dm, R_0x1b2c, MASKDWORD, psd_point);
382 
383 	odm_set_bb_reg(dm, R_0x1b34, BIT(0), 0x1);
384 
385 	odm_set_bb_reg(dm, R_0x1b34, BIT(0), 0x0);
386 
387 	for (i = 0; i < delay_time; i++)
388 		ODM_delay_us(1);
389 
390 	if (dm->support_ic_type & (ODM_RTL8197G | ODM_RTL8198F)) {
391 		if (dm->support_ic_type & ODM_RTL8197G)
392 			odm_set_bb_reg(dm, R_0x1bd4, MASKDWORD, 0x001a0001);
393 		else
394 			odm_set_bb_reg(dm, R_0x1bd4, MASKDWORD, 0x00250001);
395 
396 		psd_val1 = odm_get_bb_reg(dm, R_0x1bfc, MASKDWORD);
397 
398 		psd_val1 = (psd_val1 & 0x001f0000) >> 16;
399 
400 		if (dm->support_ic_type & ODM_RTL8197G)
401 			odm_set_bb_reg(dm, R_0x1bd4, MASKDWORD, 0x001b0001);
402 		else
403 			odm_set_bb_reg(dm, R_0x1bd4, MASKDWORD, 0x002e0001);
404 
405 		psd_val2 = odm_get_bb_reg(dm, R_0x1bfc, MASKDWORD);
406 
407 		psd_val = (psd_val1 << 27) + (psd_val2 >> 5);
408 	} else if (dm->support_ic_type & ODM_RTL8723F) {
409 		odm_set_bb_reg(dm, R_0x1bd4, MASKDWORD, 0x00210001);
410 		psd_val1 = odm_get_bb_reg(dm, R_0x1bfc, MASKDWORD);
411 		psd_val1 = (psd_val1 & 0x00FF0000) >> 16;
412 		odm_set_bb_reg(dm, R_0x1bd4, MASKDWORD, 0x00220001);
413 		psd_val2 = odm_get_bb_reg(dm, R_0x1bfc, MASKDWORD);
414 		//psd_val = (psd_val1 << 27) + (psd_val2 >> 5);
415 		psd_val = (psd_val1 << 32) + psd_val2;
416 	} else {
417 		odm_set_bb_reg(dm, R_0x1bd4, MASKDWORD, 0x00250001);
418 
419 		psd_val1 = odm_get_bb_reg(dm, R_0x1bfc, MASKDWORD);
420 
421 		psd_val1 = (psd_val1 & 0x07FF0000) >> 16;
422 
423 		odm_set_bb_reg(dm, R_0x1bd4, MASKDWORD, 0x002e0001);
424 
425 		psd_val2 = odm_get_bb_reg(dm, R_0x1bfc, MASKDWORD);
426 
427 		psd_val = (psd_val1 << 21) + (psd_val2 >> 11);
428 	}
429 
430 	return psd_val;
431 }
432 
halrf_iqk_psd(struct dm_struct * dm,u32 point,u32 start_point,u32 stop_point,u32 average)433 void halrf_iqk_psd(
434 	struct dm_struct *dm,
435 	u32 point,
436 	u32 start_point,
437 	u32 stop_point,
438 	u32 average)
439 {
440 	struct _hal_rf_ *rf = &(dm->rf_table);
441 	struct _halrf_psd_data *psd = &(rf->halrf_psd_data);
442 
443 	u32 i = 0, j = 0, k = 0;
444 	u32 psd_reg, avg_org, point_temp, average_tmp = 32, mode, reg_tmp = 5;
445 	u64 data_tatal = 0, data_temp[64] = {0};
446 	s32 s_point_tmp;
447 
448 	psd->buf_size = 256;
449 
450 	mode = average >> 16;
451 
452 	if (mode == 2) {
453 		if (dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8723F | ODM_RTL8814C))
454 			average_tmp = 1; //HW average
455 		else {
456 			reg_tmp = odm_get_bb_reg(dm, R_0x1b1c, 0x000e0000);
457 			if (reg_tmp == 0)
458 				average_tmp = 1;
459 			else if (reg_tmp == 3)
460 				average_tmp = 8;
461 			else if (reg_tmp == 4)
462 				average_tmp = 16;
463 			else if (reg_tmp == 5)
464 				average_tmp = 32;
465 			odm_set_bb_reg(dm, R_0x1b1c, 0x000e0000, 0x0);
466 		}
467 	} else {
468 		reg_tmp = odm_get_bb_reg(dm, R_0x1b1c, 0x000e0000);
469 		if (reg_tmp == 0)
470 			average_tmp = 1;
471 		else if (reg_tmp == 3)
472 			average_tmp = 8;
473 		else if (reg_tmp == 4)
474 			average_tmp = 16;
475 		else if (reg_tmp == 5)
476 			average_tmp = 32;
477 		if (!(dm->support_ic_type & ODM_RTL8723F))
478 			odm_set_bb_reg(dm, R_0x1b1c, 0x000e0000, 0x0);
479 	}
480 
481 #if 0
482 	DbgPrint("[PSD]point=%d, start_point=%d, stop_point=%d, average=0x%x, average_tmp=%d, buf_size=%d, mode=%d\n",
483 				point, start_point, stop_point, average, average_tmp, psd->buf_size, mode);
484 #endif
485 
486 	for (i = 0; i < psd->buf_size; i++)
487 		psd->psd_data[i] = 0;
488 
489 	i = start_point;
490 
491 	if (dm->support_ic_type & ODM_RTL8723F) {
492 		while (i < stop_point) {
493 			data_tatal = 0;
494 
495 			if (i >= point)
496 				point_temp = i - point;
497 			else
498 				point_temp = i + 0xB00;
499 			//-640:0xD80,640:0x280,0x280+0xB00 =0xD80
500 				//point_temp = i + 0xC00;
501 			//-512:0xE00,512:0x200,0x200+0xC00 = 0xE00
502 
503 			data_temp[k] = halrf_get_iqk_psd_data(dm, point_temp);
504 			data_tatal = data_temp[k];
505 			psd->psd_data[j] = (u32)data_tatal;
506 			i++;
507 			j++;
508 		}
509 	} else {
510 		while (i < stop_point) {
511 			data_tatal = 0;
512 
513 			if (i >= point)
514 				point_temp = i - point;
515 			else
516 			{
517 				if (dm->support_ic_type & (ODM_RTL8814B | ODM_RTL8814C))
518 				{
519 					s_point_tmp = i - point - 1;
520 					point_temp = s_point_tmp & 0xfff;
521 				}
522 				else
523 					point_temp = i;
524 			}
525 
526 			for (k = 0; k < average_tmp; k++) {
527 				data_temp[k] = halrf_get_iqk_psd_data(dm, point_temp);
528 				/*data_tatal = data_tatal + (data_temp[k] * data_temp[k]);*/
529 				data_tatal = data_tatal + data_temp[k];
530 
531 #if 0
532 				if ((k % 20) == 0)
533 					DbgPrint("\n ");
534 
535 				DbgPrint("0x%x ", data_temp[k]);
536 #endif
537 			}
538 
539 			data_tatal = phydm_division64((data_tatal * 10), average_tmp);
540 			psd->psd_data[j] = (u32)data_tatal;
541 
542 			i++;
543 			j++;
544 		}
545 
546 		if (dm->support_ic_type & (ODM_RTL8814B | ODM_RTL8198F | ODM_RTL8197G))
547 			odm_set_bb_reg(dm, R_0x1b1c, 0x000e0000, reg_tmp);
548 	}
549 
550 #if 0
551 	DbgPrint("\n [iqk psd]psd result:\n");
552 
553 	for (i = 0; i < psd->buf_size; i++) {
554 		if ((i % 20) == 0)
555 		DbgPrint("\n ");
556 
557 		DbgPrint("0x%x ", psd->psd_data[i]);
558 	}
559 	DbgPrint("\n\n");
560 #endif
561 }
562 
563 
564 u32
halrf_psd_init(void * dm_void)565 halrf_psd_init(
566 	void *dm_void)
567 {
568 	enum rt_status ret_status = RT_STATUS_SUCCESS;
569 	struct dm_struct *dm = (struct dm_struct *)dm_void;
570 	struct _hal_rf_ *rf = &(dm->rf_table);
571 	struct _halrf_psd_data *psd = &(rf->halrf_psd_data);
572 
573 	u32 bb_backup[18];
574 	u32 backup_bb_addr[18] = {0};
575 	u32 bk_counter = 18;
576 
577 	u32 backup_bb_reg[12] = {0x1b04, 0x1b08, 0x1b0c, 0x1b14, 0x1b18,
578 				0x1b1c, 0x1b28, 0x1bcc, 0x1b2c, 0x1b34,
579 				0x1bd4, 0x1bfc};
580 
581 	u32 backup_bb_reg_8723f[11] = {0x09f0, 0x09b4, 0x1c38, 0x1860, 0x1cd0,
582 				 	0x824, 0x2a24, 0x1d40, 0x1c20, 0x1880,
583 				 	0x180c};
584 
585 	u32 backup_bb_reg_8814c[18] = {0x1e24, 0x1cd0, 0x1b08, 0x1d58, 0x1834,
586 					0x4134, 0x5234, 0x5334, 0x180c, 0x410c,
587 					0x520c, 0x530c, 0x186c, 0x416c, 0x526c,
588 					0x536c, 0x1a00, 0x1c38};
589 
590 	if (dm->support_ic_type & ODM_RTL8723F) {
591 		odm_move_memory(dm, backup_bb_addr, backup_bb_reg_8723f,
592 			sizeof(backup_bb_addr));
593 		bk_counter = 11;
594 	} else if (dm->support_ic_type & ODM_RTL8814C) {
595 		odm_move_memory(dm, backup_bb_addr, backup_bb_reg_8814c,
596 			sizeof(backup_bb_addr));
597 		bk_counter = 18;
598 	} else {
599 		odm_move_memory(dm, backup_bb_addr, backup_bb_reg,
600 			sizeof(backup_bb_addr));
601 		bk_counter = 12;
602 	}
603 
604 	if (psd->psd_progress) {
605 		ret_status = RT_STATUS_PENDING;
606 	} else {
607 		psd->psd_progress = 1;
608 		if (dm->support_ic_type & ODM_RTL8723F) {
609 			backup_bb_register(dm, bb_backup, backup_bb_addr, bk_counter);
610 			_halrf_iqk_psd_init_8723f(dm, true);
611 			halrf_iqk_psd(dm, psd->point, psd->start_point, psd->stop_point, psd->average);
612 			_halrf_iqk_psd_init_8723f(dm, false);
613 			restore_bb_register(dm, bb_backup, backup_bb_addr, bk_counter);
614 		} else if (dm->support_ic_type & ODM_RTL8814C) {
615 			backup_bb_register(dm, bb_backup, backup_bb_addr, bk_counter);
616 			_halrf_psd_iqk_init_8814c(dm);
617 			halrf_iqk_psd(dm, psd->point, psd->start_point, psd->stop_point, psd->average);
618 			restore_bb_register(dm, bb_backup, backup_bb_addr, bk_counter);
619 		} else if (dm->support_ic_type &
620 			(ODM_RTL8822C | ODM_RTL8814B | ODM_RTL8198F | ODM_RTL8197G)) {
621 			backup_bb_register(dm, bb_backup, backup_bb_addr, bk_counter);
622 			_halrf_psd_iqk_init(dm);
623 			halrf_iqk_psd(dm, psd->point, psd->start_point, psd->stop_point, psd->average);
624 			restore_bb_register(dm, bb_backup, backup_bb_addr, bk_counter);
625 		} else
626 			halrf_psd(dm, psd->point, psd->start_point, psd->stop_point, psd->average);
627 		psd->psd_progress = 0;
628 	}
629 	return ret_status;
630 }
631 
632 u32
halrf_psd_query(void * dm_void,u32 * outbuf,u32 buf_size)633 halrf_psd_query(
634 	void *dm_void,
635 	u32 *outbuf,
636 	u32 buf_size)
637 {
638 	enum rt_status ret_status = RT_STATUS_SUCCESS;
639 	struct dm_struct *dm = (struct dm_struct *)dm_void;
640 	struct _hal_rf_ *rf = &(dm->rf_table);
641 	struct _halrf_psd_data *psd = &(rf->halrf_psd_data);
642 
643 	if (psd->psd_progress)
644 		ret_status = RT_STATUS_PENDING;
645 	else
646 		odm_move_memory(dm, outbuf, psd->psd_data,
647 				sizeof(u32) * psd->buf_size);
648 
649 	return ret_status;
650 }
651 
652 u32
halrf_psd_init_query(void * dm_void,u32 * outbuf,u32 point,u32 start_point,u32 stop_point,u32 average,u32 buf_size)653 halrf_psd_init_query(
654 	void *dm_void,
655 	u32 *outbuf,
656 	u32 point,
657 	u32 start_point,
658 	u32 stop_point,
659 	u32 average,
660 	u32 buf_size)
661 {
662 	enum rt_status ret_status = RT_STATUS_SUCCESS;
663 	struct dm_struct *dm = (struct dm_struct *)dm_void;
664 	struct _hal_rf_ *rf = &(dm->rf_table);
665 	struct _halrf_psd_data *psd = &(rf->halrf_psd_data);
666 
667 	psd->point = point;
668 	psd->start_point = start_point;
669 	psd->stop_point = stop_point;
670 	psd->average = average;
671 
672 	if (psd->psd_progress) {
673 		ret_status = RT_STATUS_PENDING;
674 	} else {
675 		psd->psd_progress = 1;
676 		halrf_psd(dm, psd->point, psd->start_point, psd->stop_point, psd->average);
677 		odm_move_memory(dm, outbuf, psd->psd_data, 0x400);
678 		psd->psd_progress = 0;
679 	}
680 
681 	return ret_status;
682 }
683