xref: /OK3568_Linux_fs/external/rkwifibt/drivers/rtl8822cs/hal/btc/halbtc8822c.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /******************************************************************************
2*4882a593Smuzhiyun  *
3*4882a593Smuzhiyun  * Copyright(c) 2016 - 2017 Realtek Corporation.
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * This program is free software; you can redistribute it and/or modify it
6*4882a593Smuzhiyun  * under the terms of version 2 of the GNU General Public License as
7*4882a593Smuzhiyun  * published by the Free Software Foundation.
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  * This program is distributed in the hope that it will be useful, but WITHOUT
10*4882a593Smuzhiyun  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11*4882a593Smuzhiyun  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12*4882a593Smuzhiyun  * more details.
13*4882a593Smuzhiyun  *
14*4882a593Smuzhiyun  *****************************************************************************/
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun #include "mp_precomp.h"
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun #if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun static u8 *trace_buf = &gl_btc_trace_buf[0];
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun /* rssi express in percentage % (dbm = % - 100)  */
23*4882a593Smuzhiyun static const u8 wl_rssi_step_8822c[] = {60, 50, 44, 30};
24*4882a593Smuzhiyun static const u8 bt_rssi_step_8822c[] = {8, 15, 20, 25};
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun /* Shared-Antenna Coex Table */
27*4882a593Smuzhiyun static const struct btc_coex_table_para table_sant_8822c[] = {
28*4882a593Smuzhiyun 				{0xffffffff, 0xffffffff}, /*case-0*/
29*4882a593Smuzhiyun 				{0x55555555, 0x55555555},
30*4882a593Smuzhiyun 				{0x66555555, 0x66555555},
31*4882a593Smuzhiyun 				{0xaaaaaaaa, 0xaaaaaaaa},
32*4882a593Smuzhiyun 				{0x5a5a5a5a, 0x5a5a5a5a},
33*4882a593Smuzhiyun 				{0xfafafafa, 0xfafafafa}, /*case-5*/
34*4882a593Smuzhiyun 				{0x6a5a5555, 0xaaaaaaaa},
35*4882a593Smuzhiyun 				{0x6a5a56aa, 0x6a5a56aa},
36*4882a593Smuzhiyun 				{0x6a5a5a5a, 0x6a5a5a5a},
37*4882a593Smuzhiyun 				{0x66555555, 0x5a5a5a5a},
38*4882a593Smuzhiyun 				{0x66555555, 0x6a5a5a5a}, /*case-10*/
39*4882a593Smuzhiyun 				{0x66555555, 0xaaaaaaaa},
40*4882a593Smuzhiyun 				{0x66555555, 0x5a5a5aaa},
41*4882a593Smuzhiyun 				{0x66555555, 0x6aaa5aaa},
42*4882a593Smuzhiyun 				{0x66555555, 0xaaaa5aaa},
43*4882a593Smuzhiyun 				{0x66555555, 0xaaaaaaaa}, /*case-15*/
44*4882a593Smuzhiyun 				{0xffff55ff, 0xfafafafa},
45*4882a593Smuzhiyun 				{0xffff55ff, 0x6afa5afa},
46*4882a593Smuzhiyun 				{0xaaffffaa, 0xfafafafa},
47*4882a593Smuzhiyun 				{0xaa5555aa, 0x5a5a5a5a},
48*4882a593Smuzhiyun 				{0xaa5555aa, 0x6a5a5a5a}, /*case-20*/
49*4882a593Smuzhiyun 				{0xaa5555aa, 0xaaaaaaaa},
50*4882a593Smuzhiyun 				{0xffffffff, 0x5a5a5a5a},
51*4882a593Smuzhiyun 				{0xffffffff, 0x5a5a5a5a},
52*4882a593Smuzhiyun 				{0xffffffff, 0x55555555},
53*4882a593Smuzhiyun 				{0xffffffff, 0x5a5a5aaa}, /*case-25*/
54*4882a593Smuzhiyun 				{0x55555555, 0x5a5a5a5a},
55*4882a593Smuzhiyun 				{0x55555555, 0xaaaaaaaa},
56*4882a593Smuzhiyun 				{0x55555555, 0x6a5a6a5a},
57*4882a593Smuzhiyun 				{0x66556655, 0x66556655},
58*4882a593Smuzhiyun 				{0x66556aaa, 0x6a5a6aaa}, /*case-30*/
59*4882a593Smuzhiyun 				{0xffffffff, 0x5aaa5aaa},
60*4882a593Smuzhiyun 				{0x56555555, 0x5a5a5aaa},
61*4882a593Smuzhiyun 				{0xdaffdaff, 0xdaffdaff},
62*4882a593Smuzhiyun 				{0x6a555a5a, 0x5a5a5a5a},
63*4882a593Smuzhiyun 				{0xe5555555, 0xe5555555}, /*case-35*/
64*4882a593Smuzhiyun 				{0xea5a5a5a, 0xea5a5a5a} };
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun /* Non-Shared-Antenna Coex Table */
67*4882a593Smuzhiyun static const struct btc_coex_table_para table_nsant_8822c[] = {
68*4882a593Smuzhiyun 				{0xffffffff, 0xffffffff}, /*case-100*/
69*4882a593Smuzhiyun 				{0x55555555, 0x55555555},
70*4882a593Smuzhiyun 				{0x66555555, 0x66555555},
71*4882a593Smuzhiyun 				{0xaaaaaaaa, 0xaaaaaaaa},
72*4882a593Smuzhiyun 				{0x5a5a5a5a, 0x5a5a5a5a},
73*4882a593Smuzhiyun 				{0xfafafafa, 0xfafafafa}, /*case-105*/
74*4882a593Smuzhiyun 				{0x5afa5afa, 0x5afa5afa},
75*4882a593Smuzhiyun 				{0x55555555, 0xfafafafa},
76*4882a593Smuzhiyun 				{0x66555555, 0xfafafafa},
77*4882a593Smuzhiyun 				{0x66555555, 0x5a5a5a5a},
78*4882a593Smuzhiyun 				{0x66555555, 0x6a5a5a5a}, /*case-110*/
79*4882a593Smuzhiyun 				{0x66555555, 0xaaaaaaaa},
80*4882a593Smuzhiyun 				{0xffff55ff, 0xfafafafa},
81*4882a593Smuzhiyun 				{0xffff55ff, 0x5afa5afa},
82*4882a593Smuzhiyun 				{0xffff55ff, 0xaaaaaaaa},
83*4882a593Smuzhiyun 				{0xffff55ff, 0xffff55ff}, /*case-115*/
84*4882a593Smuzhiyun 				{0xaaffffaa, 0x5afa5afa},
85*4882a593Smuzhiyun 				{0xaaffffaa, 0xaaaaaaaa},
86*4882a593Smuzhiyun 				{0xffffffff, 0xfafafafa},
87*4882a593Smuzhiyun 				{0xffffffff, 0x5afa5afa},
88*4882a593Smuzhiyun 				{0xffffffff, 0xaaaaaaaa},/*case-120*/
89*4882a593Smuzhiyun 				{0x55ff55ff, 0x5afa5afa},
90*4882a593Smuzhiyun 				{0x55ff55ff, 0xaaaaaaaa},
91*4882a593Smuzhiyun 				{0x55ff55ff, 0x55ff55ff},
92*4882a593Smuzhiyun 				{0x6a555a5a, 0xfafafafa} };
93*4882a593Smuzhiyun 
94*4882a593Smuzhiyun /* Shared-Antenna TDMA*/
95*4882a593Smuzhiyun static const struct btc_tdma_para tdma_sant_8822c[] = {
96*4882a593Smuzhiyun 				{ {0x00, 0x00, 0x00, 0x00, 0x00} }, /*case-0*/
97*4882a593Smuzhiyun 				{ {0x61, 0x45, 0x03, 0x11, 0x11} }, /*case-1*/
98*4882a593Smuzhiyun 				{ {0x61, 0x3a, 0x03, 0x11, 0x11} },
99*4882a593Smuzhiyun 				{ {0x61, 0x30, 0x03, 0x11, 0x11} },
100*4882a593Smuzhiyun 				{ {0x61, 0x20, 0x03, 0x11, 0x11} },
101*4882a593Smuzhiyun 				{ {0x61, 0x10, 0x03, 0x11, 0x11} }, /*case-5*/
102*4882a593Smuzhiyun 				{ {0x61, 0x45, 0x03, 0x11, 0x10} },
103*4882a593Smuzhiyun 				{ {0x61, 0x3a, 0x03, 0x11, 0x10} },
104*4882a593Smuzhiyun 				{ {0x61, 0x30, 0x03, 0x11, 0x10} },
105*4882a593Smuzhiyun 				{ {0x61, 0x20, 0x03, 0x11, 0x10} },
106*4882a593Smuzhiyun 				{ {0x61, 0x10, 0x03, 0x11, 0x10} }, /*case-10*/
107*4882a593Smuzhiyun 				{ {0x61, 0x08, 0x03, 0x11, 0x14} },
108*4882a593Smuzhiyun 				{ {0x61, 0x08, 0x03, 0x10, 0x14} },
109*4882a593Smuzhiyun 				{ {0x51, 0x08, 0x03, 0x10, 0x54} },
110*4882a593Smuzhiyun 				{ {0x51, 0x08, 0x03, 0x10, 0x55} },
111*4882a593Smuzhiyun 				{ {0x51, 0x08, 0x07, 0x10, 0x54} }, /*case-15*/
112*4882a593Smuzhiyun 				{ {0x51, 0x45, 0x03, 0x10, 0x50} },
113*4882a593Smuzhiyun 				{ {0x51, 0x3a, 0x03, 0x10, 0x50} },
114*4882a593Smuzhiyun 				{ {0x51, 0x30, 0x03, 0x10, 0x50} },
115*4882a593Smuzhiyun 				{ {0x51, 0x20, 0x03, 0x10, 0x50} },
116*4882a593Smuzhiyun 				{ {0x51, 0x10, 0x03, 0x10, 0x50} }, /*case-20*/
117*4882a593Smuzhiyun 				{ {0x51, 0x4a, 0x03, 0x10, 0x50} },
118*4882a593Smuzhiyun 				{ {0x51, 0x0c, 0x03, 0x10, 0x54} },
119*4882a593Smuzhiyun 				{ {0x55, 0x08, 0x03, 0x10, 0x54} },
120*4882a593Smuzhiyun 				{ {0x65, 0x10, 0x03, 0x11, 0x10} },
121*4882a593Smuzhiyun 				{ {0x51, 0x10, 0x03, 0x10, 0x51} }, /*case-25*/
122*4882a593Smuzhiyun 				{ {0x51, 0x08, 0x03, 0x10, 0x50} },
123*4882a593Smuzhiyun 				{ {0x61, 0x08, 0x03, 0x11, 0x11} } };
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun 
126*4882a593Smuzhiyun /* Non-Shared-Antenna TDMA*/
127*4882a593Smuzhiyun static const struct btc_tdma_para tdma_nsant_8822c[] = {
128*4882a593Smuzhiyun 				{ {0x00, 0x00, 0x00, 0x00, 0x00} }, /*case-100*/
129*4882a593Smuzhiyun 				{ {0x61, 0x45, 0x03, 0x11, 0x11} }, /*case-101*/
130*4882a593Smuzhiyun 				{ {0x61, 0x3a, 0x03, 0x11, 0x11} },
131*4882a593Smuzhiyun 				{ {0x61, 0x30, 0x03, 0x11, 0x11} },
132*4882a593Smuzhiyun 				{ {0x61, 0x20, 0x03, 0x11, 0x11} },
133*4882a593Smuzhiyun 				{ {0x61, 0x10, 0x03, 0x11, 0x11} }, /*case-105*/
134*4882a593Smuzhiyun 				{ {0x61, 0x45, 0x03, 0x11, 0x10} },
135*4882a593Smuzhiyun 				{ {0x61, 0x3a, 0x03, 0x11, 0x10} },
136*4882a593Smuzhiyun 				{ {0x61, 0x30, 0x03, 0x11, 0x10} },
137*4882a593Smuzhiyun 				{ {0x61, 0x20, 0x03, 0x11, 0x10} },
138*4882a593Smuzhiyun 				{ {0x61, 0x10, 0x03, 0x11, 0x10} }, /*case-110*/
139*4882a593Smuzhiyun 				{ {0x61, 0x08, 0x03, 0x11, 0x14} },
140*4882a593Smuzhiyun 				{ {0x61, 0x08, 0x03, 0x10, 0x14} },
141*4882a593Smuzhiyun 				{ {0x51, 0x08, 0x03, 0x10, 0x54} },
142*4882a593Smuzhiyun 				{ {0x51, 0x08, 0x03, 0x10, 0x55} },
143*4882a593Smuzhiyun 				{ {0x51, 0x08, 0x07, 0x10, 0x54} }, /*case-115*/
144*4882a593Smuzhiyun 				{ {0x51, 0x45, 0x03, 0x10, 0x50} },
145*4882a593Smuzhiyun 				{ {0x51, 0x3a, 0x03, 0x10, 0x50} },
146*4882a593Smuzhiyun 				{ {0x51, 0x30, 0x03, 0x10, 0x50} },
147*4882a593Smuzhiyun 				{ {0x51, 0x20, 0x03, 0x10, 0x50} },
148*4882a593Smuzhiyun 				{ {0x51, 0x10, 0x03, 0x10, 0x50} }, /*case-120*/
149*4882a593Smuzhiyun 				{ {0x51, 0x08, 0x03, 0x10, 0x50} },
150*4882a593Smuzhiyun 				{ {0x61, 0x30, 0x03, 0x10, 0x11} },
151*4882a593Smuzhiyun 				{ {0x61, 0x08, 0x03, 0x10, 0x11} },
152*4882a593Smuzhiyun 				{ {0x61, 0x08, 0x07, 0x10, 0x14} },
153*4882a593Smuzhiyun 				{ {0x61, 0x08, 0x03, 0x10, 0x10} }, /*case-125*/
154*4882a593Smuzhiyun 				{ {0x61, 0x08, 0x03, 0x11, 0x15} } };
155*4882a593Smuzhiyun 
156*4882a593Smuzhiyun /* wl_tx_dec_power, bt_tx_dec_power, wl_rx_gain, bt_rx_lna_constrain */
157*4882a593Smuzhiyun static const struct btc_rf_para rf_para_tx_8822c[] = {
158*4882a593Smuzhiyun 				{0, 0, FALSE, 7},  /* for normal */
159*4882a593Smuzhiyun 				{0, 16, FALSE, 7}, /* for WL-CPT */
160*4882a593Smuzhiyun 				{16, 4, TRUE, 4},  /* 2 for RCU SDR */
161*4882a593Smuzhiyun 				{15, 5, TRUE, 4},
162*4882a593Smuzhiyun 				{7, 8, TRUE, 4},
163*4882a593Smuzhiyun 				{6, 10, TRUE, 4},
164*4882a593Smuzhiyun 				{16, 4, TRUE, 4}, /* 6 for RCU OFC */
165*4882a593Smuzhiyun 				{15, 5, TRUE, 4},
166*4882a593Smuzhiyun 				{7, 8, TRUE, 4},
167*4882a593Smuzhiyun 				{6, 10, TRUE, 4},
168*4882a593Smuzhiyun 				{16, 4, TRUE, 4}, /* 10 for A2DP SDR */
169*4882a593Smuzhiyun 				{15, 5, TRUE, 4},
170*4882a593Smuzhiyun 				{7, 8, TRUE, 4},
171*4882a593Smuzhiyun 				{6, 10, TRUE, 4},
172*4882a593Smuzhiyun 				{16, 4, TRUE, 4}, /* 14 for A2DP OFC */
173*4882a593Smuzhiyun 				{15, 5, TRUE, 4},
174*4882a593Smuzhiyun 				{7, 8, TRUE, 4},
175*4882a593Smuzhiyun 				{6, 10, TRUE, 4},
176*4882a593Smuzhiyun 				{16, 4, TRUE, 4}, /* 18 for A2DP+RCU SDR */
177*4882a593Smuzhiyun 				{15, 5, TRUE, 4},
178*4882a593Smuzhiyun 				{7, 8, TRUE, 4},
179*4882a593Smuzhiyun 				{6, 10, TRUE, 4},
180*4882a593Smuzhiyun 				{16, 4, TRUE, 4}, /* 22 for A2DP+RCU OFC */
181*4882a593Smuzhiyun 				{15, 5, TRUE, 4},
182*4882a593Smuzhiyun 				{7, 8, TRUE, 4},
183*4882a593Smuzhiyun 				{6, 10, TRUE, 4} };
184*4882a593Smuzhiyun 
185*4882a593Smuzhiyun static const struct btc_rf_para rf_para_rx_8822c[] = {
186*4882a593Smuzhiyun 				{0, 0, FALSE, 7},  /* for normal */
187*4882a593Smuzhiyun 				{0, 16, FALSE, 7}, /* for WL-CPT */
188*4882a593Smuzhiyun 				{14, 5, TRUE, 5}, /* 2 for RCU SDR */
189*4882a593Smuzhiyun 				{13, 6, TRUE, 5},
190*4882a593Smuzhiyun 				{6, 9, TRUE, 5},
191*4882a593Smuzhiyun 				{4, 11, TRUE, 5},
192*4882a593Smuzhiyun 				{16, 4, TRUE, 4}, /* 6 for RCU OFC */
193*4882a593Smuzhiyun 				{15, 5, TRUE, 4},
194*4882a593Smuzhiyun 				{7, 8, TRUE, 4},
195*4882a593Smuzhiyun 				{6, 10, TRUE, 4},
196*4882a593Smuzhiyun 				{16, 4, TRUE, 4}, /* 10 for A2DP SDR */
197*4882a593Smuzhiyun 				{15, 5, TRUE, 4},
198*4882a593Smuzhiyun 				{7, 8, TRUE, 4},
199*4882a593Smuzhiyun 				{6, 10, TRUE, 4},
200*4882a593Smuzhiyun 				{16, 4, TRUE, 4}, /* 14 for A2DP OFC */
201*4882a593Smuzhiyun 				{15, 5, TRUE, 4},
202*4882a593Smuzhiyun 				{7, 8, TRUE, 4},
203*4882a593Smuzhiyun 				{6, 10, TRUE, 4},
204*4882a593Smuzhiyun 				{16, 4, TRUE, 4}, /* 18 for A2DP+RCU SDR */
205*4882a593Smuzhiyun 				{15, 5, TRUE, 4},
206*4882a593Smuzhiyun 				{7, 8, TRUE, 4},
207*4882a593Smuzhiyun 				{6, 10, TRUE, 4},
208*4882a593Smuzhiyun 				{16, 4, TRUE, 4}, /* 22 for A2DP+RCU OFC */
209*4882a593Smuzhiyun 				{15, 5, TRUE, 4},
210*4882a593Smuzhiyun 				{7, 8, TRUE, 4},
211*4882a593Smuzhiyun 				{6, 10, TRUE, 4} };
212*4882a593Smuzhiyun 
213*4882a593Smuzhiyun const struct btc_5g_afh_map afh_5g_8822c[] = { {0, 0, 0} };
214*4882a593Smuzhiyun 
215*4882a593Smuzhiyun const struct btc_chip_para btc_chip_para_8822c = {
216*4882a593Smuzhiyun 	"8822c",				/*.chip_name */
217*4882a593Smuzhiyun 	20211210,				/*.para_ver_date */
218*4882a593Smuzhiyun 	0x27,					/*.para_ver */
219*4882a593Smuzhiyun 	0x20,					/* bt_desired_ver */
220*4882a593Smuzhiyun 	0x7001c,				/* wl_desired_ver */
221*4882a593Smuzhiyun 	TRUE,					/* scbd_support */
222*4882a593Smuzhiyun 	0xaa,					/* scbd_reg*/
223*4882a593Smuzhiyun 	BTC_SCBD_16_BIT,			/* scbd_bit_num */
224*4882a593Smuzhiyun 	TRUE,					/* mailbox_support*/
225*4882a593Smuzhiyun 	TRUE,					/* lte_indirect_access */
226*4882a593Smuzhiyun 	TRUE,					/* new_scbd10_def */
227*4882a593Smuzhiyun 	BTC_INDIRECT_1700,			/* indirect_type */
228*4882a593Smuzhiyun 	BTC_PSTDMA_FORCE_LPSOFF,		/* pstdma_type */
229*4882a593Smuzhiyun 	BTC_BTRSSI_DBM,				/* bt_rssi_type */
230*4882a593Smuzhiyun 	15,					/*.ant_isolation */
231*4882a593Smuzhiyun 	2,					/*.rssi_tolerance */
232*4882a593Smuzhiyun 	2,					/* rx_path_num */
233*4882a593Smuzhiyun 	ARRAY_SIZE(wl_rssi_step_8822c),		/*.wl_rssi_step_num */
234*4882a593Smuzhiyun 	wl_rssi_step_8822c,			/*.wl_rssi_step */
235*4882a593Smuzhiyun 	ARRAY_SIZE(bt_rssi_step_8822c),		/*.bt_rssi_step_num */
236*4882a593Smuzhiyun 	bt_rssi_step_8822c,			/*.bt_rssi_step */
237*4882a593Smuzhiyun 	ARRAY_SIZE(table_sant_8822c),		/*.table_sant_num */
238*4882a593Smuzhiyun 	table_sant_8822c,			/*.table_sant = */
239*4882a593Smuzhiyun 	ARRAY_SIZE(table_nsant_8822c),		/*.table_nsant_num */
240*4882a593Smuzhiyun 	table_nsant_8822c,			/*.table_nsant = */
241*4882a593Smuzhiyun 	ARRAY_SIZE(tdma_sant_8822c),		/*.tdma_sant_num */
242*4882a593Smuzhiyun 	tdma_sant_8822c,			/*.tdma_sant = */
243*4882a593Smuzhiyun 	ARRAY_SIZE(tdma_nsant_8822c),		/*.tdma_nsant_num */
244*4882a593Smuzhiyun 	tdma_nsant_8822c,			/*.tdma_nsant */
245*4882a593Smuzhiyun 	ARRAY_SIZE(rf_para_tx_8822c),		/* wl_rf_para_tx_num */
246*4882a593Smuzhiyun 	rf_para_tx_8822c,		        /* wl_rf_para_tx */
247*4882a593Smuzhiyun 	rf_para_rx_8822c,		        /* wl_rf_para_rx */
248*4882a593Smuzhiyun 	0x24,					/*.bt_afh_span_bw20 */
249*4882a593Smuzhiyun 	0x36,					/*.bt_afh_span_bw40 */
250*4882a593Smuzhiyun 	ARRAY_SIZE(afh_5g_8822c),		/*.afh_5g_num */
251*4882a593Smuzhiyun 	afh_5g_8822c,				/*.afh_5g */
252*4882a593Smuzhiyun 	halbtc8822c_chip_setup			/* chip_setup function */
253*4882a593Smuzhiyun };
254*4882a593Smuzhiyun 
halbtc8822c_cfg_init(struct btc_coexist * btc)255*4882a593Smuzhiyun void halbtc8822c_cfg_init(struct btc_coexist *btc)
256*4882a593Smuzhiyun {
257*4882a593Smuzhiyun 	u8 u8tmp = 0;
258*4882a593Smuzhiyun 
259*4882a593Smuzhiyun 	/* enable TBTT nterrupt */
260*4882a593Smuzhiyun 	btc->btc_write_1byte_bitmask(btc, 0x550, 0x8, 0x1);
261*4882a593Smuzhiyun 
262*4882a593Smuzhiyun 	/* BT report packet sample rate	 */
263*4882a593Smuzhiyun 	/* 0x790[5:0]=0x5 */
264*4882a593Smuzhiyun 	btc->btc_write_1byte(btc, 0x790, 0x5);
265*4882a593Smuzhiyun 
266*4882a593Smuzhiyun 	/* Enable BT counter statistics */
267*4882a593Smuzhiyun 	btc->btc_write_1byte(btc, 0x778, 0x1);
268*4882a593Smuzhiyun 
269*4882a593Smuzhiyun 	/* Enable PTA (3-wire function form BT side) */
270*4882a593Smuzhiyun 	btc->btc_write_1byte_bitmask(btc, 0x40, 0x20, 0x1);
271*4882a593Smuzhiyun 	btc->btc_write_1byte_bitmask(btc, 0x41, 0x02, 0x1);
272*4882a593Smuzhiyun 
273*4882a593Smuzhiyun 	/* Enable PTA (tx/rx signal form WiFi side) */
274*4882a593Smuzhiyun 	btc->btc_write_1byte_bitmask(btc, 0x4c6, BIT(4), 0x1);
275*4882a593Smuzhiyun 	btc->btc_write_1byte_bitmask(btc, 0x4c6, BIT(5), 0x0);
276*4882a593Smuzhiyun 	/*GNT_BT=1 while select both */
277*4882a593Smuzhiyun 	btc->btc_write_1byte_bitmask(btc, 0x763, BIT(4), 0x1);
278*4882a593Smuzhiyun 
279*4882a593Smuzhiyun 	/* BT_CCA = ~GNT_WL_BB, (not or GNT_BT_BB, LTE_Rx */
280*4882a593Smuzhiyun 	btc->btc_write_1byte_bitmask(btc, 0x4fc, 0x3, 0x0);
281*4882a593Smuzhiyun 
282*4882a593Smuzhiyun 	/* To avoid RF parameter error */
283*4882a593Smuzhiyun 	btc->btc_set_rf_reg(btc, BTC_RF_B, 0x1, 0xfffff, 0x40000);
284*4882a593Smuzhiyun }
285*4882a593Smuzhiyun 
halbtc8822c_cfg_ant_switch(struct btc_coexist * btc)286*4882a593Smuzhiyun void halbtc8822c_cfg_ant_switch(struct btc_coexist *btc)
287*4882a593Smuzhiyun {}
288*4882a593Smuzhiyun 
halbtc8822c_cfg_gnt_fix(struct btc_coexist * btc)289*4882a593Smuzhiyun void halbtc8822c_cfg_gnt_fix(struct btc_coexist *btc)
290*4882a593Smuzhiyun {
291*4882a593Smuzhiyun 	struct btc_coex_sta *coex_sta = &btc->coex_sta;
292*4882a593Smuzhiyun 	struct btc_wifi_link_info_ext *link_info_ext = &btc->wifi_link_info_ext;
293*4882a593Smuzhiyun 	u32 val = 0x40000;
294*4882a593Smuzhiyun 
295*4882a593Smuzhiyun 	/* Because WL-S1 5G RF TRX mask affect by GNT_BT
296*4882a593Smuzhiyun 	 * Set debug mode on: GNT_BT=0, GNT_WL=1, BT at BTG
297*4882a593Smuzhiyun 	 */
298*4882a593Smuzhiyun 	if (coex_sta->kt_ver == 0 &&
299*4882a593Smuzhiyun 	    coex_sta->wl_coex_mode == BTC_WLINK_5G)
300*4882a593Smuzhiyun 		val = 0x40021;
301*4882a593Smuzhiyun 	else if (coex_sta->coex_freerun) /* WL S1 force to GNT_WL=1, GNT_BT=0 */
302*4882a593Smuzhiyun 		val = 0x40021;
303*4882a593Smuzhiyun 	else
304*4882a593Smuzhiyun 		val = 0x40000;
305*4882a593Smuzhiyun 
306*4882a593Smuzhiyun 	if (btc->board_info.btdm_ant_num == 1) /* BT at S1 for 2-Ant */
307*4882a593Smuzhiyun 		val = val | BIT(13);
308*4882a593Smuzhiyun 
309*4882a593Smuzhiyun 	btc->btc_set_rf_reg(btc, BTC_RF_B, 0x1, 0xfffff, val);
310*4882a593Smuzhiyun 
311*4882a593Smuzhiyun 	/* Because WL-S0 2G RF TRX can't masked by GNT_BT
312*4882a593Smuzhiyun 	 * enable "WLS0 BB chage RF mode if GNT_BT = 1" for shared-antenna type
313*4882a593Smuzhiyun 	 * disable:0x1860[3] = 1, enable:0x1860[3] = 0
314*4882a593Smuzhiyun 	 *
315*4882a593Smuzhiyun 	 * enable "AFE DAC off if GNT_WL = 0"
316*4882a593Smuzhiyun 	 * disable 0x1c30[22] = 0,
317*4882a593Smuzhiyun 	 * enable: 0x1c30[22] = 1, 0x1c38[12] = 0, 0x1c38[28] = 1
318*4882a593Smuzhiyun 	 */
319*4882a593Smuzhiyun 	if (coex_sta->wl_coex_mode == BTC_WLINK_2GFREE) {
320*4882a593Smuzhiyun 		btc->btc_write_1byte_bitmask(btc, 0x1c32, BIT(6), 0);
321*4882a593Smuzhiyun 	} else {
322*4882a593Smuzhiyun 		btc->btc_write_1byte_bitmask(btc, 0x1c32, BIT(6), 1);
323*4882a593Smuzhiyun 		btc->btc_write_1byte_bitmask(btc, 0x1c39, BIT(4), 0);
324*4882a593Smuzhiyun 		btc->btc_write_1byte_bitmask(btc, 0x1c3b, BIT(4), 1);
325*4882a593Smuzhiyun 	}
326*4882a593Smuzhiyun 
327*4882a593Smuzhiyun 	/* disable WLS1 BB chage RF mode if GNT_BT
328*4882a593Smuzhiyun 	 * since RF TRx mask can do it
329*4882a593Smuzhiyun 	 */
330*4882a593Smuzhiyun 	btc->btc_write_1byte_bitmask(btc, 0x4160, BIT(3), 1);
331*4882a593Smuzhiyun 
332*4882a593Smuzhiyun 	/* for kt_ver >= 3: 0x1860[3] = 0
333*4882a593Smuzhiyun 	 * always set "WLS0 BB chage RF mode if GNT_WL = 0"
334*4882a593Smuzhiyun 	 * But the BB DAC will be turned off by GNT_BT = 1
335*4882a593Smuzhiyun 	 * 0x1ca7[3] = 1, "don't off BB DAC if GNT_BT = 1"
336*4882a593Smuzhiyun 	 */
337*4882a593Smuzhiyun 	if (coex_sta->wl_coex_mode == BTC_WLINK_2GFREE) {
338*4882a593Smuzhiyun 		btc->btc_write_1byte_bitmask(btc, 0x1860, BIT(3), 1);
339*4882a593Smuzhiyun 		btc->btc_write_1byte_bitmask(btc, 0x1ca7, BIT(3), 1);
340*4882a593Smuzhiyun 	} else if (coex_sta->wl_coex_mode == BTC_WLINK_5G ||
341*4882a593Smuzhiyun 		   link_info_ext->is_all_under_5g) {
342*4882a593Smuzhiyun 		if (coex_sta->kt_ver >= 3) {
343*4882a593Smuzhiyun 			btc->btc_write_1byte_bitmask(btc, 0x1860, BIT(3), 0);
344*4882a593Smuzhiyun 			btc->btc_write_1byte_bitmask(btc, 0x1ca7, BIT(3), 1);
345*4882a593Smuzhiyun 		} else {
346*4882a593Smuzhiyun 			btc->btc_write_1byte_bitmask(btc, 0x1860, BIT(3), 1);
347*4882a593Smuzhiyun 		}
348*4882a593Smuzhiyun 	} else if (btc->board_info.btdm_ant_num == 2 ||
349*4882a593Smuzhiyun 		   coex_sta->wl_coex_mode == BTC_WLINK_25GMPORT) {
350*4882a593Smuzhiyun 		/* non-shared-antenna or MCC-2band */
351*4882a593Smuzhiyun 		if (coex_sta->kt_ver >= 3) {
352*4882a593Smuzhiyun 			btc->btc_write_1byte_bitmask(btc, 0x1860, BIT(3), 0);
353*4882a593Smuzhiyun 			btc->btc_write_1byte_bitmask(btc, 0x1ca7, BIT(3), 1);
354*4882a593Smuzhiyun 		} else {
355*4882a593Smuzhiyun 			btc->btc_write_1byte_bitmask(btc, 0x1860, BIT(3), 1);
356*4882a593Smuzhiyun 		}
357*4882a593Smuzhiyun 	} else { /* shared-antenna */
358*4882a593Smuzhiyun 		btc->btc_write_1byte_bitmask(btc, 0x1860, BIT(3), 0);
359*4882a593Smuzhiyun 		if (coex_sta->kt_ver >= 3)
360*4882a593Smuzhiyun 			btc->btc_write_1byte_bitmask(btc, 0x1ca7, BIT(3), 0);
361*4882a593Smuzhiyun 	}
362*4882a593Smuzhiyun }
363*4882a593Smuzhiyun 
halbtc8822c_cfg_gnt_debug(struct btc_coexist * btc)364*4882a593Smuzhiyun void halbtc8822c_cfg_gnt_debug(struct btc_coexist *btc)
365*4882a593Smuzhiyun {
366*4882a593Smuzhiyun 	btc->btc_write_1byte_bitmask(btc, 0x66, BIT(4), 0);
367*4882a593Smuzhiyun 	btc->btc_write_1byte_bitmask(btc, 0x67, BIT(0), 0);
368*4882a593Smuzhiyun 	btc->btc_write_1byte_bitmask(btc, 0x42, BIT(3), 0);
369*4882a593Smuzhiyun 	btc->btc_write_1byte_bitmask(btc, 0x65, BIT(7), 0);
370*4882a593Smuzhiyun 	/* btc->btc_write_1byte_bitmask(btc, 0x73, BIT(3), 0); */
371*4882a593Smuzhiyun }
372*4882a593Smuzhiyun 
halbtc8822c_cfg_rfe_type(struct btc_coexist * btc)373*4882a593Smuzhiyun void halbtc8822c_cfg_rfe_type(struct btc_coexist *btc)
374*4882a593Smuzhiyun {
375*4882a593Smuzhiyun 	struct btc_coex_sta *coex_sta = &btc->coex_sta;
376*4882a593Smuzhiyun 	struct btc_rfe_type *rfe_type = &btc->rfe_type;
377*4882a593Smuzhiyun 	struct btc_board_info *board_info = &btc->board_info;
378*4882a593Smuzhiyun 
379*4882a593Smuzhiyun 	rfe_type->rfe_module_type = board_info->rfe_type;
380*4882a593Smuzhiyun 	rfe_type->ant_switch_polarity = 0;
381*4882a593Smuzhiyun 	rfe_type->ant_switch_exist = FALSE;
382*4882a593Smuzhiyun 	rfe_type->ant_switch_with_bt = FALSE;
383*4882a593Smuzhiyun 	rfe_type->ant_switch_type = BTC_SWITCH_NONE;
384*4882a593Smuzhiyun 	rfe_type->ant_switch_diversity = FALSE;
385*4882a593Smuzhiyun 
386*4882a593Smuzhiyun 	rfe_type->band_switch_exist = FALSE;
387*4882a593Smuzhiyun 	rfe_type->band_switch_type = 0;
388*4882a593Smuzhiyun 	rfe_type->band_switch_polarity = 0;
389*4882a593Smuzhiyun 
390*4882a593Smuzhiyun 	if (btc->board_info.btdm_ant_num == 1)
391*4882a593Smuzhiyun 		rfe_type->wlg_at_btg = TRUE;
392*4882a593Smuzhiyun 	else
393*4882a593Smuzhiyun 		rfe_type->wlg_at_btg = FALSE;
394*4882a593Smuzhiyun 
395*4882a593Smuzhiyun 	coex_sta->rf4ce_en = FALSE;
396*4882a593Smuzhiyun 
397*4882a593Smuzhiyun 	/* Disable LTE Coex Function in WiFi side */
398*4882a593Smuzhiyun 	btc->btc_write_linderct(btc, 0x38, BIT(7), 0);
399*4882a593Smuzhiyun 
400*4882a593Smuzhiyun 	/* BTC_CTT_WL_VS_LTE  */
401*4882a593Smuzhiyun 	btc->btc_write_linderct(btc, 0xa0, 0xffff, 0xffff);
402*4882a593Smuzhiyun 
403*4882a593Smuzhiyun 	/*  BTC_CTT_BT_VS_LTE */
404*4882a593Smuzhiyun 	btc->btc_write_linderct(btc, 0xa4, 0xffff, 0xffff);
405*4882a593Smuzhiyun }
406*4882a593Smuzhiyun 
halbtc8822c_cfg_coexinfo_hw(struct btc_coexist * btc)407*4882a593Smuzhiyun void halbtc8822c_cfg_coexinfo_hw(struct btc_coexist *btc)
408*4882a593Smuzhiyun {
409*4882a593Smuzhiyun 	u8 *cli_buf = btc->cli_buf, u8tmp[4];
410*4882a593Smuzhiyun 	u16 u16tmp[4];
411*4882a593Smuzhiyun 	u32 u32tmp[4];
412*4882a593Smuzhiyun 	boolean lte_coex_on = FALSE;
413*4882a593Smuzhiyun 
414*4882a593Smuzhiyun 	u32tmp[0] = btc->btc_read_linderct(btc, 0x38);
415*4882a593Smuzhiyun 	u32tmp[1] = btc->btc_read_linderct(btc, 0x54);
416*4882a593Smuzhiyun 	u8tmp[0] = btc->btc_read_1byte(btc, 0x73);
417*4882a593Smuzhiyun 	lte_coex_on = ((u32tmp[0] & BIT(7)) >> 7) ? TRUE : FALSE;
418*4882a593Smuzhiyun 
419*4882a593Smuzhiyun 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %s",
420*4882a593Smuzhiyun 		   "LTE Coex/Path Owner", ((lte_coex_on) ? "On" : "Off"),
421*4882a593Smuzhiyun 		   ((u8tmp[0] & BIT(2)) ? "WL" : "BT"));
422*4882a593Smuzhiyun 	CL_PRINTF(cli_buf);
423*4882a593Smuzhiyun 
424*4882a593Smuzhiyun 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
425*4882a593Smuzhiyun 		   "\r\n %-35s = RF:%s_BB:%s/ RF:%s_BB:%s/ %s",
426*4882a593Smuzhiyun 		   "GNT_WL_Ctrl/GNT_BT_Ctrl/Dbg",
427*4882a593Smuzhiyun 		   ((u32tmp[0] & BIT(12)) ? "SW" : "HW"),
428*4882a593Smuzhiyun 		   ((u32tmp[0] & BIT(8)) ? "SW" : "HW"),
429*4882a593Smuzhiyun 		   ((u32tmp[0] & BIT(14)) ? "SW" : "HW"),
430*4882a593Smuzhiyun 		   ((u32tmp[0] & BIT(10)) ? "SW" : "HW"),
431*4882a593Smuzhiyun 		   ((u8tmp[0] & BIT(3)) ? "On" : "Off"));
432*4882a593Smuzhiyun 	CL_PRINTF(cli_buf);
433*4882a593Smuzhiyun 
434*4882a593Smuzhiyun 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
435*4882a593Smuzhiyun 		   "GNT_WL/GNT_BT", (int)((u32tmp[1] & BIT(2)) >> 2),
436*4882a593Smuzhiyun 		   (int)((u32tmp[1] & BIT(3)) >> 3));
437*4882a593Smuzhiyun 	CL_PRINTF(cli_buf);
438*4882a593Smuzhiyun 
439*4882a593Smuzhiyun 	u32tmp[0] = btc->btc_read_4byte(btc, 0x1c38);
440*4882a593Smuzhiyun 	u8tmp[0] = btc->btc_read_1byte(btc, 0x1860);
441*4882a593Smuzhiyun 	u8tmp[1] = btc->btc_read_1byte(btc, 0x4160);
442*4882a593Smuzhiyun 	u8tmp[2] = btc->btc_read_1byte(btc, 0x1c32);
443*4882a593Smuzhiyun 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
444*4882a593Smuzhiyun 		   "\r\n %-35s = %d/ %d/ %d/ %d",
445*4882a593Smuzhiyun 		   "1860[3]/4160[3]/1c30[22]/1c38[28]",
446*4882a593Smuzhiyun 		   (int)((u8tmp[0] & BIT(3)) >> 3),
447*4882a593Smuzhiyun 		   (int)((u8tmp[1] & BIT(3)) >> 3),
448*4882a593Smuzhiyun 		   (int)((u8tmp[2] & BIT(6)) >> 6),
449*4882a593Smuzhiyun 		   (int)((u32tmp[0] & BIT(28)) >> 28));
450*4882a593Smuzhiyun 	CL_PRINTF(cli_buf);
451*4882a593Smuzhiyun 
452*4882a593Smuzhiyun 	u32tmp[0] = btc->btc_read_4byte(btc, 0x430);
453*4882a593Smuzhiyun 	u32tmp[1] = btc->btc_read_4byte(btc, 0x434);
454*4882a593Smuzhiyun 	u16tmp[0] = btc->btc_read_2byte(btc, 0x42a);
455*4882a593Smuzhiyun 	u16tmp[1] = btc->btc_read_1byte(btc, 0x454);
456*4882a593Smuzhiyun 	u8tmp[0] = btc->btc_read_1byte(btc, 0x426);
457*4882a593Smuzhiyun 	u8tmp[1] = btc->btc_read_1byte(btc, 0x45e);
458*4882a593Smuzhiyun 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
459*4882a593Smuzhiyun 		   "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x/ 0x%x/ 0x%x",
460*4882a593Smuzhiyun 		   "430/434/42a/426/45e[3]/454",
461*4882a593Smuzhiyun 		   u32tmp[0], u32tmp[1], u16tmp[0], u8tmp[0],
462*4882a593Smuzhiyun 		   (int)((u8tmp[1] & BIT(3)) >> 3), u16tmp[1]);
463*4882a593Smuzhiyun 	CL_PRINTF(cli_buf);
464*4882a593Smuzhiyun 
465*4882a593Smuzhiyun 	u32tmp[0] = btc->btc_read_4byte(btc, 0x4c);
466*4882a593Smuzhiyun 	u8tmp[2] = btc->btc_read_1byte(btc, 0x64);
467*4882a593Smuzhiyun 	u8tmp[0] = btc->btc_read_1byte(btc, 0x4c6);
468*4882a593Smuzhiyun 	u8tmp[1] = btc->btc_read_1byte(btc, 0x40);
469*4882a593Smuzhiyun 
470*4882a593Smuzhiyun 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
471*4882a593Smuzhiyun 		   "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x/ 0x%x",
472*4882a593Smuzhiyun 		   "4c[24:23]/64[0]/4c6[4]/40[5]/RF_0x1",
473*4882a593Smuzhiyun 		   (int)(u32tmp[0] & (BIT(24) | BIT(23))) >> 23, u8tmp[2] & 0x1,
474*4882a593Smuzhiyun 		   (int)((u8tmp[0] & BIT(4)) >> 4),
475*4882a593Smuzhiyun 		   (int)((u8tmp[1] & BIT(5)) >> 5),
476*4882a593Smuzhiyun 		   (int)(btc->btc_get_rf_reg(btc, BTC_RF_B, 0x1, 0xfffff)));
477*4882a593Smuzhiyun 	CL_PRINTF(cli_buf);
478*4882a593Smuzhiyun 
479*4882a593Smuzhiyun 	u32tmp[0] = btc->btc_read_4byte(btc, 0x550);
480*4882a593Smuzhiyun 	u8tmp[0] = btc->btc_read_1byte(btc, 0x522);
481*4882a593Smuzhiyun 	u8tmp[1] = btc->btc_read_1byte(btc, 0x953);
482*4882a593Smuzhiyun 	u8tmp[2] = btc->btc_read_1byte(btc, 0xc50);
483*4882a593Smuzhiyun 
484*4882a593Smuzhiyun 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
485*4882a593Smuzhiyun 		   "\r\n %-35s = 0x%x/ 0x%x/ %s/ 0x%x",
486*4882a593Smuzhiyun 		   "550/522/4-RxAGC/c50", u32tmp[0], u8tmp[0],
487*4882a593Smuzhiyun 		   (u8tmp[1] & 0x2) ? "On" : "Off", u8tmp[2]);
488*4882a593Smuzhiyun 	CL_PRINTF(cli_buf);
489*4882a593Smuzhiyun }
490*4882a593Smuzhiyun 
halbtc8822c_cfg_wl_tx_power(struct btc_coexist * btc)491*4882a593Smuzhiyun void halbtc8822c_cfg_wl_tx_power(struct btc_coexist *btc)
492*4882a593Smuzhiyun {
493*4882a593Smuzhiyun 	struct btc_coex_dm *coex_dm = &btc->coex_dm;
494*4882a593Smuzhiyun 
495*4882a593Smuzhiyun 	btc->btc_reduce_wl_tx_power(btc, coex_dm->cur_wl_pwr_lvl);
496*4882a593Smuzhiyun }
497*4882a593Smuzhiyun 
halbtc8822c_cfg_wl_rx_gain(struct btc_coexist * btc)498*4882a593Smuzhiyun void halbtc8822c_cfg_wl_rx_gain(struct btc_coexist *btc)
499*4882a593Smuzhiyun {
500*4882a593Smuzhiyun 	struct btc_coex_dm *coex_dm = &btc->coex_dm;
501*4882a593Smuzhiyun 	struct btc_wifi_link_info_ext *link_info_ext = &btc->wifi_link_info_ext;
502*4882a593Smuzhiyun 	u8 i;
503*4882a593Smuzhiyun 
504*4882a593Smuzhiyun 	/* WL Rx Low gain on  */
505*4882a593Smuzhiyun 	static const u32	wl_rx_gain_on_HT20[] = {0xff000003,
506*4882a593Smuzhiyun 		0xbd120003, 0xbe100003, 0xbf080003, 0xbf060003, 0xbf050003,
507*4882a593Smuzhiyun 		0xbc140003, 0xbb160003, 0xba180003, 0xb91a0003, 0xb81c0003,
508*4882a593Smuzhiyun 		0xb71e0003, 0xb4200003, 0xb5220003, 0xb4240003, 0xb3260003,
509*4882a593Smuzhiyun 		0xb2280003, 0xb12a0003, 0xb02c0003, 0xaf2e0003, 0xae300003,
510*4882a593Smuzhiyun 		0xad320003, 0xac340003, 0xab360003, 0x8d380003, 0x8c3a0003,
511*4882a593Smuzhiyun 		0x8b3c0003, 0x8a3e0003, 0x6e400003, 0x6d420003, 0x6c440003,
512*4882a593Smuzhiyun 		0x6b460003, 0x6a480003, 0x694a0003, 0x684c0003, 0x674e0003,
513*4882a593Smuzhiyun 		0x66500003, 0x65520003, 0x64540003, 0x64560003, 0x007e0403};
514*4882a593Smuzhiyun 
515*4882a593Smuzhiyun 	static const u32	wl_rx_gain_on_HT40[] = {0xff000003,
516*4882a593Smuzhiyun 		0xbd120003, 0xbe100003, 0xbf080003, 0xbf060003, 0xbf050003,
517*4882a593Smuzhiyun 		0xbc140003, 0xbb160003, 0xba180003, 0xb91a0003, 0xb81c0003,
518*4882a593Smuzhiyun 		0xb71e0003, 0xb4200003, 0xb5220003, 0xb4240003, 0xb3260003,
519*4882a593Smuzhiyun 		0xb2280003, 0xb12a0003, 0xb02c0003, 0xaf2e0003, 0xae300003,
520*4882a593Smuzhiyun 		0xad320003, 0xac340003, 0xab360003, 0x8d380003, 0x8c3a0003,
521*4882a593Smuzhiyun 		0x8b3c0003, 0x8a3e0003, 0x6e400003, 0x6d420003, 0x6c440003,
522*4882a593Smuzhiyun 		0x6b460003, 0x6a480003, 0x694a0003, 0x684c0003, 0x674e0003,
523*4882a593Smuzhiyun 		0x66500003, 0x65520003, 0x64540003, 0x64560003, 0x007e0403};
524*4882a593Smuzhiyun 
525*4882a593Smuzhiyun 	/* WL Rx Low gain off  */
526*4882a593Smuzhiyun 	static const u32	wl_rx_gain_off_HT20[] = {0xff000003,
527*4882a593Smuzhiyun 		0xf4120003, 0xf5100003, 0xf60e0003, 0xf70c0003, 0xf80a0003,
528*4882a593Smuzhiyun 		0xf3140003, 0xf2160003, 0xf1180003, 0xf01a0003, 0xef1c0003,
529*4882a593Smuzhiyun 		0xee1e0003, 0xed200003, 0xec220003, 0xeb240003, 0xea260003,
530*4882a593Smuzhiyun 		0xe9280003, 0xe82a0003, 0xe72c0003, 0xe62e0003, 0xe5300003,
531*4882a593Smuzhiyun 		0xc8320003, 0xc7340003, 0xc6360003, 0xc5380003, 0xc43a0003,
532*4882a593Smuzhiyun 		0xc33c0003, 0xc23e0003, 0xc1400003, 0xc0420003, 0xa5440003,
533*4882a593Smuzhiyun 		0xa4460003, 0xa3480003, 0xa24a0003, 0xa14c0003, 0x834e0003,
534*4882a593Smuzhiyun 		0x82500003, 0x81520003, 0x80540003, 0x65560003, 0x007e0403};
535*4882a593Smuzhiyun 
536*4882a593Smuzhiyun 	static const u32	wl_rx_gain_off_HT40[] = {0xff000003,
537*4882a593Smuzhiyun 		0xf4120003, 0xf5100003, 0xf60e0003, 0xf70c0003, 0xf80a0003,
538*4882a593Smuzhiyun 		0xf3140003, 0xf2160003, 0xf1180003, 0xf01a0003, 0xef1c0003,
539*4882a593Smuzhiyun 		0xee1e0003, 0xed200003, 0xec220003, 0xeb240003, 0xea260003,
540*4882a593Smuzhiyun 		0xe9280003, 0xe82a0003, 0xe72c0003, 0xe62e0003, 0xe5300003,
541*4882a593Smuzhiyun 		0xc8320003, 0xc7340003, 0xc6360003, 0xc5380003, 0xc43a0003,
542*4882a593Smuzhiyun 		0xc33c0003, 0xc23e0003, 0xc1400003, 0xc0420003, 0xa5440003,
543*4882a593Smuzhiyun 		0xa4460003, 0xa3480003, 0xa24a0003, 0xa14c0003, 0x834e0003,
544*4882a593Smuzhiyun 		0x82500003, 0x81520003, 0x80540003, 0x65560003, 0x007e0403};
545*4882a593Smuzhiyun 
546*4882a593Smuzhiyun 	u32		*wl_rx_gain_on, *wl_rx_gain_off;
547*4882a593Smuzhiyun 
548*4882a593Smuzhiyun 	if (coex_dm->cur_wl_rx_low_gain_en) {
549*4882a593Smuzhiyun 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
550*4882a593Smuzhiyun 			    "[BTCoex], Hi-Li Table On!\n");
551*4882a593Smuzhiyun 		BTC_TRACE(trace_buf);
552*4882a593Smuzhiyun #if 0
553*4882a593Smuzhiyun 		if (link_info_ext->wifi_bw == BTC_WIFI_BW_HT40)
554*4882a593Smuzhiyun 			wl_rx_gain_on = wl_rx_gain_on_HT40;
555*4882a593Smuzhiyun 		else
556*4882a593Smuzhiyun 			wl_rx_gain_on = wl_rx_gain_on_HT20;
557*4882a593Smuzhiyun 		for (i = 0; i < ARRAY_SIZE(wl_rx_gain_on); i++)
558*4882a593Smuzhiyun 			btc->btc_write_4byte(btc, 0x1d90, wl_rx_gain_on[i]);
559*4882a593Smuzhiyun 
560*4882a593Smuzhiyun 		/* set Rx filter corner RCK offset */
561*4882a593Smuzhiyun 		btc->btc_set_rf_reg(btc, BTC_RF_A, 0xde, 0xfffff, 0x22);
562*4882a593Smuzhiyun 		btc->btc_set_rf_reg(btc, BTC_RF_A, 0x1d, 0xfffff, 0x36);
563*4882a593Smuzhiyun 		btc->btc_set_rf_reg(btc, BTC_RF_B, 0xde, 0xfffff, 0x22);
564*4882a593Smuzhiyun 		btc->btc_set_rf_reg(btc, BTC_RF_B, 0x1d, 0xfffff, 0x36);
565*4882a593Smuzhiyun #endif
566*4882a593Smuzhiyun 	} else {
567*4882a593Smuzhiyun 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
568*4882a593Smuzhiyun 			    "[BTCoex], Hi-Li Table Off!\n");
569*4882a593Smuzhiyun 		BTC_TRACE(trace_buf);
570*4882a593Smuzhiyun 
571*4882a593Smuzhiyun #if 0
572*4882a593Smuzhiyun 		if (link_info_ext->wifi_bw == BTC_WIFI_BW_HT40)
573*4882a593Smuzhiyun 			wl_rx_gain_off = wl_rx_gain_off_HT40;
574*4882a593Smuzhiyun 		else
575*4882a593Smuzhiyun 			wl_rx_gain_off = wl_rx_gain_off_HT20;
576*4882a593Smuzhiyun 		for (i = 0; i < ARRAY_SIZE(wl_rx_gain_off); i++)
577*4882a593Smuzhiyun 			btc->btc_write_4byte(btc, 0x1d90, wl_rx_gain_off[i]);
578*4882a593Smuzhiyun 
579*4882a593Smuzhiyun 		/* set Rx filter corner RCK offset */
580*4882a593Smuzhiyun 		btc->btc_set_rf_reg(btc, BTC_RF_A, 0xde, 0xfffff, 0x20);
581*4882a593Smuzhiyun 		btc->btc_set_rf_reg(btc, BTC_RF_A, 0x1d, 0xfffff, 0x0);
582*4882a593Smuzhiyun 		btc->btc_set_rf_reg(btc, BTC_RF_B, 0xde, 0xfffff, 0x20);
583*4882a593Smuzhiyun 		btc->btc_set_rf_reg(btc, BTC_RF_B, 0x1d, 0xfffff, 0x0);
584*4882a593Smuzhiyun #endif
585*4882a593Smuzhiyun 
586*4882a593Smuzhiyun 	}
587*4882a593Smuzhiyun }
588*4882a593Smuzhiyun 
halbtc8822c_cfg_wlan_act_ips(struct btc_coexist * btc)589*4882a593Smuzhiyun void halbtc8822c_cfg_wlan_act_ips(struct btc_coexist *btc)
590*4882a593Smuzhiyun {}
591*4882a593Smuzhiyun 
halbtc8822c_cfg_bt_ctrl_act(struct btc_coexist * btc)592*4882a593Smuzhiyun void halbtc8822c_cfg_bt_ctrl_act(struct btc_coexist *btc)
593*4882a593Smuzhiyun {}
594*4882a593Smuzhiyun 
halbtc8822c_chip_setup(struct btc_coexist * btc,u8 type)595*4882a593Smuzhiyun void halbtc8822c_chip_setup(struct btc_coexist *btc, u8 type)
596*4882a593Smuzhiyun {
597*4882a593Smuzhiyun 	switch (type) {
598*4882a593Smuzhiyun 	case BTC_CSETUP_INIT_HW:
599*4882a593Smuzhiyun 		halbtc8822c_cfg_init(btc);
600*4882a593Smuzhiyun 		break;
601*4882a593Smuzhiyun 	case BTC_CSETUP_ANT_SWITCH:
602*4882a593Smuzhiyun 		halbtc8822c_cfg_ant_switch(btc);
603*4882a593Smuzhiyun 		break;
604*4882a593Smuzhiyun 	case BTC_CSETUP_GNT_FIX:
605*4882a593Smuzhiyun 		halbtc8822c_cfg_gnt_fix(btc);
606*4882a593Smuzhiyun 		break;
607*4882a593Smuzhiyun 	case BTC_CSETUP_GNT_DEBUG:
608*4882a593Smuzhiyun 		halbtc8822c_cfg_gnt_debug(btc);
609*4882a593Smuzhiyun 		break;
610*4882a593Smuzhiyun 	case BTC_CSETUP_RFE_TYPE:
611*4882a593Smuzhiyun 		halbtc8822c_cfg_rfe_type(btc);
612*4882a593Smuzhiyun 		break;
613*4882a593Smuzhiyun 	case BTC_CSETUP_COEXINFO_HW:
614*4882a593Smuzhiyun 		halbtc8822c_cfg_coexinfo_hw(btc);
615*4882a593Smuzhiyun 		break;
616*4882a593Smuzhiyun 	case BTC_CSETUP_WL_TX_POWER:
617*4882a593Smuzhiyun 		halbtc8822c_cfg_wl_tx_power(btc);
618*4882a593Smuzhiyun 		break;
619*4882a593Smuzhiyun 	case BTC_CSETUP_WL_RX_GAIN:
620*4882a593Smuzhiyun 		halbtc8822c_cfg_wl_rx_gain(btc);
621*4882a593Smuzhiyun 		break;
622*4882a593Smuzhiyun 	case BTC_CSETUP_WLAN_ACT_IPS:
623*4882a593Smuzhiyun 		halbtc8822c_cfg_wlan_act_ips(btc);
624*4882a593Smuzhiyun 		break;
625*4882a593Smuzhiyun 	case BTC_CSETUP_BT_CTRL_ACT:
626*4882a593Smuzhiyun 		halbtc8822c_cfg_bt_ctrl_act(btc);
627*4882a593Smuzhiyun 		break;
628*4882a593Smuzhiyun 	}
629*4882a593Smuzhiyun }
630*4882a593Smuzhiyun #endif
631