1*4882a593Smuzhiyun /******************************************************************************
2*4882a593Smuzhiyun *
3*4882a593Smuzhiyun * Copyright(c) 2013 - 2017 Realtek Corporation.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify it
6*4882a593Smuzhiyun * under the terms of version 2 of the GNU General Public License as
7*4882a593Smuzhiyun * published by the Free Software Foundation.
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * This program is distributed in the hope that it will be useful, but WITHOUT
10*4882a593Smuzhiyun * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11*4882a593Smuzhiyun * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12*4882a593Smuzhiyun * more details.
13*4882a593Smuzhiyun *
14*4882a593Smuzhiyun *****************************************************************************/
15*4882a593Smuzhiyun #ifndef __RTW_ODM_H__
16*4882a593Smuzhiyun #define __RTW_ODM_H__
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun #include <drv_types.h>
19*4882a593Smuzhiyun #include "../hal/phydm/phydm_types.h"
20*4882a593Smuzhiyun /*
21*4882a593Smuzhiyun * This file provides utilities/wrappers for rtw driver to use ODM
22*4882a593Smuzhiyun */
23*4882a593Smuzhiyun typedef enum _HAL_PHYDM_OPS {
24*4882a593Smuzhiyun HAL_PHYDM_DIS_ALL_FUNC,
25*4882a593Smuzhiyun HAL_PHYDM_FUNC_SET,
26*4882a593Smuzhiyun HAL_PHYDM_FUNC_CLR,
27*4882a593Smuzhiyun HAL_PHYDM_ABILITY_BK,
28*4882a593Smuzhiyun HAL_PHYDM_ABILITY_RESTORE,
29*4882a593Smuzhiyun HAL_PHYDM_ABILITY_SET,
30*4882a593Smuzhiyun HAL_PHYDM_ABILITY_GET,
31*4882a593Smuzhiyun } HAL_PHYDM_OPS;
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun #define DYNAMIC_FUNC_DISABLE (0x0)
35*4882a593Smuzhiyun u32 rtw_phydm_ability_ops(_adapter *adapter, HAL_PHYDM_OPS ops, u32 ability);
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun #define rtw_phydm_func_disable_all(adapter) \
38*4882a593Smuzhiyun rtw_phydm_ability_ops(adapter, HAL_PHYDM_DIS_ALL_FUNC, 0)
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun #ifdef CONFIG_RTW_ACS
41*4882a593Smuzhiyun #define rtw_phydm_func_for_offchannel(adapter) \
42*4882a593Smuzhiyun do { \
43*4882a593Smuzhiyun rtw_phydm_ability_ops(adapter, HAL_PHYDM_DIS_ALL_FUNC, 0); \
44*4882a593Smuzhiyun if (rtw_odm_adaptivity_needed(adapter)) \
45*4882a593Smuzhiyun rtw_phydm_ability_ops(adapter, HAL_PHYDM_FUNC_SET, ODM_BB_ADAPTIVITY); \
46*4882a593Smuzhiyun if (IS_ACS_ENABLE(adapter))\
47*4882a593Smuzhiyun rtw_phydm_ability_ops(adapter, HAL_PHYDM_FUNC_SET, ODM_BB_ENV_MONITOR); \
48*4882a593Smuzhiyun } while (0)
49*4882a593Smuzhiyun #else
50*4882a593Smuzhiyun #define rtw_phydm_func_for_offchannel(adapter) \
51*4882a593Smuzhiyun do { \
52*4882a593Smuzhiyun rtw_phydm_ability_ops(adapter, HAL_PHYDM_DIS_ALL_FUNC, 0); \
53*4882a593Smuzhiyun if (rtw_odm_adaptivity_needed(adapter)) \
54*4882a593Smuzhiyun rtw_phydm_ability_ops(adapter, HAL_PHYDM_FUNC_SET, ODM_BB_ADAPTIVITY); \
55*4882a593Smuzhiyun } while (0)
56*4882a593Smuzhiyun #endif
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun #define rtw_phydm_func_clr(adapter, ability) \
59*4882a593Smuzhiyun rtw_phydm_ability_ops(adapter, HAL_PHYDM_FUNC_CLR, ability)
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun #define rtw_phydm_ability_backup(adapter) \
62*4882a593Smuzhiyun rtw_phydm_ability_ops(adapter, HAL_PHYDM_ABILITY_BK, 0)
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun #define rtw_phydm_ability_restore(adapter) \
65*4882a593Smuzhiyun rtw_phydm_ability_ops(adapter, HAL_PHYDM_ABILITY_RESTORE, 0)
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun
rtw_phydm_ability_get(_adapter * adapter)68*4882a593Smuzhiyun static inline u32 rtw_phydm_ability_get(_adapter *adapter)
69*4882a593Smuzhiyun {
70*4882a593Smuzhiyun return rtw_phydm_ability_ops(adapter, HAL_PHYDM_ABILITY_GET, 0);
71*4882a593Smuzhiyun }
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun void rtw_odm_init_ic_type(_adapter *adapter);
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun void rtw_odm_adaptivity_config_msg(void *sel, _adapter *adapter);
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun bool rtw_odm_adaptivity_needed(_adapter *adapter);
79*4882a593Smuzhiyun void rtw_odm_adaptivity_update(struct dvobj_priv *dvobj);
80*4882a593Smuzhiyun void rtw_odm_adaptivity_parm_msg(void *sel, _adapter *adapter);
81*4882a593Smuzhiyun void rtw_odm_adaptivity_parm_set(_adapter *adapter, s8 th_l2h_ini, s8 th_edcca_hl_diff);
82*4882a593Smuzhiyun void rtw_odm_get_perpkt_rssi(void *sel, _adapter *adapter);
83*4882a593Smuzhiyun void rtw_odm_acquirespinlock(_adapter *adapter, enum rt_spinlock_type type);
84*4882a593Smuzhiyun void rtw_odm_releasespinlock(_adapter *adapter, enum rt_spinlock_type type);
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun struct dm_struct;
87*4882a593Smuzhiyun s16 rtw_odm_get_tx_power_mbm(struct dm_struct *dm, u8 rfpath, u8 rate, u8 bw, u8 cch);
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun #ifdef CONFIG_DFS_MASTER
90*4882a593Smuzhiyun void rtw_odm_radar_detect_reset(_adapter *adapter);
91*4882a593Smuzhiyun void rtw_odm_radar_detect_disable(_adapter *adapter);
92*4882a593Smuzhiyun void rtw_odm_radar_detect_enable(_adapter *adapter);
93*4882a593Smuzhiyun BOOLEAN rtw_odm_radar_detect(_adapter *adapter);
94*4882a593Smuzhiyun void rtw_odm_update_dfs_region(struct dvobj_priv *dvobj);
95*4882a593Smuzhiyun u8 rtw_odm_radar_detect_polling_int_ms(struct dvobj_priv *dvobj);
96*4882a593Smuzhiyun #endif /* CONFIG_DFS_MASTER */
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun void rtw_odm_parse_rx_phy_status_chinfo(union recv_frame *rframe, u8 *phys);
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun #if defined(CONFIG_RTL8822C) && defined(CONFIG_LPS_PG)
101*4882a593Smuzhiyun void odm_lps_pg_debug_8822c(void *dm_void);
102*4882a593Smuzhiyun #endif
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun #endif /* __RTW_ODM_H__ */
105