1*4882a593Smuzhiyun /****************************************************************************** 2*4882a593Smuzhiyun * 3*4882a593Smuzhiyun * Copyright(c) 2007 - 2017 Realtek Corporation. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify it 6*4882a593Smuzhiyun * under the terms of version 2 of the GNU General Public License as 7*4882a593Smuzhiyun * published by the Free Software Foundation. 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * This program is distributed in the hope that it will be useful, but WITHOUT 10*4882a593Smuzhiyun * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11*4882a593Smuzhiyun * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12*4882a593Smuzhiyun * more details. 13*4882a593Smuzhiyun * 14*4882a593Smuzhiyun *****************************************************************************/ 15*4882a593Smuzhiyun #ifndef __RTL8188F_XMIT_H__ 16*4882a593Smuzhiyun #define __RTL8188F_XMIT_H__ 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun #define MAX_TID (15) 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun #ifndef __INC_HAL8188FDESC_H 23*4882a593Smuzhiyun #define __INC_HAL8188FDESC_H 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun #define RX_STATUS_DESC_SIZE_8188F 24 26*4882a593Smuzhiyun #define RX_DRV_INFO_SIZE_UNIT_8188F 8 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun /* DWORD 0 */ 30*4882a593Smuzhiyun #define SET_RX_STATUS_DESC_PKT_LEN_8188F(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 0, 14, __Value) 31*4882a593Smuzhiyun #define SET_RX_STATUS_DESC_EOR_8188F(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 30, 1, __Value) 32*4882a593Smuzhiyun #define SET_RX_STATUS_DESC_OWN_8188F(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 31, 1, __Value) 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_PKT_LEN_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 0, 14) 35*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_CRC32_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 14, 1) 36*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_ICV_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 15, 1) 37*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_DRVINFO_SIZE_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 4) 38*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_SECURITY_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 20, 3) 39*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_QOS_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 23, 1) 40*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_SHIFT_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 24, 2) 41*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_PHY_STATUS_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 26, 1) 42*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_SWDEC_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 27, 1) 43*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_LAST_SEG_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 28, 1) 44*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_FIRST_SEG_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 29, 1) 45*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_EOR_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 30, 1) 46*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_OWN_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 31, 1) 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun /* DWORD 1 */ 49*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_MACID_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 0, 7) 50*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_TID_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 8, 4) 51*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_AMSDU_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 13, 1) 52*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_RXID_MATCH_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 14, 1) 53*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_PAGGR_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 15, 1) 54*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_A1_FIT_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 16, 4) 55*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_CHKERR_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 20, 1) 56*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_IPVER_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 21, 1) 57*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_IS_TCPUDP__8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 22, 1) 58*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_CHK_VLD_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 23, 1) 59*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_PAM_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 24, 1) 60*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_PWR_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 25, 1) 61*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_MORE_DATA_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 26, 1) 62*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_MORE_FRAG_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 27, 1) 63*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_TYPE_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 28, 2) 64*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_MC_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 30, 1) 65*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_BC_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 31, 1) 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun /* DWORD 2 */ 68*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_SEQ_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 0, 12) 69*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_FRAG_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 12, 4) 70*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_RX_IS_QOS_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 16, 1) 71*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_WLANHD_IV_LEN_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 18, 6) 72*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_RPT_SEL_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 28, 1) 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun /* DWORD 3 */ 75*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_RX_RATE_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 0, 7) 76*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_HTC_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 10, 1) 77*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_EOSP_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 11, 1) 78*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_BSSID_FIT_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 12, 2) 79*4882a593Smuzhiyun #ifdef CONFIG_USB_RX_AGGREGATION 80*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_USB_AGG_PKTNUM_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 16, 8) 81*4882a593Smuzhiyun #endif 82*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_PATTERN_MATCH_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+12, 29, 1) 83*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_UNICAST_MATCH_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+12, 30, 1) 84*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_MAGIC_MATCH_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+12, 31, 1) 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun /* DWORD 6 */ 87*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_SPLCP_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+16, 0, 1) 88*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_LDPC_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+16, 1, 1) 89*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_STBC_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+16, 2, 1) 90*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_BW_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+16, 4, 2) 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun /* DWORD 5 */ 93*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_TSFL_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+20, 0, 32) 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_BUFF_ADDR_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+24, 0, 32) 96*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_BUFF_ADDR64_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+28, 0, 32) 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun #define SET_RX_STATUS_DESC_BUFF_ADDR_8188F(__pRxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxDesc+24, 0, 32, __Value) 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun /* Dword 0 */ 102*4882a593Smuzhiyun #define GET_TX_DESC_OWN_8188F(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc, 31, 1) 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun #define SET_TX_DESC_PKT_SIZE_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 16, __Value) 105*4882a593Smuzhiyun #define SET_TX_DESC_OFFSET_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 8, __Value) 106*4882a593Smuzhiyun #define SET_TX_DESC_BMC_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 24, 1, __Value) 107*4882a593Smuzhiyun #define SET_TX_DESC_HTC_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 25, 1, __Value) 108*4882a593Smuzhiyun #define SET_TX_DESC_LAST_SEG_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 26, 1, __Value) 109*4882a593Smuzhiyun #define SET_TX_DESC_FIRST_SEG_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 27, 1, __Value) 110*4882a593Smuzhiyun #define SET_TX_DESC_LINIP_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 28, 1, __Value) 111*4882a593Smuzhiyun #define SET_TX_DESC_NO_ACM_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 29, 1, __Value) 112*4882a593Smuzhiyun #define SET_TX_DESC_GF_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 30, 1, __Value) 113*4882a593Smuzhiyun #define SET_TX_DESC_OWN_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value) 114*4882a593Smuzhiyun 115*4882a593Smuzhiyun /* Dword 1 */ 116*4882a593Smuzhiyun #define SET_TX_DESC_MACID_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 7, __Value) 117*4882a593Smuzhiyun #define SET_TX_DESC_QUEUE_SEL_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 8, 5, __Value) 118*4882a593Smuzhiyun #define SET_TX_DESC_RDG_NAV_EXT_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 13, 1, __Value) 119*4882a593Smuzhiyun #define SET_TX_DESC_LSIG_TXOP_EN_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 14, 1, __Value) 120*4882a593Smuzhiyun #define SET_TX_DESC_PIFS_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 15, 1, __Value) 121*4882a593Smuzhiyun #define SET_TX_DESC_RATE_ID_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 16, 5, __Value) 122*4882a593Smuzhiyun #define SET_TX_DESC_EN_DESC_ID_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 21, 1, __Value) 123*4882a593Smuzhiyun #define SET_TX_DESC_SEC_TYPE_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 22, 2, __Value) 124*4882a593Smuzhiyun #define SET_TX_DESC_PKT_OFFSET_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 24, 5, __Value) 125*4882a593Smuzhiyun 126*4882a593Smuzhiyun 127*4882a593Smuzhiyun /* Dword 2 */ 128*4882a593Smuzhiyun #define SET_TX_DESC_PAID_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 0, 9, __Value) 129*4882a593Smuzhiyun #define SET_TX_DESC_CCA_RTS_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 10, 2, __Value) 130*4882a593Smuzhiyun #define SET_TX_DESC_AGG_ENABLE_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 12, 1, __Value) 131*4882a593Smuzhiyun #define SET_TX_DESC_RDG_ENABLE_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 13, 1, __Value) 132*4882a593Smuzhiyun #define SET_TX_DESC_AGG_BREAK_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 16, 1, __Value) 133*4882a593Smuzhiyun #define SET_TX_DESC_MORE_FRAG_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 17, 1, __Value) 134*4882a593Smuzhiyun #define SET_TX_DESC_RAW_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 18, 1, __Value) 135*4882a593Smuzhiyun #define SET_TX_DESC_SPE_RPT_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 19, 1, __Value) 136*4882a593Smuzhiyun #define SET_TX_DESC_AMPDU_DENSITY_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 20, 3, __Value) 137*4882a593Smuzhiyun #define SET_TX_DESC_BT_INT_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 23, 1, __Value) 138*4882a593Smuzhiyun #define SET_TX_DESC_GID_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 6, __Value) 139*4882a593Smuzhiyun 140*4882a593Smuzhiyun 141*4882a593Smuzhiyun /* Dword 3 */ 142*4882a593Smuzhiyun #define SET_TX_DESC_WHEADER_LEN_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 0, 4, __Value) 143*4882a593Smuzhiyun #define SET_TX_DESC_CHK_EN_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 4, 1, __Value) 144*4882a593Smuzhiyun #define SET_TX_DESC_EARLY_MODE_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 5, 1, __Value) 145*4882a593Smuzhiyun #define SET_TX_DESC_HWSEQ_SEL_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 6, 2, __Value) 146*4882a593Smuzhiyun #define SET_TX_DESC_USE_RATE_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 8, 1, __Value) 147*4882a593Smuzhiyun #define SET_TX_DESC_DISABLE_RTS_FB_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 9, 1, __Value) 148*4882a593Smuzhiyun #define SET_TX_DESC_DISABLE_FB_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 10, 1, __Value) 149*4882a593Smuzhiyun #define SET_TX_DESC_CTS2SELF_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 11, 1, __Value) 150*4882a593Smuzhiyun #define SET_TX_DESC_RTS_ENABLE_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 12, 1, __Value) 151*4882a593Smuzhiyun #define SET_TX_DESC_HW_RTS_ENABLE_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 13, 1, __Value) 152*4882a593Smuzhiyun #define SET_TX_DESC_NAV_USE_HDR_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 15, 1, __Value) 153*4882a593Smuzhiyun #define SET_TX_DESC_USE_MAX_LEN_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 16, 1, __Value) 154*4882a593Smuzhiyun #define SET_TX_DESC_MAX_AGG_NUM_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 17, 5, __Value) 155*4882a593Smuzhiyun #define SET_TX_DESC_NDPA_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 22, 2, __Value) 156*4882a593Smuzhiyun #define SET_TX_DESC_AMPDU_MAX_TIME_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 24, 8, __Value) 157*4882a593Smuzhiyun 158*4882a593Smuzhiyun /* Dword 4 */ 159*4882a593Smuzhiyun #define SET_TX_DESC_TX_RATE_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 0, 7, __Value) 160*4882a593Smuzhiyun #define SET_TX_DESC_DATA_RATE_FB_LIMIT_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 8, 5, __Value) 161*4882a593Smuzhiyun #define SET_TX_DESC_RTS_RATE_FB_LIMIT_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 13, 4, __Value) 162*4882a593Smuzhiyun #define SET_TX_DESC_RETRY_LIMIT_ENABLE_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 17, 1, __Value) 163*4882a593Smuzhiyun #define SET_TX_DESC_DATA_RETRY_LIMIT_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 18, 6, __Value) 164*4882a593Smuzhiyun #define SET_TX_DESC_RTS_RATE_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 24, 5, __Value) 165*4882a593Smuzhiyun 166*4882a593Smuzhiyun 167*4882a593Smuzhiyun /* Dword 5 */ 168*4882a593Smuzhiyun #define SET_TX_DESC_DATA_SC_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 0, 4, __Value) 169*4882a593Smuzhiyun #define SET_TX_DESC_DATA_SHORT_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 4, 1, __Value) 170*4882a593Smuzhiyun #define SET_TX_DESC_DATA_BW_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 5, 2, __Value) 171*4882a593Smuzhiyun #define SET_TX_DESC_DATA_LDPC_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 7, 1, __Value) 172*4882a593Smuzhiyun #define SET_TX_DESC_DATA_STBC_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 8, 2, __Value) 173*4882a593Smuzhiyun #define SET_TX_DESC_CTROL_STBC_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 10, 2, __Value) 174*4882a593Smuzhiyun #define SET_TX_DESC_RTS_SHORT_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 12, 1, __Value) 175*4882a593Smuzhiyun #define SET_TX_DESC_RTS_SC_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 13, 4, __Value) 176*4882a593Smuzhiyun 177*4882a593Smuzhiyun 178*4882a593Smuzhiyun /* Dword 6 */ 179*4882a593Smuzhiyun #define SET_TX_DESC_SW_DEFINE_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 0, 12, __Value) 180*4882a593Smuzhiyun #define SET_TX_DESC_MBSSID_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 12, 4, __Value) 181*4882a593Smuzhiyun #define SET_TX_DESC_ANTSEL_A_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 16, 3, __Value) 182*4882a593Smuzhiyun #define SET_TX_DESC_ANTSEL_B_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 19, 3, __Value) 183*4882a593Smuzhiyun #define SET_TX_DESC_ANTSEL_C_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 22, 3, __Value) 184*4882a593Smuzhiyun #define SET_TX_DESC_ANTSEL_D_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 25, 3, __Value) 185*4882a593Smuzhiyun 186*4882a593Smuzhiyun /* Dword 7 */ 187*4882a593Smuzhiyun #ifdef CONFIG_PCI_HCI 188*4882a593Smuzhiyun #define SET_TX_DESC_TX_BUFFER_SIZE_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) 189*4882a593Smuzhiyun #endif 190*4882a593Smuzhiyun 191*4882a593Smuzhiyun #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_USB_HCI) 192*4882a593Smuzhiyun #define SET_TX_DESC_TX_DESC_CHECKSUM_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) 193*4882a593Smuzhiyun #endif 194*4882a593Smuzhiyun #define SET_TX_DESC_USB_TXAGG_NUM_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 24, 8, __Value) 195*4882a593Smuzhiyun #ifdef CONFIG_SDIO_HCI 196*4882a593Smuzhiyun #define SET_TX_DESC_SDIO_TXSEQ_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 16, 8, __Value) 197*4882a593Smuzhiyun #endif 198*4882a593Smuzhiyun 199*4882a593Smuzhiyun /* Dword 8 */ 200*4882a593Smuzhiyun #define SET_TX_DESC_HWSEQ_EN_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 15, 1, __Value) 201*4882a593Smuzhiyun 202*4882a593Smuzhiyun /* Dword 9 */ 203*4882a593Smuzhiyun #define SET_TX_DESC_SEQ_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 12, 12, __Value) 204*4882a593Smuzhiyun 205*4882a593Smuzhiyun /* Dword 10 */ 206*4882a593Smuzhiyun #define SET_TX_DESC_TX_BUFFER_ADDRESS_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+40, 0, 32, __Value) 207*4882a593Smuzhiyun #define GET_TX_DESC_TX_BUFFER_ADDRESS_8188F(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+40, 0, 32) 208*4882a593Smuzhiyun 209*4882a593Smuzhiyun /* Dword 11 */ 210*4882a593Smuzhiyun #define SET_TX_DESC_NEXT_DESC_ADDRESS_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+48, 0, 32, __Value) 211*4882a593Smuzhiyun 212*4882a593Smuzhiyun 213*4882a593Smuzhiyun #define SET_EARLYMODE_PKTNUM_8188F(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 4, __Value) 214*4882a593Smuzhiyun #define SET_EARLYMODE_LEN0_8188F(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 15, __Value) 215*4882a593Smuzhiyun #define SET_EARLYMODE_LEN1_1_8188F(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 19, 13, __Value) 216*4882a593Smuzhiyun #define SET_EARLYMODE_LEN1_2_8188F(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 2, __Value) 217*4882a593Smuzhiyun #define SET_EARLYMODE_LEN2_8188F(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 2, 15, __Value) 218*4882a593Smuzhiyun #define SET_EARLYMODE_LEN3_8188F(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 17, 15, __Value) 219*4882a593Smuzhiyun 220*4882a593Smuzhiyun #endif 221*4882a593Smuzhiyun /* ----------------------------------------------------------- 222*4882a593Smuzhiyun * 223*4882a593Smuzhiyun * Rate 224*4882a593Smuzhiyun * 225*4882a593Smuzhiyun * ----------------------------------------------------------- 226*4882a593Smuzhiyun * CCK Rates, TxHT = 0 */ 227*4882a593Smuzhiyun #define DESC8188F_RATE1M 0x00 228*4882a593Smuzhiyun #define DESC8188F_RATE2M 0x01 229*4882a593Smuzhiyun #define DESC8188F_RATE5_5M 0x02 230*4882a593Smuzhiyun #define DESC8188F_RATE11M 0x03 231*4882a593Smuzhiyun 232*4882a593Smuzhiyun /* OFDM Rates, TxHT = 0 */ 233*4882a593Smuzhiyun #define DESC8188F_RATE6M 0x04 234*4882a593Smuzhiyun #define DESC8188F_RATE9M 0x05 235*4882a593Smuzhiyun #define DESC8188F_RATE12M 0x06 236*4882a593Smuzhiyun #define DESC8188F_RATE18M 0x07 237*4882a593Smuzhiyun #define DESC8188F_RATE24M 0x08 238*4882a593Smuzhiyun #define DESC8188F_RATE36M 0x09 239*4882a593Smuzhiyun #define DESC8188F_RATE48M 0x0a 240*4882a593Smuzhiyun #define DESC8188F_RATE54M 0x0b 241*4882a593Smuzhiyun 242*4882a593Smuzhiyun /* MCS Rates, TxHT = 1 */ 243*4882a593Smuzhiyun #define DESC8188F_RATEMCS0 0x0c 244*4882a593Smuzhiyun #define DESC8188F_RATEMCS1 0x0d 245*4882a593Smuzhiyun #define DESC8188F_RATEMCS2 0x0e 246*4882a593Smuzhiyun #define DESC8188F_RATEMCS3 0x0f 247*4882a593Smuzhiyun #define DESC8188F_RATEMCS4 0x10 248*4882a593Smuzhiyun #define DESC8188F_RATEMCS5 0x11 249*4882a593Smuzhiyun #define DESC8188F_RATEMCS6 0x12 250*4882a593Smuzhiyun #define DESC8188F_RATEMCS7 0x13 251*4882a593Smuzhiyun #define DESC8188F_RATEMCS8 0x14 252*4882a593Smuzhiyun #define DESC8188F_RATEMCS9 0x15 253*4882a593Smuzhiyun #define DESC8188F_RATEMCS10 0x16 254*4882a593Smuzhiyun #define DESC8188F_RATEMCS11 0x17 255*4882a593Smuzhiyun #define DESC8188F_RATEMCS12 0x18 256*4882a593Smuzhiyun #define DESC8188F_RATEMCS13 0x19 257*4882a593Smuzhiyun #define DESC8188F_RATEMCS14 0x1a 258*4882a593Smuzhiyun #define DESC8188F_RATEMCS15 0x1b 259*4882a593Smuzhiyun #define DESC8188F_RATEVHTSS1MCS0 0x2c 260*4882a593Smuzhiyun #define DESC8188F_RATEVHTSS1MCS1 0x2d 261*4882a593Smuzhiyun #define DESC8188F_RATEVHTSS1MCS2 0x2e 262*4882a593Smuzhiyun #define DESC8188F_RATEVHTSS1MCS3 0x2f 263*4882a593Smuzhiyun #define DESC8188F_RATEVHTSS1MCS4 0x30 264*4882a593Smuzhiyun #define DESC8188F_RATEVHTSS1MCS5 0x31 265*4882a593Smuzhiyun #define DESC8188F_RATEVHTSS1MCS6 0x32 266*4882a593Smuzhiyun #define DESC8188F_RATEVHTSS1MCS7 0x33 267*4882a593Smuzhiyun #define DESC8188F_RATEVHTSS1MCS8 0x34 268*4882a593Smuzhiyun #define DESC8188F_RATEVHTSS1MCS9 0x35 269*4882a593Smuzhiyun #define DESC8188F_RATEVHTSS2MCS0 0x36 270*4882a593Smuzhiyun #define DESC8188F_RATEVHTSS2MCS1 0x37 271*4882a593Smuzhiyun #define DESC8188F_RATEVHTSS2MCS2 0x38 272*4882a593Smuzhiyun #define DESC8188F_RATEVHTSS2MCS3 0x39 273*4882a593Smuzhiyun #define DESC8188F_RATEVHTSS2MCS4 0x3a 274*4882a593Smuzhiyun #define DESC8188F_RATEVHTSS2MCS5 0x3b 275*4882a593Smuzhiyun #define DESC8188F_RATEVHTSS2MCS6 0x3c 276*4882a593Smuzhiyun #define DESC8188F_RATEVHTSS2MCS7 0x3d 277*4882a593Smuzhiyun #define DESC8188F_RATEVHTSS2MCS8 0x3e 278*4882a593Smuzhiyun #define DESC8188F_RATEVHTSS2MCS9 0x3f 279*4882a593Smuzhiyun 280*4882a593Smuzhiyun 281*4882a593Smuzhiyun #define RX_HAL_IS_CCK_RATE_8188F(pDesc)\ 282*4882a593Smuzhiyun (GET_RX_STATUS_DESC_RX_RATE_8188F(pDesc) == DESC8188F_RATE1M || \ 283*4882a593Smuzhiyun GET_RX_STATUS_DESC_RX_RATE_8188F(pDesc) == DESC8188F_RATE2M || \ 284*4882a593Smuzhiyun GET_RX_STATUS_DESC_RX_RATE_8188F(pDesc) == DESC8188F_RATE5_5M || \ 285*4882a593Smuzhiyun GET_RX_STATUS_DESC_RX_RATE_8188F(pDesc) == DESC8188F_RATE11M) 286*4882a593Smuzhiyun 287*4882a593Smuzhiyun 288*4882a593Smuzhiyun void rtl8188f_update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem); 289*4882a593Smuzhiyun void rtl8188f_fill_fake_txdesc(PADAPTER padapter, u8 *pDesc, u32 BufferLen, u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame); 290*4882a593Smuzhiyun void fill_txdesc_force_bmc_camid(struct pkt_attrib *pattrib, u8 *ptxdesc); 291*4882a593Smuzhiyun 292*4882a593Smuzhiyun #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) 293*4882a593Smuzhiyun s32 rtl8188fs_init_xmit_priv(PADAPTER padapter); 294*4882a593Smuzhiyun void rtl8188fs_free_xmit_priv(PADAPTER padapter); 295*4882a593Smuzhiyun s32 rtl8188fs_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); 296*4882a593Smuzhiyun s32 rtl8188fs_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); 297*4882a593Smuzhiyun #ifdef CONFIG_RTW_MGMT_QUEUE 298*4882a593Smuzhiyun s32 rtl8188fs_hal_mgmt_xmitframe_enqueue(PADAPTER, struct xmit_frame *); 299*4882a593Smuzhiyun #endif 300*4882a593Smuzhiyun s32 rtl8188fs_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); 301*4882a593Smuzhiyun s32 rtl8188fs_xmit_buf_handler(PADAPTER padapter); 302*4882a593Smuzhiyun thread_return rtl8188fs_xmit_thread(thread_context context); 303*4882a593Smuzhiyun #define hal_xmit_handler rtl8188fs_xmit_buf_handler 304*4882a593Smuzhiyun #endif 305*4882a593Smuzhiyun 306*4882a593Smuzhiyun #ifdef CONFIG_USB_HCI 307*4882a593Smuzhiyun #ifdef CONFIG_XMIT_THREAD_MODE 308*4882a593Smuzhiyun s32 rtl8188fu_xmit_buf_handler(PADAPTER padapter); 309*4882a593Smuzhiyun #define hal_xmit_handler rtl8188fu_xmit_buf_handler 310*4882a593Smuzhiyun #endif 311*4882a593Smuzhiyun 312*4882a593Smuzhiyun s32 rtl8188fu_init_xmit_priv(PADAPTER padapter); 313*4882a593Smuzhiyun void rtl8188fu_free_xmit_priv(PADAPTER padapter); 314*4882a593Smuzhiyun s32 rtl8188fu_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); 315*4882a593Smuzhiyun s32 rtl8188fu_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); 316*4882a593Smuzhiyun #ifdef CONFIG_RTW_MGMT_QUEUE 317*4882a593Smuzhiyun s32 rtl8188fu_hal_mgmt_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); 318*4882a593Smuzhiyun #endif 319*4882a593Smuzhiyun s32 rtl8188fu_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); 320*4882a593Smuzhiyun /* s32 rtl8812au_xmit_buf_handler(PADAPTER padapter); */ 321*4882a593Smuzhiyun void rtl8188fu_xmit_tasklet(unsigned long priv); 322*4882a593Smuzhiyun s32 rtl8188fu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); 323*4882a593Smuzhiyun void _dbg_dump_tx_info(_adapter *padapter, int frame_tag, struct tx_desc *ptxdesc); 324*4882a593Smuzhiyun #endif 325*4882a593Smuzhiyun 326*4882a593Smuzhiyun #ifdef CONFIG_PCI_HCI 327*4882a593Smuzhiyun s32 rtl8188fe_init_xmit_priv(PADAPTER padapter); 328*4882a593Smuzhiyun void rtl8188fe_free_xmit_priv(PADAPTER padapter); 329*4882a593Smuzhiyun struct xmit_buf *rtl8188fe_dequeue_xmitbuf(struct rtw_tx_ring *ring); 330*4882a593Smuzhiyun void rtl8188fe_xmitframe_resume(_adapter *padapter); 331*4882a593Smuzhiyun s32 rtl8188fe_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); 332*4882a593Smuzhiyun s32 rtl8188fe_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); 333*4882a593Smuzhiyun s32 rtl8188fe_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); 334*4882a593Smuzhiyun void rtl8188fe_xmit_tasklet(void *priv); 335*4882a593Smuzhiyun #endif 336*4882a593Smuzhiyun 337*4882a593Smuzhiyun u8 BWMapping_8188F(PADAPTER Adapter, struct pkt_attrib *pattrib); 338*4882a593Smuzhiyun u8 SCMapping_8188F(PADAPTER Adapter, struct pkt_attrib *pattrib); 339*4882a593Smuzhiyun 340*4882a593Smuzhiyun #endif 341