xref: /OK3568_Linux_fs/external/rkwifibt/drivers/rtl8821cs/hal/rtl8821c/rtl8821c_halinit.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /******************************************************************************
2*4882a593Smuzhiyun  *
3*4882a593Smuzhiyun  * Copyright(c) 2016 - 2017 Realtek Corporation.
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * This program is free software; you can redistribute it and/or modify it
6*4882a593Smuzhiyun  * under the terms of version 2 of the GNU General Public License as
7*4882a593Smuzhiyun  * published by the Free Software Foundation.
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  * This program is distributed in the hope that it will be useful, but WITHOUT
10*4882a593Smuzhiyun  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11*4882a593Smuzhiyun  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12*4882a593Smuzhiyun  * more details.
13*4882a593Smuzhiyun  *
14*4882a593Smuzhiyun  *****************************************************************************/
15*4882a593Smuzhiyun #define _RTL8821C_HALINIT_C_
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun #include <drv_types.h>		/* PADAPTER, basic_types.h and etc. */
18*4882a593Smuzhiyun #include <hal_data.h>		/* GET_HAL_SPEC(), HAL_DATA_TYPE */
19*4882a593Smuzhiyun #include "../hal_halmac.h"	/* HALMAC API */
20*4882a593Smuzhiyun #include "rtl8821c.h"
21*4882a593Smuzhiyun 
init_hal_spec_rtl8821c(PADAPTER adapter)22*4882a593Smuzhiyun void init_hal_spec_rtl8821c(PADAPTER adapter)
23*4882a593Smuzhiyun {
24*4882a593Smuzhiyun 	struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter);
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun 	rtw_halmac_fill_hal_spec(adapter_to_dvobj(adapter), hal_spec);
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun 	hal_spec->ic_name = "rtl8821c";
29*4882a593Smuzhiyun 	hal_spec->macid_num = 128;
30*4882a593Smuzhiyun 	/* hal_spec->sec_cam_ent_num follow halmac setting */
31*4882a593Smuzhiyun 	hal_spec->sec_cap = SEC_CAP_CHK_BMC | SEC_CAP_CHK_EXTRA_SEC;
32*4882a593Smuzhiyun 	hal_spec->macid_cap = MACID_DROP;
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun 	hal_spec->rfpath_num_2g = 2;
35*4882a593Smuzhiyun 	hal_spec->rfpath_num_5g = 1;
36*4882a593Smuzhiyun 	hal_spec->rf_reg_path_num = hal_spec->rf_reg_path_avail_num = 1;
37*4882a593Smuzhiyun 	hal_spec->rf_reg_trx_path_bmp = 0x11;
38*4882a593Smuzhiyun 	hal_spec->max_tx_cnt = 1;
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun 	hal_spec->tx_nss_num = 1;
41*4882a593Smuzhiyun 	hal_spec->rx_nss_num = 1;
42*4882a593Smuzhiyun 	hal_spec->band_cap = BAND_CAP_2G | BAND_CAP_5G;
43*4882a593Smuzhiyun 	hal_spec->bw_cap = BW_CAP_20M | BW_CAP_40M | BW_CAP_80M;
44*4882a593Smuzhiyun 	hal_spec->port_num = 5;
45*4882a593Smuzhiyun 	hal_spec->hci_type = 0;
46*4882a593Smuzhiyun 	hal_spec->proto_cap = PROTO_CAP_11B | PROTO_CAP_11G | PROTO_CAP_11N | PROTO_CAP_11AC;
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun 	hal_spec->txgi_max = 63;
49*4882a593Smuzhiyun 	hal_spec->txgi_pdbm = 2;
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun 	hal_spec->wl_func = 0
52*4882a593Smuzhiyun 			    | WL_FUNC_P2P
53*4882a593Smuzhiyun 			    | WL_FUNC_MIRACAST
54*4882a593Smuzhiyun 			    | WL_FUNC_TDLS
55*4882a593Smuzhiyun 			    ;
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun 	hal_spec->tx_aclt_unit_factor = 8;
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun 	hal_spec->rx_tsf_filter = 1;
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun 	hal_spec->pg_txpwr_saddr = 0x10;
62*4882a593Smuzhiyun 	hal_spec->pg_txgi_diff_factor = 1;
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun 	rtw_macid_ctl_init_sleep_reg(adapter_to_macidctl(adapter)
65*4882a593Smuzhiyun 		, REG_MACID_SLEEP_8821C
66*4882a593Smuzhiyun 		, REG_MACID_SLEEP1_8821C
67*4882a593Smuzhiyun 		, REG_MACID_SLEEP2_8821C
68*4882a593Smuzhiyun 		, REG_MACID_SLEEP3_8821C);
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun 	rtw_macid_ctl_init_drop_reg(adapter_to_macidctl(adapter)
71*4882a593Smuzhiyun 		, REG_MACID_DROP0_8821C
72*4882a593Smuzhiyun 		, REG_MACID_DROP1_8821C
73*4882a593Smuzhiyun 		, REG_MACID_DROP2_8821C
74*4882a593Smuzhiyun 		, REG_MACID_DROP3_8821C);
75*4882a593Smuzhiyun }
76*4882a593Smuzhiyun 
rtl8821c_power_on(PADAPTER adapter)77*4882a593Smuzhiyun u32 rtl8821c_power_on(PADAPTER adapter)
78*4882a593Smuzhiyun {
79*4882a593Smuzhiyun 	struct dvobj_priv *d;
80*4882a593Smuzhiyun 	PHAL_DATA_TYPE hal;
81*4882a593Smuzhiyun 	u8 bMacPwrCtrlOn;
82*4882a593Smuzhiyun 	int err = 0;
83*4882a593Smuzhiyun 	u8 ret = _SUCCESS;
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun 	d = adapter_to_dvobj(adapter);
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun 	bMacPwrCtrlOn = _FALSE;
89*4882a593Smuzhiyun 	rtw_hal_get_hwreg(adapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn);
90*4882a593Smuzhiyun 	if (bMacPwrCtrlOn == _TRUE)
91*4882a593Smuzhiyun 		goto out;
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun 	err = rtw_halmac_poweron(d);
94*4882a593Smuzhiyun 
95*4882a593Smuzhiyun 	#ifdef CONFIG_POWER_STATE_UNEXPECTED_HDL
96*4882a593Smuzhiyun 	if ((-2) == err) {
97*4882a593Smuzhiyun 		RTW_ERR("%s:Power ON Fail, Try to power on again !!\n", __FUNCTION__);
98*4882a593Smuzhiyun 		rtw_halmac_poweroff(d);
99*4882a593Smuzhiyun 		rtw_msleep_os(2);
100*4882a593Smuzhiyun 		err = rtw_halmac_poweron(d);
101*4882a593Smuzhiyun 	}
102*4882a593Smuzhiyun 	#endif
103*4882a593Smuzhiyun 
104*4882a593Smuzhiyun 	if (err) {
105*4882a593Smuzhiyun 		RTW_ERR("%s: Power ON Fail!!\n", __FUNCTION__);
106*4882a593Smuzhiyun 		rtw_warn_on(1);
107*4882a593Smuzhiyun 		ret = _FAIL;
108*4882a593Smuzhiyun 		goto out;
109*4882a593Smuzhiyun 	}
110*4882a593Smuzhiyun 
111*4882a593Smuzhiyun 	bMacPwrCtrlOn = _TRUE;
112*4882a593Smuzhiyun 	rtw_hal_set_hwreg(adapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn);
113*4882a593Smuzhiyun 
114*4882a593Smuzhiyun out:
115*4882a593Smuzhiyun 	return ret;
116*4882a593Smuzhiyun }
117*4882a593Smuzhiyun 
rtl8821c_power_off(PADAPTER adapter)118*4882a593Smuzhiyun void rtl8821c_power_off(PADAPTER adapter)
119*4882a593Smuzhiyun {
120*4882a593Smuzhiyun 	struct dvobj_priv *d;
121*4882a593Smuzhiyun 	u8 bMacPwrCtrlOn;
122*4882a593Smuzhiyun 	int err = 0;
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun 	d = adapter_to_dvobj(adapter);
126*4882a593Smuzhiyun 
127*4882a593Smuzhiyun 	bMacPwrCtrlOn = _FALSE;
128*4882a593Smuzhiyun 	rtw_hal_get_hwreg(adapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn);
129*4882a593Smuzhiyun 	if (bMacPwrCtrlOn == _FALSE)
130*4882a593Smuzhiyun 		goto out;
131*4882a593Smuzhiyun 
132*4882a593Smuzhiyun 	bMacPwrCtrlOn = _FALSE;
133*4882a593Smuzhiyun 	rtw_hal_set_hwreg(adapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn);
134*4882a593Smuzhiyun 	GET_HAL_DATA(adapter)->bFWReady = _FALSE;
135*4882a593Smuzhiyun 
136*4882a593Smuzhiyun 	err = rtw_halmac_poweroff(d);
137*4882a593Smuzhiyun 	if (err) {
138*4882a593Smuzhiyun 		RTW_ERR("%s: Power OFF Fail!!\n", __FUNCTION__);
139*4882a593Smuzhiyun 		rtw_warn_on(1);
140*4882a593Smuzhiyun 		goto out;
141*4882a593Smuzhiyun 	}
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun 
145*4882a593Smuzhiyun out:
146*4882a593Smuzhiyun 	return;
147*4882a593Smuzhiyun }
148*4882a593Smuzhiyun 
rtl8821c_hal_init_main(PADAPTER adapter)149*4882a593Smuzhiyun u8 rtl8821c_hal_init_main(PADAPTER adapter)
150*4882a593Smuzhiyun {
151*4882a593Smuzhiyun 	struct dvobj_priv *d = adapter_to_dvobj(adapter);
152*4882a593Smuzhiyun 	PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
153*4882a593Smuzhiyun 	int err;
154*4882a593Smuzhiyun 	s32 ret;
155*4882a593Smuzhiyun 
156*4882a593Smuzhiyun 	hal->bFWReady = _FALSE;
157*4882a593Smuzhiyun 	hal->fw_ractrl = _FALSE;
158*4882a593Smuzhiyun 
159*4882a593Smuzhiyun #ifdef CONFIG_NO_FW
160*4882a593Smuzhiyun 	err = rtw_halmac_init_hal(d);
161*4882a593Smuzhiyun #else
162*4882a593Smuzhiyun 	#ifdef CONFIG_FILE_FWIMG
163*4882a593Smuzhiyun 	rtw_get_phy_file_path(adapter, MAC_FILE_FW_NIC);
164*4882a593Smuzhiyun 	err = rtw_halmac_init_hal_fw_file(d, rtw_phy_para_file_path);
165*4882a593Smuzhiyun 	#else
166*4882a593Smuzhiyun 	err = rtw_halmac_init_hal_fw(d, array_mp_8821c_fw_nic, array_length_mp_8821c_fw_nic);
167*4882a593Smuzhiyun 	#endif
168*4882a593Smuzhiyun 
169*4882a593Smuzhiyun 	if (!err) {
170*4882a593Smuzhiyun 		hal->bFWReady = _TRUE;
171*4882a593Smuzhiyun 		hal->fw_ractrl = _TRUE;
172*4882a593Smuzhiyun 	}
173*4882a593Smuzhiyun 	RTW_INFO("FW Version:%d SubVersion:%d\n", hal->firmware_version, hal->firmware_sub_version);
174*4882a593Smuzhiyun #endif
175*4882a593Smuzhiyun 	if (err) {
176*4882a593Smuzhiyun 		RTW_INFO("%s: fail\n", __FUNCTION__);
177*4882a593Smuzhiyun 		return _FALSE;
178*4882a593Smuzhiyun 	}
179*4882a593Smuzhiyun 
180*4882a593Smuzhiyun 	RTW_INFO("%s: successful\n", __FUNCTION__);
181*4882a593Smuzhiyun 
182*4882a593Smuzhiyun 	return _TRUE;
183*4882a593Smuzhiyun }
184*4882a593Smuzhiyun 
rtl8821c_mac_verify(PADAPTER adapter)185*4882a593Smuzhiyun u8 rtl8821c_mac_verify(PADAPTER adapter)
186*4882a593Smuzhiyun {
187*4882a593Smuzhiyun 	struct dvobj_priv *d;
188*4882a593Smuzhiyun 	int err;
189*4882a593Smuzhiyun 
190*4882a593Smuzhiyun 
191*4882a593Smuzhiyun 	d = adapter_to_dvobj(adapter);
192*4882a593Smuzhiyun 
193*4882a593Smuzhiyun 	err = rtw_halmac_self_verify(d);
194*4882a593Smuzhiyun 	if (err) {
195*4882a593Smuzhiyun 		RTW_INFO("%s fail\n", __FUNCTION__);
196*4882a593Smuzhiyun 		return _FALSE;
197*4882a593Smuzhiyun 	}
198*4882a593Smuzhiyun 
199*4882a593Smuzhiyun 	RTW_INFO("%s successful\n", __FUNCTION__);
200*4882a593Smuzhiyun 	return _TRUE;
201*4882a593Smuzhiyun }
202*4882a593Smuzhiyun 
rtl8821c_hal_init_misc(PADAPTER adapter)203*4882a593Smuzhiyun void rtl8821c_hal_init_misc(PADAPTER adapter)
204*4882a593Smuzhiyun {
205*4882a593Smuzhiyun 	PHAL_DATA_TYPE hal_data = GET_HAL_DATA(adapter);
206*4882a593Smuzhiyun 	u8 drv_info_sz = 0;
207*4882a593Smuzhiyun 	u32	rcr_bits;
208*4882a593Smuzhiyun 	/*
209*4882a593Smuzhiyun 	 * Sync driver status and hardware setting
210*4882a593Smuzhiyun 	 */
211*4882a593Smuzhiyun 
212*4882a593Smuzhiyun 	/* initial security setting */
213*4882a593Smuzhiyun 	invalidate_cam_all(adapter);
214*4882a593Smuzhiyun 
215*4882a593Smuzhiyun 	/* enable to rx ps-poll ,disable Control frame filter*/
216*4882a593Smuzhiyun 	rtw_write16(adapter, REG_RXFLTMAP1_8821C, 0x0400);
217*4882a593Smuzhiyun 	/* Accept all data frames */
218*4882a593Smuzhiyun 	rtw_write16(adapter, REG_RXFLTMAP2_8821C, 0xFFFF);
219*4882a593Smuzhiyun 
220*4882a593Smuzhiyun 	/* Accept all management frames */
221*4882a593Smuzhiyun 	rtw_write16(adapter, REG_RXFLTMAP0_8821C, 0xFFFF);
222*4882a593Smuzhiyun 
223*4882a593Smuzhiyun 	/*RCR setting - Sync driver status with hardware setting */
224*4882a593Smuzhiyun 	rtw_hal_get_hwreg(adapter, HW_VAR_RCR, (u8 *)&rcr_bits);
225*4882a593Smuzhiyun 
226*4882a593Smuzhiyun 	rcr_bits &= ~(BIT_AICV_8821C | BIT_ACRC32_8821C | BIT_APP_FCS_8821C | BIT_APWRMGT_8821C);
227*4882a593Smuzhiyun 
228*4882a593Smuzhiyun 	rtw_halmac_get_rx_drv_info_sz(adapter_to_dvobj(adapter), &drv_info_sz);
229*4882a593Smuzhiyun 	if (drv_info_sz)
230*4882a593Smuzhiyun 		rcr_bits |= BIT_APP_PHYSTS_8821C;
231*4882a593Smuzhiyun 
232*4882a593Smuzhiyun #ifdef CONFIG_RX_PACKET_APPEND_FCS
233*4882a593Smuzhiyun 	rcr_bits |= BIT_APP_FCS_8821C;
234*4882a593Smuzhiyun #endif
235*4882a593Smuzhiyun 
236*4882a593Smuzhiyun #ifdef CONFIG_RX_PACKET_APPEND_ICV_ERROR
237*4882a593Smuzhiyun 	rcr_bits |= BIT_AICV_8821C;
238*4882a593Smuzhiyun #endif
239*4882a593Smuzhiyun 
240*4882a593Smuzhiyun 	rtw_hal_set_hwreg(adapter, HW_VAR_RCR, (u8 *)&rcr_bits);
241*4882a593Smuzhiyun 
242*4882a593Smuzhiyun #ifdef CONFIG_XMIT_ACK
243*4882a593Smuzhiyun 	rtl8821c_set_mgnt_xmit_ack(adapter);
244*4882a593Smuzhiyun #endif /*CONFIG_XMIT_ACK*/
245*4882a593Smuzhiyun 
246*4882a593Smuzhiyun 	/*Disable BAR, suggested by Scott */
247*4882a593Smuzhiyun 	rtw_write32(adapter, REG_BAR_MODE_CTRL_8821C, 0x01ffff|rtw_read8(adapter,REG_RA_TRY_RATE_AGG_LMT_8821C)<<24);
248*4882a593Smuzhiyun 	/*Disable secondary CCA 20M,40M?*/
249*4882a593Smuzhiyun 	rtw_write8(adapter, REG_MISC_CTRL_8821C, 0x03);
250*4882a593Smuzhiyun 
251*4882a593Smuzhiyun 	/*Enable MAC security engine*/
252*4882a593Smuzhiyun 	rtw_write16(adapter, REG_CR, (rtw_read16(adapter, REG_CR) | BIT_MAC_SEC_EN));
253*4882a593Smuzhiyun 
254*4882a593Smuzhiyun 	rtl8821c_rx_tsf_addr_filter_config(adapter, BIT_CHK_TSF_EN_8821C | BIT_CHK_TSF_CBSSID_8821C);
255*4882a593Smuzhiyun 
256*4882a593Smuzhiyun 	/*for 1212 module - 5G RX issue*/
257*4882a593Smuzhiyun 	if (hal_data->rfe_type == 2)
258*4882a593Smuzhiyun 		rtw_write8(adapter, REG_PAD_CTRL1 + 3, 0x36);
259*4882a593Smuzhiyun #ifdef CONFIG_AMPDU_PRETX_CD
260*4882a593Smuzhiyun 	rtl8821c_pretx_cd_config(adapter);
261*4882a593Smuzhiyun #endif
262*4882a593Smuzhiyun }
263*4882a593Smuzhiyun 
rtl8821c_hal_init(PADAPTER adapter)264*4882a593Smuzhiyun u32 rtl8821c_hal_init(PADAPTER adapter)
265*4882a593Smuzhiyun {
266*4882a593Smuzhiyun 	PHAL_DATA_TYPE hal;
267*4882a593Smuzhiyun 
268*4882a593Smuzhiyun 	hal = GET_HAL_DATA(adapter);
269*4882a593Smuzhiyun 
270*4882a593Smuzhiyun 	if (_FALSE == rtl8821c_hal_init_main(adapter))
271*4882a593Smuzhiyun 		return _FAIL;
272*4882a593Smuzhiyun 
273*4882a593Smuzhiyun 	rtl8821c_hal_init_misc(adapter);
274*4882a593Smuzhiyun 
275*4882a593Smuzhiyun 	rtl8821c_phy_init_haldm(adapter);
276*4882a593Smuzhiyun #ifdef CONFIG_BEAMFORMING
277*4882a593Smuzhiyun 	rtl8821c_phy_bf_init(adapter);
278*4882a593Smuzhiyun #endif
279*4882a593Smuzhiyun 
280*4882a593Smuzhiyun #ifdef CONFIG_FW_MULTI_PORT_SUPPORT
281*4882a593Smuzhiyun 	/*HW / FW init*/
282*4882a593Smuzhiyun 	rtw_hal_set_default_port_id_cmd(adapter, 0);
283*4882a593Smuzhiyun #endif
284*4882a593Smuzhiyun 
285*4882a593Smuzhiyun #ifdef CONFIG_BT_COEXIST
286*4882a593Smuzhiyun 	/* Init BT hw config. */
287*4882a593Smuzhiyun 	if (_TRUE == hal->EEPROMBluetoothCoexist) {
288*4882a593Smuzhiyun 		rtw_btcoex_HAL_Initialize(adapter, _FALSE);
289*4882a593Smuzhiyun 		#ifdef CONFIG_FW_MULTI_PORT_SUPPORT
290*4882a593Smuzhiyun 		rtw_hal_set_wifi_btc_port_id_cmd(adapter);
291*4882a593Smuzhiyun 		#endif
292*4882a593Smuzhiyun 	} else
293*4882a593Smuzhiyun #endif /* CONFIG_BT_COEXIST */
294*4882a593Smuzhiyun 		rtw_btcoex_wifionly_hw_config(adapter);
295*4882a593Smuzhiyun 
296*4882a593Smuzhiyun 	return _SUCCESS;
297*4882a593Smuzhiyun }
298*4882a593Smuzhiyun 
rtl8821c_hal_deinit(PADAPTER adapter)299*4882a593Smuzhiyun u32 rtl8821c_hal_deinit(PADAPTER adapter)
300*4882a593Smuzhiyun {
301*4882a593Smuzhiyun 	struct dvobj_priv *d;
302*4882a593Smuzhiyun 	PHAL_DATA_TYPE hal;
303*4882a593Smuzhiyun 	int err;
304*4882a593Smuzhiyun 
305*4882a593Smuzhiyun 
306*4882a593Smuzhiyun 	d = adapter_to_dvobj(adapter);
307*4882a593Smuzhiyun 	hal = GET_HAL_DATA(adapter);
308*4882a593Smuzhiyun 
309*4882a593Smuzhiyun 	hal->bFWReady = _FALSE;
310*4882a593Smuzhiyun 	hal->fw_ractrl = _FALSE;
311*4882a593Smuzhiyun 
312*4882a593Smuzhiyun 	err = rtw_halmac_deinit_hal(d);
313*4882a593Smuzhiyun 	if (err)
314*4882a593Smuzhiyun 		return _FAIL;
315*4882a593Smuzhiyun 
316*4882a593Smuzhiyun 	return _SUCCESS;
317*4882a593Smuzhiyun }
318*4882a593Smuzhiyun 
rtl8821c_init_default_value(PADAPTER adapter)319*4882a593Smuzhiyun void rtl8821c_init_default_value(PADAPTER adapter)
320*4882a593Smuzhiyun {
321*4882a593Smuzhiyun 	PHAL_DATA_TYPE hal;
322*4882a593Smuzhiyun 	u8 i;
323*4882a593Smuzhiyun 
324*4882a593Smuzhiyun 
325*4882a593Smuzhiyun 	hal = GET_HAL_DATA(adapter);
326*4882a593Smuzhiyun 
327*4882a593Smuzhiyun 
328*4882a593Smuzhiyun 	/* init default value */
329*4882a593Smuzhiyun 	hal->fw_ractrl = _FALSE;
330*4882a593Smuzhiyun 
331*4882a593Smuzhiyun 	/* init phydm default value */
332*4882a593Smuzhiyun 	hal->bIQKInitialized = _FALSE;
333*4882a593Smuzhiyun 
334*4882a593Smuzhiyun 	/* init Efuse variables */
335*4882a593Smuzhiyun 	hal->EfuseUsedBytes = 0;
336*4882a593Smuzhiyun 	hal->EfuseUsedPercentage = 0;
337*4882a593Smuzhiyun #ifdef HAL_EFUSE_MEMORY
338*4882a593Smuzhiyun 	hal->EfuseHal.fakeEfuseBank = 0;
339*4882a593Smuzhiyun 	hal->EfuseHal.fakeEfuseUsedBytes = 0;
340*4882a593Smuzhiyun 	_rtw_memset(hal->EfuseHal.fakeEfuseContent, 0xFF, EFUSE_MAX_HW_SIZE);
341*4882a593Smuzhiyun 	_rtw_memset(hal->EfuseHal.fakeEfuseInitMap, 0xFF, EFUSE_MAX_MAP_LEN);
342*4882a593Smuzhiyun 	_rtw_memset(hal->EfuseHal.fakeEfuseModifiedMap, 0xFF, EFUSE_MAX_MAP_LEN);
343*4882a593Smuzhiyun 	hal->EfuseHal.BTEfuseUsedBytes = 0;
344*4882a593Smuzhiyun 	hal->EfuseHal.BTEfuseUsedPercentage = 0;
345*4882a593Smuzhiyun 	_rtw_memset(hal->EfuseHal.BTEfuseContent, 0xFF, EFUSE_MAX_BT_BANK * EFUSE_MAX_HW_SIZE);
346*4882a593Smuzhiyun 	_rtw_memset(hal->EfuseHal.BTEfuseInitMap, 0xFF, EFUSE_BT_MAX_MAP_LEN);
347*4882a593Smuzhiyun 	_rtw_memset(hal->EfuseHal.BTEfuseModifiedMap, 0xFF, EFUSE_BT_MAX_MAP_LEN);
348*4882a593Smuzhiyun 	hal->EfuseHal.fakeBTEfuseUsedBytes = 0;
349*4882a593Smuzhiyun 	_rtw_memset(hal->EfuseHal.fakeBTEfuseContent, 0xFF, EFUSE_MAX_BT_BANK * EFUSE_MAX_HW_SIZE);
350*4882a593Smuzhiyun 	_rtw_memset(hal->EfuseHal.fakeBTEfuseInitMap, 0xFF, EFUSE_BT_MAX_MAP_LEN);
351*4882a593Smuzhiyun 	_rtw_memset(hal->EfuseHal.fakeBTEfuseModifiedMap, 0xFF, EFUSE_BT_MAX_MAP_LEN);
352*4882a593Smuzhiyun #endif
353*4882a593Smuzhiyun }
354