1*4882a593Smuzhiyun /****************************************************************************** 2*4882a593Smuzhiyun * 3*4882a593Smuzhiyun * Copyright(c) 2007 - 2017 Realtek Corporation. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify it 6*4882a593Smuzhiyun * under the terms of version 2 of the GNU General Public License as 7*4882a593Smuzhiyun * published by the Free Software Foundation. 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * This program is distributed in the hope that it will be useful, but WITHOUT 10*4882a593Smuzhiyun * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11*4882a593Smuzhiyun * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12*4882a593Smuzhiyun * more details. 13*4882a593Smuzhiyun * 14*4882a593Smuzhiyun * The full GNU General Public License is included in this distribution in the 15*4882a593Smuzhiyun * file called LICENSE. 16*4882a593Smuzhiyun * 17*4882a593Smuzhiyun * Contact Information: 18*4882a593Smuzhiyun * wlanfae <wlanfae@realtek.com> 19*4882a593Smuzhiyun * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, 20*4882a593Smuzhiyun * Hsinchu 300, Taiwan. 21*4882a593Smuzhiyun * 22*4882a593Smuzhiyun * Larry Finger <Larry.Finger@lwfinger.net> 23*4882a593Smuzhiyun * 24*4882a593Smuzhiyun *****************************************************************************/ 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun #ifndef __PHYDMCFOTRACK_H__ 27*4882a593Smuzhiyun #define __PHYDMCFOTRACK_H__ 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun /* 2019.03.28 fix 8197G crystal_cap register address*/ 30*4882a593Smuzhiyun #define CFO_TRACKING_VERSION "2.4" 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun #define CFO_TRK_ENABLE_TH 20 /* @kHz enable CFO_Track threshold*/ 33*4882a593Smuzhiyun #define CFO_TRK_STOP_TH 10 /* @kHz disable CFO_Track threshold*/ 34*4882a593Smuzhiyun #define CFO_TH_ATC 80 /* @kHz */ 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun struct phydm_cfo_track_struct { 37*4882a593Smuzhiyun boolean is_atc_status; 38*4882a593Smuzhiyun boolean is_adjust; /*@already modify crystal cap*/ 39*4882a593Smuzhiyun u8 crystal_cap; 40*4882a593Smuzhiyun u8 crystal_cap_default; 41*4882a593Smuzhiyun u8 def_x_cap; 42*4882a593Smuzhiyun s32 CFO_tail[4]; 43*4882a593Smuzhiyun u32 CFO_cnt[4]; 44*4882a593Smuzhiyun s32 CFO_ave_pre; 45*4882a593Smuzhiyun u32 packet_count; 46*4882a593Smuzhiyun u32 packet_count_pre; 47*4882a593Smuzhiyun }; 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun struct phydm_cfo_rpt { 50*4882a593Smuzhiyun s32 cfo_rpt_s[PHYDM_MAX_RF_PATH]; 51*4882a593Smuzhiyun s32 cfo_rpt_l[PHYDM_MAX_RF_PATH]; 52*4882a593Smuzhiyun s32 cfo_rpt_acq[PHYDM_MAX_RF_PATH]; 53*4882a593Smuzhiyun s32 cfo_rpt_sec[PHYDM_MAX_RF_PATH]; 54*4882a593Smuzhiyun s32 cfo_rpt_end[PHYDM_MAX_RF_PATH]; 55*4882a593Smuzhiyun }; 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun void phydm_get_cfo_info(void *dm_void, struct phydm_cfo_rpt *cfo); 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun boolean phydm_set_crystal_cap_reg(void *dm_void, u8 crystal_cap); 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun void phydm_set_crystal_cap(void *dm_void, u8 crystal_cap); 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun void phydm_cfo_tracking_init(void *dm_void); 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun void phydm_cfo_tracking(void *dm_void); 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun void phydm_parsing_cfo(void *dm_void, void *pktinfo_void, s8 *pcfotail, 68*4882a593Smuzhiyun u8 num_ss); 69*4882a593Smuzhiyun void phydm_cfo_tracking_debug(void *dm_void, char input[][16], u32 *_used, 70*4882a593Smuzhiyun char *output, u32 *_out_len); 71*4882a593Smuzhiyun #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) 72*4882a593Smuzhiyun void phy_Init_crystal_capacity(void *dm_void, u8 crystal_cap); 73*4882a593Smuzhiyun #endif 74*4882a593Smuzhiyun #endif 75