1 /****************************************************************************** 2 * 3 * Copyright(c) 2018 - 2019 Realtek Corporation. All rights reserved. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 ******************************************************************************/ 15 16 #ifndef __INC_HALMAC_BIT_8812F_H 17 #define __INC_HALMAC_BIT_8812F_H 18 19 #define CPU_OPT_WIDTH 0x1F 20 21 /* 2 REG_NOT_VALID_8812F */ 22 23 /* 2 REG_SYS_ISO_CTRL_8812F */ 24 #define BIT_PWC_EV12V_8812F BIT(15) 25 26 /* 2 REG_NOT_VALID_8812F */ 27 #define BIT_PA33V_EN_8812F BIT(13) 28 #define BIT_PA12V_EN_8812F BIT(12) 29 #define BIT_UA33V_EN_8812F BIT(11) 30 #define BIT_UA12V_EN_8812F BIT(10) 31 #define BIT_ISO_RFDIO_8812F BIT(9) 32 #define BIT_ISO_EB2CORE_8812F BIT(8) 33 #define BIT_ISO_DIOE_8812F BIT(7) 34 #define BIT_ISO_WLPON2PP_8812F BIT(6) 35 #define BIT_ISO_IP2MAC_WA2PP_8812F BIT(5) 36 #define BIT_ISO_PD2CORE_8812F BIT(4) 37 #define BIT_ISO_PA2PCIE_8812F BIT(3) 38 #define BIT_ISO_UD2CORE_8812F BIT(2) 39 #define BIT_ISO_UA2USB_8812F BIT(1) 40 #define BIT_ISO_WD2PP_8812F BIT(0) 41 42 /* 2 REG_SYS_FUNC_EN_8812F */ 43 #define BIT_FEN_MREGEN_8812F BIT(15) 44 #define BIT_FEN_HWPDN_8812F BIT(14) 45 46 /* 2 REG_NOT_VALID_8812F */ 47 #define BIT_FEN_ELDR_8812F BIT(12) 48 #define BIT_FEN_DCORE_8812F BIT(11) 49 #define BIT_FEN_CPUEN_8812F BIT(10) 50 #define BIT_FEN_DIOE_8812F BIT(9) 51 #define BIT_FEN_PCIED_8812F BIT(8) 52 #define BIT_FEN_PPLL_8812F BIT(7) 53 #define BIT_FEN_PCIEA_8812F BIT(6) 54 #define BIT_FEN_DIO_PCIE_8812F BIT(5) 55 #define BIT_FEN_USBD_8812F BIT(4) 56 #define BIT_FEN_UPLL_8812F BIT(3) 57 #define BIT_FEN_USBA_8812F BIT(2) 58 #define BIT_FEN_BB_GLB_RSTN_8812F BIT(1) 59 #define BIT_FEN_BBRSTB_8812F BIT(0) 60 61 /* 2 REG_SYS_PW_CTRL_8812F */ 62 #define BIT_SOP_EABM_8812F BIT(31) 63 #define BIT_SOP_ACKF_8812F BIT(30) 64 #define BIT_SOP_ERCK_8812F BIT(29) 65 #define BIT_SOP_ESWR_8812F BIT(28) 66 #define BIT_SOP_PWMM_8812F BIT(27) 67 #define BIT_SOP_EECK_8812F BIT(26) 68 #define BIT_SOP_ANA_CLK_DIVISION_2_8812F BIT(25) 69 #define BIT_SOP_EXTL_8812F BIT(24) 70 #define BIT_SYM_OP_RING_12M_8812F BIT(22) 71 #define BIT_ROP_SWPR_8812F BIT(21) 72 #define BIT_DIS_HW_LPLDM_8812F BIT(20) 73 #define BIT_OPT_SWRST_WLMCU_8812F BIT(19) 74 #define BIT_RDY_SYSPWR_8812F BIT(17) 75 #define BIT_EN_WLON_8812F BIT(16) 76 #define BIT_APDM_HPDN_8812F BIT(15) 77 #define BIT_AFSM_PCIE_SUS_EN_8812F BIT(12) 78 #define BIT_AFSM_WLSUS_EN_8812F BIT(11) 79 #define BIT_APFM_SWLPS_8812F BIT(10) 80 #define BIT_APFM_OFFMAC_8812F BIT(9) 81 #define BIT_APFN_ONMAC_8812F BIT(8) 82 #define BIT_CHIP_PDN_EN_8812F BIT(7) 83 #define BIT_RDY_MACDIS_8812F BIT(6) 84 85 /* 2 REG_NOT_VALID_8812F */ 86 #define BIT_PFM_WOWL_8812F BIT(3) 87 #define BIT_PFM_LDKP_8812F BIT(2) 88 #define BIT_WL_HCI_ALD_8812F BIT(1) 89 #define BIT_PFM_LDALL_8812F BIT(0) 90 91 /* 2 REG_SYS_CLK_CTRL_8812F */ 92 93 /* 2 REG_NOT_VALID_8812F */ 94 #define BIT_CPU_CLK_EN_8812F BIT(14) 95 #define BIT_SYMREG_CLK_EN_8812F BIT(13) 96 #define BIT_HCI_CLK_EN_8812F BIT(12) 97 #define BIT_MAC_CLK_EN_8812F BIT(11) 98 #define BIT_SEC_CLK_EN_8812F BIT(10) 99 #define BIT_PHY_SSC_RSTB_8812F BIT(9) 100 #define BIT_EXT_32K_EN_8812F BIT(8) 101 #define BIT_WL_CLK_TEST_8812F BIT(7) 102 #define BIT_OP_SPS_PWM_EN_8812F BIT(6) 103 #define BIT_LOADER_CLK_EN_8812F BIT(5) 104 #define BIT_MACSLP_8812F BIT(4) 105 #define BIT_WAKEPAD_EN_8812F BIT(3) 106 #define BIT_ROMD16V_EN_8812F BIT(2) 107 #define BIT_ANA_CLK_DIVISION_2_8812F BIT(1) 108 #define BIT_CNTD16V_EN_8812F BIT(0) 109 110 /* 2 REG_SYS_EEPROM_CTRL_8812F */ 111 112 #define BIT_SHIFT_VPDIDX_8812F 8 113 #define BIT_MASK_VPDIDX_8812F 0xff 114 #define BIT_VPDIDX_8812F(x) \ 115 (((x) & BIT_MASK_VPDIDX_8812F) << BIT_SHIFT_VPDIDX_8812F) 116 #define BITS_VPDIDX_8812F (BIT_MASK_VPDIDX_8812F << BIT_SHIFT_VPDIDX_8812F) 117 #define BIT_CLEAR_VPDIDX_8812F(x) ((x) & (~BITS_VPDIDX_8812F)) 118 #define BIT_GET_VPDIDX_8812F(x) \ 119 (((x) >> BIT_SHIFT_VPDIDX_8812F) & BIT_MASK_VPDIDX_8812F) 120 #define BIT_SET_VPDIDX_8812F(x, v) \ 121 (BIT_CLEAR_VPDIDX_8812F(x) | BIT_VPDIDX_8812F(v)) 122 123 #define BIT_SHIFT_EEM1_0_8812F 6 124 #define BIT_MASK_EEM1_0_8812F 0x3 125 #define BIT_EEM1_0_8812F(x) \ 126 (((x) & BIT_MASK_EEM1_0_8812F) << BIT_SHIFT_EEM1_0_8812F) 127 #define BITS_EEM1_0_8812F (BIT_MASK_EEM1_0_8812F << BIT_SHIFT_EEM1_0_8812F) 128 #define BIT_CLEAR_EEM1_0_8812F(x) ((x) & (~BITS_EEM1_0_8812F)) 129 #define BIT_GET_EEM1_0_8812F(x) \ 130 (((x) >> BIT_SHIFT_EEM1_0_8812F) & BIT_MASK_EEM1_0_8812F) 131 #define BIT_SET_EEM1_0_8812F(x, v) \ 132 (BIT_CLEAR_EEM1_0_8812F(x) | BIT_EEM1_0_8812F(v)) 133 134 #define BIT_AUTOLOAD_SUS_8812F BIT(5) 135 #define BIT_EERPOMSEL_8812F BIT(4) 136 #define BIT_EECS_V1_8812F BIT(3) 137 #define BIT_EESK_V1_8812F BIT(2) 138 #define BIT_EEDI_V1_8812F BIT(1) 139 #define BIT_EEDO_V1_8812F BIT(0) 140 141 /* 2 REG_EE_VPD_8812F */ 142 143 #define BIT_SHIFT_VPD_DATA_8812F 0 144 #define BIT_MASK_VPD_DATA_8812F 0xffffffffL 145 #define BIT_VPD_DATA_8812F(x) \ 146 (((x) & BIT_MASK_VPD_DATA_8812F) << BIT_SHIFT_VPD_DATA_8812F) 147 #define BITS_VPD_DATA_8812F \ 148 (BIT_MASK_VPD_DATA_8812F << BIT_SHIFT_VPD_DATA_8812F) 149 #define BIT_CLEAR_VPD_DATA_8812F(x) ((x) & (~BITS_VPD_DATA_8812F)) 150 #define BIT_GET_VPD_DATA_8812F(x) \ 151 (((x) >> BIT_SHIFT_VPD_DATA_8812F) & BIT_MASK_VPD_DATA_8812F) 152 #define BIT_SET_VPD_DATA_8812F(x, v) \ 153 (BIT_CLEAR_VPD_DATA_8812F(x) | BIT_VPD_DATA_8812F(v)) 154 155 /* 2 REG_SYS_SWR_CTRL1_8812F */ 156 157 /* 2 REG_NOT_VALID_8812F */ 158 159 /* 2 REG_NOT_VALID_8812F */ 160 161 /* 2 REG_NOT_VALID_8812F */ 162 163 /* 2 REG_NOT_VALID_8812F */ 164 165 /* 2 REG_NOT_VALID_8812F */ 166 167 /* 2 REG_NOT_VALID_8812F */ 168 169 /* 2 REG_NOT_VALID_8812F */ 170 171 /* 2 REG_NOT_VALID_8812F */ 172 173 /* 2 REG_NOT_VALID_8812F */ 174 175 /* 2 REG_NOT_VALID_8812F */ 176 177 /* 2 REG_NOT_VALID_8812F */ 178 179 /* 2 REG_NOT_VALID_8812F */ 180 #define BIT_HW_AUTO_CTRL_EXT_SWR_8812F BIT(9) 181 #define BIT_USE_INTERNAL_SWR_AND_LDO_8812F BIT(8) 182 #define BIT_MAC_ID_EN_8812F BIT(7) 183 184 /* 2 REG_NOT_VALID_8812F */ 185 186 /* 2 REG_SYS_SWR_CTRL2_8812F */ 187 188 /* 2 REG_NOT_VALID_8812F */ 189 190 /* 2 REG_NOT_VALID_8812F */ 191 192 /* 2 REG_NOT_VALID_8812F */ 193 194 /* 2 REG_NOT_VALID_8812F */ 195 196 /* 2 REG_NOT_VALID_8812F */ 197 198 /* 2 REG_NOT_VALID_8812F */ 199 200 /* 2 REG_NOT_VALID_8812F */ 201 #define BIT_SW18_SEL_8812F BIT(13) 202 203 /* 2 REG_NOT_VALID_8812F */ 204 #define BIT_SW18_SD_8812F BIT(10) 205 206 /* 2 REG_NOT_VALID_8812F */ 207 208 /* 2 REG_NOT_VALID_8812F */ 209 210 /* 2 REG_NOT_VALID_8812F */ 211 212 /* 2 REG_NOT_VALID_8812F */ 213 214 /* 2 REG_NOT_VALID_8812F */ 215 216 /* 2 REG_NOT_VALID_8812F */ 217 218 /* 2 REG_SYS_SWR_CTRL3_8812F */ 219 #define BIT_SPS18_OCP_DIS_8812F BIT(31) 220 221 #define BIT_SHIFT_SPS18_OCP_TH_8812F 16 222 #define BIT_MASK_SPS18_OCP_TH_8812F 0x7fff 223 #define BIT_SPS18_OCP_TH_8812F(x) \ 224 (((x) & BIT_MASK_SPS18_OCP_TH_8812F) << BIT_SHIFT_SPS18_OCP_TH_8812F) 225 #define BITS_SPS18_OCP_TH_8812F \ 226 (BIT_MASK_SPS18_OCP_TH_8812F << BIT_SHIFT_SPS18_OCP_TH_8812F) 227 #define BIT_CLEAR_SPS18_OCP_TH_8812F(x) ((x) & (~BITS_SPS18_OCP_TH_8812F)) 228 #define BIT_GET_SPS18_OCP_TH_8812F(x) \ 229 (((x) >> BIT_SHIFT_SPS18_OCP_TH_8812F) & BIT_MASK_SPS18_OCP_TH_8812F) 230 #define BIT_SET_SPS18_OCP_TH_8812F(x, v) \ 231 (BIT_CLEAR_SPS18_OCP_TH_8812F(x) | BIT_SPS18_OCP_TH_8812F(v)) 232 233 #define BIT_SHIFT_OCP_WINDOW_8812F 0 234 #define BIT_MASK_OCP_WINDOW_8812F 0xffff 235 #define BIT_OCP_WINDOW_8812F(x) \ 236 (((x) & BIT_MASK_OCP_WINDOW_8812F) << BIT_SHIFT_OCP_WINDOW_8812F) 237 #define BITS_OCP_WINDOW_8812F \ 238 (BIT_MASK_OCP_WINDOW_8812F << BIT_SHIFT_OCP_WINDOW_8812F) 239 #define BIT_CLEAR_OCP_WINDOW_8812F(x) ((x) & (~BITS_OCP_WINDOW_8812F)) 240 #define BIT_GET_OCP_WINDOW_8812F(x) \ 241 (((x) >> BIT_SHIFT_OCP_WINDOW_8812F) & BIT_MASK_OCP_WINDOW_8812F) 242 #define BIT_SET_OCP_WINDOW_8812F(x, v) \ 243 (BIT_CLEAR_OCP_WINDOW_8812F(x) | BIT_OCP_WINDOW_8812F(v)) 244 245 /* 2 REG_RSV_CTRL_8812F */ 246 #define BIT_HREG_DBG_8812F BIT(23) 247 #define BIT_WLMCUIOIF_8812F BIT(8) 248 #define BIT_LOCK_ALL_EN_8812F BIT(7) 249 #define BIT_R_DIS_PRST_8812F BIT(6) 250 #define BIT_WLOCK_1C_B6_8812F BIT(5) 251 #define BIT_WLOCK_40_8812F BIT(4) 252 #define BIT_WLOCK_08_8812F BIT(3) 253 #define BIT_WLOCK_04_8812F BIT(2) 254 #define BIT_WLOCK_00_8812F BIT(1) 255 #define BIT_WLOCK_ALL_8812F BIT(0) 256 257 /* 2 REG_RF_CTRL_8812F */ 258 #define BIT_RF_SDMRSTB_8812F BIT(2) 259 #define BIT_RF_RSTB_8812F BIT(1) 260 #define BIT_RF_EN_8812F BIT(0) 261 262 /* 2 REG_AFE_LDO_CTRL_8812F */ 263 #define BIT_R_SYM_WLPON_EMEM1_EN_8812F BIT(31) 264 #define BIT_R_SYM_WLPON_EMEM0_EN_8812F BIT(30) 265 #define BIT_R_SYM_WLPOFF_P4EN_8812F BIT(28) 266 #define BIT_R_SYM_WLPOFF_P3EN_8812F BIT(27) 267 #define BIT_R_SYM_WLPOFF_P2EN_8812F BIT(26) 268 #define BIT_R_SYM_WLPOFF_P1EN_8812F BIT(25) 269 #define BIT_R_SYM_WLPOFF_EN_8812F BIT(24) 270 #define BIT_R_SYM_WLPON_P3EN_8812F BIT(21) 271 #define BIT_R_SYM_WLPON_P2EN_8812F BIT(20) 272 #define BIT_R_SYM_WLPON_P1EN_8812F BIT(19) 273 #define BIT_R_SYM_WLPON_EN_8812F BIT(18) 274 #define BIT_R_SYM_LDOV12D_STBY_8812F BIT(16) 275 #define BIT_BB_POWER_CUT_CTRL_BY_BB_8812F BIT(15) 276 #define BIT_R_SYM_WLBBOFF1_P4_EN_8812F BIT(9) 277 #define BIT_R_SYM_WLBBOFF1_P3_EN_8812F BIT(8) 278 #define BIT_R_SYM_WLBBOFF1_P2_EN_8812F BIT(7) 279 #define BIT_R_SYM_WLBBOFF1_P1_EN_8812F BIT(6) 280 #define BIT_R_SYM_WLBBOFF_P4_EN_8812F BIT(4) 281 #define BIT_R_SYM_WLBBOFF_P3_EN_8812F BIT(3) 282 #define BIT_R_SYM_WLBBOFF_P2_EN_8812F BIT(2) 283 #define BIT_R_SYM_WLBBOFF_P1_EN_8812F BIT(1) 284 #define BIT_R_SYM_WLBBOFF_EN_8812F BIT(0) 285 286 /* 2 REG_AFE_CTRL1_8812F */ 287 288 /* 2 REG_NOT_VALID_8812F */ 289 290 /* 2 REG_NOT_VALID_8812F */ 291 292 /* 2 REG_NOT_VALID_8812F */ 293 294 /* 2 REG_NOT_VALID_8812F */ 295 296 #define BIT_SHIFT_MAC_CLK_SEL_8812F 20 297 #define BIT_MASK_MAC_CLK_SEL_8812F 0x3 298 #define BIT_MAC_CLK_SEL_8812F(x) \ 299 (((x) & BIT_MASK_MAC_CLK_SEL_8812F) << BIT_SHIFT_MAC_CLK_SEL_8812F) 300 #define BITS_MAC_CLK_SEL_8812F \ 301 (BIT_MASK_MAC_CLK_SEL_8812F << BIT_SHIFT_MAC_CLK_SEL_8812F) 302 #define BIT_CLEAR_MAC_CLK_SEL_8812F(x) ((x) & (~BITS_MAC_CLK_SEL_8812F)) 303 #define BIT_GET_MAC_CLK_SEL_8812F(x) \ 304 (((x) >> BIT_SHIFT_MAC_CLK_SEL_8812F) & BIT_MASK_MAC_CLK_SEL_8812F) 305 #define BIT_SET_MAC_CLK_SEL_8812F(x, v) \ 306 (BIT_CLEAR_MAC_CLK_SEL_8812F(x) | BIT_MAC_CLK_SEL_8812F(v)) 307 308 /* 2 REG_NOT_VALID_8812F */ 309 310 /* 2 REG_NOT_VALID_8812F */ 311 312 /* 2 REG_NOT_VALID_8812F */ 313 314 /* 2 REG_NOT_VALID_8812F */ 315 316 /* 2 REG_NOT_VALID_8812F */ 317 318 /* 2 REG_NOT_VALID_8812F */ 319 320 /* 2 REG_NOT_VALID_8812F */ 321 322 /* 2 REG_NOT_VALID_8812F */ 323 324 /* 2 REG_NOT_VALID_8812F */ 325 326 /* 2 REG_NOT_VALID_8812F */ 327 328 /* 2 REG_NOT_VALID_8812F */ 329 330 /* 2 REG_NOT_VALID_8812F */ 331 332 /* 2 REG_NOT_VALID_8812F */ 333 334 /* 2 REG_ANAPARSW_POW_MAC_8812F */ 335 #define BIT_POW_LDO15_8812F BIT(2) 336 #define BIT_POW_SW_8812F BIT(1) 337 #define BIT_POW_LDO14_8812F BIT(0) 338 339 /* 2 REG_ANAPARLDO_POW_MAC_8812F */ 340 #define BIT_LDOE25_POW_L_8812F BIT(0) 341 342 /* 2 REG_ANAPAR_POW_MAC_8812F */ 343 #define BIT_DUMMY_V4_8812F BIT(7) 344 #define BIT_DUMMY_V3_8812F BIT(6) 345 #define BIT_DUMMY_V2_8812F BIT(5) 346 #define BIT_DUMMY_V1_8812F BIT(4) 347 #define BIT_POW_PC_LDO_PORT1_8812F BIT(3) 348 #define BIT_POW_PC_LDO_PORT0_8812F BIT(2) 349 #define BIT_POW_PLL_V1_8812F BIT(1) 350 #define BIT_POW_POWER_CUT_POW_LDO_8812F BIT(0) 351 352 /* 2 REG_ANAPAR_POW_XTAL_8812F */ 353 #define BIT_POW_XTAL_8812F BIT(1) 354 #define BIT_POW_BG_8812F BIT(0) 355 356 /* 2 REG_ANAPARLDO_MAC_8812F */ 357 358 /* 2 REG_NOT_VALID_8812F */ 359 #define BIT_REG_STANDBY_L_8812F BIT(19) 360 #define BIT_PD_REGU_L_8812F BIT(18) 361 #define BIT_EN_PC_BT_L_8812F BIT(17) 362 363 #define BIT_SHIFT_REG_LDOADJ_L_8812F 13 364 #define BIT_MASK_REG_LDOADJ_L_8812F 0xf 365 #define BIT_REG_LDOADJ_L_8812F(x) \ 366 (((x) & BIT_MASK_REG_LDOADJ_L_8812F) << BIT_SHIFT_REG_LDOADJ_L_8812F) 367 #define BITS_REG_LDOADJ_L_8812F \ 368 (BIT_MASK_REG_LDOADJ_L_8812F << BIT_SHIFT_REG_LDOADJ_L_8812F) 369 #define BIT_CLEAR_REG_LDOADJ_L_8812F(x) ((x) & (~BITS_REG_LDOADJ_L_8812F)) 370 #define BIT_GET_REG_LDOADJ_L_8812F(x) \ 371 (((x) >> BIT_SHIFT_REG_LDOADJ_L_8812F) & BIT_MASK_REG_LDOADJ_L_8812F) 372 #define BIT_SET_REG_LDOADJ_L_8812F(x, v) \ 373 (BIT_CLEAR_REG_LDOADJ_L_8812F(x) | BIT_REG_LDOADJ_L_8812F(v)) 374 375 #define BIT_CK12M_EN_8812F BIT(11) 376 #define BIT_CK12M_SEL_8812F BIT(10) 377 #define BIT_EN_25_L_8812F BIT(9) 378 #define BIT_EN_SLEEP_8812F BIT(8) 379 380 #define BIT_SHIFT_LDOH12_V12ADJ_L_8812F 4 381 #define BIT_MASK_LDOH12_V12ADJ_L_8812F 0xf 382 #define BIT_LDOH12_V12ADJ_L_8812F(x) \ 383 (((x) & BIT_MASK_LDOH12_V12ADJ_L_8812F) \ 384 << BIT_SHIFT_LDOH12_V12ADJ_L_8812F) 385 #define BITS_LDOH12_V12ADJ_L_8812F \ 386 (BIT_MASK_LDOH12_V12ADJ_L_8812F << BIT_SHIFT_LDOH12_V12ADJ_L_8812F) 387 #define BIT_CLEAR_LDOH12_V12ADJ_L_8812F(x) ((x) & (~BITS_LDOH12_V12ADJ_L_8812F)) 388 #define BIT_GET_LDOH12_V12ADJ_L_8812F(x) \ 389 (((x) >> BIT_SHIFT_LDOH12_V12ADJ_L_8812F) & \ 390 BIT_MASK_LDOH12_V12ADJ_L_8812F) 391 #define BIT_SET_LDOH12_V12ADJ_L_8812F(x, v) \ 392 (BIT_CLEAR_LDOH12_V12ADJ_L_8812F(x) | BIT_LDOH12_V12ADJ_L_8812F(v)) 393 394 #define BIT_SHIFT_LDOE25_V12ADJ_L_V1_8812F 0 395 #define BIT_MASK_LDOE25_V12ADJ_L_V1_8812F 0xf 396 #define BIT_LDOE25_V12ADJ_L_V1_8812F(x) \ 397 (((x) & BIT_MASK_LDOE25_V12ADJ_L_V1_8812F) \ 398 << BIT_SHIFT_LDOE25_V12ADJ_L_V1_8812F) 399 #define BITS_LDOE25_V12ADJ_L_V1_8812F \ 400 (BIT_MASK_LDOE25_V12ADJ_L_V1_8812F \ 401 << BIT_SHIFT_LDOE25_V12ADJ_L_V1_8812F) 402 #define BIT_CLEAR_LDOE25_V12ADJ_L_V1_8812F(x) \ 403 ((x) & (~BITS_LDOE25_V12ADJ_L_V1_8812F)) 404 #define BIT_GET_LDOE25_V12ADJ_L_V1_8812F(x) \ 405 (((x) >> BIT_SHIFT_LDOE25_V12ADJ_L_V1_8812F) & \ 406 BIT_MASK_LDOE25_V12ADJ_L_V1_8812F) 407 #define BIT_SET_LDOE25_V12ADJ_L_V1_8812F(x, v) \ 408 (BIT_CLEAR_LDOE25_V12ADJ_L_V1_8812F(x) | \ 409 BIT_LDOE25_V12ADJ_L_V1_8812F(v)) 410 411 /* 2 REG_EFUSE_CTRL_8812F */ 412 #define BIT_EF_FLAG_8812F BIT(31) 413 414 #define BIT_SHIFT_EF_PGPD_8812F 28 415 #define BIT_MASK_EF_PGPD_8812F 0x7 416 #define BIT_EF_PGPD_8812F(x) \ 417 (((x) & BIT_MASK_EF_PGPD_8812F) << BIT_SHIFT_EF_PGPD_8812F) 418 #define BITS_EF_PGPD_8812F (BIT_MASK_EF_PGPD_8812F << BIT_SHIFT_EF_PGPD_8812F) 419 #define BIT_CLEAR_EF_PGPD_8812F(x) ((x) & (~BITS_EF_PGPD_8812F)) 420 #define BIT_GET_EF_PGPD_8812F(x) \ 421 (((x) >> BIT_SHIFT_EF_PGPD_8812F) & BIT_MASK_EF_PGPD_8812F) 422 #define BIT_SET_EF_PGPD_8812F(x, v) \ 423 (BIT_CLEAR_EF_PGPD_8812F(x) | BIT_EF_PGPD_8812F(v)) 424 425 #define BIT_SHIFT_EF_RDT_8812F 24 426 #define BIT_MASK_EF_RDT_8812F 0xf 427 #define BIT_EF_RDT_8812F(x) \ 428 (((x) & BIT_MASK_EF_RDT_8812F) << BIT_SHIFT_EF_RDT_8812F) 429 #define BITS_EF_RDT_8812F (BIT_MASK_EF_RDT_8812F << BIT_SHIFT_EF_RDT_8812F) 430 #define BIT_CLEAR_EF_RDT_8812F(x) ((x) & (~BITS_EF_RDT_8812F)) 431 #define BIT_GET_EF_RDT_8812F(x) \ 432 (((x) >> BIT_SHIFT_EF_RDT_8812F) & BIT_MASK_EF_RDT_8812F) 433 #define BIT_SET_EF_RDT_8812F(x, v) \ 434 (BIT_CLEAR_EF_RDT_8812F(x) | BIT_EF_RDT_8812F(v)) 435 436 #define BIT_SHIFT_EF_PGTS_8812F 20 437 #define BIT_MASK_EF_PGTS_8812F 0xf 438 #define BIT_EF_PGTS_8812F(x) \ 439 (((x) & BIT_MASK_EF_PGTS_8812F) << BIT_SHIFT_EF_PGTS_8812F) 440 #define BITS_EF_PGTS_8812F (BIT_MASK_EF_PGTS_8812F << BIT_SHIFT_EF_PGTS_8812F) 441 #define BIT_CLEAR_EF_PGTS_8812F(x) ((x) & (~BITS_EF_PGTS_8812F)) 442 #define BIT_GET_EF_PGTS_8812F(x) \ 443 (((x) >> BIT_SHIFT_EF_PGTS_8812F) & BIT_MASK_EF_PGTS_8812F) 444 #define BIT_SET_EF_PGTS_8812F(x, v) \ 445 (BIT_CLEAR_EF_PGTS_8812F(x) | BIT_EF_PGTS_8812F(v)) 446 447 #define BIT_EF_PDWN_8812F BIT(19) 448 #define BIT_EF_ALDEN_8812F BIT(18) 449 450 #define BIT_SHIFT_EF_ADDR_8812F 8 451 #define BIT_MASK_EF_ADDR_8812F 0x3ff 452 #define BIT_EF_ADDR_8812F(x) \ 453 (((x) & BIT_MASK_EF_ADDR_8812F) << BIT_SHIFT_EF_ADDR_8812F) 454 #define BITS_EF_ADDR_8812F (BIT_MASK_EF_ADDR_8812F << BIT_SHIFT_EF_ADDR_8812F) 455 #define BIT_CLEAR_EF_ADDR_8812F(x) ((x) & (~BITS_EF_ADDR_8812F)) 456 #define BIT_GET_EF_ADDR_8812F(x) \ 457 (((x) >> BIT_SHIFT_EF_ADDR_8812F) & BIT_MASK_EF_ADDR_8812F) 458 #define BIT_SET_EF_ADDR_8812F(x, v) \ 459 (BIT_CLEAR_EF_ADDR_8812F(x) | BIT_EF_ADDR_8812F(v)) 460 461 #define BIT_SHIFT_EF_DATA_8812F 0 462 #define BIT_MASK_EF_DATA_8812F 0xff 463 #define BIT_EF_DATA_8812F(x) \ 464 (((x) & BIT_MASK_EF_DATA_8812F) << BIT_SHIFT_EF_DATA_8812F) 465 #define BITS_EF_DATA_8812F (BIT_MASK_EF_DATA_8812F << BIT_SHIFT_EF_DATA_8812F) 466 #define BIT_CLEAR_EF_DATA_8812F(x) ((x) & (~BITS_EF_DATA_8812F)) 467 #define BIT_GET_EF_DATA_8812F(x) \ 468 (((x) >> BIT_SHIFT_EF_DATA_8812F) & BIT_MASK_EF_DATA_8812F) 469 #define BIT_SET_EF_DATA_8812F(x, v) \ 470 (BIT_CLEAR_EF_DATA_8812F(x) | BIT_EF_DATA_8812F(v)) 471 472 /* 2 REG_LDO_EFUSE_CTRL_8812F */ 473 474 /* 2 REG_NOT_VALID_8812F */ 475 476 /* 2 REG_NOT_VALID_8812F */ 477 #define BIT_EF_CRES_SEL_8812F BIT(26) 478 479 #define BIT_SHIFT_EF_SCAN_START_V1_8812F 16 480 #define BIT_MASK_EF_SCAN_START_V1_8812F 0x3ff 481 #define BIT_EF_SCAN_START_V1_8812F(x) \ 482 (((x) & BIT_MASK_EF_SCAN_START_V1_8812F) \ 483 << BIT_SHIFT_EF_SCAN_START_V1_8812F) 484 #define BITS_EF_SCAN_START_V1_8812F \ 485 (BIT_MASK_EF_SCAN_START_V1_8812F << BIT_SHIFT_EF_SCAN_START_V1_8812F) 486 #define BIT_CLEAR_EF_SCAN_START_V1_8812F(x) \ 487 ((x) & (~BITS_EF_SCAN_START_V1_8812F)) 488 #define BIT_GET_EF_SCAN_START_V1_8812F(x) \ 489 (((x) >> BIT_SHIFT_EF_SCAN_START_V1_8812F) & \ 490 BIT_MASK_EF_SCAN_START_V1_8812F) 491 #define BIT_SET_EF_SCAN_START_V1_8812F(x, v) \ 492 (BIT_CLEAR_EF_SCAN_START_V1_8812F(x) | BIT_EF_SCAN_START_V1_8812F(v)) 493 494 #define BIT_SHIFT_EF_SCAN_END_8812F 12 495 #define BIT_MASK_EF_SCAN_END_8812F 0xf 496 #define BIT_EF_SCAN_END_8812F(x) \ 497 (((x) & BIT_MASK_EF_SCAN_END_8812F) << BIT_SHIFT_EF_SCAN_END_8812F) 498 #define BITS_EF_SCAN_END_8812F \ 499 (BIT_MASK_EF_SCAN_END_8812F << BIT_SHIFT_EF_SCAN_END_8812F) 500 #define BIT_CLEAR_EF_SCAN_END_8812F(x) ((x) & (~BITS_EF_SCAN_END_8812F)) 501 #define BIT_GET_EF_SCAN_END_8812F(x) \ 502 (((x) >> BIT_SHIFT_EF_SCAN_END_8812F) & BIT_MASK_EF_SCAN_END_8812F) 503 #define BIT_SET_EF_SCAN_END_8812F(x, v) \ 504 (BIT_CLEAR_EF_SCAN_END_8812F(x) | BIT_EF_SCAN_END_8812F(v)) 505 506 #define BIT_EF_PD_DIS_8812F BIT(11) 507 508 #define BIT_SHIFT_EF_CELL_SEL_8812F 8 509 #define BIT_MASK_EF_CELL_SEL_8812F 0x3 510 #define BIT_EF_CELL_SEL_8812F(x) \ 511 (((x) & BIT_MASK_EF_CELL_SEL_8812F) << BIT_SHIFT_EF_CELL_SEL_8812F) 512 #define BITS_EF_CELL_SEL_8812F \ 513 (BIT_MASK_EF_CELL_SEL_8812F << BIT_SHIFT_EF_CELL_SEL_8812F) 514 #define BIT_CLEAR_EF_CELL_SEL_8812F(x) ((x) & (~BITS_EF_CELL_SEL_8812F)) 515 #define BIT_GET_EF_CELL_SEL_8812F(x) \ 516 (((x) >> BIT_SHIFT_EF_CELL_SEL_8812F) & BIT_MASK_EF_CELL_SEL_8812F) 517 #define BIT_SET_EF_CELL_SEL_8812F(x, v) \ 518 (BIT_CLEAR_EF_CELL_SEL_8812F(x) | BIT_EF_CELL_SEL_8812F(v)) 519 520 #define BIT_EF_TRPT_8812F BIT(7) 521 522 #define BIT_SHIFT_EF_TTHD_8812F 0 523 #define BIT_MASK_EF_TTHD_8812F 0x7f 524 #define BIT_EF_TTHD_8812F(x) \ 525 (((x) & BIT_MASK_EF_TTHD_8812F) << BIT_SHIFT_EF_TTHD_8812F) 526 #define BITS_EF_TTHD_8812F (BIT_MASK_EF_TTHD_8812F << BIT_SHIFT_EF_TTHD_8812F) 527 #define BIT_CLEAR_EF_TTHD_8812F(x) ((x) & (~BITS_EF_TTHD_8812F)) 528 #define BIT_GET_EF_TTHD_8812F(x) \ 529 (((x) >> BIT_SHIFT_EF_TTHD_8812F) & BIT_MASK_EF_TTHD_8812F) 530 #define BIT_SET_EF_TTHD_8812F(x, v) \ 531 (BIT_CLEAR_EF_TTHD_8812F(x) | BIT_EF_TTHD_8812F(v)) 532 533 /* 2 REG_PWR_OPTION_CTRL_8812F */ 534 535 #define BIT_SHIFT_DBG_SEL_V1_8812F 16 536 #define BIT_MASK_DBG_SEL_V1_8812F 0xff 537 #define BIT_DBG_SEL_V1_8812F(x) \ 538 (((x) & BIT_MASK_DBG_SEL_V1_8812F) << BIT_SHIFT_DBG_SEL_V1_8812F) 539 #define BITS_DBG_SEL_V1_8812F \ 540 (BIT_MASK_DBG_SEL_V1_8812F << BIT_SHIFT_DBG_SEL_V1_8812F) 541 #define BIT_CLEAR_DBG_SEL_V1_8812F(x) ((x) & (~BITS_DBG_SEL_V1_8812F)) 542 #define BIT_GET_DBG_SEL_V1_8812F(x) \ 543 (((x) >> BIT_SHIFT_DBG_SEL_V1_8812F) & BIT_MASK_DBG_SEL_V1_8812F) 544 #define BIT_SET_DBG_SEL_V1_8812F(x, v) \ 545 (BIT_CLEAR_DBG_SEL_V1_8812F(x) | BIT_DBG_SEL_V1_8812F(v)) 546 547 #define BIT_SHIFT_DBG_SEL_BYTE_8812F 14 548 #define BIT_MASK_DBG_SEL_BYTE_8812F 0x3 549 #define BIT_DBG_SEL_BYTE_8812F(x) \ 550 (((x) & BIT_MASK_DBG_SEL_BYTE_8812F) << BIT_SHIFT_DBG_SEL_BYTE_8812F) 551 #define BITS_DBG_SEL_BYTE_8812F \ 552 (BIT_MASK_DBG_SEL_BYTE_8812F << BIT_SHIFT_DBG_SEL_BYTE_8812F) 553 #define BIT_CLEAR_DBG_SEL_BYTE_8812F(x) ((x) & (~BITS_DBG_SEL_BYTE_8812F)) 554 #define BIT_GET_DBG_SEL_BYTE_8812F(x) \ 555 (((x) >> BIT_SHIFT_DBG_SEL_BYTE_8812F) & BIT_MASK_DBG_SEL_BYTE_8812F) 556 #define BIT_SET_DBG_SEL_BYTE_8812F(x, v) \ 557 (BIT_CLEAR_DBG_SEL_BYTE_8812F(x) | BIT_DBG_SEL_BYTE_8812F(v)) 558 559 /* 2 REG_NOT_VALID_8812F */ 560 #define BIT_SYSON_DBG_PAD_E2_8812F BIT(11) 561 #define BIT_SYSON_LED_PAD_E2_8812F BIT(10) 562 #define BIT_SYSON_GPEE_PAD_E2_8812F BIT(9) 563 #define BIT_SYSON_PCI_PAD_E2_8812F BIT(8) 564 #define BIT_AUTO_SW_LDO_VOL_EN_8812F BIT(7) 565 566 #define BIT_SHIFT_SYSON_SPS0WWV_WT_8812F 4 567 #define BIT_MASK_SYSON_SPS0WWV_WT_8812F 0x3 568 #define BIT_SYSON_SPS0WWV_WT_8812F(x) \ 569 (((x) & BIT_MASK_SYSON_SPS0WWV_WT_8812F) \ 570 << BIT_SHIFT_SYSON_SPS0WWV_WT_8812F) 571 #define BITS_SYSON_SPS0WWV_WT_8812F \ 572 (BIT_MASK_SYSON_SPS0WWV_WT_8812F << BIT_SHIFT_SYSON_SPS0WWV_WT_8812F) 573 #define BIT_CLEAR_SYSON_SPS0WWV_WT_8812F(x) \ 574 ((x) & (~BITS_SYSON_SPS0WWV_WT_8812F)) 575 #define BIT_GET_SYSON_SPS0WWV_WT_8812F(x) \ 576 (((x) >> BIT_SHIFT_SYSON_SPS0WWV_WT_8812F) & \ 577 BIT_MASK_SYSON_SPS0WWV_WT_8812F) 578 #define BIT_SET_SYSON_SPS0WWV_WT_8812F(x, v) \ 579 (BIT_CLEAR_SYSON_SPS0WWV_WT_8812F(x) | BIT_SYSON_SPS0WWV_WT_8812F(v)) 580 581 #define BIT_SHIFT_SYSON_SPS0LDO_WT_8812F 2 582 #define BIT_MASK_SYSON_SPS0LDO_WT_8812F 0x3 583 #define BIT_SYSON_SPS0LDO_WT_8812F(x) \ 584 (((x) & BIT_MASK_SYSON_SPS0LDO_WT_8812F) \ 585 << BIT_SHIFT_SYSON_SPS0LDO_WT_8812F) 586 #define BITS_SYSON_SPS0LDO_WT_8812F \ 587 (BIT_MASK_SYSON_SPS0LDO_WT_8812F << BIT_SHIFT_SYSON_SPS0LDO_WT_8812F) 588 #define BIT_CLEAR_SYSON_SPS0LDO_WT_8812F(x) \ 589 ((x) & (~BITS_SYSON_SPS0LDO_WT_8812F)) 590 #define BIT_GET_SYSON_SPS0LDO_WT_8812F(x) \ 591 (((x) >> BIT_SHIFT_SYSON_SPS0LDO_WT_8812F) & \ 592 BIT_MASK_SYSON_SPS0LDO_WT_8812F) 593 #define BIT_SET_SYSON_SPS0LDO_WT_8812F(x, v) \ 594 (BIT_CLEAR_SYSON_SPS0LDO_WT_8812F(x) | BIT_SYSON_SPS0LDO_WT_8812F(v)) 595 596 #define BIT_SHIFT_SYSON_RCLK_SCALE_8812F 0 597 #define BIT_MASK_SYSON_RCLK_SCALE_8812F 0x3 598 #define BIT_SYSON_RCLK_SCALE_8812F(x) \ 599 (((x) & BIT_MASK_SYSON_RCLK_SCALE_8812F) \ 600 << BIT_SHIFT_SYSON_RCLK_SCALE_8812F) 601 #define BITS_SYSON_RCLK_SCALE_8812F \ 602 (BIT_MASK_SYSON_RCLK_SCALE_8812F << BIT_SHIFT_SYSON_RCLK_SCALE_8812F) 603 #define BIT_CLEAR_SYSON_RCLK_SCALE_8812F(x) \ 604 ((x) & (~BITS_SYSON_RCLK_SCALE_8812F)) 605 #define BIT_GET_SYSON_RCLK_SCALE_8812F(x) \ 606 (((x) >> BIT_SHIFT_SYSON_RCLK_SCALE_8812F) & \ 607 BIT_MASK_SYSON_RCLK_SCALE_8812F) 608 #define BIT_SET_SYSON_RCLK_SCALE_8812F(x, v) \ 609 (BIT_CLEAR_SYSON_RCLK_SCALE_8812F(x) | BIT_SYSON_RCLK_SCALE_8812F(v)) 610 611 /* 2 REG_CAL_TIMER_8812F */ 612 613 #define BIT_SHIFT_MATCH_CNT_8812F 8 614 #define BIT_MASK_MATCH_CNT_8812F 0xff 615 #define BIT_MATCH_CNT_8812F(x) \ 616 (((x) & BIT_MASK_MATCH_CNT_8812F) << BIT_SHIFT_MATCH_CNT_8812F) 617 #define BITS_MATCH_CNT_8812F \ 618 (BIT_MASK_MATCH_CNT_8812F << BIT_SHIFT_MATCH_CNT_8812F) 619 #define BIT_CLEAR_MATCH_CNT_8812F(x) ((x) & (~BITS_MATCH_CNT_8812F)) 620 #define BIT_GET_MATCH_CNT_8812F(x) \ 621 (((x) >> BIT_SHIFT_MATCH_CNT_8812F) & BIT_MASK_MATCH_CNT_8812F) 622 #define BIT_SET_MATCH_CNT_8812F(x, v) \ 623 (BIT_CLEAR_MATCH_CNT_8812F(x) | BIT_MATCH_CNT_8812F(v)) 624 625 #define BIT_SHIFT_CAL_SCAL_8812F 0 626 #define BIT_MASK_CAL_SCAL_8812F 0xff 627 #define BIT_CAL_SCAL_8812F(x) \ 628 (((x) & BIT_MASK_CAL_SCAL_8812F) << BIT_SHIFT_CAL_SCAL_8812F) 629 #define BITS_CAL_SCAL_8812F \ 630 (BIT_MASK_CAL_SCAL_8812F << BIT_SHIFT_CAL_SCAL_8812F) 631 #define BIT_CLEAR_CAL_SCAL_8812F(x) ((x) & (~BITS_CAL_SCAL_8812F)) 632 #define BIT_GET_CAL_SCAL_8812F(x) \ 633 (((x) >> BIT_SHIFT_CAL_SCAL_8812F) & BIT_MASK_CAL_SCAL_8812F) 634 #define BIT_SET_CAL_SCAL_8812F(x, v) \ 635 (BIT_CLEAR_CAL_SCAL_8812F(x) | BIT_CAL_SCAL_8812F(v)) 636 637 /* 2 REG_ACLK_MON_8812F */ 638 639 #define BIT_SHIFT_RCLK_MON_8812F 5 640 #define BIT_MASK_RCLK_MON_8812F 0x7ff 641 #define BIT_RCLK_MON_8812F(x) \ 642 (((x) & BIT_MASK_RCLK_MON_8812F) << BIT_SHIFT_RCLK_MON_8812F) 643 #define BITS_RCLK_MON_8812F \ 644 (BIT_MASK_RCLK_MON_8812F << BIT_SHIFT_RCLK_MON_8812F) 645 #define BIT_CLEAR_RCLK_MON_8812F(x) ((x) & (~BITS_RCLK_MON_8812F)) 646 #define BIT_GET_RCLK_MON_8812F(x) \ 647 (((x) >> BIT_SHIFT_RCLK_MON_8812F) & BIT_MASK_RCLK_MON_8812F) 648 #define BIT_SET_RCLK_MON_8812F(x, v) \ 649 (BIT_CLEAR_RCLK_MON_8812F(x) | BIT_RCLK_MON_8812F(v)) 650 651 #define BIT_CAL_EN_8812F BIT(4) 652 653 #define BIT_SHIFT_DPSTU_8812F 2 654 #define BIT_MASK_DPSTU_8812F 0x3 655 #define BIT_DPSTU_8812F(x) \ 656 (((x) & BIT_MASK_DPSTU_8812F) << BIT_SHIFT_DPSTU_8812F) 657 #define BITS_DPSTU_8812F (BIT_MASK_DPSTU_8812F << BIT_SHIFT_DPSTU_8812F) 658 #define BIT_CLEAR_DPSTU_8812F(x) ((x) & (~BITS_DPSTU_8812F)) 659 #define BIT_GET_DPSTU_8812F(x) \ 660 (((x) >> BIT_SHIFT_DPSTU_8812F) & BIT_MASK_DPSTU_8812F) 661 #define BIT_SET_DPSTU_8812F(x, v) \ 662 (BIT_CLEAR_DPSTU_8812F(x) | BIT_DPSTU_8812F(v)) 663 664 #define BIT_SUS_16X_8812F BIT(1) 665 666 /* 2 REG_GPIO_MUXCFG_2_8812F */ 667 #define BIT_SOUT_GPIO8_8812F BIT(7) 668 #define BIT_SOUT_GPIO5_8812F BIT(6) 669 #define BIT_RFE_CTRL_5_GPIO14_V1_8812F BIT(5) 670 #define BIT_RFE_CTRL_10_GPIO13_V1_8812F BIT(4) 671 #define BIT_RFE_CTRL_11_GPIO4_V1_8812F BIT(3) 672 #define BIT_RFE_CTRL_5_GPIO14_8812F BIT(2) 673 #define BIT_RFE_CTRL_10_GPIO13_8812F BIT(1) 674 #define BIT_RFE_CTRL_11_GPIO4_8812F BIT(0) 675 676 /* 2 REG_GPIO_MUXCFG_8812F */ 677 #define BIT_RFE_CTRL_3_GPIO12_8812F BIT(31) 678 #define BIT_BT_RFE_CTRL_5_GPIO12_8812F BIT(30) 679 #define BIT_S0_TRSW_GPIO12_8812F BIT(29) 680 #define BIT_RFE_CTRL_9_GPIO13_8812F BIT(28) 681 #define BIT_RFE_CTRL_9_GPIO12_8812F BIT(27) 682 #define BIT_RFE_CTRL_8_GPIO4_8812F BIT(26) 683 #define BIT_BT_RFE_CTRL_1_GPIO13_8812F BIT(25) 684 #define BIT_BT_RFE_CTRL_1_GPIO12_8812F BIT(24) 685 #define BIT_BT_RFE_CTRL_0_GPIO4_8812F BIT(23) 686 #define BIT_ANTSW_GPIO13_8812F BIT(22) 687 #define BIT_ANTSW_GPIO12_8812F BIT(21) 688 #define BIT_ANTSWB_GPIO4_8812F BIT(20) 689 #define BIT_FSPI_EN_8812F BIT(19) 690 #define BIT_WL_RTS_EXT_32K_SEL_8812F BIT(18) 691 #define BIT_WLBT_DPDT_SEL_EN_8812F BIT(17) 692 #define BIT_WLBT_LNAON_SEL_EN_8812F BIT(16) 693 #define BIT_SIC_LBK_8812F BIT(15) 694 #define BIT_ENHTP_8812F BIT(14) 695 #define BIT_BT_AOD_GPIO3_8812F BIT(13) 696 #define BIT_ENSIC_8812F BIT(12) 697 #define BIT_SIC_SWRST_8812F BIT(11) 698 #define BIT_PO_WIFI_PTA_PINS_8812F BIT(10) 699 #define BIT_PO_BT_PTA_PINS_8812F BIT(9) 700 #define BIT_ENUART_8812F BIT(8) 701 702 #define BIT_SHIFT_BTMODE_8812F 6 703 #define BIT_MASK_BTMODE_8812F 0x3 704 #define BIT_BTMODE_8812F(x) \ 705 (((x) & BIT_MASK_BTMODE_8812F) << BIT_SHIFT_BTMODE_8812F) 706 #define BITS_BTMODE_8812F (BIT_MASK_BTMODE_8812F << BIT_SHIFT_BTMODE_8812F) 707 #define BIT_CLEAR_BTMODE_8812F(x) ((x) & (~BITS_BTMODE_8812F)) 708 #define BIT_GET_BTMODE_8812F(x) \ 709 (((x) >> BIT_SHIFT_BTMODE_8812F) & BIT_MASK_BTMODE_8812F) 710 #define BIT_SET_BTMODE_8812F(x, v) \ 711 (BIT_CLEAR_BTMODE_8812F(x) | BIT_BTMODE_8812F(v)) 712 713 #define BIT_ENBT_8812F BIT(5) 714 #define BIT_EROM_EN_8812F BIT(4) 715 #define BIT_WLRFE_6_7_EN_8812F BIT(3) 716 #define BIT_WLRFE_4_5_EN_8812F BIT(2) 717 718 #define BIT_SHIFT_GPIOSEL_8812F 0 719 #define BIT_MASK_GPIOSEL_8812F 0x3 720 #define BIT_GPIOSEL_8812F(x) \ 721 (((x) & BIT_MASK_GPIOSEL_8812F) << BIT_SHIFT_GPIOSEL_8812F) 722 #define BITS_GPIOSEL_8812F (BIT_MASK_GPIOSEL_8812F << BIT_SHIFT_GPIOSEL_8812F) 723 #define BIT_CLEAR_GPIOSEL_8812F(x) ((x) & (~BITS_GPIOSEL_8812F)) 724 #define BIT_GET_GPIOSEL_8812F(x) \ 725 (((x) >> BIT_SHIFT_GPIOSEL_8812F) & BIT_MASK_GPIOSEL_8812F) 726 #define BIT_SET_GPIOSEL_8812F(x, v) \ 727 (BIT_CLEAR_GPIOSEL_8812F(x) | BIT_GPIOSEL_8812F(v)) 728 729 /* 2 REG_GPIO_PIN_CTRL_8812F */ 730 731 #define BIT_SHIFT_GPIO_MOD_7_TO_0_8812F 24 732 #define BIT_MASK_GPIO_MOD_7_TO_0_8812F 0xff 733 #define BIT_GPIO_MOD_7_TO_0_8812F(x) \ 734 (((x) & BIT_MASK_GPIO_MOD_7_TO_0_8812F) \ 735 << BIT_SHIFT_GPIO_MOD_7_TO_0_8812F) 736 #define BITS_GPIO_MOD_7_TO_0_8812F \ 737 (BIT_MASK_GPIO_MOD_7_TO_0_8812F << BIT_SHIFT_GPIO_MOD_7_TO_0_8812F) 738 #define BIT_CLEAR_GPIO_MOD_7_TO_0_8812F(x) ((x) & (~BITS_GPIO_MOD_7_TO_0_8812F)) 739 #define BIT_GET_GPIO_MOD_7_TO_0_8812F(x) \ 740 (((x) >> BIT_SHIFT_GPIO_MOD_7_TO_0_8812F) & \ 741 BIT_MASK_GPIO_MOD_7_TO_0_8812F) 742 #define BIT_SET_GPIO_MOD_7_TO_0_8812F(x, v) \ 743 (BIT_CLEAR_GPIO_MOD_7_TO_0_8812F(x) | BIT_GPIO_MOD_7_TO_0_8812F(v)) 744 745 #define BIT_SHIFT_GPIO_IO_SEL_7_TO_0_8812F 16 746 #define BIT_MASK_GPIO_IO_SEL_7_TO_0_8812F 0xff 747 #define BIT_GPIO_IO_SEL_7_TO_0_8812F(x) \ 748 (((x) & BIT_MASK_GPIO_IO_SEL_7_TO_0_8812F) \ 749 << BIT_SHIFT_GPIO_IO_SEL_7_TO_0_8812F) 750 #define BITS_GPIO_IO_SEL_7_TO_0_8812F \ 751 (BIT_MASK_GPIO_IO_SEL_7_TO_0_8812F \ 752 << BIT_SHIFT_GPIO_IO_SEL_7_TO_0_8812F) 753 #define BIT_CLEAR_GPIO_IO_SEL_7_TO_0_8812F(x) \ 754 ((x) & (~BITS_GPIO_IO_SEL_7_TO_0_8812F)) 755 #define BIT_GET_GPIO_IO_SEL_7_TO_0_8812F(x) \ 756 (((x) >> BIT_SHIFT_GPIO_IO_SEL_7_TO_0_8812F) & \ 757 BIT_MASK_GPIO_IO_SEL_7_TO_0_8812F) 758 #define BIT_SET_GPIO_IO_SEL_7_TO_0_8812F(x, v) \ 759 (BIT_CLEAR_GPIO_IO_SEL_7_TO_0_8812F(x) | \ 760 BIT_GPIO_IO_SEL_7_TO_0_8812F(v)) 761 762 #define BIT_SHIFT_GPIO_OUT_7_TO_0_8812F 8 763 #define BIT_MASK_GPIO_OUT_7_TO_0_8812F 0xff 764 #define BIT_GPIO_OUT_7_TO_0_8812F(x) \ 765 (((x) & BIT_MASK_GPIO_OUT_7_TO_0_8812F) \ 766 << BIT_SHIFT_GPIO_OUT_7_TO_0_8812F) 767 #define BITS_GPIO_OUT_7_TO_0_8812F \ 768 (BIT_MASK_GPIO_OUT_7_TO_0_8812F << BIT_SHIFT_GPIO_OUT_7_TO_0_8812F) 769 #define BIT_CLEAR_GPIO_OUT_7_TO_0_8812F(x) ((x) & (~BITS_GPIO_OUT_7_TO_0_8812F)) 770 #define BIT_GET_GPIO_OUT_7_TO_0_8812F(x) \ 771 (((x) >> BIT_SHIFT_GPIO_OUT_7_TO_0_8812F) & \ 772 BIT_MASK_GPIO_OUT_7_TO_0_8812F) 773 #define BIT_SET_GPIO_OUT_7_TO_0_8812F(x, v) \ 774 (BIT_CLEAR_GPIO_OUT_7_TO_0_8812F(x) | BIT_GPIO_OUT_7_TO_0_8812F(v)) 775 776 #define BIT_SHIFT_GPIO_IN_7_TO_0_8812F 0 777 #define BIT_MASK_GPIO_IN_7_TO_0_8812F 0xff 778 #define BIT_GPIO_IN_7_TO_0_8812F(x) \ 779 (((x) & BIT_MASK_GPIO_IN_7_TO_0_8812F) \ 780 << BIT_SHIFT_GPIO_IN_7_TO_0_8812F) 781 #define BITS_GPIO_IN_7_TO_0_8812F \ 782 (BIT_MASK_GPIO_IN_7_TO_0_8812F << BIT_SHIFT_GPIO_IN_7_TO_0_8812F) 783 #define BIT_CLEAR_GPIO_IN_7_TO_0_8812F(x) ((x) & (~BITS_GPIO_IN_7_TO_0_8812F)) 784 #define BIT_GET_GPIO_IN_7_TO_0_8812F(x) \ 785 (((x) >> BIT_SHIFT_GPIO_IN_7_TO_0_8812F) & \ 786 BIT_MASK_GPIO_IN_7_TO_0_8812F) 787 #define BIT_SET_GPIO_IN_7_TO_0_8812F(x, v) \ 788 (BIT_CLEAR_GPIO_IN_7_TO_0_8812F(x) | BIT_GPIO_IN_7_TO_0_8812F(v)) 789 790 /* 2 REG_GPIO_INTM_8812F */ 791 792 #define BIT_SHIFT_MUXDBG_SEL_8812F 30 793 #define BIT_MASK_MUXDBG_SEL_8812F 0x3 794 #define BIT_MUXDBG_SEL_8812F(x) \ 795 (((x) & BIT_MASK_MUXDBG_SEL_8812F) << BIT_SHIFT_MUXDBG_SEL_8812F) 796 #define BITS_MUXDBG_SEL_8812F \ 797 (BIT_MASK_MUXDBG_SEL_8812F << BIT_SHIFT_MUXDBG_SEL_8812F) 798 #define BIT_CLEAR_MUXDBG_SEL_8812F(x) ((x) & (~BITS_MUXDBG_SEL_8812F)) 799 #define BIT_GET_MUXDBG_SEL_8812F(x) \ 800 (((x) >> BIT_SHIFT_MUXDBG_SEL_8812F) & BIT_MASK_MUXDBG_SEL_8812F) 801 #define BIT_SET_MUXDBG_SEL_8812F(x, v) \ 802 (BIT_CLEAR_MUXDBG_SEL_8812F(x) | BIT_MUXDBG_SEL_8812F(v)) 803 804 #define BIT_EXTWOL_SEL_8812F BIT(17) 805 #define BIT_EXTWOL_EN_8812F BIT(16) 806 #define BIT_GPIOF_INT_MD_8812F BIT(15) 807 #define BIT_GPIOE_INT_MD_8812F BIT(14) 808 #define BIT_GPIOD_INT_MD_8812F BIT(13) 809 #define BIT_GPIOF_INT_MD_8812F BIT(15) 810 #define BIT_GPIOE_INT_MD_8812F BIT(14) 811 #define BIT_GPIOD_INT_MD_8812F BIT(13) 812 #define BIT_GPIOC_INT_MD_8812F BIT(12) 813 #define BIT_GPIOB_INT_MD_8812F BIT(11) 814 #define BIT_GPIOA_INT_MD_8812F BIT(10) 815 #define BIT_GPIO9_INT_MD_8812F BIT(9) 816 #define BIT_GPIO8_INT_MD_8812F BIT(8) 817 #define BIT_GPIO7_INT_MD_8812F BIT(7) 818 #define BIT_GPIO6_INT_MD_8812F BIT(6) 819 #define BIT_GPIO5_INT_MD_8812F BIT(5) 820 #define BIT_GPIO4_INT_MD_8812F BIT(4) 821 #define BIT_GPIO3_INT_MD_8812F BIT(3) 822 #define BIT_GPIO2_INT_MD_8812F BIT(2) 823 #define BIT_GPIO1_INT_MD_8812F BIT(1) 824 #define BIT_GPIO0_INT_MD_8812F BIT(0) 825 826 /* 2 REG_LED_CFG_8812F */ 827 #define BIT_MAILBOX_1WIRE_GPIO_CFG_8812F BIT(31) 828 #define BIT_BT_RF_GPIO_CFG_8812F BIT(30) 829 #define BIT_BT_SDIO_INT_GPIO_CFG_8812F BIT(29) 830 #define BIT_MAILBOX_3WIRE_GPIO_CFG_8812F BIT(28) 831 #define BIT_WLBT_PAPE_SEL_EN_8812F BIT(27) 832 #define BIT_LNAON_SEL_EN_8812F BIT(26) 833 #define BIT_PAPE_SEL_EN_8812F BIT(25) 834 #define BIT_DPDT_WLBT_SEL_8812F BIT(24) 835 #define BIT_DPDT_SEL_EN_8812F BIT(23) 836 #define BIT_GPIO13_14_WL_CTRL_EN_8812F BIT(22) 837 #define BIT_LED2DIS_8812F BIT(21) 838 #define BIT_LED2PL_8812F BIT(20) 839 #define BIT_LED2SV_8812F BIT(19) 840 841 #define BIT_SHIFT_LED2CM_8812F 16 842 #define BIT_MASK_LED2CM_8812F 0x7 843 #define BIT_LED2CM_8812F(x) \ 844 (((x) & BIT_MASK_LED2CM_8812F) << BIT_SHIFT_LED2CM_8812F) 845 #define BITS_LED2CM_8812F (BIT_MASK_LED2CM_8812F << BIT_SHIFT_LED2CM_8812F) 846 #define BIT_CLEAR_LED2CM_8812F(x) ((x) & (~BITS_LED2CM_8812F)) 847 #define BIT_GET_LED2CM_8812F(x) \ 848 (((x) >> BIT_SHIFT_LED2CM_8812F) & BIT_MASK_LED2CM_8812F) 849 #define BIT_SET_LED2CM_8812F(x, v) \ 850 (BIT_CLEAR_LED2CM_8812F(x) | BIT_LED2CM_8812F(v)) 851 852 #define BIT_LED1DIS_8812F BIT(15) 853 #define BIT_LED1PL_8812F BIT(12) 854 #define BIT_LED1SV_8812F BIT(11) 855 856 #define BIT_SHIFT_LED1CM_8812F 8 857 #define BIT_MASK_LED1CM_8812F 0x7 858 #define BIT_LED1CM_8812F(x) \ 859 (((x) & BIT_MASK_LED1CM_8812F) << BIT_SHIFT_LED1CM_8812F) 860 #define BITS_LED1CM_8812F (BIT_MASK_LED1CM_8812F << BIT_SHIFT_LED1CM_8812F) 861 #define BIT_CLEAR_LED1CM_8812F(x) ((x) & (~BITS_LED1CM_8812F)) 862 #define BIT_GET_LED1CM_8812F(x) \ 863 (((x) >> BIT_SHIFT_LED1CM_8812F) & BIT_MASK_LED1CM_8812F) 864 #define BIT_SET_LED1CM_8812F(x, v) \ 865 (BIT_CLEAR_LED1CM_8812F(x) | BIT_LED1CM_8812F(v)) 866 867 #define BIT_LED0DIS_8812F BIT(7) 868 869 #define BIT_SHIFT_AFE_LDO_SWR_CHECK_8812F 5 870 #define BIT_MASK_AFE_LDO_SWR_CHECK_8812F 0x3 871 #define BIT_AFE_LDO_SWR_CHECK_8812F(x) \ 872 (((x) & BIT_MASK_AFE_LDO_SWR_CHECK_8812F) \ 873 << BIT_SHIFT_AFE_LDO_SWR_CHECK_8812F) 874 #define BITS_AFE_LDO_SWR_CHECK_8812F \ 875 (BIT_MASK_AFE_LDO_SWR_CHECK_8812F << BIT_SHIFT_AFE_LDO_SWR_CHECK_8812F) 876 #define BIT_CLEAR_AFE_LDO_SWR_CHECK_8812F(x) \ 877 ((x) & (~BITS_AFE_LDO_SWR_CHECK_8812F)) 878 #define BIT_GET_AFE_LDO_SWR_CHECK_8812F(x) \ 879 (((x) >> BIT_SHIFT_AFE_LDO_SWR_CHECK_8812F) & \ 880 BIT_MASK_AFE_LDO_SWR_CHECK_8812F) 881 #define BIT_SET_AFE_LDO_SWR_CHECK_8812F(x, v) \ 882 (BIT_CLEAR_AFE_LDO_SWR_CHECK_8812F(x) | BIT_AFE_LDO_SWR_CHECK_8812F(v)) 883 884 #define BIT_LED0PL_8812F BIT(4) 885 #define BIT_LED0SV_8812F BIT(3) 886 887 #define BIT_SHIFT_LED0CM_8812F 0 888 #define BIT_MASK_LED0CM_8812F 0x7 889 #define BIT_LED0CM_8812F(x) \ 890 (((x) & BIT_MASK_LED0CM_8812F) << BIT_SHIFT_LED0CM_8812F) 891 #define BITS_LED0CM_8812F (BIT_MASK_LED0CM_8812F << BIT_SHIFT_LED0CM_8812F) 892 #define BIT_CLEAR_LED0CM_8812F(x) ((x) & (~BITS_LED0CM_8812F)) 893 #define BIT_GET_LED0CM_8812F(x) \ 894 (((x) >> BIT_SHIFT_LED0CM_8812F) & BIT_MASK_LED0CM_8812F) 895 #define BIT_SET_LED0CM_8812F(x, v) \ 896 (BIT_CLEAR_LED0CM_8812F(x) | BIT_LED0CM_8812F(v)) 897 898 /* 2 REG_FSIMR_8812F */ 899 #define BIT_FS_PDNINT_EN_8812F BIT(31) 900 #define BIT_FS_SPS_OCP_INT_EN_8812F BIT(29) 901 #define BIT_FS_PWMERR_INT_EN_8812F BIT(28) 902 #define BIT_FS_GPIOF_INT_EN_8812F BIT(27) 903 #define BIT_FS_GPIOE_INT_EN_8812F BIT(26) 904 #define BIT_FS_GPIOD_INT_EN_8812F BIT(25) 905 #define BIT_FS_GPIOC_INT_EN_8812F BIT(24) 906 #define BIT_FS_GPIOB_INT_EN_8812F BIT(23) 907 #define BIT_FS_GPIOA_INT_EN_8812F BIT(22) 908 #define BIT_FS_GPIO9_INT_EN_8812F BIT(21) 909 #define BIT_FS_GPIO8_INT_EN_8812F BIT(20) 910 #define BIT_FS_GPIO7_INT_EN_8812F BIT(19) 911 #define BIT_FS_GPIO6_INT_EN_8812F BIT(18) 912 #define BIT_FS_GPIO5_INT_EN_8812F BIT(17) 913 #define BIT_FS_GPIO4_INT_EN_8812F BIT(16) 914 #define BIT_FS_GPIO3_INT_EN_8812F BIT(15) 915 #define BIT_FS_GPIO2_INT_EN_8812F BIT(14) 916 #define BIT_FS_GPIO1_INT_EN_8812F BIT(13) 917 #define BIT_FS_GPIO0_INT_EN_8812F BIT(12) 918 #define BIT_FS_HCI_SUS_EN_8812F BIT(11) 919 #define BIT_FS_HCI_RES_EN_8812F BIT(10) 920 #define BIT_FS_HCI_RESET_EN_8812F BIT(9) 921 #define BIT_USB_SCSI_CMD_EN_8812F BIT(8) 922 #define BIT_FS_BTON_STS_UPDATE_MSK_EN_8812F BIT(7) 923 #define BIT_ACT2RECOVERY_INT_EN_V1_8812F BIT(6) 924 #define BIT_GEN1GEN2_SWITCH_8812F BIT(5) 925 #define BIT_HCI_TXDMA_REQ_HIMR_8812F BIT(4) 926 #define BIT_FS_32K_LEAVE_SETTING_MAK_8812F BIT(3) 927 #define BIT_FS_32K_ENTER_SETTING_MAK_8812F BIT(2) 928 #define BIT_FS_USB_LPMRSM_MSK_8812F BIT(1) 929 #define BIT_FS_USB_LPMINT_MSK_8812F BIT(0) 930 931 /* 2 REG_FSISR_8812F */ 932 #define BIT_FS_PDNINT_8812F BIT(31) 933 #define BIT_FS_SPS_OCP_INT_8812F BIT(29) 934 #define BIT_FS_PWMERR_INT_8812F BIT(28) 935 #define BIT_FS_GPIOF_INT_8812F BIT(27) 936 #define BIT_FS_GPIOE_INT_8812F BIT(26) 937 #define BIT_FS_GPIOD_INT_8812F BIT(25) 938 #define BIT_FS_GPIOC_INT_8812F BIT(24) 939 #define BIT_FS_GPIOB_INT_8812F BIT(23) 940 #define BIT_FS_GPIOA_INT_8812F BIT(22) 941 #define BIT_FS_GPIO9_INT_8812F BIT(21) 942 #define BIT_FS_GPIO8_INT_8812F BIT(20) 943 #define BIT_FS_GPIO7_INT_8812F BIT(19) 944 #define BIT_FS_GPIO6_INT_8812F BIT(18) 945 #define BIT_FS_GPIO5_INT_8812F BIT(17) 946 #define BIT_FS_GPIO4_INT_8812F BIT(16) 947 #define BIT_FS_GPIO3_INT_8812F BIT(15) 948 #define BIT_FS_GPIO2_INT_8812F BIT(14) 949 #define BIT_FS_GPIO1_INT_8812F BIT(13) 950 #define BIT_FS_GPIO0_INT_8812F BIT(12) 951 #define BIT_FS_HCI_SUS_INT_8812F BIT(11) 952 #define BIT_FS_HCI_RES_INT_8812F BIT(10) 953 #define BIT_FS_HCI_RESET_INT_8812F BIT(9) 954 #define BIT_USB_SCSI_CMD_INT_8812F BIT(8) 955 #define BIT_ACT2RECOVERY_8812F BIT(6) 956 #define BIT_GEN1GEN2_SWITCH_8812F BIT(5) 957 #define BIT_HCI_TXDMA_REQ_HISR_8812F BIT(4) 958 #define BIT_FS_32K_LEAVE_SETTING_INT_8812F BIT(3) 959 #define BIT_FS_32K_ENTER_SETTING_INT_8812F BIT(2) 960 #define BIT_FS_USB_LPMRSM_INT_8812F BIT(1) 961 #define BIT_FS_USB_LPMINT_INT_8812F BIT(0) 962 963 /* 2 REG_HSIMR_8812F */ 964 #define BIT_GPIOF_INT_EN_8812F BIT(31) 965 #define BIT_GPIOE_INT_EN_8812F BIT(30) 966 #define BIT_GPIOD_INT_EN_8812F BIT(29) 967 #define BIT_GPIOC_INT_EN_8812F BIT(28) 968 #define BIT_GPIOB_INT_EN_8812F BIT(27) 969 #define BIT_GPIOA_INT_EN_8812F BIT(26) 970 #define BIT_GPIO9_INT_EN_8812F BIT(25) 971 #define BIT_GPIO8_INT_EN_8812F BIT(24) 972 #define BIT_GPIO7_INT_EN_8812F BIT(23) 973 #define BIT_GPIO6_INT_EN_8812F BIT(22) 974 #define BIT_GPIO5_INT_EN_8812F BIT(21) 975 #define BIT_GPIO4_INT_EN_8812F BIT(20) 976 #define BIT_GPIO3_INT_EN_8812F BIT(19) 977 #define BIT_GPIO2_INT_EN_V1_8812F BIT(18) 978 #define BIT_GPIO1_INT_EN_8812F BIT(17) 979 #define BIT_GPIO0_INT_EN_8812F BIT(16) 980 #define BIT_PDNINT_EN_8812F BIT(7) 981 #define BIT_RON_INT_EN_8812F BIT(6) 982 #define BIT_SPS_OCP_INT_EN_8812F BIT(5) 983 #define BIT_GPIO15_0_INT_EN_8812F BIT(0) 984 985 /* 2 REG_HSISR_8812F */ 986 #define BIT_GPIOF_INT_8812F BIT(31) 987 #define BIT_GPIOE_INT_8812F BIT(30) 988 #define BIT_GPIOD_INT_8812F BIT(29) 989 #define BIT_GPIOC_INT_8812F BIT(28) 990 #define BIT_GPIOB_INT_8812F BIT(27) 991 #define BIT_GPIOA_INT_8812F BIT(26) 992 #define BIT_GPIO9_INT_8812F BIT(25) 993 #define BIT_GPIO8_INT_8812F BIT(24) 994 #define BIT_GPIO7_INT_8812F BIT(23) 995 #define BIT_GPIO6_INT_8812F BIT(22) 996 #define BIT_GPIO5_INT_8812F BIT(21) 997 #define BIT_GPIO4_INT_8812F BIT(20) 998 #define BIT_GPIO3_INT_8812F BIT(19) 999 #define BIT_GPIO2_INT_V1_8812F BIT(18) 1000 #define BIT_GPIO1_INT_8812F BIT(17) 1001 #define BIT_GPIO0_INT_8812F BIT(16) 1002 #define BIT_PDNINT_8812F BIT(7) 1003 #define BIT_RON_INT_8812F BIT(6) 1004 #define BIT_SPS_OCP_INT_8812F BIT(5) 1005 #define BIT_GPIO15_0_INT_8812F BIT(0) 1006 1007 /* 2 REG_GPIO_EXT_CTRL_8812F */ 1008 1009 #define BIT_SHIFT_GPIO_MOD_15_TO_8_8812F 24 1010 #define BIT_MASK_GPIO_MOD_15_TO_8_8812F 0xff 1011 #define BIT_GPIO_MOD_15_TO_8_8812F(x) \ 1012 (((x) & BIT_MASK_GPIO_MOD_15_TO_8_8812F) \ 1013 << BIT_SHIFT_GPIO_MOD_15_TO_8_8812F) 1014 #define BITS_GPIO_MOD_15_TO_8_8812F \ 1015 (BIT_MASK_GPIO_MOD_15_TO_8_8812F << BIT_SHIFT_GPIO_MOD_15_TO_8_8812F) 1016 #define BIT_CLEAR_GPIO_MOD_15_TO_8_8812F(x) \ 1017 ((x) & (~BITS_GPIO_MOD_15_TO_8_8812F)) 1018 #define BIT_GET_GPIO_MOD_15_TO_8_8812F(x) \ 1019 (((x) >> BIT_SHIFT_GPIO_MOD_15_TO_8_8812F) & \ 1020 BIT_MASK_GPIO_MOD_15_TO_8_8812F) 1021 #define BIT_SET_GPIO_MOD_15_TO_8_8812F(x, v) \ 1022 (BIT_CLEAR_GPIO_MOD_15_TO_8_8812F(x) | BIT_GPIO_MOD_15_TO_8_8812F(v)) 1023 1024 #define BIT_SHIFT_GPIO_IO_SEL_15_TO_8_8812F 16 1025 #define BIT_MASK_GPIO_IO_SEL_15_TO_8_8812F 0xff 1026 #define BIT_GPIO_IO_SEL_15_TO_8_8812F(x) \ 1027 (((x) & BIT_MASK_GPIO_IO_SEL_15_TO_8_8812F) \ 1028 << BIT_SHIFT_GPIO_IO_SEL_15_TO_8_8812F) 1029 #define BITS_GPIO_IO_SEL_15_TO_8_8812F \ 1030 (BIT_MASK_GPIO_IO_SEL_15_TO_8_8812F \ 1031 << BIT_SHIFT_GPIO_IO_SEL_15_TO_8_8812F) 1032 #define BIT_CLEAR_GPIO_IO_SEL_15_TO_8_8812F(x) \ 1033 ((x) & (~BITS_GPIO_IO_SEL_15_TO_8_8812F)) 1034 #define BIT_GET_GPIO_IO_SEL_15_TO_8_8812F(x) \ 1035 (((x) >> BIT_SHIFT_GPIO_IO_SEL_15_TO_8_8812F) & \ 1036 BIT_MASK_GPIO_IO_SEL_15_TO_8_8812F) 1037 #define BIT_SET_GPIO_IO_SEL_15_TO_8_8812F(x, v) \ 1038 (BIT_CLEAR_GPIO_IO_SEL_15_TO_8_8812F(x) | \ 1039 BIT_GPIO_IO_SEL_15_TO_8_8812F(v)) 1040 1041 #define BIT_SHIFT_GPIO_OUT_15_TO_8_8812F 8 1042 #define BIT_MASK_GPIO_OUT_15_TO_8_8812F 0xff 1043 #define BIT_GPIO_OUT_15_TO_8_8812F(x) \ 1044 (((x) & BIT_MASK_GPIO_OUT_15_TO_8_8812F) \ 1045 << BIT_SHIFT_GPIO_OUT_15_TO_8_8812F) 1046 #define BITS_GPIO_OUT_15_TO_8_8812F \ 1047 (BIT_MASK_GPIO_OUT_15_TO_8_8812F << BIT_SHIFT_GPIO_OUT_15_TO_8_8812F) 1048 #define BIT_CLEAR_GPIO_OUT_15_TO_8_8812F(x) \ 1049 ((x) & (~BITS_GPIO_OUT_15_TO_8_8812F)) 1050 #define BIT_GET_GPIO_OUT_15_TO_8_8812F(x) \ 1051 (((x) >> BIT_SHIFT_GPIO_OUT_15_TO_8_8812F) & \ 1052 BIT_MASK_GPIO_OUT_15_TO_8_8812F) 1053 #define BIT_SET_GPIO_OUT_15_TO_8_8812F(x, v) \ 1054 (BIT_CLEAR_GPIO_OUT_15_TO_8_8812F(x) | BIT_GPIO_OUT_15_TO_8_8812F(v)) 1055 1056 #define BIT_SHIFT_GPIO_IN_15_TO_8_8812F 0 1057 #define BIT_MASK_GPIO_IN_15_TO_8_8812F 0xff 1058 #define BIT_GPIO_IN_15_TO_8_8812F(x) \ 1059 (((x) & BIT_MASK_GPIO_IN_15_TO_8_8812F) \ 1060 << BIT_SHIFT_GPIO_IN_15_TO_8_8812F) 1061 #define BITS_GPIO_IN_15_TO_8_8812F \ 1062 (BIT_MASK_GPIO_IN_15_TO_8_8812F << BIT_SHIFT_GPIO_IN_15_TO_8_8812F) 1063 #define BIT_CLEAR_GPIO_IN_15_TO_8_8812F(x) ((x) & (~BITS_GPIO_IN_15_TO_8_8812F)) 1064 #define BIT_GET_GPIO_IN_15_TO_8_8812F(x) \ 1065 (((x) >> BIT_SHIFT_GPIO_IN_15_TO_8_8812F) & \ 1066 BIT_MASK_GPIO_IN_15_TO_8_8812F) 1067 #define BIT_SET_GPIO_IN_15_TO_8_8812F(x, v) \ 1068 (BIT_CLEAR_GPIO_IN_15_TO_8_8812F(x) | BIT_GPIO_IN_15_TO_8_8812F(v)) 1069 1070 /* 2 REG_PAD_CTRL1_8812F */ 1071 #define BIT_PAPE_WLBT_SEL_8812F BIT(29) 1072 #define BIT_LNAON_WLBT_SEL_8812F BIT(28) 1073 #define BIT_BT_BQB_GPIO_SEL_8812F BIT(27) 1074 #define BIT_BTGP_GPG3_FEN_8812F BIT(26) 1075 #define BIT_BTGP_GPG2_FEN_8812F BIT(25) 1076 #define BIT_BTGP_JTAG_EN_8812F BIT(24) 1077 #define BIT_XTAL_CLK_EXTARNAL_EN_8812F BIT(23) 1078 #define BIT_BTGP_UART0_EN_8812F BIT(22) 1079 #define BIT_BTGP_UART1_EN_8812F BIT(21) 1080 #define BIT_BTGP_SPI_EN_8812F BIT(20) 1081 #define BIT_BTGP_GPIO_E2_8812F BIT(19) 1082 #define BIT_BTGP_GPIO_EN_8812F BIT(18) 1083 1084 #define BIT_SHIFT_BTGP_GPIO_SL_8812F 16 1085 #define BIT_MASK_BTGP_GPIO_SL_8812F 0x3 1086 #define BIT_BTGP_GPIO_SL_8812F(x) \ 1087 (((x) & BIT_MASK_BTGP_GPIO_SL_8812F) << BIT_SHIFT_BTGP_GPIO_SL_8812F) 1088 #define BITS_BTGP_GPIO_SL_8812F \ 1089 (BIT_MASK_BTGP_GPIO_SL_8812F << BIT_SHIFT_BTGP_GPIO_SL_8812F) 1090 #define BIT_CLEAR_BTGP_GPIO_SL_8812F(x) ((x) & (~BITS_BTGP_GPIO_SL_8812F)) 1091 #define BIT_GET_BTGP_GPIO_SL_8812F(x) \ 1092 (((x) >> BIT_SHIFT_BTGP_GPIO_SL_8812F) & BIT_MASK_BTGP_GPIO_SL_8812F) 1093 #define BIT_SET_BTGP_GPIO_SL_8812F(x, v) \ 1094 (BIT_CLEAR_BTGP_GPIO_SL_8812F(x) | BIT_BTGP_GPIO_SL_8812F(v)) 1095 1096 #define BIT_PAD_SDIO_SR_8812F BIT(14) 1097 #define BIT_GPIO14_OUTPUT_PL_8812F BIT(13) 1098 #define BIT_HOST_WAKE_PAD_PULL_EN_8812F BIT(12) 1099 #define BIT_HOST_WAKE_PAD_SL_8812F BIT(11) 1100 #define BIT_PAD_LNAON_SR_8812F BIT(10) 1101 #define BIT_PAD_LNAON_E2_8812F BIT(9) 1102 #define BIT_SW_LNAON_G_SEL_DATA_8812F BIT(8) 1103 #define BIT_SW_LNAON_A_SEL_DATA_8812F BIT(7) 1104 #define BIT_PAD_PAPE_SR_8812F BIT(6) 1105 #define BIT_PAD_PAPE_E2_8812F BIT(5) 1106 #define BIT_SW_PAPE_G_SEL_DATA_8812F BIT(4) 1107 #define BIT_SW_PAPE_A_SEL_DATA_8812F BIT(3) 1108 #define BIT_PAD_DPDT_SR_8812F BIT(2) 1109 #define BIT_PAD_DPDT_PAD_E2_8812F BIT(1) 1110 #define BIT_SW_DPDT_SEL_DATA_8812F BIT(0) 1111 1112 /* 2 REG_WL_BT_PWR_CTRL_8812F */ 1113 #define BIT_ISO_BD2PP_8812F BIT(31) 1114 #define BIT_LDOV12B_EN_8812F BIT(30) 1115 #define BIT_CKEN_BTGPS_8812F BIT(29) 1116 #define BIT_FEN_BTGPS_8812F BIT(28) 1117 #define BIT_BTCPU_BOOTSEL_8812F BIT(27) 1118 #define BIT_SPI_SPEEDUP_8812F BIT(26) 1119 #define BIT_BT_LDO_MODE_8812F BIT(25) 1120 #define BIT_DEVWAKE_PAD_TYPE_SEL_8812F BIT(24) 1121 #define BIT_CLKREQ_PAD_TYPE_SEL_8812F BIT(23) 1122 #define BIT_ISO_BTPON2PP_8812F BIT(22) 1123 #define BIT_BT_HWROF_EN_8812F BIT(19) 1124 #define BIT_BT_FUNC_EN_8812F BIT(18) 1125 #define BIT_BT_HWPDN_SL_8812F BIT(17) 1126 #define BIT_BT_DISN_EN_8812F BIT(16) 1127 #define BIT_BT_PDN_PULL_EN_8812F BIT(15) 1128 #define BIT_WL_PDN_PULL_EN_8812F BIT(14) 1129 #define BIT_EXTERNAL_REQUEST_PL_8812F BIT(13) 1130 #define BIT_GPIO0_2_3_PULL_LOW_EN_8812F BIT(12) 1131 #define BIT_ISO_BA2PP_8812F BIT(11) 1132 #define BIT_BT_AFE_LDO_EN_8812F BIT(10) 1133 #define BIT_BT_AFE_PLL_EN_8812F BIT(9) 1134 #define BIT_BT_DIG_CLK_EN_8812F BIT(8) 1135 #define BIT_WLAN_32K_SEL_8812F BIT(6) 1136 #define BIT_WL_DRV_EXIST_IDX_8812F BIT(5) 1137 #define BIT_DOP_EHPAD_8812F BIT(4) 1138 #define BIT_WL_HWROF_EN_8812F BIT(3) 1139 #define BIT_WL_FUNC_EN_8812F BIT(2) 1140 #define BIT_WL_HWPDN_SL_8812F BIT(1) 1141 #define BIT_WL_HWPDN_EN_8812F BIT(0) 1142 1143 /* 2 REG_SDM_DEBUG_8812F */ 1144 #define BIT_GPIO_IE_V18_8812F BIT(10) 1145 #define BIT_PCIE_IE_V18_8812F BIT(9) 1146 #define BIT_UART_IE_V18_8812F BIT(8) 1147 1148 /* 2 REG_NOT_VALID_8812F */ 1149 1150 #define BIT_SHIFT_WLCLK_PHASE_8812F 0 1151 #define BIT_MASK_WLCLK_PHASE_8812F 0x1f 1152 #define BIT_WLCLK_PHASE_8812F(x) \ 1153 (((x) & BIT_MASK_WLCLK_PHASE_8812F) << BIT_SHIFT_WLCLK_PHASE_8812F) 1154 #define BITS_WLCLK_PHASE_8812F \ 1155 (BIT_MASK_WLCLK_PHASE_8812F << BIT_SHIFT_WLCLK_PHASE_8812F) 1156 #define BIT_CLEAR_WLCLK_PHASE_8812F(x) ((x) & (~BITS_WLCLK_PHASE_8812F)) 1157 #define BIT_GET_WLCLK_PHASE_8812F(x) \ 1158 (((x) >> BIT_SHIFT_WLCLK_PHASE_8812F) & BIT_MASK_WLCLK_PHASE_8812F) 1159 #define BIT_SET_WLCLK_PHASE_8812F(x, v) \ 1160 (BIT_CLEAR_WLCLK_PHASE_8812F(x) | BIT_WLCLK_PHASE_8812F(v)) 1161 1162 /* 2 REG_SYS_SDIO_CTRL_8812F */ 1163 #define BIT_DBG_GNT_WL_BT_8812F BIT(27) 1164 #define BIT_LTE_MUX_CTRL_PATH_8812F BIT(26) 1165 #define BIT_LTE_COEX_UART_8812F BIT(25) 1166 #define BIT_3W_LTE_WL_GPIO_8812F BIT(24) 1167 #define BIT_SDIO_INT_POLARITY_8812F BIT(19) 1168 #define BIT_SDIO_INT_8812F BIT(18) 1169 #define BIT_SDIO_OFF_EN_8812F BIT(17) 1170 #define BIT_SDIO_ON_EN_8812F BIT(16) 1171 #define BIT_PCIE_FORCE_PWR_NGAT_8812F BIT(13) 1172 #define BIT_PCIE_CALIB_EN_V1_8812F BIT(12) 1173 #define BIT_PAGE3_AUXCLK_GATE_8812F BIT(11) 1174 #define BIT_PCIE_WAIT_TIMEOUT_EVENT_8812F BIT(10) 1175 #define BIT_PCIE_WAIT_TIME_8812F BIT(9) 1176 #define BIT_MPCIE_REFCLK_XTAL_SEL_8812F BIT(8) 1177 #define BIT_BT_CTRL_USB_PWR_BACKDOOR_8812F BIT(5) 1178 #define BIT_USB_D_STATE_HOLD_8812F BIT(4) 1179 #define BIT_REG_FORCE_DP_8812F BIT(3) 1180 #define BIT_REG_DP_MODE_8812F BIT(2) 1181 #define BIT_RES_USB_MASS_STORAGE_DESC_8812F BIT(1) 1182 #define BIT_USB_WAIT_TIME_8812F BIT(0) 1183 1184 /* 2 REG_HCI_OPT_CTRL_8812F */ 1185 1186 #define BIT_SHIFT_TSFT_SEL_8812F 29 1187 #define BIT_MASK_TSFT_SEL_8812F 0x7 1188 #define BIT_TSFT_SEL_8812F(x) \ 1189 (((x) & BIT_MASK_TSFT_SEL_8812F) << BIT_SHIFT_TSFT_SEL_8812F) 1190 #define BITS_TSFT_SEL_8812F \ 1191 (BIT_MASK_TSFT_SEL_8812F << BIT_SHIFT_TSFT_SEL_8812F) 1192 #define BIT_CLEAR_TSFT_SEL_8812F(x) ((x) & (~BITS_TSFT_SEL_8812F)) 1193 #define BIT_GET_TSFT_SEL_8812F(x) \ 1194 (((x) >> BIT_SHIFT_TSFT_SEL_8812F) & BIT_MASK_TSFT_SEL_8812F) 1195 #define BIT_SET_TSFT_SEL_8812F(x, v) \ 1196 (BIT_CLEAR_TSFT_SEL_8812F(x) | BIT_TSFT_SEL_8812F(v)) 1197 1198 #define BIT_SDIO_PAD_E5_8812F BIT(18) 1199 #define BIT_USB_HOST_PWR_OFF_EN_8812F BIT(12) 1200 #define BIT_SYM_LPS_BLOCK_EN_8812F BIT(11) 1201 #define BIT_USB_LPM_ACT_EN_8812F BIT(10) 1202 #define BIT_USB_LPM_NY_8812F BIT(9) 1203 #define BIT_USB_SUS_DIS_8812F BIT(8) 1204 1205 #define BIT_SHIFT_SDIO_PAD_E_8812F 5 1206 #define BIT_MASK_SDIO_PAD_E_8812F 0x7 1207 #define BIT_SDIO_PAD_E_8812F(x) \ 1208 (((x) & BIT_MASK_SDIO_PAD_E_8812F) << BIT_SHIFT_SDIO_PAD_E_8812F) 1209 #define BITS_SDIO_PAD_E_8812F \ 1210 (BIT_MASK_SDIO_PAD_E_8812F << BIT_SHIFT_SDIO_PAD_E_8812F) 1211 #define BIT_CLEAR_SDIO_PAD_E_8812F(x) ((x) & (~BITS_SDIO_PAD_E_8812F)) 1212 #define BIT_GET_SDIO_PAD_E_8812F(x) \ 1213 (((x) >> BIT_SHIFT_SDIO_PAD_E_8812F) & BIT_MASK_SDIO_PAD_E_8812F) 1214 #define BIT_SET_SDIO_PAD_E_8812F(x, v) \ 1215 (BIT_CLEAR_SDIO_PAD_E_8812F(x) | BIT_SDIO_PAD_E_8812F(v)) 1216 1217 #define BIT_USB_LPPLL_EN_8812F BIT(4) 1218 #define BIT_USB1_1_USB2_0_DECISION_8812F BIT(3) 1219 #define BIT_ROP_SW15_8812F BIT(2) 1220 #define BIT_PCI_CKRDY_OPT_8812F BIT(1) 1221 #define BIT_PCI_VAUX_EN_8812F BIT(0) 1222 1223 /* 2 REG_HCI_BG_CTRL_8812F */ 1224 1225 /* 2 REG_NOT_VALID_8812F */ 1226 #define BIT_IBX_EN_VALUE_8812F BIT(9) 1227 #define BIT_IB_EN_VALUE_8812F BIT(8) 1228 1229 /* 2 REG_NOT_VALID_8812F */ 1230 #define BIT_FORCED_IB_EN_8812F BIT(4) 1231 #define BIT_EN_REGBG_8812F BIT(3) 1232 #define BIT_REG_BG_LPF_8812F BIT(2) 1233 1234 #define BIT_SHIFT_REG_BG_8812F 0 1235 #define BIT_MASK_REG_BG_8812F 0x3 1236 #define BIT_REG_BG_8812F(x) \ 1237 (((x) & BIT_MASK_REG_BG_8812F) << BIT_SHIFT_REG_BG_8812F) 1238 #define BITS_REG_BG_8812F (BIT_MASK_REG_BG_8812F << BIT_SHIFT_REG_BG_8812F) 1239 #define BIT_CLEAR_REG_BG_8812F(x) ((x) & (~BITS_REG_BG_8812F)) 1240 #define BIT_GET_REG_BG_8812F(x) \ 1241 (((x) >> BIT_SHIFT_REG_BG_8812F) & BIT_MASK_REG_BG_8812F) 1242 #define BIT_SET_REG_BG_8812F(x, v) \ 1243 (BIT_CLEAR_REG_BG_8812F(x) | BIT_REG_BG_8812F(v)) 1244 1245 /* 2 REG_HCI_LDO_CTRL_8812F */ 1246 1247 /* 2 REG_NOT_VALID_8812F */ 1248 1249 /* 2 REG_NOT_VALID_8812F */ 1250 #define BIT_EN_LW_PWR_8812F BIT(6) 1251 #define BIT_EN_REGU_8812F BIT(5) 1252 #define BIT_EN_PC_8812F BIT(4) 1253 1254 #define BIT_SHIFT_REG_VADJ_8812F 0 1255 #define BIT_MASK_REG_VADJ_8812F 0xf 1256 #define BIT_REG_VADJ_8812F(x) \ 1257 (((x) & BIT_MASK_REG_VADJ_8812F) << BIT_SHIFT_REG_VADJ_8812F) 1258 #define BITS_REG_VADJ_8812F \ 1259 (BIT_MASK_REG_VADJ_8812F << BIT_SHIFT_REG_VADJ_8812F) 1260 #define BIT_CLEAR_REG_VADJ_8812F(x) ((x) & (~BITS_REG_VADJ_8812F)) 1261 #define BIT_GET_REG_VADJ_8812F(x) \ 1262 (((x) >> BIT_SHIFT_REG_VADJ_8812F) & BIT_MASK_REG_VADJ_8812F) 1263 #define BIT_SET_REG_VADJ_8812F(x, v) \ 1264 (BIT_CLEAR_REG_VADJ_8812F(x) | BIT_REG_VADJ_8812F(v)) 1265 1266 /* 2 REG_LDO_SWR_CTRL_8812F */ 1267 #define BIT_EXT_SWR_CTRL_EN_8812F BIT(31) 1268 #define BIT_ZCD_HW_AUTO_EN_8812F BIT(27) 1269 #define BIT_ZCD_REGSEL_8812F BIT(26) 1270 1271 #define BIT_SHIFT_AUTO_ZCD_IN_CODE_8812F 21 1272 #define BIT_MASK_AUTO_ZCD_IN_CODE_8812F 0x1f 1273 #define BIT_AUTO_ZCD_IN_CODE_8812F(x) \ 1274 (((x) & BIT_MASK_AUTO_ZCD_IN_CODE_8812F) \ 1275 << BIT_SHIFT_AUTO_ZCD_IN_CODE_8812F) 1276 #define BITS_AUTO_ZCD_IN_CODE_8812F \ 1277 (BIT_MASK_AUTO_ZCD_IN_CODE_8812F << BIT_SHIFT_AUTO_ZCD_IN_CODE_8812F) 1278 #define BIT_CLEAR_AUTO_ZCD_IN_CODE_8812F(x) \ 1279 ((x) & (~BITS_AUTO_ZCD_IN_CODE_8812F)) 1280 #define BIT_GET_AUTO_ZCD_IN_CODE_8812F(x) \ 1281 (((x) >> BIT_SHIFT_AUTO_ZCD_IN_CODE_8812F) & \ 1282 BIT_MASK_AUTO_ZCD_IN_CODE_8812F) 1283 #define BIT_SET_AUTO_ZCD_IN_CODE_8812F(x, v) \ 1284 (BIT_CLEAR_AUTO_ZCD_IN_CODE_8812F(x) | BIT_AUTO_ZCD_IN_CODE_8812F(v)) 1285 1286 #define BIT_SHIFT_ZCD_CODE_IN_L_8812F 16 1287 #define BIT_MASK_ZCD_CODE_IN_L_8812F 0x1f 1288 #define BIT_ZCD_CODE_IN_L_8812F(x) \ 1289 (((x) & BIT_MASK_ZCD_CODE_IN_L_8812F) << BIT_SHIFT_ZCD_CODE_IN_L_8812F) 1290 #define BITS_ZCD_CODE_IN_L_8812F \ 1291 (BIT_MASK_ZCD_CODE_IN_L_8812F << BIT_SHIFT_ZCD_CODE_IN_L_8812F) 1292 #define BIT_CLEAR_ZCD_CODE_IN_L_8812F(x) ((x) & (~BITS_ZCD_CODE_IN_L_8812F)) 1293 #define BIT_GET_ZCD_CODE_IN_L_8812F(x) \ 1294 (((x) >> BIT_SHIFT_ZCD_CODE_IN_L_8812F) & BIT_MASK_ZCD_CODE_IN_L_8812F) 1295 #define BIT_SET_ZCD_CODE_IN_L_8812F(x, v) \ 1296 (BIT_CLEAR_ZCD_CODE_IN_L_8812F(x) | BIT_ZCD_CODE_IN_L_8812F(v)) 1297 1298 /* 2 REG_NOT_VALID_8812F */ 1299 1300 /* 2 REG_NOT_VALID_8812F */ 1301 1302 /* 2 REG_NOT_VALID_8812F */ 1303 1304 /* 2 REG_NOT_VALID_8812F */ 1305 1306 /* 2 REG_NOT_VALID_8812F */ 1307 1308 /* 2 REG_NOT_VALID_8812F */ 1309 1310 /* 2 REG_NOT_VALID_8812F */ 1311 1312 /* 2 REG_NOT_VALID_8812F */ 1313 1314 /* 2 REG_NOT_VALID_8812F */ 1315 1316 /* 2 REG_NOT_VALID_8812F */ 1317 1318 /* 2 REG_NOT_VALID_8812F */ 1319 1320 /* 2 REG_MCUFW_CTRL_8812F */ 1321 1322 #define BIT_SHIFT_RPWM_8812F 24 1323 #define BIT_MASK_RPWM_8812F 0xff 1324 #define BIT_RPWM_8812F(x) (((x) & BIT_MASK_RPWM_8812F) << BIT_SHIFT_RPWM_8812F) 1325 #define BITS_RPWM_8812F (BIT_MASK_RPWM_8812F << BIT_SHIFT_RPWM_8812F) 1326 #define BIT_CLEAR_RPWM_8812F(x) ((x) & (~BITS_RPWM_8812F)) 1327 #define BIT_GET_RPWM_8812F(x) \ 1328 (((x) >> BIT_SHIFT_RPWM_8812F) & BIT_MASK_RPWM_8812F) 1329 #define BIT_SET_RPWM_8812F(x, v) (BIT_CLEAR_RPWM_8812F(x) | BIT_RPWM_8812F(v)) 1330 1331 #define BIT_ANA_PORT_EN_8812F BIT(22) 1332 #define BIT_MAC_PORT_EN_8812F BIT(21) 1333 #define BIT_BOOT_FSPI_EN_8812F BIT(20) 1334 #define BIT_ROM_DLEN_8812F BIT(19) 1335 1336 #define BIT_SHIFT_ROM_PGE_8812F 16 1337 #define BIT_MASK_ROM_PGE_8812F 0x7 1338 #define BIT_ROM_PGE_8812F(x) \ 1339 (((x) & BIT_MASK_ROM_PGE_8812F) << BIT_SHIFT_ROM_PGE_8812F) 1340 #define BITS_ROM_PGE_8812F (BIT_MASK_ROM_PGE_8812F << BIT_SHIFT_ROM_PGE_8812F) 1341 #define BIT_CLEAR_ROM_PGE_8812F(x) ((x) & (~BITS_ROM_PGE_8812F)) 1342 #define BIT_GET_ROM_PGE_8812F(x) \ 1343 (((x) >> BIT_SHIFT_ROM_PGE_8812F) & BIT_MASK_ROM_PGE_8812F) 1344 #define BIT_SET_ROM_PGE_8812F(x, v) \ 1345 (BIT_CLEAR_ROM_PGE_8812F(x) | BIT_ROM_PGE_8812F(v)) 1346 1347 #define BIT_FW_INIT_RDY_8812F BIT(15) 1348 #define BIT_FW_DW_RDY_8812F BIT(14) 1349 1350 #define BIT_SHIFT_CPU_CLK_SEL_8812F 12 1351 #define BIT_MASK_CPU_CLK_SEL_8812F 0x3 1352 #define BIT_CPU_CLK_SEL_8812F(x) \ 1353 (((x) & BIT_MASK_CPU_CLK_SEL_8812F) << BIT_SHIFT_CPU_CLK_SEL_8812F) 1354 #define BITS_CPU_CLK_SEL_8812F \ 1355 (BIT_MASK_CPU_CLK_SEL_8812F << BIT_SHIFT_CPU_CLK_SEL_8812F) 1356 #define BIT_CLEAR_CPU_CLK_SEL_8812F(x) ((x) & (~BITS_CPU_CLK_SEL_8812F)) 1357 #define BIT_GET_CPU_CLK_SEL_8812F(x) \ 1358 (((x) >> BIT_SHIFT_CPU_CLK_SEL_8812F) & BIT_MASK_CPU_CLK_SEL_8812F) 1359 #define BIT_SET_CPU_CLK_SEL_8812F(x, v) \ 1360 (BIT_CLEAR_CPU_CLK_SEL_8812F(x) | BIT_CPU_CLK_SEL_8812F(v)) 1361 1362 #define BIT_CCLK_CHG_MASK_8812F BIT(11) 1363 #define BIT_EMEM__TXBUF_CHKSUM_OK_8812F BIT(10) 1364 #define BIT_EMEM_TXBUF_DW_RDY_8812F BIT(9) 1365 #define BIT_EMEM_CHKSUM_OK_8812F BIT(8) 1366 #define BIT_EMEM_DW_OK_8812F BIT(7) 1367 #define BIT_DMEM_CHKSUM_OK_8812F BIT(6) 1368 #define BIT_DMEM_DW_OK_8812F BIT(5) 1369 #define BIT_IMEM_CHKSUM_OK_8812F BIT(4) 1370 #define BIT_IMEM_DW_OK_8812F BIT(3) 1371 #define BIT_IMEM_BOOT_LOAD_CHKSUM_OK_8812F BIT(2) 1372 #define BIT_IMEM_BOOT_LOAD_DW_OK_8812F BIT(1) 1373 #define BIT_MCUFWDL_EN_8812F BIT(0) 1374 1375 /* 2 REG_MCU_TST_CFG_8812F */ 1376 1377 #define BIT_SHIFT_LBKTST_8812F 0 1378 #define BIT_MASK_LBKTST_8812F 0xffff 1379 #define BIT_LBKTST_8812F(x) \ 1380 (((x) & BIT_MASK_LBKTST_8812F) << BIT_SHIFT_LBKTST_8812F) 1381 #define BITS_LBKTST_8812F (BIT_MASK_LBKTST_8812F << BIT_SHIFT_LBKTST_8812F) 1382 #define BIT_CLEAR_LBKTST_8812F(x) ((x) & (~BITS_LBKTST_8812F)) 1383 #define BIT_GET_LBKTST_8812F(x) \ 1384 (((x) >> BIT_SHIFT_LBKTST_8812F) & BIT_MASK_LBKTST_8812F) 1385 #define BIT_SET_LBKTST_8812F(x, v) \ 1386 (BIT_CLEAR_LBKTST_8812F(x) | BIT_LBKTST_8812F(v)) 1387 1388 /* 2 REG_HMEBOX_E0_E1_8812F */ 1389 1390 #define BIT_SHIFT_HOST_MSG_E1_8812F 16 1391 #define BIT_MASK_HOST_MSG_E1_8812F 0xffff 1392 #define BIT_HOST_MSG_E1_8812F(x) \ 1393 (((x) & BIT_MASK_HOST_MSG_E1_8812F) << BIT_SHIFT_HOST_MSG_E1_8812F) 1394 #define BITS_HOST_MSG_E1_8812F \ 1395 (BIT_MASK_HOST_MSG_E1_8812F << BIT_SHIFT_HOST_MSG_E1_8812F) 1396 #define BIT_CLEAR_HOST_MSG_E1_8812F(x) ((x) & (~BITS_HOST_MSG_E1_8812F)) 1397 #define BIT_GET_HOST_MSG_E1_8812F(x) \ 1398 (((x) >> BIT_SHIFT_HOST_MSG_E1_8812F) & BIT_MASK_HOST_MSG_E1_8812F) 1399 #define BIT_SET_HOST_MSG_E1_8812F(x, v) \ 1400 (BIT_CLEAR_HOST_MSG_E1_8812F(x) | BIT_HOST_MSG_E1_8812F(v)) 1401 1402 #define BIT_SHIFT_HOST_MSG_E0_8812F 0 1403 #define BIT_MASK_HOST_MSG_E0_8812F 0xffff 1404 #define BIT_HOST_MSG_E0_8812F(x) \ 1405 (((x) & BIT_MASK_HOST_MSG_E0_8812F) << BIT_SHIFT_HOST_MSG_E0_8812F) 1406 #define BITS_HOST_MSG_E0_8812F \ 1407 (BIT_MASK_HOST_MSG_E0_8812F << BIT_SHIFT_HOST_MSG_E0_8812F) 1408 #define BIT_CLEAR_HOST_MSG_E0_8812F(x) ((x) & (~BITS_HOST_MSG_E0_8812F)) 1409 #define BIT_GET_HOST_MSG_E0_8812F(x) \ 1410 (((x) >> BIT_SHIFT_HOST_MSG_E0_8812F) & BIT_MASK_HOST_MSG_E0_8812F) 1411 #define BIT_SET_HOST_MSG_E0_8812F(x, v) \ 1412 (BIT_CLEAR_HOST_MSG_E0_8812F(x) | BIT_HOST_MSG_E0_8812F(v)) 1413 1414 /* 2 REG_HMEBOX_E2_E3_8812F */ 1415 1416 #define BIT_SHIFT_HOST_MSG_E3_8812F 16 1417 #define BIT_MASK_HOST_MSG_E3_8812F 0xffff 1418 #define BIT_HOST_MSG_E3_8812F(x) \ 1419 (((x) & BIT_MASK_HOST_MSG_E3_8812F) << BIT_SHIFT_HOST_MSG_E3_8812F) 1420 #define BITS_HOST_MSG_E3_8812F \ 1421 (BIT_MASK_HOST_MSG_E3_8812F << BIT_SHIFT_HOST_MSG_E3_8812F) 1422 #define BIT_CLEAR_HOST_MSG_E3_8812F(x) ((x) & (~BITS_HOST_MSG_E3_8812F)) 1423 #define BIT_GET_HOST_MSG_E3_8812F(x) \ 1424 (((x) >> BIT_SHIFT_HOST_MSG_E3_8812F) & BIT_MASK_HOST_MSG_E3_8812F) 1425 #define BIT_SET_HOST_MSG_E3_8812F(x, v) \ 1426 (BIT_CLEAR_HOST_MSG_E3_8812F(x) | BIT_HOST_MSG_E3_8812F(v)) 1427 1428 #define BIT_SHIFT_HOST_MSG_E2_8812F 0 1429 #define BIT_MASK_HOST_MSG_E2_8812F 0xffff 1430 #define BIT_HOST_MSG_E2_8812F(x) \ 1431 (((x) & BIT_MASK_HOST_MSG_E2_8812F) << BIT_SHIFT_HOST_MSG_E2_8812F) 1432 #define BITS_HOST_MSG_E2_8812F \ 1433 (BIT_MASK_HOST_MSG_E2_8812F << BIT_SHIFT_HOST_MSG_E2_8812F) 1434 #define BIT_CLEAR_HOST_MSG_E2_8812F(x) ((x) & (~BITS_HOST_MSG_E2_8812F)) 1435 #define BIT_GET_HOST_MSG_E2_8812F(x) \ 1436 (((x) >> BIT_SHIFT_HOST_MSG_E2_8812F) & BIT_MASK_HOST_MSG_E2_8812F) 1437 #define BIT_SET_HOST_MSG_E2_8812F(x, v) \ 1438 (BIT_CLEAR_HOST_MSG_E2_8812F(x) | BIT_HOST_MSG_E2_8812F(v)) 1439 1440 /* 2 REG_WLLPS_CTRL_8812F */ 1441 #define BIT_WLLPSOP_EABM_8812F BIT(31) 1442 #define BIT_WLLPSOP_ACKF_8812F BIT(30) 1443 #define BIT_WLLPSOP_DLDM_8812F BIT(29) 1444 #define BIT_WLLPSOP_ESWR_8812F BIT(28) 1445 #define BIT_WLLPSOP_PWMM_8812F BIT(27) 1446 #define BIT_WLLPSOP_EECK_8812F BIT(26) 1447 #define BIT_WLLPSOP_WLMACOFF_8812F BIT(25) 1448 #define BIT_WLLPSOP_EXTAL_8812F BIT(24) 1449 #define BIT_WL_SYNPON_VOLTSPDN_8812F BIT(23) 1450 #define BIT_WLLPSOP_WLBBOFF_8812F BIT(22) 1451 #define BIT_WLLPSOP_WLMEM_DS_8812F BIT(21) 1452 #define BIT_WLLPSOP_LDO_WAIT_TIME_8812F BIT(20) 1453 #define BIT_WLLPSOP_ANA_CLK_DIVISION_2_8812F BIT(19) 1454 #define BIT_AFE_BCN_8812F BIT(18) 1455 1456 #define BIT_SHIFT_LPLDH12_VADJ_STEP_DN_8812F 12 1457 #define BIT_MASK_LPLDH12_VADJ_STEP_DN_8812F 0xf 1458 #define BIT_LPLDH12_VADJ_STEP_DN_8812F(x) \ 1459 (((x) & BIT_MASK_LPLDH12_VADJ_STEP_DN_8812F) \ 1460 << BIT_SHIFT_LPLDH12_VADJ_STEP_DN_8812F) 1461 #define BITS_LPLDH12_VADJ_STEP_DN_8812F \ 1462 (BIT_MASK_LPLDH12_VADJ_STEP_DN_8812F \ 1463 << BIT_SHIFT_LPLDH12_VADJ_STEP_DN_8812F) 1464 #define BIT_CLEAR_LPLDH12_VADJ_STEP_DN_8812F(x) \ 1465 ((x) & (~BITS_LPLDH12_VADJ_STEP_DN_8812F)) 1466 #define BIT_GET_LPLDH12_VADJ_STEP_DN_8812F(x) \ 1467 (((x) >> BIT_SHIFT_LPLDH12_VADJ_STEP_DN_8812F) & \ 1468 BIT_MASK_LPLDH12_VADJ_STEP_DN_8812F) 1469 #define BIT_SET_LPLDH12_VADJ_STEP_DN_8812F(x, v) \ 1470 (BIT_CLEAR_LPLDH12_VADJ_STEP_DN_8812F(x) | \ 1471 BIT_LPLDH12_VADJ_STEP_DN_8812F(v)) 1472 1473 #define BIT_SHIFT_V15ADJ_L1_STEP_DN_V1_8812F 8 1474 #define BIT_MASK_V15ADJ_L1_STEP_DN_V1_8812F 0xf 1475 #define BIT_V15ADJ_L1_STEP_DN_V1_8812F(x) \ 1476 (((x) & BIT_MASK_V15ADJ_L1_STEP_DN_V1_8812F) \ 1477 << BIT_SHIFT_V15ADJ_L1_STEP_DN_V1_8812F) 1478 #define BITS_V15ADJ_L1_STEP_DN_V1_8812F \ 1479 (BIT_MASK_V15ADJ_L1_STEP_DN_V1_8812F \ 1480 << BIT_SHIFT_V15ADJ_L1_STEP_DN_V1_8812F) 1481 #define BIT_CLEAR_V15ADJ_L1_STEP_DN_V1_8812F(x) \ 1482 ((x) & (~BITS_V15ADJ_L1_STEP_DN_V1_8812F)) 1483 #define BIT_GET_V15ADJ_L1_STEP_DN_V1_8812F(x) \ 1484 (((x) >> BIT_SHIFT_V15ADJ_L1_STEP_DN_V1_8812F) & \ 1485 BIT_MASK_V15ADJ_L1_STEP_DN_V1_8812F) 1486 #define BIT_SET_V15ADJ_L1_STEP_DN_V1_8812F(x, v) \ 1487 (BIT_CLEAR_V15ADJ_L1_STEP_DN_V1_8812F(x) | \ 1488 BIT_V15ADJ_L1_STEP_DN_V1_8812F(v)) 1489 1490 #define BIT_FORCE_LEAVE_LPS_8812F BIT(3) 1491 #define BIT_SW_AFE_MODE_8812F BIT(2) 1492 #define BIT_REGU_32K_CLK_EN_8812F BIT(1) 1493 #define BIT_WL_LPS_EN_8812F BIT(0) 1494 1495 /* 2 REG_NOT_VALID_8812F */ 1496 1497 /* 2 REG_GPIO_DEBOUNCE_CTRL_8812F */ 1498 #define BIT_WLGP_DBC1EN_8812F BIT(15) 1499 1500 #define BIT_SHIFT_WLGP_DBC1_8812F 8 1501 #define BIT_MASK_WLGP_DBC1_8812F 0xf 1502 #define BIT_WLGP_DBC1_8812F(x) \ 1503 (((x) & BIT_MASK_WLGP_DBC1_8812F) << BIT_SHIFT_WLGP_DBC1_8812F) 1504 #define BITS_WLGP_DBC1_8812F \ 1505 (BIT_MASK_WLGP_DBC1_8812F << BIT_SHIFT_WLGP_DBC1_8812F) 1506 #define BIT_CLEAR_WLGP_DBC1_8812F(x) ((x) & (~BITS_WLGP_DBC1_8812F)) 1507 #define BIT_GET_WLGP_DBC1_8812F(x) \ 1508 (((x) >> BIT_SHIFT_WLGP_DBC1_8812F) & BIT_MASK_WLGP_DBC1_8812F) 1509 #define BIT_SET_WLGP_DBC1_8812F(x, v) \ 1510 (BIT_CLEAR_WLGP_DBC1_8812F(x) | BIT_WLGP_DBC1_8812F(v)) 1511 1512 #define BIT_WLGP_DBC0EN_8812F BIT(7) 1513 1514 #define BIT_SHIFT_WLGP_DBC0_8812F 0 1515 #define BIT_MASK_WLGP_DBC0_8812F 0xf 1516 #define BIT_WLGP_DBC0_8812F(x) \ 1517 (((x) & BIT_MASK_WLGP_DBC0_8812F) << BIT_SHIFT_WLGP_DBC0_8812F) 1518 #define BITS_WLGP_DBC0_8812F \ 1519 (BIT_MASK_WLGP_DBC0_8812F << BIT_SHIFT_WLGP_DBC0_8812F) 1520 #define BIT_CLEAR_WLGP_DBC0_8812F(x) ((x) & (~BITS_WLGP_DBC0_8812F)) 1521 #define BIT_GET_WLGP_DBC0_8812F(x) \ 1522 (((x) >> BIT_SHIFT_WLGP_DBC0_8812F) & BIT_MASK_WLGP_DBC0_8812F) 1523 #define BIT_SET_WLGP_DBC0_8812F(x, v) \ 1524 (BIT_CLEAR_WLGP_DBC0_8812F(x) | BIT_WLGP_DBC0_8812F(v)) 1525 1526 /* 2 REG_RPWM2_8812F */ 1527 1528 #define BIT_SHIFT_RPWM2_8812F 16 1529 #define BIT_MASK_RPWM2_8812F 0xffff 1530 #define BIT_RPWM2_8812F(x) \ 1531 (((x) & BIT_MASK_RPWM2_8812F) << BIT_SHIFT_RPWM2_8812F) 1532 #define BITS_RPWM2_8812F (BIT_MASK_RPWM2_8812F << BIT_SHIFT_RPWM2_8812F) 1533 #define BIT_CLEAR_RPWM2_8812F(x) ((x) & (~BITS_RPWM2_8812F)) 1534 #define BIT_GET_RPWM2_8812F(x) \ 1535 (((x) >> BIT_SHIFT_RPWM2_8812F) & BIT_MASK_RPWM2_8812F) 1536 #define BIT_SET_RPWM2_8812F(x, v) \ 1537 (BIT_CLEAR_RPWM2_8812F(x) | BIT_RPWM2_8812F(v)) 1538 1539 /* 2 REG_SYSON_FSM_MON_8812F */ 1540 1541 #define BIT_SHIFT_FSM_MON_SEL_8812F 24 1542 #define BIT_MASK_FSM_MON_SEL_8812F 0x7 1543 #define BIT_FSM_MON_SEL_8812F(x) \ 1544 (((x) & BIT_MASK_FSM_MON_SEL_8812F) << BIT_SHIFT_FSM_MON_SEL_8812F) 1545 #define BITS_FSM_MON_SEL_8812F \ 1546 (BIT_MASK_FSM_MON_SEL_8812F << BIT_SHIFT_FSM_MON_SEL_8812F) 1547 #define BIT_CLEAR_FSM_MON_SEL_8812F(x) ((x) & (~BITS_FSM_MON_SEL_8812F)) 1548 #define BIT_GET_FSM_MON_SEL_8812F(x) \ 1549 (((x) >> BIT_SHIFT_FSM_MON_SEL_8812F) & BIT_MASK_FSM_MON_SEL_8812F) 1550 #define BIT_SET_FSM_MON_SEL_8812F(x, v) \ 1551 (BIT_CLEAR_FSM_MON_SEL_8812F(x) | BIT_FSM_MON_SEL_8812F(v)) 1552 1553 #define BIT_DOP_ELDO_8812F BIT(23) 1554 #define BIT_FSM_MON_UPD_8812F BIT(15) 1555 1556 #define BIT_SHIFT_FSM_PAR_8812F 0 1557 #define BIT_MASK_FSM_PAR_8812F 0x7fff 1558 #define BIT_FSM_PAR_8812F(x) \ 1559 (((x) & BIT_MASK_FSM_PAR_8812F) << BIT_SHIFT_FSM_PAR_8812F) 1560 #define BITS_FSM_PAR_8812F (BIT_MASK_FSM_PAR_8812F << BIT_SHIFT_FSM_PAR_8812F) 1561 #define BIT_CLEAR_FSM_PAR_8812F(x) ((x) & (~BITS_FSM_PAR_8812F)) 1562 #define BIT_GET_FSM_PAR_8812F(x) \ 1563 (((x) >> BIT_SHIFT_FSM_PAR_8812F) & BIT_MASK_FSM_PAR_8812F) 1564 #define BIT_SET_FSM_PAR_8812F(x, v) \ 1565 (BIT_CLEAR_FSM_PAR_8812F(x) | BIT_FSM_PAR_8812F(v)) 1566 1567 /* 2 REG_NOT_VALID_8812F */ 1568 1569 /* 2 REG_PMC_DBG_CTRL1_8812F */ 1570 #define BIT_BT_INT_EN_8812F BIT(31) 1571 1572 #define BIT_SHIFT_RD_WR_WIFI_BT_INFO_8812F 16 1573 #define BIT_MASK_RD_WR_WIFI_BT_INFO_8812F 0x7fff 1574 #define BIT_RD_WR_WIFI_BT_INFO_8812F(x) \ 1575 (((x) & BIT_MASK_RD_WR_WIFI_BT_INFO_8812F) \ 1576 << BIT_SHIFT_RD_WR_WIFI_BT_INFO_8812F) 1577 #define BITS_RD_WR_WIFI_BT_INFO_8812F \ 1578 (BIT_MASK_RD_WR_WIFI_BT_INFO_8812F \ 1579 << BIT_SHIFT_RD_WR_WIFI_BT_INFO_8812F) 1580 #define BIT_CLEAR_RD_WR_WIFI_BT_INFO_8812F(x) \ 1581 ((x) & (~BITS_RD_WR_WIFI_BT_INFO_8812F)) 1582 #define BIT_GET_RD_WR_WIFI_BT_INFO_8812F(x) \ 1583 (((x) >> BIT_SHIFT_RD_WR_WIFI_BT_INFO_8812F) & \ 1584 BIT_MASK_RD_WR_WIFI_BT_INFO_8812F) 1585 #define BIT_SET_RD_WR_WIFI_BT_INFO_8812F(x, v) \ 1586 (BIT_CLEAR_RD_WR_WIFI_BT_INFO_8812F(x) | \ 1587 BIT_RD_WR_WIFI_BT_INFO_8812F(v)) 1588 1589 #define BIT_PMC_WR_OVF_8812F BIT(8) 1590 1591 #define BIT_SHIFT_WLPMC_ERRINT_8812F 0 1592 #define BIT_MASK_WLPMC_ERRINT_8812F 0xff 1593 #define BIT_WLPMC_ERRINT_8812F(x) \ 1594 (((x) & BIT_MASK_WLPMC_ERRINT_8812F) << BIT_SHIFT_WLPMC_ERRINT_8812F) 1595 #define BITS_WLPMC_ERRINT_8812F \ 1596 (BIT_MASK_WLPMC_ERRINT_8812F << BIT_SHIFT_WLPMC_ERRINT_8812F) 1597 #define BIT_CLEAR_WLPMC_ERRINT_8812F(x) ((x) & (~BITS_WLPMC_ERRINT_8812F)) 1598 #define BIT_GET_WLPMC_ERRINT_8812F(x) \ 1599 (((x) >> BIT_SHIFT_WLPMC_ERRINT_8812F) & BIT_MASK_WLPMC_ERRINT_8812F) 1600 #define BIT_SET_WLPMC_ERRINT_8812F(x, v) \ 1601 (BIT_CLEAR_WLPMC_ERRINT_8812F(x) | BIT_WLPMC_ERRINT_8812F(v)) 1602 1603 /* 2 REG_NOT_VALID_8812F */ 1604 1605 /* 2 REG_HIMR0_8812F */ 1606 #define BIT_TIMEOUT_INTERRUPT2_MASK_8812F BIT(31) 1607 #define BIT_TIMEOUT_INTERRUTP1_MASK_8812F BIT(30) 1608 #define BIT_PSTIMEOUT_MSK_8812F BIT(29) 1609 #define BIT_GTINT4_MSK_8812F BIT(28) 1610 #define BIT_GTINT3_MSK_8812F BIT(27) 1611 #define BIT_TXBCN0ERR_MSK_8812F BIT(26) 1612 #define BIT_TXBCN0OK_MSK_8812F BIT(25) 1613 #define BIT_TSF_BIT32_TOGGLE_MSK_8812F BIT(24) 1614 #define BIT_BCNDMAINT0_MSK_8812F BIT(20) 1615 #define BIT_BCNDERR0_MSK_8812F BIT(16) 1616 #define BIT_HSISR_IND_ON_INT_MSK_8812F BIT(15) 1617 #define BIT_BCNDMAINT_E_MSK_8812F BIT(14) 1618 #define BIT_CTWEND_MSK_8812F BIT(12) 1619 #define BIT_HISR1_IND_MSK_8812F BIT(11) 1620 #define BIT_C2HCMD_MSK_8812F BIT(10) 1621 #define BIT_CPWM2_MSK_8812F BIT(9) 1622 #define BIT_CPWM_MSK_8812F BIT(8) 1623 #define BIT_HIGHDOK_MSK_8812F BIT(7) 1624 #define BIT_MGTDOK_MSK_8812F BIT(6) 1625 #define BIT_BKDOK_MSK_8812F BIT(5) 1626 #define BIT_BEDOK_MSK_8812F BIT(4) 1627 #define BIT_VIDOK_MSK_8812F BIT(3) 1628 #define BIT_VODOK_MSK_8812F BIT(2) 1629 #define BIT_RDU_MSK_8812F BIT(1) 1630 #define BIT_RXOK_MSK_8812F BIT(0) 1631 1632 /* 2 REG_HISR0_8812F */ 1633 #define BIT_PSTIMEOUT2_8812F BIT(31) 1634 #define BIT_PSTIMEOUT1_8812F BIT(30) 1635 #define BIT_PSTIMEOUT_8812F BIT(29) 1636 #define BIT_GTINT4_8812F BIT(28) 1637 #define BIT_GTINT3_8812F BIT(27) 1638 #define BIT_TXBCN0ERR_8812F BIT(26) 1639 #define BIT_TXBCN0OK_8812F BIT(25) 1640 #define BIT_TSF_BIT32_TOGGLE_8812F BIT(24) 1641 #define BIT_BCNDMAINT0_8812F BIT(20) 1642 #define BIT_BCNDERR0_8812F BIT(16) 1643 #define BIT_HSISR_IND_ON_INT_8812F BIT(15) 1644 #define BIT_BCNDMAINT_E_8812F BIT(14) 1645 #define BIT_CTWEND_8812F BIT(12) 1646 #define BIT_HISR1_IND_INT_8812F BIT(11) 1647 #define BIT_C2HCMD_8812F BIT(10) 1648 #define BIT_CPWM2_8812F BIT(9) 1649 #define BIT_CPWM_8812F BIT(8) 1650 #define BIT_HIGHDOK_8812F BIT(7) 1651 #define BIT_MGTDOK_8812F BIT(6) 1652 #define BIT_BKDOK_8812F BIT(5) 1653 #define BIT_BEDOK_8812F BIT(4) 1654 #define BIT_VIDOK_8812F BIT(3) 1655 #define BIT_VODOK_8812F BIT(2) 1656 #define BIT_RDU_8812F BIT(1) 1657 #define BIT_RXOK_8812F BIT(0) 1658 1659 /* 2 REG_HIMR1_8812F */ 1660 #define BIT_TXFIFO_TH_INT_8812F BIT(30) 1661 #define BIT_BTON_STS_UPDATE_MASK_8812F BIT(29) 1662 #define BIT_MCU_ERR_MASK_8812F BIT(28) 1663 #define BIT_BCNDMAINT7__MSK_8812F BIT(27) 1664 #define BIT_BCNDMAINT6__MSK_8812F BIT(26) 1665 #define BIT_BCNDMAINT5__MSK_8812F BIT(25) 1666 #define BIT_BCNDMAINT4__MSK_8812F BIT(24) 1667 #define BIT_BCNDMAINT3_MSK_8812F BIT(23) 1668 #define BIT_BCNDMAINT2_MSK_8812F BIT(22) 1669 #define BIT_BCNDMAINT1_MSK_8812F BIT(21) 1670 #define BIT_BCNDERR7_MSK_8812F BIT(20) 1671 #define BIT_BCNDERR6_MSK_8812F BIT(19) 1672 #define BIT_BCNDERR5_MSK_8812F BIT(18) 1673 #define BIT_BCNDERR4_MSK_8812F BIT(17) 1674 #define BIT_BCNDERR3_MSK_8812F BIT(16) 1675 #define BIT_BCNDERR2_MSK_8812F BIT(15) 1676 #define BIT_BCNDERR1_MSK_8812F BIT(14) 1677 #define BIT_ATIMEND_E_MSK_8812F BIT(13) 1678 #define BIT_ATIMEND__MSK_8812F BIT(12) 1679 #define BIT_TXERR_MSK_8812F BIT(11) 1680 #define BIT_RXERR_MSK_8812F BIT(10) 1681 #define BIT_TXFOVW_MSK_8812F BIT(9) 1682 #define BIT_FOVW_MSK_8812F BIT(8) 1683 #define BIT_CPU_MGQ_TXDONE_MSK_8812F BIT(5) 1684 #define BIT_PS_TIMER_C_MSK_8812F BIT(4) 1685 #define BIT_PS_TIMER_B_MSK_8812F BIT(3) 1686 #define BIT_PS_TIMER_A_MSK_8812F BIT(2) 1687 #define BIT_CPUMGQ_TX_TIMER_MSK_8812F BIT(1) 1688 1689 /* 2 REG_HISR1_8812F */ 1690 #define BIT_TXFIFO_TH_INT_8812F BIT(30) 1691 #define BIT_BTON_STS_UPDATE_INT_8812F BIT(29) 1692 #define BIT_MCU_ERR_8812F BIT(28) 1693 #define BIT_BCNDMAINT7_8812F BIT(27) 1694 #define BIT_BCNDMAINT6_8812F BIT(26) 1695 #define BIT_BCNDMAINT5_8812F BIT(25) 1696 #define BIT_BCNDMAINT4_8812F BIT(24) 1697 #define BIT_BCNDMAINT3_8812F BIT(23) 1698 #define BIT_BCNDMAINT2_8812F BIT(22) 1699 #define BIT_BCNDMAINT1_8812F BIT(21) 1700 #define BIT_BCNDERR7_8812F BIT(20) 1701 #define BIT_BCNDERR6_8812F BIT(19) 1702 #define BIT_BCNDERR5_8812F BIT(18) 1703 #define BIT_BCNDERR4_8812F BIT(17) 1704 #define BIT_BCNDERR3_8812F BIT(16) 1705 #define BIT_BCNDERR2_8812F BIT(15) 1706 #define BIT_BCNDERR1_8812F BIT(14) 1707 #define BIT_ATIMEND_E_8812F BIT(13) 1708 #define BIT_ATIMEND_8812F BIT(12) 1709 #define BIT_TXERR_INT_8812F BIT(11) 1710 #define BIT_RXERR_INT_8812F BIT(10) 1711 #define BIT_TXFOVW_8812F BIT(9) 1712 #define BIT_FOVW_8812F BIT(8) 1713 1714 /* 2 REG_NOT_VALID_8812F */ 1715 #define BIT_CPU_MGQ_TXDONE_8812F BIT(5) 1716 #define BIT_PS_TIMER_C_8812F BIT(4) 1717 #define BIT_PS_TIMER_B_8812F BIT(3) 1718 #define BIT_PS_TIMER_A_8812F BIT(2) 1719 #define BIT_CPUMGQ_TX_TIMER_8812F BIT(1) 1720 1721 /* 2 REG_DBG_PORT_SEL_8812F */ 1722 1723 #define BIT_SHIFT_DEBUG_ST_8812F 0 1724 #define BIT_MASK_DEBUG_ST_8812F 0xffffffffL 1725 #define BIT_DEBUG_ST_8812F(x) \ 1726 (((x) & BIT_MASK_DEBUG_ST_8812F) << BIT_SHIFT_DEBUG_ST_8812F) 1727 #define BITS_DEBUG_ST_8812F \ 1728 (BIT_MASK_DEBUG_ST_8812F << BIT_SHIFT_DEBUG_ST_8812F) 1729 #define BIT_CLEAR_DEBUG_ST_8812F(x) ((x) & (~BITS_DEBUG_ST_8812F)) 1730 #define BIT_GET_DEBUG_ST_8812F(x) \ 1731 (((x) >> BIT_SHIFT_DEBUG_ST_8812F) & BIT_MASK_DEBUG_ST_8812F) 1732 #define BIT_SET_DEBUG_ST_8812F(x, v) \ 1733 (BIT_CLEAR_DEBUG_ST_8812F(x) | BIT_DEBUG_ST_8812F(v)) 1734 1735 /* 2 REG_PAD_CTRL2_8812F */ 1736 #define BIT_USB3_USB2_TRANSITION_8812F BIT(20) 1737 1738 #define BIT_SHIFT_USB23_SW_MODE_V1_8812F 18 1739 #define BIT_MASK_USB23_SW_MODE_V1_8812F 0x3 1740 #define BIT_USB23_SW_MODE_V1_8812F(x) \ 1741 (((x) & BIT_MASK_USB23_SW_MODE_V1_8812F) \ 1742 << BIT_SHIFT_USB23_SW_MODE_V1_8812F) 1743 #define BITS_USB23_SW_MODE_V1_8812F \ 1744 (BIT_MASK_USB23_SW_MODE_V1_8812F << BIT_SHIFT_USB23_SW_MODE_V1_8812F) 1745 #define BIT_CLEAR_USB23_SW_MODE_V1_8812F(x) \ 1746 ((x) & (~BITS_USB23_SW_MODE_V1_8812F)) 1747 #define BIT_GET_USB23_SW_MODE_V1_8812F(x) \ 1748 (((x) >> BIT_SHIFT_USB23_SW_MODE_V1_8812F) & \ 1749 BIT_MASK_USB23_SW_MODE_V1_8812F) 1750 #define BIT_SET_USB23_SW_MODE_V1_8812F(x, v) \ 1751 (BIT_CLEAR_USB23_SW_MODE_V1_8812F(x) | BIT_USB23_SW_MODE_V1_8812F(v)) 1752 1753 #define BIT_NO_PDN_CHIPOFF_V1_8812F BIT(17) 1754 #define BIT_RSM_EN_V1_8812F BIT(16) 1755 1756 #define BIT_SHIFT_MATCH_CNT_8812F 8 1757 #define BIT_MASK_MATCH_CNT_8812F 0xff 1758 #define BIT_MATCH_CNT_8812F(x) \ 1759 (((x) & BIT_MASK_MATCH_CNT_8812F) << BIT_SHIFT_MATCH_CNT_8812F) 1760 #define BITS_MATCH_CNT_8812F \ 1761 (BIT_MASK_MATCH_CNT_8812F << BIT_SHIFT_MATCH_CNT_8812F) 1762 #define BIT_CLEAR_MATCH_CNT_8812F(x) ((x) & (~BITS_MATCH_CNT_8812F)) 1763 #define BIT_GET_MATCH_CNT_8812F(x) \ 1764 (((x) >> BIT_SHIFT_MATCH_CNT_8812F) & BIT_MASK_MATCH_CNT_8812F) 1765 #define BIT_SET_MATCH_CNT_8812F(x, v) \ 1766 (BIT_CLEAR_MATCH_CNT_8812F(x) | BIT_MATCH_CNT_8812F(v)) 1767 1768 #define BIT_LD_B12V_EN_8812F BIT(7) 1769 #define BIT_EECS_IOSEL_V1_8812F BIT(6) 1770 #define BIT_EECS_DATA_O_V1_8812F BIT(5) 1771 #define BIT_EECS_DATA_I_V1_8812F BIT(4) 1772 #define BIT_EESK_IOSEL_V1_8812F BIT(2) 1773 #define BIT_EESK_DATA_O_V1_8812F BIT(1) 1774 #define BIT_EESK_DATA_I_V1_8812F BIT(0) 1775 1776 /* 2 REG_NOT_VALID_8812F */ 1777 1778 /* 2 REG_PMC_DBG_CTRL2_8812F */ 1779 1780 #define BIT_SHIFT_EFUSE_BURN_GNT_8812F 24 1781 #define BIT_MASK_EFUSE_BURN_GNT_8812F 0xff 1782 #define BIT_EFUSE_BURN_GNT_8812F(x) \ 1783 (((x) & BIT_MASK_EFUSE_BURN_GNT_8812F) \ 1784 << BIT_SHIFT_EFUSE_BURN_GNT_8812F) 1785 #define BITS_EFUSE_BURN_GNT_8812F \ 1786 (BIT_MASK_EFUSE_BURN_GNT_8812F << BIT_SHIFT_EFUSE_BURN_GNT_8812F) 1787 #define BIT_CLEAR_EFUSE_BURN_GNT_8812F(x) ((x) & (~BITS_EFUSE_BURN_GNT_8812F)) 1788 #define BIT_GET_EFUSE_BURN_GNT_8812F(x) \ 1789 (((x) >> BIT_SHIFT_EFUSE_BURN_GNT_8812F) & \ 1790 BIT_MASK_EFUSE_BURN_GNT_8812F) 1791 #define BIT_SET_EFUSE_BURN_GNT_8812F(x, v) \ 1792 (BIT_CLEAR_EFUSE_BURN_GNT_8812F(x) | BIT_EFUSE_BURN_GNT_8812F(v)) 1793 1794 #define BIT_STOP_WL_PMC_8812F BIT(9) 1795 #define BIT_STOP_SYM_PMC_8812F BIT(8) 1796 #define BIT_BT_ACCESS_WL_PAGE0_8812F BIT(6) 1797 #define BIT_REG_RST_WLPMC_8812F BIT(5) 1798 #define BIT_REG_RST_PD12N_8812F BIT(4) 1799 #define BIT_SYSON_DIS_WLREG_WRMSK_8812F BIT(3) 1800 #define BIT_SYSON_DIS_PMCREG_WRMSK_8812F BIT(2) 1801 1802 #define BIT_SHIFT_SYSON_REG_ARB_8812F 0 1803 #define BIT_MASK_SYSON_REG_ARB_8812F 0x3 1804 #define BIT_SYSON_REG_ARB_8812F(x) \ 1805 (((x) & BIT_MASK_SYSON_REG_ARB_8812F) << BIT_SHIFT_SYSON_REG_ARB_8812F) 1806 #define BITS_SYSON_REG_ARB_8812F \ 1807 (BIT_MASK_SYSON_REG_ARB_8812F << BIT_SHIFT_SYSON_REG_ARB_8812F) 1808 #define BIT_CLEAR_SYSON_REG_ARB_8812F(x) ((x) & (~BITS_SYSON_REG_ARB_8812F)) 1809 #define BIT_GET_SYSON_REG_ARB_8812F(x) \ 1810 (((x) >> BIT_SHIFT_SYSON_REG_ARB_8812F) & BIT_MASK_SYSON_REG_ARB_8812F) 1811 #define BIT_SET_SYSON_REG_ARB_8812F(x, v) \ 1812 (BIT_CLEAR_SYSON_REG_ARB_8812F(x) | BIT_SYSON_REG_ARB_8812F(v)) 1813 1814 /* 2 REG_BIST_CTRL_8812F */ 1815 #define BIT_BIST_USB_DIS_8812F BIT(27) 1816 #define BIT_BIST_PCI_DIS_8812F BIT(26) 1817 #define BIT_BIST_BT_DIS_8812F BIT(25) 1818 #define BIT_BIST_WL_DIS_8812F BIT(24) 1819 1820 #define BIT_SHIFT_BIST_RPT_SEL_8812F 16 1821 #define BIT_MASK_BIST_RPT_SEL_8812F 0xf 1822 #define BIT_BIST_RPT_SEL_8812F(x) \ 1823 (((x) & BIT_MASK_BIST_RPT_SEL_8812F) << BIT_SHIFT_BIST_RPT_SEL_8812F) 1824 #define BITS_BIST_RPT_SEL_8812F \ 1825 (BIT_MASK_BIST_RPT_SEL_8812F << BIT_SHIFT_BIST_RPT_SEL_8812F) 1826 #define BIT_CLEAR_BIST_RPT_SEL_8812F(x) ((x) & (~BITS_BIST_RPT_SEL_8812F)) 1827 #define BIT_GET_BIST_RPT_SEL_8812F(x) \ 1828 (((x) >> BIT_SHIFT_BIST_RPT_SEL_8812F) & BIT_MASK_BIST_RPT_SEL_8812F) 1829 #define BIT_SET_BIST_RPT_SEL_8812F(x, v) \ 1830 (BIT_CLEAR_BIST_RPT_SEL_8812F(x) | BIT_BIST_RPT_SEL_8812F(v)) 1831 1832 #define BIT_BIST_RESUME_PS_8812F BIT(4) 1833 #define BIT_BIST_RESUME_8812F BIT(3) 1834 #define BIT_BIST_NORMAL_8812F BIT(2) 1835 #define BIT_BIST_RSTN_8812F BIT(1) 1836 #define BIT_BIST_CLK_EN_8812F BIT(0) 1837 1838 /* 2 REG_BIST_RPT_8812F */ 1839 1840 #define BIT_SHIFT_MBIST_REPORT_8812F 0 1841 #define BIT_MASK_MBIST_REPORT_8812F 0xffffffffL 1842 #define BIT_MBIST_REPORT_8812F(x) \ 1843 (((x) & BIT_MASK_MBIST_REPORT_8812F) << BIT_SHIFT_MBIST_REPORT_8812F) 1844 #define BITS_MBIST_REPORT_8812F \ 1845 (BIT_MASK_MBIST_REPORT_8812F << BIT_SHIFT_MBIST_REPORT_8812F) 1846 #define BIT_CLEAR_MBIST_REPORT_8812F(x) ((x) & (~BITS_MBIST_REPORT_8812F)) 1847 #define BIT_GET_MBIST_REPORT_8812F(x) \ 1848 (((x) >> BIT_SHIFT_MBIST_REPORT_8812F) & BIT_MASK_MBIST_REPORT_8812F) 1849 #define BIT_SET_MBIST_REPORT_8812F(x, v) \ 1850 (BIT_CLEAR_MBIST_REPORT_8812F(x) | BIT_MBIST_REPORT_8812F(v)) 1851 1852 /* 2 REG_MEM_CTRL_8812F */ 1853 #define BIT_UMEM_RME_8812F BIT(31) 1854 1855 #define BIT_SHIFT_BT_SPRAM_8812F 28 1856 #define BIT_MASK_BT_SPRAM_8812F 0x3 1857 #define BIT_BT_SPRAM_8812F(x) \ 1858 (((x) & BIT_MASK_BT_SPRAM_8812F) << BIT_SHIFT_BT_SPRAM_8812F) 1859 #define BITS_BT_SPRAM_8812F \ 1860 (BIT_MASK_BT_SPRAM_8812F << BIT_SHIFT_BT_SPRAM_8812F) 1861 #define BIT_CLEAR_BT_SPRAM_8812F(x) ((x) & (~BITS_BT_SPRAM_8812F)) 1862 #define BIT_GET_BT_SPRAM_8812F(x) \ 1863 (((x) >> BIT_SHIFT_BT_SPRAM_8812F) & BIT_MASK_BT_SPRAM_8812F) 1864 #define BIT_SET_BT_SPRAM_8812F(x, v) \ 1865 (BIT_CLEAR_BT_SPRAM_8812F(x) | BIT_BT_SPRAM_8812F(v)) 1866 1867 #define BIT_SHIFT_BT_ROM_8812F 24 1868 #define BIT_MASK_BT_ROM_8812F 0xf 1869 #define BIT_BT_ROM_8812F(x) \ 1870 (((x) & BIT_MASK_BT_ROM_8812F) << BIT_SHIFT_BT_ROM_8812F) 1871 #define BITS_BT_ROM_8812F (BIT_MASK_BT_ROM_8812F << BIT_SHIFT_BT_ROM_8812F) 1872 #define BIT_CLEAR_BT_ROM_8812F(x) ((x) & (~BITS_BT_ROM_8812F)) 1873 #define BIT_GET_BT_ROM_8812F(x) \ 1874 (((x) >> BIT_SHIFT_BT_ROM_8812F) & BIT_MASK_BT_ROM_8812F) 1875 #define BIT_SET_BT_ROM_8812F(x, v) \ 1876 (BIT_CLEAR_BT_ROM_8812F(x) | BIT_BT_ROM_8812F(v)) 1877 1878 #define BIT_SHIFT_PCI_DPRAM_8812F 10 1879 #define BIT_MASK_PCI_DPRAM_8812F 0x3 1880 #define BIT_PCI_DPRAM_8812F(x) \ 1881 (((x) & BIT_MASK_PCI_DPRAM_8812F) << BIT_SHIFT_PCI_DPRAM_8812F) 1882 #define BITS_PCI_DPRAM_8812F \ 1883 (BIT_MASK_PCI_DPRAM_8812F << BIT_SHIFT_PCI_DPRAM_8812F) 1884 #define BIT_CLEAR_PCI_DPRAM_8812F(x) ((x) & (~BITS_PCI_DPRAM_8812F)) 1885 #define BIT_GET_PCI_DPRAM_8812F(x) \ 1886 (((x) >> BIT_SHIFT_PCI_DPRAM_8812F) & BIT_MASK_PCI_DPRAM_8812F) 1887 #define BIT_SET_PCI_DPRAM_8812F(x, v) \ 1888 (BIT_CLEAR_PCI_DPRAM_8812F(x) | BIT_PCI_DPRAM_8812F(v)) 1889 1890 #define BIT_SHIFT_PCI_SPRAM_8812F 8 1891 #define BIT_MASK_PCI_SPRAM_8812F 0x3 1892 #define BIT_PCI_SPRAM_8812F(x) \ 1893 (((x) & BIT_MASK_PCI_SPRAM_8812F) << BIT_SHIFT_PCI_SPRAM_8812F) 1894 #define BITS_PCI_SPRAM_8812F \ 1895 (BIT_MASK_PCI_SPRAM_8812F << BIT_SHIFT_PCI_SPRAM_8812F) 1896 #define BIT_CLEAR_PCI_SPRAM_8812F(x) ((x) & (~BITS_PCI_SPRAM_8812F)) 1897 #define BIT_GET_PCI_SPRAM_8812F(x) \ 1898 (((x) >> BIT_SHIFT_PCI_SPRAM_8812F) & BIT_MASK_PCI_SPRAM_8812F) 1899 #define BIT_SET_PCI_SPRAM_8812F(x, v) \ 1900 (BIT_CLEAR_PCI_SPRAM_8812F(x) | BIT_PCI_SPRAM_8812F(v)) 1901 1902 #define BIT_SHIFT_USB_SPRAM_8812F 6 1903 #define BIT_MASK_USB_SPRAM_8812F 0x3 1904 #define BIT_USB_SPRAM_8812F(x) \ 1905 (((x) & BIT_MASK_USB_SPRAM_8812F) << BIT_SHIFT_USB_SPRAM_8812F) 1906 #define BITS_USB_SPRAM_8812F \ 1907 (BIT_MASK_USB_SPRAM_8812F << BIT_SHIFT_USB_SPRAM_8812F) 1908 #define BIT_CLEAR_USB_SPRAM_8812F(x) ((x) & (~BITS_USB_SPRAM_8812F)) 1909 #define BIT_GET_USB_SPRAM_8812F(x) \ 1910 (((x) >> BIT_SHIFT_USB_SPRAM_8812F) & BIT_MASK_USB_SPRAM_8812F) 1911 #define BIT_SET_USB_SPRAM_8812F(x, v) \ 1912 (BIT_CLEAR_USB_SPRAM_8812F(x) | BIT_USB_SPRAM_8812F(v)) 1913 1914 #define BIT_SHIFT_USB_SPRF_8812F 4 1915 #define BIT_MASK_USB_SPRF_8812F 0x3 1916 #define BIT_USB_SPRF_8812F(x) \ 1917 (((x) & BIT_MASK_USB_SPRF_8812F) << BIT_SHIFT_USB_SPRF_8812F) 1918 #define BITS_USB_SPRF_8812F \ 1919 (BIT_MASK_USB_SPRF_8812F << BIT_SHIFT_USB_SPRF_8812F) 1920 #define BIT_CLEAR_USB_SPRF_8812F(x) ((x) & (~BITS_USB_SPRF_8812F)) 1921 #define BIT_GET_USB_SPRF_8812F(x) \ 1922 (((x) >> BIT_SHIFT_USB_SPRF_8812F) & BIT_MASK_USB_SPRF_8812F) 1923 #define BIT_SET_USB_SPRF_8812F(x, v) \ 1924 (BIT_CLEAR_USB_SPRF_8812F(x) | BIT_USB_SPRF_8812F(v)) 1925 1926 #define BIT_SHIFT_MCU_ROM_8812F 0 1927 #define BIT_MASK_MCU_ROM_8812F 0xf 1928 #define BIT_MCU_ROM_8812F(x) \ 1929 (((x) & BIT_MASK_MCU_ROM_8812F) << BIT_SHIFT_MCU_ROM_8812F) 1930 #define BITS_MCU_ROM_8812F (BIT_MASK_MCU_ROM_8812F << BIT_SHIFT_MCU_ROM_8812F) 1931 #define BIT_CLEAR_MCU_ROM_8812F(x) ((x) & (~BITS_MCU_ROM_8812F)) 1932 #define BIT_GET_MCU_ROM_8812F(x) \ 1933 (((x) >> BIT_SHIFT_MCU_ROM_8812F) & BIT_MASK_MCU_ROM_8812F) 1934 #define BIT_SET_MCU_ROM_8812F(x, v) \ 1935 (BIT_CLEAR_MCU_ROM_8812F(x) | BIT_MCU_ROM_8812F(v)) 1936 1937 /* 2 REG_NOT_VALID_8812F */ 1938 1939 /* 2 REG_USB_SIE_INTF_8812F */ 1940 #define BIT_RD_SEL_8812F BIT(31) 1941 #define BIT_USB_SIE_INTF_WE_V1_8812F BIT(30) 1942 #define BIT_USB_SIE_INTF_BYIOREG_V1_8812F BIT(29) 1943 #define BIT_USB_SIE_SELECT_8812F BIT(28) 1944 1945 #define BIT_SHIFT_USB_SIE_INTF_ADDR_V1_8812F 16 1946 #define BIT_MASK_USB_SIE_INTF_ADDR_V1_8812F 0x1ff 1947 #define BIT_USB_SIE_INTF_ADDR_V1_8812F(x) \ 1948 (((x) & BIT_MASK_USB_SIE_INTF_ADDR_V1_8812F) \ 1949 << BIT_SHIFT_USB_SIE_INTF_ADDR_V1_8812F) 1950 #define BITS_USB_SIE_INTF_ADDR_V1_8812F \ 1951 (BIT_MASK_USB_SIE_INTF_ADDR_V1_8812F \ 1952 << BIT_SHIFT_USB_SIE_INTF_ADDR_V1_8812F) 1953 #define BIT_CLEAR_USB_SIE_INTF_ADDR_V1_8812F(x) \ 1954 ((x) & (~BITS_USB_SIE_INTF_ADDR_V1_8812F)) 1955 #define BIT_GET_USB_SIE_INTF_ADDR_V1_8812F(x) \ 1956 (((x) >> BIT_SHIFT_USB_SIE_INTF_ADDR_V1_8812F) & \ 1957 BIT_MASK_USB_SIE_INTF_ADDR_V1_8812F) 1958 #define BIT_SET_USB_SIE_INTF_ADDR_V1_8812F(x, v) \ 1959 (BIT_CLEAR_USB_SIE_INTF_ADDR_V1_8812F(x) | \ 1960 BIT_USB_SIE_INTF_ADDR_V1_8812F(v)) 1961 1962 #define BIT_SHIFT_USB_SIE_INTF_RD_8812F 8 1963 #define BIT_MASK_USB_SIE_INTF_RD_8812F 0xff 1964 #define BIT_USB_SIE_INTF_RD_8812F(x) \ 1965 (((x) & BIT_MASK_USB_SIE_INTF_RD_8812F) \ 1966 << BIT_SHIFT_USB_SIE_INTF_RD_8812F) 1967 #define BITS_USB_SIE_INTF_RD_8812F \ 1968 (BIT_MASK_USB_SIE_INTF_RD_8812F << BIT_SHIFT_USB_SIE_INTF_RD_8812F) 1969 #define BIT_CLEAR_USB_SIE_INTF_RD_8812F(x) ((x) & (~BITS_USB_SIE_INTF_RD_8812F)) 1970 #define BIT_GET_USB_SIE_INTF_RD_8812F(x) \ 1971 (((x) >> BIT_SHIFT_USB_SIE_INTF_RD_8812F) & \ 1972 BIT_MASK_USB_SIE_INTF_RD_8812F) 1973 #define BIT_SET_USB_SIE_INTF_RD_8812F(x, v) \ 1974 (BIT_CLEAR_USB_SIE_INTF_RD_8812F(x) | BIT_USB_SIE_INTF_RD_8812F(v)) 1975 1976 #define BIT_SHIFT_USB_SIE_INTF_WD_8812F 0 1977 #define BIT_MASK_USB_SIE_INTF_WD_8812F 0xff 1978 #define BIT_USB_SIE_INTF_WD_8812F(x) \ 1979 (((x) & BIT_MASK_USB_SIE_INTF_WD_8812F) \ 1980 << BIT_SHIFT_USB_SIE_INTF_WD_8812F) 1981 #define BITS_USB_SIE_INTF_WD_8812F \ 1982 (BIT_MASK_USB_SIE_INTF_WD_8812F << BIT_SHIFT_USB_SIE_INTF_WD_8812F) 1983 #define BIT_CLEAR_USB_SIE_INTF_WD_8812F(x) ((x) & (~BITS_USB_SIE_INTF_WD_8812F)) 1984 #define BIT_GET_USB_SIE_INTF_WD_8812F(x) \ 1985 (((x) >> BIT_SHIFT_USB_SIE_INTF_WD_8812F) & \ 1986 BIT_MASK_USB_SIE_INTF_WD_8812F) 1987 #define BIT_SET_USB_SIE_INTF_WD_8812F(x, v) \ 1988 (BIT_CLEAR_USB_SIE_INTF_WD_8812F(x) | BIT_USB_SIE_INTF_WD_8812F(v)) 1989 1990 /* 2 REG_PCIE_MIO_INTF_8812F */ 1991 1992 #define BIT_SHIFT_PCIE_MIO_ADDR_PAGE_8812F 16 1993 #define BIT_MASK_PCIE_MIO_ADDR_PAGE_8812F 0x3 1994 #define BIT_PCIE_MIO_ADDR_PAGE_8812F(x) \ 1995 (((x) & BIT_MASK_PCIE_MIO_ADDR_PAGE_8812F) \ 1996 << BIT_SHIFT_PCIE_MIO_ADDR_PAGE_8812F) 1997 #define BITS_PCIE_MIO_ADDR_PAGE_8812F \ 1998 (BIT_MASK_PCIE_MIO_ADDR_PAGE_8812F \ 1999 << BIT_SHIFT_PCIE_MIO_ADDR_PAGE_8812F) 2000 #define BIT_CLEAR_PCIE_MIO_ADDR_PAGE_8812F(x) \ 2001 ((x) & (~BITS_PCIE_MIO_ADDR_PAGE_8812F)) 2002 #define BIT_GET_PCIE_MIO_ADDR_PAGE_8812F(x) \ 2003 (((x) >> BIT_SHIFT_PCIE_MIO_ADDR_PAGE_8812F) & \ 2004 BIT_MASK_PCIE_MIO_ADDR_PAGE_8812F) 2005 #define BIT_SET_PCIE_MIO_ADDR_PAGE_8812F(x, v) \ 2006 (BIT_CLEAR_PCIE_MIO_ADDR_PAGE_8812F(x) | \ 2007 BIT_PCIE_MIO_ADDR_PAGE_8812F(v)) 2008 2009 #define BIT_PCIE_MIO_BYIOREG_8812F BIT(13) 2010 #define BIT_PCIE_MIO_RE_8812F BIT(12) 2011 2012 #define BIT_SHIFT_PCIE_MIO_WE_8812F 8 2013 #define BIT_MASK_PCIE_MIO_WE_8812F 0xf 2014 #define BIT_PCIE_MIO_WE_8812F(x) \ 2015 (((x) & BIT_MASK_PCIE_MIO_WE_8812F) << BIT_SHIFT_PCIE_MIO_WE_8812F) 2016 #define BITS_PCIE_MIO_WE_8812F \ 2017 (BIT_MASK_PCIE_MIO_WE_8812F << BIT_SHIFT_PCIE_MIO_WE_8812F) 2018 #define BIT_CLEAR_PCIE_MIO_WE_8812F(x) ((x) & (~BITS_PCIE_MIO_WE_8812F)) 2019 #define BIT_GET_PCIE_MIO_WE_8812F(x) \ 2020 (((x) >> BIT_SHIFT_PCIE_MIO_WE_8812F) & BIT_MASK_PCIE_MIO_WE_8812F) 2021 #define BIT_SET_PCIE_MIO_WE_8812F(x, v) \ 2022 (BIT_CLEAR_PCIE_MIO_WE_8812F(x) | BIT_PCIE_MIO_WE_8812F(v)) 2023 2024 #define BIT_SHIFT_PCIE_MIO_ADDR_8812F 0 2025 #define BIT_MASK_PCIE_MIO_ADDR_8812F 0xff 2026 #define BIT_PCIE_MIO_ADDR_8812F(x) \ 2027 (((x) & BIT_MASK_PCIE_MIO_ADDR_8812F) << BIT_SHIFT_PCIE_MIO_ADDR_8812F) 2028 #define BITS_PCIE_MIO_ADDR_8812F \ 2029 (BIT_MASK_PCIE_MIO_ADDR_8812F << BIT_SHIFT_PCIE_MIO_ADDR_8812F) 2030 #define BIT_CLEAR_PCIE_MIO_ADDR_8812F(x) ((x) & (~BITS_PCIE_MIO_ADDR_8812F)) 2031 #define BIT_GET_PCIE_MIO_ADDR_8812F(x) \ 2032 (((x) >> BIT_SHIFT_PCIE_MIO_ADDR_8812F) & BIT_MASK_PCIE_MIO_ADDR_8812F) 2033 #define BIT_SET_PCIE_MIO_ADDR_8812F(x, v) \ 2034 (BIT_CLEAR_PCIE_MIO_ADDR_8812F(x) | BIT_PCIE_MIO_ADDR_8812F(v)) 2035 2036 /* 2 REG_PCIE_MIO_INTD_8812F */ 2037 2038 #define BIT_SHIFT_PCIE_MIO_DATA_8812F 0 2039 #define BIT_MASK_PCIE_MIO_DATA_8812F 0xffffffffL 2040 #define BIT_PCIE_MIO_DATA_8812F(x) \ 2041 (((x) & BIT_MASK_PCIE_MIO_DATA_8812F) << BIT_SHIFT_PCIE_MIO_DATA_8812F) 2042 #define BITS_PCIE_MIO_DATA_8812F \ 2043 (BIT_MASK_PCIE_MIO_DATA_8812F << BIT_SHIFT_PCIE_MIO_DATA_8812F) 2044 #define BIT_CLEAR_PCIE_MIO_DATA_8812F(x) ((x) & (~BITS_PCIE_MIO_DATA_8812F)) 2045 #define BIT_GET_PCIE_MIO_DATA_8812F(x) \ 2046 (((x) >> BIT_SHIFT_PCIE_MIO_DATA_8812F) & BIT_MASK_PCIE_MIO_DATA_8812F) 2047 #define BIT_SET_PCIE_MIO_DATA_8812F(x, v) \ 2048 (BIT_CLEAR_PCIE_MIO_DATA_8812F(x) | BIT_PCIE_MIO_DATA_8812F(v)) 2049 2050 /* 2 REG_WLRF1_8812F */ 2051 2052 #define BIT_SHIFT_WLRF1_CTRL_8812F 24 2053 #define BIT_MASK_WLRF1_CTRL_8812F 0xff 2054 #define BIT_WLRF1_CTRL_8812F(x) \ 2055 (((x) & BIT_MASK_WLRF1_CTRL_8812F) << BIT_SHIFT_WLRF1_CTRL_8812F) 2056 #define BITS_WLRF1_CTRL_8812F \ 2057 (BIT_MASK_WLRF1_CTRL_8812F << BIT_SHIFT_WLRF1_CTRL_8812F) 2058 #define BIT_CLEAR_WLRF1_CTRL_8812F(x) ((x) & (~BITS_WLRF1_CTRL_8812F)) 2059 #define BIT_GET_WLRF1_CTRL_8812F(x) \ 2060 (((x) >> BIT_SHIFT_WLRF1_CTRL_8812F) & BIT_MASK_WLRF1_CTRL_8812F) 2061 #define BIT_SET_WLRF1_CTRL_8812F(x, v) \ 2062 (BIT_CLEAR_WLRF1_CTRL_8812F(x) | BIT_WLRF1_CTRL_8812F(v)) 2063 2064 /* 2 REG_SYS_CFG1_8812F */ 2065 2066 #define BIT_SHIFT_TRP_ICFG_8812F 28 2067 #define BIT_MASK_TRP_ICFG_8812F 0xf 2068 #define BIT_TRP_ICFG_8812F(x) \ 2069 (((x) & BIT_MASK_TRP_ICFG_8812F) << BIT_SHIFT_TRP_ICFG_8812F) 2070 #define BITS_TRP_ICFG_8812F \ 2071 (BIT_MASK_TRP_ICFG_8812F << BIT_SHIFT_TRP_ICFG_8812F) 2072 #define BIT_CLEAR_TRP_ICFG_8812F(x) ((x) & (~BITS_TRP_ICFG_8812F)) 2073 #define BIT_GET_TRP_ICFG_8812F(x) \ 2074 (((x) >> BIT_SHIFT_TRP_ICFG_8812F) & BIT_MASK_TRP_ICFG_8812F) 2075 #define BIT_SET_TRP_ICFG_8812F(x, v) \ 2076 (BIT_CLEAR_TRP_ICFG_8812F(x) | BIT_TRP_ICFG_8812F(v)) 2077 2078 #define BIT_RF_TYPE_ID_8812F BIT(27) 2079 #define BIT_BD_HCI_SEL_8812F BIT(26) 2080 #define BIT_BD_PKG_SEL_8812F BIT(25) 2081 #define BIT_INTERNAL_EXTERNAL_SWR_8812F BIT(24) 2082 #define BIT_RTL_ID_8812F BIT(23) 2083 #define BIT_PAD_HWPD_IDN_8812F BIT(22) 2084 #define BIT_TESTMODE_8812F BIT(20) 2085 2086 #define BIT_SHIFT_VENDOR_ID_8812F 16 2087 #define BIT_MASK_VENDOR_ID_8812F 0xf 2088 #define BIT_VENDOR_ID_8812F(x) \ 2089 (((x) & BIT_MASK_VENDOR_ID_8812F) << BIT_SHIFT_VENDOR_ID_8812F) 2090 #define BITS_VENDOR_ID_8812F \ 2091 (BIT_MASK_VENDOR_ID_8812F << BIT_SHIFT_VENDOR_ID_8812F) 2092 #define BIT_CLEAR_VENDOR_ID_8812F(x) ((x) & (~BITS_VENDOR_ID_8812F)) 2093 #define BIT_GET_VENDOR_ID_8812F(x) \ 2094 (((x) >> BIT_SHIFT_VENDOR_ID_8812F) & BIT_MASK_VENDOR_ID_8812F) 2095 #define BIT_SET_VENDOR_ID_8812F(x, v) \ 2096 (BIT_CLEAR_VENDOR_ID_8812F(x) | BIT_VENDOR_ID_8812F(v)) 2097 2098 #define BIT_SHIFT_CHIP_VER_8812F 12 2099 #define BIT_MASK_CHIP_VER_8812F 0xf 2100 #define BIT_CHIP_VER_8812F(x) \ 2101 (((x) & BIT_MASK_CHIP_VER_8812F) << BIT_SHIFT_CHIP_VER_8812F) 2102 #define BITS_CHIP_VER_8812F \ 2103 (BIT_MASK_CHIP_VER_8812F << BIT_SHIFT_CHIP_VER_8812F) 2104 #define BIT_CLEAR_CHIP_VER_8812F(x) ((x) & (~BITS_CHIP_VER_8812F)) 2105 #define BIT_GET_CHIP_VER_8812F(x) \ 2106 (((x) >> BIT_SHIFT_CHIP_VER_8812F) & BIT_MASK_CHIP_VER_8812F) 2107 #define BIT_SET_CHIP_VER_8812F(x, v) \ 2108 (BIT_CLEAR_CHIP_VER_8812F(x) | BIT_CHIP_VER_8812F(v)) 2109 2110 #define BIT_BD_MAC3_8812F BIT(11) 2111 #define BIT_BD_MAC1_8812F BIT(10) 2112 #define BIT_BD_MAC2_8812F BIT(9) 2113 #define BIT_SIC_IDLE_8812F BIT(8) 2114 #define BIT_SW_OFFLOAD_EN_8812F BIT(7) 2115 #define BIT_OCP_SHUTDN_8812F BIT(6) 2116 #define BIT_V15_VLD_8812F BIT(5) 2117 #define BIT_PCIRSTB_8812F BIT(4) 2118 #define BIT_PCLK_VLD_8812F BIT(3) 2119 #define BIT_UCLK_VLD_8812F BIT(2) 2120 #define BIT_ACLK_VLD_8812F BIT(1) 2121 #define BIT_XCLK_VLD_8812F BIT(0) 2122 2123 /* 2 REG_SYS_STATUS1_8812F */ 2124 2125 #define BIT_SHIFT_RF_RL_ID_8812F 28 2126 #define BIT_MASK_RF_RL_ID_8812F 0xf 2127 #define BIT_RF_RL_ID_8812F(x) \ 2128 (((x) & BIT_MASK_RF_RL_ID_8812F) << BIT_SHIFT_RF_RL_ID_8812F) 2129 #define BITS_RF_RL_ID_8812F \ 2130 (BIT_MASK_RF_RL_ID_8812F << BIT_SHIFT_RF_RL_ID_8812F) 2131 #define BIT_CLEAR_RF_RL_ID_8812F(x) ((x) & (~BITS_RF_RL_ID_8812F)) 2132 #define BIT_GET_RF_RL_ID_8812F(x) \ 2133 (((x) >> BIT_SHIFT_RF_RL_ID_8812F) & BIT_MASK_RF_RL_ID_8812F) 2134 #define BIT_SET_RF_RL_ID_8812F(x, v) \ 2135 (BIT_CLEAR_RF_RL_ID_8812F(x) | BIT_RF_RL_ID_8812F(v)) 2136 2137 #define BIT_HPHY_ICFG_8812F BIT(19) 2138 2139 #define BIT_SHIFT_SEL_0XC0_8812F 16 2140 #define BIT_MASK_SEL_0XC0_8812F 0x3 2141 #define BIT_SEL_0XC0_8812F(x) \ 2142 (((x) & BIT_MASK_SEL_0XC0_8812F) << BIT_SHIFT_SEL_0XC0_8812F) 2143 #define BITS_SEL_0XC0_8812F \ 2144 (BIT_MASK_SEL_0XC0_8812F << BIT_SHIFT_SEL_0XC0_8812F) 2145 #define BIT_CLEAR_SEL_0XC0_8812F(x) ((x) & (~BITS_SEL_0XC0_8812F)) 2146 #define BIT_GET_SEL_0XC0_8812F(x) \ 2147 (((x) >> BIT_SHIFT_SEL_0XC0_8812F) & BIT_MASK_SEL_0XC0_8812F) 2148 #define BIT_SET_SEL_0XC0_8812F(x, v) \ 2149 (BIT_CLEAR_SEL_0XC0_8812F(x) | BIT_SEL_0XC0_8812F(v)) 2150 2151 #define BIT_SHIFT_HCI_SEL_V4_8812F 12 2152 #define BIT_MASK_HCI_SEL_V4_8812F 0x3 2153 #define BIT_HCI_SEL_V4_8812F(x) \ 2154 (((x) & BIT_MASK_HCI_SEL_V4_8812F) << BIT_SHIFT_HCI_SEL_V4_8812F) 2155 #define BITS_HCI_SEL_V4_8812F \ 2156 (BIT_MASK_HCI_SEL_V4_8812F << BIT_SHIFT_HCI_SEL_V4_8812F) 2157 #define BIT_CLEAR_HCI_SEL_V4_8812F(x) ((x) & (~BITS_HCI_SEL_V4_8812F)) 2158 #define BIT_GET_HCI_SEL_V4_8812F(x) \ 2159 (((x) >> BIT_SHIFT_HCI_SEL_V4_8812F) & BIT_MASK_HCI_SEL_V4_8812F) 2160 #define BIT_SET_HCI_SEL_V4_8812F(x, v) \ 2161 (BIT_CLEAR_HCI_SEL_V4_8812F(x) | BIT_HCI_SEL_V4_8812F(v)) 2162 2163 #define BIT_USB_OPERATION_MODE_8812F BIT(10) 2164 #define BIT_BT_PDN_8812F BIT(9) 2165 #define BIT_AUTO_WLPON_8812F BIT(8) 2166 #define BIT_WL_MODE_8812F BIT(7) 2167 #define BIT_PKG_SEL_HCI_8812F BIT(6) 2168 2169 #define BIT_SHIFT_PAD_HCI_SEL_V2_8812F 3 2170 #define BIT_MASK_PAD_HCI_SEL_V2_8812F 0x3 2171 #define BIT_PAD_HCI_SEL_V2_8812F(x) \ 2172 (((x) & BIT_MASK_PAD_HCI_SEL_V2_8812F) \ 2173 << BIT_SHIFT_PAD_HCI_SEL_V2_8812F) 2174 #define BITS_PAD_HCI_SEL_V2_8812F \ 2175 (BIT_MASK_PAD_HCI_SEL_V2_8812F << BIT_SHIFT_PAD_HCI_SEL_V2_8812F) 2176 #define BIT_CLEAR_PAD_HCI_SEL_V2_8812F(x) ((x) & (~BITS_PAD_HCI_SEL_V2_8812F)) 2177 #define BIT_GET_PAD_HCI_SEL_V2_8812F(x) \ 2178 (((x) >> BIT_SHIFT_PAD_HCI_SEL_V2_8812F) & \ 2179 BIT_MASK_PAD_HCI_SEL_V2_8812F) 2180 #define BIT_SET_PAD_HCI_SEL_V2_8812F(x, v) \ 2181 (BIT_CLEAR_PAD_HCI_SEL_V2_8812F(x) | BIT_PAD_HCI_SEL_V2_8812F(v)) 2182 2183 #define BIT_SHIFT_EFS_HCI_SEL_V1_8812F 0 2184 #define BIT_MASK_EFS_HCI_SEL_V1_8812F 0x7 2185 #define BIT_EFS_HCI_SEL_V1_8812F(x) \ 2186 (((x) & BIT_MASK_EFS_HCI_SEL_V1_8812F) \ 2187 << BIT_SHIFT_EFS_HCI_SEL_V1_8812F) 2188 #define BITS_EFS_HCI_SEL_V1_8812F \ 2189 (BIT_MASK_EFS_HCI_SEL_V1_8812F << BIT_SHIFT_EFS_HCI_SEL_V1_8812F) 2190 #define BIT_CLEAR_EFS_HCI_SEL_V1_8812F(x) ((x) & (~BITS_EFS_HCI_SEL_V1_8812F)) 2191 #define BIT_GET_EFS_HCI_SEL_V1_8812F(x) \ 2192 (((x) >> BIT_SHIFT_EFS_HCI_SEL_V1_8812F) & \ 2193 BIT_MASK_EFS_HCI_SEL_V1_8812F) 2194 #define BIT_SET_EFS_HCI_SEL_V1_8812F(x, v) \ 2195 (BIT_CLEAR_EFS_HCI_SEL_V1_8812F(x) | BIT_EFS_HCI_SEL_V1_8812F(v)) 2196 2197 /* 2 REG_SYS_STATUS2_8812F */ 2198 #define BIT_HIOE_ON_TIMEOUT_8812F BIT(23) 2199 #define BIT_SIC_ON_TIMEOUT_8812F BIT(22) 2200 #define BIT_CPU_ON_TIMEOUT_8812F BIT(21) 2201 #define BIT_HCI_ON_TIMEOUT_8812F BIT(20) 2202 #define BIT_SIO_ALDN_8812F BIT(19) 2203 #define BIT_USB_ALDN_8812F BIT(18) 2204 #define BIT_PCI_ALDN_8812F BIT(17) 2205 #define BIT_SYS_ALDN_8812F BIT(16) 2206 2207 #define BIT_SHIFT_EPVID1_8812F 8 2208 #define BIT_MASK_EPVID1_8812F 0xff 2209 #define BIT_EPVID1_8812F(x) \ 2210 (((x) & BIT_MASK_EPVID1_8812F) << BIT_SHIFT_EPVID1_8812F) 2211 #define BITS_EPVID1_8812F (BIT_MASK_EPVID1_8812F << BIT_SHIFT_EPVID1_8812F) 2212 #define BIT_CLEAR_EPVID1_8812F(x) ((x) & (~BITS_EPVID1_8812F)) 2213 #define BIT_GET_EPVID1_8812F(x) \ 2214 (((x) >> BIT_SHIFT_EPVID1_8812F) & BIT_MASK_EPVID1_8812F) 2215 #define BIT_SET_EPVID1_8812F(x, v) \ 2216 (BIT_CLEAR_EPVID1_8812F(x) | BIT_EPVID1_8812F(v)) 2217 2218 #define BIT_SHIFT_EPVID0_8812F 0 2219 #define BIT_MASK_EPVID0_8812F 0xff 2220 #define BIT_EPVID0_8812F(x) \ 2221 (((x) & BIT_MASK_EPVID0_8812F) << BIT_SHIFT_EPVID0_8812F) 2222 #define BITS_EPVID0_8812F (BIT_MASK_EPVID0_8812F << BIT_SHIFT_EPVID0_8812F) 2223 #define BIT_CLEAR_EPVID0_8812F(x) ((x) & (~BITS_EPVID0_8812F)) 2224 #define BIT_GET_EPVID0_8812F(x) \ 2225 (((x) >> BIT_SHIFT_EPVID0_8812F) & BIT_MASK_EPVID0_8812F) 2226 #define BIT_SET_EPVID0_8812F(x, v) \ 2227 (BIT_CLEAR_EPVID0_8812F(x) | BIT_EPVID0_8812F(v)) 2228 2229 /* 2 REG_SYS_CFG2_8812F */ 2230 #define BIT_HCI_SEL_EMBEDDED_8812F BIT(8) 2231 2232 #define BIT_SHIFT_HW_ID_8812F 0 2233 #define BIT_MASK_HW_ID_8812F 0xff 2234 #define BIT_HW_ID_8812F(x) \ 2235 (((x) & BIT_MASK_HW_ID_8812F) << BIT_SHIFT_HW_ID_8812F) 2236 #define BITS_HW_ID_8812F (BIT_MASK_HW_ID_8812F << BIT_SHIFT_HW_ID_8812F) 2237 #define BIT_CLEAR_HW_ID_8812F(x) ((x) & (~BITS_HW_ID_8812F)) 2238 #define BIT_GET_HW_ID_8812F(x) \ 2239 (((x) >> BIT_SHIFT_HW_ID_8812F) & BIT_MASK_HW_ID_8812F) 2240 #define BIT_SET_HW_ID_8812F(x, v) \ 2241 (BIT_CLEAR_HW_ID_8812F(x) | BIT_HW_ID_8812F(v)) 2242 2243 /* 2 REG_SYS_CFG3_8812F */ 2244 2245 /* 2 REG_NOT_VALID_8812F */ 2246 2247 /* 2 REG_NOT_VALID_8812F */ 2248 2249 /* 2 REG_NOT_VALID_8812F */ 2250 2251 /* 2 REG_ANAPARSW_MAC_0_8812F */ 2252 #define BIT_OCP_L_8812F BIT(31) 2253 #define BIT_POWOCP_L_8812F BIT(30) 2254 2255 #define BIT_SHIFT_CF_L_V2_8812F 28 2256 #define BIT_MASK_CF_L_V2_8812F 0x3 2257 #define BIT_CF_L_V2_8812F(x) \ 2258 (((x) & BIT_MASK_CF_L_V2_8812F) << BIT_SHIFT_CF_L_V2_8812F) 2259 #define BITS_CF_L_V2_8812F (BIT_MASK_CF_L_V2_8812F << BIT_SHIFT_CF_L_V2_8812F) 2260 #define BIT_CLEAR_CF_L_V2_8812F(x) ((x) & (~BITS_CF_L_V2_8812F)) 2261 #define BIT_GET_CF_L_V2_8812F(x) \ 2262 (((x) >> BIT_SHIFT_CF_L_V2_8812F) & BIT_MASK_CF_L_V2_8812F) 2263 #define BIT_SET_CF_L_V2_8812F(x, v) \ 2264 (BIT_CLEAR_CF_L_V2_8812F(x) | BIT_CF_L_V2_8812F(v)) 2265 2266 #define BIT_SHIFT_CFC_L_V2_8812F 26 2267 #define BIT_MASK_CFC_L_V2_8812F 0x3 2268 #define BIT_CFC_L_V2_8812F(x) \ 2269 (((x) & BIT_MASK_CFC_L_V2_8812F) << BIT_SHIFT_CFC_L_V2_8812F) 2270 #define BITS_CFC_L_V2_8812F \ 2271 (BIT_MASK_CFC_L_V2_8812F << BIT_SHIFT_CFC_L_V2_8812F) 2272 #define BIT_CLEAR_CFC_L_V2_8812F(x) ((x) & (~BITS_CFC_L_V2_8812F)) 2273 #define BIT_GET_CFC_L_V2_8812F(x) \ 2274 (((x) >> BIT_SHIFT_CFC_L_V2_8812F) & BIT_MASK_CFC_L_V2_8812F) 2275 #define BIT_SET_CFC_L_V2_8812F(x, v) \ 2276 (BIT_CLEAR_CFC_L_V2_8812F(x) | BIT_CFC_L_V2_8812F(v)) 2277 2278 #define BIT_SHIFT_R3_L_V2_8812F 24 2279 #define BIT_MASK_R3_L_V2_8812F 0x3 2280 #define BIT_R3_L_V2_8812F(x) \ 2281 (((x) & BIT_MASK_R3_L_V2_8812F) << BIT_SHIFT_R3_L_V2_8812F) 2282 #define BITS_R3_L_V2_8812F (BIT_MASK_R3_L_V2_8812F << BIT_SHIFT_R3_L_V2_8812F) 2283 #define BIT_CLEAR_R3_L_V2_8812F(x) ((x) & (~BITS_R3_L_V2_8812F)) 2284 #define BIT_GET_R3_L_V2_8812F(x) \ 2285 (((x) >> BIT_SHIFT_R3_L_V2_8812F) & BIT_MASK_R3_L_V2_8812F) 2286 #define BIT_SET_R3_L_V2_8812F(x, v) \ 2287 (BIT_CLEAR_R3_L_V2_8812F(x) | BIT_R3_L_V2_8812F(v)) 2288 2289 #define BIT_SHIFT_R2_L_8812F 22 2290 #define BIT_MASK_R2_L_8812F 0x3 2291 #define BIT_R2_L_8812F(x) (((x) & BIT_MASK_R2_L_8812F) << BIT_SHIFT_R2_L_8812F) 2292 #define BITS_R2_L_8812F (BIT_MASK_R2_L_8812F << BIT_SHIFT_R2_L_8812F) 2293 #define BIT_CLEAR_R2_L_8812F(x) ((x) & (~BITS_R2_L_8812F)) 2294 #define BIT_GET_R2_L_8812F(x) \ 2295 (((x) >> BIT_SHIFT_R2_L_8812F) & BIT_MASK_R2_L_8812F) 2296 #define BIT_SET_R2_L_8812F(x, v) (BIT_CLEAR_R2_L_8812F(x) | BIT_R2_L_8812F(v)) 2297 2298 #define BIT_SHIFT_R1_L_8812F 20 2299 #define BIT_MASK_R1_L_8812F 0x3 2300 #define BIT_R1_L_8812F(x) (((x) & BIT_MASK_R1_L_8812F) << BIT_SHIFT_R1_L_8812F) 2301 #define BITS_R1_L_8812F (BIT_MASK_R1_L_8812F << BIT_SHIFT_R1_L_8812F) 2302 #define BIT_CLEAR_R1_L_8812F(x) ((x) & (~BITS_R1_L_8812F)) 2303 #define BIT_GET_R1_L_8812F(x) \ 2304 (((x) >> BIT_SHIFT_R1_L_8812F) & BIT_MASK_R1_L_8812F) 2305 #define BIT_SET_R1_L_8812F(x, v) (BIT_CLEAR_R1_L_8812F(x) | BIT_R1_L_8812F(v)) 2306 2307 #define BIT_SHIFT_C3_L_8812F 18 2308 #define BIT_MASK_C3_L_8812F 0x3 2309 #define BIT_C3_L_8812F(x) (((x) & BIT_MASK_C3_L_8812F) << BIT_SHIFT_C3_L_8812F) 2310 #define BITS_C3_L_8812F (BIT_MASK_C3_L_8812F << BIT_SHIFT_C3_L_8812F) 2311 #define BIT_CLEAR_C3_L_8812F(x) ((x) & (~BITS_C3_L_8812F)) 2312 #define BIT_GET_C3_L_8812F(x) \ 2313 (((x) >> BIT_SHIFT_C3_L_8812F) & BIT_MASK_C3_L_8812F) 2314 #define BIT_SET_C3_L_8812F(x, v) (BIT_CLEAR_C3_L_8812F(x) | BIT_C3_L_8812F(v)) 2315 2316 #define BIT_SHIFT_C2_L_8812F 16 2317 #define BIT_MASK_C2_L_8812F 0x3 2318 #define BIT_C2_L_8812F(x) (((x) & BIT_MASK_C2_L_8812F) << BIT_SHIFT_C2_L_8812F) 2319 #define BITS_C2_L_8812F (BIT_MASK_C2_L_8812F << BIT_SHIFT_C2_L_8812F) 2320 #define BIT_CLEAR_C2_L_8812F(x) ((x) & (~BITS_C2_L_8812F)) 2321 #define BIT_GET_C2_L_8812F(x) \ 2322 (((x) >> BIT_SHIFT_C2_L_8812F) & BIT_MASK_C2_L_8812F) 2323 #define BIT_SET_C2_L_8812F(x, v) (BIT_CLEAR_C2_L_8812F(x) | BIT_C2_L_8812F(v)) 2324 2325 #define BIT_SHIFT_C1_L_V2_8812F 14 2326 #define BIT_MASK_C1_L_V2_8812F 0x3 2327 #define BIT_C1_L_V2_8812F(x) \ 2328 (((x) & BIT_MASK_C1_L_V2_8812F) << BIT_SHIFT_C1_L_V2_8812F) 2329 #define BITS_C1_L_V2_8812F (BIT_MASK_C1_L_V2_8812F << BIT_SHIFT_C1_L_V2_8812F) 2330 #define BIT_CLEAR_C1_L_V2_8812F(x) ((x) & (~BITS_C1_L_V2_8812F)) 2331 #define BIT_GET_C1_L_V2_8812F(x) \ 2332 (((x) >> BIT_SHIFT_C1_L_V2_8812F) & BIT_MASK_C1_L_V2_8812F) 2333 #define BIT_SET_C1_L_V2_8812F(x, v) \ 2334 (BIT_CLEAR_C1_L_V2_8812F(x) | BIT_C1_L_V2_8812F(v)) 2335 2336 #define BIT_REG_OCPS_L_V2_8812F BIT(13) 2337 #define BIT_REG_PWM_L_8812F BIT(12) 2338 2339 #define BIT_SHIFT_V15ADJ_L_8812F 9 2340 #define BIT_MASK_V15ADJ_L_8812F 0x7 2341 #define BIT_V15ADJ_L_8812F(x) \ 2342 (((x) & BIT_MASK_V15ADJ_L_8812F) << BIT_SHIFT_V15ADJ_L_8812F) 2343 #define BITS_V15ADJ_L_8812F \ 2344 (BIT_MASK_V15ADJ_L_8812F << BIT_SHIFT_V15ADJ_L_8812F) 2345 #define BIT_CLEAR_V15ADJ_L_8812F(x) ((x) & (~BITS_V15ADJ_L_8812F)) 2346 #define BIT_GET_V15ADJ_L_8812F(x) \ 2347 (((x) >> BIT_SHIFT_V15ADJ_L_8812F) & BIT_MASK_V15ADJ_L_8812F) 2348 #define BIT_SET_V15ADJ_L_8812F(x, v) \ 2349 (BIT_CLEAR_V15ADJ_L_8812F(x) | BIT_V15ADJ_L_8812F(v)) 2350 2351 #define BIT_SHIFT_IN_L_8812F 6 2352 #define BIT_MASK_IN_L_8812F 0x7 2353 #define BIT_IN_L_8812F(x) (((x) & BIT_MASK_IN_L_8812F) << BIT_SHIFT_IN_L_8812F) 2354 #define BITS_IN_L_8812F (BIT_MASK_IN_L_8812F << BIT_SHIFT_IN_L_8812F) 2355 #define BIT_CLEAR_IN_L_8812F(x) ((x) & (~BITS_IN_L_8812F)) 2356 #define BIT_GET_IN_L_8812F(x) \ 2357 (((x) >> BIT_SHIFT_IN_L_8812F) & BIT_MASK_IN_L_8812F) 2358 #define BIT_SET_IN_L_8812F(x, v) (BIT_CLEAR_IN_L_8812F(x) | BIT_IN_L_8812F(v)) 2359 2360 #define BIT_SHIFT_STD_L_8812F 4 2361 #define BIT_MASK_STD_L_8812F 0x3 2362 #define BIT_STD_L_8812F(x) \ 2363 (((x) & BIT_MASK_STD_L_8812F) << BIT_SHIFT_STD_L_8812F) 2364 #define BITS_STD_L_8812F (BIT_MASK_STD_L_8812F << BIT_SHIFT_STD_L_8812F) 2365 #define BIT_CLEAR_STD_L_8812F(x) ((x) & (~BITS_STD_L_8812F)) 2366 #define BIT_GET_STD_L_8812F(x) \ 2367 (((x) >> BIT_SHIFT_STD_L_8812F) & BIT_MASK_STD_L_8812F) 2368 #define BIT_SET_STD_L_8812F(x, v) \ 2369 (BIT_CLEAR_STD_L_8812F(x) | BIT_STD_L_8812F(v)) 2370 2371 #define BIT_SHIFT_VOL_L_8812F 0 2372 #define BIT_MASK_VOL_L_8812F 0xf 2373 #define BIT_VOL_L_8812F(x) \ 2374 (((x) & BIT_MASK_VOL_L_8812F) << BIT_SHIFT_VOL_L_8812F) 2375 #define BITS_VOL_L_8812F (BIT_MASK_VOL_L_8812F << BIT_SHIFT_VOL_L_8812F) 2376 #define BIT_CLEAR_VOL_L_8812F(x) ((x) & (~BITS_VOL_L_8812F)) 2377 #define BIT_GET_VOL_L_8812F(x) \ 2378 (((x) >> BIT_SHIFT_VOL_L_8812F) & BIT_MASK_VOL_L_8812F) 2379 #define BIT_SET_VOL_L_8812F(x, v) \ 2380 (BIT_CLEAR_VOL_L_8812F(x) | BIT_VOL_L_8812F(v)) 2381 2382 /* 2 REG_ANAPARSW_MAC_1_8812F */ 2383 2384 #define BIT_SHIFT_OCP_L_PFM_8812F 29 2385 #define BIT_MASK_OCP_L_PFM_8812F 0x7 2386 #define BIT_OCP_L_PFM_8812F(x) \ 2387 (((x) & BIT_MASK_OCP_L_PFM_8812F) << BIT_SHIFT_OCP_L_PFM_8812F) 2388 #define BITS_OCP_L_PFM_8812F \ 2389 (BIT_MASK_OCP_L_PFM_8812F << BIT_SHIFT_OCP_L_PFM_8812F) 2390 #define BIT_CLEAR_OCP_L_PFM_8812F(x) ((x) & (~BITS_OCP_L_PFM_8812F)) 2391 #define BIT_GET_OCP_L_PFM_8812F(x) \ 2392 (((x) >> BIT_SHIFT_OCP_L_PFM_8812F) & BIT_MASK_OCP_L_PFM_8812F) 2393 #define BIT_SET_OCP_L_PFM_8812F(x, v) \ 2394 (BIT_CLEAR_OCP_L_PFM_8812F(x) | BIT_OCP_L_PFM_8812F(v)) 2395 2396 #define BIT_SHIFT_CFC_L_PFM_8812F 27 2397 #define BIT_MASK_CFC_L_PFM_8812F 0x3 2398 #define BIT_CFC_L_PFM_8812F(x) \ 2399 (((x) & BIT_MASK_CFC_L_PFM_8812F) << BIT_SHIFT_CFC_L_PFM_8812F) 2400 #define BITS_CFC_L_PFM_8812F \ 2401 (BIT_MASK_CFC_L_PFM_8812F << BIT_SHIFT_CFC_L_PFM_8812F) 2402 #define BIT_CLEAR_CFC_L_PFM_8812F(x) ((x) & (~BITS_CFC_L_PFM_8812F)) 2403 #define BIT_GET_CFC_L_PFM_8812F(x) \ 2404 (((x) >> BIT_SHIFT_CFC_L_PFM_8812F) & BIT_MASK_CFC_L_PFM_8812F) 2405 #define BIT_SET_CFC_L_PFM_8812F(x, v) \ 2406 (BIT_CLEAR_CFC_L_PFM_8812F(x) | BIT_CFC_L_PFM_8812F(v)) 2407 2408 /* 2 REG_NOT_VALID_8812F */ 2409 2410 #define BIT_SHIFT_REG_FREQ_L_V1_8812F 20 2411 #define BIT_MASK_REG_FREQ_L_V1_8812F 0x7 2412 #define BIT_REG_FREQ_L_V1_8812F(x) \ 2413 (((x) & BIT_MASK_REG_FREQ_L_V1_8812F) << BIT_SHIFT_REG_FREQ_L_V1_8812F) 2414 #define BITS_REG_FREQ_L_V1_8812F \ 2415 (BIT_MASK_REG_FREQ_L_V1_8812F << BIT_SHIFT_REG_FREQ_L_V1_8812F) 2416 #define BIT_CLEAR_REG_FREQ_L_V1_8812F(x) ((x) & (~BITS_REG_FREQ_L_V1_8812F)) 2417 #define BIT_GET_REG_FREQ_L_V1_8812F(x) \ 2418 (((x) >> BIT_SHIFT_REG_FREQ_L_V1_8812F) & BIT_MASK_REG_FREQ_L_V1_8812F) 2419 #define BIT_SET_REG_FREQ_L_V1_8812F(x, v) \ 2420 (BIT_CLEAR_REG_FREQ_L_V1_8812F(x) | BIT_REG_FREQ_L_V1_8812F(v)) 2421 2422 #define BIT_EN_DUTY_8812F BIT(19) 2423 2424 #define BIT_SHIFT_REG_MODE_V2_8812F 17 2425 #define BIT_MASK_REG_MODE_V2_8812F 0x3 2426 #define BIT_REG_MODE_V2_8812F(x) \ 2427 (((x) & BIT_MASK_REG_MODE_V2_8812F) << BIT_SHIFT_REG_MODE_V2_8812F) 2428 #define BITS_REG_MODE_V2_8812F \ 2429 (BIT_MASK_REG_MODE_V2_8812F << BIT_SHIFT_REG_MODE_V2_8812F) 2430 #define BIT_CLEAR_REG_MODE_V2_8812F(x) ((x) & (~BITS_REG_MODE_V2_8812F)) 2431 #define BIT_GET_REG_MODE_V2_8812F(x) \ 2432 (((x) >> BIT_SHIFT_REG_MODE_V2_8812F) & BIT_MASK_REG_MODE_V2_8812F) 2433 #define BIT_SET_REG_MODE_V2_8812F(x, v) \ 2434 (BIT_CLEAR_REG_MODE_V2_8812F(x) | BIT_REG_MODE_V2_8812F(v)) 2435 2436 #define BIT_EN_SP_8812F BIT(16) 2437 #define BIT_REG_AUTO_L_V2_8812F BIT(15) 2438 #define BIT_REG_LDOF_L_V2_8812F BIT(14) 2439 #define BIT_REG_TYPE_L_V2_8812F BIT(13) 2440 #define BIT_VO15_V1P05_H_8812F BIT(12) 2441 #define BIT_ARENB_L_V2_8812F BIT(11) 2442 2443 #define BIT_SHIFT_TBOX_L1_V2_8812F 9 2444 #define BIT_MASK_TBOX_L1_V2_8812F 0x3 2445 #define BIT_TBOX_L1_V2_8812F(x) \ 2446 (((x) & BIT_MASK_TBOX_L1_V2_8812F) << BIT_SHIFT_TBOX_L1_V2_8812F) 2447 #define BITS_TBOX_L1_V2_8812F \ 2448 (BIT_MASK_TBOX_L1_V2_8812F << BIT_SHIFT_TBOX_L1_V2_8812F) 2449 #define BIT_CLEAR_TBOX_L1_V2_8812F(x) ((x) & (~BITS_TBOX_L1_V2_8812F)) 2450 #define BIT_GET_TBOX_L1_V2_8812F(x) \ 2451 (((x) >> BIT_SHIFT_TBOX_L1_V2_8812F) & BIT_MASK_TBOX_L1_V2_8812F) 2452 #define BIT_SET_TBOX_L1_V2_8812F(x, v) \ 2453 (BIT_CLEAR_TBOX_L1_V2_8812F(x) | BIT_TBOX_L1_V2_8812F(v)) 2454 2455 #define BIT_SHIFT_REG_DELAY_L_8812F 7 2456 #define BIT_MASK_REG_DELAY_L_8812F 0x3 2457 #define BIT_REG_DELAY_L_8812F(x) \ 2458 (((x) & BIT_MASK_REG_DELAY_L_8812F) << BIT_SHIFT_REG_DELAY_L_8812F) 2459 #define BITS_REG_DELAY_L_8812F \ 2460 (BIT_MASK_REG_DELAY_L_8812F << BIT_SHIFT_REG_DELAY_L_8812F) 2461 #define BIT_CLEAR_REG_DELAY_L_8812F(x) ((x) & (~BITS_REG_DELAY_L_8812F)) 2462 #define BIT_GET_REG_DELAY_L_8812F(x) \ 2463 (((x) >> BIT_SHIFT_REG_DELAY_L_8812F) & BIT_MASK_REG_DELAY_L_8812F) 2464 #define BIT_SET_REG_DELAY_L_8812F(x, v) \ 2465 (BIT_CLEAR_REG_DELAY_L_8812F(x) | BIT_REG_DELAY_L_8812F(v)) 2466 2467 #define BIT_REG_CLAMP_D_L_8812F BIT(6) 2468 #define BIT_REG_BYPASS_L_V2_8812F BIT(5) 2469 #define BIT_REG_AUTOZCD_L_8812F BIT(4) 2470 #define BIT_POW_ZCD_L_V2_8812F BIT(3) 2471 #define BIT_REG_HALF_L_8812F BIT(2) 2472 2473 #define BIT_SHIFT_OCP_L_V2_8812F 0 2474 #define BIT_MASK_OCP_L_V2_8812F 0x3 2475 #define BIT_OCP_L_V2_8812F(x) \ 2476 (((x) & BIT_MASK_OCP_L_V2_8812F) << BIT_SHIFT_OCP_L_V2_8812F) 2477 #define BITS_OCP_L_V2_8812F \ 2478 (BIT_MASK_OCP_L_V2_8812F << BIT_SHIFT_OCP_L_V2_8812F) 2479 #define BIT_CLEAR_OCP_L_V2_8812F(x) ((x) & (~BITS_OCP_L_V2_8812F)) 2480 #define BIT_GET_OCP_L_V2_8812F(x) \ 2481 (((x) >> BIT_SHIFT_OCP_L_V2_8812F) & BIT_MASK_OCP_L_V2_8812F) 2482 #define BIT_SET_OCP_L_V2_8812F(x, v) \ 2483 (BIT_CLEAR_OCP_L_V2_8812F(x) | BIT_OCP_L_V2_8812F(v)) 2484 2485 /* 2 REG_ANAPAR_MAC_0_8812F */ 2486 2487 #define BIT_SHIFT_REG_LPF_R3_8812F 29 2488 #define BIT_MASK_REG_LPF_R3_8812F 0x7 2489 #define BIT_REG_LPF_R3_8812F(x) \ 2490 (((x) & BIT_MASK_REG_LPF_R3_8812F) << BIT_SHIFT_REG_LPF_R3_8812F) 2491 #define BITS_REG_LPF_R3_8812F \ 2492 (BIT_MASK_REG_LPF_R3_8812F << BIT_SHIFT_REG_LPF_R3_8812F) 2493 #define BIT_CLEAR_REG_LPF_R3_8812F(x) ((x) & (~BITS_REG_LPF_R3_8812F)) 2494 #define BIT_GET_REG_LPF_R3_8812F(x) \ 2495 (((x) >> BIT_SHIFT_REG_LPF_R3_8812F) & BIT_MASK_REG_LPF_R3_8812F) 2496 #define BIT_SET_REG_LPF_R3_8812F(x, v) \ 2497 (BIT_CLEAR_REG_LPF_R3_8812F(x) | BIT_REG_LPF_R3_8812F(v)) 2498 2499 #define BIT_SHIFT_REG_LPF_R2_8812F 24 2500 #define BIT_MASK_REG_LPF_R2_8812F 0x1f 2501 #define BIT_REG_LPF_R2_8812F(x) \ 2502 (((x) & BIT_MASK_REG_LPF_R2_8812F) << BIT_SHIFT_REG_LPF_R2_8812F) 2503 #define BITS_REG_LPF_R2_8812F \ 2504 (BIT_MASK_REG_LPF_R2_8812F << BIT_SHIFT_REG_LPF_R2_8812F) 2505 #define BIT_CLEAR_REG_LPF_R2_8812F(x) ((x) & (~BITS_REG_LPF_R2_8812F)) 2506 #define BIT_GET_REG_LPF_R2_8812F(x) \ 2507 (((x) >> BIT_SHIFT_REG_LPF_R2_8812F) & BIT_MASK_REG_LPF_R2_8812F) 2508 #define BIT_SET_REG_LPF_R2_8812F(x, v) \ 2509 (BIT_CLEAR_REG_LPF_R2_8812F(x) | BIT_REG_LPF_R2_8812F(v)) 2510 2511 #define BIT_SHIFT_REG_LPF_C3_8812F 21 2512 #define BIT_MASK_REG_LPF_C3_8812F 0x7 2513 #define BIT_REG_LPF_C3_8812F(x) \ 2514 (((x) & BIT_MASK_REG_LPF_C3_8812F) << BIT_SHIFT_REG_LPF_C3_8812F) 2515 #define BITS_REG_LPF_C3_8812F \ 2516 (BIT_MASK_REG_LPF_C3_8812F << BIT_SHIFT_REG_LPF_C3_8812F) 2517 #define BIT_CLEAR_REG_LPF_C3_8812F(x) ((x) & (~BITS_REG_LPF_C3_8812F)) 2518 #define BIT_GET_REG_LPF_C3_8812F(x) \ 2519 (((x) >> BIT_SHIFT_REG_LPF_C3_8812F) & BIT_MASK_REG_LPF_C3_8812F) 2520 #define BIT_SET_REG_LPF_C3_8812F(x, v) \ 2521 (BIT_CLEAR_REG_LPF_C3_8812F(x) | BIT_REG_LPF_C3_8812F(v)) 2522 2523 #define BIT_SHIFT_REG_LPF_C2_8812F 18 2524 #define BIT_MASK_REG_LPF_C2_8812F 0x7 2525 #define BIT_REG_LPF_C2_8812F(x) \ 2526 (((x) & BIT_MASK_REG_LPF_C2_8812F) << BIT_SHIFT_REG_LPF_C2_8812F) 2527 #define BITS_REG_LPF_C2_8812F \ 2528 (BIT_MASK_REG_LPF_C2_8812F << BIT_SHIFT_REG_LPF_C2_8812F) 2529 #define BIT_CLEAR_REG_LPF_C2_8812F(x) ((x) & (~BITS_REG_LPF_C2_8812F)) 2530 #define BIT_GET_REG_LPF_C2_8812F(x) \ 2531 (((x) >> BIT_SHIFT_REG_LPF_C2_8812F) & BIT_MASK_REG_LPF_C2_8812F) 2532 #define BIT_SET_REG_LPF_C2_8812F(x, v) \ 2533 (BIT_CLEAR_REG_LPF_C2_8812F(x) | BIT_REG_LPF_C2_8812F(v)) 2534 2535 #define BIT_SHIFT_REG_LPF_C1_8812F 15 2536 #define BIT_MASK_REG_LPF_C1_8812F 0x7 2537 #define BIT_REG_LPF_C1_8812F(x) \ 2538 (((x) & BIT_MASK_REG_LPF_C1_8812F) << BIT_SHIFT_REG_LPF_C1_8812F) 2539 #define BITS_REG_LPF_C1_8812F \ 2540 (BIT_MASK_REG_LPF_C1_8812F << BIT_SHIFT_REG_LPF_C1_8812F) 2541 #define BIT_CLEAR_REG_LPF_C1_8812F(x) ((x) & (~BITS_REG_LPF_C1_8812F)) 2542 #define BIT_GET_REG_LPF_C1_8812F(x) \ 2543 (((x) >> BIT_SHIFT_REG_LPF_C1_8812F) & BIT_MASK_REG_LPF_C1_8812F) 2544 #define BIT_SET_REG_LPF_C1_8812F(x, v) \ 2545 (BIT_CLEAR_REG_LPF_C1_8812F(x) | BIT_REG_LPF_C1_8812F(v)) 2546 2547 #define BIT_SHIFT_REG_LDO_SEL_V1_8812F 13 2548 #define BIT_MASK_REG_LDO_SEL_V1_8812F 0x3 2549 #define BIT_REG_LDO_SEL_V1_8812F(x) \ 2550 (((x) & BIT_MASK_REG_LDO_SEL_V1_8812F) \ 2551 << BIT_SHIFT_REG_LDO_SEL_V1_8812F) 2552 #define BITS_REG_LDO_SEL_V1_8812F \ 2553 (BIT_MASK_REG_LDO_SEL_V1_8812F << BIT_SHIFT_REG_LDO_SEL_V1_8812F) 2554 #define BIT_CLEAR_REG_LDO_SEL_V1_8812F(x) ((x) & (~BITS_REG_LDO_SEL_V1_8812F)) 2555 #define BIT_GET_REG_LDO_SEL_V1_8812F(x) \ 2556 (((x) >> BIT_SHIFT_REG_LDO_SEL_V1_8812F) & \ 2557 BIT_MASK_REG_LDO_SEL_V1_8812F) 2558 #define BIT_SET_REG_LDO_SEL_V1_8812F(x, v) \ 2559 (BIT_CLEAR_REG_LDO_SEL_V1_8812F(x) | BIT_REG_LDO_SEL_V1_8812F(v)) 2560 2561 #define BIT_REG_CP_ICPX2_8812F BIT(12) 2562 2563 #define BIT_SHIFT_REG_CP_ICP_SEL_FAST_8812F 9 2564 #define BIT_MASK_REG_CP_ICP_SEL_FAST_8812F 0x7 2565 #define BIT_REG_CP_ICP_SEL_FAST_8812F(x) \ 2566 (((x) & BIT_MASK_REG_CP_ICP_SEL_FAST_8812F) \ 2567 << BIT_SHIFT_REG_CP_ICP_SEL_FAST_8812F) 2568 #define BITS_REG_CP_ICP_SEL_FAST_8812F \ 2569 (BIT_MASK_REG_CP_ICP_SEL_FAST_8812F \ 2570 << BIT_SHIFT_REG_CP_ICP_SEL_FAST_8812F) 2571 #define BIT_CLEAR_REG_CP_ICP_SEL_FAST_8812F(x) \ 2572 ((x) & (~BITS_REG_CP_ICP_SEL_FAST_8812F)) 2573 #define BIT_GET_REG_CP_ICP_SEL_FAST_8812F(x) \ 2574 (((x) >> BIT_SHIFT_REG_CP_ICP_SEL_FAST_8812F) & \ 2575 BIT_MASK_REG_CP_ICP_SEL_FAST_8812F) 2576 #define BIT_SET_REG_CP_ICP_SEL_FAST_8812F(x, v) \ 2577 (BIT_CLEAR_REG_CP_ICP_SEL_FAST_8812F(x) | \ 2578 BIT_REG_CP_ICP_SEL_FAST_8812F(v)) 2579 2580 #define BIT_SHIFT_REG_CP_ICP_SEL_8812F 6 2581 #define BIT_MASK_REG_CP_ICP_SEL_8812F 0x7 2582 #define BIT_REG_CP_ICP_SEL_8812F(x) \ 2583 (((x) & BIT_MASK_REG_CP_ICP_SEL_8812F) \ 2584 << BIT_SHIFT_REG_CP_ICP_SEL_8812F) 2585 #define BITS_REG_CP_ICP_SEL_8812F \ 2586 (BIT_MASK_REG_CP_ICP_SEL_8812F << BIT_SHIFT_REG_CP_ICP_SEL_8812F) 2587 #define BIT_CLEAR_REG_CP_ICP_SEL_8812F(x) ((x) & (~BITS_REG_CP_ICP_SEL_8812F)) 2588 #define BIT_GET_REG_CP_ICP_SEL_8812F(x) \ 2589 (((x) >> BIT_SHIFT_REG_CP_ICP_SEL_8812F) & \ 2590 BIT_MASK_REG_CP_ICP_SEL_8812F) 2591 #define BIT_SET_REG_CP_ICP_SEL_8812F(x, v) \ 2592 (BIT_CLEAR_REG_CP_ICP_SEL_8812F(x) | BIT_REG_CP_ICP_SEL_8812F(v)) 2593 2594 #define BIT_SHIFT_REG_IB_PI_8812F 4 2595 #define BIT_MASK_REG_IB_PI_8812F 0x3 2596 #define BIT_REG_IB_PI_8812F(x) \ 2597 (((x) & BIT_MASK_REG_IB_PI_8812F) << BIT_SHIFT_REG_IB_PI_8812F) 2598 #define BITS_REG_IB_PI_8812F \ 2599 (BIT_MASK_REG_IB_PI_8812F << BIT_SHIFT_REG_IB_PI_8812F) 2600 #define BIT_CLEAR_REG_IB_PI_8812F(x) ((x) & (~BITS_REG_IB_PI_8812F)) 2601 #define BIT_GET_REG_IB_PI_8812F(x) \ 2602 (((x) >> BIT_SHIFT_REG_IB_PI_8812F) & BIT_MASK_REG_IB_PI_8812F) 2603 #define BIT_SET_REG_IB_PI_8812F(x, v) \ 2604 (BIT_CLEAR_REG_IB_PI_8812F(x) | BIT_REG_IB_PI_8812F(v)) 2605 2606 #define BIT_LDO2PWRCUT_8812F BIT(3) 2607 #define BIT_VPULSE_LDO_8812F BIT(2) 2608 2609 #define BIT_SHIFT_LDO_VSEL_8812F 0 2610 #define BIT_MASK_LDO_VSEL_8812F 0x3 2611 #define BIT_LDO_VSEL_8812F(x) \ 2612 (((x) & BIT_MASK_LDO_VSEL_8812F) << BIT_SHIFT_LDO_VSEL_8812F) 2613 #define BITS_LDO_VSEL_8812F \ 2614 (BIT_MASK_LDO_VSEL_8812F << BIT_SHIFT_LDO_VSEL_8812F) 2615 #define BIT_CLEAR_LDO_VSEL_8812F(x) ((x) & (~BITS_LDO_VSEL_8812F)) 2616 #define BIT_GET_LDO_VSEL_8812F(x) \ 2617 (((x) >> BIT_SHIFT_LDO_VSEL_8812F) & BIT_MASK_LDO_VSEL_8812F) 2618 #define BIT_SET_LDO_VSEL_8812F(x, v) \ 2619 (BIT_CLEAR_LDO_VSEL_8812F(x) | BIT_LDO_VSEL_8812F(v)) 2620 2621 /* 2 REG_ANAPAR_MAC_1_8812F */ 2622 2623 #define BIT_SHIFT_REG_CK_MON_SEL_8812F 29 2624 #define BIT_MASK_REG_CK_MON_SEL_8812F 0x7 2625 #define BIT_REG_CK_MON_SEL_8812F(x) \ 2626 (((x) & BIT_MASK_REG_CK_MON_SEL_8812F) \ 2627 << BIT_SHIFT_REG_CK_MON_SEL_8812F) 2628 #define BITS_REG_CK_MON_SEL_8812F \ 2629 (BIT_MASK_REG_CK_MON_SEL_8812F << BIT_SHIFT_REG_CK_MON_SEL_8812F) 2630 #define BIT_CLEAR_REG_CK_MON_SEL_8812F(x) ((x) & (~BITS_REG_CK_MON_SEL_8812F)) 2631 #define BIT_GET_REG_CK_MON_SEL_8812F(x) \ 2632 (((x) >> BIT_SHIFT_REG_CK_MON_SEL_8812F) & \ 2633 BIT_MASK_REG_CK_MON_SEL_8812F) 2634 #define BIT_SET_REG_CK_MON_SEL_8812F(x, v) \ 2635 (BIT_CLEAR_REG_CK_MON_SEL_8812F(x) | BIT_REG_CK_MON_SEL_8812F(v)) 2636 2637 #define BIT_REG_CK_MON_EN_8812F BIT(28) 2638 #define BIT_REG_XTAL_FREQ_SEL_8812F BIT(27) 2639 #define BIT_REG_XTAL_EDGE_SEL_8812F BIT(26) 2640 #define BIT_REG_VCO_KVCO_8812F BIT(25) 2641 #define BIT_REG_SDM_EDGE_SEL_8812F BIT(24) 2642 #define BIT_REG_SDM_CK_SEL_8812F BIT(23) 2643 #define BIT_REG_SDM_CK_GATED_8812F BIT(22) 2644 #define BIT_REG_PFD_RESET_GATED_8812F BIT(21) 2645 2646 #define BIT_SHIFT_REG_LPF_R3_FAST_8812F 16 2647 #define BIT_MASK_REG_LPF_R3_FAST_8812F 0x1f 2648 #define BIT_REG_LPF_R3_FAST_8812F(x) \ 2649 (((x) & BIT_MASK_REG_LPF_R3_FAST_8812F) \ 2650 << BIT_SHIFT_REG_LPF_R3_FAST_8812F) 2651 #define BITS_REG_LPF_R3_FAST_8812F \ 2652 (BIT_MASK_REG_LPF_R3_FAST_8812F << BIT_SHIFT_REG_LPF_R3_FAST_8812F) 2653 #define BIT_CLEAR_REG_LPF_R3_FAST_8812F(x) ((x) & (~BITS_REG_LPF_R3_FAST_8812F)) 2654 #define BIT_GET_REG_LPF_R3_FAST_8812F(x) \ 2655 (((x) >> BIT_SHIFT_REG_LPF_R3_FAST_8812F) & \ 2656 BIT_MASK_REG_LPF_R3_FAST_8812F) 2657 #define BIT_SET_REG_LPF_R3_FAST_8812F(x, v) \ 2658 (BIT_CLEAR_REG_LPF_R3_FAST_8812F(x) | BIT_REG_LPF_R3_FAST_8812F(v)) 2659 2660 #define BIT_SHIFT_REG_LPF_R2_FAST_8812F 11 2661 #define BIT_MASK_REG_LPF_R2_FAST_8812F 0x1f 2662 #define BIT_REG_LPF_R2_FAST_8812F(x) \ 2663 (((x) & BIT_MASK_REG_LPF_R2_FAST_8812F) \ 2664 << BIT_SHIFT_REG_LPF_R2_FAST_8812F) 2665 #define BITS_REG_LPF_R2_FAST_8812F \ 2666 (BIT_MASK_REG_LPF_R2_FAST_8812F << BIT_SHIFT_REG_LPF_R2_FAST_8812F) 2667 #define BIT_CLEAR_REG_LPF_R2_FAST_8812F(x) ((x) & (~BITS_REG_LPF_R2_FAST_8812F)) 2668 #define BIT_GET_REG_LPF_R2_FAST_8812F(x) \ 2669 (((x) >> BIT_SHIFT_REG_LPF_R2_FAST_8812F) & \ 2670 BIT_MASK_REG_LPF_R2_FAST_8812F) 2671 #define BIT_SET_REG_LPF_R2_FAST_8812F(x, v) \ 2672 (BIT_CLEAR_REG_LPF_R2_FAST_8812F(x) | BIT_REG_LPF_R2_FAST_8812F(v)) 2673 2674 #define BIT_SHIFT_REG_LPF_C3_FAST_8812F 8 2675 #define BIT_MASK_REG_LPF_C3_FAST_8812F 0x7 2676 #define BIT_REG_LPF_C3_FAST_8812F(x) \ 2677 (((x) & BIT_MASK_REG_LPF_C3_FAST_8812F) \ 2678 << BIT_SHIFT_REG_LPF_C3_FAST_8812F) 2679 #define BITS_REG_LPF_C3_FAST_8812F \ 2680 (BIT_MASK_REG_LPF_C3_FAST_8812F << BIT_SHIFT_REG_LPF_C3_FAST_8812F) 2681 #define BIT_CLEAR_REG_LPF_C3_FAST_8812F(x) ((x) & (~BITS_REG_LPF_C3_FAST_8812F)) 2682 #define BIT_GET_REG_LPF_C3_FAST_8812F(x) \ 2683 (((x) >> BIT_SHIFT_REG_LPF_C3_FAST_8812F) & \ 2684 BIT_MASK_REG_LPF_C3_FAST_8812F) 2685 #define BIT_SET_REG_LPF_C3_FAST_8812F(x, v) \ 2686 (BIT_CLEAR_REG_LPF_C3_FAST_8812F(x) | BIT_REG_LPF_C3_FAST_8812F(v)) 2687 2688 #define BIT_SHIFT_REG_LPF_C2_FAST_8812F 5 2689 #define BIT_MASK_REG_LPF_C2_FAST_8812F 0x7 2690 #define BIT_REG_LPF_C2_FAST_8812F(x) \ 2691 (((x) & BIT_MASK_REG_LPF_C2_FAST_8812F) \ 2692 << BIT_SHIFT_REG_LPF_C2_FAST_8812F) 2693 #define BITS_REG_LPF_C2_FAST_8812F \ 2694 (BIT_MASK_REG_LPF_C2_FAST_8812F << BIT_SHIFT_REG_LPF_C2_FAST_8812F) 2695 #define BIT_CLEAR_REG_LPF_C2_FAST_8812F(x) ((x) & (~BITS_REG_LPF_C2_FAST_8812F)) 2696 #define BIT_GET_REG_LPF_C2_FAST_8812F(x) \ 2697 (((x) >> BIT_SHIFT_REG_LPF_C2_FAST_8812F) & \ 2698 BIT_MASK_REG_LPF_C2_FAST_8812F) 2699 #define BIT_SET_REG_LPF_C2_FAST_8812F(x, v) \ 2700 (BIT_CLEAR_REG_LPF_C2_FAST_8812F(x) | BIT_REG_LPF_C2_FAST_8812F(v)) 2701 2702 #define BIT_SHIFT_REG_LPF_C1_FAST_8812F 2 2703 #define BIT_MASK_REG_LPF_C1_FAST_8812F 0x7 2704 #define BIT_REG_LPF_C1_FAST_8812F(x) \ 2705 (((x) & BIT_MASK_REG_LPF_C1_FAST_8812F) \ 2706 << BIT_SHIFT_REG_LPF_C1_FAST_8812F) 2707 #define BITS_REG_LPF_C1_FAST_8812F \ 2708 (BIT_MASK_REG_LPF_C1_FAST_8812F << BIT_SHIFT_REG_LPF_C1_FAST_8812F) 2709 #define BIT_CLEAR_REG_LPF_C1_FAST_8812F(x) ((x) & (~BITS_REG_LPF_C1_FAST_8812F)) 2710 #define BIT_GET_REG_LPF_C1_FAST_8812F(x) \ 2711 (((x) >> BIT_SHIFT_REG_LPF_C1_FAST_8812F) & \ 2712 BIT_MASK_REG_LPF_C1_FAST_8812F) 2713 #define BIT_SET_REG_LPF_C1_FAST_8812F(x, v) \ 2714 (BIT_CLEAR_REG_LPF_C1_FAST_8812F(x) | BIT_REG_LPF_C1_FAST_8812F(v)) 2715 2716 #define BIT_SHIFT_REG_LPF_R3_V1_8812F 0 2717 #define BIT_MASK_REG_LPF_R3_V1_8812F 0x3 2718 #define BIT_REG_LPF_R3_V1_8812F(x) \ 2719 (((x) & BIT_MASK_REG_LPF_R3_V1_8812F) << BIT_SHIFT_REG_LPF_R3_V1_8812F) 2720 #define BITS_REG_LPF_R3_V1_8812F \ 2721 (BIT_MASK_REG_LPF_R3_V1_8812F << BIT_SHIFT_REG_LPF_R3_V1_8812F) 2722 #define BIT_CLEAR_REG_LPF_R3_V1_8812F(x) ((x) & (~BITS_REG_LPF_R3_V1_8812F)) 2723 #define BIT_GET_REG_LPF_R3_V1_8812F(x) \ 2724 (((x) >> BIT_SHIFT_REG_LPF_R3_V1_8812F) & BIT_MASK_REG_LPF_R3_V1_8812F) 2725 #define BIT_SET_REG_LPF_R3_V1_8812F(x, v) \ 2726 (BIT_CLEAR_REG_LPF_R3_V1_8812F(x) | BIT_REG_LPF_R3_V1_8812F(v)) 2727 2728 /* 2 REG_ANAPAR_MAC_2_8812F */ 2729 2730 #define BIT_SHIFT_AGPIO_DRV_V1_8812F 30 2731 #define BIT_MASK_AGPIO_DRV_V1_8812F 0x3 2732 #define BIT_AGPIO_DRV_V1_8812F(x) \ 2733 (((x) & BIT_MASK_AGPIO_DRV_V1_8812F) << BIT_SHIFT_AGPIO_DRV_V1_8812F) 2734 #define BITS_AGPIO_DRV_V1_8812F \ 2735 (BIT_MASK_AGPIO_DRV_V1_8812F << BIT_SHIFT_AGPIO_DRV_V1_8812F) 2736 #define BIT_CLEAR_AGPIO_DRV_V1_8812F(x) ((x) & (~BITS_AGPIO_DRV_V1_8812F)) 2737 #define BIT_GET_AGPIO_DRV_V1_8812F(x) \ 2738 (((x) >> BIT_SHIFT_AGPIO_DRV_V1_8812F) & BIT_MASK_AGPIO_DRV_V1_8812F) 2739 #define BIT_SET_AGPIO_DRV_V1_8812F(x, v) \ 2740 (BIT_CLEAR_AGPIO_DRV_V1_8812F(x) | BIT_AGPIO_DRV_V1_8812F(v)) 2741 2742 #define BIT_AGPIO_GPO_V1_8812F BIT(29) 2743 #define BIT_AGPIO_GPE_V1_8812F BIT(28) 2744 #define BIT_SEL_CLK_8812F BIT(27) 2745 2746 #define BIT_SHIFT_LS_XTAL_SEL_8812F 23 2747 #define BIT_MASK_LS_XTAL_SEL_8812F 0xf 2748 #define BIT_LS_XTAL_SEL_8812F(x) \ 2749 (((x) & BIT_MASK_LS_XTAL_SEL_8812F) << BIT_SHIFT_LS_XTAL_SEL_8812F) 2750 #define BITS_LS_XTAL_SEL_8812F \ 2751 (BIT_MASK_LS_XTAL_SEL_8812F << BIT_SHIFT_LS_XTAL_SEL_8812F) 2752 #define BIT_CLEAR_LS_XTAL_SEL_8812F(x) ((x) & (~BITS_LS_XTAL_SEL_8812F)) 2753 #define BIT_GET_LS_XTAL_SEL_8812F(x) \ 2754 (((x) >> BIT_SHIFT_LS_XTAL_SEL_8812F) & BIT_MASK_LS_XTAL_SEL_8812F) 2755 #define BIT_SET_LS_XTAL_SEL_8812F(x, v) \ 2756 (BIT_CLEAR_LS_XTAL_SEL_8812F(x) | BIT_LS_XTAL_SEL_8812F(v)) 2757 2758 #define BIT_LS_SDM_ORDER_V1_8812F BIT(22) 2759 #define BIT_LS_DELAY_PH_8812F BIT(21) 2760 #define BIT_DIVIDER_SEL_8812F BIT(20) 2761 2762 #define BIT_SHIFT_PCODE_8812F 15 2763 #define BIT_MASK_PCODE_8812F 0x1f 2764 #define BIT_PCODE_8812F(x) \ 2765 (((x) & BIT_MASK_PCODE_8812F) << BIT_SHIFT_PCODE_8812F) 2766 #define BITS_PCODE_8812F (BIT_MASK_PCODE_8812F << BIT_SHIFT_PCODE_8812F) 2767 #define BIT_CLEAR_PCODE_8812F(x) ((x) & (~BITS_PCODE_8812F)) 2768 #define BIT_GET_PCODE_8812F(x) \ 2769 (((x) >> BIT_SHIFT_PCODE_8812F) & BIT_MASK_PCODE_8812F) 2770 #define BIT_SET_PCODE_8812F(x, v) \ 2771 (BIT_CLEAR_PCODE_8812F(x) | BIT_PCODE_8812F(v)) 2772 2773 #define BIT_SHIFT_NCODE_8812F 7 2774 #define BIT_MASK_NCODE_8812F 0xff 2775 #define BIT_NCODE_8812F(x) \ 2776 (((x) & BIT_MASK_NCODE_8812F) << BIT_SHIFT_NCODE_8812F) 2777 #define BITS_NCODE_8812F (BIT_MASK_NCODE_8812F << BIT_SHIFT_NCODE_8812F) 2778 #define BIT_CLEAR_NCODE_8812F(x) ((x) & (~BITS_NCODE_8812F)) 2779 #define BIT_GET_NCODE_8812F(x) \ 2780 (((x) >> BIT_SHIFT_NCODE_8812F) & BIT_MASK_NCODE_8812F) 2781 #define BIT_SET_NCODE_8812F(x, v) \ 2782 (BIT_CLEAR_NCODE_8812F(x) | BIT_NCODE_8812F(v)) 2783 2784 #define BIT_REG_BEACON_8812F BIT(6) 2785 #define BIT_REG_MBIASE_8812F BIT(5) 2786 2787 #define BIT_SHIFT_REG_FAST_SEL_8812F 3 2788 #define BIT_MASK_REG_FAST_SEL_8812F 0x3 2789 #define BIT_REG_FAST_SEL_8812F(x) \ 2790 (((x) & BIT_MASK_REG_FAST_SEL_8812F) << BIT_SHIFT_REG_FAST_SEL_8812F) 2791 #define BITS_REG_FAST_SEL_8812F \ 2792 (BIT_MASK_REG_FAST_SEL_8812F << BIT_SHIFT_REG_FAST_SEL_8812F) 2793 #define BIT_CLEAR_REG_FAST_SEL_8812F(x) ((x) & (~BITS_REG_FAST_SEL_8812F)) 2794 #define BIT_GET_REG_FAST_SEL_8812F(x) \ 2795 (((x) >> BIT_SHIFT_REG_FAST_SEL_8812F) & BIT_MASK_REG_FAST_SEL_8812F) 2796 #define BIT_SET_REG_FAST_SEL_8812F(x, v) \ 2797 (BIT_CLEAR_REG_FAST_SEL_8812F(x) | BIT_REG_FAST_SEL_8812F(v)) 2798 2799 #define BIT_REG_CK960M_EN_8812F BIT(2) 2800 #define BIT_REG_CK320M_EN_8812F BIT(1) 2801 #define BIT_REG_CK_5M_EN_8812F BIT(0) 2802 2803 /* 2 REG_NOT_VALID_8812F */ 2804 2805 /* 2 REG_NOT_VALID_8812F */ 2806 2807 /* 2 REG_NOT_VALID_8812F */ 2808 2809 /* 2 REG_NOT_VALID_8812F */ 2810 2811 /* 2 REG_NOT_VALID_8812F */ 2812 2813 /* 2 REG_NOT_VALID_8812F */ 2814 2815 /* 2 REG_NOT_VALID_8812F */ 2816 2817 /* 2 REG_ANAPAR_XTAL_0_8812F */ 2818 #define BIT_XTAL_SC_LPS_8812F BIT(31) 2819 2820 #define BIT_SHIFT_XTAL_SC_INIT_8812F 24 2821 #define BIT_MASK_XTAL_SC_INIT_8812F 0x7f 2822 #define BIT_XTAL_SC_INIT_8812F(x) \ 2823 (((x) & BIT_MASK_XTAL_SC_INIT_8812F) << BIT_SHIFT_XTAL_SC_INIT_8812F) 2824 #define BITS_XTAL_SC_INIT_8812F \ 2825 (BIT_MASK_XTAL_SC_INIT_8812F << BIT_SHIFT_XTAL_SC_INIT_8812F) 2826 #define BIT_CLEAR_XTAL_SC_INIT_8812F(x) ((x) & (~BITS_XTAL_SC_INIT_8812F)) 2827 #define BIT_GET_XTAL_SC_INIT_8812F(x) \ 2828 (((x) >> BIT_SHIFT_XTAL_SC_INIT_8812F) & BIT_MASK_XTAL_SC_INIT_8812F) 2829 #define BIT_SET_XTAL_SC_INIT_8812F(x, v) \ 2830 (BIT_CLEAR_XTAL_SC_INIT_8812F(x) | BIT_XTAL_SC_INIT_8812F(v)) 2831 2832 #define BIT_SHIFT_XTAL_SC_XO_8812F 17 2833 #define BIT_MASK_XTAL_SC_XO_8812F 0x7f 2834 #define BIT_XTAL_SC_XO_8812F(x) \ 2835 (((x) & BIT_MASK_XTAL_SC_XO_8812F) << BIT_SHIFT_XTAL_SC_XO_8812F) 2836 #define BITS_XTAL_SC_XO_8812F \ 2837 (BIT_MASK_XTAL_SC_XO_8812F << BIT_SHIFT_XTAL_SC_XO_8812F) 2838 #define BIT_CLEAR_XTAL_SC_XO_8812F(x) ((x) & (~BITS_XTAL_SC_XO_8812F)) 2839 #define BIT_GET_XTAL_SC_XO_8812F(x) \ 2840 (((x) >> BIT_SHIFT_XTAL_SC_XO_8812F) & BIT_MASK_XTAL_SC_XO_8812F) 2841 #define BIT_SET_XTAL_SC_XO_8812F(x, v) \ 2842 (BIT_CLEAR_XTAL_SC_XO_8812F(x) | BIT_XTAL_SC_XO_8812F(v)) 2843 2844 #define BIT_SHIFT_XTAL_SC_XI_8812F 10 2845 #define BIT_MASK_XTAL_SC_XI_8812F 0x7f 2846 #define BIT_XTAL_SC_XI_8812F(x) \ 2847 (((x) & BIT_MASK_XTAL_SC_XI_8812F) << BIT_SHIFT_XTAL_SC_XI_8812F) 2848 #define BITS_XTAL_SC_XI_8812F \ 2849 (BIT_MASK_XTAL_SC_XI_8812F << BIT_SHIFT_XTAL_SC_XI_8812F) 2850 #define BIT_CLEAR_XTAL_SC_XI_8812F(x) ((x) & (~BITS_XTAL_SC_XI_8812F)) 2851 #define BIT_GET_XTAL_SC_XI_8812F(x) \ 2852 (((x) >> BIT_SHIFT_XTAL_SC_XI_8812F) & BIT_MASK_XTAL_SC_XI_8812F) 2853 #define BIT_SET_XTAL_SC_XI_8812F(x, v) \ 2854 (BIT_CLEAR_XTAL_SC_XI_8812F(x) | BIT_XTAL_SC_XI_8812F(v)) 2855 2856 #define BIT_SHIFT_XTAL_GMN_V3_8812F 5 2857 #define BIT_MASK_XTAL_GMN_V3_8812F 0x1f 2858 #define BIT_XTAL_GMN_V3_8812F(x) \ 2859 (((x) & BIT_MASK_XTAL_GMN_V3_8812F) << BIT_SHIFT_XTAL_GMN_V3_8812F) 2860 #define BITS_XTAL_GMN_V3_8812F \ 2861 (BIT_MASK_XTAL_GMN_V3_8812F << BIT_SHIFT_XTAL_GMN_V3_8812F) 2862 #define BIT_CLEAR_XTAL_GMN_V3_8812F(x) ((x) & (~BITS_XTAL_GMN_V3_8812F)) 2863 #define BIT_GET_XTAL_GMN_V3_8812F(x) \ 2864 (((x) >> BIT_SHIFT_XTAL_GMN_V3_8812F) & BIT_MASK_XTAL_GMN_V3_8812F) 2865 #define BIT_SET_XTAL_GMN_V3_8812F(x, v) \ 2866 (BIT_CLEAR_XTAL_GMN_V3_8812F(x) | BIT_XTAL_GMN_V3_8812F(v)) 2867 2868 #define BIT_SHIFT_XTAL_GMP_V3_8812F 0 2869 #define BIT_MASK_XTAL_GMP_V3_8812F 0x1f 2870 #define BIT_XTAL_GMP_V3_8812F(x) \ 2871 (((x) & BIT_MASK_XTAL_GMP_V3_8812F) << BIT_SHIFT_XTAL_GMP_V3_8812F) 2872 #define BITS_XTAL_GMP_V3_8812F \ 2873 (BIT_MASK_XTAL_GMP_V3_8812F << BIT_SHIFT_XTAL_GMP_V3_8812F) 2874 #define BIT_CLEAR_XTAL_GMP_V3_8812F(x) ((x) & (~BITS_XTAL_GMP_V3_8812F)) 2875 #define BIT_GET_XTAL_GMP_V3_8812F(x) \ 2876 (((x) >> BIT_SHIFT_XTAL_GMP_V3_8812F) & BIT_MASK_XTAL_GMP_V3_8812F) 2877 #define BIT_SET_XTAL_GMP_V3_8812F(x, v) \ 2878 (BIT_CLEAR_XTAL_GMP_V3_8812F(x) | BIT_XTAL_GMP_V3_8812F(v)) 2879 2880 /* 2 REG_ANAPAR_XTAL_1_8812F */ 2881 #define BIT_XTAL_SEL_TOK_V1_8812F BIT(31) 2882 #define BIT_XTAL_DELAY_DIGI_V2_8812F BIT(30) 2883 #define BIT_XTAL_DELAY_USB_V2_8812F BIT(29) 2884 #define BIT_XTAL_DELAY_AFE_V2_8812F BIT(28) 2885 2886 #define BIT_SHIFT_XTAL_DRV_DIGI_V2_8812F 26 2887 #define BIT_MASK_XTAL_DRV_DIGI_V2_8812F 0x3 2888 #define BIT_XTAL_DRV_DIGI_V2_8812F(x) \ 2889 (((x) & BIT_MASK_XTAL_DRV_DIGI_V2_8812F) \ 2890 << BIT_SHIFT_XTAL_DRV_DIGI_V2_8812F) 2891 #define BITS_XTAL_DRV_DIGI_V2_8812F \ 2892 (BIT_MASK_XTAL_DRV_DIGI_V2_8812F << BIT_SHIFT_XTAL_DRV_DIGI_V2_8812F) 2893 #define BIT_CLEAR_XTAL_DRV_DIGI_V2_8812F(x) \ 2894 ((x) & (~BITS_XTAL_DRV_DIGI_V2_8812F)) 2895 #define BIT_GET_XTAL_DRV_DIGI_V2_8812F(x) \ 2896 (((x) >> BIT_SHIFT_XTAL_DRV_DIGI_V2_8812F) & \ 2897 BIT_MASK_XTAL_DRV_DIGI_V2_8812F) 2898 #define BIT_SET_XTAL_DRV_DIGI_V2_8812F(x, v) \ 2899 (BIT_CLEAR_XTAL_DRV_DIGI_V2_8812F(x) | BIT_XTAL_DRV_DIGI_V2_8812F(v)) 2900 2901 #define BIT_EN_XTAL_DRV_LPS_8812F BIT(25) 2902 #define BIT_EN_XTAL_DRV_DIGI_V2_8812F BIT(24) 2903 2904 #define BIT_SHIFT_XTAL_DRV_USB_8812F 22 2905 #define BIT_MASK_XTAL_DRV_USB_8812F 0x3 2906 #define BIT_XTAL_DRV_USB_8812F(x) \ 2907 (((x) & BIT_MASK_XTAL_DRV_USB_8812F) << BIT_SHIFT_XTAL_DRV_USB_8812F) 2908 #define BITS_XTAL_DRV_USB_8812F \ 2909 (BIT_MASK_XTAL_DRV_USB_8812F << BIT_SHIFT_XTAL_DRV_USB_8812F) 2910 #define BIT_CLEAR_XTAL_DRV_USB_8812F(x) ((x) & (~BITS_XTAL_DRV_USB_8812F)) 2911 #define BIT_GET_XTAL_DRV_USB_8812F(x) \ 2912 (((x) >> BIT_SHIFT_XTAL_DRV_USB_8812F) & BIT_MASK_XTAL_DRV_USB_8812F) 2913 #define BIT_SET_XTAL_DRV_USB_8812F(x, v) \ 2914 (BIT_CLEAR_XTAL_DRV_USB_8812F(x) | BIT_XTAL_DRV_USB_8812F(v)) 2915 2916 #define BIT_EN_XTAL_DRV_USB_8812F BIT(21) 2917 2918 #define BIT_SHIFT_XTAL_DRV_AFE_V2_8812F 19 2919 #define BIT_MASK_XTAL_DRV_AFE_V2_8812F 0x3 2920 #define BIT_XTAL_DRV_AFE_V2_8812F(x) \ 2921 (((x) & BIT_MASK_XTAL_DRV_AFE_V2_8812F) \ 2922 << BIT_SHIFT_XTAL_DRV_AFE_V2_8812F) 2923 #define BITS_XTAL_DRV_AFE_V2_8812F \ 2924 (BIT_MASK_XTAL_DRV_AFE_V2_8812F << BIT_SHIFT_XTAL_DRV_AFE_V2_8812F) 2925 #define BIT_CLEAR_XTAL_DRV_AFE_V2_8812F(x) ((x) & (~BITS_XTAL_DRV_AFE_V2_8812F)) 2926 #define BIT_GET_XTAL_DRV_AFE_V2_8812F(x) \ 2927 (((x) >> BIT_SHIFT_XTAL_DRV_AFE_V2_8812F) & \ 2928 BIT_MASK_XTAL_DRV_AFE_V2_8812F) 2929 #define BIT_SET_XTAL_DRV_AFE_V2_8812F(x, v) \ 2930 (BIT_CLEAR_XTAL_DRV_AFE_V2_8812F(x) | BIT_XTAL_DRV_AFE_V2_8812F(v)) 2931 2932 #define BIT_EN_XTAL_DRV_AFE_8812F BIT(18) 2933 2934 #define BIT_SHIFT_XTAL_DRV_RF2_V2_8812F 16 2935 #define BIT_MASK_XTAL_DRV_RF2_V2_8812F 0x3 2936 #define BIT_XTAL_DRV_RF2_V2_8812F(x) \ 2937 (((x) & BIT_MASK_XTAL_DRV_RF2_V2_8812F) \ 2938 << BIT_SHIFT_XTAL_DRV_RF2_V2_8812F) 2939 #define BITS_XTAL_DRV_RF2_V2_8812F \ 2940 (BIT_MASK_XTAL_DRV_RF2_V2_8812F << BIT_SHIFT_XTAL_DRV_RF2_V2_8812F) 2941 #define BIT_CLEAR_XTAL_DRV_RF2_V2_8812F(x) ((x) & (~BITS_XTAL_DRV_RF2_V2_8812F)) 2942 #define BIT_GET_XTAL_DRV_RF2_V2_8812F(x) \ 2943 (((x) >> BIT_SHIFT_XTAL_DRV_RF2_V2_8812F) & \ 2944 BIT_MASK_XTAL_DRV_RF2_V2_8812F) 2945 #define BIT_SET_XTAL_DRV_RF2_V2_8812F(x, v) \ 2946 (BIT_CLEAR_XTAL_DRV_RF2_V2_8812F(x) | BIT_XTAL_DRV_RF2_V2_8812F(v)) 2947 2948 #define BIT_EN_XTAL_DRV_RF2_8812F BIT(15) 2949 2950 #define BIT_SHIFT_XTAL_DRV_RF1_8812F 13 2951 #define BIT_MASK_XTAL_DRV_RF1_8812F 0x3 2952 #define BIT_XTAL_DRV_RF1_8812F(x) \ 2953 (((x) & BIT_MASK_XTAL_DRV_RF1_8812F) << BIT_SHIFT_XTAL_DRV_RF1_8812F) 2954 #define BITS_XTAL_DRV_RF1_8812F \ 2955 (BIT_MASK_XTAL_DRV_RF1_8812F << BIT_SHIFT_XTAL_DRV_RF1_8812F) 2956 #define BIT_CLEAR_XTAL_DRV_RF1_8812F(x) ((x) & (~BITS_XTAL_DRV_RF1_8812F)) 2957 #define BIT_GET_XTAL_DRV_RF1_8812F(x) \ 2958 (((x) >> BIT_SHIFT_XTAL_DRV_RF1_8812F) & BIT_MASK_XTAL_DRV_RF1_8812F) 2959 #define BIT_SET_XTAL_DRV_RF1_8812F(x, v) \ 2960 (BIT_CLEAR_XTAL_DRV_RF1_8812F(x) | BIT_XTAL_DRV_RF1_8812F(v)) 2961 2962 #define BIT_EN_XTAL_DRV_RF1_8812F BIT(12) 2963 #define BIT_XTAL_DRV_RF_LATCH_V4_8812F BIT(11) 2964 #define BIT_XTAL_GM_SEP_V3_8812F BIT(10) 2965 #define BIT_XQSEL_RF_AWAKE_V3_8812F BIT(9) 2966 #define BIT_XQSEL_RF_INITIAL_V3_8812F BIT(8) 2967 #define BIT_XQSEL_V2_8812F BIT(7) 2968 #define BIT_GATED_XTAL_OK0_V2_8812F BIT(6) 2969 2970 #define BIT_SHIFT_XTAL_SC_LPS_V2_8812F 0 2971 #define BIT_MASK_XTAL_SC_LPS_V2_8812F 0x3f 2972 #define BIT_XTAL_SC_LPS_V2_8812F(x) \ 2973 (((x) & BIT_MASK_XTAL_SC_LPS_V2_8812F) \ 2974 << BIT_SHIFT_XTAL_SC_LPS_V2_8812F) 2975 #define BITS_XTAL_SC_LPS_V2_8812F \ 2976 (BIT_MASK_XTAL_SC_LPS_V2_8812F << BIT_SHIFT_XTAL_SC_LPS_V2_8812F) 2977 #define BIT_CLEAR_XTAL_SC_LPS_V2_8812F(x) ((x) & (~BITS_XTAL_SC_LPS_V2_8812F)) 2978 #define BIT_GET_XTAL_SC_LPS_V2_8812F(x) \ 2979 (((x) >> BIT_SHIFT_XTAL_SC_LPS_V2_8812F) & \ 2980 BIT_MASK_XTAL_SC_LPS_V2_8812F) 2981 #define BIT_SET_XTAL_SC_LPS_V2_8812F(x, v) \ 2982 (BIT_CLEAR_XTAL_SC_LPS_V2_8812F(x) | BIT_XTAL_SC_LPS_V2_8812F(v)) 2983 2984 /* 2 REG_ANAPAR_XTAL_2_8812F */ 2985 #define BIT_XTAL_AAC_CAP_8812F BIT(31) 2986 2987 #define BIT_SHIFT_XTAL_PDSW_8812F 29 2988 #define BIT_MASK_XTAL_PDSW_8812F 0x3 2989 #define BIT_XTAL_PDSW_8812F(x) \ 2990 (((x) & BIT_MASK_XTAL_PDSW_8812F) << BIT_SHIFT_XTAL_PDSW_8812F) 2991 #define BITS_XTAL_PDSW_8812F \ 2992 (BIT_MASK_XTAL_PDSW_8812F << BIT_SHIFT_XTAL_PDSW_8812F) 2993 #define BIT_CLEAR_XTAL_PDSW_8812F(x) ((x) & (~BITS_XTAL_PDSW_8812F)) 2994 #define BIT_GET_XTAL_PDSW_8812F(x) \ 2995 (((x) >> BIT_SHIFT_XTAL_PDSW_8812F) & BIT_MASK_XTAL_PDSW_8812F) 2996 #define BIT_SET_XTAL_PDSW_8812F(x, v) \ 2997 (BIT_CLEAR_XTAL_PDSW_8812F(x) | BIT_XTAL_PDSW_8812F(v)) 2998 2999 #define BIT_SHIFT_XTAL_LPS_BUF_VB_8812F 27 3000 #define BIT_MASK_XTAL_LPS_BUF_VB_8812F 0x3 3001 #define BIT_XTAL_LPS_BUF_VB_8812F(x) \ 3002 (((x) & BIT_MASK_XTAL_LPS_BUF_VB_8812F) \ 3003 << BIT_SHIFT_XTAL_LPS_BUF_VB_8812F) 3004 #define BITS_XTAL_LPS_BUF_VB_8812F \ 3005 (BIT_MASK_XTAL_LPS_BUF_VB_8812F << BIT_SHIFT_XTAL_LPS_BUF_VB_8812F) 3006 #define BIT_CLEAR_XTAL_LPS_BUF_VB_8812F(x) ((x) & (~BITS_XTAL_LPS_BUF_VB_8812F)) 3007 #define BIT_GET_XTAL_LPS_BUF_VB_8812F(x) \ 3008 (((x) >> BIT_SHIFT_XTAL_LPS_BUF_VB_8812F) & \ 3009 BIT_MASK_XTAL_LPS_BUF_VB_8812F) 3010 #define BIT_SET_XTAL_LPS_BUF_VB_8812F(x, v) \ 3011 (BIT_CLEAR_XTAL_LPS_BUF_VB_8812F(x) | BIT_XTAL_LPS_BUF_VB_8812F(v)) 3012 3013 #define BIT_XTAL_PDCK_MANU_8812F BIT(26) 3014 #define BIT_XTAL_PDCK_OK_MANU_8812F BIT(25) 3015 3016 #define BIT_SHIFT_XTAL_VREF_SEL_8812F 20 3017 #define BIT_MASK_XTAL_VREF_SEL_8812F 0x1f 3018 #define BIT_XTAL_VREF_SEL_8812F(x) \ 3019 (((x) & BIT_MASK_XTAL_VREF_SEL_8812F) << BIT_SHIFT_XTAL_VREF_SEL_8812F) 3020 #define BITS_XTAL_VREF_SEL_8812F \ 3021 (BIT_MASK_XTAL_VREF_SEL_8812F << BIT_SHIFT_XTAL_VREF_SEL_8812F) 3022 #define BIT_CLEAR_XTAL_VREF_SEL_8812F(x) ((x) & (~BITS_XTAL_VREF_SEL_8812F)) 3023 #define BIT_GET_XTAL_VREF_SEL_8812F(x) \ 3024 (((x) >> BIT_SHIFT_XTAL_VREF_SEL_8812F) & BIT_MASK_XTAL_VREF_SEL_8812F) 3025 #define BIT_SET_XTAL_VREF_SEL_8812F(x, v) \ 3026 (BIT_CLEAR_XTAL_VREF_SEL_8812F(x) | BIT_XTAL_VREF_SEL_8812F(v)) 3027 3028 #define BIT_EN_XTAL_PDCK_VREF_8812F BIT(19) 3029 #define BIT_XTAL_SEL_PWR_V1_8812F BIT(18) 3030 #define BIT_XTAL_LPS_DIVISOR_8812F BIT(17) 3031 #define BIT_XTAL_CKDIGI_SEL_8812F BIT(16) 3032 #define BIT_EN_XTAL_LPS_CLK_8812F BIT(15) 3033 #define BIT_EN_XTAL_SCHMITT_8812F BIT(14) 3034 #define BIT_XTAL_PK_SEL_OFFSET_8812F BIT(13) 3035 3036 #define BIT_SHIFT_XTAL_MANU_PK_SEL_8812F 11 3037 #define BIT_MASK_XTAL_MANU_PK_SEL_8812F 0x3 3038 #define BIT_XTAL_MANU_PK_SEL_8812F(x) \ 3039 (((x) & BIT_MASK_XTAL_MANU_PK_SEL_8812F) \ 3040 << BIT_SHIFT_XTAL_MANU_PK_SEL_8812F) 3041 #define BITS_XTAL_MANU_PK_SEL_8812F \ 3042 (BIT_MASK_XTAL_MANU_PK_SEL_8812F << BIT_SHIFT_XTAL_MANU_PK_SEL_8812F) 3043 #define BIT_CLEAR_XTAL_MANU_PK_SEL_8812F(x) \ 3044 ((x) & (~BITS_XTAL_MANU_PK_SEL_8812F)) 3045 #define BIT_GET_XTAL_MANU_PK_SEL_8812F(x) \ 3046 (((x) >> BIT_SHIFT_XTAL_MANU_PK_SEL_8812F) & \ 3047 BIT_MASK_XTAL_MANU_PK_SEL_8812F) 3048 #define BIT_SET_XTAL_MANU_PK_SEL_8812F(x, v) \ 3049 (BIT_CLEAR_XTAL_MANU_PK_SEL_8812F(x) | BIT_XTAL_MANU_PK_SEL_8812F(v)) 3050 3051 #define BIT_XTAL_AACK_PK_MANU_8812F BIT(10) 3052 #define BIT_EN_XTAL_AAC_PKDET_V1_8812F BIT(9) 3053 #define BIT_EN_XTAL_AAC_GM_V1_8812F BIT(8) 3054 #define BIT_XTAL_LDO_OPVB_SEL_8812F BIT(7) 3055 #define BIT_XTAL_LDO_NC_8812F BIT(6) 3056 3057 #define BIT_SHIFT_XTAL_LDO_VREF_V2_8812F 3 3058 #define BIT_MASK_XTAL_LDO_VREF_V2_8812F 0x7 3059 #define BIT_XTAL_LDO_VREF_V2_8812F(x) \ 3060 (((x) & BIT_MASK_XTAL_LDO_VREF_V2_8812F) \ 3061 << BIT_SHIFT_XTAL_LDO_VREF_V2_8812F) 3062 #define BITS_XTAL_LDO_VREF_V2_8812F \ 3063 (BIT_MASK_XTAL_LDO_VREF_V2_8812F << BIT_SHIFT_XTAL_LDO_VREF_V2_8812F) 3064 #define BIT_CLEAR_XTAL_LDO_VREF_V2_8812F(x) \ 3065 ((x) & (~BITS_XTAL_LDO_VREF_V2_8812F)) 3066 #define BIT_GET_XTAL_LDO_VREF_V2_8812F(x) \ 3067 (((x) >> BIT_SHIFT_XTAL_LDO_VREF_V2_8812F) & \ 3068 BIT_MASK_XTAL_LDO_VREF_V2_8812F) 3069 #define BIT_SET_XTAL_LDO_VREF_V2_8812F(x, v) \ 3070 (BIT_CLEAR_XTAL_LDO_VREF_V2_8812F(x) | BIT_XTAL_LDO_VREF_V2_8812F(v)) 3071 3072 #define BIT_XTAL_LPMODE_V1_8812F BIT(2) 3073 3074 #define BIT_SHIFT_XTAL_SEL_TOK_V3_8812F 0 3075 #define BIT_MASK_XTAL_SEL_TOK_V3_8812F 0x3 3076 #define BIT_XTAL_SEL_TOK_V3_8812F(x) \ 3077 (((x) & BIT_MASK_XTAL_SEL_TOK_V3_8812F) \ 3078 << BIT_SHIFT_XTAL_SEL_TOK_V3_8812F) 3079 #define BITS_XTAL_SEL_TOK_V3_8812F \ 3080 (BIT_MASK_XTAL_SEL_TOK_V3_8812F << BIT_SHIFT_XTAL_SEL_TOK_V3_8812F) 3081 #define BIT_CLEAR_XTAL_SEL_TOK_V3_8812F(x) ((x) & (~BITS_XTAL_SEL_TOK_V3_8812F)) 3082 #define BIT_GET_XTAL_SEL_TOK_V3_8812F(x) \ 3083 (((x) >> BIT_SHIFT_XTAL_SEL_TOK_V3_8812F) & \ 3084 BIT_MASK_XTAL_SEL_TOK_V3_8812F) 3085 #define BIT_SET_XTAL_SEL_TOK_V3_8812F(x, v) \ 3086 (BIT_CLEAR_XTAL_SEL_TOK_V3_8812F(x) | BIT_XTAL_SEL_TOK_V3_8812F(v)) 3087 3088 /* 2 REG_ANAPAR_XTAL_3_8812F */ 3089 3090 /* 2 REG_NOT_VALID_8812F */ 3091 3092 #define BIT_SHIFT_XTAL_DUMMY_V1_8812F 7 3093 #define BIT_MASK_XTAL_DUMMY_V1_8812F 0x3f 3094 #define BIT_XTAL_DUMMY_V1_8812F(x) \ 3095 (((x) & BIT_MASK_XTAL_DUMMY_V1_8812F) << BIT_SHIFT_XTAL_DUMMY_V1_8812F) 3096 #define BITS_XTAL_DUMMY_V1_8812F \ 3097 (BIT_MASK_XTAL_DUMMY_V1_8812F << BIT_SHIFT_XTAL_DUMMY_V1_8812F) 3098 #define BIT_CLEAR_XTAL_DUMMY_V1_8812F(x) ((x) & (~BITS_XTAL_DUMMY_V1_8812F)) 3099 #define BIT_GET_XTAL_DUMMY_V1_8812F(x) \ 3100 (((x) >> BIT_SHIFT_XTAL_DUMMY_V1_8812F) & BIT_MASK_XTAL_DUMMY_V1_8812F) 3101 #define BIT_SET_XTAL_DUMMY_V1_8812F(x, v) \ 3102 (BIT_CLEAR_XTAL_DUMMY_V1_8812F(x) | BIT_XTAL_DUMMY_V1_8812F(v)) 3103 3104 #define BIT_XTAL_EN_LNBUF_8812F BIT(6) 3105 #define BIT_XTAL__AAC_TIE_MID_8812F BIT(5) 3106 3107 #define BIT_SHIFT_XTAL_AAC_OPCUR_8812F 3 3108 #define BIT_MASK_XTAL_AAC_OPCUR_8812F 0x3 3109 #define BIT_XTAL_AAC_OPCUR_8812F(x) \ 3110 (((x) & BIT_MASK_XTAL_AAC_OPCUR_8812F) \ 3111 << BIT_SHIFT_XTAL_AAC_OPCUR_8812F) 3112 #define BITS_XTAL_AAC_OPCUR_8812F \ 3113 (BIT_MASK_XTAL_AAC_OPCUR_8812F << BIT_SHIFT_XTAL_AAC_OPCUR_8812F) 3114 #define BIT_CLEAR_XTAL_AAC_OPCUR_8812F(x) ((x) & (~BITS_XTAL_AAC_OPCUR_8812F)) 3115 #define BIT_GET_XTAL_AAC_OPCUR_8812F(x) \ 3116 (((x) >> BIT_SHIFT_XTAL_AAC_OPCUR_8812F) & \ 3117 BIT_MASK_XTAL_AAC_OPCUR_8812F) 3118 #define BIT_SET_XTAL_AAC_OPCUR_8812F(x, v) \ 3119 (BIT_CLEAR_XTAL_AAC_OPCUR_8812F(x) | BIT_XTAL_AAC_OPCUR_8812F(v)) 3120 3121 #define BIT_SHIFT_XTAL_AAC_IOFFSET_8812F 1 3122 #define BIT_MASK_XTAL_AAC_IOFFSET_8812F 0x3 3123 #define BIT_XTAL_AAC_IOFFSET_8812F(x) \ 3124 (((x) & BIT_MASK_XTAL_AAC_IOFFSET_8812F) \ 3125 << BIT_SHIFT_XTAL_AAC_IOFFSET_8812F) 3126 #define BITS_XTAL_AAC_IOFFSET_8812F \ 3127 (BIT_MASK_XTAL_AAC_IOFFSET_8812F << BIT_SHIFT_XTAL_AAC_IOFFSET_8812F) 3128 #define BIT_CLEAR_XTAL_AAC_IOFFSET_8812F(x) \ 3129 ((x) & (~BITS_XTAL_AAC_IOFFSET_8812F)) 3130 #define BIT_GET_XTAL_AAC_IOFFSET_8812F(x) \ 3131 (((x) >> BIT_SHIFT_XTAL_AAC_IOFFSET_8812F) & \ 3132 BIT_MASK_XTAL_AAC_IOFFSET_8812F) 3133 #define BIT_SET_XTAL_AAC_IOFFSET_8812F(x, v) \ 3134 (BIT_CLEAR_XTAL_AAC_IOFFSET_8812F(x) | BIT_XTAL_AAC_IOFFSET_8812F(v)) 3135 3136 #define BIT_XTAL_AAC_CAP_V1_8812F BIT(0) 3137 3138 /* 2 REG_NOT_VALID_8812F */ 3139 3140 /* 2 REG_ANAPAR_XTAL_AACK_0_8812F */ 3141 #define BIT_XAAC_LPOW_8812F BIT(31) 3142 3143 #define BIT_SHIFT_AAC_MODE_8812F 29 3144 #define BIT_MASK_AAC_MODE_8812F 0x3 3145 #define BIT_AAC_MODE_8812F(x) \ 3146 (((x) & BIT_MASK_AAC_MODE_8812F) << BIT_SHIFT_AAC_MODE_8812F) 3147 #define BITS_AAC_MODE_8812F \ 3148 (BIT_MASK_AAC_MODE_8812F << BIT_SHIFT_AAC_MODE_8812F) 3149 #define BIT_CLEAR_AAC_MODE_8812F(x) ((x) & (~BITS_AAC_MODE_8812F)) 3150 #define BIT_GET_AAC_MODE_8812F(x) \ 3151 (((x) >> BIT_SHIFT_AAC_MODE_8812F) & BIT_MASK_AAC_MODE_8812F) 3152 #define BIT_SET_AAC_MODE_8812F(x, v) \ 3153 (BIT_CLEAR_AAC_MODE_8812F(x) | BIT_AAC_MODE_8812F(v)) 3154 3155 #define BIT_EN_XTAL_AAC_TRIG_8812F BIT(28) 3156 #define BIT_EN_XTAL_AAC_8812F BIT(27) 3157 #define BIT_EN_XTAL_AAC_DIGI_8812F BIT(26) 3158 3159 #define BIT_SHIFT_GM_MANUAL_8812F 21 3160 #define BIT_MASK_GM_MANUAL_8812F 0x1f 3161 #define BIT_GM_MANUAL_8812F(x) \ 3162 (((x) & BIT_MASK_GM_MANUAL_8812F) << BIT_SHIFT_GM_MANUAL_8812F) 3163 #define BITS_GM_MANUAL_8812F \ 3164 (BIT_MASK_GM_MANUAL_8812F << BIT_SHIFT_GM_MANUAL_8812F) 3165 #define BIT_CLEAR_GM_MANUAL_8812F(x) ((x) & (~BITS_GM_MANUAL_8812F)) 3166 #define BIT_GET_GM_MANUAL_8812F(x) \ 3167 (((x) >> BIT_SHIFT_GM_MANUAL_8812F) & BIT_MASK_GM_MANUAL_8812F) 3168 #define BIT_SET_GM_MANUAL_8812F(x, v) \ 3169 (BIT_CLEAR_GM_MANUAL_8812F(x) | BIT_GM_MANUAL_8812F(v)) 3170 3171 #define BIT_SHIFT_GM_STUP_8812F 16 3172 #define BIT_MASK_GM_STUP_8812F 0x1f 3173 #define BIT_GM_STUP_8812F(x) \ 3174 (((x) & BIT_MASK_GM_STUP_8812F) << BIT_SHIFT_GM_STUP_8812F) 3175 #define BITS_GM_STUP_8812F (BIT_MASK_GM_STUP_8812F << BIT_SHIFT_GM_STUP_8812F) 3176 #define BIT_CLEAR_GM_STUP_8812F(x) ((x) & (~BITS_GM_STUP_8812F)) 3177 #define BIT_GET_GM_STUP_8812F(x) \ 3178 (((x) >> BIT_SHIFT_GM_STUP_8812F) & BIT_MASK_GM_STUP_8812F) 3179 #define BIT_SET_GM_STUP_8812F(x, v) \ 3180 (BIT_CLEAR_GM_STUP_8812F(x) | BIT_GM_STUP_8812F(v)) 3181 3182 #define BIT_SHIFT_XTAL_CK_SET_8812F 13 3183 #define BIT_MASK_XTAL_CK_SET_8812F 0x7 3184 #define BIT_XTAL_CK_SET_8812F(x) \ 3185 (((x) & BIT_MASK_XTAL_CK_SET_8812F) << BIT_SHIFT_XTAL_CK_SET_8812F) 3186 #define BITS_XTAL_CK_SET_8812F \ 3187 (BIT_MASK_XTAL_CK_SET_8812F << BIT_SHIFT_XTAL_CK_SET_8812F) 3188 #define BIT_CLEAR_XTAL_CK_SET_8812F(x) ((x) & (~BITS_XTAL_CK_SET_8812F)) 3189 #define BIT_GET_XTAL_CK_SET_8812F(x) \ 3190 (((x) >> BIT_SHIFT_XTAL_CK_SET_8812F) & BIT_MASK_XTAL_CK_SET_8812F) 3191 #define BIT_SET_XTAL_CK_SET_8812F(x, v) \ 3192 (BIT_CLEAR_XTAL_CK_SET_8812F(x) | BIT_XTAL_CK_SET_8812F(v)) 3193 3194 #define BIT_SHIFT_GM_INIT_8812F 8 3195 #define BIT_MASK_GM_INIT_8812F 0x1f 3196 #define BIT_GM_INIT_8812F(x) \ 3197 (((x) & BIT_MASK_GM_INIT_8812F) << BIT_SHIFT_GM_INIT_8812F) 3198 #define BITS_GM_INIT_8812F (BIT_MASK_GM_INIT_8812F << BIT_SHIFT_GM_INIT_8812F) 3199 #define BIT_CLEAR_GM_INIT_8812F(x) ((x) & (~BITS_GM_INIT_8812F)) 3200 #define BIT_GET_GM_INIT_8812F(x) \ 3201 (((x) >> BIT_SHIFT_GM_INIT_8812F) & BIT_MASK_GM_INIT_8812F) 3202 #define BIT_SET_GM_INIT_8812F(x, v) \ 3203 (BIT_CLEAR_GM_INIT_8812F(x) | BIT_GM_INIT_8812F(v)) 3204 3205 #define BIT_GM_STEP_8812F BIT(7) 3206 3207 #define BIT_SHIFT_XAAC_GM_OFFSET_8812F 2 3208 #define BIT_MASK_XAAC_GM_OFFSET_8812F 0x1f 3209 #define BIT_XAAC_GM_OFFSET_8812F(x) \ 3210 (((x) & BIT_MASK_XAAC_GM_OFFSET_8812F) \ 3211 << BIT_SHIFT_XAAC_GM_OFFSET_8812F) 3212 #define BITS_XAAC_GM_OFFSET_8812F \ 3213 (BIT_MASK_XAAC_GM_OFFSET_8812F << BIT_SHIFT_XAAC_GM_OFFSET_8812F) 3214 #define BIT_CLEAR_XAAC_GM_OFFSET_8812F(x) ((x) & (~BITS_XAAC_GM_OFFSET_8812F)) 3215 #define BIT_GET_XAAC_GM_OFFSET_8812F(x) \ 3216 (((x) >> BIT_SHIFT_XAAC_GM_OFFSET_8812F) & \ 3217 BIT_MASK_XAAC_GM_OFFSET_8812F) 3218 #define BIT_SET_XAAC_GM_OFFSET_8812F(x, v) \ 3219 (BIT_CLEAR_XAAC_GM_OFFSET_8812F(x) | BIT_XAAC_GM_OFFSET_8812F(v)) 3220 3221 #define BIT_OFFSET_PLUS_8812F BIT(1) 3222 #define BIT_RESET_N_8812F BIT(0) 3223 3224 /* 2 REG_ANAPAR_XTAL_AACK_1_8812F */ 3225 3226 /* 2 REG_NOT_VALID_8812F */ 3227 3228 #define BIT_SHIFT_PK_END_AR_8812F 3 3229 #define BIT_MASK_PK_END_AR_8812F 0x3 3230 #define BIT_PK_END_AR_8812F(x) \ 3231 (((x) & BIT_MASK_PK_END_AR_8812F) << BIT_SHIFT_PK_END_AR_8812F) 3232 #define BITS_PK_END_AR_8812F \ 3233 (BIT_MASK_PK_END_AR_8812F << BIT_SHIFT_PK_END_AR_8812F) 3234 #define BIT_CLEAR_PK_END_AR_8812F(x) ((x) & (~BITS_PK_END_AR_8812F)) 3235 #define BIT_GET_PK_END_AR_8812F(x) \ 3236 (((x) >> BIT_SHIFT_PK_END_AR_8812F) & BIT_MASK_PK_END_AR_8812F) 3237 #define BIT_SET_PK_END_AR_8812F(x, v) \ 3238 (BIT_CLEAR_PK_END_AR_8812F(x) | BIT_PK_END_AR_8812F(v)) 3239 3240 #define BIT_SHIFT_PK_START_AR_8812F 1 3241 #define BIT_MASK_PK_START_AR_8812F 0x3 3242 #define BIT_PK_START_AR_8812F(x) \ 3243 (((x) & BIT_MASK_PK_START_AR_8812F) << BIT_SHIFT_PK_START_AR_8812F) 3244 #define BITS_PK_START_AR_8812F \ 3245 (BIT_MASK_PK_START_AR_8812F << BIT_SHIFT_PK_START_AR_8812F) 3246 #define BIT_CLEAR_PK_START_AR_8812F(x) ((x) & (~BITS_PK_START_AR_8812F)) 3247 #define BIT_GET_PK_START_AR_8812F(x) \ 3248 (((x) >> BIT_SHIFT_PK_START_AR_8812F) & BIT_MASK_PK_START_AR_8812F) 3249 #define BIT_SET_PK_START_AR_8812F(x, v) \ 3250 (BIT_CLEAR_PK_START_AR_8812F(x) | BIT_PK_START_AR_8812F(v)) 3251 3252 #define BIT_XAAC_LUT_MANUAL_EN_8812F BIT(0) 3253 3254 /* 2 REG_NOT_VALID_8812F */ 3255 3256 /* 2 REG_NOT_VALID_8812F */ 3257 3258 /* 2 REG_ANAPAR_XTAL_MODE_DECODER_8812F */ 3259 3260 /* 2 REG_NOT_VALID_8812F */ 3261 3262 #define BIT_SHIFT_XTAL_LDO_LPS_8812F 21 3263 #define BIT_MASK_XTAL_LDO_LPS_8812F 0x7 3264 #define BIT_XTAL_LDO_LPS_8812F(x) \ 3265 (((x) & BIT_MASK_XTAL_LDO_LPS_8812F) << BIT_SHIFT_XTAL_LDO_LPS_8812F) 3266 #define BITS_XTAL_LDO_LPS_8812F \ 3267 (BIT_MASK_XTAL_LDO_LPS_8812F << BIT_SHIFT_XTAL_LDO_LPS_8812F) 3268 #define BIT_CLEAR_XTAL_LDO_LPS_8812F(x) ((x) & (~BITS_XTAL_LDO_LPS_8812F)) 3269 #define BIT_GET_XTAL_LDO_LPS_8812F(x) \ 3270 (((x) >> BIT_SHIFT_XTAL_LDO_LPS_8812F) & BIT_MASK_XTAL_LDO_LPS_8812F) 3271 #define BIT_SET_XTAL_LDO_LPS_8812F(x, v) \ 3272 (BIT_CLEAR_XTAL_LDO_LPS_8812F(x) | BIT_XTAL_LDO_LPS_8812F(v)) 3273 3274 #define BIT_SHIFT_XTAL_WAIT_CYC_8812F 15 3275 #define BIT_MASK_XTAL_WAIT_CYC_8812F 0x3f 3276 #define BIT_XTAL_WAIT_CYC_8812F(x) \ 3277 (((x) & BIT_MASK_XTAL_WAIT_CYC_8812F) << BIT_SHIFT_XTAL_WAIT_CYC_8812F) 3278 #define BITS_XTAL_WAIT_CYC_8812F \ 3279 (BIT_MASK_XTAL_WAIT_CYC_8812F << BIT_SHIFT_XTAL_WAIT_CYC_8812F) 3280 #define BIT_CLEAR_XTAL_WAIT_CYC_8812F(x) ((x) & (~BITS_XTAL_WAIT_CYC_8812F)) 3281 #define BIT_GET_XTAL_WAIT_CYC_8812F(x) \ 3282 (((x) >> BIT_SHIFT_XTAL_WAIT_CYC_8812F) & BIT_MASK_XTAL_WAIT_CYC_8812F) 3283 #define BIT_SET_XTAL_WAIT_CYC_8812F(x, v) \ 3284 (BIT_CLEAR_XTAL_WAIT_CYC_8812F(x) | BIT_XTAL_WAIT_CYC_8812F(v)) 3285 3286 #define BIT_SHIFT_XTAL_LDO_OK_8812F 12 3287 #define BIT_MASK_XTAL_LDO_OK_8812F 0x7 3288 #define BIT_XTAL_LDO_OK_8812F(x) \ 3289 (((x) & BIT_MASK_XTAL_LDO_OK_8812F) << BIT_SHIFT_XTAL_LDO_OK_8812F) 3290 #define BITS_XTAL_LDO_OK_8812F \ 3291 (BIT_MASK_XTAL_LDO_OK_8812F << BIT_SHIFT_XTAL_LDO_OK_8812F) 3292 #define BIT_CLEAR_XTAL_LDO_OK_8812F(x) ((x) & (~BITS_XTAL_LDO_OK_8812F)) 3293 #define BIT_GET_XTAL_LDO_OK_8812F(x) \ 3294 (((x) >> BIT_SHIFT_XTAL_LDO_OK_8812F) & BIT_MASK_XTAL_LDO_OK_8812F) 3295 #define BIT_SET_XTAL_LDO_OK_8812F(x, v) \ 3296 (BIT_CLEAR_XTAL_LDO_OK_8812F(x) | BIT_XTAL_LDO_OK_8812F(v)) 3297 3298 #define BIT_XTAL_MD_LPOW_8812F BIT(11) 3299 3300 #define BIT_SHIFT_XTAL_OV_RATIO_8812F 9 3301 #define BIT_MASK_XTAL_OV_RATIO_8812F 0x3 3302 #define BIT_XTAL_OV_RATIO_8812F(x) \ 3303 (((x) & BIT_MASK_XTAL_OV_RATIO_8812F) << BIT_SHIFT_XTAL_OV_RATIO_8812F) 3304 #define BITS_XTAL_OV_RATIO_8812F \ 3305 (BIT_MASK_XTAL_OV_RATIO_8812F << BIT_SHIFT_XTAL_OV_RATIO_8812F) 3306 #define BIT_CLEAR_XTAL_OV_RATIO_8812F(x) ((x) & (~BITS_XTAL_OV_RATIO_8812F)) 3307 #define BIT_GET_XTAL_OV_RATIO_8812F(x) \ 3308 (((x) >> BIT_SHIFT_XTAL_OV_RATIO_8812F) & BIT_MASK_XTAL_OV_RATIO_8812F) 3309 #define BIT_SET_XTAL_OV_RATIO_8812F(x, v) \ 3310 (BIT_CLEAR_XTAL_OV_RATIO_8812F(x) | BIT_XTAL_OV_RATIO_8812F(v)) 3311 3312 #define BIT_SHIFT_XTAL_OV_UNIT_8812F 6 3313 #define BIT_MASK_XTAL_OV_UNIT_8812F 0x7 3314 #define BIT_XTAL_OV_UNIT_8812F(x) \ 3315 (((x) & BIT_MASK_XTAL_OV_UNIT_8812F) << BIT_SHIFT_XTAL_OV_UNIT_8812F) 3316 #define BITS_XTAL_OV_UNIT_8812F \ 3317 (BIT_MASK_XTAL_OV_UNIT_8812F << BIT_SHIFT_XTAL_OV_UNIT_8812F) 3318 #define BIT_CLEAR_XTAL_OV_UNIT_8812F(x) ((x) & (~BITS_XTAL_OV_UNIT_8812F)) 3319 #define BIT_GET_XTAL_OV_UNIT_8812F(x) \ 3320 (((x) >> BIT_SHIFT_XTAL_OV_UNIT_8812F) & BIT_MASK_XTAL_OV_UNIT_8812F) 3321 #define BIT_SET_XTAL_OV_UNIT_8812F(x, v) \ 3322 (BIT_CLEAR_XTAL_OV_UNIT_8812F(x) | BIT_XTAL_OV_UNIT_8812F(v)) 3323 3324 #define BIT_SHIFT_XTAL_MODE_MANUAL_8812F 4 3325 #define BIT_MASK_XTAL_MODE_MANUAL_8812F 0x3 3326 #define BIT_XTAL_MODE_MANUAL_8812F(x) \ 3327 (((x) & BIT_MASK_XTAL_MODE_MANUAL_8812F) \ 3328 << BIT_SHIFT_XTAL_MODE_MANUAL_8812F) 3329 #define BITS_XTAL_MODE_MANUAL_8812F \ 3330 (BIT_MASK_XTAL_MODE_MANUAL_8812F << BIT_SHIFT_XTAL_MODE_MANUAL_8812F) 3331 #define BIT_CLEAR_XTAL_MODE_MANUAL_8812F(x) \ 3332 ((x) & (~BITS_XTAL_MODE_MANUAL_8812F)) 3333 #define BIT_GET_XTAL_MODE_MANUAL_8812F(x) \ 3334 (((x) >> BIT_SHIFT_XTAL_MODE_MANUAL_8812F) & \ 3335 BIT_MASK_XTAL_MODE_MANUAL_8812F) 3336 #define BIT_SET_XTAL_MODE_MANUAL_8812F(x, v) \ 3337 (BIT_CLEAR_XTAL_MODE_MANUAL_8812F(x) | BIT_XTAL_MODE_MANUAL_8812F(v)) 3338 3339 #define BIT_XTAL_MANU_SEL_8812F BIT(3) 3340 3341 /* 2 REG_NOT_VALID_8812F */ 3342 #define BIT_XTAL_MODE_8812F BIT(1) 3343 #define BIT_RESET_N_DECODER_8812F BIT(0) 3344 3345 /* 2 REG_NOT_VALID_8812F */ 3346 3347 /* 2 REG_NOT_VALID_8812F */ 3348 3349 /* 2 REG_SYS_CFG5_8812F */ 3350 #define BIT_LPS_STATUS_8812F BIT(3) 3351 #define BIT_HCI_TXDMA_BUSY_8812F BIT(2) 3352 #define BIT_HCI_TXDMA_ALLOW_8812F BIT(1) 3353 #define BIT_FW_CTRL_HCI_TXDMA_EN_8812F BIT(0) 3354 3355 /* 2 REG_NOT_VALID_8812F */ 3356 3357 /* 2 REG_REGU_32K_1_8812F */ 3358 #define BIT_OUT_SEL_8812F BIT(26) 3359 3360 #define BIT_SHIFT_FREQ_SEL_8812F 24 3361 #define BIT_MASK_FREQ_SEL_8812F 0x3 3362 #define BIT_FREQ_SEL_8812F(x) \ 3363 (((x) & BIT_MASK_FREQ_SEL_8812F) << BIT_SHIFT_FREQ_SEL_8812F) 3364 #define BITS_FREQ_SEL_8812F \ 3365 (BIT_MASK_FREQ_SEL_8812F << BIT_SHIFT_FREQ_SEL_8812F) 3366 #define BIT_CLEAR_FREQ_SEL_8812F(x) ((x) & (~BITS_FREQ_SEL_8812F)) 3367 #define BIT_GET_FREQ_SEL_8812F(x) \ 3368 (((x) >> BIT_SHIFT_FREQ_SEL_8812F) & BIT_MASK_FREQ_SEL_8812F) 3369 #define BIT_SET_FREQ_SEL_8812F(x, v) \ 3370 (BIT_CLEAR_FREQ_SEL_8812F(x) | BIT_FREQ_SEL_8812F(v)) 3371 3372 #define BIT_SHIFT_CLKGEN0_8812F 16 3373 #define BIT_MASK_CLKGEN0_8812F 0xff 3374 #define BIT_CLKGEN0_8812F(x) \ 3375 (((x) & BIT_MASK_CLKGEN0_8812F) << BIT_SHIFT_CLKGEN0_8812F) 3376 #define BITS_CLKGEN0_8812F (BIT_MASK_CLKGEN0_8812F << BIT_SHIFT_CLKGEN0_8812F) 3377 #define BIT_CLEAR_CLKGEN0_8812F(x) ((x) & (~BITS_CLKGEN0_8812F)) 3378 #define BIT_GET_CLKGEN0_8812F(x) \ 3379 (((x) >> BIT_SHIFT_CLKGEN0_8812F) & BIT_MASK_CLKGEN0_8812F) 3380 #define BIT_SET_CLKGEN0_8812F(x, v) \ 3381 (BIT_CLEAR_CLKGEN0_8812F(x) | BIT_CLKGEN0_8812F(v)) 3382 3383 #define BIT_SHIFT_TEMP_COMP_8812F 12 3384 #define BIT_MASK_TEMP_COMP_8812F 0xf 3385 #define BIT_TEMP_COMP_8812F(x) \ 3386 (((x) & BIT_MASK_TEMP_COMP_8812F) << BIT_SHIFT_TEMP_COMP_8812F) 3387 #define BITS_TEMP_COMP_8812F \ 3388 (BIT_MASK_TEMP_COMP_8812F << BIT_SHIFT_TEMP_COMP_8812F) 3389 #define BIT_CLEAR_TEMP_COMP_8812F(x) ((x) & (~BITS_TEMP_COMP_8812F)) 3390 #define BIT_GET_TEMP_COMP_8812F(x) \ 3391 (((x) >> BIT_SHIFT_TEMP_COMP_8812F) & BIT_MASK_TEMP_COMP_8812F) 3392 #define BIT_SET_TEMP_COMP_8812F(x, v) \ 3393 (BIT_CLEAR_TEMP_COMP_8812F(x) | BIT_TEMP_COMP_8812F(v)) 3394 3395 #define BIT_SHIFT_LDO_V18ADJ_8812F 8 3396 #define BIT_MASK_LDO_V18ADJ_8812F 0xf 3397 #define BIT_LDO_V18ADJ_8812F(x) \ 3398 (((x) & BIT_MASK_LDO_V18ADJ_8812F) << BIT_SHIFT_LDO_V18ADJ_8812F) 3399 #define BITS_LDO_V18ADJ_8812F \ 3400 (BIT_MASK_LDO_V18ADJ_8812F << BIT_SHIFT_LDO_V18ADJ_8812F) 3401 #define BIT_CLEAR_LDO_V18ADJ_8812F(x) ((x) & (~BITS_LDO_V18ADJ_8812F)) 3402 #define BIT_GET_LDO_V18ADJ_8812F(x) \ 3403 (((x) >> BIT_SHIFT_LDO_V18ADJ_8812F) & BIT_MASK_LDO_V18ADJ_8812F) 3404 #define BIT_SET_LDO_V18ADJ_8812F(x, v) \ 3405 (BIT_CLEAR_LDO_V18ADJ_8812F(x) | BIT_LDO_V18ADJ_8812F(v)) 3406 3407 #define BIT_SHIFT_COMP_LOAD_CUR_8812F 5 3408 #define BIT_MASK_COMP_LOAD_CUR_8812F 0x3 3409 #define BIT_COMP_LOAD_CUR_8812F(x) \ 3410 (((x) & BIT_MASK_COMP_LOAD_CUR_8812F) << BIT_SHIFT_COMP_LOAD_CUR_8812F) 3411 #define BITS_COMP_LOAD_CUR_8812F \ 3412 (BIT_MASK_COMP_LOAD_CUR_8812F << BIT_SHIFT_COMP_LOAD_CUR_8812F) 3413 #define BIT_CLEAR_COMP_LOAD_CUR_8812F(x) ((x) & (~BITS_COMP_LOAD_CUR_8812F)) 3414 #define BIT_GET_COMP_LOAD_CUR_8812F(x) \ 3415 (((x) >> BIT_SHIFT_COMP_LOAD_CUR_8812F) & BIT_MASK_COMP_LOAD_CUR_8812F) 3416 #define BIT_SET_COMP_LOAD_CUR_8812F(x, v) \ 3417 (BIT_CLEAR_COMP_LOAD_CUR_8812F(x) | BIT_COMP_LOAD_CUR_8812F(v)) 3418 3419 #define BIT_SHIFT_COMP_LATCH_CUR_8812F 3 3420 #define BIT_MASK_COMP_LATCH_CUR_8812F 0x3 3421 #define BIT_COMP_LATCH_CUR_8812F(x) \ 3422 (((x) & BIT_MASK_COMP_LATCH_CUR_8812F) \ 3423 << BIT_SHIFT_COMP_LATCH_CUR_8812F) 3424 #define BITS_COMP_LATCH_CUR_8812F \ 3425 (BIT_MASK_COMP_LATCH_CUR_8812F << BIT_SHIFT_COMP_LATCH_CUR_8812F) 3426 #define BIT_CLEAR_COMP_LATCH_CUR_8812F(x) ((x) & (~BITS_COMP_LATCH_CUR_8812F)) 3427 #define BIT_GET_COMP_LATCH_CUR_8812F(x) \ 3428 (((x) >> BIT_SHIFT_COMP_LATCH_CUR_8812F) & \ 3429 BIT_MASK_COMP_LATCH_CUR_8812F) 3430 #define BIT_SET_COMP_LATCH_CUR_8812F(x, v) \ 3431 (BIT_CLEAR_COMP_LATCH_CUR_8812F(x) | BIT_COMP_LATCH_CUR_8812F(v)) 3432 3433 #define BIT_SHIFT_COMP_GM_CUR_8812F 1 3434 #define BIT_MASK_COMP_GM_CUR_8812F 0x3 3435 #define BIT_COMP_GM_CUR_8812F(x) \ 3436 (((x) & BIT_MASK_COMP_GM_CUR_8812F) << BIT_SHIFT_COMP_GM_CUR_8812F) 3437 #define BITS_COMP_GM_CUR_8812F \ 3438 (BIT_MASK_COMP_GM_CUR_8812F << BIT_SHIFT_COMP_GM_CUR_8812F) 3439 #define BIT_CLEAR_COMP_GM_CUR_8812F(x) ((x) & (~BITS_COMP_GM_CUR_8812F)) 3440 #define BIT_GET_COMP_GM_CUR_8812F(x) \ 3441 (((x) >> BIT_SHIFT_COMP_GM_CUR_8812F) & BIT_MASK_COMP_GM_CUR_8812F) 3442 #define BIT_SET_COMP_GM_CUR_8812F(x, v) \ 3443 (BIT_CLEAR_COMP_GM_CUR_8812F(x) | BIT_COMP_GM_CUR_8812F(v)) 3444 3445 /* 2 REG_REGU_32K_2_8812F */ 3446 #define BIT_SEL_RCAL_SOURCE_8812F BIT(16) 3447 3448 #define BIT_SHIFT_RCAL_8812F 0 3449 #define BIT_MASK_RCAL_8812F 0x3f 3450 #define BIT_RCAL_8812F(x) (((x) & BIT_MASK_RCAL_8812F) << BIT_SHIFT_RCAL_8812F) 3451 #define BITS_RCAL_8812F (BIT_MASK_RCAL_8812F << BIT_SHIFT_RCAL_8812F) 3452 #define BIT_CLEAR_RCAL_8812F(x) ((x) & (~BITS_RCAL_8812F)) 3453 #define BIT_GET_RCAL_8812F(x) \ 3454 (((x) >> BIT_SHIFT_RCAL_8812F) & BIT_MASK_RCAL_8812F) 3455 #define BIT_SET_RCAL_8812F(x, v) (BIT_CLEAR_RCAL_8812F(x) | BIT_RCAL_8812F(v)) 3456 3457 /* 2 REG_CPU_DMEM_CON_8812F */ 3458 #define BIT_WDT_AUTO_MODE_8812F BIT(22) 3459 #define BIT_WDT_PLATFORM_EN_8812F BIT(21) 3460 #define BIT_WDT_CPU_EN_8812F BIT(20) 3461 #define BIT_WDT_OPT_IOWRAPPER_8812F BIT(19) 3462 #define BIT_ANA_PORT_IDLE_8812F BIT(18) 3463 #define BIT_MAC_PORT_IDLE_8812F BIT(17) 3464 #define BIT_WL_PLATFORM_RST_8812F BIT(16) 3465 #define BIT_WL_SECURITY_CLK_8812F BIT(15) 3466 #define BIT_DDMA_EN_8812F BIT(8) 3467 3468 #define BIT_SHIFT_CPU_DMEM_CON_8812F 0 3469 #define BIT_MASK_CPU_DMEM_CON_8812F 0xff 3470 #define BIT_CPU_DMEM_CON_8812F(x) \ 3471 (((x) & BIT_MASK_CPU_DMEM_CON_8812F) << BIT_SHIFT_CPU_DMEM_CON_8812F) 3472 #define BITS_CPU_DMEM_CON_8812F \ 3473 (BIT_MASK_CPU_DMEM_CON_8812F << BIT_SHIFT_CPU_DMEM_CON_8812F) 3474 #define BIT_CLEAR_CPU_DMEM_CON_8812F(x) ((x) & (~BITS_CPU_DMEM_CON_8812F)) 3475 #define BIT_GET_CPU_DMEM_CON_8812F(x) \ 3476 (((x) >> BIT_SHIFT_CPU_DMEM_CON_8812F) & BIT_MASK_CPU_DMEM_CON_8812F) 3477 #define BIT_SET_CPU_DMEM_CON_8812F(x, v) \ 3478 (BIT_CLEAR_CPU_DMEM_CON_8812F(x) | BIT_CPU_DMEM_CON_8812F(v)) 3479 3480 /* 2 REG_NOT_VALID_8812F */ 3481 3482 /* 2 REG_BOOT_REASON_8812F */ 3483 3484 #define BIT_SHIFT_BOOT_REASON_V1_8812F 0 3485 #define BIT_MASK_BOOT_REASON_V1_8812F 0x7 3486 #define BIT_BOOT_REASON_V1_8812F(x) \ 3487 (((x) & BIT_MASK_BOOT_REASON_V1_8812F) \ 3488 << BIT_SHIFT_BOOT_REASON_V1_8812F) 3489 #define BITS_BOOT_REASON_V1_8812F \ 3490 (BIT_MASK_BOOT_REASON_V1_8812F << BIT_SHIFT_BOOT_REASON_V1_8812F) 3491 #define BIT_CLEAR_BOOT_REASON_V1_8812F(x) ((x) & (~BITS_BOOT_REASON_V1_8812F)) 3492 #define BIT_GET_BOOT_REASON_V1_8812F(x) \ 3493 (((x) >> BIT_SHIFT_BOOT_REASON_V1_8812F) & \ 3494 BIT_MASK_BOOT_REASON_V1_8812F) 3495 #define BIT_SET_BOOT_REASON_V1_8812F(x, v) \ 3496 (BIT_CLEAR_BOOT_REASON_V1_8812F(x) | BIT_BOOT_REASON_V1_8812F(v)) 3497 3498 /* 2 REG_NOT_VALID_8812F */ 3499 3500 /* 2 REG_NOT_VALID_8812F */ 3501 3502 /* 2 REG_NOT_VALID_8812F */ 3503 3504 /* 2 REG_NOT_VALID_8812F */ 3505 3506 /* 2 REG_NOT_VALID_8812F */ 3507 3508 /* 2 REG_NOT_VALID_8812F */ 3509 3510 /* 2 REG_NOT_VALID_8812F */ 3511 3512 /* 2 REG_NOT_VALID_8812F */ 3513 3514 /* 2 REG_NOT_VALID_8812F */ 3515 3516 /* 2 REG_HIMR2_8812F */ 3517 #define BIT_BCNDMAINT_P4_MSK_8812F BIT(31) 3518 #define BIT_BCNDMAINT_P3_MSK_8812F BIT(30) 3519 #define BIT_BCNDMAINT_P2_MSK_8812F BIT(29) 3520 #define BIT_BCNDMAINT_P1_MSK_8812F BIT(28) 3521 #define BIT_ATIMEND7_MSK_8812F BIT(22) 3522 #define BIT_ATIMEND6_MSK_8812F BIT(21) 3523 #define BIT_ATIMEND5_MSK_8812F BIT(20) 3524 #define BIT_ATIMEND4_MSK_8812F BIT(19) 3525 #define BIT_ATIMEND3_MSK_8812F BIT(18) 3526 #define BIT_ATIMEND2_MSK_8812F BIT(17) 3527 #define BIT_ATIMEND1_MSK_8812F BIT(16) 3528 #define BIT_TXBCN7OK_MSK_8812F BIT(14) 3529 #define BIT_TXBCN6OK_MSK_8812F BIT(13) 3530 #define BIT_TXBCN5OK_MSK_8812F BIT(12) 3531 #define BIT_TXBCN4OK_MSK_8812F BIT(11) 3532 #define BIT_TXBCN3OK_MSK_8812F BIT(10) 3533 #define BIT_TXBCN2OK_MSK_8812F BIT(9) 3534 #define BIT_TXBCN1OK_MSK_V1_8812F BIT(8) 3535 #define BIT_TXBCN7ERR_MSK_8812F BIT(6) 3536 #define BIT_TXBCN6ERR_MSK_8812F BIT(5) 3537 #define BIT_TXBCN5ERR_MSK_8812F BIT(4) 3538 #define BIT_TXBCN4ERR_MSK_8812F BIT(3) 3539 #define BIT_TXBCN3ERR_MSK_8812F BIT(2) 3540 #define BIT_TXBCN2ERR_MSK_8812F BIT(1) 3541 #define BIT_TXBCN1ERR_MSK_V1_8812F BIT(0) 3542 3543 /* 2 REG_HISR2_8812F */ 3544 #define BIT_BCNDMAINT_P4_8812F BIT(31) 3545 #define BIT_BCNDMAINT_P3_8812F BIT(30) 3546 #define BIT_BCNDMAINT_P2_8812F BIT(29) 3547 #define BIT_BCNDMAINT_P1_8812F BIT(28) 3548 #define BIT_ATIMEND7_8812F BIT(22) 3549 #define BIT_ATIMEND6_8812F BIT(21) 3550 #define BIT_ATIMEND5_8812F BIT(20) 3551 #define BIT_ATIMEND4_8812F BIT(19) 3552 #define BIT_ATIMEND3_8812F BIT(18) 3553 #define BIT_ATIMEND2_8812F BIT(17) 3554 #define BIT_ATIMEND1_8812F BIT(16) 3555 #define BIT_TXBCN7OK_8812F BIT(14) 3556 #define BIT_TXBCN6OK_8812F BIT(13) 3557 #define BIT_TXBCN5OK_8812F BIT(12) 3558 #define BIT_TXBCN4OK_8812F BIT(11) 3559 #define BIT_TXBCN3OK_8812F BIT(10) 3560 #define BIT_TXBCN2OK_8812F BIT(9) 3561 #define BIT_TXBCN1OK_8812F BIT(8) 3562 #define BIT_TXBCN7ERR_8812F BIT(6) 3563 #define BIT_TXBCN6ERR_8812F BIT(5) 3564 #define BIT_TXBCN5ERR_8812F BIT(4) 3565 #define BIT_TXBCN4ERR_8812F BIT(3) 3566 #define BIT_TXBCN3ERR_8812F BIT(2) 3567 #define BIT_TXBCN2ERR_8812F BIT(1) 3568 #define BIT_TXBCN1ERR_8812F BIT(0) 3569 3570 /* 2 REG_HIMR3_8812F */ 3571 #define BIT_WDT_PLATFORM_INT_MSK_8812F BIT(18) 3572 #define BIT_WDT_CPU_INT_MSK_8812F BIT(17) 3573 #define BIT_SETH2CDOK_MASK_8812F BIT(16) 3574 #define BIT_H2C_CMD_FULL_MASK_8812F BIT(15) 3575 #define BIT_PWR_INT_127_MASK_8812F BIT(14) 3576 #define BIT_TXSHORTCUT_TXDESUPDATEOK_MASK_8812F BIT(13) 3577 #define BIT_TXSHORTCUT_BKUPDATEOK_MASK_8812F BIT(12) 3578 #define BIT_TXSHORTCUT_BEUPDATEOK_MASK_8812F BIT(11) 3579 #define BIT_TXSHORTCUT_VIUPDATEOK_MAS_8812F BIT(10) 3580 #define BIT_TXSHORTCUT_VOUPDATEOK_MASK_8812F BIT(9) 3581 #define BIT_PWR_INT_127_MASK_V1_8812F BIT(8) 3582 #define BIT_PWR_INT_126TO96_MASK_8812F BIT(7) 3583 #define BIT_PWR_INT_95TO64_MASK_8812F BIT(6) 3584 #define BIT_PWR_INT_63TO32_MASK_8812F BIT(5) 3585 #define BIT_PWR_INT_31TO0_MASK_8812F BIT(4) 3586 #define BIT_RX_DMA_STUCK_MSK_8812F BIT(3) 3587 #define BIT_TX_DMA_STUCK_MSK_8812F BIT(2) 3588 #define BIT_DDMA0_LP_INT_MSK_8812F BIT(1) 3589 #define BIT_DDMA0_HP_INT_MSK_8812F BIT(0) 3590 3591 /* 2 REG_HISR3_8812F */ 3592 #define BIT_WDT_PLATFORM_INT_8812F BIT(18) 3593 #define BIT_WDT_CPU_INT_8812F BIT(17) 3594 #define BIT_SETH2CDOK_8812F BIT(16) 3595 #define BIT_H2C_CMD_FULL_8812F BIT(15) 3596 #define BIT_PWR_INT_127_8812F BIT(14) 3597 #define BIT_TXSHORTCUT_TXDESUPDATEOK_8812F BIT(13) 3598 #define BIT_TXSHORTCUT_BKUPDATEOK_8812F BIT(12) 3599 #define BIT_TXSHORTCUT_BEUPDATEOK_8812F BIT(11) 3600 #define BIT_TXSHORTCUT_VIUPDATEOK_8812F BIT(10) 3601 #define BIT_TXSHORTCUT_VOUPDATEOK_8812F BIT(9) 3602 #define BIT_PWR_INT_127_V1_8812F BIT(8) 3603 #define BIT_PWR_INT_126TO96_8812F BIT(7) 3604 #define BIT_PWR_INT_95TO64_8812F BIT(6) 3605 #define BIT_PWR_INT_63TO32_8812F BIT(5) 3606 #define BIT_PWR_INT_31TO0_8812F BIT(4) 3607 #define BIT_RX_DMA_STUCK_8812F BIT(3) 3608 #define BIT_TX_DMA_STUCK_8812F BIT(2) 3609 #define BIT_DDMA0_LP_INT_8812F BIT(1) 3610 #define BIT_DDMA0_HP_INT_8812F BIT(0) 3611 3612 /* 2 REG_SW_MDIO_8812F */ 3613 #define BIT_DIS_TIMEOUT_IO_8812F BIT(24) 3614 3615 /* 2 REG_NOT_VALID_8812F */ 3616 3617 /* 2 REG_NOT_VALID_8812F */ 3618 3619 /* 2 REG_NOT_VALID_8812F */ 3620 3621 /* 2 REG_H2C_PKT_READADDR_8812F */ 3622 3623 #define BIT_SHIFT_H2C_PKT_READADDR_8812F 0 3624 #define BIT_MASK_H2C_PKT_READADDR_8812F 0x3ffff 3625 #define BIT_H2C_PKT_READADDR_8812F(x) \ 3626 (((x) & BIT_MASK_H2C_PKT_READADDR_8812F) \ 3627 << BIT_SHIFT_H2C_PKT_READADDR_8812F) 3628 #define BITS_H2C_PKT_READADDR_8812F \ 3629 (BIT_MASK_H2C_PKT_READADDR_8812F << BIT_SHIFT_H2C_PKT_READADDR_8812F) 3630 #define BIT_CLEAR_H2C_PKT_READADDR_8812F(x) \ 3631 ((x) & (~BITS_H2C_PKT_READADDR_8812F)) 3632 #define BIT_GET_H2C_PKT_READADDR_8812F(x) \ 3633 (((x) >> BIT_SHIFT_H2C_PKT_READADDR_8812F) & \ 3634 BIT_MASK_H2C_PKT_READADDR_8812F) 3635 #define BIT_SET_H2C_PKT_READADDR_8812F(x, v) \ 3636 (BIT_CLEAR_H2C_PKT_READADDR_8812F(x) | BIT_H2C_PKT_READADDR_8812F(v)) 3637 3638 /* 2 REG_H2C_PKT_WRITEADDR_8812F */ 3639 3640 #define BIT_SHIFT_H2C_PKT_WRITEADDR_8812F 0 3641 #define BIT_MASK_H2C_PKT_WRITEADDR_8812F 0x3ffff 3642 #define BIT_H2C_PKT_WRITEADDR_8812F(x) \ 3643 (((x) & BIT_MASK_H2C_PKT_WRITEADDR_8812F) \ 3644 << BIT_SHIFT_H2C_PKT_WRITEADDR_8812F) 3645 #define BITS_H2C_PKT_WRITEADDR_8812F \ 3646 (BIT_MASK_H2C_PKT_WRITEADDR_8812F << BIT_SHIFT_H2C_PKT_WRITEADDR_8812F) 3647 #define BIT_CLEAR_H2C_PKT_WRITEADDR_8812F(x) \ 3648 ((x) & (~BITS_H2C_PKT_WRITEADDR_8812F)) 3649 #define BIT_GET_H2C_PKT_WRITEADDR_8812F(x) \ 3650 (((x) >> BIT_SHIFT_H2C_PKT_WRITEADDR_8812F) & \ 3651 BIT_MASK_H2C_PKT_WRITEADDR_8812F) 3652 #define BIT_SET_H2C_PKT_WRITEADDR_8812F(x, v) \ 3653 (BIT_CLEAR_H2C_PKT_WRITEADDR_8812F(x) | BIT_H2C_PKT_WRITEADDR_8812F(v)) 3654 3655 /* 2 REG_MEM_PWR_CRTL_8812F */ 3656 #define BIT_MEM_BB_SD_8812F BIT(17) 3657 #define BIT_MEM_BB_DS_8812F BIT(16) 3658 #define BIT_MEM_BT_DS_8812F BIT(10) 3659 #define BIT_MEM_SDIO_LS_8812F BIT(9) 3660 #define BIT_MEM_SDIO_DS_8812F BIT(8) 3661 #define BIT_MEM_USB_LS_8812F BIT(7) 3662 #define BIT_MEM_USB_DS_8812F BIT(6) 3663 #define BIT_MEM_PCI_LS_8812F BIT(5) 3664 #define BIT_MEM_PCI_DS_8812F BIT(4) 3665 #define BIT_MEM_WLMAC_LS_8812F BIT(3) 3666 #define BIT_MEM_WLMAC_DS_8812F BIT(2) 3667 #define BIT_MEM_WLMCU_LS_8812F BIT(1) 3668 #define BIT_MEM_WLMCU_DS_8812F BIT(0) 3669 3670 /* 2 REG_NOT_VALID_8812F */ 3671 3672 /* 2 REG_NOT_VALID_8812F */ 3673 3674 /* 2 REG_NOT_VALID_8812F */ 3675 3676 /* 2 REG_NOT_VALID_8812F */ 3677 3678 /* 2 REG_NOT_VALID_8812F */ 3679 3680 /* 2 REG_NOT_VALID_8812F */ 3681 3682 /* 2 REG_NOT_VALID_8812F */ 3683 3684 /* 2 REG_FW_DBG6_8812F */ 3685 3686 #define BIT_SHIFT_FW_DBG6_8812F 0 3687 #define BIT_MASK_FW_DBG6_8812F 0xffffffffL 3688 #define BIT_FW_DBG6_8812F(x) \ 3689 (((x) & BIT_MASK_FW_DBG6_8812F) << BIT_SHIFT_FW_DBG6_8812F) 3690 #define BITS_FW_DBG6_8812F (BIT_MASK_FW_DBG6_8812F << BIT_SHIFT_FW_DBG6_8812F) 3691 #define BIT_CLEAR_FW_DBG6_8812F(x) ((x) & (~BITS_FW_DBG6_8812F)) 3692 #define BIT_GET_FW_DBG6_8812F(x) \ 3693 (((x) >> BIT_SHIFT_FW_DBG6_8812F) & BIT_MASK_FW_DBG6_8812F) 3694 #define BIT_SET_FW_DBG6_8812F(x, v) \ 3695 (BIT_CLEAR_FW_DBG6_8812F(x) | BIT_FW_DBG6_8812F(v)) 3696 3697 /* 2 REG_FW_DBG7_8812F */ 3698 3699 #define BIT_SHIFT_FW_DBG7_8812F 0 3700 #define BIT_MASK_FW_DBG7_8812F 0xffffffffL 3701 #define BIT_FW_DBG7_8812F(x) \ 3702 (((x) & BIT_MASK_FW_DBG7_8812F) << BIT_SHIFT_FW_DBG7_8812F) 3703 #define BITS_FW_DBG7_8812F (BIT_MASK_FW_DBG7_8812F << BIT_SHIFT_FW_DBG7_8812F) 3704 #define BIT_CLEAR_FW_DBG7_8812F(x) ((x) & (~BITS_FW_DBG7_8812F)) 3705 #define BIT_GET_FW_DBG7_8812F(x) \ 3706 (((x) >> BIT_SHIFT_FW_DBG7_8812F) & BIT_MASK_FW_DBG7_8812F) 3707 #define BIT_SET_FW_DBG7_8812F(x, v) \ 3708 (BIT_CLEAR_FW_DBG7_8812F(x) | BIT_FW_DBG7_8812F(v)) 3709 3710 /* 2 REG_NOT_VALID_8812F */ 3711 3712 /* 2 REG_NOT_VALID_8812F */ 3713 3714 /* 2 REG_NOT_VALID_8812F */ 3715 3716 /* 2 REG_NOT_VALID_8812F */ 3717 3718 /* 2 REG_NOT_VALID_8812F */ 3719 3720 /* 2 REG_NOT_VALID_8812F */ 3721 3722 /* 2 REG_NOT_VALID_8812F */ 3723 3724 /* 2 REG_NOT_VALID_8812F */ 3725 3726 /* 2 REG_NOT_VALID_8812F */ 3727 3728 /* 2 REG_NOT_VALID_8812F */ 3729 3730 /* 2 REG_NOT_VALID_8812F */ 3731 3732 /* 2 REG_NOT_VALID_8812F */ 3733 3734 /* 2 REG_NOT_VALID_8812F */ 3735 3736 /* 2 REG_NOT_VALID_8812F */ 3737 3738 /* 2 REG_NOT_VALID_8812F */ 3739 3740 /* 2 REG_NOT_VALID_8812F */ 3741 3742 /* 2 REG_NOT_VALID_8812F */ 3743 3744 /* 2 REG_NOT_VALID_8812F */ 3745 3746 /* 2 REG_NOT_VALID_8812F */ 3747 3748 /* 2 REG_NOT_VALID_8812F */ 3749 3750 /* 2 REG_NOT_VALID_8812F */ 3751 3752 /* 2 REG_NOT_VALID_8812F */ 3753 3754 /* 2 REG_NOT_VALID_8812F */ 3755 3756 /* 2 REG_NOT_VALID_8812F */ 3757 3758 /* 2 REG_NOT_VALID_8812F */ 3759 3760 /* 2 REG_NOT_VALID_8812F */ 3761 3762 /* 2 REG_NOT_VALID_8812F */ 3763 3764 /* 2 REG_NOT_VALID_8812F */ 3765 3766 /* 2 REG_NOT_VALID_8812F */ 3767 3768 /* 2 REG_NOT_VALID_8812F */ 3769 3770 /* 2 REG_NOT_VALID_8812F */ 3771 3772 /* 2 REG_NOT_VALID_8812F */ 3773 3774 /* 2 REG_NOT_VALID_8812F */ 3775 3776 /* 2 REG_NOT_VALID_8812F */ 3777 3778 /* 2 REG_NOT_VALID_8812F */ 3779 3780 /* 2 REG_NOT_VALID_8812F */ 3781 3782 /* 2 REG_NOT_VALID_8812F */ 3783 3784 /* 2 REG_NOT_VALID_8812F */ 3785 3786 /* 2 REG_NOT_VALID_8812F */ 3787 3788 /* 2 REG_NOT_VALID_8812F */ 3789 3790 /* 2 REG_NOT_VALID_8812F */ 3791 3792 /* 2 REG_NOT_VALID_8812F */ 3793 3794 /* 2 REG_NOT_VALID_8812F */ 3795 3796 /* 2 REG_NOT_VALID_8812F */ 3797 3798 /* 2 REG_NOT_VALID_8812F */ 3799 3800 /* 2 REG_NOT_VALID_8812F */ 3801 3802 /* 2 REG_NOT_VALID_8812F */ 3803 3804 /* 2 REG_NOT_VALID_8812F */ 3805 3806 /* 2 REG_NOT_VALID_8812F */ 3807 3808 /* 2 REG_NOT_VALID_8812F */ 3809 3810 /* 2 REG_NOT_VALID_8812F */ 3811 3812 /* 2 REG_NOT_VALID_8812F */ 3813 3814 /* 2 REG_NOT_VALID_8812F */ 3815 3816 /* 2 REG_NOT_VALID_8812F */ 3817 3818 /* 2 REG_NOT_VALID_8812F */ 3819 3820 /* 2 REG_NOT_VALID_8812F */ 3821 3822 /* 2 REG_NOT_VALID_8812F */ 3823 3824 /* 2 REG_NOT_VALID_8812F */ 3825 3826 /* 2 REG_NOT_VALID_8812F */ 3827 3828 /* 2 REG_NOT_VALID_8812F */ 3829 3830 /* 2 REG_NOT_VALID_8812F */ 3831 3832 /* 2 REG_NOT_VALID_8812F */ 3833 3834 /* 2 REG_NOT_VALID_8812F */ 3835 3836 /* 2 REG_NOT_VALID_8812F */ 3837 3838 /* 2 REG_NOT_VALID_8812F */ 3839 3840 /* 2 REG_CR_8812F */ 3841 3842 #define BIT_SHIFT_LBMODE_8812F 24 3843 #define BIT_MASK_LBMODE_8812F 0x1f 3844 #define BIT_LBMODE_8812F(x) \ 3845 (((x) & BIT_MASK_LBMODE_8812F) << BIT_SHIFT_LBMODE_8812F) 3846 #define BITS_LBMODE_8812F (BIT_MASK_LBMODE_8812F << BIT_SHIFT_LBMODE_8812F) 3847 #define BIT_CLEAR_LBMODE_8812F(x) ((x) & (~BITS_LBMODE_8812F)) 3848 #define BIT_GET_LBMODE_8812F(x) \ 3849 (((x) >> BIT_SHIFT_LBMODE_8812F) & BIT_MASK_LBMODE_8812F) 3850 #define BIT_SET_LBMODE_8812F(x, v) \ 3851 (BIT_CLEAR_LBMODE_8812F(x) | BIT_LBMODE_8812F(v)) 3852 3853 #define BIT_SHIFT_NETYPE1_8812F 18 3854 #define BIT_MASK_NETYPE1_8812F 0x3 3855 #define BIT_NETYPE1_8812F(x) \ 3856 (((x) & BIT_MASK_NETYPE1_8812F) << BIT_SHIFT_NETYPE1_8812F) 3857 #define BITS_NETYPE1_8812F (BIT_MASK_NETYPE1_8812F << BIT_SHIFT_NETYPE1_8812F) 3858 #define BIT_CLEAR_NETYPE1_8812F(x) ((x) & (~BITS_NETYPE1_8812F)) 3859 #define BIT_GET_NETYPE1_8812F(x) \ 3860 (((x) >> BIT_SHIFT_NETYPE1_8812F) & BIT_MASK_NETYPE1_8812F) 3861 #define BIT_SET_NETYPE1_8812F(x, v) \ 3862 (BIT_CLEAR_NETYPE1_8812F(x) | BIT_NETYPE1_8812F(v)) 3863 3864 #define BIT_SHIFT_NETYPE0_8812F 16 3865 #define BIT_MASK_NETYPE0_8812F 0x3 3866 #define BIT_NETYPE0_8812F(x) \ 3867 (((x) & BIT_MASK_NETYPE0_8812F) << BIT_SHIFT_NETYPE0_8812F) 3868 #define BITS_NETYPE0_8812F (BIT_MASK_NETYPE0_8812F << BIT_SHIFT_NETYPE0_8812F) 3869 #define BIT_CLEAR_NETYPE0_8812F(x) ((x) & (~BITS_NETYPE0_8812F)) 3870 #define BIT_GET_NETYPE0_8812F(x) \ 3871 (((x) >> BIT_SHIFT_NETYPE0_8812F) & BIT_MASK_NETYPE0_8812F) 3872 #define BIT_SET_NETYPE0_8812F(x, v) \ 3873 (BIT_CLEAR_NETYPE0_8812F(x) | BIT_NETYPE0_8812F(v)) 3874 3875 #define BIT_COUNTER_STS_EN_8812F BIT(13) 3876 #define BIT_I2C_MAILBOX_EN_8812F BIT(12) 3877 #define BIT_SHCUT_EN_8812F BIT(11) 3878 #define BIT_32K_CAL_TMR_EN_8812F BIT(10) 3879 #define BIT_MAC_SEC_EN_8812F BIT(9) 3880 #define BIT_ENSWBCN_8812F BIT(8) 3881 #define BIT_MACRXEN_8812F BIT(7) 3882 #define BIT_MACTXEN_8812F BIT(6) 3883 #define BIT_SCHEDULE_EN_8812F BIT(5) 3884 #define BIT_PROTOCOL_EN_8812F BIT(4) 3885 #define BIT_RXDMA_EN_8812F BIT(3) 3886 #define BIT_TXDMA_EN_8812F BIT(2) 3887 #define BIT_HCI_RXDMA_EN_8812F BIT(1) 3888 #define BIT_HCI_TXDMA_EN_8812F BIT(0) 3889 3890 /* 2 REG_PG_SIZE_8812F */ 3891 3892 #define BIT_SHIFT_DBG_FIFO_SEL_8812F 16 3893 #define BIT_MASK_DBG_FIFO_SEL_8812F 0xff 3894 #define BIT_DBG_FIFO_SEL_8812F(x) \ 3895 (((x) & BIT_MASK_DBG_FIFO_SEL_8812F) << BIT_SHIFT_DBG_FIFO_SEL_8812F) 3896 #define BITS_DBG_FIFO_SEL_8812F \ 3897 (BIT_MASK_DBG_FIFO_SEL_8812F << BIT_SHIFT_DBG_FIFO_SEL_8812F) 3898 #define BIT_CLEAR_DBG_FIFO_SEL_8812F(x) ((x) & (~BITS_DBG_FIFO_SEL_8812F)) 3899 #define BIT_GET_DBG_FIFO_SEL_8812F(x) \ 3900 (((x) >> BIT_SHIFT_DBG_FIFO_SEL_8812F) & BIT_MASK_DBG_FIFO_SEL_8812F) 3901 #define BIT_SET_DBG_FIFO_SEL_8812F(x, v) \ 3902 (BIT_CLEAR_DBG_FIFO_SEL_8812F(x) | BIT_DBG_FIFO_SEL_8812F(v)) 3903 3904 /* 2 REG_PKT_BUFF_ACCESS_CTRL_8812F */ 3905 3906 #define BIT_SHIFT_PKT_BUFF_ACCESS_CTRL_8812F 0 3907 #define BIT_MASK_PKT_BUFF_ACCESS_CTRL_8812F 0xff 3908 #define BIT_PKT_BUFF_ACCESS_CTRL_8812F(x) \ 3909 (((x) & BIT_MASK_PKT_BUFF_ACCESS_CTRL_8812F) \ 3910 << BIT_SHIFT_PKT_BUFF_ACCESS_CTRL_8812F) 3911 #define BITS_PKT_BUFF_ACCESS_CTRL_8812F \ 3912 (BIT_MASK_PKT_BUFF_ACCESS_CTRL_8812F \ 3913 << BIT_SHIFT_PKT_BUFF_ACCESS_CTRL_8812F) 3914 #define BIT_CLEAR_PKT_BUFF_ACCESS_CTRL_8812F(x) \ 3915 ((x) & (~BITS_PKT_BUFF_ACCESS_CTRL_8812F)) 3916 #define BIT_GET_PKT_BUFF_ACCESS_CTRL_8812F(x) \ 3917 (((x) >> BIT_SHIFT_PKT_BUFF_ACCESS_CTRL_8812F) & \ 3918 BIT_MASK_PKT_BUFF_ACCESS_CTRL_8812F) 3919 #define BIT_SET_PKT_BUFF_ACCESS_CTRL_8812F(x, v) \ 3920 (BIT_CLEAR_PKT_BUFF_ACCESS_CTRL_8812F(x) | \ 3921 BIT_PKT_BUFF_ACCESS_CTRL_8812F(v)) 3922 3923 /* 2 REG_TSF_CLK_STATE_8812F */ 3924 #define BIT_TSF_CLK_STABLE_8812F BIT(15) 3925 3926 /* 2 REG_TXDMA_PQ_MAP_8812F */ 3927 #define BIT_CSI_BW_EN_8812F BIT(31) 3928 3929 #define BIT_SHIFT_TXDMA_H2C_MAP_8812F 16 3930 #define BIT_MASK_TXDMA_H2C_MAP_8812F 0x3 3931 #define BIT_TXDMA_H2C_MAP_8812F(x) \ 3932 (((x) & BIT_MASK_TXDMA_H2C_MAP_8812F) << BIT_SHIFT_TXDMA_H2C_MAP_8812F) 3933 #define BITS_TXDMA_H2C_MAP_8812F \ 3934 (BIT_MASK_TXDMA_H2C_MAP_8812F << BIT_SHIFT_TXDMA_H2C_MAP_8812F) 3935 #define BIT_CLEAR_TXDMA_H2C_MAP_8812F(x) ((x) & (~BITS_TXDMA_H2C_MAP_8812F)) 3936 #define BIT_GET_TXDMA_H2C_MAP_8812F(x) \ 3937 (((x) >> BIT_SHIFT_TXDMA_H2C_MAP_8812F) & BIT_MASK_TXDMA_H2C_MAP_8812F) 3938 #define BIT_SET_TXDMA_H2C_MAP_8812F(x, v) \ 3939 (BIT_CLEAR_TXDMA_H2C_MAP_8812F(x) | BIT_TXDMA_H2C_MAP_8812F(v)) 3940 3941 #define BIT_SHIFT_TXDMA_HIQ_MAP_8812F 14 3942 #define BIT_MASK_TXDMA_HIQ_MAP_8812F 0x3 3943 #define BIT_TXDMA_HIQ_MAP_8812F(x) \ 3944 (((x) & BIT_MASK_TXDMA_HIQ_MAP_8812F) << BIT_SHIFT_TXDMA_HIQ_MAP_8812F) 3945 #define BITS_TXDMA_HIQ_MAP_8812F \ 3946 (BIT_MASK_TXDMA_HIQ_MAP_8812F << BIT_SHIFT_TXDMA_HIQ_MAP_8812F) 3947 #define BIT_CLEAR_TXDMA_HIQ_MAP_8812F(x) ((x) & (~BITS_TXDMA_HIQ_MAP_8812F)) 3948 #define BIT_GET_TXDMA_HIQ_MAP_8812F(x) \ 3949 (((x) >> BIT_SHIFT_TXDMA_HIQ_MAP_8812F) & BIT_MASK_TXDMA_HIQ_MAP_8812F) 3950 #define BIT_SET_TXDMA_HIQ_MAP_8812F(x, v) \ 3951 (BIT_CLEAR_TXDMA_HIQ_MAP_8812F(x) | BIT_TXDMA_HIQ_MAP_8812F(v)) 3952 3953 #define BIT_SHIFT_TXDMA_MGQ_MAP_8812F 12 3954 #define BIT_MASK_TXDMA_MGQ_MAP_8812F 0x3 3955 #define BIT_TXDMA_MGQ_MAP_8812F(x) \ 3956 (((x) & BIT_MASK_TXDMA_MGQ_MAP_8812F) << BIT_SHIFT_TXDMA_MGQ_MAP_8812F) 3957 #define BITS_TXDMA_MGQ_MAP_8812F \ 3958 (BIT_MASK_TXDMA_MGQ_MAP_8812F << BIT_SHIFT_TXDMA_MGQ_MAP_8812F) 3959 #define BIT_CLEAR_TXDMA_MGQ_MAP_8812F(x) ((x) & (~BITS_TXDMA_MGQ_MAP_8812F)) 3960 #define BIT_GET_TXDMA_MGQ_MAP_8812F(x) \ 3961 (((x) >> BIT_SHIFT_TXDMA_MGQ_MAP_8812F) & BIT_MASK_TXDMA_MGQ_MAP_8812F) 3962 #define BIT_SET_TXDMA_MGQ_MAP_8812F(x, v) \ 3963 (BIT_CLEAR_TXDMA_MGQ_MAP_8812F(x) | BIT_TXDMA_MGQ_MAP_8812F(v)) 3964 3965 #define BIT_SHIFT_TXDMA_BKQ_MAP_8812F 10 3966 #define BIT_MASK_TXDMA_BKQ_MAP_8812F 0x3 3967 #define BIT_TXDMA_BKQ_MAP_8812F(x) \ 3968 (((x) & BIT_MASK_TXDMA_BKQ_MAP_8812F) << BIT_SHIFT_TXDMA_BKQ_MAP_8812F) 3969 #define BITS_TXDMA_BKQ_MAP_8812F \ 3970 (BIT_MASK_TXDMA_BKQ_MAP_8812F << BIT_SHIFT_TXDMA_BKQ_MAP_8812F) 3971 #define BIT_CLEAR_TXDMA_BKQ_MAP_8812F(x) ((x) & (~BITS_TXDMA_BKQ_MAP_8812F)) 3972 #define BIT_GET_TXDMA_BKQ_MAP_8812F(x) \ 3973 (((x) >> BIT_SHIFT_TXDMA_BKQ_MAP_8812F) & BIT_MASK_TXDMA_BKQ_MAP_8812F) 3974 #define BIT_SET_TXDMA_BKQ_MAP_8812F(x, v) \ 3975 (BIT_CLEAR_TXDMA_BKQ_MAP_8812F(x) | BIT_TXDMA_BKQ_MAP_8812F(v)) 3976 3977 #define BIT_SHIFT_TXDMA_BEQ_MAP_8812F 8 3978 #define BIT_MASK_TXDMA_BEQ_MAP_8812F 0x3 3979 #define BIT_TXDMA_BEQ_MAP_8812F(x) \ 3980 (((x) & BIT_MASK_TXDMA_BEQ_MAP_8812F) << BIT_SHIFT_TXDMA_BEQ_MAP_8812F) 3981 #define BITS_TXDMA_BEQ_MAP_8812F \ 3982 (BIT_MASK_TXDMA_BEQ_MAP_8812F << BIT_SHIFT_TXDMA_BEQ_MAP_8812F) 3983 #define BIT_CLEAR_TXDMA_BEQ_MAP_8812F(x) ((x) & (~BITS_TXDMA_BEQ_MAP_8812F)) 3984 #define BIT_GET_TXDMA_BEQ_MAP_8812F(x) \ 3985 (((x) >> BIT_SHIFT_TXDMA_BEQ_MAP_8812F) & BIT_MASK_TXDMA_BEQ_MAP_8812F) 3986 #define BIT_SET_TXDMA_BEQ_MAP_8812F(x, v) \ 3987 (BIT_CLEAR_TXDMA_BEQ_MAP_8812F(x) | BIT_TXDMA_BEQ_MAP_8812F(v)) 3988 3989 #define BIT_SHIFT_TXDMA_VIQ_MAP_8812F 6 3990 #define BIT_MASK_TXDMA_VIQ_MAP_8812F 0x3 3991 #define BIT_TXDMA_VIQ_MAP_8812F(x) \ 3992 (((x) & BIT_MASK_TXDMA_VIQ_MAP_8812F) << BIT_SHIFT_TXDMA_VIQ_MAP_8812F) 3993 #define BITS_TXDMA_VIQ_MAP_8812F \ 3994 (BIT_MASK_TXDMA_VIQ_MAP_8812F << BIT_SHIFT_TXDMA_VIQ_MAP_8812F) 3995 #define BIT_CLEAR_TXDMA_VIQ_MAP_8812F(x) ((x) & (~BITS_TXDMA_VIQ_MAP_8812F)) 3996 #define BIT_GET_TXDMA_VIQ_MAP_8812F(x) \ 3997 (((x) >> BIT_SHIFT_TXDMA_VIQ_MAP_8812F) & BIT_MASK_TXDMA_VIQ_MAP_8812F) 3998 #define BIT_SET_TXDMA_VIQ_MAP_8812F(x, v) \ 3999 (BIT_CLEAR_TXDMA_VIQ_MAP_8812F(x) | BIT_TXDMA_VIQ_MAP_8812F(v)) 4000 4001 #define BIT_SHIFT_TXDMA_VOQ_MAP_8812F 4 4002 #define BIT_MASK_TXDMA_VOQ_MAP_8812F 0x3 4003 #define BIT_TXDMA_VOQ_MAP_8812F(x) \ 4004 (((x) & BIT_MASK_TXDMA_VOQ_MAP_8812F) << BIT_SHIFT_TXDMA_VOQ_MAP_8812F) 4005 #define BITS_TXDMA_VOQ_MAP_8812F \ 4006 (BIT_MASK_TXDMA_VOQ_MAP_8812F << BIT_SHIFT_TXDMA_VOQ_MAP_8812F) 4007 #define BIT_CLEAR_TXDMA_VOQ_MAP_8812F(x) ((x) & (~BITS_TXDMA_VOQ_MAP_8812F)) 4008 #define BIT_GET_TXDMA_VOQ_MAP_8812F(x) \ 4009 (((x) >> BIT_SHIFT_TXDMA_VOQ_MAP_8812F) & BIT_MASK_TXDMA_VOQ_MAP_8812F) 4010 #define BIT_SET_TXDMA_VOQ_MAP_8812F(x, v) \ 4011 (BIT_CLEAR_TXDMA_VOQ_MAP_8812F(x) | BIT_TXDMA_VOQ_MAP_8812F(v)) 4012 4013 #define BIT_TXDMA_BW_EN_8812F BIT(3) 4014 #define BIT_RXDMA_AGG_EN_8812F BIT(2) 4015 #define BIT_RXSHFT_EN_8812F BIT(1) 4016 #define BIT_RXDMA_ARBBW_EN_8812F BIT(0) 4017 4018 /* 2 REG_NOT_VALID_8812F */ 4019 4020 /* 2 REG_TRXFF_BNDY_8812F */ 4021 4022 #define BIT_SHIFT_FWFFOVFL_RSV_8812F 16 4023 #define BIT_MASK_FWFFOVFL_RSV_8812F 0xf 4024 #define BIT_FWFFOVFL_RSV_8812F(x) \ 4025 (((x) & BIT_MASK_FWFFOVFL_RSV_8812F) << BIT_SHIFT_FWFFOVFL_RSV_8812F) 4026 #define BITS_FWFFOVFL_RSV_8812F \ 4027 (BIT_MASK_FWFFOVFL_RSV_8812F << BIT_SHIFT_FWFFOVFL_RSV_8812F) 4028 #define BIT_CLEAR_FWFFOVFL_RSV_8812F(x) ((x) & (~BITS_FWFFOVFL_RSV_8812F)) 4029 #define BIT_GET_FWFFOVFL_RSV_8812F(x) \ 4030 (((x) >> BIT_SHIFT_FWFFOVFL_RSV_8812F) & BIT_MASK_FWFFOVFL_RSV_8812F) 4031 #define BIT_SET_FWFFOVFL_RSV_8812F(x, v) \ 4032 (BIT_CLEAR_FWFFOVFL_RSV_8812F(x) | BIT_FWFFOVFL_RSV_8812F(v)) 4033 4034 #define BIT_SHIFT_RXFFOVFL_RSV_V2_8812F 8 4035 #define BIT_MASK_RXFFOVFL_RSV_V2_8812F 0xf 4036 #define BIT_RXFFOVFL_RSV_V2_8812F(x) \ 4037 (((x) & BIT_MASK_RXFFOVFL_RSV_V2_8812F) \ 4038 << BIT_SHIFT_RXFFOVFL_RSV_V2_8812F) 4039 #define BITS_RXFFOVFL_RSV_V2_8812F \ 4040 (BIT_MASK_RXFFOVFL_RSV_V2_8812F << BIT_SHIFT_RXFFOVFL_RSV_V2_8812F) 4041 #define BIT_CLEAR_RXFFOVFL_RSV_V2_8812F(x) ((x) & (~BITS_RXFFOVFL_RSV_V2_8812F)) 4042 #define BIT_GET_RXFFOVFL_RSV_V2_8812F(x) \ 4043 (((x) >> BIT_SHIFT_RXFFOVFL_RSV_V2_8812F) & \ 4044 BIT_MASK_RXFFOVFL_RSV_V2_8812F) 4045 #define BIT_SET_RXFFOVFL_RSV_V2_8812F(x, v) \ 4046 (BIT_CLEAR_RXFFOVFL_RSV_V2_8812F(x) | BIT_RXFFOVFL_RSV_V2_8812F(v)) 4047 4048 /* 2 REG_PTA_I2C_MBOX_8812F */ 4049 4050 /* 2 REG_NOT_VALID_8812F */ 4051 4052 #define BIT_SHIFT_I2C_M_STATUS_8812F 8 4053 #define BIT_MASK_I2C_M_STATUS_8812F 0xf 4054 #define BIT_I2C_M_STATUS_8812F(x) \ 4055 (((x) & BIT_MASK_I2C_M_STATUS_8812F) << BIT_SHIFT_I2C_M_STATUS_8812F) 4056 #define BITS_I2C_M_STATUS_8812F \ 4057 (BIT_MASK_I2C_M_STATUS_8812F << BIT_SHIFT_I2C_M_STATUS_8812F) 4058 #define BIT_CLEAR_I2C_M_STATUS_8812F(x) ((x) & (~BITS_I2C_M_STATUS_8812F)) 4059 #define BIT_GET_I2C_M_STATUS_8812F(x) \ 4060 (((x) >> BIT_SHIFT_I2C_M_STATUS_8812F) & BIT_MASK_I2C_M_STATUS_8812F) 4061 #define BIT_SET_I2C_M_STATUS_8812F(x, v) \ 4062 (BIT_CLEAR_I2C_M_STATUS_8812F(x) | BIT_I2C_M_STATUS_8812F(v)) 4063 4064 #define BIT_SHIFT_I2C_M_BUS_GNT_FW_8812F 4 4065 #define BIT_MASK_I2C_M_BUS_GNT_FW_8812F 0x7 4066 #define BIT_I2C_M_BUS_GNT_FW_8812F(x) \ 4067 (((x) & BIT_MASK_I2C_M_BUS_GNT_FW_8812F) \ 4068 << BIT_SHIFT_I2C_M_BUS_GNT_FW_8812F) 4069 #define BITS_I2C_M_BUS_GNT_FW_8812F \ 4070 (BIT_MASK_I2C_M_BUS_GNT_FW_8812F << BIT_SHIFT_I2C_M_BUS_GNT_FW_8812F) 4071 #define BIT_CLEAR_I2C_M_BUS_GNT_FW_8812F(x) \ 4072 ((x) & (~BITS_I2C_M_BUS_GNT_FW_8812F)) 4073 #define BIT_GET_I2C_M_BUS_GNT_FW_8812F(x) \ 4074 (((x) >> BIT_SHIFT_I2C_M_BUS_GNT_FW_8812F) & \ 4075 BIT_MASK_I2C_M_BUS_GNT_FW_8812F) 4076 #define BIT_SET_I2C_M_BUS_GNT_FW_8812F(x, v) \ 4077 (BIT_CLEAR_I2C_M_BUS_GNT_FW_8812F(x) | BIT_I2C_M_BUS_GNT_FW_8812F(v)) 4078 4079 #define BIT_I2C_M_GNT_FW_8812F BIT(3) 4080 4081 #define BIT_SHIFT_I2C_M_SPEED_8812F 1 4082 #define BIT_MASK_I2C_M_SPEED_8812F 0x3 4083 #define BIT_I2C_M_SPEED_8812F(x) \ 4084 (((x) & BIT_MASK_I2C_M_SPEED_8812F) << BIT_SHIFT_I2C_M_SPEED_8812F) 4085 #define BITS_I2C_M_SPEED_8812F \ 4086 (BIT_MASK_I2C_M_SPEED_8812F << BIT_SHIFT_I2C_M_SPEED_8812F) 4087 #define BIT_CLEAR_I2C_M_SPEED_8812F(x) ((x) & (~BITS_I2C_M_SPEED_8812F)) 4088 #define BIT_GET_I2C_M_SPEED_8812F(x) \ 4089 (((x) >> BIT_SHIFT_I2C_M_SPEED_8812F) & BIT_MASK_I2C_M_SPEED_8812F) 4090 #define BIT_SET_I2C_M_SPEED_8812F(x, v) \ 4091 (BIT_CLEAR_I2C_M_SPEED_8812F(x) | BIT_I2C_M_SPEED_8812F(v)) 4092 4093 #define BIT_I2C_M_UNLOCK_8812F BIT(0) 4094 4095 /* 2 REG_RXFF_BNDY_8812F */ 4096 4097 /* 2 REG_NOT_VALID_8812F */ 4098 4099 #define BIT_SHIFT_RXFF0_BNDY_V2_8812F 0 4100 #define BIT_MASK_RXFF0_BNDY_V2_8812F 0x3ffff 4101 #define BIT_RXFF0_BNDY_V2_8812F(x) \ 4102 (((x) & BIT_MASK_RXFF0_BNDY_V2_8812F) << BIT_SHIFT_RXFF0_BNDY_V2_8812F) 4103 #define BITS_RXFF0_BNDY_V2_8812F \ 4104 (BIT_MASK_RXFF0_BNDY_V2_8812F << BIT_SHIFT_RXFF0_BNDY_V2_8812F) 4105 #define BIT_CLEAR_RXFF0_BNDY_V2_8812F(x) ((x) & (~BITS_RXFF0_BNDY_V2_8812F)) 4106 #define BIT_GET_RXFF0_BNDY_V2_8812F(x) \ 4107 (((x) >> BIT_SHIFT_RXFF0_BNDY_V2_8812F) & BIT_MASK_RXFF0_BNDY_V2_8812F) 4108 #define BIT_SET_RXFF0_BNDY_V2_8812F(x, v) \ 4109 (BIT_CLEAR_RXFF0_BNDY_V2_8812F(x) | BIT_RXFF0_BNDY_V2_8812F(v)) 4110 4111 /* 2 REG_FE1IMR_8812F */ 4112 #define BIT_FS_SW_PLL_LEAVE_32K_INT_EN_8812F BIT(31) 4113 #define BIT_FS_FWFF_FULL_INT_EN_8812F BIT(30) 4114 #define BIT_FS_BB_STOP_RX_INT_EN_8812F BIT(29) 4115 #define BIT_FS_RXDMA2_DONE_INT_EN_8812F BIT(28) 4116 #define BIT_FS_RXDONE2_INT_EN_8812F BIT(26) 4117 #define BIT_FS_RX_BCN_P4_INT_EN_8812F BIT(25) 4118 #define BIT_FS_RX_BCN_P3_INT_EN_8812F BIT(24) 4119 #define BIT_FS_RX_BCN_P2_INT_EN_8812F BIT(23) 4120 #define BIT_FS_RX_BCN_P1_INT_EN_8812F BIT(22) 4121 #define BIT_FS_RX_BCN_P0_INT_EN_8812F BIT(21) 4122 #define BIT_FS_RX_UMD0_INT_EN_8812F BIT(20) 4123 #define BIT_FS_RX_UMD1_INT_EN_8812F BIT(19) 4124 #define BIT_FS_RX_BMD0_INT_EN_8812F BIT(18) 4125 #define BIT_FS_RX_BMD1_INT_EN_8812F BIT(17) 4126 #define BIT_FS_RXDONE_INT_EN_8812F BIT(16) 4127 #define BIT_FS_WWLAN_INT_EN_8812F BIT(15) 4128 #define BIT_FS_SOUND_DONE_INT_EN_8812F BIT(14) 4129 #define BIT_FS_BF1_PRETO_INT_EN_8812F BIT(11) 4130 #define BIT_FS_BF0_PRETO_INT_EN_8812F BIT(10) 4131 #define BIT_FS_PTCL_RELEASE_MACID_INT_EN_8812F BIT(9) 4132 #define BIT_FS_PRETX_ERRHLD_INT_EN_8812F BIT(8) 4133 #define BIT_FS_LTE_COEX_EN_8812F BIT(6) 4134 #define BIT_FS_WLACTOFF_INT_EN_8812F BIT(5) 4135 #define BIT_FS_WLACTON_INT_EN_8812F BIT(4) 4136 #define BIT_FS_BTCMD_INT_EN_8812F BIT(3) 4137 #define BIT_FS_REG_MAILBOX_TO_I2C_INT_EN_8812F BIT(2) 4138 #define BIT_FS_TRPC_TO_INT_EN_V1_8812F BIT(1) 4139 #define BIT_FS_RPC_O_T_INT_EN_V1_8812F BIT(0) 4140 4141 /* 2 REG_FE1ISR_8812F */ 4142 #define BIT_FS_SW_PLL_LEAVE_32K_INT_8812F BIT(31) 4143 #define BIT_FS_FS_FWFF_FULL_INT_8812F BIT(30) 4144 #define BIT_FS_BB_STOP_RX_INT_8812F BIT(29) 4145 #define BIT_FS_RXDMA2_DONE_INT_8812F BIT(28) 4146 #define BIT_FS_RXDONE2_INT_8812F BIT(26) 4147 #define BIT_FS_RX_BCN_P4_INT_8812F BIT(25) 4148 #define BIT_FS_RX_BCN_P3_INT_8812F BIT(24) 4149 #define BIT_FS_RX_BCN_P2_INT_8812F BIT(23) 4150 #define BIT_FS_RX_BCN_P1_INT_8812F BIT(22) 4151 #define BIT_FS_RX_BCN_P0_INT_8812F BIT(21) 4152 #define BIT_FS_RX_UMD0_INT_8812F BIT(20) 4153 #define BIT_FS_RX_UMD1_INT_8812F BIT(19) 4154 #define BIT_FS_RX_BMD0_INT_8812F BIT(18) 4155 #define BIT_FS_RX_BMD1_INT_8812F BIT(17) 4156 #define BIT_FS_RXDONE_INT_8812F BIT(16) 4157 #define BIT_FS_WWLAN_INT_8812F BIT(15) 4158 #define BIT_FS_SOUND_DONE_INT_8812F BIT(14) 4159 #define BIT_FS_BF1_PRETO_INT_8812F BIT(11) 4160 #define BIT_FS_BF0_PRETO_INT_8812F BIT(10) 4161 #define BIT_FS_PTCL_RELEASE_MACID_INT_8812F BIT(9) 4162 #define BIT_FS_PRETX_ERRHLD_INT_8812F BIT(8) 4163 #define BIT_FS_LTE_COEX_INT_8812F BIT(6) 4164 #define BIT_FS_WLACTOFF_INT_8812F BIT(5) 4165 #define BIT_FS_WLACTON_INT_8812F BIT(4) 4166 #define BIT_FS_BCN_RX_INT_INT_8812F BIT(3) 4167 #define BIT_FS_MAILBOX_TO_I2C_INT_8812F BIT(2) 4168 #define BIT_FS_TRPC_TO_INT_8812F BIT(1) 4169 #define BIT_FS_RPC_O_T_INT_8812F BIT(0) 4170 4171 /* 2 REG_NOT_VALID_8812F */ 4172 4173 /* 2 REG_CPWM_8812F */ 4174 #define BIT_CPWM_TOGGLING_8812F BIT(31) 4175 4176 #define BIT_SHIFT_CPWM_MOD_8812F 24 4177 #define BIT_MASK_CPWM_MOD_8812F 0x7f 4178 #define BIT_CPWM_MOD_8812F(x) \ 4179 (((x) & BIT_MASK_CPWM_MOD_8812F) << BIT_SHIFT_CPWM_MOD_8812F) 4180 #define BITS_CPWM_MOD_8812F \ 4181 (BIT_MASK_CPWM_MOD_8812F << BIT_SHIFT_CPWM_MOD_8812F) 4182 #define BIT_CLEAR_CPWM_MOD_8812F(x) ((x) & (~BITS_CPWM_MOD_8812F)) 4183 #define BIT_GET_CPWM_MOD_8812F(x) \ 4184 (((x) >> BIT_SHIFT_CPWM_MOD_8812F) & BIT_MASK_CPWM_MOD_8812F) 4185 #define BIT_SET_CPWM_MOD_8812F(x, v) \ 4186 (BIT_CLEAR_CPWM_MOD_8812F(x) | BIT_CPWM_MOD_8812F(v)) 4187 4188 /* 2 REG_FWIMR_8812F */ 4189 #define BIT_FS_TXBCNOK_MB7_INT_EN_8812F BIT(31) 4190 #define BIT_FS_TXBCNOK_MB6_INT_EN_8812F BIT(30) 4191 #define BIT_FS_TXBCNOK_MB5_INT_EN_8812F BIT(29) 4192 #define BIT_FS_TXBCNOK_MB4_INT_EN_8812F BIT(28) 4193 #define BIT_FS_TXBCNOK_MB3_INT_EN_8812F BIT(27) 4194 #define BIT_FS_TXBCNOK_MB2_INT_EN_8812F BIT(26) 4195 #define BIT_FS_TXBCNOK_MB1_INT_EN_8812F BIT(25) 4196 #define BIT_FS_TXBCNOK_MB0_INT_EN_8812F BIT(24) 4197 #define BIT_FS_TXBCNERR_MB7_INT_EN_8812F BIT(23) 4198 #define BIT_FS_TXBCNERR_MB6_INT_EN_8812F BIT(22) 4199 #define BIT_FS_TXBCNERR_MB5_INT_EN_8812F BIT(21) 4200 #define BIT_FS_TXBCNERR_MB4_INT_EN_8812F BIT(20) 4201 #define BIT_FS_TXBCNERR_MB3_INT_EN_8812F BIT(19) 4202 #define BIT_FS_TXBCNERR_MB2_INT_EN_8812F BIT(18) 4203 #define BIT_FS_TXBCNERR_MB1_INT_EN_8812F BIT(17) 4204 #define BIT_FS_TXBCNERR_MB0_INT_EN_8812F BIT(16) 4205 #define BIT_CPU_MGQ_TXDONE_INT_EN_8812F BIT(15) 4206 #define BIT_SIFS_OVERSPEC_INT_EN_8812F BIT(14) 4207 #define BIT_FS_MGNTQ_RPTR_RELEASE_INT_EN_8812F BIT(13) 4208 #define BIT_FS_MGNTQFF_TO_INT_EN_8812F BIT(12) 4209 #define BIT_FS_CPUMGQ_ERR_INT_EN_8812F BIT(11) 4210 #define BIT_FS_DDMA0_LP_INT_EN_8812F BIT(9) 4211 #define BIT_FS_DDMA0_HP_INT_EN_8812F BIT(8) 4212 #define BIT_FS_TRXRPT_INT_EN_8812F BIT(7) 4213 #define BIT_FS_C2H_W_READY_INT_EN_8812F BIT(6) 4214 #define BIT_FS_HRCV_INT_EN_8812F BIT(5) 4215 #define BIT_FS_H2CCMD_INT_EN_8812F BIT(4) 4216 #define BIT_FS_TXPKTIN_INT_EN_8812F BIT(3) 4217 #define BIT_FS_ERRORHDL_INT_EN_8812F BIT(2) 4218 #define BIT_FS_TXCCX_INT_EN_8812F BIT(1) 4219 #define BIT_FS_TXCLOSE_INT_EN_8812F BIT(0) 4220 4221 /* 2 REG_FWISR_8812F */ 4222 #define BIT_FS_TXBCNOK_MB7_INT_8812F BIT(31) 4223 #define BIT_FS_TXBCNOK_MB6_INT_8812F BIT(30) 4224 #define BIT_FS_TXBCNOK_MB5_INT_8812F BIT(29) 4225 #define BIT_FS_TXBCNOK_MB4_INT_8812F BIT(28) 4226 #define BIT_FS_TXBCNOK_MB3_INT_8812F BIT(27) 4227 #define BIT_FS_TXBCNOK_MB2_INT_8812F BIT(26) 4228 #define BIT_FS_TXBCNOK_MB1_INT_8812F BIT(25) 4229 #define BIT_FS_TXBCNOK_MB0_INT_8812F BIT(24) 4230 #define BIT_FS_TXBCNERR_MB7_INT_8812F BIT(23) 4231 #define BIT_FS_TXBCNERR_MB6_INT_8812F BIT(22) 4232 #define BIT_FS_TXBCNERR_MB5_INT_8812F BIT(21) 4233 #define BIT_FS_TXBCNERR_MB4_INT_8812F BIT(20) 4234 #define BIT_FS_TXBCNERR_MB3_INT_8812F BIT(19) 4235 #define BIT_FS_TXBCNERR_MB2_INT_8812F BIT(18) 4236 #define BIT_FS_TXBCNERR_MB1_INT_8812F BIT(17) 4237 #define BIT_FS_TXBCNERR_MB0_INT_8812F BIT(16) 4238 #define BIT_CPU_MGQ_TXDONE_INT_8812F BIT(15) 4239 #define BIT_SIFS_OVERSPEC_INT_8812F BIT(14) 4240 #define BIT_FS_MGNTQ_RPTR_RELEASE_INT_8812F BIT(13) 4241 #define BIT_FS_MGNTQFF_TO_INT_8812F BIT(12) 4242 #define BIT_FS_CPUMGQ_ERR_INT_8812F BIT(11) 4243 #define BIT_FS_DDMA0_LP_INT_8812F BIT(9) 4244 #define BIT_FS_DDMA0_HP_INT_8812F BIT(8) 4245 #define BIT_FS_TRXRPT_INT_8812F BIT(7) 4246 #define BIT_FS_C2H_W_READY_INT_8812F BIT(6) 4247 #define BIT_FS_HRCV_INT_8812F BIT(5) 4248 #define BIT_FS_H2CCMD_INT_8812F BIT(4) 4249 #define BIT_FS_TXPKTIN_INT_8812F BIT(3) 4250 #define BIT_FS_ERRORHDL_INT_8812F BIT(2) 4251 #define BIT_FS_TXCCX_INT_8812F BIT(1) 4252 #define BIT_FS_TXCLOSE_INT_8812F BIT(0) 4253 4254 /* 2 REG_FTIMR_8812F */ 4255 #define BIT_PS_TIMER_C_EARLY_INT_EN_8812F BIT(23) 4256 #define BIT_PS_TIMER_B_EARLY_INT_EN_8812F BIT(22) 4257 #define BIT_PS_TIMER_A_EARLY_INT_EN_8812F BIT(21) 4258 #define BIT_CPUMGQ_TX_TIMER_EARLY_INT_EN_8812F BIT(20) 4259 #define BIT_PS_TIMER_C_INT_EN_8812F BIT(19) 4260 #define BIT_PS_TIMER_B_INT_EN_8812F BIT(18) 4261 #define BIT_PS_TIMER_A_INT_EN_8812F BIT(17) 4262 #define BIT_CPUMGQ_TX_TIMER_INT_EN_8812F BIT(16) 4263 #define BIT_FS_PS_TIMEOUT2_EN_8812F BIT(15) 4264 #define BIT_FS_PS_TIMEOUT1_EN_8812F BIT(14) 4265 #define BIT_FS_PS_TIMEOUT0_EN_8812F BIT(13) 4266 #define BIT_FS_GTINT8_EN_8812F BIT(8) 4267 #define BIT_FS_GTINT7_EN_8812F BIT(7) 4268 #define BIT_FS_GTINT6_EN_8812F BIT(6) 4269 #define BIT_FS_GTINT5_EN_8812F BIT(5) 4270 #define BIT_FS_GTINT4_EN_8812F BIT(4) 4271 #define BIT_FS_GTINT3_EN_8812F BIT(3) 4272 #define BIT_FS_GTINT2_EN_8812F BIT(2) 4273 #define BIT_FS_GTINT1_EN_8812F BIT(1) 4274 #define BIT_FS_GTINT0_EN_8812F BIT(0) 4275 4276 /* 2 REG_FTISR_8812F */ 4277 #define BIT_PS_TIMER_C_EARLY__INT_8812F BIT(23) 4278 #define BIT_PS_TIMER_B_EARLY__INT_8812F BIT(22) 4279 #define BIT_PS_TIMER_A_EARLY__INT_8812F BIT(21) 4280 #define BIT_CPUMGQ_TX_TIMER_EARLY_INT_8812F BIT(20) 4281 #define BIT_PS_TIMER_C_INT_8812F BIT(19) 4282 #define BIT_PS_TIMER_B_INT_8812F BIT(18) 4283 #define BIT_PS_TIMER_A_INT_8812F BIT(17) 4284 #define BIT_CPUMGQ_TX_TIMER_INT_8812F BIT(16) 4285 #define BIT_FS_PS_TIMEOUT2_INT_8812F BIT(15) 4286 #define BIT_FS_PS_TIMEOUT1_INT_8812F BIT(14) 4287 #define BIT_FS_PS_TIMEOUT0_INT_8812F BIT(13) 4288 #define BIT_FS_GTINT8_INT_8812F BIT(8) 4289 #define BIT_FS_GTINT7_INT_8812F BIT(7) 4290 #define BIT_FS_GTINT6_INT_8812F BIT(6) 4291 #define BIT_FS_GTINT5_INT_8812F BIT(5) 4292 #define BIT_FS_GTINT4_INT_8812F BIT(4) 4293 #define BIT_FS_GTINT3_INT_8812F BIT(3) 4294 #define BIT_FS_GTINT2_INT_8812F BIT(2) 4295 #define BIT_FS_GTINT1_INT_8812F BIT(1) 4296 #define BIT_FS_GTINT0_INT_8812F BIT(0) 4297 4298 /* 2 REG_PKTBUF_DBG_CTRL_8812F */ 4299 4300 #define BIT_SHIFT_PKTBUF_WRITE_EN_8812F 24 4301 #define BIT_MASK_PKTBUF_WRITE_EN_8812F 0xff 4302 #define BIT_PKTBUF_WRITE_EN_8812F(x) \ 4303 (((x) & BIT_MASK_PKTBUF_WRITE_EN_8812F) \ 4304 << BIT_SHIFT_PKTBUF_WRITE_EN_8812F) 4305 #define BITS_PKTBUF_WRITE_EN_8812F \ 4306 (BIT_MASK_PKTBUF_WRITE_EN_8812F << BIT_SHIFT_PKTBUF_WRITE_EN_8812F) 4307 #define BIT_CLEAR_PKTBUF_WRITE_EN_8812F(x) ((x) & (~BITS_PKTBUF_WRITE_EN_8812F)) 4308 #define BIT_GET_PKTBUF_WRITE_EN_8812F(x) \ 4309 (((x) >> BIT_SHIFT_PKTBUF_WRITE_EN_8812F) & \ 4310 BIT_MASK_PKTBUF_WRITE_EN_8812F) 4311 #define BIT_SET_PKTBUF_WRITE_EN_8812F(x, v) \ 4312 (BIT_CLEAR_PKTBUF_WRITE_EN_8812F(x) | BIT_PKTBUF_WRITE_EN_8812F(v)) 4313 4314 #define BIT_TXRPTBUF_DBG_8812F BIT(23) 4315 4316 /* 2 REG_NOT_VALID_8812F */ 4317 #define BIT_TXPKTBUF_DBG_V2_8812F BIT(20) 4318 #define BIT_RXPKTBUF_DBG_8812F BIT(16) 4319 4320 #define BIT_SHIFT_PKTBUF_DBG_ADDR_8812F 0 4321 #define BIT_MASK_PKTBUF_DBG_ADDR_8812F 0x1fff 4322 #define BIT_PKTBUF_DBG_ADDR_8812F(x) \ 4323 (((x) & BIT_MASK_PKTBUF_DBG_ADDR_8812F) \ 4324 << BIT_SHIFT_PKTBUF_DBG_ADDR_8812F) 4325 #define BITS_PKTBUF_DBG_ADDR_8812F \ 4326 (BIT_MASK_PKTBUF_DBG_ADDR_8812F << BIT_SHIFT_PKTBUF_DBG_ADDR_8812F) 4327 #define BIT_CLEAR_PKTBUF_DBG_ADDR_8812F(x) ((x) & (~BITS_PKTBUF_DBG_ADDR_8812F)) 4328 #define BIT_GET_PKTBUF_DBG_ADDR_8812F(x) \ 4329 (((x) >> BIT_SHIFT_PKTBUF_DBG_ADDR_8812F) & \ 4330 BIT_MASK_PKTBUF_DBG_ADDR_8812F) 4331 #define BIT_SET_PKTBUF_DBG_ADDR_8812F(x, v) \ 4332 (BIT_CLEAR_PKTBUF_DBG_ADDR_8812F(x) | BIT_PKTBUF_DBG_ADDR_8812F(v)) 4333 4334 /* 2 REG_PKTBUF_DBG_DATA_L_8812F */ 4335 4336 #define BIT_SHIFT_PKTBUF_DBG_DATA_L_8812F 0 4337 #define BIT_MASK_PKTBUF_DBG_DATA_L_8812F 0xffffffffL 4338 #define BIT_PKTBUF_DBG_DATA_L_8812F(x) \ 4339 (((x) & BIT_MASK_PKTBUF_DBG_DATA_L_8812F) \ 4340 << BIT_SHIFT_PKTBUF_DBG_DATA_L_8812F) 4341 #define BITS_PKTBUF_DBG_DATA_L_8812F \ 4342 (BIT_MASK_PKTBUF_DBG_DATA_L_8812F << BIT_SHIFT_PKTBUF_DBG_DATA_L_8812F) 4343 #define BIT_CLEAR_PKTBUF_DBG_DATA_L_8812F(x) \ 4344 ((x) & (~BITS_PKTBUF_DBG_DATA_L_8812F)) 4345 #define BIT_GET_PKTBUF_DBG_DATA_L_8812F(x) \ 4346 (((x) >> BIT_SHIFT_PKTBUF_DBG_DATA_L_8812F) & \ 4347 BIT_MASK_PKTBUF_DBG_DATA_L_8812F) 4348 #define BIT_SET_PKTBUF_DBG_DATA_L_8812F(x, v) \ 4349 (BIT_CLEAR_PKTBUF_DBG_DATA_L_8812F(x) | BIT_PKTBUF_DBG_DATA_L_8812F(v)) 4350 4351 /* 2 REG_PKTBUF_DBG_DATA_H_8812F */ 4352 4353 #define BIT_SHIFT_PKTBUF_DBG_DATA_H_8812F 0 4354 #define BIT_MASK_PKTBUF_DBG_DATA_H_8812F 0xffffffffL 4355 #define BIT_PKTBUF_DBG_DATA_H_8812F(x) \ 4356 (((x) & BIT_MASK_PKTBUF_DBG_DATA_H_8812F) \ 4357 << BIT_SHIFT_PKTBUF_DBG_DATA_H_8812F) 4358 #define BITS_PKTBUF_DBG_DATA_H_8812F \ 4359 (BIT_MASK_PKTBUF_DBG_DATA_H_8812F << BIT_SHIFT_PKTBUF_DBG_DATA_H_8812F) 4360 #define BIT_CLEAR_PKTBUF_DBG_DATA_H_8812F(x) \ 4361 ((x) & (~BITS_PKTBUF_DBG_DATA_H_8812F)) 4362 #define BIT_GET_PKTBUF_DBG_DATA_H_8812F(x) \ 4363 (((x) >> BIT_SHIFT_PKTBUF_DBG_DATA_H_8812F) & \ 4364 BIT_MASK_PKTBUF_DBG_DATA_H_8812F) 4365 #define BIT_SET_PKTBUF_DBG_DATA_H_8812F(x, v) \ 4366 (BIT_CLEAR_PKTBUF_DBG_DATA_H_8812F(x) | BIT_PKTBUF_DBG_DATA_H_8812F(v)) 4367 4368 /* 2 REG_CPWM2_8812F */ 4369 4370 #define BIT_SHIFT_L0S_TO_RCVY_NUM_8812F 16 4371 #define BIT_MASK_L0S_TO_RCVY_NUM_8812F 0xff 4372 #define BIT_L0S_TO_RCVY_NUM_8812F(x) \ 4373 (((x) & BIT_MASK_L0S_TO_RCVY_NUM_8812F) \ 4374 << BIT_SHIFT_L0S_TO_RCVY_NUM_8812F) 4375 #define BITS_L0S_TO_RCVY_NUM_8812F \ 4376 (BIT_MASK_L0S_TO_RCVY_NUM_8812F << BIT_SHIFT_L0S_TO_RCVY_NUM_8812F) 4377 #define BIT_CLEAR_L0S_TO_RCVY_NUM_8812F(x) ((x) & (~BITS_L0S_TO_RCVY_NUM_8812F)) 4378 #define BIT_GET_L0S_TO_RCVY_NUM_8812F(x) \ 4379 (((x) >> BIT_SHIFT_L0S_TO_RCVY_NUM_8812F) & \ 4380 BIT_MASK_L0S_TO_RCVY_NUM_8812F) 4381 #define BIT_SET_L0S_TO_RCVY_NUM_8812F(x, v) \ 4382 (BIT_CLEAR_L0S_TO_RCVY_NUM_8812F(x) | BIT_L0S_TO_RCVY_NUM_8812F(v)) 4383 4384 #define BIT_CPWM2_TOGGLING_8812F BIT(15) 4385 4386 #define BIT_SHIFT_CPWM2_MOD_8812F 0 4387 #define BIT_MASK_CPWM2_MOD_8812F 0x7fff 4388 #define BIT_CPWM2_MOD_8812F(x) \ 4389 (((x) & BIT_MASK_CPWM2_MOD_8812F) << BIT_SHIFT_CPWM2_MOD_8812F) 4390 #define BITS_CPWM2_MOD_8812F \ 4391 (BIT_MASK_CPWM2_MOD_8812F << BIT_SHIFT_CPWM2_MOD_8812F) 4392 #define BIT_CLEAR_CPWM2_MOD_8812F(x) ((x) & (~BITS_CPWM2_MOD_8812F)) 4393 #define BIT_GET_CPWM2_MOD_8812F(x) \ 4394 (((x) >> BIT_SHIFT_CPWM2_MOD_8812F) & BIT_MASK_CPWM2_MOD_8812F) 4395 #define BIT_SET_CPWM2_MOD_8812F(x, v) \ 4396 (BIT_CLEAR_CPWM2_MOD_8812F(x) | BIT_CPWM2_MOD_8812F(v)) 4397 4398 /* 2 REG_TC0_CTRL_8812F */ 4399 #define BIT_TC0INT_EN_8812F BIT(26) 4400 #define BIT_TC0MODE_8812F BIT(25) 4401 #define BIT_TC0EN_8812F BIT(24) 4402 4403 #define BIT_SHIFT_TC0DATA_8812F 0 4404 #define BIT_MASK_TC0DATA_8812F 0xffffff 4405 #define BIT_TC0DATA_8812F(x) \ 4406 (((x) & BIT_MASK_TC0DATA_8812F) << BIT_SHIFT_TC0DATA_8812F) 4407 #define BITS_TC0DATA_8812F (BIT_MASK_TC0DATA_8812F << BIT_SHIFT_TC0DATA_8812F) 4408 #define BIT_CLEAR_TC0DATA_8812F(x) ((x) & (~BITS_TC0DATA_8812F)) 4409 #define BIT_GET_TC0DATA_8812F(x) \ 4410 (((x) >> BIT_SHIFT_TC0DATA_8812F) & BIT_MASK_TC0DATA_8812F) 4411 #define BIT_SET_TC0DATA_8812F(x, v) \ 4412 (BIT_CLEAR_TC0DATA_8812F(x) | BIT_TC0DATA_8812F(v)) 4413 4414 /* 2 REG_TC1_CTRL_8812F */ 4415 #define BIT_TC1INT_EN_8812F BIT(26) 4416 #define BIT_TC1MODE_8812F BIT(25) 4417 #define BIT_TC1EN_8812F BIT(24) 4418 4419 #define BIT_SHIFT_TC1DATA_8812F 0 4420 #define BIT_MASK_TC1DATA_8812F 0xffffff 4421 #define BIT_TC1DATA_8812F(x) \ 4422 (((x) & BIT_MASK_TC1DATA_8812F) << BIT_SHIFT_TC1DATA_8812F) 4423 #define BITS_TC1DATA_8812F (BIT_MASK_TC1DATA_8812F << BIT_SHIFT_TC1DATA_8812F) 4424 #define BIT_CLEAR_TC1DATA_8812F(x) ((x) & (~BITS_TC1DATA_8812F)) 4425 #define BIT_GET_TC1DATA_8812F(x) \ 4426 (((x) >> BIT_SHIFT_TC1DATA_8812F) & BIT_MASK_TC1DATA_8812F) 4427 #define BIT_SET_TC1DATA_8812F(x, v) \ 4428 (BIT_CLEAR_TC1DATA_8812F(x) | BIT_TC1DATA_8812F(v)) 4429 4430 /* 2 REG_TC2_CTRL_8812F */ 4431 #define BIT_TC2INT_EN_8812F BIT(26) 4432 #define BIT_TC2MODE_8812F BIT(25) 4433 #define BIT_TC2EN_8812F BIT(24) 4434 4435 #define BIT_SHIFT_TC2DATA_8812F 0 4436 #define BIT_MASK_TC2DATA_8812F 0xffffff 4437 #define BIT_TC2DATA_8812F(x) \ 4438 (((x) & BIT_MASK_TC2DATA_8812F) << BIT_SHIFT_TC2DATA_8812F) 4439 #define BITS_TC2DATA_8812F (BIT_MASK_TC2DATA_8812F << BIT_SHIFT_TC2DATA_8812F) 4440 #define BIT_CLEAR_TC2DATA_8812F(x) ((x) & (~BITS_TC2DATA_8812F)) 4441 #define BIT_GET_TC2DATA_8812F(x) \ 4442 (((x) >> BIT_SHIFT_TC2DATA_8812F) & BIT_MASK_TC2DATA_8812F) 4443 #define BIT_SET_TC2DATA_8812F(x, v) \ 4444 (BIT_CLEAR_TC2DATA_8812F(x) | BIT_TC2DATA_8812F(v)) 4445 4446 /* 2 REG_TC3_CTRL_8812F */ 4447 #define BIT_TC3INT_EN_8812F BIT(26) 4448 #define BIT_TC3MODE_8812F BIT(25) 4449 #define BIT_TC3EN_8812F BIT(24) 4450 4451 #define BIT_SHIFT_TC3DATA_8812F 0 4452 #define BIT_MASK_TC3DATA_8812F 0xffffff 4453 #define BIT_TC3DATA_8812F(x) \ 4454 (((x) & BIT_MASK_TC3DATA_8812F) << BIT_SHIFT_TC3DATA_8812F) 4455 #define BITS_TC3DATA_8812F (BIT_MASK_TC3DATA_8812F << BIT_SHIFT_TC3DATA_8812F) 4456 #define BIT_CLEAR_TC3DATA_8812F(x) ((x) & (~BITS_TC3DATA_8812F)) 4457 #define BIT_GET_TC3DATA_8812F(x) \ 4458 (((x) >> BIT_SHIFT_TC3DATA_8812F) & BIT_MASK_TC3DATA_8812F) 4459 #define BIT_SET_TC3DATA_8812F(x, v) \ 4460 (BIT_CLEAR_TC3DATA_8812F(x) | BIT_TC3DATA_8812F(v)) 4461 4462 /* 2 REG_TC4_CTRL_8812F */ 4463 #define BIT_TC4INT_EN_8812F BIT(26) 4464 #define BIT_TC4MODE_8812F BIT(25) 4465 #define BIT_TC4EN_8812F BIT(24) 4466 4467 #define BIT_SHIFT_TC4DATA_8812F 0 4468 #define BIT_MASK_TC4DATA_8812F 0xffffff 4469 #define BIT_TC4DATA_8812F(x) \ 4470 (((x) & BIT_MASK_TC4DATA_8812F) << BIT_SHIFT_TC4DATA_8812F) 4471 #define BITS_TC4DATA_8812F (BIT_MASK_TC4DATA_8812F << BIT_SHIFT_TC4DATA_8812F) 4472 #define BIT_CLEAR_TC4DATA_8812F(x) ((x) & (~BITS_TC4DATA_8812F)) 4473 #define BIT_GET_TC4DATA_8812F(x) \ 4474 (((x) >> BIT_SHIFT_TC4DATA_8812F) & BIT_MASK_TC4DATA_8812F) 4475 #define BIT_SET_TC4DATA_8812F(x, v) \ 4476 (BIT_CLEAR_TC4DATA_8812F(x) | BIT_TC4DATA_8812F(v)) 4477 4478 /* 2 REG_TCUNIT_BASE_8812F */ 4479 4480 #define BIT_SHIFT_TCUNIT_BASE_8812F 0 4481 #define BIT_MASK_TCUNIT_BASE_8812F 0x3fff 4482 #define BIT_TCUNIT_BASE_8812F(x) \ 4483 (((x) & BIT_MASK_TCUNIT_BASE_8812F) << BIT_SHIFT_TCUNIT_BASE_8812F) 4484 #define BITS_TCUNIT_BASE_8812F \ 4485 (BIT_MASK_TCUNIT_BASE_8812F << BIT_SHIFT_TCUNIT_BASE_8812F) 4486 #define BIT_CLEAR_TCUNIT_BASE_8812F(x) ((x) & (~BITS_TCUNIT_BASE_8812F)) 4487 #define BIT_GET_TCUNIT_BASE_8812F(x) \ 4488 (((x) >> BIT_SHIFT_TCUNIT_BASE_8812F) & BIT_MASK_TCUNIT_BASE_8812F) 4489 #define BIT_SET_TCUNIT_BASE_8812F(x, v) \ 4490 (BIT_CLEAR_TCUNIT_BASE_8812F(x) | BIT_TCUNIT_BASE_8812F(v)) 4491 4492 /* 2 REG_TC5_CTRL_8812F */ 4493 #define BIT_TC5INT_EN_8812F BIT(26) 4494 #define BIT_TC5MODE_8812F BIT(25) 4495 #define BIT_TC5EN_8812F BIT(24) 4496 4497 #define BIT_SHIFT_TC5DATA_8812F 0 4498 #define BIT_MASK_TC5DATA_8812F 0xffffff 4499 #define BIT_TC5DATA_8812F(x) \ 4500 (((x) & BIT_MASK_TC5DATA_8812F) << BIT_SHIFT_TC5DATA_8812F) 4501 #define BITS_TC5DATA_8812F (BIT_MASK_TC5DATA_8812F << BIT_SHIFT_TC5DATA_8812F) 4502 #define BIT_CLEAR_TC5DATA_8812F(x) ((x) & (~BITS_TC5DATA_8812F)) 4503 #define BIT_GET_TC5DATA_8812F(x) \ 4504 (((x) >> BIT_SHIFT_TC5DATA_8812F) & BIT_MASK_TC5DATA_8812F) 4505 #define BIT_SET_TC5DATA_8812F(x, v) \ 4506 (BIT_CLEAR_TC5DATA_8812F(x) | BIT_TC5DATA_8812F(v)) 4507 4508 /* 2 REG_TC6_CTRL_8812F */ 4509 #define BIT_TC6INT_EN_8812F BIT(26) 4510 #define BIT_TC6MODE_8812F BIT(25) 4511 #define BIT_TC6EN_8812F BIT(24) 4512 4513 #define BIT_SHIFT_TC6DATA_8812F 0 4514 #define BIT_MASK_TC6DATA_8812F 0xffffff 4515 #define BIT_TC6DATA_8812F(x) \ 4516 (((x) & BIT_MASK_TC6DATA_8812F) << BIT_SHIFT_TC6DATA_8812F) 4517 #define BITS_TC6DATA_8812F (BIT_MASK_TC6DATA_8812F << BIT_SHIFT_TC6DATA_8812F) 4518 #define BIT_CLEAR_TC6DATA_8812F(x) ((x) & (~BITS_TC6DATA_8812F)) 4519 #define BIT_GET_TC6DATA_8812F(x) \ 4520 (((x) >> BIT_SHIFT_TC6DATA_8812F) & BIT_MASK_TC6DATA_8812F) 4521 #define BIT_SET_TC6DATA_8812F(x, v) \ 4522 (BIT_CLEAR_TC6DATA_8812F(x) | BIT_TC6DATA_8812F(v)) 4523 4524 /* 2 REG_MBIST_DRF_FAIL_8812F */ 4525 4526 #define BIT_SHIFT_8051_MBIST_DRF_FAIL_8812F 26 4527 #define BIT_MASK_8051_MBIST_DRF_FAIL_8812F 0x3f 4528 #define BIT_8051_MBIST_DRF_FAIL_8812F(x) \ 4529 (((x) & BIT_MASK_8051_MBIST_DRF_FAIL_8812F) \ 4530 << BIT_SHIFT_8051_MBIST_DRF_FAIL_8812F) 4531 #define BITS_8051_MBIST_DRF_FAIL_8812F \ 4532 (BIT_MASK_8051_MBIST_DRF_FAIL_8812F \ 4533 << BIT_SHIFT_8051_MBIST_DRF_FAIL_8812F) 4534 #define BIT_CLEAR_8051_MBIST_DRF_FAIL_8812F(x) \ 4535 ((x) & (~BITS_8051_MBIST_DRF_FAIL_8812F)) 4536 #define BIT_GET_8051_MBIST_DRF_FAIL_8812F(x) \ 4537 (((x) >> BIT_SHIFT_8051_MBIST_DRF_FAIL_8812F) & \ 4538 BIT_MASK_8051_MBIST_DRF_FAIL_8812F) 4539 #define BIT_SET_8051_MBIST_DRF_FAIL_8812F(x, v) \ 4540 (BIT_CLEAR_8051_MBIST_DRF_FAIL_8812F(x) | \ 4541 BIT_8051_MBIST_DRF_FAIL_8812F(v)) 4542 4543 #define BIT_SHIFT_USB_MBIST_DRF_FAIL_8812F 24 4544 #define BIT_MASK_USB_MBIST_DRF_FAIL_8812F 0x3 4545 #define BIT_USB_MBIST_DRF_FAIL_8812F(x) \ 4546 (((x) & BIT_MASK_USB_MBIST_DRF_FAIL_8812F) \ 4547 << BIT_SHIFT_USB_MBIST_DRF_FAIL_8812F) 4548 #define BITS_USB_MBIST_DRF_FAIL_8812F \ 4549 (BIT_MASK_USB_MBIST_DRF_FAIL_8812F \ 4550 << BIT_SHIFT_USB_MBIST_DRF_FAIL_8812F) 4551 #define BIT_CLEAR_USB_MBIST_DRF_FAIL_8812F(x) \ 4552 ((x) & (~BITS_USB_MBIST_DRF_FAIL_8812F)) 4553 #define BIT_GET_USB_MBIST_DRF_FAIL_8812F(x) \ 4554 (((x) >> BIT_SHIFT_USB_MBIST_DRF_FAIL_8812F) & \ 4555 BIT_MASK_USB_MBIST_DRF_FAIL_8812F) 4556 #define BIT_SET_USB_MBIST_DRF_FAIL_8812F(x, v) \ 4557 (BIT_CLEAR_USB_MBIST_DRF_FAIL_8812F(x) | \ 4558 BIT_USB_MBIST_DRF_FAIL_8812F(v)) 4559 4560 #define BIT_SHIFT_PCIE_MBIST_DRF_FAIL_8812F 18 4561 #define BIT_MASK_PCIE_MBIST_DRF_FAIL_8812F 0x3f 4562 #define BIT_PCIE_MBIST_DRF_FAIL_8812F(x) \ 4563 (((x) & BIT_MASK_PCIE_MBIST_DRF_FAIL_8812F) \ 4564 << BIT_SHIFT_PCIE_MBIST_DRF_FAIL_8812F) 4565 #define BITS_PCIE_MBIST_DRF_FAIL_8812F \ 4566 (BIT_MASK_PCIE_MBIST_DRF_FAIL_8812F \ 4567 << BIT_SHIFT_PCIE_MBIST_DRF_FAIL_8812F) 4568 #define BIT_CLEAR_PCIE_MBIST_DRF_FAIL_8812F(x) \ 4569 ((x) & (~BITS_PCIE_MBIST_DRF_FAIL_8812F)) 4570 #define BIT_GET_PCIE_MBIST_DRF_FAIL_8812F(x) \ 4571 (((x) >> BIT_SHIFT_PCIE_MBIST_DRF_FAIL_8812F) & \ 4572 BIT_MASK_PCIE_MBIST_DRF_FAIL_8812F) 4573 #define BIT_SET_PCIE_MBIST_DRF_FAIL_8812F(x, v) \ 4574 (BIT_CLEAR_PCIE_MBIST_DRF_FAIL_8812F(x) | \ 4575 BIT_PCIE_MBIST_DRF_FAIL_8812F(v)) 4576 4577 #define BIT_SHIFT_MAC_MBIST_DRF_FAIL_8812F 0 4578 #define BIT_MASK_MAC_MBIST_DRF_FAIL_8812F 0x3ffff 4579 #define BIT_MAC_MBIST_DRF_FAIL_8812F(x) \ 4580 (((x) & BIT_MASK_MAC_MBIST_DRF_FAIL_8812F) \ 4581 << BIT_SHIFT_MAC_MBIST_DRF_FAIL_8812F) 4582 #define BITS_MAC_MBIST_DRF_FAIL_8812F \ 4583 (BIT_MASK_MAC_MBIST_DRF_FAIL_8812F \ 4584 << BIT_SHIFT_MAC_MBIST_DRF_FAIL_8812F) 4585 #define BIT_CLEAR_MAC_MBIST_DRF_FAIL_8812F(x) \ 4586 ((x) & (~BITS_MAC_MBIST_DRF_FAIL_8812F)) 4587 #define BIT_GET_MAC_MBIST_DRF_FAIL_8812F(x) \ 4588 (((x) >> BIT_SHIFT_MAC_MBIST_DRF_FAIL_8812F) & \ 4589 BIT_MASK_MAC_MBIST_DRF_FAIL_8812F) 4590 #define BIT_SET_MAC_MBIST_DRF_FAIL_8812F(x, v) \ 4591 (BIT_CLEAR_MAC_MBIST_DRF_FAIL_8812F(x) | \ 4592 BIT_MAC_MBIST_DRF_FAIL_8812F(v)) 4593 4594 /* 2 REG_MBIST_START_PAUSE_8812F */ 4595 4596 #define BIT_SHIFT_8051_MBIST_START_PAUSE_V1_8812F 26 4597 #define BIT_MASK_8051_MBIST_START_PAUSE_V1_8812F 0x3f 4598 #define BIT_8051_MBIST_START_PAUSE_V1_8812F(x) \ 4599 (((x) & BIT_MASK_8051_MBIST_START_PAUSE_V1_8812F) \ 4600 << BIT_SHIFT_8051_MBIST_START_PAUSE_V1_8812F) 4601 #define BITS_8051_MBIST_START_PAUSE_V1_8812F \ 4602 (BIT_MASK_8051_MBIST_START_PAUSE_V1_8812F \ 4603 << BIT_SHIFT_8051_MBIST_START_PAUSE_V1_8812F) 4604 #define BIT_CLEAR_8051_MBIST_START_PAUSE_V1_8812F(x) \ 4605 ((x) & (~BITS_8051_MBIST_START_PAUSE_V1_8812F)) 4606 #define BIT_GET_8051_MBIST_START_PAUSE_V1_8812F(x) \ 4607 (((x) >> BIT_SHIFT_8051_MBIST_START_PAUSE_V1_8812F) & \ 4608 BIT_MASK_8051_MBIST_START_PAUSE_V1_8812F) 4609 #define BIT_SET_8051_MBIST_START_PAUSE_V1_8812F(x, v) \ 4610 (BIT_CLEAR_8051_MBIST_START_PAUSE_V1_8812F(x) | \ 4611 BIT_8051_MBIST_START_PAUSE_V1_8812F(v)) 4612 4613 #define BIT_SHIFT_USB_MBIST_START_PAUSE_V1_8812F 24 4614 #define BIT_MASK_USB_MBIST_START_PAUSE_V1_8812F 0x3 4615 #define BIT_USB_MBIST_START_PAUSE_V1_8812F(x) \ 4616 (((x) & BIT_MASK_USB_MBIST_START_PAUSE_V1_8812F) \ 4617 << BIT_SHIFT_USB_MBIST_START_PAUSE_V1_8812F) 4618 #define BITS_USB_MBIST_START_PAUSE_V1_8812F \ 4619 (BIT_MASK_USB_MBIST_START_PAUSE_V1_8812F \ 4620 << BIT_SHIFT_USB_MBIST_START_PAUSE_V1_8812F) 4621 #define BIT_CLEAR_USB_MBIST_START_PAUSE_V1_8812F(x) \ 4622 ((x) & (~BITS_USB_MBIST_START_PAUSE_V1_8812F)) 4623 #define BIT_GET_USB_MBIST_START_PAUSE_V1_8812F(x) \ 4624 (((x) >> BIT_SHIFT_USB_MBIST_START_PAUSE_V1_8812F) & \ 4625 BIT_MASK_USB_MBIST_START_PAUSE_V1_8812F) 4626 #define BIT_SET_USB_MBIST_START_PAUSE_V1_8812F(x, v) \ 4627 (BIT_CLEAR_USB_MBIST_START_PAUSE_V1_8812F(x) | \ 4628 BIT_USB_MBIST_START_PAUSE_V1_8812F(v)) 4629 4630 #define BIT_SHIFT_PCIE_MBIST_START_PAUSE_V1_8812F 18 4631 #define BIT_MASK_PCIE_MBIST_START_PAUSE_V1_8812F 0x3f 4632 #define BIT_PCIE_MBIST_START_PAUSE_V1_8812F(x) \ 4633 (((x) & BIT_MASK_PCIE_MBIST_START_PAUSE_V1_8812F) \ 4634 << BIT_SHIFT_PCIE_MBIST_START_PAUSE_V1_8812F) 4635 #define BITS_PCIE_MBIST_START_PAUSE_V1_8812F \ 4636 (BIT_MASK_PCIE_MBIST_START_PAUSE_V1_8812F \ 4637 << BIT_SHIFT_PCIE_MBIST_START_PAUSE_V1_8812F) 4638 #define BIT_CLEAR_PCIE_MBIST_START_PAUSE_V1_8812F(x) \ 4639 ((x) & (~BITS_PCIE_MBIST_START_PAUSE_V1_8812F)) 4640 #define BIT_GET_PCIE_MBIST_START_PAUSE_V1_8812F(x) \ 4641 (((x) >> BIT_SHIFT_PCIE_MBIST_START_PAUSE_V1_8812F) & \ 4642 BIT_MASK_PCIE_MBIST_START_PAUSE_V1_8812F) 4643 #define BIT_SET_PCIE_MBIST_START_PAUSE_V1_8812F(x, v) \ 4644 (BIT_CLEAR_PCIE_MBIST_START_PAUSE_V1_8812F(x) | \ 4645 BIT_PCIE_MBIST_START_PAUSE_V1_8812F(v)) 4646 4647 #define BIT_SHIFT_MAC_MBIST_START_PAUSE_V1_8812F 0 4648 #define BIT_MASK_MAC_MBIST_START_PAUSE_V1_8812F 0x3ffff 4649 #define BIT_MAC_MBIST_START_PAUSE_V1_8812F(x) \ 4650 (((x) & BIT_MASK_MAC_MBIST_START_PAUSE_V1_8812F) \ 4651 << BIT_SHIFT_MAC_MBIST_START_PAUSE_V1_8812F) 4652 #define BITS_MAC_MBIST_START_PAUSE_V1_8812F \ 4653 (BIT_MASK_MAC_MBIST_START_PAUSE_V1_8812F \ 4654 << BIT_SHIFT_MAC_MBIST_START_PAUSE_V1_8812F) 4655 #define BIT_CLEAR_MAC_MBIST_START_PAUSE_V1_8812F(x) \ 4656 ((x) & (~BITS_MAC_MBIST_START_PAUSE_V1_8812F)) 4657 #define BIT_GET_MAC_MBIST_START_PAUSE_V1_8812F(x) \ 4658 (((x) >> BIT_SHIFT_MAC_MBIST_START_PAUSE_V1_8812F) & \ 4659 BIT_MASK_MAC_MBIST_START_PAUSE_V1_8812F) 4660 #define BIT_SET_MAC_MBIST_START_PAUSE_V1_8812F(x, v) \ 4661 (BIT_CLEAR_MAC_MBIST_START_PAUSE_V1_8812F(x) | \ 4662 BIT_MAC_MBIST_START_PAUSE_V1_8812F(v)) 4663 4664 /* 2 REG_MBIST_DONE_8812F */ 4665 4666 #define BIT_SHIFT_8051_MBIST_DONE_V1_8812F 26 4667 #define BIT_MASK_8051_MBIST_DONE_V1_8812F 0x3f 4668 #define BIT_8051_MBIST_DONE_V1_8812F(x) \ 4669 (((x) & BIT_MASK_8051_MBIST_DONE_V1_8812F) \ 4670 << BIT_SHIFT_8051_MBIST_DONE_V1_8812F) 4671 #define BITS_8051_MBIST_DONE_V1_8812F \ 4672 (BIT_MASK_8051_MBIST_DONE_V1_8812F \ 4673 << BIT_SHIFT_8051_MBIST_DONE_V1_8812F) 4674 #define BIT_CLEAR_8051_MBIST_DONE_V1_8812F(x) \ 4675 ((x) & (~BITS_8051_MBIST_DONE_V1_8812F)) 4676 #define BIT_GET_8051_MBIST_DONE_V1_8812F(x) \ 4677 (((x) >> BIT_SHIFT_8051_MBIST_DONE_V1_8812F) & \ 4678 BIT_MASK_8051_MBIST_DONE_V1_8812F) 4679 #define BIT_SET_8051_MBIST_DONE_V1_8812F(x, v) \ 4680 (BIT_CLEAR_8051_MBIST_DONE_V1_8812F(x) | \ 4681 BIT_8051_MBIST_DONE_V1_8812F(v)) 4682 4683 #define BIT_SHIFT_USB_MBIST_DONE_V1_8812F 24 4684 #define BIT_MASK_USB_MBIST_DONE_V1_8812F 0x3 4685 #define BIT_USB_MBIST_DONE_V1_8812F(x) \ 4686 (((x) & BIT_MASK_USB_MBIST_DONE_V1_8812F) \ 4687 << BIT_SHIFT_USB_MBIST_DONE_V1_8812F) 4688 #define BITS_USB_MBIST_DONE_V1_8812F \ 4689 (BIT_MASK_USB_MBIST_DONE_V1_8812F << BIT_SHIFT_USB_MBIST_DONE_V1_8812F) 4690 #define BIT_CLEAR_USB_MBIST_DONE_V1_8812F(x) \ 4691 ((x) & (~BITS_USB_MBIST_DONE_V1_8812F)) 4692 #define BIT_GET_USB_MBIST_DONE_V1_8812F(x) \ 4693 (((x) >> BIT_SHIFT_USB_MBIST_DONE_V1_8812F) & \ 4694 BIT_MASK_USB_MBIST_DONE_V1_8812F) 4695 #define BIT_SET_USB_MBIST_DONE_V1_8812F(x, v) \ 4696 (BIT_CLEAR_USB_MBIST_DONE_V1_8812F(x) | BIT_USB_MBIST_DONE_V1_8812F(v)) 4697 4698 #define BIT_SHIFT_PCIE_MBIST_DONE_V1_8812F 18 4699 #define BIT_MASK_PCIE_MBIST_DONE_V1_8812F 0x3f 4700 #define BIT_PCIE_MBIST_DONE_V1_8812F(x) \ 4701 (((x) & BIT_MASK_PCIE_MBIST_DONE_V1_8812F) \ 4702 << BIT_SHIFT_PCIE_MBIST_DONE_V1_8812F) 4703 #define BITS_PCIE_MBIST_DONE_V1_8812F \ 4704 (BIT_MASK_PCIE_MBIST_DONE_V1_8812F \ 4705 << BIT_SHIFT_PCIE_MBIST_DONE_V1_8812F) 4706 #define BIT_CLEAR_PCIE_MBIST_DONE_V1_8812F(x) \ 4707 ((x) & (~BITS_PCIE_MBIST_DONE_V1_8812F)) 4708 #define BIT_GET_PCIE_MBIST_DONE_V1_8812F(x) \ 4709 (((x) >> BIT_SHIFT_PCIE_MBIST_DONE_V1_8812F) & \ 4710 BIT_MASK_PCIE_MBIST_DONE_V1_8812F) 4711 #define BIT_SET_PCIE_MBIST_DONE_V1_8812F(x, v) \ 4712 (BIT_CLEAR_PCIE_MBIST_DONE_V1_8812F(x) | \ 4713 BIT_PCIE_MBIST_DONE_V1_8812F(v)) 4714 4715 #define BIT_SHIFT_MAC_MBIST_DONE_V1_8812F 0 4716 #define BIT_MASK_MAC_MBIST_DONE_V1_8812F 0x3ffff 4717 #define BIT_MAC_MBIST_DONE_V1_8812F(x) \ 4718 (((x) & BIT_MASK_MAC_MBIST_DONE_V1_8812F) \ 4719 << BIT_SHIFT_MAC_MBIST_DONE_V1_8812F) 4720 #define BITS_MAC_MBIST_DONE_V1_8812F \ 4721 (BIT_MASK_MAC_MBIST_DONE_V1_8812F << BIT_SHIFT_MAC_MBIST_DONE_V1_8812F) 4722 #define BIT_CLEAR_MAC_MBIST_DONE_V1_8812F(x) \ 4723 ((x) & (~BITS_MAC_MBIST_DONE_V1_8812F)) 4724 #define BIT_GET_MAC_MBIST_DONE_V1_8812F(x) \ 4725 (((x) >> BIT_SHIFT_MAC_MBIST_DONE_V1_8812F) & \ 4726 BIT_MASK_MAC_MBIST_DONE_V1_8812F) 4727 #define BIT_SET_MAC_MBIST_DONE_V1_8812F(x, v) \ 4728 (BIT_CLEAR_MAC_MBIST_DONE_V1_8812F(x) | BIT_MAC_MBIST_DONE_V1_8812F(v)) 4729 4730 /* 2 REG_MBIST_READ_BIST_RPT_8812F */ 4731 4732 #define BIT_SHIFT_MBIST_READ_BIST_RPT_8812F 0 4733 #define BIT_MASK_MBIST_READ_BIST_RPT_8812F 0xffffffffL 4734 #define BIT_MBIST_READ_BIST_RPT_8812F(x) \ 4735 (((x) & BIT_MASK_MBIST_READ_BIST_RPT_8812F) \ 4736 << BIT_SHIFT_MBIST_READ_BIST_RPT_8812F) 4737 #define BITS_MBIST_READ_BIST_RPT_8812F \ 4738 (BIT_MASK_MBIST_READ_BIST_RPT_8812F \ 4739 << BIT_SHIFT_MBIST_READ_BIST_RPT_8812F) 4740 #define BIT_CLEAR_MBIST_READ_BIST_RPT_8812F(x) \ 4741 ((x) & (~BITS_MBIST_READ_BIST_RPT_8812F)) 4742 #define BIT_GET_MBIST_READ_BIST_RPT_8812F(x) \ 4743 (((x) >> BIT_SHIFT_MBIST_READ_BIST_RPT_8812F) & \ 4744 BIT_MASK_MBIST_READ_BIST_RPT_8812F) 4745 #define BIT_SET_MBIST_READ_BIST_RPT_8812F(x, v) \ 4746 (BIT_CLEAR_MBIST_READ_BIST_RPT_8812F(x) | \ 4747 BIT_MBIST_READ_BIST_RPT_8812F(v)) 4748 4749 /* 2 REG_AES_DECRPT_DATA_8812F */ 4750 4751 #define BIT_SHIFT_IPS_CFG_ADDR_8812F 0 4752 #define BIT_MASK_IPS_CFG_ADDR_8812F 0xff 4753 #define BIT_IPS_CFG_ADDR_8812F(x) \ 4754 (((x) & BIT_MASK_IPS_CFG_ADDR_8812F) << BIT_SHIFT_IPS_CFG_ADDR_8812F) 4755 #define BITS_IPS_CFG_ADDR_8812F \ 4756 (BIT_MASK_IPS_CFG_ADDR_8812F << BIT_SHIFT_IPS_CFG_ADDR_8812F) 4757 #define BIT_CLEAR_IPS_CFG_ADDR_8812F(x) ((x) & (~BITS_IPS_CFG_ADDR_8812F)) 4758 #define BIT_GET_IPS_CFG_ADDR_8812F(x) \ 4759 (((x) >> BIT_SHIFT_IPS_CFG_ADDR_8812F) & BIT_MASK_IPS_CFG_ADDR_8812F) 4760 #define BIT_SET_IPS_CFG_ADDR_8812F(x, v) \ 4761 (BIT_CLEAR_IPS_CFG_ADDR_8812F(x) | BIT_IPS_CFG_ADDR_8812F(v)) 4762 4763 /* 2 REG_AES_DECRPT_CFG_8812F */ 4764 4765 #define BIT_SHIFT_IPS_CFG_DATA_8812F 0 4766 #define BIT_MASK_IPS_CFG_DATA_8812F 0xffffffffL 4767 #define BIT_IPS_CFG_DATA_8812F(x) \ 4768 (((x) & BIT_MASK_IPS_CFG_DATA_8812F) << BIT_SHIFT_IPS_CFG_DATA_8812F) 4769 #define BITS_IPS_CFG_DATA_8812F \ 4770 (BIT_MASK_IPS_CFG_DATA_8812F << BIT_SHIFT_IPS_CFG_DATA_8812F) 4771 #define BIT_CLEAR_IPS_CFG_DATA_8812F(x) ((x) & (~BITS_IPS_CFG_DATA_8812F)) 4772 #define BIT_GET_IPS_CFG_DATA_8812F(x) \ 4773 (((x) >> BIT_SHIFT_IPS_CFG_DATA_8812F) & BIT_MASK_IPS_CFG_DATA_8812F) 4774 #define BIT_SET_IPS_CFG_DATA_8812F(x, v) \ 4775 (BIT_CLEAR_IPS_CFG_DATA_8812F(x) | BIT_IPS_CFG_DATA_8812F(v)) 4776 4777 /* 2 REG_HIOE_CTRL_8812F */ 4778 #define BIT_HIOE_CFG_FILE_LOC_SEL_8812F BIT(31) 4779 #define BIT_HIOE_WRITE_REQ_8812F BIT(30) 4780 #define BIT_HIOE_READ_REQ_8812F BIT(29) 4781 #define BIT_INST_FORMAT_ERR_8812F BIT(25) 4782 #define BIT_OP_TIMEOUT_ERR_8812F BIT(24) 4783 4784 #define BIT_SHIFT_HIOE_OP_TIMEOUT_8812F 16 4785 #define BIT_MASK_HIOE_OP_TIMEOUT_8812F 0xff 4786 #define BIT_HIOE_OP_TIMEOUT_8812F(x) \ 4787 (((x) & BIT_MASK_HIOE_OP_TIMEOUT_8812F) \ 4788 << BIT_SHIFT_HIOE_OP_TIMEOUT_8812F) 4789 #define BITS_HIOE_OP_TIMEOUT_8812F \ 4790 (BIT_MASK_HIOE_OP_TIMEOUT_8812F << BIT_SHIFT_HIOE_OP_TIMEOUT_8812F) 4791 #define BIT_CLEAR_HIOE_OP_TIMEOUT_8812F(x) ((x) & (~BITS_HIOE_OP_TIMEOUT_8812F)) 4792 #define BIT_GET_HIOE_OP_TIMEOUT_8812F(x) \ 4793 (((x) >> BIT_SHIFT_HIOE_OP_TIMEOUT_8812F) & \ 4794 BIT_MASK_HIOE_OP_TIMEOUT_8812F) 4795 #define BIT_SET_HIOE_OP_TIMEOUT_8812F(x, v) \ 4796 (BIT_CLEAR_HIOE_OP_TIMEOUT_8812F(x) | BIT_HIOE_OP_TIMEOUT_8812F(v)) 4797 4798 #define BIT_SHIFT_BITDATA_CHECKSUM_8812F 0 4799 #define BIT_MASK_BITDATA_CHECKSUM_8812F 0xffff 4800 #define BIT_BITDATA_CHECKSUM_8812F(x) \ 4801 (((x) & BIT_MASK_BITDATA_CHECKSUM_8812F) \ 4802 << BIT_SHIFT_BITDATA_CHECKSUM_8812F) 4803 #define BITS_BITDATA_CHECKSUM_8812F \ 4804 (BIT_MASK_BITDATA_CHECKSUM_8812F << BIT_SHIFT_BITDATA_CHECKSUM_8812F) 4805 #define BIT_CLEAR_BITDATA_CHECKSUM_8812F(x) \ 4806 ((x) & (~BITS_BITDATA_CHECKSUM_8812F)) 4807 #define BIT_GET_BITDATA_CHECKSUM_8812F(x) \ 4808 (((x) >> BIT_SHIFT_BITDATA_CHECKSUM_8812F) & \ 4809 BIT_MASK_BITDATA_CHECKSUM_8812F) 4810 #define BIT_SET_BITDATA_CHECKSUM_8812F(x, v) \ 4811 (BIT_CLEAR_BITDATA_CHECKSUM_8812F(x) | BIT_BITDATA_CHECKSUM_8812F(v)) 4812 4813 /* 2 REG_HIOE_CFG_FILE_8812F */ 4814 4815 #define BIT_SHIFT_TXBF_END_ADDR_8812F 16 4816 #define BIT_MASK_TXBF_END_ADDR_8812F 0xffff 4817 #define BIT_TXBF_END_ADDR_8812F(x) \ 4818 (((x) & BIT_MASK_TXBF_END_ADDR_8812F) << BIT_SHIFT_TXBF_END_ADDR_8812F) 4819 #define BITS_TXBF_END_ADDR_8812F \ 4820 (BIT_MASK_TXBF_END_ADDR_8812F << BIT_SHIFT_TXBF_END_ADDR_8812F) 4821 #define BIT_CLEAR_TXBF_END_ADDR_8812F(x) ((x) & (~BITS_TXBF_END_ADDR_8812F)) 4822 #define BIT_GET_TXBF_END_ADDR_8812F(x) \ 4823 (((x) >> BIT_SHIFT_TXBF_END_ADDR_8812F) & BIT_MASK_TXBF_END_ADDR_8812F) 4824 #define BIT_SET_TXBF_END_ADDR_8812F(x, v) \ 4825 (BIT_CLEAR_TXBF_END_ADDR_8812F(x) | BIT_TXBF_END_ADDR_8812F(v)) 4826 4827 #define BIT_SHIFT_TXBF_STR_ADDR_8812F 0 4828 #define BIT_MASK_TXBF_STR_ADDR_8812F 0xffff 4829 #define BIT_TXBF_STR_ADDR_8812F(x) \ 4830 (((x) & BIT_MASK_TXBF_STR_ADDR_8812F) << BIT_SHIFT_TXBF_STR_ADDR_8812F) 4831 #define BITS_TXBF_STR_ADDR_8812F \ 4832 (BIT_MASK_TXBF_STR_ADDR_8812F << BIT_SHIFT_TXBF_STR_ADDR_8812F) 4833 #define BIT_CLEAR_TXBF_STR_ADDR_8812F(x) ((x) & (~BITS_TXBF_STR_ADDR_8812F)) 4834 #define BIT_GET_TXBF_STR_ADDR_8812F(x) \ 4835 (((x) >> BIT_SHIFT_TXBF_STR_ADDR_8812F) & BIT_MASK_TXBF_STR_ADDR_8812F) 4836 #define BIT_SET_TXBF_STR_ADDR_8812F(x, v) \ 4837 (BIT_CLEAR_TXBF_STR_ADDR_8812F(x) | BIT_TXBF_STR_ADDR_8812F(v)) 4838 4839 /* 2 REG_TMETER_8812F */ 4840 #define BIT_TEMP_VALID_8812F BIT(31) 4841 4842 #define BIT_SHIFT_TEMP_VALUE_8812F 24 4843 #define BIT_MASK_TEMP_VALUE_8812F 0x3f 4844 #define BIT_TEMP_VALUE_8812F(x) \ 4845 (((x) & BIT_MASK_TEMP_VALUE_8812F) << BIT_SHIFT_TEMP_VALUE_8812F) 4846 #define BITS_TEMP_VALUE_8812F \ 4847 (BIT_MASK_TEMP_VALUE_8812F << BIT_SHIFT_TEMP_VALUE_8812F) 4848 #define BIT_CLEAR_TEMP_VALUE_8812F(x) ((x) & (~BITS_TEMP_VALUE_8812F)) 4849 #define BIT_GET_TEMP_VALUE_8812F(x) \ 4850 (((x) >> BIT_SHIFT_TEMP_VALUE_8812F) & BIT_MASK_TEMP_VALUE_8812F) 4851 #define BIT_SET_TEMP_VALUE_8812F(x, v) \ 4852 (BIT_CLEAR_TEMP_VALUE_8812F(x) | BIT_TEMP_VALUE_8812F(v)) 4853 4854 #define BIT_SHIFT_REG_TMETER_TIMER_8812F 8 4855 #define BIT_MASK_REG_TMETER_TIMER_8812F 0xfff 4856 #define BIT_REG_TMETER_TIMER_8812F(x) \ 4857 (((x) & BIT_MASK_REG_TMETER_TIMER_8812F) \ 4858 << BIT_SHIFT_REG_TMETER_TIMER_8812F) 4859 #define BITS_REG_TMETER_TIMER_8812F \ 4860 (BIT_MASK_REG_TMETER_TIMER_8812F << BIT_SHIFT_REG_TMETER_TIMER_8812F) 4861 #define BIT_CLEAR_REG_TMETER_TIMER_8812F(x) \ 4862 ((x) & (~BITS_REG_TMETER_TIMER_8812F)) 4863 #define BIT_GET_REG_TMETER_TIMER_8812F(x) \ 4864 (((x) >> BIT_SHIFT_REG_TMETER_TIMER_8812F) & \ 4865 BIT_MASK_REG_TMETER_TIMER_8812F) 4866 #define BIT_SET_REG_TMETER_TIMER_8812F(x, v) \ 4867 (BIT_CLEAR_REG_TMETER_TIMER_8812F(x) | BIT_REG_TMETER_TIMER_8812F(v)) 4868 4869 #define BIT_SHIFT_REG_TEMP_DELTA_8812F 2 4870 #define BIT_MASK_REG_TEMP_DELTA_8812F 0x3f 4871 #define BIT_REG_TEMP_DELTA_8812F(x) \ 4872 (((x) & BIT_MASK_REG_TEMP_DELTA_8812F) \ 4873 << BIT_SHIFT_REG_TEMP_DELTA_8812F) 4874 #define BITS_REG_TEMP_DELTA_8812F \ 4875 (BIT_MASK_REG_TEMP_DELTA_8812F << BIT_SHIFT_REG_TEMP_DELTA_8812F) 4876 #define BIT_CLEAR_REG_TEMP_DELTA_8812F(x) ((x) & (~BITS_REG_TEMP_DELTA_8812F)) 4877 #define BIT_GET_REG_TEMP_DELTA_8812F(x) \ 4878 (((x) >> BIT_SHIFT_REG_TEMP_DELTA_8812F) & \ 4879 BIT_MASK_REG_TEMP_DELTA_8812F) 4880 #define BIT_SET_REG_TEMP_DELTA_8812F(x, v) \ 4881 (BIT_CLEAR_REG_TEMP_DELTA_8812F(x) | BIT_REG_TEMP_DELTA_8812F(v)) 4882 4883 #define BIT_REG_TMETER_EN_8812F BIT(0) 4884 4885 /* 2 REG_OSC_32K_CTRL_8812F */ 4886 4887 #define BIT_SHIFT_OSC_32K_CLKGEN_0_8812F 16 4888 #define BIT_MASK_OSC_32K_CLKGEN_0_8812F 0xffff 4889 #define BIT_OSC_32K_CLKGEN_0_8812F(x) \ 4890 (((x) & BIT_MASK_OSC_32K_CLKGEN_0_8812F) \ 4891 << BIT_SHIFT_OSC_32K_CLKGEN_0_8812F) 4892 #define BITS_OSC_32K_CLKGEN_0_8812F \ 4893 (BIT_MASK_OSC_32K_CLKGEN_0_8812F << BIT_SHIFT_OSC_32K_CLKGEN_0_8812F) 4894 #define BIT_CLEAR_OSC_32K_CLKGEN_0_8812F(x) \ 4895 ((x) & (~BITS_OSC_32K_CLKGEN_0_8812F)) 4896 #define BIT_GET_OSC_32K_CLKGEN_0_8812F(x) \ 4897 (((x) >> BIT_SHIFT_OSC_32K_CLKGEN_0_8812F) & \ 4898 BIT_MASK_OSC_32K_CLKGEN_0_8812F) 4899 #define BIT_SET_OSC_32K_CLKGEN_0_8812F(x, v) \ 4900 (BIT_CLEAR_OSC_32K_CLKGEN_0_8812F(x) | BIT_OSC_32K_CLKGEN_0_8812F(v)) 4901 4902 #define BIT_SHIFT_OSC_32K_RES_COMP_8812F 4 4903 #define BIT_MASK_OSC_32K_RES_COMP_8812F 0x3 4904 #define BIT_OSC_32K_RES_COMP_8812F(x) \ 4905 (((x) & BIT_MASK_OSC_32K_RES_COMP_8812F) \ 4906 << BIT_SHIFT_OSC_32K_RES_COMP_8812F) 4907 #define BITS_OSC_32K_RES_COMP_8812F \ 4908 (BIT_MASK_OSC_32K_RES_COMP_8812F << BIT_SHIFT_OSC_32K_RES_COMP_8812F) 4909 #define BIT_CLEAR_OSC_32K_RES_COMP_8812F(x) \ 4910 ((x) & (~BITS_OSC_32K_RES_COMP_8812F)) 4911 #define BIT_GET_OSC_32K_RES_COMP_8812F(x) \ 4912 (((x) >> BIT_SHIFT_OSC_32K_RES_COMP_8812F) & \ 4913 BIT_MASK_OSC_32K_RES_COMP_8812F) 4914 #define BIT_SET_OSC_32K_RES_COMP_8812F(x, v) \ 4915 (BIT_CLEAR_OSC_32K_RES_COMP_8812F(x) | BIT_OSC_32K_RES_COMP_8812F(v)) 4916 4917 #define BIT_OSC_32K_OUT_SEL_8812F BIT(3) 4918 #define BIT_ISO_WL_2_OSC_32K_8812F BIT(1) 4919 #define BIT_POW_CKGEN_8812F BIT(0) 4920 4921 /* 2 REG_32K_CAL_REG1_8812F */ 4922 #define BIT_CAL_32K_REG_WR_8812F BIT(31) 4923 #define BIT_CAL_32K_DBG_SEL_8812F BIT(22) 4924 4925 #define BIT_SHIFT_CAL_32K_REG_ADDR_8812F 16 4926 #define BIT_MASK_CAL_32K_REG_ADDR_8812F 0x3f 4927 #define BIT_CAL_32K_REG_ADDR_8812F(x) \ 4928 (((x) & BIT_MASK_CAL_32K_REG_ADDR_8812F) \ 4929 << BIT_SHIFT_CAL_32K_REG_ADDR_8812F) 4930 #define BITS_CAL_32K_REG_ADDR_8812F \ 4931 (BIT_MASK_CAL_32K_REG_ADDR_8812F << BIT_SHIFT_CAL_32K_REG_ADDR_8812F) 4932 #define BIT_CLEAR_CAL_32K_REG_ADDR_8812F(x) \ 4933 ((x) & (~BITS_CAL_32K_REG_ADDR_8812F)) 4934 #define BIT_GET_CAL_32K_REG_ADDR_8812F(x) \ 4935 (((x) >> BIT_SHIFT_CAL_32K_REG_ADDR_8812F) & \ 4936 BIT_MASK_CAL_32K_REG_ADDR_8812F) 4937 #define BIT_SET_CAL_32K_REG_ADDR_8812F(x, v) \ 4938 (BIT_CLEAR_CAL_32K_REG_ADDR_8812F(x) | BIT_CAL_32K_REG_ADDR_8812F(v)) 4939 4940 #define BIT_SHIFT_CAL_32K_REG_DATA_8812F 0 4941 #define BIT_MASK_CAL_32K_REG_DATA_8812F 0xffff 4942 #define BIT_CAL_32K_REG_DATA_8812F(x) \ 4943 (((x) & BIT_MASK_CAL_32K_REG_DATA_8812F) \ 4944 << BIT_SHIFT_CAL_32K_REG_DATA_8812F) 4945 #define BITS_CAL_32K_REG_DATA_8812F \ 4946 (BIT_MASK_CAL_32K_REG_DATA_8812F << BIT_SHIFT_CAL_32K_REG_DATA_8812F) 4947 #define BIT_CLEAR_CAL_32K_REG_DATA_8812F(x) \ 4948 ((x) & (~BITS_CAL_32K_REG_DATA_8812F)) 4949 #define BIT_GET_CAL_32K_REG_DATA_8812F(x) \ 4950 (((x) >> BIT_SHIFT_CAL_32K_REG_DATA_8812F) & \ 4951 BIT_MASK_CAL_32K_REG_DATA_8812F) 4952 #define BIT_SET_CAL_32K_REG_DATA_8812F(x, v) \ 4953 (BIT_CLEAR_CAL_32K_REG_DATA_8812F(x) | BIT_CAL_32K_REG_DATA_8812F(v)) 4954 4955 /* 2 REG_NOT_VALID_8812F */ 4956 4957 /* 2 REG_C2HEVT_8812F */ 4958 4959 #define BIT_SHIFT_C2HEVT_MSG_V1_8812F 0 4960 #define BIT_MASK_C2HEVT_MSG_V1_8812F 0xffffffffL 4961 #define BIT_C2HEVT_MSG_V1_8812F(x) \ 4962 (((x) & BIT_MASK_C2HEVT_MSG_V1_8812F) << BIT_SHIFT_C2HEVT_MSG_V1_8812F) 4963 #define BITS_C2HEVT_MSG_V1_8812F \ 4964 (BIT_MASK_C2HEVT_MSG_V1_8812F << BIT_SHIFT_C2HEVT_MSG_V1_8812F) 4965 #define BIT_CLEAR_C2HEVT_MSG_V1_8812F(x) ((x) & (~BITS_C2HEVT_MSG_V1_8812F)) 4966 #define BIT_GET_C2HEVT_MSG_V1_8812F(x) \ 4967 (((x) >> BIT_SHIFT_C2HEVT_MSG_V1_8812F) & BIT_MASK_C2HEVT_MSG_V1_8812F) 4968 #define BIT_SET_C2HEVT_MSG_V1_8812F(x, v) \ 4969 (BIT_CLEAR_C2HEVT_MSG_V1_8812F(x) | BIT_C2HEVT_MSG_V1_8812F(v)) 4970 4971 /* 2 REG_C2HEVT_1_8812F */ 4972 4973 #define BIT_SHIFT_C2HEVT_MSG_1_8812F 0 4974 #define BIT_MASK_C2HEVT_MSG_1_8812F 0xffffffffL 4975 #define BIT_C2HEVT_MSG_1_8812F(x) \ 4976 (((x) & BIT_MASK_C2HEVT_MSG_1_8812F) << BIT_SHIFT_C2HEVT_MSG_1_8812F) 4977 #define BITS_C2HEVT_MSG_1_8812F \ 4978 (BIT_MASK_C2HEVT_MSG_1_8812F << BIT_SHIFT_C2HEVT_MSG_1_8812F) 4979 #define BIT_CLEAR_C2HEVT_MSG_1_8812F(x) ((x) & (~BITS_C2HEVT_MSG_1_8812F)) 4980 #define BIT_GET_C2HEVT_MSG_1_8812F(x) \ 4981 (((x) >> BIT_SHIFT_C2HEVT_MSG_1_8812F) & BIT_MASK_C2HEVT_MSG_1_8812F) 4982 #define BIT_SET_C2HEVT_MSG_1_8812F(x, v) \ 4983 (BIT_CLEAR_C2HEVT_MSG_1_8812F(x) | BIT_C2HEVT_MSG_1_8812F(v)) 4984 4985 /* 2 REG_C2HEVT_2_8812F */ 4986 4987 #define BIT_SHIFT_C2HEVT_MSG_2_8812F 0 4988 #define BIT_MASK_C2HEVT_MSG_2_8812F 0xffffffffL 4989 #define BIT_C2HEVT_MSG_2_8812F(x) \ 4990 (((x) & BIT_MASK_C2HEVT_MSG_2_8812F) << BIT_SHIFT_C2HEVT_MSG_2_8812F) 4991 #define BITS_C2HEVT_MSG_2_8812F \ 4992 (BIT_MASK_C2HEVT_MSG_2_8812F << BIT_SHIFT_C2HEVT_MSG_2_8812F) 4993 #define BIT_CLEAR_C2HEVT_MSG_2_8812F(x) ((x) & (~BITS_C2HEVT_MSG_2_8812F)) 4994 #define BIT_GET_C2HEVT_MSG_2_8812F(x) \ 4995 (((x) >> BIT_SHIFT_C2HEVT_MSG_2_8812F) & BIT_MASK_C2HEVT_MSG_2_8812F) 4996 #define BIT_SET_C2HEVT_MSG_2_8812F(x, v) \ 4997 (BIT_CLEAR_C2HEVT_MSG_2_8812F(x) | BIT_C2HEVT_MSG_2_8812F(v)) 4998 4999 /* 2 REG_C2HEVT_3_8812F */ 5000 5001 #define BIT_SHIFT_C2HEVT_MSG_3_8812F 0 5002 #define BIT_MASK_C2HEVT_MSG_3_8812F 0xffffffffL 5003 #define BIT_C2HEVT_MSG_3_8812F(x) \ 5004 (((x) & BIT_MASK_C2HEVT_MSG_3_8812F) << BIT_SHIFT_C2HEVT_MSG_3_8812F) 5005 #define BITS_C2HEVT_MSG_3_8812F \ 5006 (BIT_MASK_C2HEVT_MSG_3_8812F << BIT_SHIFT_C2HEVT_MSG_3_8812F) 5007 #define BIT_CLEAR_C2HEVT_MSG_3_8812F(x) ((x) & (~BITS_C2HEVT_MSG_3_8812F)) 5008 #define BIT_GET_C2HEVT_MSG_3_8812F(x) \ 5009 (((x) >> BIT_SHIFT_C2HEVT_MSG_3_8812F) & BIT_MASK_C2HEVT_MSG_3_8812F) 5010 #define BIT_SET_C2HEVT_MSG_3_8812F(x, v) \ 5011 (BIT_CLEAR_C2HEVT_MSG_3_8812F(x) | BIT_C2HEVT_MSG_3_8812F(v)) 5012 5013 /* 2 REG_NOT_VALID_8812F */ 5014 5015 /* 2 REG_NOT_VALID_8812F */ 5016 5017 /* 2 REG_SW_DEFINED_PAGE1_8812F */ 5018 5019 #define BIT_SHIFT_SW_DEFINED_PAGE1_V1_8812F 0 5020 #define BIT_MASK_SW_DEFINED_PAGE1_V1_8812F 0xffffffffL 5021 #define BIT_SW_DEFINED_PAGE1_V1_8812F(x) \ 5022 (((x) & BIT_MASK_SW_DEFINED_PAGE1_V1_8812F) \ 5023 << BIT_SHIFT_SW_DEFINED_PAGE1_V1_8812F) 5024 #define BITS_SW_DEFINED_PAGE1_V1_8812F \ 5025 (BIT_MASK_SW_DEFINED_PAGE1_V1_8812F \ 5026 << BIT_SHIFT_SW_DEFINED_PAGE1_V1_8812F) 5027 #define BIT_CLEAR_SW_DEFINED_PAGE1_V1_8812F(x) \ 5028 ((x) & (~BITS_SW_DEFINED_PAGE1_V1_8812F)) 5029 #define BIT_GET_SW_DEFINED_PAGE1_V1_8812F(x) \ 5030 (((x) >> BIT_SHIFT_SW_DEFINED_PAGE1_V1_8812F) & \ 5031 BIT_MASK_SW_DEFINED_PAGE1_V1_8812F) 5032 #define BIT_SET_SW_DEFINED_PAGE1_V1_8812F(x, v) \ 5033 (BIT_CLEAR_SW_DEFINED_PAGE1_V1_8812F(x) | \ 5034 BIT_SW_DEFINED_PAGE1_V1_8812F(v)) 5035 5036 /* 2 REG_SW_DEFINED_PAGE2_8812F */ 5037 5038 #define BIT_SHIFT_SW_DEFINED_PAGE2_8812F 0 5039 #define BIT_MASK_SW_DEFINED_PAGE2_8812F 0xffffffffL 5040 #define BIT_SW_DEFINED_PAGE2_8812F(x) \ 5041 (((x) & BIT_MASK_SW_DEFINED_PAGE2_8812F) \ 5042 << BIT_SHIFT_SW_DEFINED_PAGE2_8812F) 5043 #define BITS_SW_DEFINED_PAGE2_8812F \ 5044 (BIT_MASK_SW_DEFINED_PAGE2_8812F << BIT_SHIFT_SW_DEFINED_PAGE2_8812F) 5045 #define BIT_CLEAR_SW_DEFINED_PAGE2_8812F(x) \ 5046 ((x) & (~BITS_SW_DEFINED_PAGE2_8812F)) 5047 #define BIT_GET_SW_DEFINED_PAGE2_8812F(x) \ 5048 (((x) >> BIT_SHIFT_SW_DEFINED_PAGE2_8812F) & \ 5049 BIT_MASK_SW_DEFINED_PAGE2_8812F) 5050 #define BIT_SET_SW_DEFINED_PAGE2_8812F(x, v) \ 5051 (BIT_CLEAR_SW_DEFINED_PAGE2_8812F(x) | BIT_SW_DEFINED_PAGE2_8812F(v)) 5052 5053 /* 2 REG_MCUTST_I_8812F */ 5054 5055 #define BIT_SHIFT_MCUDMSG_I_8812F 0 5056 #define BIT_MASK_MCUDMSG_I_8812F 0xffffffffL 5057 #define BIT_MCUDMSG_I_8812F(x) \ 5058 (((x) & BIT_MASK_MCUDMSG_I_8812F) << BIT_SHIFT_MCUDMSG_I_8812F) 5059 #define BITS_MCUDMSG_I_8812F \ 5060 (BIT_MASK_MCUDMSG_I_8812F << BIT_SHIFT_MCUDMSG_I_8812F) 5061 #define BIT_CLEAR_MCUDMSG_I_8812F(x) ((x) & (~BITS_MCUDMSG_I_8812F)) 5062 #define BIT_GET_MCUDMSG_I_8812F(x) \ 5063 (((x) >> BIT_SHIFT_MCUDMSG_I_8812F) & BIT_MASK_MCUDMSG_I_8812F) 5064 #define BIT_SET_MCUDMSG_I_8812F(x, v) \ 5065 (BIT_CLEAR_MCUDMSG_I_8812F(x) | BIT_MCUDMSG_I_8812F(v)) 5066 5067 /* 2 REG_MCUTST_II_8812F */ 5068 5069 #define BIT_SHIFT_MCUDMSG_II_8812F 0 5070 #define BIT_MASK_MCUDMSG_II_8812F 0xffffffffL 5071 #define BIT_MCUDMSG_II_8812F(x) \ 5072 (((x) & BIT_MASK_MCUDMSG_II_8812F) << BIT_SHIFT_MCUDMSG_II_8812F) 5073 #define BITS_MCUDMSG_II_8812F \ 5074 (BIT_MASK_MCUDMSG_II_8812F << BIT_SHIFT_MCUDMSG_II_8812F) 5075 #define BIT_CLEAR_MCUDMSG_II_8812F(x) ((x) & (~BITS_MCUDMSG_II_8812F)) 5076 #define BIT_GET_MCUDMSG_II_8812F(x) \ 5077 (((x) >> BIT_SHIFT_MCUDMSG_II_8812F) & BIT_MASK_MCUDMSG_II_8812F) 5078 #define BIT_SET_MCUDMSG_II_8812F(x, v) \ 5079 (BIT_CLEAR_MCUDMSG_II_8812F(x) | BIT_MCUDMSG_II_8812F(v)) 5080 5081 /* 2 REG_FMETHR_8812F */ 5082 #define BIT_FMSG_INT_8812F BIT(31) 5083 5084 #define BIT_SHIFT_FW_MSG_8812F 0 5085 #define BIT_MASK_FW_MSG_8812F 0xffffffffL 5086 #define BIT_FW_MSG_8812F(x) \ 5087 (((x) & BIT_MASK_FW_MSG_8812F) << BIT_SHIFT_FW_MSG_8812F) 5088 #define BITS_FW_MSG_8812F (BIT_MASK_FW_MSG_8812F << BIT_SHIFT_FW_MSG_8812F) 5089 #define BIT_CLEAR_FW_MSG_8812F(x) ((x) & (~BITS_FW_MSG_8812F)) 5090 #define BIT_GET_FW_MSG_8812F(x) \ 5091 (((x) >> BIT_SHIFT_FW_MSG_8812F) & BIT_MASK_FW_MSG_8812F) 5092 #define BIT_SET_FW_MSG_8812F(x, v) \ 5093 (BIT_CLEAR_FW_MSG_8812F(x) | BIT_FW_MSG_8812F(v)) 5094 5095 /* 2 REG_HMETFR_8812F */ 5096 5097 #define BIT_SHIFT_HRCV_MSG_8812F 24 5098 #define BIT_MASK_HRCV_MSG_8812F 0xff 5099 #define BIT_HRCV_MSG_8812F(x) \ 5100 (((x) & BIT_MASK_HRCV_MSG_8812F) << BIT_SHIFT_HRCV_MSG_8812F) 5101 #define BITS_HRCV_MSG_8812F \ 5102 (BIT_MASK_HRCV_MSG_8812F << BIT_SHIFT_HRCV_MSG_8812F) 5103 #define BIT_CLEAR_HRCV_MSG_8812F(x) ((x) & (~BITS_HRCV_MSG_8812F)) 5104 #define BIT_GET_HRCV_MSG_8812F(x) \ 5105 (((x) >> BIT_SHIFT_HRCV_MSG_8812F) & BIT_MASK_HRCV_MSG_8812F) 5106 #define BIT_SET_HRCV_MSG_8812F(x, v) \ 5107 (BIT_CLEAR_HRCV_MSG_8812F(x) | BIT_HRCV_MSG_8812F(v)) 5108 5109 #define BIT_INT_BOX3_8812F BIT(3) 5110 #define BIT_INT_BOX2_8812F BIT(2) 5111 #define BIT_INT_BOX1_8812F BIT(1) 5112 #define BIT_INT_BOX0_8812F BIT(0) 5113 5114 /* 2 REG_HMEBOX0_8812F */ 5115 5116 #define BIT_SHIFT_HOST_MSG_0_8812F 0 5117 #define BIT_MASK_HOST_MSG_0_8812F 0xffffffffL 5118 #define BIT_HOST_MSG_0_8812F(x) \ 5119 (((x) & BIT_MASK_HOST_MSG_0_8812F) << BIT_SHIFT_HOST_MSG_0_8812F) 5120 #define BITS_HOST_MSG_0_8812F \ 5121 (BIT_MASK_HOST_MSG_0_8812F << BIT_SHIFT_HOST_MSG_0_8812F) 5122 #define BIT_CLEAR_HOST_MSG_0_8812F(x) ((x) & (~BITS_HOST_MSG_0_8812F)) 5123 #define BIT_GET_HOST_MSG_0_8812F(x) \ 5124 (((x) >> BIT_SHIFT_HOST_MSG_0_8812F) & BIT_MASK_HOST_MSG_0_8812F) 5125 #define BIT_SET_HOST_MSG_0_8812F(x, v) \ 5126 (BIT_CLEAR_HOST_MSG_0_8812F(x) | BIT_HOST_MSG_0_8812F(v)) 5127 5128 /* 2 REG_HMEBOX1_8812F */ 5129 5130 #define BIT_SHIFT_HOST_MSG_1_8812F 0 5131 #define BIT_MASK_HOST_MSG_1_8812F 0xffffffffL 5132 #define BIT_HOST_MSG_1_8812F(x) \ 5133 (((x) & BIT_MASK_HOST_MSG_1_8812F) << BIT_SHIFT_HOST_MSG_1_8812F) 5134 #define BITS_HOST_MSG_1_8812F \ 5135 (BIT_MASK_HOST_MSG_1_8812F << BIT_SHIFT_HOST_MSG_1_8812F) 5136 #define BIT_CLEAR_HOST_MSG_1_8812F(x) ((x) & (~BITS_HOST_MSG_1_8812F)) 5137 #define BIT_GET_HOST_MSG_1_8812F(x) \ 5138 (((x) >> BIT_SHIFT_HOST_MSG_1_8812F) & BIT_MASK_HOST_MSG_1_8812F) 5139 #define BIT_SET_HOST_MSG_1_8812F(x, v) \ 5140 (BIT_CLEAR_HOST_MSG_1_8812F(x) | BIT_HOST_MSG_1_8812F(v)) 5141 5142 /* 2 REG_HMEBOX2_8812F */ 5143 5144 #define BIT_SHIFT_HOST_MSG_2_8812F 0 5145 #define BIT_MASK_HOST_MSG_2_8812F 0xffffffffL 5146 #define BIT_HOST_MSG_2_8812F(x) \ 5147 (((x) & BIT_MASK_HOST_MSG_2_8812F) << BIT_SHIFT_HOST_MSG_2_8812F) 5148 #define BITS_HOST_MSG_2_8812F \ 5149 (BIT_MASK_HOST_MSG_2_8812F << BIT_SHIFT_HOST_MSG_2_8812F) 5150 #define BIT_CLEAR_HOST_MSG_2_8812F(x) ((x) & (~BITS_HOST_MSG_2_8812F)) 5151 #define BIT_GET_HOST_MSG_2_8812F(x) \ 5152 (((x) >> BIT_SHIFT_HOST_MSG_2_8812F) & BIT_MASK_HOST_MSG_2_8812F) 5153 #define BIT_SET_HOST_MSG_2_8812F(x, v) \ 5154 (BIT_CLEAR_HOST_MSG_2_8812F(x) | BIT_HOST_MSG_2_8812F(v)) 5155 5156 /* 2 REG_HMEBOX3_8812F */ 5157 5158 #define BIT_SHIFT_HOST_MSG_3_8812F 0 5159 #define BIT_MASK_HOST_MSG_3_8812F 0xffffffffL 5160 #define BIT_HOST_MSG_3_8812F(x) \ 5161 (((x) & BIT_MASK_HOST_MSG_3_8812F) << BIT_SHIFT_HOST_MSG_3_8812F) 5162 #define BITS_HOST_MSG_3_8812F \ 5163 (BIT_MASK_HOST_MSG_3_8812F << BIT_SHIFT_HOST_MSG_3_8812F) 5164 #define BIT_CLEAR_HOST_MSG_3_8812F(x) ((x) & (~BITS_HOST_MSG_3_8812F)) 5165 #define BIT_GET_HOST_MSG_3_8812F(x) \ 5166 (((x) >> BIT_SHIFT_HOST_MSG_3_8812F) & BIT_MASK_HOST_MSG_3_8812F) 5167 #define BIT_SET_HOST_MSG_3_8812F(x, v) \ 5168 (BIT_CLEAR_HOST_MSG_3_8812F(x) | BIT_HOST_MSG_3_8812F(v)) 5169 5170 /* 2 REG_NOT_VALID_8812F */ 5171 5172 /* 2 REG_NOT_VALID_8812F */ 5173 5174 /* 2 REG_BB_ACCESS_CTRL_8812F */ 5175 5176 #define BIT_SHIFT_BB_WRITE_READ_8812F 30 5177 #define BIT_MASK_BB_WRITE_READ_8812F 0x3 5178 #define BIT_BB_WRITE_READ_8812F(x) \ 5179 (((x) & BIT_MASK_BB_WRITE_READ_8812F) << BIT_SHIFT_BB_WRITE_READ_8812F) 5180 #define BITS_BB_WRITE_READ_8812F \ 5181 (BIT_MASK_BB_WRITE_READ_8812F << BIT_SHIFT_BB_WRITE_READ_8812F) 5182 #define BIT_CLEAR_BB_WRITE_READ_8812F(x) ((x) & (~BITS_BB_WRITE_READ_8812F)) 5183 #define BIT_GET_BB_WRITE_READ_8812F(x) \ 5184 (((x) >> BIT_SHIFT_BB_WRITE_READ_8812F) & BIT_MASK_BB_WRITE_READ_8812F) 5185 #define BIT_SET_BB_WRITE_READ_8812F(x, v) \ 5186 (BIT_CLEAR_BB_WRITE_READ_8812F(x) | BIT_BB_WRITE_READ_8812F(v)) 5187 5188 #define BIT_SHIFT_BB_WRITE_EN_8812F 12 5189 #define BIT_MASK_BB_WRITE_EN_8812F 0xf 5190 #define BIT_BB_WRITE_EN_8812F(x) \ 5191 (((x) & BIT_MASK_BB_WRITE_EN_8812F) << BIT_SHIFT_BB_WRITE_EN_8812F) 5192 #define BITS_BB_WRITE_EN_8812F \ 5193 (BIT_MASK_BB_WRITE_EN_8812F << BIT_SHIFT_BB_WRITE_EN_8812F) 5194 #define BIT_CLEAR_BB_WRITE_EN_8812F(x) ((x) & (~BITS_BB_WRITE_EN_8812F)) 5195 #define BIT_GET_BB_WRITE_EN_8812F(x) \ 5196 (((x) >> BIT_SHIFT_BB_WRITE_EN_8812F) & BIT_MASK_BB_WRITE_EN_8812F) 5197 #define BIT_SET_BB_WRITE_EN_8812F(x, v) \ 5198 (BIT_CLEAR_BB_WRITE_EN_8812F(x) | BIT_BB_WRITE_EN_8812F(v)) 5199 5200 #define BIT_SHIFT_BB_ADDR_8812F 2 5201 #define BIT_MASK_BB_ADDR_8812F 0x1ff 5202 #define BIT_BB_ADDR_8812F(x) \ 5203 (((x) & BIT_MASK_BB_ADDR_8812F) << BIT_SHIFT_BB_ADDR_8812F) 5204 #define BITS_BB_ADDR_8812F (BIT_MASK_BB_ADDR_8812F << BIT_SHIFT_BB_ADDR_8812F) 5205 #define BIT_CLEAR_BB_ADDR_8812F(x) ((x) & (~BITS_BB_ADDR_8812F)) 5206 #define BIT_GET_BB_ADDR_8812F(x) \ 5207 (((x) >> BIT_SHIFT_BB_ADDR_8812F) & BIT_MASK_BB_ADDR_8812F) 5208 #define BIT_SET_BB_ADDR_8812F(x, v) \ 5209 (BIT_CLEAR_BB_ADDR_8812F(x) | BIT_BB_ADDR_8812F(v)) 5210 5211 #define BIT_BB_ERRACC_8812F BIT(0) 5212 5213 /* 2 REG_BB_ACCESS_DATA_8812F */ 5214 5215 #define BIT_SHIFT_BB_DATA_8812F 0 5216 #define BIT_MASK_BB_DATA_8812F 0xffffffffL 5217 #define BIT_BB_DATA_8812F(x) \ 5218 (((x) & BIT_MASK_BB_DATA_8812F) << BIT_SHIFT_BB_DATA_8812F) 5219 #define BITS_BB_DATA_8812F (BIT_MASK_BB_DATA_8812F << BIT_SHIFT_BB_DATA_8812F) 5220 #define BIT_CLEAR_BB_DATA_8812F(x) ((x) & (~BITS_BB_DATA_8812F)) 5221 #define BIT_GET_BB_DATA_8812F(x) \ 5222 (((x) >> BIT_SHIFT_BB_DATA_8812F) & BIT_MASK_BB_DATA_8812F) 5223 #define BIT_SET_BB_DATA_8812F(x, v) \ 5224 (BIT_CLEAR_BB_DATA_8812F(x) | BIT_BB_DATA_8812F(v)) 5225 5226 /* 2 REG_HMEBOX_E0_8812F */ 5227 5228 #define BIT_SHIFT_HMEBOX_E0_8812F 0 5229 #define BIT_MASK_HMEBOX_E0_8812F 0xffffffffL 5230 #define BIT_HMEBOX_E0_8812F(x) \ 5231 (((x) & BIT_MASK_HMEBOX_E0_8812F) << BIT_SHIFT_HMEBOX_E0_8812F) 5232 #define BITS_HMEBOX_E0_8812F \ 5233 (BIT_MASK_HMEBOX_E0_8812F << BIT_SHIFT_HMEBOX_E0_8812F) 5234 #define BIT_CLEAR_HMEBOX_E0_8812F(x) ((x) & (~BITS_HMEBOX_E0_8812F)) 5235 #define BIT_GET_HMEBOX_E0_8812F(x) \ 5236 (((x) >> BIT_SHIFT_HMEBOX_E0_8812F) & BIT_MASK_HMEBOX_E0_8812F) 5237 #define BIT_SET_HMEBOX_E0_8812F(x, v) \ 5238 (BIT_CLEAR_HMEBOX_E0_8812F(x) | BIT_HMEBOX_E0_8812F(v)) 5239 5240 /* 2 REG_HMEBOX_E1_8812F */ 5241 5242 #define BIT_SHIFT_HMEBOX_E1_8812F 0 5243 #define BIT_MASK_HMEBOX_E1_8812F 0xffffffffL 5244 #define BIT_HMEBOX_E1_8812F(x) \ 5245 (((x) & BIT_MASK_HMEBOX_E1_8812F) << BIT_SHIFT_HMEBOX_E1_8812F) 5246 #define BITS_HMEBOX_E1_8812F \ 5247 (BIT_MASK_HMEBOX_E1_8812F << BIT_SHIFT_HMEBOX_E1_8812F) 5248 #define BIT_CLEAR_HMEBOX_E1_8812F(x) ((x) & (~BITS_HMEBOX_E1_8812F)) 5249 #define BIT_GET_HMEBOX_E1_8812F(x) \ 5250 (((x) >> BIT_SHIFT_HMEBOX_E1_8812F) & BIT_MASK_HMEBOX_E1_8812F) 5251 #define BIT_SET_HMEBOX_E1_8812F(x, v) \ 5252 (BIT_CLEAR_HMEBOX_E1_8812F(x) | BIT_HMEBOX_E1_8812F(v)) 5253 5254 /* 2 REG_HMEBOX_E2_8812F */ 5255 5256 #define BIT_SHIFT_HMEBOX_E2_8812F 0 5257 #define BIT_MASK_HMEBOX_E2_8812F 0xffffffffL 5258 #define BIT_HMEBOX_E2_8812F(x) \ 5259 (((x) & BIT_MASK_HMEBOX_E2_8812F) << BIT_SHIFT_HMEBOX_E2_8812F) 5260 #define BITS_HMEBOX_E2_8812F \ 5261 (BIT_MASK_HMEBOX_E2_8812F << BIT_SHIFT_HMEBOX_E2_8812F) 5262 #define BIT_CLEAR_HMEBOX_E2_8812F(x) ((x) & (~BITS_HMEBOX_E2_8812F)) 5263 #define BIT_GET_HMEBOX_E2_8812F(x) \ 5264 (((x) >> BIT_SHIFT_HMEBOX_E2_8812F) & BIT_MASK_HMEBOX_E2_8812F) 5265 #define BIT_SET_HMEBOX_E2_8812F(x, v) \ 5266 (BIT_CLEAR_HMEBOX_E2_8812F(x) | BIT_HMEBOX_E2_8812F(v)) 5267 5268 /* 2 REG_HMEBOX_E3_8812F */ 5269 5270 #define BIT_SHIFT_HMEBOX_E3_8812F 0 5271 #define BIT_MASK_HMEBOX_E3_8812F 0xffffffffL 5272 #define BIT_HMEBOX_E3_8812F(x) \ 5273 (((x) & BIT_MASK_HMEBOX_E3_8812F) << BIT_SHIFT_HMEBOX_E3_8812F) 5274 #define BITS_HMEBOX_E3_8812F \ 5275 (BIT_MASK_HMEBOX_E3_8812F << BIT_SHIFT_HMEBOX_E3_8812F) 5276 #define BIT_CLEAR_HMEBOX_E3_8812F(x) ((x) & (~BITS_HMEBOX_E3_8812F)) 5277 #define BIT_GET_HMEBOX_E3_8812F(x) \ 5278 (((x) >> BIT_SHIFT_HMEBOX_E3_8812F) & BIT_MASK_HMEBOX_E3_8812F) 5279 #define BIT_SET_HMEBOX_E3_8812F(x, v) \ 5280 (BIT_CLEAR_HMEBOX_E3_8812F(x) | BIT_HMEBOX_E3_8812F(v)) 5281 5282 /* 2 REG_CR_EXT_8812F */ 5283 5284 #define BIT_SHIFT_PHY_REQ_DELAY_8812F 24 5285 #define BIT_MASK_PHY_REQ_DELAY_8812F 0xf 5286 #define BIT_PHY_REQ_DELAY_8812F(x) \ 5287 (((x) & BIT_MASK_PHY_REQ_DELAY_8812F) << BIT_SHIFT_PHY_REQ_DELAY_8812F) 5288 #define BITS_PHY_REQ_DELAY_8812F \ 5289 (BIT_MASK_PHY_REQ_DELAY_8812F << BIT_SHIFT_PHY_REQ_DELAY_8812F) 5290 #define BIT_CLEAR_PHY_REQ_DELAY_8812F(x) ((x) & (~BITS_PHY_REQ_DELAY_8812F)) 5291 #define BIT_GET_PHY_REQ_DELAY_8812F(x) \ 5292 (((x) >> BIT_SHIFT_PHY_REQ_DELAY_8812F) & BIT_MASK_PHY_REQ_DELAY_8812F) 5293 #define BIT_SET_PHY_REQ_DELAY_8812F(x, v) \ 5294 (BIT_CLEAR_PHY_REQ_DELAY_8812F(x) | BIT_PHY_REQ_DELAY_8812F(v)) 5295 5296 /* 2 REG_NOT_VALID_8812F */ 5297 #define BIT_SPD_DOWN_8812F BIT(16) 5298 5299 /* 2 REG_NOT_VALID_8812F */ 5300 5301 #define BIT_SHIFT_NETYPE4_8812F 4 5302 #define BIT_MASK_NETYPE4_8812F 0x3 5303 #define BIT_NETYPE4_8812F(x) \ 5304 (((x) & BIT_MASK_NETYPE4_8812F) << BIT_SHIFT_NETYPE4_8812F) 5305 #define BITS_NETYPE4_8812F (BIT_MASK_NETYPE4_8812F << BIT_SHIFT_NETYPE4_8812F) 5306 #define BIT_CLEAR_NETYPE4_8812F(x) ((x) & (~BITS_NETYPE4_8812F)) 5307 #define BIT_GET_NETYPE4_8812F(x) \ 5308 (((x) >> BIT_SHIFT_NETYPE4_8812F) & BIT_MASK_NETYPE4_8812F) 5309 #define BIT_SET_NETYPE4_8812F(x, v) \ 5310 (BIT_CLEAR_NETYPE4_8812F(x) | BIT_NETYPE4_8812F(v)) 5311 5312 #define BIT_SHIFT_NETYPE3_8812F 2 5313 #define BIT_MASK_NETYPE3_8812F 0x3 5314 #define BIT_NETYPE3_8812F(x) \ 5315 (((x) & BIT_MASK_NETYPE3_8812F) << BIT_SHIFT_NETYPE3_8812F) 5316 #define BITS_NETYPE3_8812F (BIT_MASK_NETYPE3_8812F << BIT_SHIFT_NETYPE3_8812F) 5317 #define BIT_CLEAR_NETYPE3_8812F(x) ((x) & (~BITS_NETYPE3_8812F)) 5318 #define BIT_GET_NETYPE3_8812F(x) \ 5319 (((x) >> BIT_SHIFT_NETYPE3_8812F) & BIT_MASK_NETYPE3_8812F) 5320 #define BIT_SET_NETYPE3_8812F(x, v) \ 5321 (BIT_CLEAR_NETYPE3_8812F(x) | BIT_NETYPE3_8812F(v)) 5322 5323 #define BIT_SHIFT_NETYPE2_8812F 0 5324 #define BIT_MASK_NETYPE2_8812F 0x3 5325 #define BIT_NETYPE2_8812F(x) \ 5326 (((x) & BIT_MASK_NETYPE2_8812F) << BIT_SHIFT_NETYPE2_8812F) 5327 #define BITS_NETYPE2_8812F (BIT_MASK_NETYPE2_8812F << BIT_SHIFT_NETYPE2_8812F) 5328 #define BIT_CLEAR_NETYPE2_8812F(x) ((x) & (~BITS_NETYPE2_8812F)) 5329 #define BIT_GET_NETYPE2_8812F(x) \ 5330 (((x) >> BIT_SHIFT_NETYPE2_8812F) & BIT_MASK_NETYPE2_8812F) 5331 #define BIT_SET_NETYPE2_8812F(x, v) \ 5332 (BIT_CLEAR_NETYPE2_8812F(x) | BIT_NETYPE2_8812F(v)) 5333 5334 /* 2 REG_NOT_VALID_8812F */ 5335 5336 /* 2 REG_NOT_VALID_8812F */ 5337 5338 /* 2 REG_NOT_VALID_8812F */ 5339 5340 /* 2 REG_NOT_VALID_8812F */ 5341 5342 /* 2 REG_FWFF_8812F */ 5343 5344 #define BIT_SHIFT_PKTNUM_TH_V1_8812F 24 5345 #define BIT_MASK_PKTNUM_TH_V1_8812F 0xff 5346 #define BIT_PKTNUM_TH_V1_8812F(x) \ 5347 (((x) & BIT_MASK_PKTNUM_TH_V1_8812F) << BIT_SHIFT_PKTNUM_TH_V1_8812F) 5348 #define BITS_PKTNUM_TH_V1_8812F \ 5349 (BIT_MASK_PKTNUM_TH_V1_8812F << BIT_SHIFT_PKTNUM_TH_V1_8812F) 5350 #define BIT_CLEAR_PKTNUM_TH_V1_8812F(x) ((x) & (~BITS_PKTNUM_TH_V1_8812F)) 5351 #define BIT_GET_PKTNUM_TH_V1_8812F(x) \ 5352 (((x) >> BIT_SHIFT_PKTNUM_TH_V1_8812F) & BIT_MASK_PKTNUM_TH_V1_8812F) 5353 #define BIT_SET_PKTNUM_TH_V1_8812F(x, v) \ 5354 (BIT_CLEAR_PKTNUM_TH_V1_8812F(x) | BIT_PKTNUM_TH_V1_8812F(v)) 5355 5356 #define BIT_SHIFT_TIMER_TH_8812F 16 5357 #define BIT_MASK_TIMER_TH_8812F 0xff 5358 #define BIT_TIMER_TH_8812F(x) \ 5359 (((x) & BIT_MASK_TIMER_TH_8812F) << BIT_SHIFT_TIMER_TH_8812F) 5360 #define BITS_TIMER_TH_8812F \ 5361 (BIT_MASK_TIMER_TH_8812F << BIT_SHIFT_TIMER_TH_8812F) 5362 #define BIT_CLEAR_TIMER_TH_8812F(x) ((x) & (~BITS_TIMER_TH_8812F)) 5363 #define BIT_GET_TIMER_TH_8812F(x) \ 5364 (((x) >> BIT_SHIFT_TIMER_TH_8812F) & BIT_MASK_TIMER_TH_8812F) 5365 #define BIT_SET_TIMER_TH_8812F(x, v) \ 5366 (BIT_CLEAR_TIMER_TH_8812F(x) | BIT_TIMER_TH_8812F(v)) 5367 5368 #define BIT_SHIFT_RXPKT1ENADDR_8812F 0 5369 #define BIT_MASK_RXPKT1ENADDR_8812F 0xffff 5370 #define BIT_RXPKT1ENADDR_8812F(x) \ 5371 (((x) & BIT_MASK_RXPKT1ENADDR_8812F) << BIT_SHIFT_RXPKT1ENADDR_8812F) 5372 #define BITS_RXPKT1ENADDR_8812F \ 5373 (BIT_MASK_RXPKT1ENADDR_8812F << BIT_SHIFT_RXPKT1ENADDR_8812F) 5374 #define BIT_CLEAR_RXPKT1ENADDR_8812F(x) ((x) & (~BITS_RXPKT1ENADDR_8812F)) 5375 #define BIT_GET_RXPKT1ENADDR_8812F(x) \ 5376 (((x) >> BIT_SHIFT_RXPKT1ENADDR_8812F) & BIT_MASK_RXPKT1ENADDR_8812F) 5377 #define BIT_SET_RXPKT1ENADDR_8812F(x, v) \ 5378 (BIT_CLEAR_RXPKT1ENADDR_8812F(x) | BIT_RXPKT1ENADDR_8812F(v)) 5379 5380 /* 2 REG_RXFF_PTR_V1_8812F */ 5381 5382 /* 2 REG_NOT_VALID_8812F */ 5383 5384 #define BIT_SHIFT_RXFF0_RDPTR_V2_8812F 0 5385 #define BIT_MASK_RXFF0_RDPTR_V2_8812F 0x3ffff 5386 #define BIT_RXFF0_RDPTR_V2_8812F(x) \ 5387 (((x) & BIT_MASK_RXFF0_RDPTR_V2_8812F) \ 5388 << BIT_SHIFT_RXFF0_RDPTR_V2_8812F) 5389 #define BITS_RXFF0_RDPTR_V2_8812F \ 5390 (BIT_MASK_RXFF0_RDPTR_V2_8812F << BIT_SHIFT_RXFF0_RDPTR_V2_8812F) 5391 #define BIT_CLEAR_RXFF0_RDPTR_V2_8812F(x) ((x) & (~BITS_RXFF0_RDPTR_V2_8812F)) 5392 #define BIT_GET_RXFF0_RDPTR_V2_8812F(x) \ 5393 (((x) >> BIT_SHIFT_RXFF0_RDPTR_V2_8812F) & \ 5394 BIT_MASK_RXFF0_RDPTR_V2_8812F) 5395 #define BIT_SET_RXFF0_RDPTR_V2_8812F(x, v) \ 5396 (BIT_CLEAR_RXFF0_RDPTR_V2_8812F(x) | BIT_RXFF0_RDPTR_V2_8812F(v)) 5397 5398 /* 2 REG_RXFF_WTR_V1_8812F */ 5399 5400 /* 2 REG_NOT_VALID_8812F */ 5401 5402 #define BIT_SHIFT_RXFF0_WTPTR_V2_8812F 0 5403 #define BIT_MASK_RXFF0_WTPTR_V2_8812F 0x3ffff 5404 #define BIT_RXFF0_WTPTR_V2_8812F(x) \ 5405 (((x) & BIT_MASK_RXFF0_WTPTR_V2_8812F) \ 5406 << BIT_SHIFT_RXFF0_WTPTR_V2_8812F) 5407 #define BITS_RXFF0_WTPTR_V2_8812F \ 5408 (BIT_MASK_RXFF0_WTPTR_V2_8812F << BIT_SHIFT_RXFF0_WTPTR_V2_8812F) 5409 #define BIT_CLEAR_RXFF0_WTPTR_V2_8812F(x) ((x) & (~BITS_RXFF0_WTPTR_V2_8812F)) 5410 #define BIT_GET_RXFF0_WTPTR_V2_8812F(x) \ 5411 (((x) >> BIT_SHIFT_RXFF0_WTPTR_V2_8812F) & \ 5412 BIT_MASK_RXFF0_WTPTR_V2_8812F) 5413 #define BIT_SET_RXFF0_WTPTR_V2_8812F(x, v) \ 5414 (BIT_CLEAR_RXFF0_WTPTR_V2_8812F(x) | BIT_RXFF0_WTPTR_V2_8812F(v)) 5415 5416 /* 2 REG_FE2IMR_8812F */ 5417 #define BIT__FE4ISR__IND_MSK_8812F BIT(29) 5418 #define BIT_FS_TXSC_DESC_DONE_INT_EN_8812F BIT(28) 5419 #define BIT_FS_TXSC_BKDONE_INT_EN_8812F BIT(27) 5420 #define BIT_FS_TXSC_BEDONE_INT_EN_8812F BIT(26) 5421 #define BIT_FS_TXSC_VIDONE_INT_EN_8812F BIT(25) 5422 #define BIT_FS_TXSC_VODONE_INT_EN_8812F BIT(24) 5423 #define BIT_FS_ATIM_MB7_INT_EN_8812F BIT(23) 5424 #define BIT_FS_ATIM_MB6_INT_EN_8812F BIT(22) 5425 #define BIT_FS_ATIM_MB5_INT_EN_8812F BIT(21) 5426 #define BIT_FS_ATIM_MB4_INT_EN_8812F BIT(20) 5427 #define BIT_FS_ATIM_MB3_INT_EN_8812F BIT(19) 5428 #define BIT_FS_ATIM_MB2_INT_EN_8812F BIT(18) 5429 #define BIT_FS_ATIM_MB1_INT_EN_8812F BIT(17) 5430 #define BIT_FS_ATIM_MB0_INT_EN_8812F BIT(16) 5431 #define BIT_FS_TBTT4INT_EN_8812F BIT(11) 5432 #define BIT_FS_TBTT3INT_EN_8812F BIT(10) 5433 #define BIT_FS_TBTT2INT_EN_8812F BIT(9) 5434 #define BIT_FS_TBTT1INT_EN_8812F BIT(8) 5435 #define BIT_FS_TBTT0_MB7INT_EN_8812F BIT(7) 5436 #define BIT_FS_TBTT0_MB6INT_EN_8812F BIT(6) 5437 #define BIT_FS_TBTT0_MB5INT_EN_8812F BIT(5) 5438 #define BIT_FS_TBTT0_MB4INT_EN_8812F BIT(4) 5439 #define BIT_FS_TBTT0_MB3INT_EN_8812F BIT(3) 5440 #define BIT_FS_TBTT0_MB2INT_EN_8812F BIT(2) 5441 #define BIT_FS_TBTT0_MB1INT_EN_8812F BIT(1) 5442 #define BIT_FS_TBTT0_INT_EN_8812F BIT(0) 5443 5444 /* 2 REG_FE2ISR_8812F */ 5445 #define BIT__FE4ISR__IND_INT_8812F BIT(29) 5446 #define BIT_FS_TXSC_DESC_DONE_INT_8812F BIT(28) 5447 #define BIT_FS_TXSC_BKDONE_INT_8812F BIT(27) 5448 #define BIT_FS_TXSC_BEDONE_INT_8812F BIT(26) 5449 #define BIT_FS_TXSC_VIDONE_INT_8812F BIT(25) 5450 #define BIT_FS_TXSC_VODONE_INT_8812F BIT(24) 5451 #define BIT_FS_ATIM_MB7_INT_8812F BIT(23) 5452 #define BIT_FS_ATIM_MB6_INT_8812F BIT(22) 5453 #define BIT_FS_ATIM_MB5_INT_8812F BIT(21) 5454 #define BIT_FS_ATIM_MB4_INT_8812F BIT(20) 5455 #define BIT_FS_ATIM_MB3_INT_8812F BIT(19) 5456 #define BIT_FS_ATIM_MB2_INT_8812F BIT(18) 5457 #define BIT_FS_ATIM_MB1_INT_8812F BIT(17) 5458 #define BIT_FS_ATIM_MB0_INT_8812F BIT(16) 5459 #define BIT_FS_TBTT4INT_8812F BIT(11) 5460 #define BIT_FS_TBTT3INT_8812F BIT(10) 5461 #define BIT_FS_TBTT2INT_8812F BIT(9) 5462 #define BIT_FS_TBTT1INT_8812F BIT(8) 5463 #define BIT_FS_TBTT0_MB7INT_8812F BIT(7) 5464 #define BIT_FS_TBTT0_MB6INT_8812F BIT(6) 5465 #define BIT_FS_TBTT0_MB5INT_8812F BIT(5) 5466 #define BIT_FS_TBTT0_MB4INT_8812F BIT(4) 5467 #define BIT_FS_TBTT0_MB3INT_8812F BIT(3) 5468 #define BIT_FS_TBTT0_MB2INT_8812F BIT(2) 5469 #define BIT_FS_TBTT0_MB1INT_8812F BIT(1) 5470 #define BIT_FS_TBTT0_INT_8812F BIT(0) 5471 5472 /* 2 REG_FE3IMR_8812F */ 5473 #define BIT_FS_CLI3_MTI_BCNIVLEAR_INT__EN_8812F BIT(31) 5474 #define BIT_FS_CLI2_MTI_BCNIVLEAR_INT__EN_8812F BIT(30) 5475 #define BIT_FS_CLI1_MTI_BCNIVLEAR_INT__EN_8812F BIT(29) 5476 #define BIT_FS_CLI0_MTI_BCNIVLEAR_INT__EN_8812F BIT(28) 5477 #define BIT_FS_BCNDMA4_INT_EN_8812F BIT(27) 5478 #define BIT_FS_BCNDMA3_INT_EN_8812F BIT(26) 5479 #define BIT_FS_BCNDMA2_INT_EN_8812F BIT(25) 5480 #define BIT_FS_BCNDMA1_INT_EN_8812F BIT(24) 5481 #define BIT_FS_BCNDMA0_MB7_INT_EN_8812F BIT(23) 5482 #define BIT_FS_BCNDMA0_MB6_INT_EN_8812F BIT(22) 5483 #define BIT_FS_BCNDMA0_MB5_INT_EN_8812F BIT(21) 5484 #define BIT_FS_BCNDMA0_MB4_INT_EN_8812F BIT(20) 5485 #define BIT_FS_BCNDMA0_MB3_INT_EN_8812F BIT(19) 5486 #define BIT_FS_BCNDMA0_MB2_INT_EN_8812F BIT(18) 5487 #define BIT_FS_BCNDMA0_MB1_INT_EN_8812F BIT(17) 5488 #define BIT_FS_BCNDMA0_INT_EN_8812F BIT(16) 5489 #define BIT_FS_MTI_BCNIVLEAR_INT__EN_8812F BIT(15) 5490 #define BIT_FS_BCNERLY4_INT_EN_8812F BIT(11) 5491 #define BIT_FS_BCNERLY3_INT_EN_8812F BIT(10) 5492 #define BIT_FS_BCNERLY2_INT_EN_8812F BIT(9) 5493 #define BIT_FS_BCNERLY1_INT_EN_8812F BIT(8) 5494 #define BIT_FS_BCNERLY0_MB7INT_EN_8812F BIT(7) 5495 #define BIT_FS_BCNERLY0_MB6INT_EN_8812F BIT(6) 5496 #define BIT_FS_BCNERLY0_MB5INT_EN_8812F BIT(5) 5497 #define BIT_FS_BCNERLY0_MB4INT_EN_8812F BIT(4) 5498 #define BIT_FS_BCNERLY0_MB3INT_EN_8812F BIT(3) 5499 #define BIT_FS_BCNERLY0_MB2INT_EN_8812F BIT(2) 5500 #define BIT_FS_BCNERLY0_MB1INT_EN_8812F BIT(1) 5501 #define BIT_FS_BCNERLY0_INT_EN_8812F BIT(0) 5502 5503 /* 2 REG_FE3ISR_8812F */ 5504 #define BIT_FS_CLI3_MTI_BCNIVLEAR_INT_8812F BIT(31) 5505 #define BIT_FS_CLI2_MTI_BCNIVLEAR_INT_8812F BIT(30) 5506 #define BIT_FS_CLI1_MTI_BCNIVLEAR_INT_8812F BIT(29) 5507 #define BIT_FS_CLI0_MTI_BCNIVLEAR_INT_8812F BIT(28) 5508 #define BIT_FS_BCNDMA4_INT_8812F BIT(27) 5509 #define BIT_FS_BCNDMA3_INT_8812F BIT(26) 5510 #define BIT_FS_BCNDMA2_INT_8812F BIT(25) 5511 #define BIT_FS_BCNDMA1_INT_8812F BIT(24) 5512 #define BIT_FS_BCNDMA0_MB7_INT_8812F BIT(23) 5513 #define BIT_FS_BCNDMA0_MB6_INT_8812F BIT(22) 5514 #define BIT_FS_BCNDMA0_MB5_INT_8812F BIT(21) 5515 #define BIT_FS_BCNDMA0_MB4_INT_8812F BIT(20) 5516 #define BIT_FS_BCNDMA0_MB3_INT_8812F BIT(19) 5517 #define BIT_FS_BCNDMA0_MB2_INT_8812F BIT(18) 5518 #define BIT_FS_BCNDMA0_MB1_INT_8812F BIT(17) 5519 #define BIT_FS_BCNDMA0_INT_8812F BIT(16) 5520 #define BIT_FS_MTI_BCNIVLEAR_INT_8812F BIT(15) 5521 #define BIT_FS_BCNERLY4_INT_8812F BIT(11) 5522 #define BIT_FS_BCNERLY3_INT_8812F BIT(10) 5523 #define BIT_FS_BCNERLY2_INT_8812F BIT(9) 5524 #define BIT_FS_BCNERLY1_INT_8812F BIT(8) 5525 #define BIT_FS_BCNERLY0_MB7INT_8812F BIT(7) 5526 #define BIT_FS_BCNERLY0_MB6INT_8812F BIT(6) 5527 #define BIT_FS_BCNERLY0_MB5INT_8812F BIT(5) 5528 #define BIT_FS_BCNERLY0_MB4INT_8812F BIT(4) 5529 #define BIT_FS_BCNERLY0_MB3INT_8812F BIT(3) 5530 #define BIT_FS_BCNERLY0_MB2INT_8812F BIT(2) 5531 #define BIT_FS_BCNERLY0_MB1INT_8812F BIT(1) 5532 #define BIT_FS_BCNERLY0_INT_8812F BIT(0) 5533 5534 /* 2 REG_FE4IMR_8812F */ 5535 #define BIT_FS_CLI3_TXPKTIN_INT_EN_8812F BIT(19) 5536 #define BIT_FS_CLI2_TXPKTIN_INT_EN_8812F BIT(18) 5537 #define BIT_FS_CLI1_TXPKTIN_INT_EN_8812F BIT(17) 5538 #define BIT_FS_CLI0_TXPKTIN_INT_EN_8812F BIT(16) 5539 #define BIT_FS_CLI3_RX_UMD0_INT_EN_8812F BIT(15) 5540 #define BIT_FS_CLI3_RX_UMD1_INT_EN_8812F BIT(14) 5541 #define BIT_FS_CLI3_RX_BMD0_INT_EN_8812F BIT(13) 5542 #define BIT_FS_CLI3_RX_BMD1_INT_EN_8812F BIT(12) 5543 #define BIT_FS_CLI2_RX_UMD0_INT_EN_8812F BIT(11) 5544 #define BIT_FS_CLI2_RX_UMD1_INT_EN_8812F BIT(10) 5545 #define BIT_FS_CLI2_RX_BMD0_INT_EN_8812F BIT(9) 5546 #define BIT_FS_CLI2_RX_BMD1_INT_EN_8812F BIT(8) 5547 #define BIT_FS_CLI1_RX_UMD0_INT_EN_8812F BIT(7) 5548 #define BIT_FS_CLI1_RX_UMD1_INT_EN_8812F BIT(6) 5549 #define BIT_FS_CLI1_RX_BMD0_INT_EN_8812F BIT(5) 5550 #define BIT_FS_CLI1_RX_BMD1_INT_EN_8812F BIT(4) 5551 #define BIT_FS_CLI0_RX_UMD0_INT_EN_8812F BIT(3) 5552 #define BIT_FS_CLI0_RX_UMD1_INT_EN_8812F BIT(2) 5553 #define BIT_FS_CLI0_RX_BMD0_INT_EN_8812F BIT(1) 5554 #define BIT_FS_CLI0_RX_BMD1_INT_EN_8812F BIT(0) 5555 5556 /* 2 REG_FE4ISR_8812F */ 5557 #define BIT_FS_CLI3_TXPKTIN_INT_8812F BIT(19) 5558 #define BIT_FS_CLI2_TXPKTIN_INT_8812F BIT(18) 5559 #define BIT_FS_CLI1_TXPKTIN_INT_8812F BIT(17) 5560 #define BIT_FS_CLI0_TXPKTIN_INT_8812F BIT(16) 5561 #define BIT_FS_CLI3_RX_UMD0_INT_8812F BIT(15) 5562 #define BIT_FS_CLI3_RX_UMD1_INT_8812F BIT(14) 5563 #define BIT_FS_CLI3_RX_BMD0_INT_8812F BIT(13) 5564 #define BIT_FS_CLI3_RX_BMD1_INT_8812F BIT(12) 5565 #define BIT_FS_CLI2_RX_UMD0_INT_8812F BIT(11) 5566 #define BIT_FS_CLI2_RX_UMD1_INT_8812F BIT(10) 5567 #define BIT_FS_CLI2_RX_BMD0_INT_8812F BIT(9) 5568 #define BIT_FS_CLI2_RX_BMD1_INT_8812F BIT(8) 5569 #define BIT_FS_CLI1_RX_UMD0_INT_8812F BIT(7) 5570 #define BIT_FS_CLI1_RX_UMD1_INT_8812F BIT(6) 5571 #define BIT_FS_CLI1_RX_BMD0_INT_8812F BIT(5) 5572 #define BIT_FS_CLI1_RX_BMD1_INT_8812F BIT(4) 5573 #define BIT_FS_CLI0_RX_UMD0_INT_8812F BIT(3) 5574 #define BIT_FS_CLI0_RX_UMD1_INT_8812F BIT(2) 5575 #define BIT_FS_CLI0_RX_BMD0_INT_8812F BIT(1) 5576 #define BIT_FS_CLI0_RX_BMD1_INT_8812F BIT(0) 5577 5578 /* 2 REG_FT1IMR_8812F */ 5579 #define BIT__FT2ISR__IND_MSK_8812F BIT(30) 5580 #define BIT_FTM_PTT_INT_EN_8812F BIT(29) 5581 #define BIT_RXFTMREQ_INT_EN_8812F BIT(28) 5582 #define BIT_RXFTM_INT_EN_8812F BIT(27) 5583 #define BIT_TXFTM_INT_EN_8812F BIT(26) 5584 #define BIT_FS_H2C_CMD_OK_INT_EN_8812F BIT(25) 5585 #define BIT_FS_H2C_CMD_FULL_INT_EN_8812F BIT(24) 5586 #define BIT_FS_MACID_PWRCHANGE5_INT_EN_8812F BIT(23) 5587 #define BIT_FS_MACID_PWRCHANGE4_INT_EN_8812F BIT(22) 5588 #define BIT_FS_MACID_PWRCHANGE3_INT_EN_8812F BIT(21) 5589 #define BIT_FS_MACID_PWRCHANGE2_INT_EN_8812F BIT(20) 5590 #define BIT_FS_MACID_PWRCHANGE1_INT_EN_8812F BIT(19) 5591 #define BIT_FS_MACID_PWRCHANGE0_INT_EN_8812F BIT(18) 5592 #define BIT_FS_CTWEND2_INT_EN_8812F BIT(17) 5593 #define BIT_FS_CTWEND1_INT_EN_8812F BIT(16) 5594 #define BIT_FS_CTWEND0_INT_EN_8812F BIT(15) 5595 #define BIT_FS_TX_NULL1_INT_EN_8812F BIT(14) 5596 #define BIT_FS_TX_NULL0_INT_EN_8812F BIT(13) 5597 #define BIT_FS_TSF_BIT32_TOGGLE_EN_8812F BIT(12) 5598 #define BIT_FS_P2P_RFON2_INT_EN_8812F BIT(11) 5599 #define BIT_FS_P2P_RFOFF2_INT_EN_8812F BIT(10) 5600 #define BIT_FS_P2P_RFON1_INT_EN_8812F BIT(9) 5601 #define BIT_FS_P2P_RFOFF1_INT_EN_8812F BIT(8) 5602 #define BIT_FS_P2P_RFON0_INT_EN_8812F BIT(7) 5603 #define BIT_FS_P2P_RFOFF0_INT_EN_8812F BIT(6) 5604 #define BIT_FS_RX_UAPSDMD1_EN_8812F BIT(5) 5605 #define BIT_FS_RX_UAPSDMD0_EN_8812F BIT(4) 5606 #define BIT_FS_TRIGGER_PKT_EN_8812F BIT(3) 5607 #define BIT_FS_EOSP_INT_EN_8812F BIT(2) 5608 #define BIT_FS_RPWM2_INT_EN_8812F BIT(1) 5609 #define BIT_FS_RPWM_INT_EN_8812F BIT(0) 5610 5611 /* 2 REG_FT1ISR_8812F */ 5612 #define BIT__FT2ISR__IND_INT_8812F BIT(30) 5613 #define BIT_FTM_PTT_INT_8812F BIT(29) 5614 #define BIT_RXFTMREQ_INT_8812F BIT(28) 5615 #define BIT_RXFTM_INT_8812F BIT(27) 5616 #define BIT_TXFTM_INT_8812F BIT(26) 5617 #define BIT_FS_H2C_CMD_OK_INT_8812F BIT(25) 5618 #define BIT_FS_H2C_CMD_FULL_INT_8812F BIT(24) 5619 #define BIT_FS_MACID_PWRCHANGE5_INT_8812F BIT(23) 5620 #define BIT_FS_MACID_PWRCHANGE4_INT_8812F BIT(22) 5621 #define BIT_FS_MACID_PWRCHANGE3_INT_8812F BIT(21) 5622 #define BIT_FS_MACID_PWRCHANGE2_INT_8812F BIT(20) 5623 #define BIT_FS_MACID_PWRCHANGE1_INT_8812F BIT(19) 5624 #define BIT_FS_MACID_PWRCHANGE0_INT_8812F BIT(18) 5625 #define BIT_FS_CTWEND2_INT_8812F BIT(17) 5626 #define BIT_FS_CTWEND1_INT_8812F BIT(16) 5627 #define BIT_FS_CTWEND0_INT_8812F BIT(15) 5628 #define BIT_FS_TX_NULL1_INT_8812F BIT(14) 5629 #define BIT_FS_TX_NULL0_INT_8812F BIT(13) 5630 #define BIT_FS_TSF_BIT32_TOGGLE_INT_8812F BIT(12) 5631 #define BIT_FS_P2P_RFON2_INT_8812F BIT(11) 5632 #define BIT_FS_P2P_RFOFF2_INT_8812F BIT(10) 5633 #define BIT_FS_P2P_RFON1_INT_8812F BIT(9) 5634 #define BIT_FS_P2P_RFOFF1_INT_8812F BIT(8) 5635 #define BIT_FS_P2P_RFON0_INT_8812F BIT(7) 5636 #define BIT_FS_P2P_RFOFF0_INT_8812F BIT(6) 5637 #define BIT_FS_RX_UAPSDMD1_INT_8812F BIT(5) 5638 #define BIT_FS_RX_UAPSDMD0_INT_8812F BIT(4) 5639 #define BIT_FS_TRIGGER_PKT_INT_8812F BIT(3) 5640 #define BIT_FS_EOSP_INT_8812F BIT(2) 5641 #define BIT_FS_RPWM2_INT_8812F BIT(1) 5642 #define BIT_FS_RPWM_INT_8812F BIT(0) 5643 5644 /* 2 REG_SPWR0_8812F */ 5645 5646 #define BIT_SHIFT_MID_31TO0_8812F 0 5647 #define BIT_MASK_MID_31TO0_8812F 0xffffffffL 5648 #define BIT_MID_31TO0_8812F(x) \ 5649 (((x) & BIT_MASK_MID_31TO0_8812F) << BIT_SHIFT_MID_31TO0_8812F) 5650 #define BITS_MID_31TO0_8812F \ 5651 (BIT_MASK_MID_31TO0_8812F << BIT_SHIFT_MID_31TO0_8812F) 5652 #define BIT_CLEAR_MID_31TO0_8812F(x) ((x) & (~BITS_MID_31TO0_8812F)) 5653 #define BIT_GET_MID_31TO0_8812F(x) \ 5654 (((x) >> BIT_SHIFT_MID_31TO0_8812F) & BIT_MASK_MID_31TO0_8812F) 5655 #define BIT_SET_MID_31TO0_8812F(x, v) \ 5656 (BIT_CLEAR_MID_31TO0_8812F(x) | BIT_MID_31TO0_8812F(v)) 5657 5658 /* 2 REG_SPWR1_8812F */ 5659 5660 #define BIT_SHIFT_MID_63TO32_8812F 0 5661 #define BIT_MASK_MID_63TO32_8812F 0xffffffffL 5662 #define BIT_MID_63TO32_8812F(x) \ 5663 (((x) & BIT_MASK_MID_63TO32_8812F) << BIT_SHIFT_MID_63TO32_8812F) 5664 #define BITS_MID_63TO32_8812F \ 5665 (BIT_MASK_MID_63TO32_8812F << BIT_SHIFT_MID_63TO32_8812F) 5666 #define BIT_CLEAR_MID_63TO32_8812F(x) ((x) & (~BITS_MID_63TO32_8812F)) 5667 #define BIT_GET_MID_63TO32_8812F(x) \ 5668 (((x) >> BIT_SHIFT_MID_63TO32_8812F) & BIT_MASK_MID_63TO32_8812F) 5669 #define BIT_SET_MID_63TO32_8812F(x, v) \ 5670 (BIT_CLEAR_MID_63TO32_8812F(x) | BIT_MID_63TO32_8812F(v)) 5671 5672 /* 2 REG_SPWR2_8812F */ 5673 5674 #define BIT_SHIFT_MID_95O64_8812F 0 5675 #define BIT_MASK_MID_95O64_8812F 0xffffffffL 5676 #define BIT_MID_95O64_8812F(x) \ 5677 (((x) & BIT_MASK_MID_95O64_8812F) << BIT_SHIFT_MID_95O64_8812F) 5678 #define BITS_MID_95O64_8812F \ 5679 (BIT_MASK_MID_95O64_8812F << BIT_SHIFT_MID_95O64_8812F) 5680 #define BIT_CLEAR_MID_95O64_8812F(x) ((x) & (~BITS_MID_95O64_8812F)) 5681 #define BIT_GET_MID_95O64_8812F(x) \ 5682 (((x) >> BIT_SHIFT_MID_95O64_8812F) & BIT_MASK_MID_95O64_8812F) 5683 #define BIT_SET_MID_95O64_8812F(x, v) \ 5684 (BIT_CLEAR_MID_95O64_8812F(x) | BIT_MID_95O64_8812F(v)) 5685 5686 /* 2 REG_SPWR3_8812F */ 5687 5688 #define BIT_SHIFT_MID_127TO96_8812F 0 5689 #define BIT_MASK_MID_127TO96_8812F 0xffffffffL 5690 #define BIT_MID_127TO96_8812F(x) \ 5691 (((x) & BIT_MASK_MID_127TO96_8812F) << BIT_SHIFT_MID_127TO96_8812F) 5692 #define BITS_MID_127TO96_8812F \ 5693 (BIT_MASK_MID_127TO96_8812F << BIT_SHIFT_MID_127TO96_8812F) 5694 #define BIT_CLEAR_MID_127TO96_8812F(x) ((x) & (~BITS_MID_127TO96_8812F)) 5695 #define BIT_GET_MID_127TO96_8812F(x) \ 5696 (((x) >> BIT_SHIFT_MID_127TO96_8812F) & BIT_MASK_MID_127TO96_8812F) 5697 #define BIT_SET_MID_127TO96_8812F(x, v) \ 5698 (BIT_CLEAR_MID_127TO96_8812F(x) | BIT_MID_127TO96_8812F(v)) 5699 5700 /* 2 REG_POWSEQ_8812F */ 5701 5702 #define BIT_SHIFT_SEQNUM_MID_8812F 16 5703 #define BIT_MASK_SEQNUM_MID_8812F 0xffff 5704 #define BIT_SEQNUM_MID_8812F(x) \ 5705 (((x) & BIT_MASK_SEQNUM_MID_8812F) << BIT_SHIFT_SEQNUM_MID_8812F) 5706 #define BITS_SEQNUM_MID_8812F \ 5707 (BIT_MASK_SEQNUM_MID_8812F << BIT_SHIFT_SEQNUM_MID_8812F) 5708 #define BIT_CLEAR_SEQNUM_MID_8812F(x) ((x) & (~BITS_SEQNUM_MID_8812F)) 5709 #define BIT_GET_SEQNUM_MID_8812F(x) \ 5710 (((x) >> BIT_SHIFT_SEQNUM_MID_8812F) & BIT_MASK_SEQNUM_MID_8812F) 5711 #define BIT_SET_SEQNUM_MID_8812F(x, v) \ 5712 (BIT_CLEAR_SEQNUM_MID_8812F(x) | BIT_SEQNUM_MID_8812F(v)) 5713 5714 #define BIT_SHIFT_REF_MID_8812F 0 5715 #define BIT_MASK_REF_MID_8812F 0x7f 5716 #define BIT_REF_MID_8812F(x) \ 5717 (((x) & BIT_MASK_REF_MID_8812F) << BIT_SHIFT_REF_MID_8812F) 5718 #define BITS_REF_MID_8812F (BIT_MASK_REF_MID_8812F << BIT_SHIFT_REF_MID_8812F) 5719 #define BIT_CLEAR_REF_MID_8812F(x) ((x) & (~BITS_REF_MID_8812F)) 5720 #define BIT_GET_REF_MID_8812F(x) \ 5721 (((x) >> BIT_SHIFT_REF_MID_8812F) & BIT_MASK_REF_MID_8812F) 5722 #define BIT_SET_REF_MID_8812F(x, v) \ 5723 (BIT_CLEAR_REF_MID_8812F(x) | BIT_REF_MID_8812F(v)) 5724 5725 /* 2 REG_NOT_VALID_8812F */ 5726 5727 /* 2 REG_TC7_CTRL_V1_8812F */ 5728 #define BIT_TC7INT_EN_8812F BIT(26) 5729 #define BIT_TC7MODE_8812F BIT(25) 5730 #define BIT_TC7EN_8812F BIT(24) 5731 5732 #define BIT_SHIFT_TC7DATA_8812F 0 5733 #define BIT_MASK_TC7DATA_8812F 0xffffff 5734 #define BIT_TC7DATA_8812F(x) \ 5735 (((x) & BIT_MASK_TC7DATA_8812F) << BIT_SHIFT_TC7DATA_8812F) 5736 #define BITS_TC7DATA_8812F (BIT_MASK_TC7DATA_8812F << BIT_SHIFT_TC7DATA_8812F) 5737 #define BIT_CLEAR_TC7DATA_8812F(x) ((x) & (~BITS_TC7DATA_8812F)) 5738 #define BIT_GET_TC7DATA_8812F(x) \ 5739 (((x) >> BIT_SHIFT_TC7DATA_8812F) & BIT_MASK_TC7DATA_8812F) 5740 #define BIT_SET_TC7DATA_8812F(x, v) \ 5741 (BIT_CLEAR_TC7DATA_8812F(x) | BIT_TC7DATA_8812F(v)) 5742 5743 /* 2 REG_TC8_CTRL_V1_8812F */ 5744 #define BIT_TC8INT_EN_8812F BIT(26) 5745 #define BIT_TC8MODE_8812F BIT(25) 5746 #define BIT_TC8EN_8812F BIT(24) 5747 5748 #define BIT_SHIFT_TC8DATA_8812F 0 5749 #define BIT_MASK_TC8DATA_8812F 0xffffff 5750 #define BIT_TC8DATA_8812F(x) \ 5751 (((x) & BIT_MASK_TC8DATA_8812F) << BIT_SHIFT_TC8DATA_8812F) 5752 #define BITS_TC8DATA_8812F (BIT_MASK_TC8DATA_8812F << BIT_SHIFT_TC8DATA_8812F) 5753 #define BIT_CLEAR_TC8DATA_8812F(x) ((x) & (~BITS_TC8DATA_8812F)) 5754 #define BIT_GET_TC8DATA_8812F(x) \ 5755 (((x) >> BIT_SHIFT_TC8DATA_8812F) & BIT_MASK_TC8DATA_8812F) 5756 #define BIT_SET_TC8DATA_8812F(x, v) \ 5757 (BIT_CLEAR_TC8DATA_8812F(x) | BIT_TC8DATA_8812F(v)) 5758 5759 /* 2 REG_RX_BCN_TBTT_ITVL0_8812F */ 5760 5761 #define BIT_SHIFT_RX_BCN_TBTT_ITVL_CLIENT2_8812F 24 5762 #define BIT_MASK_RX_BCN_TBTT_ITVL_CLIENT2_8812F 0xff 5763 #define BIT_RX_BCN_TBTT_ITVL_CLIENT2_8812F(x) \ 5764 (((x) & BIT_MASK_RX_BCN_TBTT_ITVL_CLIENT2_8812F) \ 5765 << BIT_SHIFT_RX_BCN_TBTT_ITVL_CLIENT2_8812F) 5766 #define BITS_RX_BCN_TBTT_ITVL_CLIENT2_8812F \ 5767 (BIT_MASK_RX_BCN_TBTT_ITVL_CLIENT2_8812F \ 5768 << BIT_SHIFT_RX_BCN_TBTT_ITVL_CLIENT2_8812F) 5769 #define BIT_CLEAR_RX_BCN_TBTT_ITVL_CLIENT2_8812F(x) \ 5770 ((x) & (~BITS_RX_BCN_TBTT_ITVL_CLIENT2_8812F)) 5771 #define BIT_GET_RX_BCN_TBTT_ITVL_CLIENT2_8812F(x) \ 5772 (((x) >> BIT_SHIFT_RX_BCN_TBTT_ITVL_CLIENT2_8812F) & \ 5773 BIT_MASK_RX_BCN_TBTT_ITVL_CLIENT2_8812F) 5774 #define BIT_SET_RX_BCN_TBTT_ITVL_CLIENT2_8812F(x, v) \ 5775 (BIT_CLEAR_RX_BCN_TBTT_ITVL_CLIENT2_8812F(x) | \ 5776 BIT_RX_BCN_TBTT_ITVL_CLIENT2_8812F(v)) 5777 5778 #define BIT_SHIFT_RX_BCN_TBTT_ITVL_CLIENT1_8812F 16 5779 #define BIT_MASK_RX_BCN_TBTT_ITVL_CLIENT1_8812F 0xff 5780 #define BIT_RX_BCN_TBTT_ITVL_CLIENT1_8812F(x) \ 5781 (((x) & BIT_MASK_RX_BCN_TBTT_ITVL_CLIENT1_8812F) \ 5782 << BIT_SHIFT_RX_BCN_TBTT_ITVL_CLIENT1_8812F) 5783 #define BITS_RX_BCN_TBTT_ITVL_CLIENT1_8812F \ 5784 (BIT_MASK_RX_BCN_TBTT_ITVL_CLIENT1_8812F \ 5785 << BIT_SHIFT_RX_BCN_TBTT_ITVL_CLIENT1_8812F) 5786 #define BIT_CLEAR_RX_BCN_TBTT_ITVL_CLIENT1_8812F(x) \ 5787 ((x) & (~BITS_RX_BCN_TBTT_ITVL_CLIENT1_8812F)) 5788 #define BIT_GET_RX_BCN_TBTT_ITVL_CLIENT1_8812F(x) \ 5789 (((x) >> BIT_SHIFT_RX_BCN_TBTT_ITVL_CLIENT1_8812F) & \ 5790 BIT_MASK_RX_BCN_TBTT_ITVL_CLIENT1_8812F) 5791 #define BIT_SET_RX_BCN_TBTT_ITVL_CLIENT1_8812F(x, v) \ 5792 (BIT_CLEAR_RX_BCN_TBTT_ITVL_CLIENT1_8812F(x) | \ 5793 BIT_RX_BCN_TBTT_ITVL_CLIENT1_8812F(v)) 5794 5795 #define BIT_SHIFT_RX_BCN_TBTT_ITVL_CLIENT0_8812F 8 5796 #define BIT_MASK_RX_BCN_TBTT_ITVL_CLIENT0_8812F 0xff 5797 #define BIT_RX_BCN_TBTT_ITVL_CLIENT0_8812F(x) \ 5798 (((x) & BIT_MASK_RX_BCN_TBTT_ITVL_CLIENT0_8812F) \ 5799 << BIT_SHIFT_RX_BCN_TBTT_ITVL_CLIENT0_8812F) 5800 #define BITS_RX_BCN_TBTT_ITVL_CLIENT0_8812F \ 5801 (BIT_MASK_RX_BCN_TBTT_ITVL_CLIENT0_8812F \ 5802 << BIT_SHIFT_RX_BCN_TBTT_ITVL_CLIENT0_8812F) 5803 #define BIT_CLEAR_RX_BCN_TBTT_ITVL_CLIENT0_8812F(x) \ 5804 ((x) & (~BITS_RX_BCN_TBTT_ITVL_CLIENT0_8812F)) 5805 #define BIT_GET_RX_BCN_TBTT_ITVL_CLIENT0_8812F(x) \ 5806 (((x) >> BIT_SHIFT_RX_BCN_TBTT_ITVL_CLIENT0_8812F) & \ 5807 BIT_MASK_RX_BCN_TBTT_ITVL_CLIENT0_8812F) 5808 #define BIT_SET_RX_BCN_TBTT_ITVL_CLIENT0_8812F(x, v) \ 5809 (BIT_CLEAR_RX_BCN_TBTT_ITVL_CLIENT0_8812F(x) | \ 5810 BIT_RX_BCN_TBTT_ITVL_CLIENT0_8812F(v)) 5811 5812 #define BIT_SHIFT_RX_BCN_TBTT_ITVL_PORT0_8812F 0 5813 #define BIT_MASK_RX_BCN_TBTT_ITVL_PORT0_8812F 0xff 5814 #define BIT_RX_BCN_TBTT_ITVL_PORT0_8812F(x) \ 5815 (((x) & BIT_MASK_RX_BCN_TBTT_ITVL_PORT0_8812F) \ 5816 << BIT_SHIFT_RX_BCN_TBTT_ITVL_PORT0_8812F) 5817 #define BITS_RX_BCN_TBTT_ITVL_PORT0_8812F \ 5818 (BIT_MASK_RX_BCN_TBTT_ITVL_PORT0_8812F \ 5819 << BIT_SHIFT_RX_BCN_TBTT_ITVL_PORT0_8812F) 5820 #define BIT_CLEAR_RX_BCN_TBTT_ITVL_PORT0_8812F(x) \ 5821 ((x) & (~BITS_RX_BCN_TBTT_ITVL_PORT0_8812F)) 5822 #define BIT_GET_RX_BCN_TBTT_ITVL_PORT0_8812F(x) \ 5823 (((x) >> BIT_SHIFT_RX_BCN_TBTT_ITVL_PORT0_8812F) & \ 5824 BIT_MASK_RX_BCN_TBTT_ITVL_PORT0_8812F) 5825 #define BIT_SET_RX_BCN_TBTT_ITVL_PORT0_8812F(x, v) \ 5826 (BIT_CLEAR_RX_BCN_TBTT_ITVL_PORT0_8812F(x) | \ 5827 BIT_RX_BCN_TBTT_ITVL_PORT0_8812F(v)) 5828 5829 /* 2 REG_RX_BCN_TBTT_ITVL1_8812F */ 5830 5831 #define BIT_SHIFT_RX_BCN_TBTT_ITVL_CLIENT3_8812F 0 5832 #define BIT_MASK_RX_BCN_TBTT_ITVL_CLIENT3_8812F 0xff 5833 #define BIT_RX_BCN_TBTT_ITVL_CLIENT3_8812F(x) \ 5834 (((x) & BIT_MASK_RX_BCN_TBTT_ITVL_CLIENT3_8812F) \ 5835 << BIT_SHIFT_RX_BCN_TBTT_ITVL_CLIENT3_8812F) 5836 #define BITS_RX_BCN_TBTT_ITVL_CLIENT3_8812F \ 5837 (BIT_MASK_RX_BCN_TBTT_ITVL_CLIENT3_8812F \ 5838 << BIT_SHIFT_RX_BCN_TBTT_ITVL_CLIENT3_8812F) 5839 #define BIT_CLEAR_RX_BCN_TBTT_ITVL_CLIENT3_8812F(x) \ 5840 ((x) & (~BITS_RX_BCN_TBTT_ITVL_CLIENT3_8812F)) 5841 #define BIT_GET_RX_BCN_TBTT_ITVL_CLIENT3_8812F(x) \ 5842 (((x) >> BIT_SHIFT_RX_BCN_TBTT_ITVL_CLIENT3_8812F) & \ 5843 BIT_MASK_RX_BCN_TBTT_ITVL_CLIENT3_8812F) 5844 #define BIT_SET_RX_BCN_TBTT_ITVL_CLIENT3_8812F(x, v) \ 5845 (BIT_CLEAR_RX_BCN_TBTT_ITVL_CLIENT3_8812F(x) | \ 5846 BIT_RX_BCN_TBTT_ITVL_CLIENT3_8812F(v)) 5847 5848 /* 2 REG_NOT_VALID_8812F */ 5849 5850 /* 2 REG_NOT_VALID_8812F */ 5851 5852 /* 2 REG_IO_WRAP_ERR_FLAG_8812F */ 5853 #define BIT_IO_WRAP_ERR_8812F BIT(0) 5854 5855 /* 2 REG_NOT_VALID_8812F */ 5856 5857 /* 2 REG_NOT_VALID_8812F */ 5858 5859 /* 2 REG_NOT_VALID_8812F */ 5860 5861 /* 2 REG_SPEED_SENSOR_8812F */ 5862 #define BIT_DSS_1_RST_N_8812F BIT(31) 5863 #define BIT_DSS_1_SPEED_EN_8812F BIT(30) 5864 #define BIT_DSS_1_WIRE_SEL_8812F BIT(29) 5865 #define BIT_DSS_ENCLK_8812F BIT(28) 5866 5867 #define BIT_SHIFT_DSS_1_RO_SEL_8812F 24 5868 #define BIT_MASK_DSS_1_RO_SEL_8812F 0x7 5869 #define BIT_DSS_1_RO_SEL_8812F(x) \ 5870 (((x) & BIT_MASK_DSS_1_RO_SEL_8812F) << BIT_SHIFT_DSS_1_RO_SEL_8812F) 5871 #define BITS_DSS_1_RO_SEL_8812F \ 5872 (BIT_MASK_DSS_1_RO_SEL_8812F << BIT_SHIFT_DSS_1_RO_SEL_8812F) 5873 #define BIT_CLEAR_DSS_1_RO_SEL_8812F(x) ((x) & (~BITS_DSS_1_RO_SEL_8812F)) 5874 #define BIT_GET_DSS_1_RO_SEL_8812F(x) \ 5875 (((x) >> BIT_SHIFT_DSS_1_RO_SEL_8812F) & BIT_MASK_DSS_1_RO_SEL_8812F) 5876 #define BIT_SET_DSS_1_RO_SEL_8812F(x, v) \ 5877 (BIT_CLEAR_DSS_1_RO_SEL_8812F(x) | BIT_DSS_1_RO_SEL_8812F(v)) 5878 5879 #define BIT_SHIFT_DSS_1_DATA_IN_8812F 0 5880 #define BIT_MASK_DSS_1_DATA_IN_8812F 0xfffff 5881 #define BIT_DSS_1_DATA_IN_8812F(x) \ 5882 (((x) & BIT_MASK_DSS_1_DATA_IN_8812F) << BIT_SHIFT_DSS_1_DATA_IN_8812F) 5883 #define BITS_DSS_1_DATA_IN_8812F \ 5884 (BIT_MASK_DSS_1_DATA_IN_8812F << BIT_SHIFT_DSS_1_DATA_IN_8812F) 5885 #define BIT_CLEAR_DSS_1_DATA_IN_8812F(x) ((x) & (~BITS_DSS_1_DATA_IN_8812F)) 5886 #define BIT_GET_DSS_1_DATA_IN_8812F(x) \ 5887 (((x) >> BIT_SHIFT_DSS_1_DATA_IN_8812F) & BIT_MASK_DSS_1_DATA_IN_8812F) 5888 #define BIT_SET_DSS_1_DATA_IN_8812F(x, v) \ 5889 (BIT_CLEAR_DSS_1_DATA_IN_8812F(x) | BIT_DSS_1_DATA_IN_8812F(v)) 5890 5891 /* 2 REG_SPEED_SENSOR1_8812F */ 5892 #define BIT_DSS_1_READY_8812F BIT(31) 5893 #define BIT_DSS_1_WSORT_GO_8812F BIT(30) 5894 5895 #define BIT_SHIFT_DSS_1_COUNT_OUT_8812F 0 5896 #define BIT_MASK_DSS_1_COUNT_OUT_8812F 0xfffff 5897 #define BIT_DSS_1_COUNT_OUT_8812F(x) \ 5898 (((x) & BIT_MASK_DSS_1_COUNT_OUT_8812F) \ 5899 << BIT_SHIFT_DSS_1_COUNT_OUT_8812F) 5900 #define BITS_DSS_1_COUNT_OUT_8812F \ 5901 (BIT_MASK_DSS_1_COUNT_OUT_8812F << BIT_SHIFT_DSS_1_COUNT_OUT_8812F) 5902 #define BIT_CLEAR_DSS_1_COUNT_OUT_8812F(x) ((x) & (~BITS_DSS_1_COUNT_OUT_8812F)) 5903 #define BIT_GET_DSS_1_COUNT_OUT_8812F(x) \ 5904 (((x) >> BIT_SHIFT_DSS_1_COUNT_OUT_8812F) & \ 5905 BIT_MASK_DSS_1_COUNT_OUT_8812F) 5906 #define BIT_SET_DSS_1_COUNT_OUT_8812F(x, v) \ 5907 (BIT_CLEAR_DSS_1_COUNT_OUT_8812F(x) | BIT_DSS_1_COUNT_OUT_8812F(v)) 5908 5909 /* 2 REG_SPEED_SENSOR2_8812F */ 5910 #define BIT_DSS_2_RST_N_8812F BIT(31) 5911 #define BIT_DSS_2_SPEED_EN_8812F BIT(30) 5912 #define BIT_DSS_2_WIRE_SEL_8812F BIT(29) 5913 #define BIT_DSS_ENCLK_8812F BIT(28) 5914 5915 #define BIT_SHIFT_DSS_2_RO_SEL_8812F 24 5916 #define BIT_MASK_DSS_2_RO_SEL_8812F 0x7 5917 #define BIT_DSS_2_RO_SEL_8812F(x) \ 5918 (((x) & BIT_MASK_DSS_2_RO_SEL_8812F) << BIT_SHIFT_DSS_2_RO_SEL_8812F) 5919 #define BITS_DSS_2_RO_SEL_8812F \ 5920 (BIT_MASK_DSS_2_RO_SEL_8812F << BIT_SHIFT_DSS_2_RO_SEL_8812F) 5921 #define BIT_CLEAR_DSS_2_RO_SEL_8812F(x) ((x) & (~BITS_DSS_2_RO_SEL_8812F)) 5922 #define BIT_GET_DSS_2_RO_SEL_8812F(x) \ 5923 (((x) >> BIT_SHIFT_DSS_2_RO_SEL_8812F) & BIT_MASK_DSS_2_RO_SEL_8812F) 5924 #define BIT_SET_DSS_2_RO_SEL_8812F(x, v) \ 5925 (BIT_CLEAR_DSS_2_RO_SEL_8812F(x) | BIT_DSS_2_RO_SEL_8812F(v)) 5926 5927 #define BIT_SHIFT_DSS_2_DATA_IN_8812F 0 5928 #define BIT_MASK_DSS_2_DATA_IN_8812F 0xfffff 5929 #define BIT_DSS_2_DATA_IN_8812F(x) \ 5930 (((x) & BIT_MASK_DSS_2_DATA_IN_8812F) << BIT_SHIFT_DSS_2_DATA_IN_8812F) 5931 #define BITS_DSS_2_DATA_IN_8812F \ 5932 (BIT_MASK_DSS_2_DATA_IN_8812F << BIT_SHIFT_DSS_2_DATA_IN_8812F) 5933 #define BIT_CLEAR_DSS_2_DATA_IN_8812F(x) ((x) & (~BITS_DSS_2_DATA_IN_8812F)) 5934 #define BIT_GET_DSS_2_DATA_IN_8812F(x) \ 5935 (((x) >> BIT_SHIFT_DSS_2_DATA_IN_8812F) & BIT_MASK_DSS_2_DATA_IN_8812F) 5936 #define BIT_SET_DSS_2_DATA_IN_8812F(x, v) \ 5937 (BIT_CLEAR_DSS_2_DATA_IN_8812F(x) | BIT_DSS_2_DATA_IN_8812F(v)) 5938 5939 /* 2 REG_SPEED_SENSOR3_8812F */ 5940 #define BIT_DSS_2_READY_8812F BIT(31) 5941 #define BIT_DSS_2_WSORT_GO_8812F BIT(30) 5942 5943 #define BIT_SHIFT_DSS_2_COUNT_OUT_8812F 0 5944 #define BIT_MASK_DSS_2_COUNT_OUT_8812F 0xfffff 5945 #define BIT_DSS_2_COUNT_OUT_8812F(x) \ 5946 (((x) & BIT_MASK_DSS_2_COUNT_OUT_8812F) \ 5947 << BIT_SHIFT_DSS_2_COUNT_OUT_8812F) 5948 #define BITS_DSS_2_COUNT_OUT_8812F \ 5949 (BIT_MASK_DSS_2_COUNT_OUT_8812F << BIT_SHIFT_DSS_2_COUNT_OUT_8812F) 5950 #define BIT_CLEAR_DSS_2_COUNT_OUT_8812F(x) ((x) & (~BITS_DSS_2_COUNT_OUT_8812F)) 5951 #define BIT_GET_DSS_2_COUNT_OUT_8812F(x) \ 5952 (((x) >> BIT_SHIFT_DSS_2_COUNT_OUT_8812F) & \ 5953 BIT_MASK_DSS_2_COUNT_OUT_8812F) 5954 #define BIT_SET_DSS_2_COUNT_OUT_8812F(x, v) \ 5955 (BIT_CLEAR_DSS_2_COUNT_OUT_8812F(x) | BIT_DSS_2_COUNT_OUT_8812F(v)) 5956 5957 /* 2 REG_SPEED_SENSOR4_8812F */ 5958 #define BIT_DSS_3_RST_N_8812F BIT(31) 5959 #define BIT_DSS_3_SPEED_EN_8812F BIT(30) 5960 #define BIT_DSS_3_WIRE_SEL_8812F BIT(29) 5961 #define BIT_DSS_ENCLK_8812F BIT(28) 5962 5963 #define BIT_SHIFT_DSS_3_RO_SEL_8812F 24 5964 #define BIT_MASK_DSS_3_RO_SEL_8812F 0x7 5965 #define BIT_DSS_3_RO_SEL_8812F(x) \ 5966 (((x) & BIT_MASK_DSS_3_RO_SEL_8812F) << BIT_SHIFT_DSS_3_RO_SEL_8812F) 5967 #define BITS_DSS_3_RO_SEL_8812F \ 5968 (BIT_MASK_DSS_3_RO_SEL_8812F << BIT_SHIFT_DSS_3_RO_SEL_8812F) 5969 #define BIT_CLEAR_DSS_3_RO_SEL_8812F(x) ((x) & (~BITS_DSS_3_RO_SEL_8812F)) 5970 #define BIT_GET_DSS_3_RO_SEL_8812F(x) \ 5971 (((x) >> BIT_SHIFT_DSS_3_RO_SEL_8812F) & BIT_MASK_DSS_3_RO_SEL_8812F) 5972 #define BIT_SET_DSS_3_RO_SEL_8812F(x, v) \ 5973 (BIT_CLEAR_DSS_3_RO_SEL_8812F(x) | BIT_DSS_3_RO_SEL_8812F(v)) 5974 5975 #define BIT_SHIFT_DSS_3_DATA_IN_8812F 0 5976 #define BIT_MASK_DSS_3_DATA_IN_8812F 0xfffff 5977 #define BIT_DSS_3_DATA_IN_8812F(x) \ 5978 (((x) & BIT_MASK_DSS_3_DATA_IN_8812F) << BIT_SHIFT_DSS_3_DATA_IN_8812F) 5979 #define BITS_DSS_3_DATA_IN_8812F \ 5980 (BIT_MASK_DSS_3_DATA_IN_8812F << BIT_SHIFT_DSS_3_DATA_IN_8812F) 5981 #define BIT_CLEAR_DSS_3_DATA_IN_8812F(x) ((x) & (~BITS_DSS_3_DATA_IN_8812F)) 5982 #define BIT_GET_DSS_3_DATA_IN_8812F(x) \ 5983 (((x) >> BIT_SHIFT_DSS_3_DATA_IN_8812F) & BIT_MASK_DSS_3_DATA_IN_8812F) 5984 #define BIT_SET_DSS_3_DATA_IN_8812F(x, v) \ 5985 (BIT_CLEAR_DSS_3_DATA_IN_8812F(x) | BIT_DSS_3_DATA_IN_8812F(v)) 5986 5987 /* 2 REG_SPEED_SENSOR5_8812F */ 5988 #define BIT_DSS_3_READY_8812F BIT(31) 5989 #define BIT_DSS_3_WSORT_GO_8812F BIT(30) 5990 5991 #define BIT_SHIFT_DSS_3_COUNT_OUT_8812F 0 5992 #define BIT_MASK_DSS_3_COUNT_OUT_8812F 0xfffff 5993 #define BIT_DSS_3_COUNT_OUT_8812F(x) \ 5994 (((x) & BIT_MASK_DSS_3_COUNT_OUT_8812F) \ 5995 << BIT_SHIFT_DSS_3_COUNT_OUT_8812F) 5996 #define BITS_DSS_3_COUNT_OUT_8812F \ 5997 (BIT_MASK_DSS_3_COUNT_OUT_8812F << BIT_SHIFT_DSS_3_COUNT_OUT_8812F) 5998 #define BIT_CLEAR_DSS_3_COUNT_OUT_8812F(x) ((x) & (~BITS_DSS_3_COUNT_OUT_8812F)) 5999 #define BIT_GET_DSS_3_COUNT_OUT_8812F(x) \ 6000 (((x) >> BIT_SHIFT_DSS_3_COUNT_OUT_8812F) & \ 6001 BIT_MASK_DSS_3_COUNT_OUT_8812F) 6002 #define BIT_SET_DSS_3_COUNT_OUT_8812F(x, v) \ 6003 (BIT_CLEAR_DSS_3_COUNT_OUT_8812F(x) | BIT_DSS_3_COUNT_OUT_8812F(v)) 6004 6005 /* 2 REG_NOT_VALID_8812F */ 6006 6007 /* 2 REG_NOT_VALID_8812F */ 6008 6009 /* 2 REG_NOT_VALID_8812F */ 6010 6011 /* 2 REG_NOT_VALID_8812F */ 6012 6013 /* 2 REG_NOT_VALID_8812F */ 6014 6015 /* 2 REG_NOT_VALID_8812F */ 6016 6017 /* 2 REG_NOT_VALID_8812F */ 6018 6019 /* 2 REG_NOT_VALID_8812F */ 6020 6021 /* 2 REG_NOT_VALID_8812F */ 6022 6023 /* 2 REG_NOT_VALID_8812F */ 6024 6025 /* 2 REG_NOT_VALID_8812F */ 6026 6027 /* 2 REG_COUNTER_CTRL_8812F */ 6028 6029 #define BIT_SHIFT_COUNTER_BASE_8812F 16 6030 #define BIT_MASK_COUNTER_BASE_8812F 0x1fff 6031 #define BIT_COUNTER_BASE_8812F(x) \ 6032 (((x) & BIT_MASK_COUNTER_BASE_8812F) << BIT_SHIFT_COUNTER_BASE_8812F) 6033 #define BITS_COUNTER_BASE_8812F \ 6034 (BIT_MASK_COUNTER_BASE_8812F << BIT_SHIFT_COUNTER_BASE_8812F) 6035 #define BIT_CLEAR_COUNTER_BASE_8812F(x) ((x) & (~BITS_COUNTER_BASE_8812F)) 6036 #define BIT_GET_COUNTER_BASE_8812F(x) \ 6037 (((x) >> BIT_SHIFT_COUNTER_BASE_8812F) & BIT_MASK_COUNTER_BASE_8812F) 6038 #define BIT_SET_COUNTER_BASE_8812F(x, v) \ 6039 (BIT_CLEAR_COUNTER_BASE_8812F(x) | BIT_COUNTER_BASE_8812F(v)) 6040 6041 #define BIT_EN_RTS_REQ_8812F BIT(9) 6042 #define BIT_EN_EDCA_REQ_8812F BIT(8) 6043 #define BIT_EN_PTCL_REQ_8812F BIT(7) 6044 #define BIT_EN_SCH_REQ_8812F BIT(6) 6045 #define BIT_USB_COUNT_EN_8812F BIT(5) 6046 #define BIT_PCIE_COUNT_EN_8812F BIT(4) 6047 #define BIT_RQPN_COUNT_EN_8812F BIT(3) 6048 #define BIT_RDE_COUNT_EN_8812F BIT(2) 6049 #define BIT_TDE_COUNT_EN_8812F BIT(1) 6050 #define BIT_DISABLE_COUNTER_8812F BIT(0) 6051 6052 /* 2 REG_COUNTER_THRESHOLD_8812F */ 6053 #define BIT_SEL_ALL_MACID_8812F BIT(31) 6054 6055 #define BIT_SHIFT_COUNTER_MACID_8812F 24 6056 #define BIT_MASK_COUNTER_MACID_8812F 0x7f 6057 #define BIT_COUNTER_MACID_8812F(x) \ 6058 (((x) & BIT_MASK_COUNTER_MACID_8812F) << BIT_SHIFT_COUNTER_MACID_8812F) 6059 #define BITS_COUNTER_MACID_8812F \ 6060 (BIT_MASK_COUNTER_MACID_8812F << BIT_SHIFT_COUNTER_MACID_8812F) 6061 #define BIT_CLEAR_COUNTER_MACID_8812F(x) ((x) & (~BITS_COUNTER_MACID_8812F)) 6062 #define BIT_GET_COUNTER_MACID_8812F(x) \ 6063 (((x) >> BIT_SHIFT_COUNTER_MACID_8812F) & BIT_MASK_COUNTER_MACID_8812F) 6064 #define BIT_SET_COUNTER_MACID_8812F(x, v) \ 6065 (BIT_CLEAR_COUNTER_MACID_8812F(x) | BIT_COUNTER_MACID_8812F(v)) 6066 6067 #define BIT_SHIFT_AGG_VALUE2_8812F 16 6068 #define BIT_MASK_AGG_VALUE2_8812F 0x7f 6069 #define BIT_AGG_VALUE2_8812F(x) \ 6070 (((x) & BIT_MASK_AGG_VALUE2_8812F) << BIT_SHIFT_AGG_VALUE2_8812F) 6071 #define BITS_AGG_VALUE2_8812F \ 6072 (BIT_MASK_AGG_VALUE2_8812F << BIT_SHIFT_AGG_VALUE2_8812F) 6073 #define BIT_CLEAR_AGG_VALUE2_8812F(x) ((x) & (~BITS_AGG_VALUE2_8812F)) 6074 #define BIT_GET_AGG_VALUE2_8812F(x) \ 6075 (((x) >> BIT_SHIFT_AGG_VALUE2_8812F) & BIT_MASK_AGG_VALUE2_8812F) 6076 #define BIT_SET_AGG_VALUE2_8812F(x, v) \ 6077 (BIT_CLEAR_AGG_VALUE2_8812F(x) | BIT_AGG_VALUE2_8812F(v)) 6078 6079 #define BIT_SHIFT_AGG_VALUE1_8812F 8 6080 #define BIT_MASK_AGG_VALUE1_8812F 0x7f 6081 #define BIT_AGG_VALUE1_8812F(x) \ 6082 (((x) & BIT_MASK_AGG_VALUE1_8812F) << BIT_SHIFT_AGG_VALUE1_8812F) 6083 #define BITS_AGG_VALUE1_8812F \ 6084 (BIT_MASK_AGG_VALUE1_8812F << BIT_SHIFT_AGG_VALUE1_8812F) 6085 #define BIT_CLEAR_AGG_VALUE1_8812F(x) ((x) & (~BITS_AGG_VALUE1_8812F)) 6086 #define BIT_GET_AGG_VALUE1_8812F(x) \ 6087 (((x) >> BIT_SHIFT_AGG_VALUE1_8812F) & BIT_MASK_AGG_VALUE1_8812F) 6088 #define BIT_SET_AGG_VALUE1_8812F(x, v) \ 6089 (BIT_CLEAR_AGG_VALUE1_8812F(x) | BIT_AGG_VALUE1_8812F(v)) 6090 6091 #define BIT_SHIFT_AGG_VALUE0_8812F 0 6092 #define BIT_MASK_AGG_VALUE0_8812F 0x7f 6093 #define BIT_AGG_VALUE0_8812F(x) \ 6094 (((x) & BIT_MASK_AGG_VALUE0_8812F) << BIT_SHIFT_AGG_VALUE0_8812F) 6095 #define BITS_AGG_VALUE0_8812F \ 6096 (BIT_MASK_AGG_VALUE0_8812F << BIT_SHIFT_AGG_VALUE0_8812F) 6097 #define BIT_CLEAR_AGG_VALUE0_8812F(x) ((x) & (~BITS_AGG_VALUE0_8812F)) 6098 #define BIT_GET_AGG_VALUE0_8812F(x) \ 6099 (((x) >> BIT_SHIFT_AGG_VALUE0_8812F) & BIT_MASK_AGG_VALUE0_8812F) 6100 #define BIT_SET_AGG_VALUE0_8812F(x, v) \ 6101 (BIT_CLEAR_AGG_VALUE0_8812F(x) | BIT_AGG_VALUE0_8812F(v)) 6102 6103 /* 2 REG_COUNTER_SET_8812F */ 6104 6105 #define BIT_SHIFT_REQUEST_RESET_8812F 16 6106 #define BIT_MASK_REQUEST_RESET_8812F 0xffff 6107 #define BIT_REQUEST_RESET_8812F(x) \ 6108 (((x) & BIT_MASK_REQUEST_RESET_8812F) << BIT_SHIFT_REQUEST_RESET_8812F) 6109 #define BITS_REQUEST_RESET_8812F \ 6110 (BIT_MASK_REQUEST_RESET_8812F << BIT_SHIFT_REQUEST_RESET_8812F) 6111 #define BIT_CLEAR_REQUEST_RESET_8812F(x) ((x) & (~BITS_REQUEST_RESET_8812F)) 6112 #define BIT_GET_REQUEST_RESET_8812F(x) \ 6113 (((x) >> BIT_SHIFT_REQUEST_RESET_8812F) & BIT_MASK_REQUEST_RESET_8812F) 6114 #define BIT_SET_REQUEST_RESET_8812F(x, v) \ 6115 (BIT_CLEAR_REQUEST_RESET_8812F(x) | BIT_REQUEST_RESET_8812F(v)) 6116 6117 #define BIT_SHIFT_REQUEST_START_8812F 0 6118 #define BIT_MASK_REQUEST_START_8812F 0xffff 6119 #define BIT_REQUEST_START_8812F(x) \ 6120 (((x) & BIT_MASK_REQUEST_START_8812F) << BIT_SHIFT_REQUEST_START_8812F) 6121 #define BITS_REQUEST_START_8812F \ 6122 (BIT_MASK_REQUEST_START_8812F << BIT_SHIFT_REQUEST_START_8812F) 6123 #define BIT_CLEAR_REQUEST_START_8812F(x) ((x) & (~BITS_REQUEST_START_8812F)) 6124 #define BIT_GET_REQUEST_START_8812F(x) \ 6125 (((x) >> BIT_SHIFT_REQUEST_START_8812F) & BIT_MASK_REQUEST_START_8812F) 6126 #define BIT_SET_REQUEST_START_8812F(x, v) \ 6127 (BIT_CLEAR_REQUEST_START_8812F(x) | BIT_REQUEST_START_8812F(v)) 6128 6129 /* 2 REG_COUNTER_OVERFLOW_8812F */ 6130 6131 #define BIT_SHIFT_CNT_OVF_REG_8812F 0 6132 #define BIT_MASK_CNT_OVF_REG_8812F 0xffff 6133 #define BIT_CNT_OVF_REG_8812F(x) \ 6134 (((x) & BIT_MASK_CNT_OVF_REG_8812F) << BIT_SHIFT_CNT_OVF_REG_8812F) 6135 #define BITS_CNT_OVF_REG_8812F \ 6136 (BIT_MASK_CNT_OVF_REG_8812F << BIT_SHIFT_CNT_OVF_REG_8812F) 6137 #define BIT_CLEAR_CNT_OVF_REG_8812F(x) ((x) & (~BITS_CNT_OVF_REG_8812F)) 6138 #define BIT_GET_CNT_OVF_REG_8812F(x) \ 6139 (((x) >> BIT_SHIFT_CNT_OVF_REG_8812F) & BIT_MASK_CNT_OVF_REG_8812F) 6140 #define BIT_SET_CNT_OVF_REG_8812F(x, v) \ 6141 (BIT_CLEAR_CNT_OVF_REG_8812F(x) | BIT_CNT_OVF_REG_8812F(v)) 6142 6143 /* 2 REG_TXDMA_LEN_THRESHOLD_8812F */ 6144 6145 #define BIT_SHIFT_TDE_LEN_TH1_8812F 16 6146 #define BIT_MASK_TDE_LEN_TH1_8812F 0xffff 6147 #define BIT_TDE_LEN_TH1_8812F(x) \ 6148 (((x) & BIT_MASK_TDE_LEN_TH1_8812F) << BIT_SHIFT_TDE_LEN_TH1_8812F) 6149 #define BITS_TDE_LEN_TH1_8812F \ 6150 (BIT_MASK_TDE_LEN_TH1_8812F << BIT_SHIFT_TDE_LEN_TH1_8812F) 6151 #define BIT_CLEAR_TDE_LEN_TH1_8812F(x) ((x) & (~BITS_TDE_LEN_TH1_8812F)) 6152 #define BIT_GET_TDE_LEN_TH1_8812F(x) \ 6153 (((x) >> BIT_SHIFT_TDE_LEN_TH1_8812F) & BIT_MASK_TDE_LEN_TH1_8812F) 6154 #define BIT_SET_TDE_LEN_TH1_8812F(x, v) \ 6155 (BIT_CLEAR_TDE_LEN_TH1_8812F(x) | BIT_TDE_LEN_TH1_8812F(v)) 6156 6157 #define BIT_SHIFT_TDE_LEN_TH0_8812F 0 6158 #define BIT_MASK_TDE_LEN_TH0_8812F 0xffff 6159 #define BIT_TDE_LEN_TH0_8812F(x) \ 6160 (((x) & BIT_MASK_TDE_LEN_TH0_8812F) << BIT_SHIFT_TDE_LEN_TH0_8812F) 6161 #define BITS_TDE_LEN_TH0_8812F \ 6162 (BIT_MASK_TDE_LEN_TH0_8812F << BIT_SHIFT_TDE_LEN_TH0_8812F) 6163 #define BIT_CLEAR_TDE_LEN_TH0_8812F(x) ((x) & (~BITS_TDE_LEN_TH0_8812F)) 6164 #define BIT_GET_TDE_LEN_TH0_8812F(x) \ 6165 (((x) >> BIT_SHIFT_TDE_LEN_TH0_8812F) & BIT_MASK_TDE_LEN_TH0_8812F) 6166 #define BIT_SET_TDE_LEN_TH0_8812F(x, v) \ 6167 (BIT_CLEAR_TDE_LEN_TH0_8812F(x) | BIT_TDE_LEN_TH0_8812F(v)) 6168 6169 /* 2 REG_RXDMA_LEN_THRESHOLD_8812F */ 6170 6171 #define BIT_SHIFT_RDE_LEN_TH1_8812F 16 6172 #define BIT_MASK_RDE_LEN_TH1_8812F 0xffff 6173 #define BIT_RDE_LEN_TH1_8812F(x) \ 6174 (((x) & BIT_MASK_RDE_LEN_TH1_8812F) << BIT_SHIFT_RDE_LEN_TH1_8812F) 6175 #define BITS_RDE_LEN_TH1_8812F \ 6176 (BIT_MASK_RDE_LEN_TH1_8812F << BIT_SHIFT_RDE_LEN_TH1_8812F) 6177 #define BIT_CLEAR_RDE_LEN_TH1_8812F(x) ((x) & (~BITS_RDE_LEN_TH1_8812F)) 6178 #define BIT_GET_RDE_LEN_TH1_8812F(x) \ 6179 (((x) >> BIT_SHIFT_RDE_LEN_TH1_8812F) & BIT_MASK_RDE_LEN_TH1_8812F) 6180 #define BIT_SET_RDE_LEN_TH1_8812F(x, v) \ 6181 (BIT_CLEAR_RDE_LEN_TH1_8812F(x) | BIT_RDE_LEN_TH1_8812F(v)) 6182 6183 #define BIT_SHIFT_RDE_LEN_TH0_8812F 0 6184 #define BIT_MASK_RDE_LEN_TH0_8812F 0xffff 6185 #define BIT_RDE_LEN_TH0_8812F(x) \ 6186 (((x) & BIT_MASK_RDE_LEN_TH0_8812F) << BIT_SHIFT_RDE_LEN_TH0_8812F) 6187 #define BITS_RDE_LEN_TH0_8812F \ 6188 (BIT_MASK_RDE_LEN_TH0_8812F << BIT_SHIFT_RDE_LEN_TH0_8812F) 6189 #define BIT_CLEAR_RDE_LEN_TH0_8812F(x) ((x) & (~BITS_RDE_LEN_TH0_8812F)) 6190 #define BIT_GET_RDE_LEN_TH0_8812F(x) \ 6191 (((x) >> BIT_SHIFT_RDE_LEN_TH0_8812F) & BIT_MASK_RDE_LEN_TH0_8812F) 6192 #define BIT_SET_RDE_LEN_TH0_8812F(x, v) \ 6193 (BIT_CLEAR_RDE_LEN_TH0_8812F(x) | BIT_RDE_LEN_TH0_8812F(v)) 6194 6195 /* 2 REG_PCIE_EXEC_TIME_THRESHOLD_8812F */ 6196 6197 #define BIT_SHIFT_COUNT_INT_SEL_8812F 16 6198 #define BIT_MASK_COUNT_INT_SEL_8812F 0x3 6199 #define BIT_COUNT_INT_SEL_8812F(x) \ 6200 (((x) & BIT_MASK_COUNT_INT_SEL_8812F) << BIT_SHIFT_COUNT_INT_SEL_8812F) 6201 #define BITS_COUNT_INT_SEL_8812F \ 6202 (BIT_MASK_COUNT_INT_SEL_8812F << BIT_SHIFT_COUNT_INT_SEL_8812F) 6203 #define BIT_CLEAR_COUNT_INT_SEL_8812F(x) ((x) & (~BITS_COUNT_INT_SEL_8812F)) 6204 #define BIT_GET_COUNT_INT_SEL_8812F(x) \ 6205 (((x) >> BIT_SHIFT_COUNT_INT_SEL_8812F) & BIT_MASK_COUNT_INT_SEL_8812F) 6206 #define BIT_SET_COUNT_INT_SEL_8812F(x, v) \ 6207 (BIT_CLEAR_COUNT_INT_SEL_8812F(x) | BIT_COUNT_INT_SEL_8812F(v)) 6208 6209 #define BIT_SHIFT_EXEC_TIME_TH_8812F 0 6210 #define BIT_MASK_EXEC_TIME_TH_8812F 0xffff 6211 #define BIT_EXEC_TIME_TH_8812F(x) \ 6212 (((x) & BIT_MASK_EXEC_TIME_TH_8812F) << BIT_SHIFT_EXEC_TIME_TH_8812F) 6213 #define BITS_EXEC_TIME_TH_8812F \ 6214 (BIT_MASK_EXEC_TIME_TH_8812F << BIT_SHIFT_EXEC_TIME_TH_8812F) 6215 #define BIT_CLEAR_EXEC_TIME_TH_8812F(x) ((x) & (~BITS_EXEC_TIME_TH_8812F)) 6216 #define BIT_GET_EXEC_TIME_TH_8812F(x) \ 6217 (((x) >> BIT_SHIFT_EXEC_TIME_TH_8812F) & BIT_MASK_EXEC_TIME_TH_8812F) 6218 #define BIT_SET_EXEC_TIME_TH_8812F(x, v) \ 6219 (BIT_CLEAR_EXEC_TIME_TH_8812F(x) | BIT_EXEC_TIME_TH_8812F(v)) 6220 6221 /* 2 REG_FT2IMR_8812F */ 6222 #define BIT_FS_CLI3_RX_UAPSDMD1_EN_8812F BIT(31) 6223 #define BIT_FS_CLI3_RX_UAPSDMD0_EN_8812F BIT(30) 6224 #define BIT_FS_CLI3_TRIGGER_PKT_EN_8812F BIT(29) 6225 #define BIT_FS_CLI3_EOSP_INT_EN_8812F BIT(28) 6226 #define BIT_FS_CLI2_RX_UAPSDMD1_EN_8812F BIT(27) 6227 #define BIT_FS_CLI2_RX_UAPSDMD0_EN_8812F BIT(26) 6228 #define BIT_FS_CLI2_TRIGGER_PKT_EN_8812F BIT(25) 6229 #define BIT_FS_CLI2_EOSP_INT_EN_8812F BIT(24) 6230 #define BIT_FS_CLI1_RX_UAPSDMD1_EN_8812F BIT(23) 6231 #define BIT_FS_CLI1_RX_UAPSDMD0_EN_8812F BIT(22) 6232 #define BIT_FS_CLI1_TRIGGER_PKT_EN_8812F BIT(21) 6233 #define BIT_FS_CLI1_EOSP_INT_EN_8812F BIT(20) 6234 #define BIT_FS_CLI0_RX_UAPSDMD1_EN_8812F BIT(19) 6235 #define BIT_FS_CLI0_RX_UAPSDMD0_EN_8812F BIT(18) 6236 #define BIT_FS_CLI0_TRIGGER_PKT_EN_8812F BIT(17) 6237 #define BIT_FS_CLI0_EOSP_INT_EN_8812F BIT(16) 6238 #define BIT_FS_TSF_BIT32_TOGGLE_P2P2_EN_8812F BIT(9) 6239 #define BIT_FS_TSF_BIT32_TOGGLE_P2P1_EN_8812F BIT(8) 6240 #define BIT_FS_CLI3_TX_NULL1_INT_EN_8812F BIT(7) 6241 #define BIT_FS_CLI3_TX_NULL0_INT_EN_8812F BIT(6) 6242 #define BIT_FS_CLI2_TX_NULL1_INT_EN_8812F BIT(5) 6243 #define BIT_FS_CLI2_TX_NULL0_INT_EN_8812F BIT(4) 6244 #define BIT_FS_CLI1_TX_NULL1_INT_EN_8812F BIT(3) 6245 #define BIT_FS_CLI1_TX_NULL0_INT_EN_8812F BIT(2) 6246 #define BIT_FS_CLI0_TX_NULL1_INT_EN_8812F BIT(1) 6247 #define BIT_FS_CLI0_TX_NULL0_INT_EN_8812F BIT(0) 6248 6249 /* 2 REG_FT2ISR_8812F */ 6250 #define BIT_FS_CLI3_RX_UAPSDMD1_INT_8812F BIT(31) 6251 #define BIT_FS_CLI3_RX_UAPSDMD0_INT_8812F BIT(30) 6252 #define BIT_FS_CLI3_TRIGGER_PKT_INT_8812F BIT(29) 6253 #define BIT_FS_CLI3_EOSP_INT_8812F BIT(28) 6254 #define BIT_FS_CLI2_RX_UAPSDMD1_INT_8812F BIT(27) 6255 #define BIT_FS_CLI2_RX_UAPSDMD0_INT_8812F BIT(26) 6256 #define BIT_FS_CLI2_TRIGGER_PKT_INT_8812F BIT(25) 6257 #define BIT_FS_CLI2_EOSP_INT_8812F BIT(24) 6258 #define BIT_FS_CLI1_RX_UAPSDMD1_INT_8812F BIT(23) 6259 #define BIT_FS_CLI1_RX_UAPSDMD0_INT_8812F BIT(22) 6260 #define BIT_FS_CLI1_TRIGGER_PKT_INT_8812F BIT(21) 6261 #define BIT_FS_CLI1_EOSP_INT_8812F BIT(20) 6262 #define BIT_FS_CLI0_RX_UAPSDMD1_INT_8812F BIT(19) 6263 #define BIT_FS_CLI0_RX_UAPSDMD0_INT_8812F BIT(18) 6264 #define BIT_FS_CLI0_TRIGGER_PKT_INT_8812F BIT(17) 6265 #define BIT_FS_CLI0_EOSP_INT_8812F BIT(16) 6266 #define BIT_FS_TSF_BIT32_TOGGLE_P2P2_INT_8812F BIT(9) 6267 #define BIT_FS_TSF_BIT32_TOGGLE_P2P1_INT_8812F BIT(8) 6268 #define BIT_FS_CLI3_TX_NULL1_INT_8812F BIT(7) 6269 #define BIT_FS_CLI3_TX_NULL0_INT_8812F BIT(6) 6270 #define BIT_FS_CLI2_TX_NULL1_INT_8812F BIT(5) 6271 #define BIT_FS_CLI2_TX_NULL0_INT_8812F BIT(4) 6272 #define BIT_FS_CLI1_TX_NULL1_INT_8812F BIT(3) 6273 #define BIT_FS_CLI1_TX_NULL0_INT_8812F BIT(2) 6274 #define BIT_FS_CLI0_TX_NULL1_INT_8812F BIT(1) 6275 #define BIT_FS_CLI0_TX_NULL0_INT_8812F BIT(0) 6276 6277 /* 2 REG_NOT_VALID_8812F */ 6278 6279 /* 2 REG_NOT_VALID_8812F */ 6280 6281 /* 2 REG_MSG2_8812F */ 6282 6283 #define BIT_SHIFT_FW_MSG2_8812F 0 6284 #define BIT_MASK_FW_MSG2_8812F 0xffffffffL 6285 #define BIT_FW_MSG2_8812F(x) \ 6286 (((x) & BIT_MASK_FW_MSG2_8812F) << BIT_SHIFT_FW_MSG2_8812F) 6287 #define BITS_FW_MSG2_8812F (BIT_MASK_FW_MSG2_8812F << BIT_SHIFT_FW_MSG2_8812F) 6288 #define BIT_CLEAR_FW_MSG2_8812F(x) ((x) & (~BITS_FW_MSG2_8812F)) 6289 #define BIT_GET_FW_MSG2_8812F(x) \ 6290 (((x) >> BIT_SHIFT_FW_MSG2_8812F) & BIT_MASK_FW_MSG2_8812F) 6291 #define BIT_SET_FW_MSG2_8812F(x, v) \ 6292 (BIT_CLEAR_FW_MSG2_8812F(x) | BIT_FW_MSG2_8812F(v)) 6293 6294 /* 2 REG_MSG3_8812F */ 6295 6296 #define BIT_SHIFT_FW_MSG3_8812F 0 6297 #define BIT_MASK_FW_MSG3_8812F 0xffffffffL 6298 #define BIT_FW_MSG3_8812F(x) \ 6299 (((x) & BIT_MASK_FW_MSG3_8812F) << BIT_SHIFT_FW_MSG3_8812F) 6300 #define BITS_FW_MSG3_8812F (BIT_MASK_FW_MSG3_8812F << BIT_SHIFT_FW_MSG3_8812F) 6301 #define BIT_CLEAR_FW_MSG3_8812F(x) ((x) & (~BITS_FW_MSG3_8812F)) 6302 #define BIT_GET_FW_MSG3_8812F(x) \ 6303 (((x) >> BIT_SHIFT_FW_MSG3_8812F) & BIT_MASK_FW_MSG3_8812F) 6304 #define BIT_SET_FW_MSG3_8812F(x, v) \ 6305 (BIT_CLEAR_FW_MSG3_8812F(x) | BIT_FW_MSG3_8812F(v)) 6306 6307 /* 2 REG_MSG4_8812F */ 6308 6309 #define BIT_SHIFT_FW_MSG4_8812F 0 6310 #define BIT_MASK_FW_MSG4_8812F 0xffffffffL 6311 #define BIT_FW_MSG4_8812F(x) \ 6312 (((x) & BIT_MASK_FW_MSG4_8812F) << BIT_SHIFT_FW_MSG4_8812F) 6313 #define BITS_FW_MSG4_8812F (BIT_MASK_FW_MSG4_8812F << BIT_SHIFT_FW_MSG4_8812F) 6314 #define BIT_CLEAR_FW_MSG4_8812F(x) ((x) & (~BITS_FW_MSG4_8812F)) 6315 #define BIT_GET_FW_MSG4_8812F(x) \ 6316 (((x) >> BIT_SHIFT_FW_MSG4_8812F) & BIT_MASK_FW_MSG4_8812F) 6317 #define BIT_SET_FW_MSG4_8812F(x, v) \ 6318 (BIT_CLEAR_FW_MSG4_8812F(x) | BIT_FW_MSG4_8812F(v)) 6319 6320 /* 2 REG_MSG5_8812F */ 6321 6322 #define BIT_SHIFT_FW_MSG5_8812F 0 6323 #define BIT_MASK_FW_MSG5_8812F 0xffffffffL 6324 #define BIT_FW_MSG5_8812F(x) \ 6325 (((x) & BIT_MASK_FW_MSG5_8812F) << BIT_SHIFT_FW_MSG5_8812F) 6326 #define BITS_FW_MSG5_8812F (BIT_MASK_FW_MSG5_8812F << BIT_SHIFT_FW_MSG5_8812F) 6327 #define BIT_CLEAR_FW_MSG5_8812F(x) ((x) & (~BITS_FW_MSG5_8812F)) 6328 #define BIT_GET_FW_MSG5_8812F(x) \ 6329 (((x) >> BIT_SHIFT_FW_MSG5_8812F) & BIT_MASK_FW_MSG5_8812F) 6330 #define BIT_SET_FW_MSG5_8812F(x, v) \ 6331 (BIT_CLEAR_FW_MSG5_8812F(x) | BIT_FW_MSG5_8812F(v)) 6332 6333 /* 2 REG_NOT_VALID_8812F */ 6334 6335 /* 2 REG_NOT_VALID_8812F */ 6336 6337 /* 2 REG_NOT_VALID_8812F */ 6338 6339 /* 2 REG_NOT_VALID_8812F */ 6340 6341 /* 2 REG_NOT_VALID_8812F */ 6342 6343 /* 2 REG_NOT_VALID_8812F */ 6344 6345 /* 2 REG_NOT_VALID_8812F */ 6346 6347 /* 2 REG_NOT_VALID_8812F */ 6348 6349 /* 2 REG_NOT_VALID_8812F */ 6350 6351 /* 2 REG_NOT_VALID_8812F */ 6352 6353 /* 2 REG_NOT_VALID_8812F */ 6354 6355 /* 2 REG_NOT_VALID_8812F */ 6356 6357 /* 2 REG_NOT_VALID_8812F */ 6358 6359 /* 2 REG_NOT_VALID_8812F */ 6360 6361 /* 2 REG_NOT_VALID_8812F */ 6362 6363 /* 2 REG_NOT_VALID_8812F */ 6364 6365 /* 2 REG_NOT_VALID_8812F */ 6366 6367 /* 2 REG_NOT_VALID_8812F */ 6368 6369 /* 2 REG_NOT_VALID_8812F */ 6370 6371 /* 2 REG_NOT_VALID_8812F */ 6372 6373 /* 2 REG_NOT_VALID_8812F */ 6374 6375 /* 2 REG_NOT_VALID_8812F */ 6376 6377 /* 2 REG_NOT_VALID_8812F */ 6378 6379 /* 2 REG_NOT_VALID_8812F */ 6380 6381 /* 2 REG_NOT_VALID_8812F */ 6382 6383 /* 2 REG_NOT_VALID_8812F */ 6384 6385 /* 2 REG_NOT_VALID_8812F */ 6386 6387 /* 2 REG_NOT_VALID_8812F */ 6388 6389 /* 2 REG_NOT_VALID_8812F */ 6390 6391 /* 2 REG_NOT_VALID_8812F */ 6392 6393 /* 2 REG_NOT_VALID_8812F */ 6394 6395 /* 2 REG_NOT_VALID_8812F */ 6396 6397 /* 2 REG_NOT_VALID_8812F */ 6398 6399 /* 2 REG_NOT_VALID_8812F */ 6400 6401 /* 2 REG_NOT_VALID_8812F */ 6402 6403 /* 2 REG_NOT_VALID_8812F */ 6404 6405 /* 2 REG_NOT_VALID_8812F */ 6406 6407 /* 2 REG_NOT_VALID_8812F */ 6408 6409 /* 2 REG_NOT_VALID_8812F */ 6410 6411 /* 2 REG_NOT_VALID_8812F */ 6412 6413 /* 2 REG_NOT_VALID_8812F */ 6414 6415 /* 2 REG_NOT_VALID_8812F */ 6416 6417 /* 2 REG_NOT_VALID_8812F */ 6418 6419 /* 2 REG_NOT_VALID_8812F */ 6420 6421 /* 2 REG_NOT_VALID_8812F */ 6422 6423 /* 2 REG_NOT_VALID_8812F */ 6424 6425 /* 2 REG_NOT_VALID_8812F */ 6426 6427 /* 2 REG_NOT_VALID_8812F */ 6428 6429 /* 2 REG_NOT_VALID_8812F */ 6430 6431 /* 2 REG_NOT_VALID_8812F */ 6432 6433 /* 2 REG_NOT_VALID_8812F */ 6434 6435 /* 2 REG_NOT_VALID_8812F */ 6436 6437 /* 2 REG_NOT_VALID_8812F */ 6438 6439 /* 2 REG_NOT_VALID_8812F */ 6440 6441 /* 2 REG_NOT_VALID_8812F */ 6442 6443 /* 2 REG_NOT_VALID_8812F */ 6444 6445 /* 2 REG_NOT_VALID_8812F */ 6446 6447 /* 2 REG_NOT_VALID_8812F */ 6448 6449 /* 2 REG_NOT_VALID_8812F */ 6450 6451 /* 2 REG_NOT_VALID_8812F */ 6452 6453 /* 2 REG_NOT_VALID_8812F */ 6454 6455 /* 2 REG_NOT_VALID_8812F */ 6456 6457 /* 2 REG_NOT_VALID_8812F */ 6458 6459 /* 2 REG_NOT_VALID_8812F */ 6460 6461 /* 2 REG_NOT_VALID_8812F */ 6462 6463 /* 2 REG_NOT_VALID_8812F */ 6464 6465 /* 2 REG_NOT_VALID_8812F */ 6466 6467 /* 2 REG_NOT_VALID_8812F */ 6468 6469 /* 2 REG_NOT_VALID_8812F */ 6470 6471 /* 2 REG_NOT_VALID_8812F */ 6472 6473 /* 2 REG_NOT_VALID_8812F */ 6474 6475 /* 2 REG_NOT_VALID_8812F */ 6476 6477 /* 2 REG_NOT_VALID_8812F */ 6478 6479 /* 2 REG_NOT_VALID_8812F */ 6480 6481 /* 2 REG_NOT_VALID_8812F */ 6482 6483 /* 2 REG_NOT_VALID_8812F */ 6484 6485 /* 2 REG_NOT_VALID_8812F */ 6486 6487 /* 2 REG_NOT_VALID_8812F */ 6488 6489 /* 2 REG_NOT_VALID_8812F */ 6490 6491 /* 2 REG_NOT_VALID_8812F */ 6492 6493 /* 2 REG_NOT_VALID_8812F */ 6494 6495 /* 2 REG_NOT_VALID_8812F */ 6496 6497 /* 2 REG_NOT_VALID_8812F */ 6498 6499 /* 2 REG_NOT_VALID_8812F */ 6500 6501 /* 2 REG_NOT_VALID_8812F */ 6502 6503 /* 2 REG_NOT_VALID_8812F */ 6504 6505 /* 2 REG_NOT_VALID_8812F */ 6506 6507 /* 2 REG_NOT_VALID_8812F */ 6508 6509 /* 2 REG_NOT_VALID_8812F */ 6510 6511 /* 2 REG_NOT_VALID_8812F */ 6512 6513 /* 2 REG_NOT_VALID_8812F */ 6514 6515 /* 2 REG_NOT_VALID_8812F */ 6516 6517 /* 2 REG_NOT_VALID_8812F */ 6518 6519 /* 2 REG_NOT_VALID_8812F */ 6520 6521 /* 2 REG_NOT_VALID_8812F */ 6522 6523 /* 2 REG_NOT_VALID_8812F */ 6524 6525 /* 2 REG_NOT_VALID_8812F */ 6526 6527 /* 2 REG_NOT_VALID_8812F */ 6528 6529 /* 2 REG_NOT_VALID_8812F */ 6530 6531 /* 2 REG_NOT_VALID_8812F */ 6532 6533 /* 2 REG_NOT_VALID_8812F */ 6534 6535 /* 2 REG_NOT_VALID_8812F */ 6536 6537 /* 2 REG_NOT_VALID_8812F */ 6538 6539 /* 2 REG_NOT_VALID_8812F */ 6540 6541 /* 2 REG_NOT_VALID_8812F */ 6542 6543 /* 2 REG_NOT_VALID_8812F */ 6544 6545 /* 2 REG_NOT_VALID_8812F */ 6546 6547 /* 2 REG_NOT_VALID_8812F */ 6548 6549 /* 2 REG_NOT_VALID_8812F */ 6550 6551 /* 2 REG_NOT_VALID_8812F */ 6552 6553 /* 2 REG_NOT_VALID_8812F */ 6554 6555 /* 2 REG_NOT_VALID_8812F */ 6556 6557 /* 2 REG_NOT_VALID_8812F */ 6558 6559 /* 2 REG_NOT_VALID_8812F */ 6560 6561 /* 2 REG_NOT_VALID_8812F */ 6562 6563 /* 2 REG_NOT_VALID_8812F */ 6564 6565 /* 2 REG_NOT_VALID_8812F */ 6566 6567 /* 2 REG_NOT_VALID_8812F */ 6568 6569 /* 2 REG_NOT_VALID_8812F */ 6570 6571 /* 2 REG_NOT_VALID_8812F */ 6572 6573 /* 2 REG_NOT_VALID_8812F */ 6574 6575 /* 2 REG_NOT_VALID_8812F */ 6576 6577 /* 2 REG_NOT_VALID_8812F */ 6578 6579 /* 2 REG_NOT_VALID_8812F */ 6580 6581 /* 2 REG_NOT_VALID_8812F */ 6582 6583 /* 2 REG_NOT_VALID_8812F */ 6584 6585 /* 2 REG_NOT_VALID_8812F */ 6586 6587 /* 2 REG_NOT_VALID_8812F */ 6588 6589 /* 2 REG_NOT_VALID_8812F */ 6590 6591 /* 2 REG_FIFOPAGE_CTRL_1_8812F */ 6592 6593 /* 2 REG_NOT_VALID_8812F */ 6594 6595 #define BIT_SHIFT_TX_OQT_HE_FREE_SPACE_V1_8812F 16 6596 #define BIT_MASK_TX_OQT_HE_FREE_SPACE_V1_8812F 0xff 6597 #define BIT_TX_OQT_HE_FREE_SPACE_V1_8812F(x) \ 6598 (((x) & BIT_MASK_TX_OQT_HE_FREE_SPACE_V1_8812F) \ 6599 << BIT_SHIFT_TX_OQT_HE_FREE_SPACE_V1_8812F) 6600 #define BITS_TX_OQT_HE_FREE_SPACE_V1_8812F \ 6601 (BIT_MASK_TX_OQT_HE_FREE_SPACE_V1_8812F \ 6602 << BIT_SHIFT_TX_OQT_HE_FREE_SPACE_V1_8812F) 6603 #define BIT_CLEAR_TX_OQT_HE_FREE_SPACE_V1_8812F(x) \ 6604 ((x) & (~BITS_TX_OQT_HE_FREE_SPACE_V1_8812F)) 6605 #define BIT_GET_TX_OQT_HE_FREE_SPACE_V1_8812F(x) \ 6606 (((x) >> BIT_SHIFT_TX_OQT_HE_FREE_SPACE_V1_8812F) & \ 6607 BIT_MASK_TX_OQT_HE_FREE_SPACE_V1_8812F) 6608 #define BIT_SET_TX_OQT_HE_FREE_SPACE_V1_8812F(x, v) \ 6609 (BIT_CLEAR_TX_OQT_HE_FREE_SPACE_V1_8812F(x) | \ 6610 BIT_TX_OQT_HE_FREE_SPACE_V1_8812F(v)) 6611 6612 /* 2 REG_NOT_VALID_8812F */ 6613 6614 #define BIT_SHIFT_TX_OQT_NL_FREE_SPACE_V1_8812F 0 6615 #define BIT_MASK_TX_OQT_NL_FREE_SPACE_V1_8812F 0xff 6616 #define BIT_TX_OQT_NL_FREE_SPACE_V1_8812F(x) \ 6617 (((x) & BIT_MASK_TX_OQT_NL_FREE_SPACE_V1_8812F) \ 6618 << BIT_SHIFT_TX_OQT_NL_FREE_SPACE_V1_8812F) 6619 #define BITS_TX_OQT_NL_FREE_SPACE_V1_8812F \ 6620 (BIT_MASK_TX_OQT_NL_FREE_SPACE_V1_8812F \ 6621 << BIT_SHIFT_TX_OQT_NL_FREE_SPACE_V1_8812F) 6622 #define BIT_CLEAR_TX_OQT_NL_FREE_SPACE_V1_8812F(x) \ 6623 ((x) & (~BITS_TX_OQT_NL_FREE_SPACE_V1_8812F)) 6624 #define BIT_GET_TX_OQT_NL_FREE_SPACE_V1_8812F(x) \ 6625 (((x) >> BIT_SHIFT_TX_OQT_NL_FREE_SPACE_V1_8812F) & \ 6626 BIT_MASK_TX_OQT_NL_FREE_SPACE_V1_8812F) 6627 #define BIT_SET_TX_OQT_NL_FREE_SPACE_V1_8812F(x, v) \ 6628 (BIT_CLEAR_TX_OQT_NL_FREE_SPACE_V1_8812F(x) | \ 6629 BIT_TX_OQT_NL_FREE_SPACE_V1_8812F(v)) 6630 6631 /* 2 REG_FIFOPAGE_CTRL_2_8812F */ 6632 #define BIT_BCN_VALID_1_V1_8812F BIT(31) 6633 6634 /* 2 REG_NOT_VALID_8812F */ 6635 6636 #define BIT_SHIFT_BCN_HEAD_1_V1_8812F 16 6637 #define BIT_MASK_BCN_HEAD_1_V1_8812F 0xfff 6638 #define BIT_BCN_HEAD_1_V1_8812F(x) \ 6639 (((x) & BIT_MASK_BCN_HEAD_1_V1_8812F) << BIT_SHIFT_BCN_HEAD_1_V1_8812F) 6640 #define BITS_BCN_HEAD_1_V1_8812F \ 6641 (BIT_MASK_BCN_HEAD_1_V1_8812F << BIT_SHIFT_BCN_HEAD_1_V1_8812F) 6642 #define BIT_CLEAR_BCN_HEAD_1_V1_8812F(x) ((x) & (~BITS_BCN_HEAD_1_V1_8812F)) 6643 #define BIT_GET_BCN_HEAD_1_V1_8812F(x) \ 6644 (((x) >> BIT_SHIFT_BCN_HEAD_1_V1_8812F) & BIT_MASK_BCN_HEAD_1_V1_8812F) 6645 #define BIT_SET_BCN_HEAD_1_V1_8812F(x, v) \ 6646 (BIT_CLEAR_BCN_HEAD_1_V1_8812F(x) | BIT_BCN_HEAD_1_V1_8812F(v)) 6647 6648 #define BIT_BCN_VALID_V1_8812F BIT(15) 6649 6650 /* 2 REG_NOT_VALID_8812F */ 6651 6652 #define BIT_SHIFT_BCN_HEAD_V1_8812F 0 6653 #define BIT_MASK_BCN_HEAD_V1_8812F 0xfff 6654 #define BIT_BCN_HEAD_V1_8812F(x) \ 6655 (((x) & BIT_MASK_BCN_HEAD_V1_8812F) << BIT_SHIFT_BCN_HEAD_V1_8812F) 6656 #define BITS_BCN_HEAD_V1_8812F \ 6657 (BIT_MASK_BCN_HEAD_V1_8812F << BIT_SHIFT_BCN_HEAD_V1_8812F) 6658 #define BIT_CLEAR_BCN_HEAD_V1_8812F(x) ((x) & (~BITS_BCN_HEAD_V1_8812F)) 6659 #define BIT_GET_BCN_HEAD_V1_8812F(x) \ 6660 (((x) >> BIT_SHIFT_BCN_HEAD_V1_8812F) & BIT_MASK_BCN_HEAD_V1_8812F) 6661 #define BIT_SET_BCN_HEAD_V1_8812F(x, v) \ 6662 (BIT_CLEAR_BCN_HEAD_V1_8812F(x) | BIT_BCN_HEAD_V1_8812F(v)) 6663 6664 /* 2 REG_AUTO_LLT_V1_8812F */ 6665 6666 #define BIT_SHIFT_MAX_TX_PKT_V1_8812F 24 6667 #define BIT_MASK_MAX_TX_PKT_V1_8812F 0xff 6668 #define BIT_MAX_TX_PKT_V1_8812F(x) \ 6669 (((x) & BIT_MASK_MAX_TX_PKT_V1_8812F) << BIT_SHIFT_MAX_TX_PKT_V1_8812F) 6670 #define BITS_MAX_TX_PKT_V1_8812F \ 6671 (BIT_MASK_MAX_TX_PKT_V1_8812F << BIT_SHIFT_MAX_TX_PKT_V1_8812F) 6672 #define BIT_CLEAR_MAX_TX_PKT_V1_8812F(x) ((x) & (~BITS_MAX_TX_PKT_V1_8812F)) 6673 #define BIT_GET_MAX_TX_PKT_V1_8812F(x) \ 6674 (((x) >> BIT_SHIFT_MAX_TX_PKT_V1_8812F) & BIT_MASK_MAX_TX_PKT_V1_8812F) 6675 #define BIT_SET_MAX_TX_PKT_V1_8812F(x, v) \ 6676 (BIT_CLEAR_MAX_TX_PKT_V1_8812F(x) | BIT_MAX_TX_PKT_V1_8812F(v)) 6677 6678 #define BIT_TDE_ERROR_STOP_V1_8812F BIT(23) 6679 6680 /* 2 REG_NOT_VALID_8812F */ 6681 6682 #define BIT_SHIFT_LLT_FREE_PAGE_V2_8812F 8 6683 #define BIT_MASK_LLT_FREE_PAGE_V2_8812F 0xfff 6684 #define BIT_LLT_FREE_PAGE_V2_8812F(x) \ 6685 (((x) & BIT_MASK_LLT_FREE_PAGE_V2_8812F) \ 6686 << BIT_SHIFT_LLT_FREE_PAGE_V2_8812F) 6687 #define BITS_LLT_FREE_PAGE_V2_8812F \ 6688 (BIT_MASK_LLT_FREE_PAGE_V2_8812F << BIT_SHIFT_LLT_FREE_PAGE_V2_8812F) 6689 #define BIT_CLEAR_LLT_FREE_PAGE_V2_8812F(x) \ 6690 ((x) & (~BITS_LLT_FREE_PAGE_V2_8812F)) 6691 #define BIT_GET_LLT_FREE_PAGE_V2_8812F(x) \ 6692 (((x) >> BIT_SHIFT_LLT_FREE_PAGE_V2_8812F) & \ 6693 BIT_MASK_LLT_FREE_PAGE_V2_8812F) 6694 #define BIT_SET_LLT_FREE_PAGE_V2_8812F(x, v) \ 6695 (BIT_CLEAR_LLT_FREE_PAGE_V2_8812F(x) | BIT_LLT_FREE_PAGE_V2_8812F(v)) 6696 6697 #define BIT_SHIFT_BLK_DESC_NUM_8812F 4 6698 #define BIT_MASK_BLK_DESC_NUM_8812F 0xf 6699 #define BIT_BLK_DESC_NUM_8812F(x) \ 6700 (((x) & BIT_MASK_BLK_DESC_NUM_8812F) << BIT_SHIFT_BLK_DESC_NUM_8812F) 6701 #define BITS_BLK_DESC_NUM_8812F \ 6702 (BIT_MASK_BLK_DESC_NUM_8812F << BIT_SHIFT_BLK_DESC_NUM_8812F) 6703 #define BIT_CLEAR_BLK_DESC_NUM_8812F(x) ((x) & (~BITS_BLK_DESC_NUM_8812F)) 6704 #define BIT_GET_BLK_DESC_NUM_8812F(x) \ 6705 (((x) >> BIT_SHIFT_BLK_DESC_NUM_8812F) & BIT_MASK_BLK_DESC_NUM_8812F) 6706 #define BIT_SET_BLK_DESC_NUM_8812F(x, v) \ 6707 (BIT_CLEAR_BLK_DESC_NUM_8812F(x) | BIT_BLK_DESC_NUM_8812F(v)) 6708 6709 #define BIT_R_BCN_HEAD_SEL_8812F BIT(3) 6710 #define BIT_R_EN_BCN_SW_HEAD_SEL_8812F BIT(2) 6711 #define BIT_LLT_DBG_SEL_8812F BIT(1) 6712 #define BIT_AUTO_INIT_LLT_V1_8812F BIT(0) 6713 6714 /* 2 REG_TXDMA_OFFSET_CHK_8812F */ 6715 #define BIT_EM_CHKSUM_FIN_8812F BIT(31) 6716 #define BIT_EMN_PCIE_DMA_MOD_8812F BIT(30) 6717 #define BIT_EN_TXQUE_CLR_8812F BIT(29) 6718 #define BIT_EN_PCIE_FIFO_MODE_8812F BIT(28) 6719 6720 #define BIT_SHIFT_PG_UNDER_TH_V1_8812F 16 6721 #define BIT_MASK_PG_UNDER_TH_V1_8812F 0xfff 6722 #define BIT_PG_UNDER_TH_V1_8812F(x) \ 6723 (((x) & BIT_MASK_PG_UNDER_TH_V1_8812F) \ 6724 << BIT_SHIFT_PG_UNDER_TH_V1_8812F) 6725 #define BITS_PG_UNDER_TH_V1_8812F \ 6726 (BIT_MASK_PG_UNDER_TH_V1_8812F << BIT_SHIFT_PG_UNDER_TH_V1_8812F) 6727 #define BIT_CLEAR_PG_UNDER_TH_V1_8812F(x) ((x) & (~BITS_PG_UNDER_TH_V1_8812F)) 6728 #define BIT_GET_PG_UNDER_TH_V1_8812F(x) \ 6729 (((x) >> BIT_SHIFT_PG_UNDER_TH_V1_8812F) & \ 6730 BIT_MASK_PG_UNDER_TH_V1_8812F) 6731 #define BIT_SET_PG_UNDER_TH_V1_8812F(x, v) \ 6732 (BIT_CLEAR_PG_UNDER_TH_V1_8812F(x) | BIT_PG_UNDER_TH_V1_8812F(v)) 6733 6734 #define BIT_R_EN_RESET_RESTORE_H2C_8812F BIT(15) 6735 #define BIT_SDIO_TDE_FINISH_8812F BIT(14) 6736 #define BIT_SDIO_TXDESC_CHKSUM_EN_8812F BIT(13) 6737 #define BIT_RST_RDPTR_8812F BIT(12) 6738 #define BIT_RST_WRPTR_8812F BIT(11) 6739 #define BIT_CHK_PG_TH_EN_8812F BIT(10) 6740 #define BIT_DROP_DATA_EN_8812F BIT(9) 6741 #define BIT_CHECK_OFFSET_EN_8812F BIT(8) 6742 6743 #define BIT_SHIFT_CHECK_OFFSET_8812F 0 6744 #define BIT_MASK_CHECK_OFFSET_8812F 0xff 6745 #define BIT_CHECK_OFFSET_8812F(x) \ 6746 (((x) & BIT_MASK_CHECK_OFFSET_8812F) << BIT_SHIFT_CHECK_OFFSET_8812F) 6747 #define BITS_CHECK_OFFSET_8812F \ 6748 (BIT_MASK_CHECK_OFFSET_8812F << BIT_SHIFT_CHECK_OFFSET_8812F) 6749 #define BIT_CLEAR_CHECK_OFFSET_8812F(x) ((x) & (~BITS_CHECK_OFFSET_8812F)) 6750 #define BIT_GET_CHECK_OFFSET_8812F(x) \ 6751 (((x) >> BIT_SHIFT_CHECK_OFFSET_8812F) & BIT_MASK_CHECK_OFFSET_8812F) 6752 #define BIT_SET_CHECK_OFFSET_8812F(x, v) \ 6753 (BIT_CLEAR_CHECK_OFFSET_8812F(x) | BIT_CHECK_OFFSET_8812F(v)) 6754 6755 /* 2 REG_TXDMA_STATUS_8812F */ 6756 #define BIT_TXPKTBUF_REQ_ERR_8812F BIT(18) 6757 #define BIT_HI_OQT_UDN_8812F BIT(17) 6758 #define BIT_HI_OQT_OVF_8812F BIT(16) 6759 #define BIT_PAYLOAD_CHKSUM_ERR_8812F BIT(15) 6760 #define BIT_PAYLOAD_UDN_8812F BIT(14) 6761 #define BIT_PAYLOAD_OVF_8812F BIT(13) 6762 #define BIT_DSC_CHKSUM_FAIL_8812F BIT(12) 6763 #define BIT_UNKNOWN_QSEL_8812F BIT(11) 6764 #define BIT_EP_QSEL_DIFF_8812F BIT(10) 6765 #define BIT_TX_OFFS_UNMATCH_8812F BIT(9) 6766 #define BIT_TXOQT_UDN_8812F BIT(8) 6767 #define BIT_TXOQT_OVF_8812F BIT(7) 6768 #define BIT_TXDMA_SFF_UDN_8812F BIT(6) 6769 #define BIT_TXDMA_SFF_OVF_8812F BIT(5) 6770 #define BIT_LLT_NULL_PG_8812F BIT(4) 6771 #define BIT_PAGE_UDN_8812F BIT(3) 6772 #define BIT_PAGE_OVF_8812F BIT(2) 6773 #define BIT_TXFF_PG_UDN_8812F BIT(1) 6774 #define BIT_TXFF_PG_OVF_8812F BIT(0) 6775 6776 /* 2 REG_TX_DMA_DBG_8812F */ 6777 6778 /* 2 REG_TQPNT1_8812F */ 6779 #define BIT_HPQ_INT_EN_8812F BIT(31) 6780 6781 #define BIT_SHIFT_HPQ_HIGH_TH_V1_8812F 16 6782 #define BIT_MASK_HPQ_HIGH_TH_V1_8812F 0xfff 6783 #define BIT_HPQ_HIGH_TH_V1_8812F(x) \ 6784 (((x) & BIT_MASK_HPQ_HIGH_TH_V1_8812F) \ 6785 << BIT_SHIFT_HPQ_HIGH_TH_V1_8812F) 6786 #define BITS_HPQ_HIGH_TH_V1_8812F \ 6787 (BIT_MASK_HPQ_HIGH_TH_V1_8812F << BIT_SHIFT_HPQ_HIGH_TH_V1_8812F) 6788 #define BIT_CLEAR_HPQ_HIGH_TH_V1_8812F(x) ((x) & (~BITS_HPQ_HIGH_TH_V1_8812F)) 6789 #define BIT_GET_HPQ_HIGH_TH_V1_8812F(x) \ 6790 (((x) >> BIT_SHIFT_HPQ_HIGH_TH_V1_8812F) & \ 6791 BIT_MASK_HPQ_HIGH_TH_V1_8812F) 6792 #define BIT_SET_HPQ_HIGH_TH_V1_8812F(x, v) \ 6793 (BIT_CLEAR_HPQ_HIGH_TH_V1_8812F(x) | BIT_HPQ_HIGH_TH_V1_8812F(v)) 6794 6795 #define BIT_SHIFT_HPQ_LOW_TH_V1_8812F 0 6796 #define BIT_MASK_HPQ_LOW_TH_V1_8812F 0xfff 6797 #define BIT_HPQ_LOW_TH_V1_8812F(x) \ 6798 (((x) & BIT_MASK_HPQ_LOW_TH_V1_8812F) << BIT_SHIFT_HPQ_LOW_TH_V1_8812F) 6799 #define BITS_HPQ_LOW_TH_V1_8812F \ 6800 (BIT_MASK_HPQ_LOW_TH_V1_8812F << BIT_SHIFT_HPQ_LOW_TH_V1_8812F) 6801 #define BIT_CLEAR_HPQ_LOW_TH_V1_8812F(x) ((x) & (~BITS_HPQ_LOW_TH_V1_8812F)) 6802 #define BIT_GET_HPQ_LOW_TH_V1_8812F(x) \ 6803 (((x) >> BIT_SHIFT_HPQ_LOW_TH_V1_8812F) & BIT_MASK_HPQ_LOW_TH_V1_8812F) 6804 #define BIT_SET_HPQ_LOW_TH_V1_8812F(x, v) \ 6805 (BIT_CLEAR_HPQ_LOW_TH_V1_8812F(x) | BIT_HPQ_LOW_TH_V1_8812F(v)) 6806 6807 /* 2 REG_TQPNT2_8812F */ 6808 #define BIT_NPQ_INT_EN_8812F BIT(31) 6809 6810 #define BIT_SHIFT_NPQ_HIGH_TH_V1_8812F 16 6811 #define BIT_MASK_NPQ_HIGH_TH_V1_8812F 0xfff 6812 #define BIT_NPQ_HIGH_TH_V1_8812F(x) \ 6813 (((x) & BIT_MASK_NPQ_HIGH_TH_V1_8812F) \ 6814 << BIT_SHIFT_NPQ_HIGH_TH_V1_8812F) 6815 #define BITS_NPQ_HIGH_TH_V1_8812F \ 6816 (BIT_MASK_NPQ_HIGH_TH_V1_8812F << BIT_SHIFT_NPQ_HIGH_TH_V1_8812F) 6817 #define BIT_CLEAR_NPQ_HIGH_TH_V1_8812F(x) ((x) & (~BITS_NPQ_HIGH_TH_V1_8812F)) 6818 #define BIT_GET_NPQ_HIGH_TH_V1_8812F(x) \ 6819 (((x) >> BIT_SHIFT_NPQ_HIGH_TH_V1_8812F) & \ 6820 BIT_MASK_NPQ_HIGH_TH_V1_8812F) 6821 #define BIT_SET_NPQ_HIGH_TH_V1_8812F(x, v) \ 6822 (BIT_CLEAR_NPQ_HIGH_TH_V1_8812F(x) | BIT_NPQ_HIGH_TH_V1_8812F(v)) 6823 6824 #define BIT_SHIFT_NPQ_LOW_TH_V1_8812F 0 6825 #define BIT_MASK_NPQ_LOW_TH_V1_8812F 0xfff 6826 #define BIT_NPQ_LOW_TH_V1_8812F(x) \ 6827 (((x) & BIT_MASK_NPQ_LOW_TH_V1_8812F) << BIT_SHIFT_NPQ_LOW_TH_V1_8812F) 6828 #define BITS_NPQ_LOW_TH_V1_8812F \ 6829 (BIT_MASK_NPQ_LOW_TH_V1_8812F << BIT_SHIFT_NPQ_LOW_TH_V1_8812F) 6830 #define BIT_CLEAR_NPQ_LOW_TH_V1_8812F(x) ((x) & (~BITS_NPQ_LOW_TH_V1_8812F)) 6831 #define BIT_GET_NPQ_LOW_TH_V1_8812F(x) \ 6832 (((x) >> BIT_SHIFT_NPQ_LOW_TH_V1_8812F) & BIT_MASK_NPQ_LOW_TH_V1_8812F) 6833 #define BIT_SET_NPQ_LOW_TH_V1_8812F(x, v) \ 6834 (BIT_CLEAR_NPQ_LOW_TH_V1_8812F(x) | BIT_NPQ_LOW_TH_V1_8812F(v)) 6835 6836 /* 2 REG_TQPNT3_8812F */ 6837 #define BIT_LPQ_INT_EN_8812F BIT(31) 6838 6839 #define BIT_SHIFT_LPQ_HIGH_TH_V1_8812F 16 6840 #define BIT_MASK_LPQ_HIGH_TH_V1_8812F 0xfff 6841 #define BIT_LPQ_HIGH_TH_V1_8812F(x) \ 6842 (((x) & BIT_MASK_LPQ_HIGH_TH_V1_8812F) \ 6843 << BIT_SHIFT_LPQ_HIGH_TH_V1_8812F) 6844 #define BITS_LPQ_HIGH_TH_V1_8812F \ 6845 (BIT_MASK_LPQ_HIGH_TH_V1_8812F << BIT_SHIFT_LPQ_HIGH_TH_V1_8812F) 6846 #define BIT_CLEAR_LPQ_HIGH_TH_V1_8812F(x) ((x) & (~BITS_LPQ_HIGH_TH_V1_8812F)) 6847 #define BIT_GET_LPQ_HIGH_TH_V1_8812F(x) \ 6848 (((x) >> BIT_SHIFT_LPQ_HIGH_TH_V1_8812F) & \ 6849 BIT_MASK_LPQ_HIGH_TH_V1_8812F) 6850 #define BIT_SET_LPQ_HIGH_TH_V1_8812F(x, v) \ 6851 (BIT_CLEAR_LPQ_HIGH_TH_V1_8812F(x) | BIT_LPQ_HIGH_TH_V1_8812F(v)) 6852 6853 #define BIT_SHIFT_LPQ_LOW_TH_V1_8812F 0 6854 #define BIT_MASK_LPQ_LOW_TH_V1_8812F 0xfff 6855 #define BIT_LPQ_LOW_TH_V1_8812F(x) \ 6856 (((x) & BIT_MASK_LPQ_LOW_TH_V1_8812F) << BIT_SHIFT_LPQ_LOW_TH_V1_8812F) 6857 #define BITS_LPQ_LOW_TH_V1_8812F \ 6858 (BIT_MASK_LPQ_LOW_TH_V1_8812F << BIT_SHIFT_LPQ_LOW_TH_V1_8812F) 6859 #define BIT_CLEAR_LPQ_LOW_TH_V1_8812F(x) ((x) & (~BITS_LPQ_LOW_TH_V1_8812F)) 6860 #define BIT_GET_LPQ_LOW_TH_V1_8812F(x) \ 6861 (((x) >> BIT_SHIFT_LPQ_LOW_TH_V1_8812F) & BIT_MASK_LPQ_LOW_TH_V1_8812F) 6862 #define BIT_SET_LPQ_LOW_TH_V1_8812F(x, v) \ 6863 (BIT_CLEAR_LPQ_LOW_TH_V1_8812F(x) | BIT_LPQ_LOW_TH_V1_8812F(v)) 6864 6865 /* 2 REG_TQPNT4_8812F */ 6866 #define BIT_EXQ_INT_EN_8812F BIT(31) 6867 6868 #define BIT_SHIFT_EXQ_HIGH_TH_V1_8812F 16 6869 #define BIT_MASK_EXQ_HIGH_TH_V1_8812F 0xfff 6870 #define BIT_EXQ_HIGH_TH_V1_8812F(x) \ 6871 (((x) & BIT_MASK_EXQ_HIGH_TH_V1_8812F) \ 6872 << BIT_SHIFT_EXQ_HIGH_TH_V1_8812F) 6873 #define BITS_EXQ_HIGH_TH_V1_8812F \ 6874 (BIT_MASK_EXQ_HIGH_TH_V1_8812F << BIT_SHIFT_EXQ_HIGH_TH_V1_8812F) 6875 #define BIT_CLEAR_EXQ_HIGH_TH_V1_8812F(x) ((x) & (~BITS_EXQ_HIGH_TH_V1_8812F)) 6876 #define BIT_GET_EXQ_HIGH_TH_V1_8812F(x) \ 6877 (((x) >> BIT_SHIFT_EXQ_HIGH_TH_V1_8812F) & \ 6878 BIT_MASK_EXQ_HIGH_TH_V1_8812F) 6879 #define BIT_SET_EXQ_HIGH_TH_V1_8812F(x, v) \ 6880 (BIT_CLEAR_EXQ_HIGH_TH_V1_8812F(x) | BIT_EXQ_HIGH_TH_V1_8812F(v)) 6881 6882 #define BIT_SHIFT_EXQ_LOW_TH_V1_8812F 0 6883 #define BIT_MASK_EXQ_LOW_TH_V1_8812F 0xfff 6884 #define BIT_EXQ_LOW_TH_V1_8812F(x) \ 6885 (((x) & BIT_MASK_EXQ_LOW_TH_V1_8812F) << BIT_SHIFT_EXQ_LOW_TH_V1_8812F) 6886 #define BITS_EXQ_LOW_TH_V1_8812F \ 6887 (BIT_MASK_EXQ_LOW_TH_V1_8812F << BIT_SHIFT_EXQ_LOW_TH_V1_8812F) 6888 #define BIT_CLEAR_EXQ_LOW_TH_V1_8812F(x) ((x) & (~BITS_EXQ_LOW_TH_V1_8812F)) 6889 #define BIT_GET_EXQ_LOW_TH_V1_8812F(x) \ 6890 (((x) >> BIT_SHIFT_EXQ_LOW_TH_V1_8812F) & BIT_MASK_EXQ_LOW_TH_V1_8812F) 6891 #define BIT_SET_EXQ_LOW_TH_V1_8812F(x, v) \ 6892 (BIT_CLEAR_EXQ_LOW_TH_V1_8812F(x) | BIT_EXQ_LOW_TH_V1_8812F(v)) 6893 6894 /* 2 REG_RQPN_CTRL_1_8812F */ 6895 6896 #define BIT_SHIFT_TXPKTNUM_H_V2_8812F 16 6897 #define BIT_MASK_TXPKTNUM_H_V2_8812F 0xfff 6898 #define BIT_TXPKTNUM_H_V2_8812F(x) \ 6899 (((x) & BIT_MASK_TXPKTNUM_H_V2_8812F) << BIT_SHIFT_TXPKTNUM_H_V2_8812F) 6900 #define BITS_TXPKTNUM_H_V2_8812F \ 6901 (BIT_MASK_TXPKTNUM_H_V2_8812F << BIT_SHIFT_TXPKTNUM_H_V2_8812F) 6902 #define BIT_CLEAR_TXPKTNUM_H_V2_8812F(x) ((x) & (~BITS_TXPKTNUM_H_V2_8812F)) 6903 #define BIT_GET_TXPKTNUM_H_V2_8812F(x) \ 6904 (((x) >> BIT_SHIFT_TXPKTNUM_H_V2_8812F) & BIT_MASK_TXPKTNUM_H_V2_8812F) 6905 #define BIT_SET_TXPKTNUM_H_V2_8812F(x, v) \ 6906 (BIT_CLEAR_TXPKTNUM_H_V2_8812F(x) | BIT_TXPKTNUM_H_V2_8812F(v)) 6907 6908 #define BIT_SHIFT_TXPKTNUM_V3_8812F 0 6909 #define BIT_MASK_TXPKTNUM_V3_8812F 0xfff 6910 #define BIT_TXPKTNUM_V3_8812F(x) \ 6911 (((x) & BIT_MASK_TXPKTNUM_V3_8812F) << BIT_SHIFT_TXPKTNUM_V3_8812F) 6912 #define BITS_TXPKTNUM_V3_8812F \ 6913 (BIT_MASK_TXPKTNUM_V3_8812F << BIT_SHIFT_TXPKTNUM_V3_8812F) 6914 #define BIT_CLEAR_TXPKTNUM_V3_8812F(x) ((x) & (~BITS_TXPKTNUM_V3_8812F)) 6915 #define BIT_GET_TXPKTNUM_V3_8812F(x) \ 6916 (((x) >> BIT_SHIFT_TXPKTNUM_V3_8812F) & BIT_MASK_TXPKTNUM_V3_8812F) 6917 #define BIT_SET_TXPKTNUM_V3_8812F(x, v) \ 6918 (BIT_CLEAR_TXPKTNUM_V3_8812F(x) | BIT_TXPKTNUM_V3_8812F(v)) 6919 6920 /* 2 REG_RQPN_CTRL_2_8812F */ 6921 #define BIT_LD_RQPN_8812F BIT(31) 6922 #define BIT_EXQ_PUBLIC_DIS_V1_8812F BIT(19) 6923 #define BIT_NPQ_PUBLIC_DIS_V1_8812F BIT(18) 6924 #define BIT_LPQ_PUBLIC_DIS_V1_8812F BIT(17) 6925 #define BIT_HPQ_PUBLIC_DIS_V1_8812F BIT(16) 6926 #define BIT_SDIO_TXAGG_ALIGN_ADJUST_EN_8812F BIT(15) 6927 6928 #define BIT_SHIFT_SDIO_TXAGG_ALIGN_SIZE_8812F 0 6929 #define BIT_MASK_SDIO_TXAGG_ALIGN_SIZE_8812F 0xfff 6930 #define BIT_SDIO_TXAGG_ALIGN_SIZE_8812F(x) \ 6931 (((x) & BIT_MASK_SDIO_TXAGG_ALIGN_SIZE_8812F) \ 6932 << BIT_SHIFT_SDIO_TXAGG_ALIGN_SIZE_8812F) 6933 #define BITS_SDIO_TXAGG_ALIGN_SIZE_8812F \ 6934 (BIT_MASK_SDIO_TXAGG_ALIGN_SIZE_8812F \ 6935 << BIT_SHIFT_SDIO_TXAGG_ALIGN_SIZE_8812F) 6936 #define BIT_CLEAR_SDIO_TXAGG_ALIGN_SIZE_8812F(x) \ 6937 ((x) & (~BITS_SDIO_TXAGG_ALIGN_SIZE_8812F)) 6938 #define BIT_GET_SDIO_TXAGG_ALIGN_SIZE_8812F(x) \ 6939 (((x) >> BIT_SHIFT_SDIO_TXAGG_ALIGN_SIZE_8812F) & \ 6940 BIT_MASK_SDIO_TXAGG_ALIGN_SIZE_8812F) 6941 #define BIT_SET_SDIO_TXAGG_ALIGN_SIZE_8812F(x, v) \ 6942 (BIT_CLEAR_SDIO_TXAGG_ALIGN_SIZE_8812F(x) | \ 6943 BIT_SDIO_TXAGG_ALIGN_SIZE_8812F(v)) 6944 6945 /* 2 REG_FIFOPAGE_INFO_1_8812F */ 6946 6947 #define BIT_SHIFT_HPQ_AVAL_PG_V1_8812F 16 6948 #define BIT_MASK_HPQ_AVAL_PG_V1_8812F 0xfff 6949 #define BIT_HPQ_AVAL_PG_V1_8812F(x) \ 6950 (((x) & BIT_MASK_HPQ_AVAL_PG_V1_8812F) \ 6951 << BIT_SHIFT_HPQ_AVAL_PG_V1_8812F) 6952 #define BITS_HPQ_AVAL_PG_V1_8812F \ 6953 (BIT_MASK_HPQ_AVAL_PG_V1_8812F << BIT_SHIFT_HPQ_AVAL_PG_V1_8812F) 6954 #define BIT_CLEAR_HPQ_AVAL_PG_V1_8812F(x) ((x) & (~BITS_HPQ_AVAL_PG_V1_8812F)) 6955 #define BIT_GET_HPQ_AVAL_PG_V1_8812F(x) \ 6956 (((x) >> BIT_SHIFT_HPQ_AVAL_PG_V1_8812F) & \ 6957 BIT_MASK_HPQ_AVAL_PG_V1_8812F) 6958 #define BIT_SET_HPQ_AVAL_PG_V1_8812F(x, v) \ 6959 (BIT_CLEAR_HPQ_AVAL_PG_V1_8812F(x) | BIT_HPQ_AVAL_PG_V1_8812F(v)) 6960 6961 #define BIT_SHIFT_HPQ_V1_8812F 0 6962 #define BIT_MASK_HPQ_V1_8812F 0xfff 6963 #define BIT_HPQ_V1_8812F(x) \ 6964 (((x) & BIT_MASK_HPQ_V1_8812F) << BIT_SHIFT_HPQ_V1_8812F) 6965 #define BITS_HPQ_V1_8812F (BIT_MASK_HPQ_V1_8812F << BIT_SHIFT_HPQ_V1_8812F) 6966 #define BIT_CLEAR_HPQ_V1_8812F(x) ((x) & (~BITS_HPQ_V1_8812F)) 6967 #define BIT_GET_HPQ_V1_8812F(x) \ 6968 (((x) >> BIT_SHIFT_HPQ_V1_8812F) & BIT_MASK_HPQ_V1_8812F) 6969 #define BIT_SET_HPQ_V1_8812F(x, v) \ 6970 (BIT_CLEAR_HPQ_V1_8812F(x) | BIT_HPQ_V1_8812F(v)) 6971 6972 /* 2 REG_FIFOPAGE_INFO_2_8812F */ 6973 6974 #define BIT_SHIFT_LPQ_AVAL_PG_V1_8812F 16 6975 #define BIT_MASK_LPQ_AVAL_PG_V1_8812F 0xfff 6976 #define BIT_LPQ_AVAL_PG_V1_8812F(x) \ 6977 (((x) & BIT_MASK_LPQ_AVAL_PG_V1_8812F) \ 6978 << BIT_SHIFT_LPQ_AVAL_PG_V1_8812F) 6979 #define BITS_LPQ_AVAL_PG_V1_8812F \ 6980 (BIT_MASK_LPQ_AVAL_PG_V1_8812F << BIT_SHIFT_LPQ_AVAL_PG_V1_8812F) 6981 #define BIT_CLEAR_LPQ_AVAL_PG_V1_8812F(x) ((x) & (~BITS_LPQ_AVAL_PG_V1_8812F)) 6982 #define BIT_GET_LPQ_AVAL_PG_V1_8812F(x) \ 6983 (((x) >> BIT_SHIFT_LPQ_AVAL_PG_V1_8812F) & \ 6984 BIT_MASK_LPQ_AVAL_PG_V1_8812F) 6985 #define BIT_SET_LPQ_AVAL_PG_V1_8812F(x, v) \ 6986 (BIT_CLEAR_LPQ_AVAL_PG_V1_8812F(x) | BIT_LPQ_AVAL_PG_V1_8812F(v)) 6987 6988 #define BIT_SHIFT_LPQ_V1_8812F 0 6989 #define BIT_MASK_LPQ_V1_8812F 0xfff 6990 #define BIT_LPQ_V1_8812F(x) \ 6991 (((x) & BIT_MASK_LPQ_V1_8812F) << BIT_SHIFT_LPQ_V1_8812F) 6992 #define BITS_LPQ_V1_8812F (BIT_MASK_LPQ_V1_8812F << BIT_SHIFT_LPQ_V1_8812F) 6993 #define BIT_CLEAR_LPQ_V1_8812F(x) ((x) & (~BITS_LPQ_V1_8812F)) 6994 #define BIT_GET_LPQ_V1_8812F(x) \ 6995 (((x) >> BIT_SHIFT_LPQ_V1_8812F) & BIT_MASK_LPQ_V1_8812F) 6996 #define BIT_SET_LPQ_V1_8812F(x, v) \ 6997 (BIT_CLEAR_LPQ_V1_8812F(x) | BIT_LPQ_V1_8812F(v)) 6998 6999 /* 2 REG_FIFOPAGE_INFO_3_8812F */ 7000 7001 #define BIT_SHIFT_NPQ_AVAL_PG_V1_8812F 16 7002 #define BIT_MASK_NPQ_AVAL_PG_V1_8812F 0xfff 7003 #define BIT_NPQ_AVAL_PG_V1_8812F(x) \ 7004 (((x) & BIT_MASK_NPQ_AVAL_PG_V1_8812F) \ 7005 << BIT_SHIFT_NPQ_AVAL_PG_V1_8812F) 7006 #define BITS_NPQ_AVAL_PG_V1_8812F \ 7007 (BIT_MASK_NPQ_AVAL_PG_V1_8812F << BIT_SHIFT_NPQ_AVAL_PG_V1_8812F) 7008 #define BIT_CLEAR_NPQ_AVAL_PG_V1_8812F(x) ((x) & (~BITS_NPQ_AVAL_PG_V1_8812F)) 7009 #define BIT_GET_NPQ_AVAL_PG_V1_8812F(x) \ 7010 (((x) >> BIT_SHIFT_NPQ_AVAL_PG_V1_8812F) & \ 7011 BIT_MASK_NPQ_AVAL_PG_V1_8812F) 7012 #define BIT_SET_NPQ_AVAL_PG_V1_8812F(x, v) \ 7013 (BIT_CLEAR_NPQ_AVAL_PG_V1_8812F(x) | BIT_NPQ_AVAL_PG_V1_8812F(v)) 7014 7015 #define BIT_SHIFT_NPQ_V1_8812F 0 7016 #define BIT_MASK_NPQ_V1_8812F 0xfff 7017 #define BIT_NPQ_V1_8812F(x) \ 7018 (((x) & BIT_MASK_NPQ_V1_8812F) << BIT_SHIFT_NPQ_V1_8812F) 7019 #define BITS_NPQ_V1_8812F (BIT_MASK_NPQ_V1_8812F << BIT_SHIFT_NPQ_V1_8812F) 7020 #define BIT_CLEAR_NPQ_V1_8812F(x) ((x) & (~BITS_NPQ_V1_8812F)) 7021 #define BIT_GET_NPQ_V1_8812F(x) \ 7022 (((x) >> BIT_SHIFT_NPQ_V1_8812F) & BIT_MASK_NPQ_V1_8812F) 7023 #define BIT_SET_NPQ_V1_8812F(x, v) \ 7024 (BIT_CLEAR_NPQ_V1_8812F(x) | BIT_NPQ_V1_8812F(v)) 7025 7026 /* 2 REG_FIFOPAGE_INFO_4_8812F */ 7027 7028 #define BIT_SHIFT_EXQ_AVAL_PG_V1_8812F 16 7029 #define BIT_MASK_EXQ_AVAL_PG_V1_8812F 0xfff 7030 #define BIT_EXQ_AVAL_PG_V1_8812F(x) \ 7031 (((x) & BIT_MASK_EXQ_AVAL_PG_V1_8812F) \ 7032 << BIT_SHIFT_EXQ_AVAL_PG_V1_8812F) 7033 #define BITS_EXQ_AVAL_PG_V1_8812F \ 7034 (BIT_MASK_EXQ_AVAL_PG_V1_8812F << BIT_SHIFT_EXQ_AVAL_PG_V1_8812F) 7035 #define BIT_CLEAR_EXQ_AVAL_PG_V1_8812F(x) ((x) & (~BITS_EXQ_AVAL_PG_V1_8812F)) 7036 #define BIT_GET_EXQ_AVAL_PG_V1_8812F(x) \ 7037 (((x) >> BIT_SHIFT_EXQ_AVAL_PG_V1_8812F) & \ 7038 BIT_MASK_EXQ_AVAL_PG_V1_8812F) 7039 #define BIT_SET_EXQ_AVAL_PG_V1_8812F(x, v) \ 7040 (BIT_CLEAR_EXQ_AVAL_PG_V1_8812F(x) | BIT_EXQ_AVAL_PG_V1_8812F(v)) 7041 7042 #define BIT_SHIFT_EXQ_V1_8812F 0 7043 #define BIT_MASK_EXQ_V1_8812F 0xfff 7044 #define BIT_EXQ_V1_8812F(x) \ 7045 (((x) & BIT_MASK_EXQ_V1_8812F) << BIT_SHIFT_EXQ_V1_8812F) 7046 #define BITS_EXQ_V1_8812F (BIT_MASK_EXQ_V1_8812F << BIT_SHIFT_EXQ_V1_8812F) 7047 #define BIT_CLEAR_EXQ_V1_8812F(x) ((x) & (~BITS_EXQ_V1_8812F)) 7048 #define BIT_GET_EXQ_V1_8812F(x) \ 7049 (((x) >> BIT_SHIFT_EXQ_V1_8812F) & BIT_MASK_EXQ_V1_8812F) 7050 #define BIT_SET_EXQ_V1_8812F(x, v) \ 7051 (BIT_CLEAR_EXQ_V1_8812F(x) | BIT_EXQ_V1_8812F(v)) 7052 7053 /* 2 REG_FIFOPAGE_INFO_5_8812F */ 7054 7055 #define BIT_SHIFT_PUBQ_AVAL_PG_V1_8812F 16 7056 #define BIT_MASK_PUBQ_AVAL_PG_V1_8812F 0xfff 7057 #define BIT_PUBQ_AVAL_PG_V1_8812F(x) \ 7058 (((x) & BIT_MASK_PUBQ_AVAL_PG_V1_8812F) \ 7059 << BIT_SHIFT_PUBQ_AVAL_PG_V1_8812F) 7060 #define BITS_PUBQ_AVAL_PG_V1_8812F \ 7061 (BIT_MASK_PUBQ_AVAL_PG_V1_8812F << BIT_SHIFT_PUBQ_AVAL_PG_V1_8812F) 7062 #define BIT_CLEAR_PUBQ_AVAL_PG_V1_8812F(x) ((x) & (~BITS_PUBQ_AVAL_PG_V1_8812F)) 7063 #define BIT_GET_PUBQ_AVAL_PG_V1_8812F(x) \ 7064 (((x) >> BIT_SHIFT_PUBQ_AVAL_PG_V1_8812F) & \ 7065 BIT_MASK_PUBQ_AVAL_PG_V1_8812F) 7066 #define BIT_SET_PUBQ_AVAL_PG_V1_8812F(x, v) \ 7067 (BIT_CLEAR_PUBQ_AVAL_PG_V1_8812F(x) | BIT_PUBQ_AVAL_PG_V1_8812F(v)) 7068 7069 #define BIT_SHIFT_PUBQ_V1_8812F 0 7070 #define BIT_MASK_PUBQ_V1_8812F 0xfff 7071 #define BIT_PUBQ_V1_8812F(x) \ 7072 (((x) & BIT_MASK_PUBQ_V1_8812F) << BIT_SHIFT_PUBQ_V1_8812F) 7073 #define BITS_PUBQ_V1_8812F (BIT_MASK_PUBQ_V1_8812F << BIT_SHIFT_PUBQ_V1_8812F) 7074 #define BIT_CLEAR_PUBQ_V1_8812F(x) ((x) & (~BITS_PUBQ_V1_8812F)) 7075 #define BIT_GET_PUBQ_V1_8812F(x) \ 7076 (((x) >> BIT_SHIFT_PUBQ_V1_8812F) & BIT_MASK_PUBQ_V1_8812F) 7077 #define BIT_SET_PUBQ_V1_8812F(x, v) \ 7078 (BIT_CLEAR_PUBQ_V1_8812F(x) | BIT_PUBQ_V1_8812F(v)) 7079 7080 /* 2 REG_H2C_HEAD_8812F */ 7081 7082 #define BIT_SHIFT_H2C_HEAD_8812F 0 7083 #define BIT_MASK_H2C_HEAD_8812F 0x3ffff 7084 #define BIT_H2C_HEAD_8812F(x) \ 7085 (((x) & BIT_MASK_H2C_HEAD_8812F) << BIT_SHIFT_H2C_HEAD_8812F) 7086 #define BITS_H2C_HEAD_8812F \ 7087 (BIT_MASK_H2C_HEAD_8812F << BIT_SHIFT_H2C_HEAD_8812F) 7088 #define BIT_CLEAR_H2C_HEAD_8812F(x) ((x) & (~BITS_H2C_HEAD_8812F)) 7089 #define BIT_GET_H2C_HEAD_8812F(x) \ 7090 (((x) >> BIT_SHIFT_H2C_HEAD_8812F) & BIT_MASK_H2C_HEAD_8812F) 7091 #define BIT_SET_H2C_HEAD_8812F(x, v) \ 7092 (BIT_CLEAR_H2C_HEAD_8812F(x) | BIT_H2C_HEAD_8812F(v)) 7093 7094 /* 2 REG_H2C_TAIL_8812F */ 7095 7096 #define BIT_SHIFT_H2C_TAIL_8812F 0 7097 #define BIT_MASK_H2C_TAIL_8812F 0x3ffff 7098 #define BIT_H2C_TAIL_8812F(x) \ 7099 (((x) & BIT_MASK_H2C_TAIL_8812F) << BIT_SHIFT_H2C_TAIL_8812F) 7100 #define BITS_H2C_TAIL_8812F \ 7101 (BIT_MASK_H2C_TAIL_8812F << BIT_SHIFT_H2C_TAIL_8812F) 7102 #define BIT_CLEAR_H2C_TAIL_8812F(x) ((x) & (~BITS_H2C_TAIL_8812F)) 7103 #define BIT_GET_H2C_TAIL_8812F(x) \ 7104 (((x) >> BIT_SHIFT_H2C_TAIL_8812F) & BIT_MASK_H2C_TAIL_8812F) 7105 #define BIT_SET_H2C_TAIL_8812F(x, v) \ 7106 (BIT_CLEAR_H2C_TAIL_8812F(x) | BIT_H2C_TAIL_8812F(v)) 7107 7108 /* 2 REG_H2C_READ_ADDR_8812F */ 7109 7110 #define BIT_SHIFT_H2C_READ_ADDR_8812F 0 7111 #define BIT_MASK_H2C_READ_ADDR_8812F 0x3ffff 7112 #define BIT_H2C_READ_ADDR_8812F(x) \ 7113 (((x) & BIT_MASK_H2C_READ_ADDR_8812F) << BIT_SHIFT_H2C_READ_ADDR_8812F) 7114 #define BITS_H2C_READ_ADDR_8812F \ 7115 (BIT_MASK_H2C_READ_ADDR_8812F << BIT_SHIFT_H2C_READ_ADDR_8812F) 7116 #define BIT_CLEAR_H2C_READ_ADDR_8812F(x) ((x) & (~BITS_H2C_READ_ADDR_8812F)) 7117 #define BIT_GET_H2C_READ_ADDR_8812F(x) \ 7118 (((x) >> BIT_SHIFT_H2C_READ_ADDR_8812F) & BIT_MASK_H2C_READ_ADDR_8812F) 7119 #define BIT_SET_H2C_READ_ADDR_8812F(x, v) \ 7120 (BIT_CLEAR_H2C_READ_ADDR_8812F(x) | BIT_H2C_READ_ADDR_8812F(v)) 7121 7122 /* 2 REG_H2C_WR_ADDR_8812F */ 7123 7124 #define BIT_SHIFT_H2C_WR_ADDR_8812F 0 7125 #define BIT_MASK_H2C_WR_ADDR_8812F 0x3ffff 7126 #define BIT_H2C_WR_ADDR_8812F(x) \ 7127 (((x) & BIT_MASK_H2C_WR_ADDR_8812F) << BIT_SHIFT_H2C_WR_ADDR_8812F) 7128 #define BITS_H2C_WR_ADDR_8812F \ 7129 (BIT_MASK_H2C_WR_ADDR_8812F << BIT_SHIFT_H2C_WR_ADDR_8812F) 7130 #define BIT_CLEAR_H2C_WR_ADDR_8812F(x) ((x) & (~BITS_H2C_WR_ADDR_8812F)) 7131 #define BIT_GET_H2C_WR_ADDR_8812F(x) \ 7132 (((x) >> BIT_SHIFT_H2C_WR_ADDR_8812F) & BIT_MASK_H2C_WR_ADDR_8812F) 7133 #define BIT_SET_H2C_WR_ADDR_8812F(x, v) \ 7134 (BIT_CLEAR_H2C_WR_ADDR_8812F(x) | BIT_H2C_WR_ADDR_8812F(v)) 7135 7136 /* 2 REG_H2C_INFO_8812F */ 7137 #define BIT_H2C_SPACE_VLD_8812F BIT(3) 7138 #define BIT_H2C_WR_ADDR_RST_8812F BIT(2) 7139 7140 #define BIT_SHIFT_H2C_LEN_SEL_8812F 0 7141 #define BIT_MASK_H2C_LEN_SEL_8812F 0x3 7142 #define BIT_H2C_LEN_SEL_8812F(x) \ 7143 (((x) & BIT_MASK_H2C_LEN_SEL_8812F) << BIT_SHIFT_H2C_LEN_SEL_8812F) 7144 #define BITS_H2C_LEN_SEL_8812F \ 7145 (BIT_MASK_H2C_LEN_SEL_8812F << BIT_SHIFT_H2C_LEN_SEL_8812F) 7146 #define BIT_CLEAR_H2C_LEN_SEL_8812F(x) ((x) & (~BITS_H2C_LEN_SEL_8812F)) 7147 #define BIT_GET_H2C_LEN_SEL_8812F(x) \ 7148 (((x) >> BIT_SHIFT_H2C_LEN_SEL_8812F) & BIT_MASK_H2C_LEN_SEL_8812F) 7149 #define BIT_SET_H2C_LEN_SEL_8812F(x, v) \ 7150 (BIT_CLEAR_H2C_LEN_SEL_8812F(x) | BIT_H2C_LEN_SEL_8812F(v)) 7151 7152 /* 2 REG_PGSUB_CNT_8812F */ 7153 7154 /* 2 REG_NOT_VALID_8812F */ 7155 #define BIT_RST_PGSUB_CNT_8812F BIT(1) 7156 #define BIT_PGSUB_CNT_EN_8812F BIT(0) 7157 7158 /* 2 REG_PGSUB_H_8812F */ 7159 7160 #define BIT_SHIFT_HPQ_PGSUB_CNT_8812F 0 7161 #define BIT_MASK_HPQ_PGSUB_CNT_8812F 0xffffffffL 7162 #define BIT_HPQ_PGSUB_CNT_8812F(x) \ 7163 (((x) & BIT_MASK_HPQ_PGSUB_CNT_8812F) << BIT_SHIFT_HPQ_PGSUB_CNT_8812F) 7164 #define BITS_HPQ_PGSUB_CNT_8812F \ 7165 (BIT_MASK_HPQ_PGSUB_CNT_8812F << BIT_SHIFT_HPQ_PGSUB_CNT_8812F) 7166 #define BIT_CLEAR_HPQ_PGSUB_CNT_8812F(x) ((x) & (~BITS_HPQ_PGSUB_CNT_8812F)) 7167 #define BIT_GET_HPQ_PGSUB_CNT_8812F(x) \ 7168 (((x) >> BIT_SHIFT_HPQ_PGSUB_CNT_8812F) & BIT_MASK_HPQ_PGSUB_CNT_8812F) 7169 #define BIT_SET_HPQ_PGSUB_CNT_8812F(x, v) \ 7170 (BIT_CLEAR_HPQ_PGSUB_CNT_8812F(x) | BIT_HPQ_PGSUB_CNT_8812F(v)) 7171 7172 /* 2 REG_PGSUB_N_8812F */ 7173 7174 #define BIT_SHIFT_NPQ_PGSUB_CNT_8812F 0 7175 #define BIT_MASK_NPQ_PGSUB_CNT_8812F 0xffffffffL 7176 #define BIT_NPQ_PGSUB_CNT_8812F(x) \ 7177 (((x) & BIT_MASK_NPQ_PGSUB_CNT_8812F) << BIT_SHIFT_NPQ_PGSUB_CNT_8812F) 7178 #define BITS_NPQ_PGSUB_CNT_8812F \ 7179 (BIT_MASK_NPQ_PGSUB_CNT_8812F << BIT_SHIFT_NPQ_PGSUB_CNT_8812F) 7180 #define BIT_CLEAR_NPQ_PGSUB_CNT_8812F(x) ((x) & (~BITS_NPQ_PGSUB_CNT_8812F)) 7181 #define BIT_GET_NPQ_PGSUB_CNT_8812F(x) \ 7182 (((x) >> BIT_SHIFT_NPQ_PGSUB_CNT_8812F) & BIT_MASK_NPQ_PGSUB_CNT_8812F) 7183 #define BIT_SET_NPQ_PGSUB_CNT_8812F(x, v) \ 7184 (BIT_CLEAR_NPQ_PGSUB_CNT_8812F(x) | BIT_NPQ_PGSUB_CNT_8812F(v)) 7185 7186 /* 2 REG_PGSUB_L_8812F */ 7187 7188 #define BIT_SHIFT_LPQ_PGSUB_CNT_8812F 0 7189 #define BIT_MASK_LPQ_PGSUB_CNT_8812F 0xffffffffL 7190 #define BIT_LPQ_PGSUB_CNT_8812F(x) \ 7191 (((x) & BIT_MASK_LPQ_PGSUB_CNT_8812F) << BIT_SHIFT_LPQ_PGSUB_CNT_8812F) 7192 #define BITS_LPQ_PGSUB_CNT_8812F \ 7193 (BIT_MASK_LPQ_PGSUB_CNT_8812F << BIT_SHIFT_LPQ_PGSUB_CNT_8812F) 7194 #define BIT_CLEAR_LPQ_PGSUB_CNT_8812F(x) ((x) & (~BITS_LPQ_PGSUB_CNT_8812F)) 7195 #define BIT_GET_LPQ_PGSUB_CNT_8812F(x) \ 7196 (((x) >> BIT_SHIFT_LPQ_PGSUB_CNT_8812F) & BIT_MASK_LPQ_PGSUB_CNT_8812F) 7197 #define BIT_SET_LPQ_PGSUB_CNT_8812F(x, v) \ 7198 (BIT_CLEAR_LPQ_PGSUB_CNT_8812F(x) | BIT_LPQ_PGSUB_CNT_8812F(v)) 7199 7200 /* 2 REG_PGSUB_E_8812F */ 7201 7202 #define BIT_SHIFT_EPQ_PGSUB_CNT_8812F 0 7203 #define BIT_MASK_EPQ_PGSUB_CNT_8812F 0xffffffffL 7204 #define BIT_EPQ_PGSUB_CNT_8812F(x) \ 7205 (((x) & BIT_MASK_EPQ_PGSUB_CNT_8812F) << BIT_SHIFT_EPQ_PGSUB_CNT_8812F) 7206 #define BITS_EPQ_PGSUB_CNT_8812F \ 7207 (BIT_MASK_EPQ_PGSUB_CNT_8812F << BIT_SHIFT_EPQ_PGSUB_CNT_8812F) 7208 #define BIT_CLEAR_EPQ_PGSUB_CNT_8812F(x) ((x) & (~BITS_EPQ_PGSUB_CNT_8812F)) 7209 #define BIT_GET_EPQ_PGSUB_CNT_8812F(x) \ 7210 (((x) >> BIT_SHIFT_EPQ_PGSUB_CNT_8812F) & BIT_MASK_EPQ_PGSUB_CNT_8812F) 7211 #define BIT_SET_EPQ_PGSUB_CNT_8812F(x, v) \ 7212 (BIT_CLEAR_EPQ_PGSUB_CNT_8812F(x) | BIT_EPQ_PGSUB_CNT_8812F(v)) 7213 7214 /* 2 REG_RXDMA_AGG_PG_TH_8812F */ 7215 #define BIT_USB_RXDMA_AGG_EN_8812F BIT(31) 7216 #define BIT_EN_FW_ADD_8812F BIT(30) 7217 #define BIT_EN_PRE_CALC_8812F BIT(29) 7218 #define BIT_RXAGG_SW_EN_8812F BIT(28) 7219 #define BIT_RXAGG_SW_TRIG_8812F BIT(27) 7220 7221 /* 2 REG_NOT_VALID_8812F */ 7222 7223 #define BIT_SHIFT_DMA_AGG_TO_V1_8812F 8 7224 #define BIT_MASK_DMA_AGG_TO_V1_8812F 0xff 7225 #define BIT_DMA_AGG_TO_V1_8812F(x) \ 7226 (((x) & BIT_MASK_DMA_AGG_TO_V1_8812F) << BIT_SHIFT_DMA_AGG_TO_V1_8812F) 7227 #define BITS_DMA_AGG_TO_V1_8812F \ 7228 (BIT_MASK_DMA_AGG_TO_V1_8812F << BIT_SHIFT_DMA_AGG_TO_V1_8812F) 7229 #define BIT_CLEAR_DMA_AGG_TO_V1_8812F(x) ((x) & (~BITS_DMA_AGG_TO_V1_8812F)) 7230 #define BIT_GET_DMA_AGG_TO_V1_8812F(x) \ 7231 (((x) >> BIT_SHIFT_DMA_AGG_TO_V1_8812F) & BIT_MASK_DMA_AGG_TO_V1_8812F) 7232 #define BIT_SET_DMA_AGG_TO_V1_8812F(x, v) \ 7233 (BIT_CLEAR_DMA_AGG_TO_V1_8812F(x) | BIT_DMA_AGG_TO_V1_8812F(v)) 7234 7235 #define BIT_SHIFT_RXDMA_AGG_PG_TH_8812F 0 7236 #define BIT_MASK_RXDMA_AGG_PG_TH_8812F 0xff 7237 #define BIT_RXDMA_AGG_PG_TH_8812F(x) \ 7238 (((x) & BIT_MASK_RXDMA_AGG_PG_TH_8812F) \ 7239 << BIT_SHIFT_RXDMA_AGG_PG_TH_8812F) 7240 #define BITS_RXDMA_AGG_PG_TH_8812F \ 7241 (BIT_MASK_RXDMA_AGG_PG_TH_8812F << BIT_SHIFT_RXDMA_AGG_PG_TH_8812F) 7242 #define BIT_CLEAR_RXDMA_AGG_PG_TH_8812F(x) ((x) & (~BITS_RXDMA_AGG_PG_TH_8812F)) 7243 #define BIT_GET_RXDMA_AGG_PG_TH_8812F(x) \ 7244 (((x) >> BIT_SHIFT_RXDMA_AGG_PG_TH_8812F) & \ 7245 BIT_MASK_RXDMA_AGG_PG_TH_8812F) 7246 #define BIT_SET_RXDMA_AGG_PG_TH_8812F(x, v) \ 7247 (BIT_CLEAR_RXDMA_AGG_PG_TH_8812F(x) | BIT_RXDMA_AGG_PG_TH_8812F(v)) 7248 7249 /* 2 REG_RXPKT_NUM_8812F */ 7250 7251 /* 2 REG_NOT_VALID_8812F */ 7252 7253 #define BIT_SHIFT_FW_UPD_RDPTR19_TO_16_8812F 20 7254 #define BIT_MASK_FW_UPD_RDPTR19_TO_16_8812F 0xf 7255 #define BIT_FW_UPD_RDPTR19_TO_16_8812F(x) \ 7256 (((x) & BIT_MASK_FW_UPD_RDPTR19_TO_16_8812F) \ 7257 << BIT_SHIFT_FW_UPD_RDPTR19_TO_16_8812F) 7258 #define BITS_FW_UPD_RDPTR19_TO_16_8812F \ 7259 (BIT_MASK_FW_UPD_RDPTR19_TO_16_8812F \ 7260 << BIT_SHIFT_FW_UPD_RDPTR19_TO_16_8812F) 7261 #define BIT_CLEAR_FW_UPD_RDPTR19_TO_16_8812F(x) \ 7262 ((x) & (~BITS_FW_UPD_RDPTR19_TO_16_8812F)) 7263 #define BIT_GET_FW_UPD_RDPTR19_TO_16_8812F(x) \ 7264 (((x) >> BIT_SHIFT_FW_UPD_RDPTR19_TO_16_8812F) & \ 7265 BIT_MASK_FW_UPD_RDPTR19_TO_16_8812F) 7266 #define BIT_SET_FW_UPD_RDPTR19_TO_16_8812F(x, v) \ 7267 (BIT_CLEAR_FW_UPD_RDPTR19_TO_16_8812F(x) | \ 7268 BIT_FW_UPD_RDPTR19_TO_16_8812F(v)) 7269 7270 #define BIT_RXDMA_REQ_8812F BIT(19) 7271 #define BIT_RW_RELEASE_EN_8812F BIT(18) 7272 #define BIT_RXDMA_IDLE_8812F BIT(17) 7273 #define BIT_RXPKT_RELEASE_POLL_8812F BIT(16) 7274 7275 #define BIT_SHIFT_FW_UPD_RDPTR_8812F 0 7276 #define BIT_MASK_FW_UPD_RDPTR_8812F 0xffff 7277 #define BIT_FW_UPD_RDPTR_8812F(x) \ 7278 (((x) & BIT_MASK_FW_UPD_RDPTR_8812F) << BIT_SHIFT_FW_UPD_RDPTR_8812F) 7279 #define BITS_FW_UPD_RDPTR_8812F \ 7280 (BIT_MASK_FW_UPD_RDPTR_8812F << BIT_SHIFT_FW_UPD_RDPTR_8812F) 7281 #define BIT_CLEAR_FW_UPD_RDPTR_8812F(x) ((x) & (~BITS_FW_UPD_RDPTR_8812F)) 7282 #define BIT_GET_FW_UPD_RDPTR_8812F(x) \ 7283 (((x) >> BIT_SHIFT_FW_UPD_RDPTR_8812F) & BIT_MASK_FW_UPD_RDPTR_8812F) 7284 #define BIT_SET_FW_UPD_RDPTR_8812F(x, v) \ 7285 (BIT_CLEAR_FW_UPD_RDPTR_8812F(x) | BIT_FW_UPD_RDPTR_8812F(v)) 7286 7287 /* 2 REG_RXDMA_STATUS_8812F */ 7288 #define BIT_C2H_PKT_OVF_8812F BIT(7) 7289 #define BIT_AGG_CONFGI_ISSUE_8812F BIT(6) 7290 #define BIT_FW_POLL_ISSUE_8812F BIT(5) 7291 #define BIT_RX_DATA_UDN_8812F BIT(4) 7292 #define BIT_RX_SFF_UDN_8812F BIT(3) 7293 #define BIT_RX_SFF_OVF_8812F BIT(2) 7294 #define BIT_RXPKT_OVF_8812F BIT(0) 7295 7296 /* 2 REG_RXDMA_DPR_8812F */ 7297 7298 #define BIT_SHIFT_RDE_DEBUG_8812F 0 7299 #define BIT_MASK_RDE_DEBUG_8812F 0xffffffffL 7300 #define BIT_RDE_DEBUG_8812F(x) \ 7301 (((x) & BIT_MASK_RDE_DEBUG_8812F) << BIT_SHIFT_RDE_DEBUG_8812F) 7302 #define BITS_RDE_DEBUG_8812F \ 7303 (BIT_MASK_RDE_DEBUG_8812F << BIT_SHIFT_RDE_DEBUG_8812F) 7304 #define BIT_CLEAR_RDE_DEBUG_8812F(x) ((x) & (~BITS_RDE_DEBUG_8812F)) 7305 #define BIT_GET_RDE_DEBUG_8812F(x) \ 7306 (((x) >> BIT_SHIFT_RDE_DEBUG_8812F) & BIT_MASK_RDE_DEBUG_8812F) 7307 #define BIT_SET_RDE_DEBUG_8812F(x, v) \ 7308 (BIT_CLEAR_RDE_DEBUG_8812F(x) | BIT_RDE_DEBUG_8812F(v)) 7309 7310 /* 2 REG_RXDMA_MODE_8812F */ 7311 7312 #define BIT_SHIFT_PKTNUM_TH_V2_8812F 24 7313 #define BIT_MASK_PKTNUM_TH_V2_8812F 0x1f 7314 #define BIT_PKTNUM_TH_V2_8812F(x) \ 7315 (((x) & BIT_MASK_PKTNUM_TH_V2_8812F) << BIT_SHIFT_PKTNUM_TH_V2_8812F) 7316 #define BITS_PKTNUM_TH_V2_8812F \ 7317 (BIT_MASK_PKTNUM_TH_V2_8812F << BIT_SHIFT_PKTNUM_TH_V2_8812F) 7318 #define BIT_CLEAR_PKTNUM_TH_V2_8812F(x) ((x) & (~BITS_PKTNUM_TH_V2_8812F)) 7319 #define BIT_GET_PKTNUM_TH_V2_8812F(x) \ 7320 (((x) >> BIT_SHIFT_PKTNUM_TH_V2_8812F) & BIT_MASK_PKTNUM_TH_V2_8812F) 7321 #define BIT_SET_PKTNUM_TH_V2_8812F(x, v) \ 7322 (BIT_CLEAR_PKTNUM_TH_V2_8812F(x) | BIT_PKTNUM_TH_V2_8812F(v)) 7323 7324 #define BIT_TXBA_BREAK_USBAGG_8812F BIT(23) 7325 7326 #define BIT_SHIFT_PKTLEN_PARA_8812F 16 7327 #define BIT_MASK_PKTLEN_PARA_8812F 0x7 7328 #define BIT_PKTLEN_PARA_8812F(x) \ 7329 (((x) & BIT_MASK_PKTLEN_PARA_8812F) << BIT_SHIFT_PKTLEN_PARA_8812F) 7330 #define BITS_PKTLEN_PARA_8812F \ 7331 (BIT_MASK_PKTLEN_PARA_8812F << BIT_SHIFT_PKTLEN_PARA_8812F) 7332 #define BIT_CLEAR_PKTLEN_PARA_8812F(x) ((x) & (~BITS_PKTLEN_PARA_8812F)) 7333 #define BIT_GET_PKTLEN_PARA_8812F(x) \ 7334 (((x) >> BIT_SHIFT_PKTLEN_PARA_8812F) & BIT_MASK_PKTLEN_PARA_8812F) 7335 #define BIT_SET_PKTLEN_PARA_8812F(x, v) \ 7336 (BIT_CLEAR_PKTLEN_PARA_8812F(x) | BIT_PKTLEN_PARA_8812F(v)) 7337 7338 #define BIT_RX_DBG_SEL_8812F BIT(7) 7339 #define BIT_EN_SPD_8812F BIT(6) 7340 7341 #define BIT_SHIFT_BURST_SIZE_8812F 4 7342 #define BIT_MASK_BURST_SIZE_8812F 0x3 7343 #define BIT_BURST_SIZE_8812F(x) \ 7344 (((x) & BIT_MASK_BURST_SIZE_8812F) << BIT_SHIFT_BURST_SIZE_8812F) 7345 #define BITS_BURST_SIZE_8812F \ 7346 (BIT_MASK_BURST_SIZE_8812F << BIT_SHIFT_BURST_SIZE_8812F) 7347 #define BIT_CLEAR_BURST_SIZE_8812F(x) ((x) & (~BITS_BURST_SIZE_8812F)) 7348 #define BIT_GET_BURST_SIZE_8812F(x) \ 7349 (((x) >> BIT_SHIFT_BURST_SIZE_8812F) & BIT_MASK_BURST_SIZE_8812F) 7350 #define BIT_SET_BURST_SIZE_8812F(x, v) \ 7351 (BIT_CLEAR_BURST_SIZE_8812F(x) | BIT_BURST_SIZE_8812F(v)) 7352 7353 #define BIT_SHIFT_BURST_CNT_8812F 2 7354 #define BIT_MASK_BURST_CNT_8812F 0x3 7355 #define BIT_BURST_CNT_8812F(x) \ 7356 (((x) & BIT_MASK_BURST_CNT_8812F) << BIT_SHIFT_BURST_CNT_8812F) 7357 #define BITS_BURST_CNT_8812F \ 7358 (BIT_MASK_BURST_CNT_8812F << BIT_SHIFT_BURST_CNT_8812F) 7359 #define BIT_CLEAR_BURST_CNT_8812F(x) ((x) & (~BITS_BURST_CNT_8812F)) 7360 #define BIT_GET_BURST_CNT_8812F(x) \ 7361 (((x) >> BIT_SHIFT_BURST_CNT_8812F) & BIT_MASK_BURST_CNT_8812F) 7362 #define BIT_SET_BURST_CNT_8812F(x, v) \ 7363 (BIT_CLEAR_BURST_CNT_8812F(x) | BIT_BURST_CNT_8812F(v)) 7364 7365 #define BIT_DMA_MODE_8812F BIT(1) 7366 7367 /* 2 REG_C2H_PKT_8812F */ 7368 7369 #define BIT_SHIFT_R_C2H_STR_ADDR_16_TO_19_8812F 24 7370 #define BIT_MASK_R_C2H_STR_ADDR_16_TO_19_8812F 0xf 7371 #define BIT_R_C2H_STR_ADDR_16_TO_19_8812F(x) \ 7372 (((x) & BIT_MASK_R_C2H_STR_ADDR_16_TO_19_8812F) \ 7373 << BIT_SHIFT_R_C2H_STR_ADDR_16_TO_19_8812F) 7374 #define BITS_R_C2H_STR_ADDR_16_TO_19_8812F \ 7375 (BIT_MASK_R_C2H_STR_ADDR_16_TO_19_8812F \ 7376 << BIT_SHIFT_R_C2H_STR_ADDR_16_TO_19_8812F) 7377 #define BIT_CLEAR_R_C2H_STR_ADDR_16_TO_19_8812F(x) \ 7378 ((x) & (~BITS_R_C2H_STR_ADDR_16_TO_19_8812F)) 7379 #define BIT_GET_R_C2H_STR_ADDR_16_TO_19_8812F(x) \ 7380 (((x) >> BIT_SHIFT_R_C2H_STR_ADDR_16_TO_19_8812F) & \ 7381 BIT_MASK_R_C2H_STR_ADDR_16_TO_19_8812F) 7382 #define BIT_SET_R_C2H_STR_ADDR_16_TO_19_8812F(x, v) \ 7383 (BIT_CLEAR_R_C2H_STR_ADDR_16_TO_19_8812F(x) | \ 7384 BIT_R_C2H_STR_ADDR_16_TO_19_8812F(v)) 7385 7386 #define BIT_R_C2H_PKT_REQ_8812F BIT(16) 7387 7388 #define BIT_SHIFT_R_C2H_STR_ADDR_8812F 0 7389 #define BIT_MASK_R_C2H_STR_ADDR_8812F 0xffff 7390 #define BIT_R_C2H_STR_ADDR_8812F(x) \ 7391 (((x) & BIT_MASK_R_C2H_STR_ADDR_8812F) \ 7392 << BIT_SHIFT_R_C2H_STR_ADDR_8812F) 7393 #define BITS_R_C2H_STR_ADDR_8812F \ 7394 (BIT_MASK_R_C2H_STR_ADDR_8812F << BIT_SHIFT_R_C2H_STR_ADDR_8812F) 7395 #define BIT_CLEAR_R_C2H_STR_ADDR_8812F(x) ((x) & (~BITS_R_C2H_STR_ADDR_8812F)) 7396 #define BIT_GET_R_C2H_STR_ADDR_8812F(x) \ 7397 (((x) >> BIT_SHIFT_R_C2H_STR_ADDR_8812F) & \ 7398 BIT_MASK_R_C2H_STR_ADDR_8812F) 7399 #define BIT_SET_R_C2H_STR_ADDR_8812F(x, v) \ 7400 (BIT_CLEAR_R_C2H_STR_ADDR_8812F(x) | BIT_R_C2H_STR_ADDR_8812F(v)) 7401 7402 /* 2 REG_FWFF_C2H_8812F */ 7403 7404 #define BIT_SHIFT_C2H_DMA_ADDR_8812F 0 7405 #define BIT_MASK_C2H_DMA_ADDR_8812F 0x3ffff 7406 #define BIT_C2H_DMA_ADDR_8812F(x) \ 7407 (((x) & BIT_MASK_C2H_DMA_ADDR_8812F) << BIT_SHIFT_C2H_DMA_ADDR_8812F) 7408 #define BITS_C2H_DMA_ADDR_8812F \ 7409 (BIT_MASK_C2H_DMA_ADDR_8812F << BIT_SHIFT_C2H_DMA_ADDR_8812F) 7410 #define BIT_CLEAR_C2H_DMA_ADDR_8812F(x) ((x) & (~BITS_C2H_DMA_ADDR_8812F)) 7411 #define BIT_GET_C2H_DMA_ADDR_8812F(x) \ 7412 (((x) >> BIT_SHIFT_C2H_DMA_ADDR_8812F) & BIT_MASK_C2H_DMA_ADDR_8812F) 7413 #define BIT_SET_C2H_DMA_ADDR_8812F(x, v) \ 7414 (BIT_CLEAR_C2H_DMA_ADDR_8812F(x) | BIT_C2H_DMA_ADDR_8812F(v)) 7415 7416 /* 2 REG_FWFF_CTRL_8812F */ 7417 #define BIT_FWFF_DMAPKT_REQ_8812F BIT(31) 7418 7419 #define BIT_SHIFT_FWFF_DMA_PKT_NUM_8812F 16 7420 #define BIT_MASK_FWFF_DMA_PKT_NUM_8812F 0xff 7421 #define BIT_FWFF_DMA_PKT_NUM_8812F(x) \ 7422 (((x) & BIT_MASK_FWFF_DMA_PKT_NUM_8812F) \ 7423 << BIT_SHIFT_FWFF_DMA_PKT_NUM_8812F) 7424 #define BITS_FWFF_DMA_PKT_NUM_8812F \ 7425 (BIT_MASK_FWFF_DMA_PKT_NUM_8812F << BIT_SHIFT_FWFF_DMA_PKT_NUM_8812F) 7426 #define BIT_CLEAR_FWFF_DMA_PKT_NUM_8812F(x) \ 7427 ((x) & (~BITS_FWFF_DMA_PKT_NUM_8812F)) 7428 #define BIT_GET_FWFF_DMA_PKT_NUM_8812F(x) \ 7429 (((x) >> BIT_SHIFT_FWFF_DMA_PKT_NUM_8812F) & \ 7430 BIT_MASK_FWFF_DMA_PKT_NUM_8812F) 7431 #define BIT_SET_FWFF_DMA_PKT_NUM_8812F(x, v) \ 7432 (BIT_CLEAR_FWFF_DMA_PKT_NUM_8812F(x) | BIT_FWFF_DMA_PKT_NUM_8812F(v)) 7433 7434 #define BIT_SHIFT_FWFF_STR_ADDR_8812F 0 7435 #define BIT_MASK_FWFF_STR_ADDR_8812F 0xffff 7436 #define BIT_FWFF_STR_ADDR_8812F(x) \ 7437 (((x) & BIT_MASK_FWFF_STR_ADDR_8812F) << BIT_SHIFT_FWFF_STR_ADDR_8812F) 7438 #define BITS_FWFF_STR_ADDR_8812F \ 7439 (BIT_MASK_FWFF_STR_ADDR_8812F << BIT_SHIFT_FWFF_STR_ADDR_8812F) 7440 #define BIT_CLEAR_FWFF_STR_ADDR_8812F(x) ((x) & (~BITS_FWFF_STR_ADDR_8812F)) 7441 #define BIT_GET_FWFF_STR_ADDR_8812F(x) \ 7442 (((x) >> BIT_SHIFT_FWFF_STR_ADDR_8812F) & BIT_MASK_FWFF_STR_ADDR_8812F) 7443 #define BIT_SET_FWFF_STR_ADDR_8812F(x, v) \ 7444 (BIT_CLEAR_FWFF_STR_ADDR_8812F(x) | BIT_FWFF_STR_ADDR_8812F(v)) 7445 7446 /* 2 REG_FWFF_PKT_INFO_8812F */ 7447 7448 #define BIT_SHIFT_FWFF_PKT_QUEUED_8812F 16 7449 #define BIT_MASK_FWFF_PKT_QUEUED_8812F 0xff 7450 #define BIT_FWFF_PKT_QUEUED_8812F(x) \ 7451 (((x) & BIT_MASK_FWFF_PKT_QUEUED_8812F) \ 7452 << BIT_SHIFT_FWFF_PKT_QUEUED_8812F) 7453 #define BITS_FWFF_PKT_QUEUED_8812F \ 7454 (BIT_MASK_FWFF_PKT_QUEUED_8812F << BIT_SHIFT_FWFF_PKT_QUEUED_8812F) 7455 #define BIT_CLEAR_FWFF_PKT_QUEUED_8812F(x) ((x) & (~BITS_FWFF_PKT_QUEUED_8812F)) 7456 #define BIT_GET_FWFF_PKT_QUEUED_8812F(x) \ 7457 (((x) >> BIT_SHIFT_FWFF_PKT_QUEUED_8812F) & \ 7458 BIT_MASK_FWFF_PKT_QUEUED_8812F) 7459 #define BIT_SET_FWFF_PKT_QUEUED_8812F(x, v) \ 7460 (BIT_CLEAR_FWFF_PKT_QUEUED_8812F(x) | BIT_FWFF_PKT_QUEUED_8812F(v)) 7461 7462 /* 2 REG_NOT_VALID_8812F */ 7463 7464 #define BIT_SHIFT_FWFF_PKT_STR_ADDR_V2_8812F 0 7465 #define BIT_MASK_FWFF_PKT_STR_ADDR_V2_8812F 0x3fff 7466 #define BIT_FWFF_PKT_STR_ADDR_V2_8812F(x) \ 7467 (((x) & BIT_MASK_FWFF_PKT_STR_ADDR_V2_8812F) \ 7468 << BIT_SHIFT_FWFF_PKT_STR_ADDR_V2_8812F) 7469 #define BITS_FWFF_PKT_STR_ADDR_V2_8812F \ 7470 (BIT_MASK_FWFF_PKT_STR_ADDR_V2_8812F \ 7471 << BIT_SHIFT_FWFF_PKT_STR_ADDR_V2_8812F) 7472 #define BIT_CLEAR_FWFF_PKT_STR_ADDR_V2_8812F(x) \ 7473 ((x) & (~BITS_FWFF_PKT_STR_ADDR_V2_8812F)) 7474 #define BIT_GET_FWFF_PKT_STR_ADDR_V2_8812F(x) \ 7475 (((x) >> BIT_SHIFT_FWFF_PKT_STR_ADDR_V2_8812F) & \ 7476 BIT_MASK_FWFF_PKT_STR_ADDR_V2_8812F) 7477 #define BIT_SET_FWFF_PKT_STR_ADDR_V2_8812F(x, v) \ 7478 (BIT_CLEAR_FWFF_PKT_STR_ADDR_V2_8812F(x) | \ 7479 BIT_FWFF_PKT_STR_ADDR_V2_8812F(v)) 7480 7481 /* 2 REG_RXPKTNUM_8812F */ 7482 7483 #define BIT_SHIFT_PKT_NUM_WOL_V1_8812F 16 7484 #define BIT_MASK_PKT_NUM_WOL_V1_8812F 0xffff 7485 #define BIT_PKT_NUM_WOL_V1_8812F(x) \ 7486 (((x) & BIT_MASK_PKT_NUM_WOL_V1_8812F) \ 7487 << BIT_SHIFT_PKT_NUM_WOL_V1_8812F) 7488 #define BITS_PKT_NUM_WOL_V1_8812F \ 7489 (BIT_MASK_PKT_NUM_WOL_V1_8812F << BIT_SHIFT_PKT_NUM_WOL_V1_8812F) 7490 #define BIT_CLEAR_PKT_NUM_WOL_V1_8812F(x) ((x) & (~BITS_PKT_NUM_WOL_V1_8812F)) 7491 #define BIT_GET_PKT_NUM_WOL_V1_8812F(x) \ 7492 (((x) >> BIT_SHIFT_PKT_NUM_WOL_V1_8812F) & \ 7493 BIT_MASK_PKT_NUM_WOL_V1_8812F) 7494 #define BIT_SET_PKT_NUM_WOL_V1_8812F(x, v) \ 7495 (BIT_CLEAR_PKT_NUM_WOL_V1_8812F(x) | BIT_PKT_NUM_WOL_V1_8812F(v)) 7496 7497 #define BIT_SHIFT_RXPKT_NUM_V1_8812F 0 7498 #define BIT_MASK_RXPKT_NUM_V1_8812F 0xffff 7499 #define BIT_RXPKT_NUM_V1_8812F(x) \ 7500 (((x) & BIT_MASK_RXPKT_NUM_V1_8812F) << BIT_SHIFT_RXPKT_NUM_V1_8812F) 7501 #define BITS_RXPKT_NUM_V1_8812F \ 7502 (BIT_MASK_RXPKT_NUM_V1_8812F << BIT_SHIFT_RXPKT_NUM_V1_8812F) 7503 #define BIT_CLEAR_RXPKT_NUM_V1_8812F(x) ((x) & (~BITS_RXPKT_NUM_V1_8812F)) 7504 #define BIT_GET_RXPKT_NUM_V1_8812F(x) \ 7505 (((x) >> BIT_SHIFT_RXPKT_NUM_V1_8812F) & BIT_MASK_RXPKT_NUM_V1_8812F) 7506 #define BIT_SET_RXPKT_NUM_V1_8812F(x, v) \ 7507 (BIT_CLEAR_RXPKT_NUM_V1_8812F(x) | BIT_RXPKT_NUM_V1_8812F(v)) 7508 7509 /* 2 REG_RXPKTNUM_TH_8812F */ 7510 7511 /* 2 REG_NOT_VALID_8812F */ 7512 7513 #define BIT_SHIFT_RXPKT_NUM_TH_8812F 0 7514 #define BIT_MASK_RXPKT_NUM_TH_8812F 0xff 7515 #define BIT_RXPKT_NUM_TH_8812F(x) \ 7516 (((x) & BIT_MASK_RXPKT_NUM_TH_8812F) << BIT_SHIFT_RXPKT_NUM_TH_8812F) 7517 #define BITS_RXPKT_NUM_TH_8812F \ 7518 (BIT_MASK_RXPKT_NUM_TH_8812F << BIT_SHIFT_RXPKT_NUM_TH_8812F) 7519 #define BIT_CLEAR_RXPKT_NUM_TH_8812F(x) ((x) & (~BITS_RXPKT_NUM_TH_8812F)) 7520 #define BIT_GET_RXPKT_NUM_TH_8812F(x) \ 7521 (((x) >> BIT_SHIFT_RXPKT_NUM_TH_8812F) & BIT_MASK_RXPKT_NUM_TH_8812F) 7522 #define BIT_SET_RXPKT_NUM_TH_8812F(x, v) \ 7523 (BIT_CLEAR_RXPKT_NUM_TH_8812F(x) | BIT_RXPKT_NUM_TH_8812F(v)) 7524 7525 /* 2 REG_FW_MSG1_8812F */ 7526 7527 #define BIT_SHIFT_FW_MSG_REG1_8812F 0 7528 #define BIT_MASK_FW_MSG_REG1_8812F 0xffffffffL 7529 #define BIT_FW_MSG_REG1_8812F(x) \ 7530 (((x) & BIT_MASK_FW_MSG_REG1_8812F) << BIT_SHIFT_FW_MSG_REG1_8812F) 7531 #define BITS_FW_MSG_REG1_8812F \ 7532 (BIT_MASK_FW_MSG_REG1_8812F << BIT_SHIFT_FW_MSG_REG1_8812F) 7533 #define BIT_CLEAR_FW_MSG_REG1_8812F(x) ((x) & (~BITS_FW_MSG_REG1_8812F)) 7534 #define BIT_GET_FW_MSG_REG1_8812F(x) \ 7535 (((x) >> BIT_SHIFT_FW_MSG_REG1_8812F) & BIT_MASK_FW_MSG_REG1_8812F) 7536 #define BIT_SET_FW_MSG_REG1_8812F(x, v) \ 7537 (BIT_CLEAR_FW_MSG_REG1_8812F(x) | BIT_FW_MSG_REG1_8812F(v)) 7538 7539 /* 2 REG_FW_MSG2_8812F */ 7540 7541 #define BIT_SHIFT_FW_MSG_REG2_8812F 0 7542 #define BIT_MASK_FW_MSG_REG2_8812F 0xffffffffL 7543 #define BIT_FW_MSG_REG2_8812F(x) \ 7544 (((x) & BIT_MASK_FW_MSG_REG2_8812F) << BIT_SHIFT_FW_MSG_REG2_8812F) 7545 #define BITS_FW_MSG_REG2_8812F \ 7546 (BIT_MASK_FW_MSG_REG2_8812F << BIT_SHIFT_FW_MSG_REG2_8812F) 7547 #define BIT_CLEAR_FW_MSG_REG2_8812F(x) ((x) & (~BITS_FW_MSG_REG2_8812F)) 7548 #define BIT_GET_FW_MSG_REG2_8812F(x) \ 7549 (((x) >> BIT_SHIFT_FW_MSG_REG2_8812F) & BIT_MASK_FW_MSG_REG2_8812F) 7550 #define BIT_SET_FW_MSG_REG2_8812F(x, v) \ 7551 (BIT_CLEAR_FW_MSG_REG2_8812F(x) | BIT_FW_MSG_REG2_8812F(v)) 7552 7553 /* 2 REG_FW_MSG3_8812F */ 7554 7555 #define BIT_SHIFT_FW_MSG_REG3_8812F 0 7556 #define BIT_MASK_FW_MSG_REG3_8812F 0xffffffffL 7557 #define BIT_FW_MSG_REG3_8812F(x) \ 7558 (((x) & BIT_MASK_FW_MSG_REG3_8812F) << BIT_SHIFT_FW_MSG_REG3_8812F) 7559 #define BITS_FW_MSG_REG3_8812F \ 7560 (BIT_MASK_FW_MSG_REG3_8812F << BIT_SHIFT_FW_MSG_REG3_8812F) 7561 #define BIT_CLEAR_FW_MSG_REG3_8812F(x) ((x) & (~BITS_FW_MSG_REG3_8812F)) 7562 #define BIT_GET_FW_MSG_REG3_8812F(x) \ 7563 (((x) >> BIT_SHIFT_FW_MSG_REG3_8812F) & BIT_MASK_FW_MSG_REG3_8812F) 7564 #define BIT_SET_FW_MSG_REG3_8812F(x, v) \ 7565 (BIT_CLEAR_FW_MSG_REG3_8812F(x) | BIT_FW_MSG_REG3_8812F(v)) 7566 7567 /* 2 REG_FW_MSG4_8812F */ 7568 7569 #define BIT_SHIFT_FW_MSG_REG4_8812F 0 7570 #define BIT_MASK_FW_MSG_REG4_8812F 0xffffffffL 7571 #define BIT_FW_MSG_REG4_8812F(x) \ 7572 (((x) & BIT_MASK_FW_MSG_REG4_8812F) << BIT_SHIFT_FW_MSG_REG4_8812F) 7573 #define BITS_FW_MSG_REG4_8812F \ 7574 (BIT_MASK_FW_MSG_REG4_8812F << BIT_SHIFT_FW_MSG_REG4_8812F) 7575 #define BIT_CLEAR_FW_MSG_REG4_8812F(x) ((x) & (~BITS_FW_MSG_REG4_8812F)) 7576 #define BIT_GET_FW_MSG_REG4_8812F(x) \ 7577 (((x) >> BIT_SHIFT_FW_MSG_REG4_8812F) & BIT_MASK_FW_MSG_REG4_8812F) 7578 #define BIT_SET_FW_MSG_REG4_8812F(x, v) \ 7579 (BIT_CLEAR_FW_MSG_REG4_8812F(x) | BIT_FW_MSG_REG4_8812F(v)) 7580 7581 /* 2 REG_DDMA_CH0SA_8812F */ 7582 7583 #define BIT_SHIFT_DDMACH0_SA_8812F 0 7584 #define BIT_MASK_DDMACH0_SA_8812F 0xffffffffL 7585 #define BIT_DDMACH0_SA_8812F(x) \ 7586 (((x) & BIT_MASK_DDMACH0_SA_8812F) << BIT_SHIFT_DDMACH0_SA_8812F) 7587 #define BITS_DDMACH0_SA_8812F \ 7588 (BIT_MASK_DDMACH0_SA_8812F << BIT_SHIFT_DDMACH0_SA_8812F) 7589 #define BIT_CLEAR_DDMACH0_SA_8812F(x) ((x) & (~BITS_DDMACH0_SA_8812F)) 7590 #define BIT_GET_DDMACH0_SA_8812F(x) \ 7591 (((x) >> BIT_SHIFT_DDMACH0_SA_8812F) & BIT_MASK_DDMACH0_SA_8812F) 7592 #define BIT_SET_DDMACH0_SA_8812F(x, v) \ 7593 (BIT_CLEAR_DDMACH0_SA_8812F(x) | BIT_DDMACH0_SA_8812F(v)) 7594 7595 /* 2 REG_DDMA_CH0DA_8812F */ 7596 7597 #define BIT_SHIFT_DDMACH0_DA_8812F 0 7598 #define BIT_MASK_DDMACH0_DA_8812F 0xffffffffL 7599 #define BIT_DDMACH0_DA_8812F(x) \ 7600 (((x) & BIT_MASK_DDMACH0_DA_8812F) << BIT_SHIFT_DDMACH0_DA_8812F) 7601 #define BITS_DDMACH0_DA_8812F \ 7602 (BIT_MASK_DDMACH0_DA_8812F << BIT_SHIFT_DDMACH0_DA_8812F) 7603 #define BIT_CLEAR_DDMACH0_DA_8812F(x) ((x) & (~BITS_DDMACH0_DA_8812F)) 7604 #define BIT_GET_DDMACH0_DA_8812F(x) \ 7605 (((x) >> BIT_SHIFT_DDMACH0_DA_8812F) & BIT_MASK_DDMACH0_DA_8812F) 7606 #define BIT_SET_DDMACH0_DA_8812F(x, v) \ 7607 (BIT_CLEAR_DDMACH0_DA_8812F(x) | BIT_DDMACH0_DA_8812F(v)) 7608 7609 /* 2 REG_DDMA_CH0CTRL_8812F */ 7610 #define BIT_DDMACH0_OWN_8812F BIT(31) 7611 #define BIT_DDMACH0_IDMEM_ERR_8812F BIT(30) 7612 #define BIT_DDMACH0_CHKSUM_EN_8812F BIT(29) 7613 #define BIT_DDMACH0_DA_W_DISABLE_8812F BIT(28) 7614 #define BIT_DDMACH0_CHKSUM_STS_8812F BIT(27) 7615 #define BIT_DDMACH0_DDMA_MODE_8812F BIT(26) 7616 #define BIT_DDMACH0_RESET_CHKSUM_STS_8812F BIT(25) 7617 #define BIT_DDMACH0_CHKSUM_CONT_8812F BIT(24) 7618 7619 #define BIT_SHIFT_DDMACH0_DLEN_8812F 0 7620 #define BIT_MASK_DDMACH0_DLEN_8812F 0x3ffff 7621 #define BIT_DDMACH0_DLEN_8812F(x) \ 7622 (((x) & BIT_MASK_DDMACH0_DLEN_8812F) << BIT_SHIFT_DDMACH0_DLEN_8812F) 7623 #define BITS_DDMACH0_DLEN_8812F \ 7624 (BIT_MASK_DDMACH0_DLEN_8812F << BIT_SHIFT_DDMACH0_DLEN_8812F) 7625 #define BIT_CLEAR_DDMACH0_DLEN_8812F(x) ((x) & (~BITS_DDMACH0_DLEN_8812F)) 7626 #define BIT_GET_DDMACH0_DLEN_8812F(x) \ 7627 (((x) >> BIT_SHIFT_DDMACH0_DLEN_8812F) & BIT_MASK_DDMACH0_DLEN_8812F) 7628 #define BIT_SET_DDMACH0_DLEN_8812F(x, v) \ 7629 (BIT_CLEAR_DDMACH0_DLEN_8812F(x) | BIT_DDMACH0_DLEN_8812F(v)) 7630 7631 /* 2 REG_DDMA_CH1SA_8812F */ 7632 7633 #define BIT_SHIFT_DDMACH1_SA_8812F 0 7634 #define BIT_MASK_DDMACH1_SA_8812F 0xffffffffL 7635 #define BIT_DDMACH1_SA_8812F(x) \ 7636 (((x) & BIT_MASK_DDMACH1_SA_8812F) << BIT_SHIFT_DDMACH1_SA_8812F) 7637 #define BITS_DDMACH1_SA_8812F \ 7638 (BIT_MASK_DDMACH1_SA_8812F << BIT_SHIFT_DDMACH1_SA_8812F) 7639 #define BIT_CLEAR_DDMACH1_SA_8812F(x) ((x) & (~BITS_DDMACH1_SA_8812F)) 7640 #define BIT_GET_DDMACH1_SA_8812F(x) \ 7641 (((x) >> BIT_SHIFT_DDMACH1_SA_8812F) & BIT_MASK_DDMACH1_SA_8812F) 7642 #define BIT_SET_DDMACH1_SA_8812F(x, v) \ 7643 (BIT_CLEAR_DDMACH1_SA_8812F(x) | BIT_DDMACH1_SA_8812F(v)) 7644 7645 /* 2 REG_DDMA_CH1DA_8812F */ 7646 7647 #define BIT_SHIFT_DDMACH1_DA_8812F 0 7648 #define BIT_MASK_DDMACH1_DA_8812F 0xffffffffL 7649 #define BIT_DDMACH1_DA_8812F(x) \ 7650 (((x) & BIT_MASK_DDMACH1_DA_8812F) << BIT_SHIFT_DDMACH1_DA_8812F) 7651 #define BITS_DDMACH1_DA_8812F \ 7652 (BIT_MASK_DDMACH1_DA_8812F << BIT_SHIFT_DDMACH1_DA_8812F) 7653 #define BIT_CLEAR_DDMACH1_DA_8812F(x) ((x) & (~BITS_DDMACH1_DA_8812F)) 7654 #define BIT_GET_DDMACH1_DA_8812F(x) \ 7655 (((x) >> BIT_SHIFT_DDMACH1_DA_8812F) & BIT_MASK_DDMACH1_DA_8812F) 7656 #define BIT_SET_DDMACH1_DA_8812F(x, v) \ 7657 (BIT_CLEAR_DDMACH1_DA_8812F(x) | BIT_DDMACH1_DA_8812F(v)) 7658 7659 /* 2 REG_DDMA_CH1CTRL_8812F */ 7660 #define BIT_DDMACH1_OWN_8812F BIT(31) 7661 #define BIT_DDMACH1_IDMEM_ERR_8812F BIT(30) 7662 #define BIT_DDMACH1_CHKSUM_EN_8812F BIT(29) 7663 #define BIT_DDMACH1_DA_W_DISABLE_8812F BIT(28) 7664 #define BIT_DDMACH1_CHKSUM_STS_8812F BIT(27) 7665 #define BIT_DDMACH1_DDMA_MODE_8812F BIT(26) 7666 7667 /* 2 REG_NOT_VALID_8812F */ 7668 7669 /* 2 REG_NOT_VALID_8812F */ 7670 7671 #define BIT_SHIFT_DDMACH1_DLEN_8812F 0 7672 #define BIT_MASK_DDMACH1_DLEN_8812F 0x3ffff 7673 #define BIT_DDMACH1_DLEN_8812F(x) \ 7674 (((x) & BIT_MASK_DDMACH1_DLEN_8812F) << BIT_SHIFT_DDMACH1_DLEN_8812F) 7675 #define BITS_DDMACH1_DLEN_8812F \ 7676 (BIT_MASK_DDMACH1_DLEN_8812F << BIT_SHIFT_DDMACH1_DLEN_8812F) 7677 #define BIT_CLEAR_DDMACH1_DLEN_8812F(x) ((x) & (~BITS_DDMACH1_DLEN_8812F)) 7678 #define BIT_GET_DDMACH1_DLEN_8812F(x) \ 7679 (((x) >> BIT_SHIFT_DDMACH1_DLEN_8812F) & BIT_MASK_DDMACH1_DLEN_8812F) 7680 #define BIT_SET_DDMACH1_DLEN_8812F(x, v) \ 7681 (BIT_CLEAR_DDMACH1_DLEN_8812F(x) | BIT_DDMACH1_DLEN_8812F(v)) 7682 7683 /* 2 REG_DDMA_CH2SA_8812F */ 7684 7685 #define BIT_SHIFT_DDMACH2_SA_8812F 0 7686 #define BIT_MASK_DDMACH2_SA_8812F 0xffffffffL 7687 #define BIT_DDMACH2_SA_8812F(x) \ 7688 (((x) & BIT_MASK_DDMACH2_SA_8812F) << BIT_SHIFT_DDMACH2_SA_8812F) 7689 #define BITS_DDMACH2_SA_8812F \ 7690 (BIT_MASK_DDMACH2_SA_8812F << BIT_SHIFT_DDMACH2_SA_8812F) 7691 #define BIT_CLEAR_DDMACH2_SA_8812F(x) ((x) & (~BITS_DDMACH2_SA_8812F)) 7692 #define BIT_GET_DDMACH2_SA_8812F(x) \ 7693 (((x) >> BIT_SHIFT_DDMACH2_SA_8812F) & BIT_MASK_DDMACH2_SA_8812F) 7694 #define BIT_SET_DDMACH2_SA_8812F(x, v) \ 7695 (BIT_CLEAR_DDMACH2_SA_8812F(x) | BIT_DDMACH2_SA_8812F(v)) 7696 7697 /* 2 REG_DDMA_CH2DA_8812F */ 7698 7699 #define BIT_SHIFT_DDMACH2_DA_8812F 0 7700 #define BIT_MASK_DDMACH2_DA_8812F 0xffffffffL 7701 #define BIT_DDMACH2_DA_8812F(x) \ 7702 (((x) & BIT_MASK_DDMACH2_DA_8812F) << BIT_SHIFT_DDMACH2_DA_8812F) 7703 #define BITS_DDMACH2_DA_8812F \ 7704 (BIT_MASK_DDMACH2_DA_8812F << BIT_SHIFT_DDMACH2_DA_8812F) 7705 #define BIT_CLEAR_DDMACH2_DA_8812F(x) ((x) & (~BITS_DDMACH2_DA_8812F)) 7706 #define BIT_GET_DDMACH2_DA_8812F(x) \ 7707 (((x) >> BIT_SHIFT_DDMACH2_DA_8812F) & BIT_MASK_DDMACH2_DA_8812F) 7708 #define BIT_SET_DDMACH2_DA_8812F(x, v) \ 7709 (BIT_CLEAR_DDMACH2_DA_8812F(x) | BIT_DDMACH2_DA_8812F(v)) 7710 7711 /* 2 REG_DDMA_CH2CTRL_8812F */ 7712 #define BIT_DDMACH2_OWN_8812F BIT(31) 7713 #define BIT_DDMACH2_IDMEM_ERR_8812F BIT(30) 7714 #define BIT_DDMACH2_CHKSUM_EN_8812F BIT(29) 7715 #define BIT_DDMACH2_DA_W_DISABLE_8812F BIT(28) 7716 #define BIT_DDMACH2_CHKSUM_STS_8812F BIT(27) 7717 #define BIT_DDMACH2_DDMA_MODE_8812F BIT(26) 7718 7719 /* 2 REG_NOT_VALID_8812F */ 7720 7721 /* 2 REG_NOT_VALID_8812F */ 7722 7723 #define BIT_SHIFT_DDMACH2_DLEN_8812F 0 7724 #define BIT_MASK_DDMACH2_DLEN_8812F 0x3ffff 7725 #define BIT_DDMACH2_DLEN_8812F(x) \ 7726 (((x) & BIT_MASK_DDMACH2_DLEN_8812F) << BIT_SHIFT_DDMACH2_DLEN_8812F) 7727 #define BITS_DDMACH2_DLEN_8812F \ 7728 (BIT_MASK_DDMACH2_DLEN_8812F << BIT_SHIFT_DDMACH2_DLEN_8812F) 7729 #define BIT_CLEAR_DDMACH2_DLEN_8812F(x) ((x) & (~BITS_DDMACH2_DLEN_8812F)) 7730 #define BIT_GET_DDMACH2_DLEN_8812F(x) \ 7731 (((x) >> BIT_SHIFT_DDMACH2_DLEN_8812F) & BIT_MASK_DDMACH2_DLEN_8812F) 7732 #define BIT_SET_DDMACH2_DLEN_8812F(x, v) \ 7733 (BIT_CLEAR_DDMACH2_DLEN_8812F(x) | BIT_DDMACH2_DLEN_8812F(v)) 7734 7735 /* 2 REG_DDMA_CH3SA_8812F */ 7736 7737 #define BIT_SHIFT_DDMACH3_SA_8812F 0 7738 #define BIT_MASK_DDMACH3_SA_8812F 0xffffffffL 7739 #define BIT_DDMACH3_SA_8812F(x) \ 7740 (((x) & BIT_MASK_DDMACH3_SA_8812F) << BIT_SHIFT_DDMACH3_SA_8812F) 7741 #define BITS_DDMACH3_SA_8812F \ 7742 (BIT_MASK_DDMACH3_SA_8812F << BIT_SHIFT_DDMACH3_SA_8812F) 7743 #define BIT_CLEAR_DDMACH3_SA_8812F(x) ((x) & (~BITS_DDMACH3_SA_8812F)) 7744 #define BIT_GET_DDMACH3_SA_8812F(x) \ 7745 (((x) >> BIT_SHIFT_DDMACH3_SA_8812F) & BIT_MASK_DDMACH3_SA_8812F) 7746 #define BIT_SET_DDMACH3_SA_8812F(x, v) \ 7747 (BIT_CLEAR_DDMACH3_SA_8812F(x) | BIT_DDMACH3_SA_8812F(v)) 7748 7749 /* 2 REG_DDMA_CH3DA_8812F */ 7750 7751 #define BIT_SHIFT_DDMACH3_DA_8812F 0 7752 #define BIT_MASK_DDMACH3_DA_8812F 0xffffffffL 7753 #define BIT_DDMACH3_DA_8812F(x) \ 7754 (((x) & BIT_MASK_DDMACH3_DA_8812F) << BIT_SHIFT_DDMACH3_DA_8812F) 7755 #define BITS_DDMACH3_DA_8812F \ 7756 (BIT_MASK_DDMACH3_DA_8812F << BIT_SHIFT_DDMACH3_DA_8812F) 7757 #define BIT_CLEAR_DDMACH3_DA_8812F(x) ((x) & (~BITS_DDMACH3_DA_8812F)) 7758 #define BIT_GET_DDMACH3_DA_8812F(x) \ 7759 (((x) >> BIT_SHIFT_DDMACH3_DA_8812F) & BIT_MASK_DDMACH3_DA_8812F) 7760 #define BIT_SET_DDMACH3_DA_8812F(x, v) \ 7761 (BIT_CLEAR_DDMACH3_DA_8812F(x) | BIT_DDMACH3_DA_8812F(v)) 7762 7763 /* 2 REG_DDMA_CH3CTRL_8812F */ 7764 #define BIT_DDMACH3_OWN_8812F BIT(31) 7765 #define BIT_DDMACH3_IDMEM_ERR_8812F BIT(30) 7766 #define BIT_DDMACH3_CHKSUM_EN_8812F BIT(29) 7767 #define BIT_DDMACH3_DA_W_DISABLE_8812F BIT(28) 7768 #define BIT_DDMACH3_CHKSUM_STS_8812F BIT(27) 7769 #define BIT_DDMACH3_DDMA_MODE_8812F BIT(26) 7770 7771 /* 2 REG_NOT_VALID_8812F */ 7772 7773 /* 2 REG_NOT_VALID_8812F */ 7774 7775 #define BIT_SHIFT_DDMACH3_DLEN_8812F 0 7776 #define BIT_MASK_DDMACH3_DLEN_8812F 0x3ffff 7777 #define BIT_DDMACH3_DLEN_8812F(x) \ 7778 (((x) & BIT_MASK_DDMACH3_DLEN_8812F) << BIT_SHIFT_DDMACH3_DLEN_8812F) 7779 #define BITS_DDMACH3_DLEN_8812F \ 7780 (BIT_MASK_DDMACH3_DLEN_8812F << BIT_SHIFT_DDMACH3_DLEN_8812F) 7781 #define BIT_CLEAR_DDMACH3_DLEN_8812F(x) ((x) & (~BITS_DDMACH3_DLEN_8812F)) 7782 #define BIT_GET_DDMACH3_DLEN_8812F(x) \ 7783 (((x) >> BIT_SHIFT_DDMACH3_DLEN_8812F) & BIT_MASK_DDMACH3_DLEN_8812F) 7784 #define BIT_SET_DDMACH3_DLEN_8812F(x, v) \ 7785 (BIT_CLEAR_DDMACH3_DLEN_8812F(x) | BIT_DDMACH3_DLEN_8812F(v)) 7786 7787 /* 2 REG_DDMA_CH4SA_8812F */ 7788 7789 #define BIT_SHIFT_DDMACH4_SA_8812F 0 7790 #define BIT_MASK_DDMACH4_SA_8812F 0xffffffffL 7791 #define BIT_DDMACH4_SA_8812F(x) \ 7792 (((x) & BIT_MASK_DDMACH4_SA_8812F) << BIT_SHIFT_DDMACH4_SA_8812F) 7793 #define BITS_DDMACH4_SA_8812F \ 7794 (BIT_MASK_DDMACH4_SA_8812F << BIT_SHIFT_DDMACH4_SA_8812F) 7795 #define BIT_CLEAR_DDMACH4_SA_8812F(x) ((x) & (~BITS_DDMACH4_SA_8812F)) 7796 #define BIT_GET_DDMACH4_SA_8812F(x) \ 7797 (((x) >> BIT_SHIFT_DDMACH4_SA_8812F) & BIT_MASK_DDMACH4_SA_8812F) 7798 #define BIT_SET_DDMACH4_SA_8812F(x, v) \ 7799 (BIT_CLEAR_DDMACH4_SA_8812F(x) | BIT_DDMACH4_SA_8812F(v)) 7800 7801 /* 2 REG_DDMA_CH4DA_8812F */ 7802 7803 #define BIT_SHIFT_DDMACH4_DA_8812F 0 7804 #define BIT_MASK_DDMACH4_DA_8812F 0xffffffffL 7805 #define BIT_DDMACH4_DA_8812F(x) \ 7806 (((x) & BIT_MASK_DDMACH4_DA_8812F) << BIT_SHIFT_DDMACH4_DA_8812F) 7807 #define BITS_DDMACH4_DA_8812F \ 7808 (BIT_MASK_DDMACH4_DA_8812F << BIT_SHIFT_DDMACH4_DA_8812F) 7809 #define BIT_CLEAR_DDMACH4_DA_8812F(x) ((x) & (~BITS_DDMACH4_DA_8812F)) 7810 #define BIT_GET_DDMACH4_DA_8812F(x) \ 7811 (((x) >> BIT_SHIFT_DDMACH4_DA_8812F) & BIT_MASK_DDMACH4_DA_8812F) 7812 #define BIT_SET_DDMACH4_DA_8812F(x, v) \ 7813 (BIT_CLEAR_DDMACH4_DA_8812F(x) | BIT_DDMACH4_DA_8812F(v)) 7814 7815 /* 2 REG_DDMA_CH4CTRL_8812F */ 7816 #define BIT_DDMACH4_OWN_8812F BIT(31) 7817 #define BIT_DDMACH4_IDMEM_ERR_8812F BIT(30) 7818 #define BIT_DDMACH4_CHKSUM_EN_8812F BIT(29) 7819 #define BIT_DDMACH4_DA_W_DISABLE_8812F BIT(28) 7820 #define BIT_DDMACH4_CHKSUM_STS_8812F BIT(27) 7821 #define BIT_DDMACH4_DDMA_MODE_8812F BIT(26) 7822 7823 /* 2 REG_NOT_VALID_8812F */ 7824 7825 /* 2 REG_NOT_VALID_8812F */ 7826 7827 #define BIT_SHIFT_DDMACH4_DLEN_8812F 0 7828 #define BIT_MASK_DDMACH4_DLEN_8812F 0x3ffff 7829 #define BIT_DDMACH4_DLEN_8812F(x) \ 7830 (((x) & BIT_MASK_DDMACH4_DLEN_8812F) << BIT_SHIFT_DDMACH4_DLEN_8812F) 7831 #define BITS_DDMACH4_DLEN_8812F \ 7832 (BIT_MASK_DDMACH4_DLEN_8812F << BIT_SHIFT_DDMACH4_DLEN_8812F) 7833 #define BIT_CLEAR_DDMACH4_DLEN_8812F(x) ((x) & (~BITS_DDMACH4_DLEN_8812F)) 7834 #define BIT_GET_DDMACH4_DLEN_8812F(x) \ 7835 (((x) >> BIT_SHIFT_DDMACH4_DLEN_8812F) & BIT_MASK_DDMACH4_DLEN_8812F) 7836 #define BIT_SET_DDMACH4_DLEN_8812F(x, v) \ 7837 (BIT_CLEAR_DDMACH4_DLEN_8812F(x) | BIT_DDMACH4_DLEN_8812F(v)) 7838 7839 /* 2 REG_DDMA_CH5SA_8812F */ 7840 7841 #define BIT_SHIFT_DDMACH5_SA_8812F 0 7842 #define BIT_MASK_DDMACH5_SA_8812F 0xffffffffL 7843 #define BIT_DDMACH5_SA_8812F(x) \ 7844 (((x) & BIT_MASK_DDMACH5_SA_8812F) << BIT_SHIFT_DDMACH5_SA_8812F) 7845 #define BITS_DDMACH5_SA_8812F \ 7846 (BIT_MASK_DDMACH5_SA_8812F << BIT_SHIFT_DDMACH5_SA_8812F) 7847 #define BIT_CLEAR_DDMACH5_SA_8812F(x) ((x) & (~BITS_DDMACH5_SA_8812F)) 7848 #define BIT_GET_DDMACH5_SA_8812F(x) \ 7849 (((x) >> BIT_SHIFT_DDMACH5_SA_8812F) & BIT_MASK_DDMACH5_SA_8812F) 7850 #define BIT_SET_DDMACH5_SA_8812F(x, v) \ 7851 (BIT_CLEAR_DDMACH5_SA_8812F(x) | BIT_DDMACH5_SA_8812F(v)) 7852 7853 /* 2 REG_DDMA_CH5DA_8812F */ 7854 7855 #define BIT_SHIFT_DDMACH5_DA_8812F 0 7856 #define BIT_MASK_DDMACH5_DA_8812F 0xffffffffL 7857 #define BIT_DDMACH5_DA_8812F(x) \ 7858 (((x) & BIT_MASK_DDMACH5_DA_8812F) << BIT_SHIFT_DDMACH5_DA_8812F) 7859 #define BITS_DDMACH5_DA_8812F \ 7860 (BIT_MASK_DDMACH5_DA_8812F << BIT_SHIFT_DDMACH5_DA_8812F) 7861 #define BIT_CLEAR_DDMACH5_DA_8812F(x) ((x) & (~BITS_DDMACH5_DA_8812F)) 7862 #define BIT_GET_DDMACH5_DA_8812F(x) \ 7863 (((x) >> BIT_SHIFT_DDMACH5_DA_8812F) & BIT_MASK_DDMACH5_DA_8812F) 7864 #define BIT_SET_DDMACH5_DA_8812F(x, v) \ 7865 (BIT_CLEAR_DDMACH5_DA_8812F(x) | BIT_DDMACH5_DA_8812F(v)) 7866 7867 /* 2 REG_DDMA_CH5CTRL_8812F */ 7868 #define BIT_DDMACH5_OWN_8812F BIT(31) 7869 #define BIT_DDMACH5_IDMEM_ERR_8812F BIT(30) 7870 #define BIT_DDMACH5_CHKSUM_EN_8812F BIT(29) 7871 #define BIT_DDMACH5_DA_W_DISABLE_8812F BIT(28) 7872 #define BIT_DDMACH5_CHKSUM_STS_8812F BIT(27) 7873 #define BIT_DDMACH5_DDMA_MODE_8812F BIT(26) 7874 7875 /* 2 REG_NOT_VALID_8812F */ 7876 7877 /* 2 REG_NOT_VALID_8812F */ 7878 7879 #define BIT_SHIFT_DDMACH5_DLEN_8812F 0 7880 #define BIT_MASK_DDMACH5_DLEN_8812F 0x3ffff 7881 #define BIT_DDMACH5_DLEN_8812F(x) \ 7882 (((x) & BIT_MASK_DDMACH5_DLEN_8812F) << BIT_SHIFT_DDMACH5_DLEN_8812F) 7883 #define BITS_DDMACH5_DLEN_8812F \ 7884 (BIT_MASK_DDMACH5_DLEN_8812F << BIT_SHIFT_DDMACH5_DLEN_8812F) 7885 #define BIT_CLEAR_DDMACH5_DLEN_8812F(x) ((x) & (~BITS_DDMACH5_DLEN_8812F)) 7886 #define BIT_GET_DDMACH5_DLEN_8812F(x) \ 7887 (((x) >> BIT_SHIFT_DDMACH5_DLEN_8812F) & BIT_MASK_DDMACH5_DLEN_8812F) 7888 #define BIT_SET_DDMACH5_DLEN_8812F(x, v) \ 7889 (BIT_CLEAR_DDMACH5_DLEN_8812F(x) | BIT_DDMACH5_DLEN_8812F(v)) 7890 7891 /* 2 REG_DDMA_INT_MSK_8812F */ 7892 #define BIT_DDMACH5_MSK_8812F BIT(5) 7893 #define BIT_DDMACH4_MSK_8812F BIT(4) 7894 #define BIT_DDMACH3_MSK_8812F BIT(3) 7895 #define BIT_DDMACH2_MSK_8812F BIT(2) 7896 #define BIT_DDMACH1_MSK_8812F BIT(1) 7897 #define BIT_DDMACH0_MSK_8812F BIT(0) 7898 7899 /* 2 REG_DDMA_CHSTATUS_8812F */ 7900 #define BIT_DDMACH5_BUSY_8812F BIT(5) 7901 #define BIT_DDMACH4_BUSY_8812F BIT(4) 7902 #define BIT_DDMACH3_BUSY_8812F BIT(3) 7903 #define BIT_DDMACH2_BUSY_8812F BIT(2) 7904 #define BIT_DDMACH1_BUSY_8812F BIT(1) 7905 #define BIT_DDMACH0_BUSY_8812F BIT(0) 7906 7907 /* 2 REG_DDMA_CHKSUM_8812F */ 7908 7909 #define BIT_SHIFT_IDDMA0_CHKSUM_8812F 0 7910 #define BIT_MASK_IDDMA0_CHKSUM_8812F 0xffff 7911 #define BIT_IDDMA0_CHKSUM_8812F(x) \ 7912 (((x) & BIT_MASK_IDDMA0_CHKSUM_8812F) << BIT_SHIFT_IDDMA0_CHKSUM_8812F) 7913 #define BITS_IDDMA0_CHKSUM_8812F \ 7914 (BIT_MASK_IDDMA0_CHKSUM_8812F << BIT_SHIFT_IDDMA0_CHKSUM_8812F) 7915 #define BIT_CLEAR_IDDMA0_CHKSUM_8812F(x) ((x) & (~BITS_IDDMA0_CHKSUM_8812F)) 7916 #define BIT_GET_IDDMA0_CHKSUM_8812F(x) \ 7917 (((x) >> BIT_SHIFT_IDDMA0_CHKSUM_8812F) & BIT_MASK_IDDMA0_CHKSUM_8812F) 7918 #define BIT_SET_IDDMA0_CHKSUM_8812F(x, v) \ 7919 (BIT_CLEAR_IDDMA0_CHKSUM_8812F(x) | BIT_IDDMA0_CHKSUM_8812F(v)) 7920 7921 /* 2 REG_DDMA_MONITOR_8812F */ 7922 #define BIT_IDDMA0_PERMU_UNDERFLOW_8812F BIT(14) 7923 #define BIT_IDDMA0_FIFO_UNDERFLOW_8812F BIT(13) 7924 #define BIT_IDDMA0_FIFO_OVERFLOW_8812F BIT(12) 7925 #define BIT_CH5_ERR_8812F BIT(5) 7926 #define BIT_CH4_ERR_8812F BIT(4) 7927 #define BIT_CH3_ERR_8812F BIT(3) 7928 #define BIT_CH2_ERR_8812F BIT(2) 7929 #define BIT_CH1_ERR_8812F BIT(1) 7930 #define BIT_CH0_ERR_8812F BIT(0) 7931 7932 /* 2 REG_NOT_VALID_8812F */ 7933 7934 /* 2 REG_PCIE_CTRL_8812F */ 7935 #define BIT_PCIEIO_PERSTB_SEL_8812F BIT(31) 7936 7937 #define BIT_SHIFT_PCIE_MAX_RXDMA_8812F 28 7938 #define BIT_MASK_PCIE_MAX_RXDMA_8812F 0x7 7939 #define BIT_PCIE_MAX_RXDMA_8812F(x) \ 7940 (((x) & BIT_MASK_PCIE_MAX_RXDMA_8812F) \ 7941 << BIT_SHIFT_PCIE_MAX_RXDMA_8812F) 7942 #define BITS_PCIE_MAX_RXDMA_8812F \ 7943 (BIT_MASK_PCIE_MAX_RXDMA_8812F << BIT_SHIFT_PCIE_MAX_RXDMA_8812F) 7944 #define BIT_CLEAR_PCIE_MAX_RXDMA_8812F(x) ((x) & (~BITS_PCIE_MAX_RXDMA_8812F)) 7945 #define BIT_GET_PCIE_MAX_RXDMA_8812F(x) \ 7946 (((x) >> BIT_SHIFT_PCIE_MAX_RXDMA_8812F) & \ 7947 BIT_MASK_PCIE_MAX_RXDMA_8812F) 7948 #define BIT_SET_PCIE_MAX_RXDMA_8812F(x, v) \ 7949 (BIT_CLEAR_PCIE_MAX_RXDMA_8812F(x) | BIT_PCIE_MAX_RXDMA_8812F(v)) 7950 7951 #define BIT_SHIFT_PCIE_MAX_TXDMA_8812F 24 7952 #define BIT_MASK_PCIE_MAX_TXDMA_8812F 0x7 7953 #define BIT_PCIE_MAX_TXDMA_8812F(x) \ 7954 (((x) & BIT_MASK_PCIE_MAX_TXDMA_8812F) \ 7955 << BIT_SHIFT_PCIE_MAX_TXDMA_8812F) 7956 #define BITS_PCIE_MAX_TXDMA_8812F \ 7957 (BIT_MASK_PCIE_MAX_TXDMA_8812F << BIT_SHIFT_PCIE_MAX_TXDMA_8812F) 7958 #define BIT_CLEAR_PCIE_MAX_TXDMA_8812F(x) ((x) & (~BITS_PCIE_MAX_TXDMA_8812F)) 7959 #define BIT_GET_PCIE_MAX_TXDMA_8812F(x) \ 7960 (((x) >> BIT_SHIFT_PCIE_MAX_TXDMA_8812F) & \ 7961 BIT_MASK_PCIE_MAX_TXDMA_8812F) 7962 #define BIT_SET_PCIE_MAX_TXDMA_8812F(x, v) \ 7963 (BIT_CLEAR_PCIE_MAX_TXDMA_8812F(x) | BIT_PCIE_MAX_TXDMA_8812F(v)) 7964 7965 #define BIT_EN_CPL_TIMEOUT_PS_8812F BIT(22) 7966 #define BIT_REG_TXDMA_FAIL_PS_8812F BIT(21) 7967 #define BIT_PCIE_RST_TRXDMA_INTF_8812F BIT(20) 7968 #define BIT_EN_HWENTR_L1_8812F BIT(19) 7969 #define BIT_EN_ADV_CLKGATE_8812F BIT(18) 7970 #define BIT_PCIE_EN_SWENT_L23_8812F BIT(17) 7971 #define BIT_PCIE_EN_HWEXT_L1_8812F BIT(16) 7972 #define BIT_RX_CLOSE_EN_8812F BIT(15) 7973 #define BIT_STOP_BCNQ_8812F BIT(14) 7974 #define BIT_STOP_MGQ_8812F BIT(13) 7975 #define BIT_STOP_VOQ_8812F BIT(12) 7976 #define BIT_STOP_VIQ_8812F BIT(11) 7977 #define BIT_STOP_BEQ_8812F BIT(10) 7978 #define BIT_STOP_BKQ_8812F BIT(9) 7979 #define BIT_STOP_RXQ_8812F BIT(8) 7980 #define BIT_STOP_HI7Q_8812F BIT(7) 7981 #define BIT_STOP_HI6Q_8812F BIT(6) 7982 #define BIT_STOP_HI5Q_8812F BIT(5) 7983 #define BIT_STOP_HI4Q_8812F BIT(4) 7984 #define BIT_STOP_HI3Q_8812F BIT(3) 7985 #define BIT_STOP_HI2Q_8812F BIT(2) 7986 #define BIT_STOP_HI1Q_8812F BIT(1) 7987 #define BIT_STOP_HI0Q_8812F BIT(0) 7988 7989 /* 2 REG_INT_MIG_8812F */ 7990 7991 #define BIT_SHIFT_TRXCOUNTER_MATCH_8812F 24 7992 #define BIT_MASK_TRXCOUNTER_MATCH_8812F 0xff 7993 #define BIT_TRXCOUNTER_MATCH_8812F(x) \ 7994 (((x) & BIT_MASK_TRXCOUNTER_MATCH_8812F) \ 7995 << BIT_SHIFT_TRXCOUNTER_MATCH_8812F) 7996 #define BITS_TRXCOUNTER_MATCH_8812F \ 7997 (BIT_MASK_TRXCOUNTER_MATCH_8812F << BIT_SHIFT_TRXCOUNTER_MATCH_8812F) 7998 #define BIT_CLEAR_TRXCOUNTER_MATCH_8812F(x) \ 7999 ((x) & (~BITS_TRXCOUNTER_MATCH_8812F)) 8000 #define BIT_GET_TRXCOUNTER_MATCH_8812F(x) \ 8001 (((x) >> BIT_SHIFT_TRXCOUNTER_MATCH_8812F) & \ 8002 BIT_MASK_TRXCOUNTER_MATCH_8812F) 8003 #define BIT_SET_TRXCOUNTER_MATCH_8812F(x, v) \ 8004 (BIT_CLEAR_TRXCOUNTER_MATCH_8812F(x) | BIT_TRXCOUNTER_MATCH_8812F(v)) 8005 8006 #define BIT_SHIFT_TRXTIMER_MATCH_8812F 16 8007 #define BIT_MASK_TRXTIMER_MATCH_8812F 0xff 8008 #define BIT_TRXTIMER_MATCH_8812F(x) \ 8009 (((x) & BIT_MASK_TRXTIMER_MATCH_8812F) \ 8010 << BIT_SHIFT_TRXTIMER_MATCH_8812F) 8011 #define BITS_TRXTIMER_MATCH_8812F \ 8012 (BIT_MASK_TRXTIMER_MATCH_8812F << BIT_SHIFT_TRXTIMER_MATCH_8812F) 8013 #define BIT_CLEAR_TRXTIMER_MATCH_8812F(x) ((x) & (~BITS_TRXTIMER_MATCH_8812F)) 8014 #define BIT_GET_TRXTIMER_MATCH_8812F(x) \ 8015 (((x) >> BIT_SHIFT_TRXTIMER_MATCH_8812F) & \ 8016 BIT_MASK_TRXTIMER_MATCH_8812F) 8017 #define BIT_SET_TRXTIMER_MATCH_8812F(x, v) \ 8018 (BIT_CLEAR_TRXTIMER_MATCH_8812F(x) | BIT_TRXTIMER_MATCH_8812F(v)) 8019 8020 #define BIT_SHIFT_TRXTIMER_UNIT_8812F 0 8021 #define BIT_MASK_TRXTIMER_UNIT_8812F 0x3 8022 #define BIT_TRXTIMER_UNIT_8812F(x) \ 8023 (((x) & BIT_MASK_TRXTIMER_UNIT_8812F) << BIT_SHIFT_TRXTIMER_UNIT_8812F) 8024 #define BITS_TRXTIMER_UNIT_8812F \ 8025 (BIT_MASK_TRXTIMER_UNIT_8812F << BIT_SHIFT_TRXTIMER_UNIT_8812F) 8026 #define BIT_CLEAR_TRXTIMER_UNIT_8812F(x) ((x) & (~BITS_TRXTIMER_UNIT_8812F)) 8027 #define BIT_GET_TRXTIMER_UNIT_8812F(x) \ 8028 (((x) >> BIT_SHIFT_TRXTIMER_UNIT_8812F) & BIT_MASK_TRXTIMER_UNIT_8812F) 8029 #define BIT_SET_TRXTIMER_UNIT_8812F(x, v) \ 8030 (BIT_CLEAR_TRXTIMER_UNIT_8812F(x) | BIT_TRXTIMER_UNIT_8812F(v)) 8031 8032 /* 2 REG_BCNQ_TXBD_DESA_8812F */ 8033 8034 #define BIT_SHIFT_BCNQ_TXBD_DESA_8812F 0 8035 #define BIT_MASK_BCNQ_TXBD_DESA_8812F 0xffffffffffffffffL 8036 #define BIT_BCNQ_TXBD_DESA_8812F(x) \ 8037 (((x) & BIT_MASK_BCNQ_TXBD_DESA_8812F) \ 8038 << BIT_SHIFT_BCNQ_TXBD_DESA_8812F) 8039 #define BITS_BCNQ_TXBD_DESA_8812F \ 8040 (BIT_MASK_BCNQ_TXBD_DESA_8812F << BIT_SHIFT_BCNQ_TXBD_DESA_8812F) 8041 #define BIT_CLEAR_BCNQ_TXBD_DESA_8812F(x) ((x) & (~BITS_BCNQ_TXBD_DESA_8812F)) 8042 #define BIT_GET_BCNQ_TXBD_DESA_8812F(x) \ 8043 (((x) >> BIT_SHIFT_BCNQ_TXBD_DESA_8812F) & \ 8044 BIT_MASK_BCNQ_TXBD_DESA_8812F) 8045 #define BIT_SET_BCNQ_TXBD_DESA_8812F(x, v) \ 8046 (BIT_CLEAR_BCNQ_TXBD_DESA_8812F(x) | BIT_BCNQ_TXBD_DESA_8812F(v)) 8047 8048 /* 2 REG_MGQ_TXBD_DESA_8812F */ 8049 8050 #define BIT_SHIFT_MGQ_TXBD_DESA_8812F 0 8051 #define BIT_MASK_MGQ_TXBD_DESA_8812F 0xffffffffffffffffL 8052 #define BIT_MGQ_TXBD_DESA_8812F(x) \ 8053 (((x) & BIT_MASK_MGQ_TXBD_DESA_8812F) << BIT_SHIFT_MGQ_TXBD_DESA_8812F) 8054 #define BITS_MGQ_TXBD_DESA_8812F \ 8055 (BIT_MASK_MGQ_TXBD_DESA_8812F << BIT_SHIFT_MGQ_TXBD_DESA_8812F) 8056 #define BIT_CLEAR_MGQ_TXBD_DESA_8812F(x) ((x) & (~BITS_MGQ_TXBD_DESA_8812F)) 8057 #define BIT_GET_MGQ_TXBD_DESA_8812F(x) \ 8058 (((x) >> BIT_SHIFT_MGQ_TXBD_DESA_8812F) & BIT_MASK_MGQ_TXBD_DESA_8812F) 8059 #define BIT_SET_MGQ_TXBD_DESA_8812F(x, v) \ 8060 (BIT_CLEAR_MGQ_TXBD_DESA_8812F(x) | BIT_MGQ_TXBD_DESA_8812F(v)) 8061 8062 /* 2 REG_VOQ_TXBD_DESA_8812F */ 8063 8064 #define BIT_SHIFT_VOQ_TXBD_DESA_8812F 0 8065 #define BIT_MASK_VOQ_TXBD_DESA_8812F 0xffffffffffffffffL 8066 #define BIT_VOQ_TXBD_DESA_8812F(x) \ 8067 (((x) & BIT_MASK_VOQ_TXBD_DESA_8812F) << BIT_SHIFT_VOQ_TXBD_DESA_8812F) 8068 #define BITS_VOQ_TXBD_DESA_8812F \ 8069 (BIT_MASK_VOQ_TXBD_DESA_8812F << BIT_SHIFT_VOQ_TXBD_DESA_8812F) 8070 #define BIT_CLEAR_VOQ_TXBD_DESA_8812F(x) ((x) & (~BITS_VOQ_TXBD_DESA_8812F)) 8071 #define BIT_GET_VOQ_TXBD_DESA_8812F(x) \ 8072 (((x) >> BIT_SHIFT_VOQ_TXBD_DESA_8812F) & BIT_MASK_VOQ_TXBD_DESA_8812F) 8073 #define BIT_SET_VOQ_TXBD_DESA_8812F(x, v) \ 8074 (BIT_CLEAR_VOQ_TXBD_DESA_8812F(x) | BIT_VOQ_TXBD_DESA_8812F(v)) 8075 8076 /* 2 REG_VIQ_TXBD_DESA_8812F */ 8077 8078 #define BIT_SHIFT_VIQ_TXBD_DESA_8812F 0 8079 #define BIT_MASK_VIQ_TXBD_DESA_8812F 0xffffffffffffffffL 8080 #define BIT_VIQ_TXBD_DESA_8812F(x) \ 8081 (((x) & BIT_MASK_VIQ_TXBD_DESA_8812F) << BIT_SHIFT_VIQ_TXBD_DESA_8812F) 8082 #define BITS_VIQ_TXBD_DESA_8812F \ 8083 (BIT_MASK_VIQ_TXBD_DESA_8812F << BIT_SHIFT_VIQ_TXBD_DESA_8812F) 8084 #define BIT_CLEAR_VIQ_TXBD_DESA_8812F(x) ((x) & (~BITS_VIQ_TXBD_DESA_8812F)) 8085 #define BIT_GET_VIQ_TXBD_DESA_8812F(x) \ 8086 (((x) >> BIT_SHIFT_VIQ_TXBD_DESA_8812F) & BIT_MASK_VIQ_TXBD_DESA_8812F) 8087 #define BIT_SET_VIQ_TXBD_DESA_8812F(x, v) \ 8088 (BIT_CLEAR_VIQ_TXBD_DESA_8812F(x) | BIT_VIQ_TXBD_DESA_8812F(v)) 8089 8090 /* 2 REG_BEQ_TXBD_DESA_8812F */ 8091 8092 #define BIT_SHIFT_BEQ_TXBD_DESA_8812F 0 8093 #define BIT_MASK_BEQ_TXBD_DESA_8812F 0xffffffffffffffffL 8094 #define BIT_BEQ_TXBD_DESA_8812F(x) \ 8095 (((x) & BIT_MASK_BEQ_TXBD_DESA_8812F) << BIT_SHIFT_BEQ_TXBD_DESA_8812F) 8096 #define BITS_BEQ_TXBD_DESA_8812F \ 8097 (BIT_MASK_BEQ_TXBD_DESA_8812F << BIT_SHIFT_BEQ_TXBD_DESA_8812F) 8098 #define BIT_CLEAR_BEQ_TXBD_DESA_8812F(x) ((x) & (~BITS_BEQ_TXBD_DESA_8812F)) 8099 #define BIT_GET_BEQ_TXBD_DESA_8812F(x) \ 8100 (((x) >> BIT_SHIFT_BEQ_TXBD_DESA_8812F) & BIT_MASK_BEQ_TXBD_DESA_8812F) 8101 #define BIT_SET_BEQ_TXBD_DESA_8812F(x, v) \ 8102 (BIT_CLEAR_BEQ_TXBD_DESA_8812F(x) | BIT_BEQ_TXBD_DESA_8812F(v)) 8103 8104 /* 2 REG_BKQ_TXBD_DESA_8812F */ 8105 8106 #define BIT_SHIFT_BKQ_TXBD_DESA_8812F 0 8107 #define BIT_MASK_BKQ_TXBD_DESA_8812F 0xffffffffffffffffL 8108 #define BIT_BKQ_TXBD_DESA_8812F(x) \ 8109 (((x) & BIT_MASK_BKQ_TXBD_DESA_8812F) << BIT_SHIFT_BKQ_TXBD_DESA_8812F) 8110 #define BITS_BKQ_TXBD_DESA_8812F \ 8111 (BIT_MASK_BKQ_TXBD_DESA_8812F << BIT_SHIFT_BKQ_TXBD_DESA_8812F) 8112 #define BIT_CLEAR_BKQ_TXBD_DESA_8812F(x) ((x) & (~BITS_BKQ_TXBD_DESA_8812F)) 8113 #define BIT_GET_BKQ_TXBD_DESA_8812F(x) \ 8114 (((x) >> BIT_SHIFT_BKQ_TXBD_DESA_8812F) & BIT_MASK_BKQ_TXBD_DESA_8812F) 8115 #define BIT_SET_BKQ_TXBD_DESA_8812F(x, v) \ 8116 (BIT_CLEAR_BKQ_TXBD_DESA_8812F(x) | BIT_BKQ_TXBD_DESA_8812F(v)) 8117 8118 /* 2 REG_RXQ_RXBD_DESA_8812F */ 8119 8120 #define BIT_SHIFT_RXQ_RXBD_DESA_8812F 0 8121 #define BIT_MASK_RXQ_RXBD_DESA_8812F 0xffffffffffffffffL 8122 #define BIT_RXQ_RXBD_DESA_8812F(x) \ 8123 (((x) & BIT_MASK_RXQ_RXBD_DESA_8812F) << BIT_SHIFT_RXQ_RXBD_DESA_8812F) 8124 #define BITS_RXQ_RXBD_DESA_8812F \ 8125 (BIT_MASK_RXQ_RXBD_DESA_8812F << BIT_SHIFT_RXQ_RXBD_DESA_8812F) 8126 #define BIT_CLEAR_RXQ_RXBD_DESA_8812F(x) ((x) & (~BITS_RXQ_RXBD_DESA_8812F)) 8127 #define BIT_GET_RXQ_RXBD_DESA_8812F(x) \ 8128 (((x) >> BIT_SHIFT_RXQ_RXBD_DESA_8812F) & BIT_MASK_RXQ_RXBD_DESA_8812F) 8129 #define BIT_SET_RXQ_RXBD_DESA_8812F(x, v) \ 8130 (BIT_CLEAR_RXQ_RXBD_DESA_8812F(x) | BIT_RXQ_RXBD_DESA_8812F(v)) 8131 8132 /* 2 REG_HI0Q_TXBD_DESA_8812F */ 8133 8134 #define BIT_SHIFT_HI0Q_TXBD_DESA_8812F 0 8135 #define BIT_MASK_HI0Q_TXBD_DESA_8812F 0xffffffffffffffffL 8136 #define BIT_HI0Q_TXBD_DESA_8812F(x) \ 8137 (((x) & BIT_MASK_HI0Q_TXBD_DESA_8812F) \ 8138 << BIT_SHIFT_HI0Q_TXBD_DESA_8812F) 8139 #define BITS_HI0Q_TXBD_DESA_8812F \ 8140 (BIT_MASK_HI0Q_TXBD_DESA_8812F << BIT_SHIFT_HI0Q_TXBD_DESA_8812F) 8141 #define BIT_CLEAR_HI0Q_TXBD_DESA_8812F(x) ((x) & (~BITS_HI0Q_TXBD_DESA_8812F)) 8142 #define BIT_GET_HI0Q_TXBD_DESA_8812F(x) \ 8143 (((x) >> BIT_SHIFT_HI0Q_TXBD_DESA_8812F) & \ 8144 BIT_MASK_HI0Q_TXBD_DESA_8812F) 8145 #define BIT_SET_HI0Q_TXBD_DESA_8812F(x, v) \ 8146 (BIT_CLEAR_HI0Q_TXBD_DESA_8812F(x) | BIT_HI0Q_TXBD_DESA_8812F(v)) 8147 8148 /* 2 REG_HI1Q_TXBD_DESA_8812F */ 8149 8150 #define BIT_SHIFT_HI1Q_TXBD_DESA_8812F 0 8151 #define BIT_MASK_HI1Q_TXBD_DESA_8812F 0xffffffffffffffffL 8152 #define BIT_HI1Q_TXBD_DESA_8812F(x) \ 8153 (((x) & BIT_MASK_HI1Q_TXBD_DESA_8812F) \ 8154 << BIT_SHIFT_HI1Q_TXBD_DESA_8812F) 8155 #define BITS_HI1Q_TXBD_DESA_8812F \ 8156 (BIT_MASK_HI1Q_TXBD_DESA_8812F << BIT_SHIFT_HI1Q_TXBD_DESA_8812F) 8157 #define BIT_CLEAR_HI1Q_TXBD_DESA_8812F(x) ((x) & (~BITS_HI1Q_TXBD_DESA_8812F)) 8158 #define BIT_GET_HI1Q_TXBD_DESA_8812F(x) \ 8159 (((x) >> BIT_SHIFT_HI1Q_TXBD_DESA_8812F) & \ 8160 BIT_MASK_HI1Q_TXBD_DESA_8812F) 8161 #define BIT_SET_HI1Q_TXBD_DESA_8812F(x, v) \ 8162 (BIT_CLEAR_HI1Q_TXBD_DESA_8812F(x) | BIT_HI1Q_TXBD_DESA_8812F(v)) 8163 8164 /* 2 REG_HI2Q_TXBD_DESA_8812F */ 8165 8166 #define BIT_SHIFT_HI2Q_TXBD_DESA_8812F 0 8167 #define BIT_MASK_HI2Q_TXBD_DESA_8812F 0xffffffffffffffffL 8168 #define BIT_HI2Q_TXBD_DESA_8812F(x) \ 8169 (((x) & BIT_MASK_HI2Q_TXBD_DESA_8812F) \ 8170 << BIT_SHIFT_HI2Q_TXBD_DESA_8812F) 8171 #define BITS_HI2Q_TXBD_DESA_8812F \ 8172 (BIT_MASK_HI2Q_TXBD_DESA_8812F << BIT_SHIFT_HI2Q_TXBD_DESA_8812F) 8173 #define BIT_CLEAR_HI2Q_TXBD_DESA_8812F(x) ((x) & (~BITS_HI2Q_TXBD_DESA_8812F)) 8174 #define BIT_GET_HI2Q_TXBD_DESA_8812F(x) \ 8175 (((x) >> BIT_SHIFT_HI2Q_TXBD_DESA_8812F) & \ 8176 BIT_MASK_HI2Q_TXBD_DESA_8812F) 8177 #define BIT_SET_HI2Q_TXBD_DESA_8812F(x, v) \ 8178 (BIT_CLEAR_HI2Q_TXBD_DESA_8812F(x) | BIT_HI2Q_TXBD_DESA_8812F(v)) 8179 8180 /* 2 REG_HI3Q_TXBD_DESA_8812F */ 8181 8182 #define BIT_SHIFT_HI3Q_TXBD_DESA_8812F 0 8183 #define BIT_MASK_HI3Q_TXBD_DESA_8812F 0xffffffffffffffffL 8184 #define BIT_HI3Q_TXBD_DESA_8812F(x) \ 8185 (((x) & BIT_MASK_HI3Q_TXBD_DESA_8812F) \ 8186 << BIT_SHIFT_HI3Q_TXBD_DESA_8812F) 8187 #define BITS_HI3Q_TXBD_DESA_8812F \ 8188 (BIT_MASK_HI3Q_TXBD_DESA_8812F << BIT_SHIFT_HI3Q_TXBD_DESA_8812F) 8189 #define BIT_CLEAR_HI3Q_TXBD_DESA_8812F(x) ((x) & (~BITS_HI3Q_TXBD_DESA_8812F)) 8190 #define BIT_GET_HI3Q_TXBD_DESA_8812F(x) \ 8191 (((x) >> BIT_SHIFT_HI3Q_TXBD_DESA_8812F) & \ 8192 BIT_MASK_HI3Q_TXBD_DESA_8812F) 8193 #define BIT_SET_HI3Q_TXBD_DESA_8812F(x, v) \ 8194 (BIT_CLEAR_HI3Q_TXBD_DESA_8812F(x) | BIT_HI3Q_TXBD_DESA_8812F(v)) 8195 8196 /* 2 REG_HI4Q_TXBD_DESA_8812F */ 8197 8198 #define BIT_SHIFT_HI4Q_TXBD_DESA_8812F 0 8199 #define BIT_MASK_HI4Q_TXBD_DESA_8812F 0xffffffffffffffffL 8200 #define BIT_HI4Q_TXBD_DESA_8812F(x) \ 8201 (((x) & BIT_MASK_HI4Q_TXBD_DESA_8812F) \ 8202 << BIT_SHIFT_HI4Q_TXBD_DESA_8812F) 8203 #define BITS_HI4Q_TXBD_DESA_8812F \ 8204 (BIT_MASK_HI4Q_TXBD_DESA_8812F << BIT_SHIFT_HI4Q_TXBD_DESA_8812F) 8205 #define BIT_CLEAR_HI4Q_TXBD_DESA_8812F(x) ((x) & (~BITS_HI4Q_TXBD_DESA_8812F)) 8206 #define BIT_GET_HI4Q_TXBD_DESA_8812F(x) \ 8207 (((x) >> BIT_SHIFT_HI4Q_TXBD_DESA_8812F) & \ 8208 BIT_MASK_HI4Q_TXBD_DESA_8812F) 8209 #define BIT_SET_HI4Q_TXBD_DESA_8812F(x, v) \ 8210 (BIT_CLEAR_HI4Q_TXBD_DESA_8812F(x) | BIT_HI4Q_TXBD_DESA_8812F(v)) 8211 8212 /* 2 REG_HI5Q_TXBD_DESA_8812F */ 8213 8214 #define BIT_SHIFT_HI5Q_TXBD_DESA_8812F 0 8215 #define BIT_MASK_HI5Q_TXBD_DESA_8812F 0xffffffffffffffffL 8216 #define BIT_HI5Q_TXBD_DESA_8812F(x) \ 8217 (((x) & BIT_MASK_HI5Q_TXBD_DESA_8812F) \ 8218 << BIT_SHIFT_HI5Q_TXBD_DESA_8812F) 8219 #define BITS_HI5Q_TXBD_DESA_8812F \ 8220 (BIT_MASK_HI5Q_TXBD_DESA_8812F << BIT_SHIFT_HI5Q_TXBD_DESA_8812F) 8221 #define BIT_CLEAR_HI5Q_TXBD_DESA_8812F(x) ((x) & (~BITS_HI5Q_TXBD_DESA_8812F)) 8222 #define BIT_GET_HI5Q_TXBD_DESA_8812F(x) \ 8223 (((x) >> BIT_SHIFT_HI5Q_TXBD_DESA_8812F) & \ 8224 BIT_MASK_HI5Q_TXBD_DESA_8812F) 8225 #define BIT_SET_HI5Q_TXBD_DESA_8812F(x, v) \ 8226 (BIT_CLEAR_HI5Q_TXBD_DESA_8812F(x) | BIT_HI5Q_TXBD_DESA_8812F(v)) 8227 8228 /* 2 REG_HI6Q_TXBD_DESA_8812F */ 8229 8230 #define BIT_SHIFT_HI6Q_TXBD_DESA_8812F 0 8231 #define BIT_MASK_HI6Q_TXBD_DESA_8812F 0xffffffffffffffffL 8232 #define BIT_HI6Q_TXBD_DESA_8812F(x) \ 8233 (((x) & BIT_MASK_HI6Q_TXBD_DESA_8812F) \ 8234 << BIT_SHIFT_HI6Q_TXBD_DESA_8812F) 8235 #define BITS_HI6Q_TXBD_DESA_8812F \ 8236 (BIT_MASK_HI6Q_TXBD_DESA_8812F << BIT_SHIFT_HI6Q_TXBD_DESA_8812F) 8237 #define BIT_CLEAR_HI6Q_TXBD_DESA_8812F(x) ((x) & (~BITS_HI6Q_TXBD_DESA_8812F)) 8238 #define BIT_GET_HI6Q_TXBD_DESA_8812F(x) \ 8239 (((x) >> BIT_SHIFT_HI6Q_TXBD_DESA_8812F) & \ 8240 BIT_MASK_HI6Q_TXBD_DESA_8812F) 8241 #define BIT_SET_HI6Q_TXBD_DESA_8812F(x, v) \ 8242 (BIT_CLEAR_HI6Q_TXBD_DESA_8812F(x) | BIT_HI6Q_TXBD_DESA_8812F(v)) 8243 8244 /* 2 REG_HI7Q_TXBD_DESA_8812F */ 8245 8246 #define BIT_SHIFT_HI7Q_TXBD_DESA_8812F 0 8247 #define BIT_MASK_HI7Q_TXBD_DESA_8812F 0xffffffffffffffffL 8248 #define BIT_HI7Q_TXBD_DESA_8812F(x) \ 8249 (((x) & BIT_MASK_HI7Q_TXBD_DESA_8812F) \ 8250 << BIT_SHIFT_HI7Q_TXBD_DESA_8812F) 8251 #define BITS_HI7Q_TXBD_DESA_8812F \ 8252 (BIT_MASK_HI7Q_TXBD_DESA_8812F << BIT_SHIFT_HI7Q_TXBD_DESA_8812F) 8253 #define BIT_CLEAR_HI7Q_TXBD_DESA_8812F(x) ((x) & (~BITS_HI7Q_TXBD_DESA_8812F)) 8254 #define BIT_GET_HI7Q_TXBD_DESA_8812F(x) \ 8255 (((x) >> BIT_SHIFT_HI7Q_TXBD_DESA_8812F) & \ 8256 BIT_MASK_HI7Q_TXBD_DESA_8812F) 8257 #define BIT_SET_HI7Q_TXBD_DESA_8812F(x, v) \ 8258 (BIT_CLEAR_HI7Q_TXBD_DESA_8812F(x) | BIT_HI7Q_TXBD_DESA_8812F(v)) 8259 8260 /* 2 REG_MGQ_TXBD_NUM_8812F */ 8261 #define BIT_PCIE_MGQ_FLAG_8812F BIT(14) 8262 8263 #define BIT_SHIFT_MGQ_DESC_MODE_8812F 12 8264 #define BIT_MASK_MGQ_DESC_MODE_8812F 0x3 8265 #define BIT_MGQ_DESC_MODE_8812F(x) \ 8266 (((x) & BIT_MASK_MGQ_DESC_MODE_8812F) << BIT_SHIFT_MGQ_DESC_MODE_8812F) 8267 #define BITS_MGQ_DESC_MODE_8812F \ 8268 (BIT_MASK_MGQ_DESC_MODE_8812F << BIT_SHIFT_MGQ_DESC_MODE_8812F) 8269 #define BIT_CLEAR_MGQ_DESC_MODE_8812F(x) ((x) & (~BITS_MGQ_DESC_MODE_8812F)) 8270 #define BIT_GET_MGQ_DESC_MODE_8812F(x) \ 8271 (((x) >> BIT_SHIFT_MGQ_DESC_MODE_8812F) & BIT_MASK_MGQ_DESC_MODE_8812F) 8272 #define BIT_SET_MGQ_DESC_MODE_8812F(x, v) \ 8273 (BIT_CLEAR_MGQ_DESC_MODE_8812F(x) | BIT_MGQ_DESC_MODE_8812F(v)) 8274 8275 #define BIT_SHIFT_MGQ_DESC_NUM_8812F 0 8276 #define BIT_MASK_MGQ_DESC_NUM_8812F 0xfff 8277 #define BIT_MGQ_DESC_NUM_8812F(x) \ 8278 (((x) & BIT_MASK_MGQ_DESC_NUM_8812F) << BIT_SHIFT_MGQ_DESC_NUM_8812F) 8279 #define BITS_MGQ_DESC_NUM_8812F \ 8280 (BIT_MASK_MGQ_DESC_NUM_8812F << BIT_SHIFT_MGQ_DESC_NUM_8812F) 8281 #define BIT_CLEAR_MGQ_DESC_NUM_8812F(x) ((x) & (~BITS_MGQ_DESC_NUM_8812F)) 8282 #define BIT_GET_MGQ_DESC_NUM_8812F(x) \ 8283 (((x) >> BIT_SHIFT_MGQ_DESC_NUM_8812F) & BIT_MASK_MGQ_DESC_NUM_8812F) 8284 #define BIT_SET_MGQ_DESC_NUM_8812F(x, v) \ 8285 (BIT_CLEAR_MGQ_DESC_NUM_8812F(x) | BIT_MGQ_DESC_NUM_8812F(v)) 8286 8287 /* 2 REG_RX_RXBD_NUM_8812F */ 8288 #define BIT_SYS_32_64_8812F BIT(15) 8289 8290 #define BIT_SHIFT_BCNQ_DESC_MODE_8812F 13 8291 #define BIT_MASK_BCNQ_DESC_MODE_8812F 0x3 8292 #define BIT_BCNQ_DESC_MODE_8812F(x) \ 8293 (((x) & BIT_MASK_BCNQ_DESC_MODE_8812F) \ 8294 << BIT_SHIFT_BCNQ_DESC_MODE_8812F) 8295 #define BITS_BCNQ_DESC_MODE_8812F \ 8296 (BIT_MASK_BCNQ_DESC_MODE_8812F << BIT_SHIFT_BCNQ_DESC_MODE_8812F) 8297 #define BIT_CLEAR_BCNQ_DESC_MODE_8812F(x) ((x) & (~BITS_BCNQ_DESC_MODE_8812F)) 8298 #define BIT_GET_BCNQ_DESC_MODE_8812F(x) \ 8299 (((x) >> BIT_SHIFT_BCNQ_DESC_MODE_8812F) & \ 8300 BIT_MASK_BCNQ_DESC_MODE_8812F) 8301 #define BIT_SET_BCNQ_DESC_MODE_8812F(x, v) \ 8302 (BIT_CLEAR_BCNQ_DESC_MODE_8812F(x) | BIT_BCNQ_DESC_MODE_8812F(v)) 8303 8304 #define BIT_PCIE_BCNQ_FLAG_8812F BIT(12) 8305 8306 #define BIT_SHIFT_RXQ_DESC_NUM_8812F 0 8307 #define BIT_MASK_RXQ_DESC_NUM_8812F 0xfff 8308 #define BIT_RXQ_DESC_NUM_8812F(x) \ 8309 (((x) & BIT_MASK_RXQ_DESC_NUM_8812F) << BIT_SHIFT_RXQ_DESC_NUM_8812F) 8310 #define BITS_RXQ_DESC_NUM_8812F \ 8311 (BIT_MASK_RXQ_DESC_NUM_8812F << BIT_SHIFT_RXQ_DESC_NUM_8812F) 8312 #define BIT_CLEAR_RXQ_DESC_NUM_8812F(x) ((x) & (~BITS_RXQ_DESC_NUM_8812F)) 8313 #define BIT_GET_RXQ_DESC_NUM_8812F(x) \ 8314 (((x) >> BIT_SHIFT_RXQ_DESC_NUM_8812F) & BIT_MASK_RXQ_DESC_NUM_8812F) 8315 #define BIT_SET_RXQ_DESC_NUM_8812F(x, v) \ 8316 (BIT_CLEAR_RXQ_DESC_NUM_8812F(x) | BIT_RXQ_DESC_NUM_8812F(v)) 8317 8318 /* 2 REG_VOQ_TXBD_NUM_8812F */ 8319 #define BIT_PCIE_VOQ_FLAG_8812F BIT(14) 8320 8321 #define BIT_SHIFT_VOQ_DESC_MODE_8812F 12 8322 #define BIT_MASK_VOQ_DESC_MODE_8812F 0x3 8323 #define BIT_VOQ_DESC_MODE_8812F(x) \ 8324 (((x) & BIT_MASK_VOQ_DESC_MODE_8812F) << BIT_SHIFT_VOQ_DESC_MODE_8812F) 8325 #define BITS_VOQ_DESC_MODE_8812F \ 8326 (BIT_MASK_VOQ_DESC_MODE_8812F << BIT_SHIFT_VOQ_DESC_MODE_8812F) 8327 #define BIT_CLEAR_VOQ_DESC_MODE_8812F(x) ((x) & (~BITS_VOQ_DESC_MODE_8812F)) 8328 #define BIT_GET_VOQ_DESC_MODE_8812F(x) \ 8329 (((x) >> BIT_SHIFT_VOQ_DESC_MODE_8812F) & BIT_MASK_VOQ_DESC_MODE_8812F) 8330 #define BIT_SET_VOQ_DESC_MODE_8812F(x, v) \ 8331 (BIT_CLEAR_VOQ_DESC_MODE_8812F(x) | BIT_VOQ_DESC_MODE_8812F(v)) 8332 8333 #define BIT_SHIFT_VOQ_DESC_NUM_8812F 0 8334 #define BIT_MASK_VOQ_DESC_NUM_8812F 0xfff 8335 #define BIT_VOQ_DESC_NUM_8812F(x) \ 8336 (((x) & BIT_MASK_VOQ_DESC_NUM_8812F) << BIT_SHIFT_VOQ_DESC_NUM_8812F) 8337 #define BITS_VOQ_DESC_NUM_8812F \ 8338 (BIT_MASK_VOQ_DESC_NUM_8812F << BIT_SHIFT_VOQ_DESC_NUM_8812F) 8339 #define BIT_CLEAR_VOQ_DESC_NUM_8812F(x) ((x) & (~BITS_VOQ_DESC_NUM_8812F)) 8340 #define BIT_GET_VOQ_DESC_NUM_8812F(x) \ 8341 (((x) >> BIT_SHIFT_VOQ_DESC_NUM_8812F) & BIT_MASK_VOQ_DESC_NUM_8812F) 8342 #define BIT_SET_VOQ_DESC_NUM_8812F(x, v) \ 8343 (BIT_CLEAR_VOQ_DESC_NUM_8812F(x) | BIT_VOQ_DESC_NUM_8812F(v)) 8344 8345 /* 2 REG_VIQ_TXBD_NUM_8812F */ 8346 #define BIT_PCIE_VIQ_FLAG_8812F BIT(14) 8347 8348 #define BIT_SHIFT_VIQ_DESC_MODE_8812F 12 8349 #define BIT_MASK_VIQ_DESC_MODE_8812F 0x3 8350 #define BIT_VIQ_DESC_MODE_8812F(x) \ 8351 (((x) & BIT_MASK_VIQ_DESC_MODE_8812F) << BIT_SHIFT_VIQ_DESC_MODE_8812F) 8352 #define BITS_VIQ_DESC_MODE_8812F \ 8353 (BIT_MASK_VIQ_DESC_MODE_8812F << BIT_SHIFT_VIQ_DESC_MODE_8812F) 8354 #define BIT_CLEAR_VIQ_DESC_MODE_8812F(x) ((x) & (~BITS_VIQ_DESC_MODE_8812F)) 8355 #define BIT_GET_VIQ_DESC_MODE_8812F(x) \ 8356 (((x) >> BIT_SHIFT_VIQ_DESC_MODE_8812F) & BIT_MASK_VIQ_DESC_MODE_8812F) 8357 #define BIT_SET_VIQ_DESC_MODE_8812F(x, v) \ 8358 (BIT_CLEAR_VIQ_DESC_MODE_8812F(x) | BIT_VIQ_DESC_MODE_8812F(v)) 8359 8360 #define BIT_SHIFT_VIQ_DESC_NUM_8812F 0 8361 #define BIT_MASK_VIQ_DESC_NUM_8812F 0xfff 8362 #define BIT_VIQ_DESC_NUM_8812F(x) \ 8363 (((x) & BIT_MASK_VIQ_DESC_NUM_8812F) << BIT_SHIFT_VIQ_DESC_NUM_8812F) 8364 #define BITS_VIQ_DESC_NUM_8812F \ 8365 (BIT_MASK_VIQ_DESC_NUM_8812F << BIT_SHIFT_VIQ_DESC_NUM_8812F) 8366 #define BIT_CLEAR_VIQ_DESC_NUM_8812F(x) ((x) & (~BITS_VIQ_DESC_NUM_8812F)) 8367 #define BIT_GET_VIQ_DESC_NUM_8812F(x) \ 8368 (((x) >> BIT_SHIFT_VIQ_DESC_NUM_8812F) & BIT_MASK_VIQ_DESC_NUM_8812F) 8369 #define BIT_SET_VIQ_DESC_NUM_8812F(x, v) \ 8370 (BIT_CLEAR_VIQ_DESC_NUM_8812F(x) | BIT_VIQ_DESC_NUM_8812F(v)) 8371 8372 /* 2 REG_BEQ_TXBD_NUM_8812F */ 8373 #define BIT_PCIE_BEQ_FLAG_8812F BIT(14) 8374 8375 #define BIT_SHIFT_BEQ_DESC_MODE_8812F 12 8376 #define BIT_MASK_BEQ_DESC_MODE_8812F 0x3 8377 #define BIT_BEQ_DESC_MODE_8812F(x) \ 8378 (((x) & BIT_MASK_BEQ_DESC_MODE_8812F) << BIT_SHIFT_BEQ_DESC_MODE_8812F) 8379 #define BITS_BEQ_DESC_MODE_8812F \ 8380 (BIT_MASK_BEQ_DESC_MODE_8812F << BIT_SHIFT_BEQ_DESC_MODE_8812F) 8381 #define BIT_CLEAR_BEQ_DESC_MODE_8812F(x) ((x) & (~BITS_BEQ_DESC_MODE_8812F)) 8382 #define BIT_GET_BEQ_DESC_MODE_8812F(x) \ 8383 (((x) >> BIT_SHIFT_BEQ_DESC_MODE_8812F) & BIT_MASK_BEQ_DESC_MODE_8812F) 8384 #define BIT_SET_BEQ_DESC_MODE_8812F(x, v) \ 8385 (BIT_CLEAR_BEQ_DESC_MODE_8812F(x) | BIT_BEQ_DESC_MODE_8812F(v)) 8386 8387 #define BIT_SHIFT_BEQ_DESC_NUM_8812F 0 8388 #define BIT_MASK_BEQ_DESC_NUM_8812F 0xfff 8389 #define BIT_BEQ_DESC_NUM_8812F(x) \ 8390 (((x) & BIT_MASK_BEQ_DESC_NUM_8812F) << BIT_SHIFT_BEQ_DESC_NUM_8812F) 8391 #define BITS_BEQ_DESC_NUM_8812F \ 8392 (BIT_MASK_BEQ_DESC_NUM_8812F << BIT_SHIFT_BEQ_DESC_NUM_8812F) 8393 #define BIT_CLEAR_BEQ_DESC_NUM_8812F(x) ((x) & (~BITS_BEQ_DESC_NUM_8812F)) 8394 #define BIT_GET_BEQ_DESC_NUM_8812F(x) \ 8395 (((x) >> BIT_SHIFT_BEQ_DESC_NUM_8812F) & BIT_MASK_BEQ_DESC_NUM_8812F) 8396 #define BIT_SET_BEQ_DESC_NUM_8812F(x, v) \ 8397 (BIT_CLEAR_BEQ_DESC_NUM_8812F(x) | BIT_BEQ_DESC_NUM_8812F(v)) 8398 8399 /* 2 REG_BKQ_TXBD_NUM_8812F */ 8400 #define BIT_PCIE_BKQ_FLAG_8812F BIT(14) 8401 8402 #define BIT_SHIFT_BKQ_DESC_MODE_8812F 12 8403 #define BIT_MASK_BKQ_DESC_MODE_8812F 0x3 8404 #define BIT_BKQ_DESC_MODE_8812F(x) \ 8405 (((x) & BIT_MASK_BKQ_DESC_MODE_8812F) << BIT_SHIFT_BKQ_DESC_MODE_8812F) 8406 #define BITS_BKQ_DESC_MODE_8812F \ 8407 (BIT_MASK_BKQ_DESC_MODE_8812F << BIT_SHIFT_BKQ_DESC_MODE_8812F) 8408 #define BIT_CLEAR_BKQ_DESC_MODE_8812F(x) ((x) & (~BITS_BKQ_DESC_MODE_8812F)) 8409 #define BIT_GET_BKQ_DESC_MODE_8812F(x) \ 8410 (((x) >> BIT_SHIFT_BKQ_DESC_MODE_8812F) & BIT_MASK_BKQ_DESC_MODE_8812F) 8411 #define BIT_SET_BKQ_DESC_MODE_8812F(x, v) \ 8412 (BIT_CLEAR_BKQ_DESC_MODE_8812F(x) | BIT_BKQ_DESC_MODE_8812F(v)) 8413 8414 #define BIT_SHIFT_BKQ_DESC_NUM_8812F 0 8415 #define BIT_MASK_BKQ_DESC_NUM_8812F 0xfff 8416 #define BIT_BKQ_DESC_NUM_8812F(x) \ 8417 (((x) & BIT_MASK_BKQ_DESC_NUM_8812F) << BIT_SHIFT_BKQ_DESC_NUM_8812F) 8418 #define BITS_BKQ_DESC_NUM_8812F \ 8419 (BIT_MASK_BKQ_DESC_NUM_8812F << BIT_SHIFT_BKQ_DESC_NUM_8812F) 8420 #define BIT_CLEAR_BKQ_DESC_NUM_8812F(x) ((x) & (~BITS_BKQ_DESC_NUM_8812F)) 8421 #define BIT_GET_BKQ_DESC_NUM_8812F(x) \ 8422 (((x) >> BIT_SHIFT_BKQ_DESC_NUM_8812F) & BIT_MASK_BKQ_DESC_NUM_8812F) 8423 #define BIT_SET_BKQ_DESC_NUM_8812F(x, v) \ 8424 (BIT_CLEAR_BKQ_DESC_NUM_8812F(x) | BIT_BKQ_DESC_NUM_8812F(v)) 8425 8426 /* 2 REG_HI0Q_TXBD_NUM_8812F */ 8427 #define BIT_HI0Q_FLAG_8812F BIT(14) 8428 8429 #define BIT_SHIFT_HI0Q_DESC_MODE_8812F 12 8430 #define BIT_MASK_HI0Q_DESC_MODE_8812F 0x3 8431 #define BIT_HI0Q_DESC_MODE_8812F(x) \ 8432 (((x) & BIT_MASK_HI0Q_DESC_MODE_8812F) \ 8433 << BIT_SHIFT_HI0Q_DESC_MODE_8812F) 8434 #define BITS_HI0Q_DESC_MODE_8812F \ 8435 (BIT_MASK_HI0Q_DESC_MODE_8812F << BIT_SHIFT_HI0Q_DESC_MODE_8812F) 8436 #define BIT_CLEAR_HI0Q_DESC_MODE_8812F(x) ((x) & (~BITS_HI0Q_DESC_MODE_8812F)) 8437 #define BIT_GET_HI0Q_DESC_MODE_8812F(x) \ 8438 (((x) >> BIT_SHIFT_HI0Q_DESC_MODE_8812F) & \ 8439 BIT_MASK_HI0Q_DESC_MODE_8812F) 8440 #define BIT_SET_HI0Q_DESC_MODE_8812F(x, v) \ 8441 (BIT_CLEAR_HI0Q_DESC_MODE_8812F(x) | BIT_HI0Q_DESC_MODE_8812F(v)) 8442 8443 #define BIT_SHIFT_HI0Q_DESC_NUM_8812F 0 8444 #define BIT_MASK_HI0Q_DESC_NUM_8812F 0xfff 8445 #define BIT_HI0Q_DESC_NUM_8812F(x) \ 8446 (((x) & BIT_MASK_HI0Q_DESC_NUM_8812F) << BIT_SHIFT_HI0Q_DESC_NUM_8812F) 8447 #define BITS_HI0Q_DESC_NUM_8812F \ 8448 (BIT_MASK_HI0Q_DESC_NUM_8812F << BIT_SHIFT_HI0Q_DESC_NUM_8812F) 8449 #define BIT_CLEAR_HI0Q_DESC_NUM_8812F(x) ((x) & (~BITS_HI0Q_DESC_NUM_8812F)) 8450 #define BIT_GET_HI0Q_DESC_NUM_8812F(x) \ 8451 (((x) >> BIT_SHIFT_HI0Q_DESC_NUM_8812F) & BIT_MASK_HI0Q_DESC_NUM_8812F) 8452 #define BIT_SET_HI0Q_DESC_NUM_8812F(x, v) \ 8453 (BIT_CLEAR_HI0Q_DESC_NUM_8812F(x) | BIT_HI0Q_DESC_NUM_8812F(v)) 8454 8455 /* 2 REG_HI1Q_TXBD_NUM_8812F */ 8456 #define BIT_HI1Q_FLAG_8812F BIT(14) 8457 8458 #define BIT_SHIFT_HI1Q_DESC_MODE_8812F 12 8459 #define BIT_MASK_HI1Q_DESC_MODE_8812F 0x3 8460 #define BIT_HI1Q_DESC_MODE_8812F(x) \ 8461 (((x) & BIT_MASK_HI1Q_DESC_MODE_8812F) \ 8462 << BIT_SHIFT_HI1Q_DESC_MODE_8812F) 8463 #define BITS_HI1Q_DESC_MODE_8812F \ 8464 (BIT_MASK_HI1Q_DESC_MODE_8812F << BIT_SHIFT_HI1Q_DESC_MODE_8812F) 8465 #define BIT_CLEAR_HI1Q_DESC_MODE_8812F(x) ((x) & (~BITS_HI1Q_DESC_MODE_8812F)) 8466 #define BIT_GET_HI1Q_DESC_MODE_8812F(x) \ 8467 (((x) >> BIT_SHIFT_HI1Q_DESC_MODE_8812F) & \ 8468 BIT_MASK_HI1Q_DESC_MODE_8812F) 8469 #define BIT_SET_HI1Q_DESC_MODE_8812F(x, v) \ 8470 (BIT_CLEAR_HI1Q_DESC_MODE_8812F(x) | BIT_HI1Q_DESC_MODE_8812F(v)) 8471 8472 #define BIT_SHIFT_HI1Q_DESC_NUM_8812F 0 8473 #define BIT_MASK_HI1Q_DESC_NUM_8812F 0xfff 8474 #define BIT_HI1Q_DESC_NUM_8812F(x) \ 8475 (((x) & BIT_MASK_HI1Q_DESC_NUM_8812F) << BIT_SHIFT_HI1Q_DESC_NUM_8812F) 8476 #define BITS_HI1Q_DESC_NUM_8812F \ 8477 (BIT_MASK_HI1Q_DESC_NUM_8812F << BIT_SHIFT_HI1Q_DESC_NUM_8812F) 8478 #define BIT_CLEAR_HI1Q_DESC_NUM_8812F(x) ((x) & (~BITS_HI1Q_DESC_NUM_8812F)) 8479 #define BIT_GET_HI1Q_DESC_NUM_8812F(x) \ 8480 (((x) >> BIT_SHIFT_HI1Q_DESC_NUM_8812F) & BIT_MASK_HI1Q_DESC_NUM_8812F) 8481 #define BIT_SET_HI1Q_DESC_NUM_8812F(x, v) \ 8482 (BIT_CLEAR_HI1Q_DESC_NUM_8812F(x) | BIT_HI1Q_DESC_NUM_8812F(v)) 8483 8484 /* 2 REG_HI2Q_TXBD_NUM_8812F */ 8485 #define BIT_HI2Q_FLAG_8812F BIT(14) 8486 8487 #define BIT_SHIFT_HI2Q_DESC_MODE_8812F 12 8488 #define BIT_MASK_HI2Q_DESC_MODE_8812F 0x3 8489 #define BIT_HI2Q_DESC_MODE_8812F(x) \ 8490 (((x) & BIT_MASK_HI2Q_DESC_MODE_8812F) \ 8491 << BIT_SHIFT_HI2Q_DESC_MODE_8812F) 8492 #define BITS_HI2Q_DESC_MODE_8812F \ 8493 (BIT_MASK_HI2Q_DESC_MODE_8812F << BIT_SHIFT_HI2Q_DESC_MODE_8812F) 8494 #define BIT_CLEAR_HI2Q_DESC_MODE_8812F(x) ((x) & (~BITS_HI2Q_DESC_MODE_8812F)) 8495 #define BIT_GET_HI2Q_DESC_MODE_8812F(x) \ 8496 (((x) >> BIT_SHIFT_HI2Q_DESC_MODE_8812F) & \ 8497 BIT_MASK_HI2Q_DESC_MODE_8812F) 8498 #define BIT_SET_HI2Q_DESC_MODE_8812F(x, v) \ 8499 (BIT_CLEAR_HI2Q_DESC_MODE_8812F(x) | BIT_HI2Q_DESC_MODE_8812F(v)) 8500 8501 #define BIT_SHIFT_HI2Q_DESC_NUM_8812F 0 8502 #define BIT_MASK_HI2Q_DESC_NUM_8812F 0xfff 8503 #define BIT_HI2Q_DESC_NUM_8812F(x) \ 8504 (((x) & BIT_MASK_HI2Q_DESC_NUM_8812F) << BIT_SHIFT_HI2Q_DESC_NUM_8812F) 8505 #define BITS_HI2Q_DESC_NUM_8812F \ 8506 (BIT_MASK_HI2Q_DESC_NUM_8812F << BIT_SHIFT_HI2Q_DESC_NUM_8812F) 8507 #define BIT_CLEAR_HI2Q_DESC_NUM_8812F(x) ((x) & (~BITS_HI2Q_DESC_NUM_8812F)) 8508 #define BIT_GET_HI2Q_DESC_NUM_8812F(x) \ 8509 (((x) >> BIT_SHIFT_HI2Q_DESC_NUM_8812F) & BIT_MASK_HI2Q_DESC_NUM_8812F) 8510 #define BIT_SET_HI2Q_DESC_NUM_8812F(x, v) \ 8511 (BIT_CLEAR_HI2Q_DESC_NUM_8812F(x) | BIT_HI2Q_DESC_NUM_8812F(v)) 8512 8513 /* 2 REG_HI3Q_TXBD_NUM_8812F */ 8514 #define BIT_HI3Q_FLAG_8812F BIT(14) 8515 8516 #define BIT_SHIFT_HI3Q_DESC_MODE_8812F 12 8517 #define BIT_MASK_HI3Q_DESC_MODE_8812F 0x3 8518 #define BIT_HI3Q_DESC_MODE_8812F(x) \ 8519 (((x) & BIT_MASK_HI3Q_DESC_MODE_8812F) \ 8520 << BIT_SHIFT_HI3Q_DESC_MODE_8812F) 8521 #define BITS_HI3Q_DESC_MODE_8812F \ 8522 (BIT_MASK_HI3Q_DESC_MODE_8812F << BIT_SHIFT_HI3Q_DESC_MODE_8812F) 8523 #define BIT_CLEAR_HI3Q_DESC_MODE_8812F(x) ((x) & (~BITS_HI3Q_DESC_MODE_8812F)) 8524 #define BIT_GET_HI3Q_DESC_MODE_8812F(x) \ 8525 (((x) >> BIT_SHIFT_HI3Q_DESC_MODE_8812F) & \ 8526 BIT_MASK_HI3Q_DESC_MODE_8812F) 8527 #define BIT_SET_HI3Q_DESC_MODE_8812F(x, v) \ 8528 (BIT_CLEAR_HI3Q_DESC_MODE_8812F(x) | BIT_HI3Q_DESC_MODE_8812F(v)) 8529 8530 #define BIT_SHIFT_HI3Q_DESC_NUM_8812F 0 8531 #define BIT_MASK_HI3Q_DESC_NUM_8812F 0xfff 8532 #define BIT_HI3Q_DESC_NUM_8812F(x) \ 8533 (((x) & BIT_MASK_HI3Q_DESC_NUM_8812F) << BIT_SHIFT_HI3Q_DESC_NUM_8812F) 8534 #define BITS_HI3Q_DESC_NUM_8812F \ 8535 (BIT_MASK_HI3Q_DESC_NUM_8812F << BIT_SHIFT_HI3Q_DESC_NUM_8812F) 8536 #define BIT_CLEAR_HI3Q_DESC_NUM_8812F(x) ((x) & (~BITS_HI3Q_DESC_NUM_8812F)) 8537 #define BIT_GET_HI3Q_DESC_NUM_8812F(x) \ 8538 (((x) >> BIT_SHIFT_HI3Q_DESC_NUM_8812F) & BIT_MASK_HI3Q_DESC_NUM_8812F) 8539 #define BIT_SET_HI3Q_DESC_NUM_8812F(x, v) \ 8540 (BIT_CLEAR_HI3Q_DESC_NUM_8812F(x) | BIT_HI3Q_DESC_NUM_8812F(v)) 8541 8542 /* 2 REG_HI4Q_TXBD_NUM_8812F */ 8543 #define BIT_HI4Q_FLAG_8812F BIT(14) 8544 8545 #define BIT_SHIFT_HI4Q_DESC_MODE_8812F 12 8546 #define BIT_MASK_HI4Q_DESC_MODE_8812F 0x3 8547 #define BIT_HI4Q_DESC_MODE_8812F(x) \ 8548 (((x) & BIT_MASK_HI4Q_DESC_MODE_8812F) \ 8549 << BIT_SHIFT_HI4Q_DESC_MODE_8812F) 8550 #define BITS_HI4Q_DESC_MODE_8812F \ 8551 (BIT_MASK_HI4Q_DESC_MODE_8812F << BIT_SHIFT_HI4Q_DESC_MODE_8812F) 8552 #define BIT_CLEAR_HI4Q_DESC_MODE_8812F(x) ((x) & (~BITS_HI4Q_DESC_MODE_8812F)) 8553 #define BIT_GET_HI4Q_DESC_MODE_8812F(x) \ 8554 (((x) >> BIT_SHIFT_HI4Q_DESC_MODE_8812F) & \ 8555 BIT_MASK_HI4Q_DESC_MODE_8812F) 8556 #define BIT_SET_HI4Q_DESC_MODE_8812F(x, v) \ 8557 (BIT_CLEAR_HI4Q_DESC_MODE_8812F(x) | BIT_HI4Q_DESC_MODE_8812F(v)) 8558 8559 #define BIT_SHIFT_HI4Q_DESC_NUM_8812F 0 8560 #define BIT_MASK_HI4Q_DESC_NUM_8812F 0xfff 8561 #define BIT_HI4Q_DESC_NUM_8812F(x) \ 8562 (((x) & BIT_MASK_HI4Q_DESC_NUM_8812F) << BIT_SHIFT_HI4Q_DESC_NUM_8812F) 8563 #define BITS_HI4Q_DESC_NUM_8812F \ 8564 (BIT_MASK_HI4Q_DESC_NUM_8812F << BIT_SHIFT_HI4Q_DESC_NUM_8812F) 8565 #define BIT_CLEAR_HI4Q_DESC_NUM_8812F(x) ((x) & (~BITS_HI4Q_DESC_NUM_8812F)) 8566 #define BIT_GET_HI4Q_DESC_NUM_8812F(x) \ 8567 (((x) >> BIT_SHIFT_HI4Q_DESC_NUM_8812F) & BIT_MASK_HI4Q_DESC_NUM_8812F) 8568 #define BIT_SET_HI4Q_DESC_NUM_8812F(x, v) \ 8569 (BIT_CLEAR_HI4Q_DESC_NUM_8812F(x) | BIT_HI4Q_DESC_NUM_8812F(v)) 8570 8571 /* 2 REG_HI5Q_TXBD_NUM_8812F */ 8572 #define BIT_HI5Q_FLAG_8812F BIT(14) 8573 8574 #define BIT_SHIFT_HI5Q_DESC_MODE_8812F 12 8575 #define BIT_MASK_HI5Q_DESC_MODE_8812F 0x3 8576 #define BIT_HI5Q_DESC_MODE_8812F(x) \ 8577 (((x) & BIT_MASK_HI5Q_DESC_MODE_8812F) \ 8578 << BIT_SHIFT_HI5Q_DESC_MODE_8812F) 8579 #define BITS_HI5Q_DESC_MODE_8812F \ 8580 (BIT_MASK_HI5Q_DESC_MODE_8812F << BIT_SHIFT_HI5Q_DESC_MODE_8812F) 8581 #define BIT_CLEAR_HI5Q_DESC_MODE_8812F(x) ((x) & (~BITS_HI5Q_DESC_MODE_8812F)) 8582 #define BIT_GET_HI5Q_DESC_MODE_8812F(x) \ 8583 (((x) >> BIT_SHIFT_HI5Q_DESC_MODE_8812F) & \ 8584 BIT_MASK_HI5Q_DESC_MODE_8812F) 8585 #define BIT_SET_HI5Q_DESC_MODE_8812F(x, v) \ 8586 (BIT_CLEAR_HI5Q_DESC_MODE_8812F(x) | BIT_HI5Q_DESC_MODE_8812F(v)) 8587 8588 #define BIT_SHIFT_HI5Q_DESC_NUM_8812F 0 8589 #define BIT_MASK_HI5Q_DESC_NUM_8812F 0xfff 8590 #define BIT_HI5Q_DESC_NUM_8812F(x) \ 8591 (((x) & BIT_MASK_HI5Q_DESC_NUM_8812F) << BIT_SHIFT_HI5Q_DESC_NUM_8812F) 8592 #define BITS_HI5Q_DESC_NUM_8812F \ 8593 (BIT_MASK_HI5Q_DESC_NUM_8812F << BIT_SHIFT_HI5Q_DESC_NUM_8812F) 8594 #define BIT_CLEAR_HI5Q_DESC_NUM_8812F(x) ((x) & (~BITS_HI5Q_DESC_NUM_8812F)) 8595 #define BIT_GET_HI5Q_DESC_NUM_8812F(x) \ 8596 (((x) >> BIT_SHIFT_HI5Q_DESC_NUM_8812F) & BIT_MASK_HI5Q_DESC_NUM_8812F) 8597 #define BIT_SET_HI5Q_DESC_NUM_8812F(x, v) \ 8598 (BIT_CLEAR_HI5Q_DESC_NUM_8812F(x) | BIT_HI5Q_DESC_NUM_8812F(v)) 8599 8600 /* 2 REG_HI6Q_TXBD_NUM_8812F */ 8601 #define BIT_HI6Q_FLAG_8812F BIT(14) 8602 8603 #define BIT_SHIFT_HI6Q_DESC_MODE_8812F 12 8604 #define BIT_MASK_HI6Q_DESC_MODE_8812F 0x3 8605 #define BIT_HI6Q_DESC_MODE_8812F(x) \ 8606 (((x) & BIT_MASK_HI6Q_DESC_MODE_8812F) \ 8607 << BIT_SHIFT_HI6Q_DESC_MODE_8812F) 8608 #define BITS_HI6Q_DESC_MODE_8812F \ 8609 (BIT_MASK_HI6Q_DESC_MODE_8812F << BIT_SHIFT_HI6Q_DESC_MODE_8812F) 8610 #define BIT_CLEAR_HI6Q_DESC_MODE_8812F(x) ((x) & (~BITS_HI6Q_DESC_MODE_8812F)) 8611 #define BIT_GET_HI6Q_DESC_MODE_8812F(x) \ 8612 (((x) >> BIT_SHIFT_HI6Q_DESC_MODE_8812F) & \ 8613 BIT_MASK_HI6Q_DESC_MODE_8812F) 8614 #define BIT_SET_HI6Q_DESC_MODE_8812F(x, v) \ 8615 (BIT_CLEAR_HI6Q_DESC_MODE_8812F(x) | BIT_HI6Q_DESC_MODE_8812F(v)) 8616 8617 #define BIT_SHIFT_HI6Q_DESC_NUM_8812F 0 8618 #define BIT_MASK_HI6Q_DESC_NUM_8812F 0xfff 8619 #define BIT_HI6Q_DESC_NUM_8812F(x) \ 8620 (((x) & BIT_MASK_HI6Q_DESC_NUM_8812F) << BIT_SHIFT_HI6Q_DESC_NUM_8812F) 8621 #define BITS_HI6Q_DESC_NUM_8812F \ 8622 (BIT_MASK_HI6Q_DESC_NUM_8812F << BIT_SHIFT_HI6Q_DESC_NUM_8812F) 8623 #define BIT_CLEAR_HI6Q_DESC_NUM_8812F(x) ((x) & (~BITS_HI6Q_DESC_NUM_8812F)) 8624 #define BIT_GET_HI6Q_DESC_NUM_8812F(x) \ 8625 (((x) >> BIT_SHIFT_HI6Q_DESC_NUM_8812F) & BIT_MASK_HI6Q_DESC_NUM_8812F) 8626 #define BIT_SET_HI6Q_DESC_NUM_8812F(x, v) \ 8627 (BIT_CLEAR_HI6Q_DESC_NUM_8812F(x) | BIT_HI6Q_DESC_NUM_8812F(v)) 8628 8629 /* 2 REG_HI7Q_TXBD_NUM_8812F */ 8630 #define BIT_HI7Q_FLAG_8812F BIT(14) 8631 8632 #define BIT_SHIFT_HI7Q_DESC_MODE_8812F 12 8633 #define BIT_MASK_HI7Q_DESC_MODE_8812F 0x3 8634 #define BIT_HI7Q_DESC_MODE_8812F(x) \ 8635 (((x) & BIT_MASK_HI7Q_DESC_MODE_8812F) \ 8636 << BIT_SHIFT_HI7Q_DESC_MODE_8812F) 8637 #define BITS_HI7Q_DESC_MODE_8812F \ 8638 (BIT_MASK_HI7Q_DESC_MODE_8812F << BIT_SHIFT_HI7Q_DESC_MODE_8812F) 8639 #define BIT_CLEAR_HI7Q_DESC_MODE_8812F(x) ((x) & (~BITS_HI7Q_DESC_MODE_8812F)) 8640 #define BIT_GET_HI7Q_DESC_MODE_8812F(x) \ 8641 (((x) >> BIT_SHIFT_HI7Q_DESC_MODE_8812F) & \ 8642 BIT_MASK_HI7Q_DESC_MODE_8812F) 8643 #define BIT_SET_HI7Q_DESC_MODE_8812F(x, v) \ 8644 (BIT_CLEAR_HI7Q_DESC_MODE_8812F(x) | BIT_HI7Q_DESC_MODE_8812F(v)) 8645 8646 #define BIT_SHIFT_HI7Q_DESC_NUM_8812F 0 8647 #define BIT_MASK_HI7Q_DESC_NUM_8812F 0xfff 8648 #define BIT_HI7Q_DESC_NUM_8812F(x) \ 8649 (((x) & BIT_MASK_HI7Q_DESC_NUM_8812F) << BIT_SHIFT_HI7Q_DESC_NUM_8812F) 8650 #define BITS_HI7Q_DESC_NUM_8812F \ 8651 (BIT_MASK_HI7Q_DESC_NUM_8812F << BIT_SHIFT_HI7Q_DESC_NUM_8812F) 8652 #define BIT_CLEAR_HI7Q_DESC_NUM_8812F(x) ((x) & (~BITS_HI7Q_DESC_NUM_8812F)) 8653 #define BIT_GET_HI7Q_DESC_NUM_8812F(x) \ 8654 (((x) >> BIT_SHIFT_HI7Q_DESC_NUM_8812F) & BIT_MASK_HI7Q_DESC_NUM_8812F) 8655 #define BIT_SET_HI7Q_DESC_NUM_8812F(x, v) \ 8656 (BIT_CLEAR_HI7Q_DESC_NUM_8812F(x) | BIT_HI7Q_DESC_NUM_8812F(v)) 8657 8658 /* 2 REG_TSFTIMER_HCI_8812F */ 8659 8660 #define BIT_SHIFT_TSFT2_HCI_8812F 16 8661 #define BIT_MASK_TSFT2_HCI_8812F 0xffff 8662 #define BIT_TSFT2_HCI_8812F(x) \ 8663 (((x) & BIT_MASK_TSFT2_HCI_8812F) << BIT_SHIFT_TSFT2_HCI_8812F) 8664 #define BITS_TSFT2_HCI_8812F \ 8665 (BIT_MASK_TSFT2_HCI_8812F << BIT_SHIFT_TSFT2_HCI_8812F) 8666 #define BIT_CLEAR_TSFT2_HCI_8812F(x) ((x) & (~BITS_TSFT2_HCI_8812F)) 8667 #define BIT_GET_TSFT2_HCI_8812F(x) \ 8668 (((x) >> BIT_SHIFT_TSFT2_HCI_8812F) & BIT_MASK_TSFT2_HCI_8812F) 8669 #define BIT_SET_TSFT2_HCI_8812F(x, v) \ 8670 (BIT_CLEAR_TSFT2_HCI_8812F(x) | BIT_TSFT2_HCI_8812F(v)) 8671 8672 #define BIT_SHIFT_TSFT1_HCI_8812F 0 8673 #define BIT_MASK_TSFT1_HCI_8812F 0xffff 8674 #define BIT_TSFT1_HCI_8812F(x) \ 8675 (((x) & BIT_MASK_TSFT1_HCI_8812F) << BIT_SHIFT_TSFT1_HCI_8812F) 8676 #define BITS_TSFT1_HCI_8812F \ 8677 (BIT_MASK_TSFT1_HCI_8812F << BIT_SHIFT_TSFT1_HCI_8812F) 8678 #define BIT_CLEAR_TSFT1_HCI_8812F(x) ((x) & (~BITS_TSFT1_HCI_8812F)) 8679 #define BIT_GET_TSFT1_HCI_8812F(x) \ 8680 (((x) >> BIT_SHIFT_TSFT1_HCI_8812F) & BIT_MASK_TSFT1_HCI_8812F) 8681 #define BIT_SET_TSFT1_HCI_8812F(x, v) \ 8682 (BIT_CLEAR_TSFT1_HCI_8812F(x) | BIT_TSFT1_HCI_8812F(v)) 8683 8684 /* 2 REG_BD_RWPTR_CLR_8812F */ 8685 #define BIT_CLR_HI7Q_HW_IDX_8812F BIT(29) 8686 #define BIT_CLR_HI6Q_HW_IDX_8812F BIT(28) 8687 #define BIT_CLR_HI5Q_HW_IDX_8812F BIT(27) 8688 #define BIT_CLR_HI4Q_HW_IDX_8812F BIT(26) 8689 #define BIT_CLR_HI3Q_HW_IDX_8812F BIT(25) 8690 #define BIT_CLR_HI2Q_HW_IDX_8812F BIT(24) 8691 #define BIT_CLR_HI1Q_HW_IDX_8812F BIT(23) 8692 #define BIT_CLR_HI0Q_HW_IDX_8812F BIT(22) 8693 #define BIT_CLR_BKQ_HW_IDX_8812F BIT(21) 8694 #define BIT_CLR_BEQ_HW_IDX_8812F BIT(20) 8695 #define BIT_CLR_VIQ_HW_IDX_8812F BIT(19) 8696 #define BIT_CLR_VOQ_HW_IDX_8812F BIT(18) 8697 #define BIT_CLR_MGQ_HW_IDX_8812F BIT(17) 8698 #define BIT_CLR_RXQ_HW_IDX_8812F BIT(16) 8699 #define BIT_CLR_HI7Q_HOST_IDX_8812F BIT(13) 8700 #define BIT_CLR_HI6Q_HOST_IDX_8812F BIT(12) 8701 #define BIT_CLR_HI5Q_HOST_IDX_8812F BIT(11) 8702 #define BIT_CLR_HI4Q_HOST_IDX_8812F BIT(10) 8703 #define BIT_CLR_HI3Q_HOST_IDX_8812F BIT(9) 8704 #define BIT_CLR_HI2Q_HOST_IDX_8812F BIT(8) 8705 #define BIT_CLR_HI1Q_HOST_IDX_8812F BIT(7) 8706 #define BIT_CLR_HI0Q_HOST_IDX_8812F BIT(6) 8707 #define BIT_CLR_BKQ_HOST_IDX_8812F BIT(5) 8708 #define BIT_CLR_BEQ_HOST_IDX_8812F BIT(4) 8709 #define BIT_CLR_VIQ_HOST_IDX_8812F BIT(3) 8710 #define BIT_CLR_VOQ_HOST_IDX_8812F BIT(2) 8711 #define BIT_CLR_MGQ_HOST_IDX_8812F BIT(1) 8712 #define BIT_CLR_RXQ_HOST_IDX_8812F BIT(0) 8713 8714 /* 2 REG_VOQ_TXBD_IDX_8812F */ 8715 8716 #define BIT_SHIFT_VOQ_HW_IDX_8812F 16 8717 #define BIT_MASK_VOQ_HW_IDX_8812F 0xfff 8718 #define BIT_VOQ_HW_IDX_8812F(x) \ 8719 (((x) & BIT_MASK_VOQ_HW_IDX_8812F) << BIT_SHIFT_VOQ_HW_IDX_8812F) 8720 #define BITS_VOQ_HW_IDX_8812F \ 8721 (BIT_MASK_VOQ_HW_IDX_8812F << BIT_SHIFT_VOQ_HW_IDX_8812F) 8722 #define BIT_CLEAR_VOQ_HW_IDX_8812F(x) ((x) & (~BITS_VOQ_HW_IDX_8812F)) 8723 #define BIT_GET_VOQ_HW_IDX_8812F(x) \ 8724 (((x) >> BIT_SHIFT_VOQ_HW_IDX_8812F) & BIT_MASK_VOQ_HW_IDX_8812F) 8725 #define BIT_SET_VOQ_HW_IDX_8812F(x, v) \ 8726 (BIT_CLEAR_VOQ_HW_IDX_8812F(x) | BIT_VOQ_HW_IDX_8812F(v)) 8727 8728 #define BIT_SHIFT_VOQ_HOST_IDX_8812F 0 8729 #define BIT_MASK_VOQ_HOST_IDX_8812F 0xfff 8730 #define BIT_VOQ_HOST_IDX_8812F(x) \ 8731 (((x) & BIT_MASK_VOQ_HOST_IDX_8812F) << BIT_SHIFT_VOQ_HOST_IDX_8812F) 8732 #define BITS_VOQ_HOST_IDX_8812F \ 8733 (BIT_MASK_VOQ_HOST_IDX_8812F << BIT_SHIFT_VOQ_HOST_IDX_8812F) 8734 #define BIT_CLEAR_VOQ_HOST_IDX_8812F(x) ((x) & (~BITS_VOQ_HOST_IDX_8812F)) 8735 #define BIT_GET_VOQ_HOST_IDX_8812F(x) \ 8736 (((x) >> BIT_SHIFT_VOQ_HOST_IDX_8812F) & BIT_MASK_VOQ_HOST_IDX_8812F) 8737 #define BIT_SET_VOQ_HOST_IDX_8812F(x, v) \ 8738 (BIT_CLEAR_VOQ_HOST_IDX_8812F(x) | BIT_VOQ_HOST_IDX_8812F(v)) 8739 8740 /* 2 REG_VIQ_TXBD_IDX_8812F */ 8741 8742 #define BIT_SHIFT_VIQ_HW_IDX_8812F 16 8743 #define BIT_MASK_VIQ_HW_IDX_8812F 0xfff 8744 #define BIT_VIQ_HW_IDX_8812F(x) \ 8745 (((x) & BIT_MASK_VIQ_HW_IDX_8812F) << BIT_SHIFT_VIQ_HW_IDX_8812F) 8746 #define BITS_VIQ_HW_IDX_8812F \ 8747 (BIT_MASK_VIQ_HW_IDX_8812F << BIT_SHIFT_VIQ_HW_IDX_8812F) 8748 #define BIT_CLEAR_VIQ_HW_IDX_8812F(x) ((x) & (~BITS_VIQ_HW_IDX_8812F)) 8749 #define BIT_GET_VIQ_HW_IDX_8812F(x) \ 8750 (((x) >> BIT_SHIFT_VIQ_HW_IDX_8812F) & BIT_MASK_VIQ_HW_IDX_8812F) 8751 #define BIT_SET_VIQ_HW_IDX_8812F(x, v) \ 8752 (BIT_CLEAR_VIQ_HW_IDX_8812F(x) | BIT_VIQ_HW_IDX_8812F(v)) 8753 8754 #define BIT_SHIFT_VIQ_HOST_IDX_8812F 0 8755 #define BIT_MASK_VIQ_HOST_IDX_8812F 0xfff 8756 #define BIT_VIQ_HOST_IDX_8812F(x) \ 8757 (((x) & BIT_MASK_VIQ_HOST_IDX_8812F) << BIT_SHIFT_VIQ_HOST_IDX_8812F) 8758 #define BITS_VIQ_HOST_IDX_8812F \ 8759 (BIT_MASK_VIQ_HOST_IDX_8812F << BIT_SHIFT_VIQ_HOST_IDX_8812F) 8760 #define BIT_CLEAR_VIQ_HOST_IDX_8812F(x) ((x) & (~BITS_VIQ_HOST_IDX_8812F)) 8761 #define BIT_GET_VIQ_HOST_IDX_8812F(x) \ 8762 (((x) >> BIT_SHIFT_VIQ_HOST_IDX_8812F) & BIT_MASK_VIQ_HOST_IDX_8812F) 8763 #define BIT_SET_VIQ_HOST_IDX_8812F(x, v) \ 8764 (BIT_CLEAR_VIQ_HOST_IDX_8812F(x) | BIT_VIQ_HOST_IDX_8812F(v)) 8765 8766 /* 2 REG_BEQ_TXBD_IDX_8812F */ 8767 8768 #define BIT_SHIFT_BEQ_HW_IDX_8812F 16 8769 #define BIT_MASK_BEQ_HW_IDX_8812F 0xfff 8770 #define BIT_BEQ_HW_IDX_8812F(x) \ 8771 (((x) & BIT_MASK_BEQ_HW_IDX_8812F) << BIT_SHIFT_BEQ_HW_IDX_8812F) 8772 #define BITS_BEQ_HW_IDX_8812F \ 8773 (BIT_MASK_BEQ_HW_IDX_8812F << BIT_SHIFT_BEQ_HW_IDX_8812F) 8774 #define BIT_CLEAR_BEQ_HW_IDX_8812F(x) ((x) & (~BITS_BEQ_HW_IDX_8812F)) 8775 #define BIT_GET_BEQ_HW_IDX_8812F(x) \ 8776 (((x) >> BIT_SHIFT_BEQ_HW_IDX_8812F) & BIT_MASK_BEQ_HW_IDX_8812F) 8777 #define BIT_SET_BEQ_HW_IDX_8812F(x, v) \ 8778 (BIT_CLEAR_BEQ_HW_IDX_8812F(x) | BIT_BEQ_HW_IDX_8812F(v)) 8779 8780 #define BIT_SHIFT_BEQ_HOST_IDX_8812F 0 8781 #define BIT_MASK_BEQ_HOST_IDX_8812F 0xfff 8782 #define BIT_BEQ_HOST_IDX_8812F(x) \ 8783 (((x) & BIT_MASK_BEQ_HOST_IDX_8812F) << BIT_SHIFT_BEQ_HOST_IDX_8812F) 8784 #define BITS_BEQ_HOST_IDX_8812F \ 8785 (BIT_MASK_BEQ_HOST_IDX_8812F << BIT_SHIFT_BEQ_HOST_IDX_8812F) 8786 #define BIT_CLEAR_BEQ_HOST_IDX_8812F(x) ((x) & (~BITS_BEQ_HOST_IDX_8812F)) 8787 #define BIT_GET_BEQ_HOST_IDX_8812F(x) \ 8788 (((x) >> BIT_SHIFT_BEQ_HOST_IDX_8812F) & BIT_MASK_BEQ_HOST_IDX_8812F) 8789 #define BIT_SET_BEQ_HOST_IDX_8812F(x, v) \ 8790 (BIT_CLEAR_BEQ_HOST_IDX_8812F(x) | BIT_BEQ_HOST_IDX_8812F(v)) 8791 8792 /* 2 REG_BKQ_TXBD_IDX_8812F */ 8793 8794 #define BIT_SHIFT_BKQ_HW_IDX_8812F 16 8795 #define BIT_MASK_BKQ_HW_IDX_8812F 0xfff 8796 #define BIT_BKQ_HW_IDX_8812F(x) \ 8797 (((x) & BIT_MASK_BKQ_HW_IDX_8812F) << BIT_SHIFT_BKQ_HW_IDX_8812F) 8798 #define BITS_BKQ_HW_IDX_8812F \ 8799 (BIT_MASK_BKQ_HW_IDX_8812F << BIT_SHIFT_BKQ_HW_IDX_8812F) 8800 #define BIT_CLEAR_BKQ_HW_IDX_8812F(x) ((x) & (~BITS_BKQ_HW_IDX_8812F)) 8801 #define BIT_GET_BKQ_HW_IDX_8812F(x) \ 8802 (((x) >> BIT_SHIFT_BKQ_HW_IDX_8812F) & BIT_MASK_BKQ_HW_IDX_8812F) 8803 #define BIT_SET_BKQ_HW_IDX_8812F(x, v) \ 8804 (BIT_CLEAR_BKQ_HW_IDX_8812F(x) | BIT_BKQ_HW_IDX_8812F(v)) 8805 8806 #define BIT_SHIFT_BKQ_HOST_IDX_8812F 0 8807 #define BIT_MASK_BKQ_HOST_IDX_8812F 0xfff 8808 #define BIT_BKQ_HOST_IDX_8812F(x) \ 8809 (((x) & BIT_MASK_BKQ_HOST_IDX_8812F) << BIT_SHIFT_BKQ_HOST_IDX_8812F) 8810 #define BITS_BKQ_HOST_IDX_8812F \ 8811 (BIT_MASK_BKQ_HOST_IDX_8812F << BIT_SHIFT_BKQ_HOST_IDX_8812F) 8812 #define BIT_CLEAR_BKQ_HOST_IDX_8812F(x) ((x) & (~BITS_BKQ_HOST_IDX_8812F)) 8813 #define BIT_GET_BKQ_HOST_IDX_8812F(x) \ 8814 (((x) >> BIT_SHIFT_BKQ_HOST_IDX_8812F) & BIT_MASK_BKQ_HOST_IDX_8812F) 8815 #define BIT_SET_BKQ_HOST_IDX_8812F(x, v) \ 8816 (BIT_CLEAR_BKQ_HOST_IDX_8812F(x) | BIT_BKQ_HOST_IDX_8812F(v)) 8817 8818 /* 2 REG_MGQ_TXBD_IDX_8812F */ 8819 8820 #define BIT_SHIFT_MGQ_HW_IDX_8812F 16 8821 #define BIT_MASK_MGQ_HW_IDX_8812F 0xfff 8822 #define BIT_MGQ_HW_IDX_8812F(x) \ 8823 (((x) & BIT_MASK_MGQ_HW_IDX_8812F) << BIT_SHIFT_MGQ_HW_IDX_8812F) 8824 #define BITS_MGQ_HW_IDX_8812F \ 8825 (BIT_MASK_MGQ_HW_IDX_8812F << BIT_SHIFT_MGQ_HW_IDX_8812F) 8826 #define BIT_CLEAR_MGQ_HW_IDX_8812F(x) ((x) & (~BITS_MGQ_HW_IDX_8812F)) 8827 #define BIT_GET_MGQ_HW_IDX_8812F(x) \ 8828 (((x) >> BIT_SHIFT_MGQ_HW_IDX_8812F) & BIT_MASK_MGQ_HW_IDX_8812F) 8829 #define BIT_SET_MGQ_HW_IDX_8812F(x, v) \ 8830 (BIT_CLEAR_MGQ_HW_IDX_8812F(x) | BIT_MGQ_HW_IDX_8812F(v)) 8831 8832 #define BIT_SHIFT_MGQ_HOST_IDX_8812F 0 8833 #define BIT_MASK_MGQ_HOST_IDX_8812F 0xfff 8834 #define BIT_MGQ_HOST_IDX_8812F(x) \ 8835 (((x) & BIT_MASK_MGQ_HOST_IDX_8812F) << BIT_SHIFT_MGQ_HOST_IDX_8812F) 8836 #define BITS_MGQ_HOST_IDX_8812F \ 8837 (BIT_MASK_MGQ_HOST_IDX_8812F << BIT_SHIFT_MGQ_HOST_IDX_8812F) 8838 #define BIT_CLEAR_MGQ_HOST_IDX_8812F(x) ((x) & (~BITS_MGQ_HOST_IDX_8812F)) 8839 #define BIT_GET_MGQ_HOST_IDX_8812F(x) \ 8840 (((x) >> BIT_SHIFT_MGQ_HOST_IDX_8812F) & BIT_MASK_MGQ_HOST_IDX_8812F) 8841 #define BIT_SET_MGQ_HOST_IDX_8812F(x, v) \ 8842 (BIT_CLEAR_MGQ_HOST_IDX_8812F(x) | BIT_MGQ_HOST_IDX_8812F(v)) 8843 8844 /* 2 REG_RXQ_RXBD_IDX_8812F */ 8845 8846 #define BIT_SHIFT_RXQ_HW_IDX_8812F 16 8847 #define BIT_MASK_RXQ_HW_IDX_8812F 0xfff 8848 #define BIT_RXQ_HW_IDX_8812F(x) \ 8849 (((x) & BIT_MASK_RXQ_HW_IDX_8812F) << BIT_SHIFT_RXQ_HW_IDX_8812F) 8850 #define BITS_RXQ_HW_IDX_8812F \ 8851 (BIT_MASK_RXQ_HW_IDX_8812F << BIT_SHIFT_RXQ_HW_IDX_8812F) 8852 #define BIT_CLEAR_RXQ_HW_IDX_8812F(x) ((x) & (~BITS_RXQ_HW_IDX_8812F)) 8853 #define BIT_GET_RXQ_HW_IDX_8812F(x) \ 8854 (((x) >> BIT_SHIFT_RXQ_HW_IDX_8812F) & BIT_MASK_RXQ_HW_IDX_8812F) 8855 #define BIT_SET_RXQ_HW_IDX_8812F(x, v) \ 8856 (BIT_CLEAR_RXQ_HW_IDX_8812F(x) | BIT_RXQ_HW_IDX_8812F(v)) 8857 8858 #define BIT_SHIFT_RXQ_HOST_IDX_8812F 0 8859 #define BIT_MASK_RXQ_HOST_IDX_8812F 0xfff 8860 #define BIT_RXQ_HOST_IDX_8812F(x) \ 8861 (((x) & BIT_MASK_RXQ_HOST_IDX_8812F) << BIT_SHIFT_RXQ_HOST_IDX_8812F) 8862 #define BITS_RXQ_HOST_IDX_8812F \ 8863 (BIT_MASK_RXQ_HOST_IDX_8812F << BIT_SHIFT_RXQ_HOST_IDX_8812F) 8864 #define BIT_CLEAR_RXQ_HOST_IDX_8812F(x) ((x) & (~BITS_RXQ_HOST_IDX_8812F)) 8865 #define BIT_GET_RXQ_HOST_IDX_8812F(x) \ 8866 (((x) >> BIT_SHIFT_RXQ_HOST_IDX_8812F) & BIT_MASK_RXQ_HOST_IDX_8812F) 8867 #define BIT_SET_RXQ_HOST_IDX_8812F(x, v) \ 8868 (BIT_CLEAR_RXQ_HOST_IDX_8812F(x) | BIT_RXQ_HOST_IDX_8812F(v)) 8869 8870 /* 2 REG_HI0Q_TXBD_IDX_8812F */ 8871 8872 #define BIT_SHIFT_HI0Q_HW_IDX_8812F 16 8873 #define BIT_MASK_HI0Q_HW_IDX_8812F 0xfff 8874 #define BIT_HI0Q_HW_IDX_8812F(x) \ 8875 (((x) & BIT_MASK_HI0Q_HW_IDX_8812F) << BIT_SHIFT_HI0Q_HW_IDX_8812F) 8876 #define BITS_HI0Q_HW_IDX_8812F \ 8877 (BIT_MASK_HI0Q_HW_IDX_8812F << BIT_SHIFT_HI0Q_HW_IDX_8812F) 8878 #define BIT_CLEAR_HI0Q_HW_IDX_8812F(x) ((x) & (~BITS_HI0Q_HW_IDX_8812F)) 8879 #define BIT_GET_HI0Q_HW_IDX_8812F(x) \ 8880 (((x) >> BIT_SHIFT_HI0Q_HW_IDX_8812F) & BIT_MASK_HI0Q_HW_IDX_8812F) 8881 #define BIT_SET_HI0Q_HW_IDX_8812F(x, v) \ 8882 (BIT_CLEAR_HI0Q_HW_IDX_8812F(x) | BIT_HI0Q_HW_IDX_8812F(v)) 8883 8884 #define BIT_SHIFT_HI0Q_HOST_IDX_8812F 0 8885 #define BIT_MASK_HI0Q_HOST_IDX_8812F 0xfff 8886 #define BIT_HI0Q_HOST_IDX_8812F(x) \ 8887 (((x) & BIT_MASK_HI0Q_HOST_IDX_8812F) << BIT_SHIFT_HI0Q_HOST_IDX_8812F) 8888 #define BITS_HI0Q_HOST_IDX_8812F \ 8889 (BIT_MASK_HI0Q_HOST_IDX_8812F << BIT_SHIFT_HI0Q_HOST_IDX_8812F) 8890 #define BIT_CLEAR_HI0Q_HOST_IDX_8812F(x) ((x) & (~BITS_HI0Q_HOST_IDX_8812F)) 8891 #define BIT_GET_HI0Q_HOST_IDX_8812F(x) \ 8892 (((x) >> BIT_SHIFT_HI0Q_HOST_IDX_8812F) & BIT_MASK_HI0Q_HOST_IDX_8812F) 8893 #define BIT_SET_HI0Q_HOST_IDX_8812F(x, v) \ 8894 (BIT_CLEAR_HI0Q_HOST_IDX_8812F(x) | BIT_HI0Q_HOST_IDX_8812F(v)) 8895 8896 /* 2 REG_HI1Q_TXBD_IDX_8812F */ 8897 8898 #define BIT_SHIFT_HI1Q_HW_IDX_8812F 16 8899 #define BIT_MASK_HI1Q_HW_IDX_8812F 0xfff 8900 #define BIT_HI1Q_HW_IDX_8812F(x) \ 8901 (((x) & BIT_MASK_HI1Q_HW_IDX_8812F) << BIT_SHIFT_HI1Q_HW_IDX_8812F) 8902 #define BITS_HI1Q_HW_IDX_8812F \ 8903 (BIT_MASK_HI1Q_HW_IDX_8812F << BIT_SHIFT_HI1Q_HW_IDX_8812F) 8904 #define BIT_CLEAR_HI1Q_HW_IDX_8812F(x) ((x) & (~BITS_HI1Q_HW_IDX_8812F)) 8905 #define BIT_GET_HI1Q_HW_IDX_8812F(x) \ 8906 (((x) >> BIT_SHIFT_HI1Q_HW_IDX_8812F) & BIT_MASK_HI1Q_HW_IDX_8812F) 8907 #define BIT_SET_HI1Q_HW_IDX_8812F(x, v) \ 8908 (BIT_CLEAR_HI1Q_HW_IDX_8812F(x) | BIT_HI1Q_HW_IDX_8812F(v)) 8909 8910 #define BIT_SHIFT_HI1Q_HOST_IDX_8812F 0 8911 #define BIT_MASK_HI1Q_HOST_IDX_8812F 0xfff 8912 #define BIT_HI1Q_HOST_IDX_8812F(x) \ 8913 (((x) & BIT_MASK_HI1Q_HOST_IDX_8812F) << BIT_SHIFT_HI1Q_HOST_IDX_8812F) 8914 #define BITS_HI1Q_HOST_IDX_8812F \ 8915 (BIT_MASK_HI1Q_HOST_IDX_8812F << BIT_SHIFT_HI1Q_HOST_IDX_8812F) 8916 #define BIT_CLEAR_HI1Q_HOST_IDX_8812F(x) ((x) & (~BITS_HI1Q_HOST_IDX_8812F)) 8917 #define BIT_GET_HI1Q_HOST_IDX_8812F(x) \ 8918 (((x) >> BIT_SHIFT_HI1Q_HOST_IDX_8812F) & BIT_MASK_HI1Q_HOST_IDX_8812F) 8919 #define BIT_SET_HI1Q_HOST_IDX_8812F(x, v) \ 8920 (BIT_CLEAR_HI1Q_HOST_IDX_8812F(x) | BIT_HI1Q_HOST_IDX_8812F(v)) 8921 8922 /* 2 REG_HI2Q_TXBD_IDX_8812F */ 8923 8924 #define BIT_SHIFT_HI2Q_HW_IDX_8812F 16 8925 #define BIT_MASK_HI2Q_HW_IDX_8812F 0xfff 8926 #define BIT_HI2Q_HW_IDX_8812F(x) \ 8927 (((x) & BIT_MASK_HI2Q_HW_IDX_8812F) << BIT_SHIFT_HI2Q_HW_IDX_8812F) 8928 #define BITS_HI2Q_HW_IDX_8812F \ 8929 (BIT_MASK_HI2Q_HW_IDX_8812F << BIT_SHIFT_HI2Q_HW_IDX_8812F) 8930 #define BIT_CLEAR_HI2Q_HW_IDX_8812F(x) ((x) & (~BITS_HI2Q_HW_IDX_8812F)) 8931 #define BIT_GET_HI2Q_HW_IDX_8812F(x) \ 8932 (((x) >> BIT_SHIFT_HI2Q_HW_IDX_8812F) & BIT_MASK_HI2Q_HW_IDX_8812F) 8933 #define BIT_SET_HI2Q_HW_IDX_8812F(x, v) \ 8934 (BIT_CLEAR_HI2Q_HW_IDX_8812F(x) | BIT_HI2Q_HW_IDX_8812F(v)) 8935 8936 #define BIT_SHIFT_HI2Q_HOST_IDX_8812F 0 8937 #define BIT_MASK_HI2Q_HOST_IDX_8812F 0xfff 8938 #define BIT_HI2Q_HOST_IDX_8812F(x) \ 8939 (((x) & BIT_MASK_HI2Q_HOST_IDX_8812F) << BIT_SHIFT_HI2Q_HOST_IDX_8812F) 8940 #define BITS_HI2Q_HOST_IDX_8812F \ 8941 (BIT_MASK_HI2Q_HOST_IDX_8812F << BIT_SHIFT_HI2Q_HOST_IDX_8812F) 8942 #define BIT_CLEAR_HI2Q_HOST_IDX_8812F(x) ((x) & (~BITS_HI2Q_HOST_IDX_8812F)) 8943 #define BIT_GET_HI2Q_HOST_IDX_8812F(x) \ 8944 (((x) >> BIT_SHIFT_HI2Q_HOST_IDX_8812F) & BIT_MASK_HI2Q_HOST_IDX_8812F) 8945 #define BIT_SET_HI2Q_HOST_IDX_8812F(x, v) \ 8946 (BIT_CLEAR_HI2Q_HOST_IDX_8812F(x) | BIT_HI2Q_HOST_IDX_8812F(v)) 8947 8948 /* 2 REG_HI3Q_TXBD_IDX_8812F */ 8949 8950 #define BIT_SHIFT_HI3Q_HW_IDX_8812F 16 8951 #define BIT_MASK_HI3Q_HW_IDX_8812F 0xfff 8952 #define BIT_HI3Q_HW_IDX_8812F(x) \ 8953 (((x) & BIT_MASK_HI3Q_HW_IDX_8812F) << BIT_SHIFT_HI3Q_HW_IDX_8812F) 8954 #define BITS_HI3Q_HW_IDX_8812F \ 8955 (BIT_MASK_HI3Q_HW_IDX_8812F << BIT_SHIFT_HI3Q_HW_IDX_8812F) 8956 #define BIT_CLEAR_HI3Q_HW_IDX_8812F(x) ((x) & (~BITS_HI3Q_HW_IDX_8812F)) 8957 #define BIT_GET_HI3Q_HW_IDX_8812F(x) \ 8958 (((x) >> BIT_SHIFT_HI3Q_HW_IDX_8812F) & BIT_MASK_HI3Q_HW_IDX_8812F) 8959 #define BIT_SET_HI3Q_HW_IDX_8812F(x, v) \ 8960 (BIT_CLEAR_HI3Q_HW_IDX_8812F(x) | BIT_HI3Q_HW_IDX_8812F(v)) 8961 8962 #define BIT_SHIFT_HI3Q_HOST_IDX_8812F 0 8963 #define BIT_MASK_HI3Q_HOST_IDX_8812F 0xfff 8964 #define BIT_HI3Q_HOST_IDX_8812F(x) \ 8965 (((x) & BIT_MASK_HI3Q_HOST_IDX_8812F) << BIT_SHIFT_HI3Q_HOST_IDX_8812F) 8966 #define BITS_HI3Q_HOST_IDX_8812F \ 8967 (BIT_MASK_HI3Q_HOST_IDX_8812F << BIT_SHIFT_HI3Q_HOST_IDX_8812F) 8968 #define BIT_CLEAR_HI3Q_HOST_IDX_8812F(x) ((x) & (~BITS_HI3Q_HOST_IDX_8812F)) 8969 #define BIT_GET_HI3Q_HOST_IDX_8812F(x) \ 8970 (((x) >> BIT_SHIFT_HI3Q_HOST_IDX_8812F) & BIT_MASK_HI3Q_HOST_IDX_8812F) 8971 #define BIT_SET_HI3Q_HOST_IDX_8812F(x, v) \ 8972 (BIT_CLEAR_HI3Q_HOST_IDX_8812F(x) | BIT_HI3Q_HOST_IDX_8812F(v)) 8973 8974 /* 2 REG_HI4Q_TXBD_IDX_8812F */ 8975 8976 #define BIT_SHIFT_HI4Q_HW_IDX_8812F 16 8977 #define BIT_MASK_HI4Q_HW_IDX_8812F 0xfff 8978 #define BIT_HI4Q_HW_IDX_8812F(x) \ 8979 (((x) & BIT_MASK_HI4Q_HW_IDX_8812F) << BIT_SHIFT_HI4Q_HW_IDX_8812F) 8980 #define BITS_HI4Q_HW_IDX_8812F \ 8981 (BIT_MASK_HI4Q_HW_IDX_8812F << BIT_SHIFT_HI4Q_HW_IDX_8812F) 8982 #define BIT_CLEAR_HI4Q_HW_IDX_8812F(x) ((x) & (~BITS_HI4Q_HW_IDX_8812F)) 8983 #define BIT_GET_HI4Q_HW_IDX_8812F(x) \ 8984 (((x) >> BIT_SHIFT_HI4Q_HW_IDX_8812F) & BIT_MASK_HI4Q_HW_IDX_8812F) 8985 #define BIT_SET_HI4Q_HW_IDX_8812F(x, v) \ 8986 (BIT_CLEAR_HI4Q_HW_IDX_8812F(x) | BIT_HI4Q_HW_IDX_8812F(v)) 8987 8988 #define BIT_SHIFT_HI4Q_HOST_IDX_8812F 0 8989 #define BIT_MASK_HI4Q_HOST_IDX_8812F 0xfff 8990 #define BIT_HI4Q_HOST_IDX_8812F(x) \ 8991 (((x) & BIT_MASK_HI4Q_HOST_IDX_8812F) << BIT_SHIFT_HI4Q_HOST_IDX_8812F) 8992 #define BITS_HI4Q_HOST_IDX_8812F \ 8993 (BIT_MASK_HI4Q_HOST_IDX_8812F << BIT_SHIFT_HI4Q_HOST_IDX_8812F) 8994 #define BIT_CLEAR_HI4Q_HOST_IDX_8812F(x) ((x) & (~BITS_HI4Q_HOST_IDX_8812F)) 8995 #define BIT_GET_HI4Q_HOST_IDX_8812F(x) \ 8996 (((x) >> BIT_SHIFT_HI4Q_HOST_IDX_8812F) & BIT_MASK_HI4Q_HOST_IDX_8812F) 8997 #define BIT_SET_HI4Q_HOST_IDX_8812F(x, v) \ 8998 (BIT_CLEAR_HI4Q_HOST_IDX_8812F(x) | BIT_HI4Q_HOST_IDX_8812F(v)) 8999 9000 /* 2 REG_HI5Q_TXBD_IDX_8812F */ 9001 9002 #define BIT_SHIFT_HI5Q_HW_IDX_8812F 16 9003 #define BIT_MASK_HI5Q_HW_IDX_8812F 0xfff 9004 #define BIT_HI5Q_HW_IDX_8812F(x) \ 9005 (((x) & BIT_MASK_HI5Q_HW_IDX_8812F) << BIT_SHIFT_HI5Q_HW_IDX_8812F) 9006 #define BITS_HI5Q_HW_IDX_8812F \ 9007 (BIT_MASK_HI5Q_HW_IDX_8812F << BIT_SHIFT_HI5Q_HW_IDX_8812F) 9008 #define BIT_CLEAR_HI5Q_HW_IDX_8812F(x) ((x) & (~BITS_HI5Q_HW_IDX_8812F)) 9009 #define BIT_GET_HI5Q_HW_IDX_8812F(x) \ 9010 (((x) >> BIT_SHIFT_HI5Q_HW_IDX_8812F) & BIT_MASK_HI5Q_HW_IDX_8812F) 9011 #define BIT_SET_HI5Q_HW_IDX_8812F(x, v) \ 9012 (BIT_CLEAR_HI5Q_HW_IDX_8812F(x) | BIT_HI5Q_HW_IDX_8812F(v)) 9013 9014 #define BIT_SHIFT_HI5Q_HOST_IDX_8812F 0 9015 #define BIT_MASK_HI5Q_HOST_IDX_8812F 0xfff 9016 #define BIT_HI5Q_HOST_IDX_8812F(x) \ 9017 (((x) & BIT_MASK_HI5Q_HOST_IDX_8812F) << BIT_SHIFT_HI5Q_HOST_IDX_8812F) 9018 #define BITS_HI5Q_HOST_IDX_8812F \ 9019 (BIT_MASK_HI5Q_HOST_IDX_8812F << BIT_SHIFT_HI5Q_HOST_IDX_8812F) 9020 #define BIT_CLEAR_HI5Q_HOST_IDX_8812F(x) ((x) & (~BITS_HI5Q_HOST_IDX_8812F)) 9021 #define BIT_GET_HI5Q_HOST_IDX_8812F(x) \ 9022 (((x) >> BIT_SHIFT_HI5Q_HOST_IDX_8812F) & BIT_MASK_HI5Q_HOST_IDX_8812F) 9023 #define BIT_SET_HI5Q_HOST_IDX_8812F(x, v) \ 9024 (BIT_CLEAR_HI5Q_HOST_IDX_8812F(x) | BIT_HI5Q_HOST_IDX_8812F(v)) 9025 9026 /* 2 REG_HI6Q_TXBD_IDX_8812F */ 9027 9028 #define BIT_SHIFT_HI6Q_HW_IDX_8812F 16 9029 #define BIT_MASK_HI6Q_HW_IDX_8812F 0xfff 9030 #define BIT_HI6Q_HW_IDX_8812F(x) \ 9031 (((x) & BIT_MASK_HI6Q_HW_IDX_8812F) << BIT_SHIFT_HI6Q_HW_IDX_8812F) 9032 #define BITS_HI6Q_HW_IDX_8812F \ 9033 (BIT_MASK_HI6Q_HW_IDX_8812F << BIT_SHIFT_HI6Q_HW_IDX_8812F) 9034 #define BIT_CLEAR_HI6Q_HW_IDX_8812F(x) ((x) & (~BITS_HI6Q_HW_IDX_8812F)) 9035 #define BIT_GET_HI6Q_HW_IDX_8812F(x) \ 9036 (((x) >> BIT_SHIFT_HI6Q_HW_IDX_8812F) & BIT_MASK_HI6Q_HW_IDX_8812F) 9037 #define BIT_SET_HI6Q_HW_IDX_8812F(x, v) \ 9038 (BIT_CLEAR_HI6Q_HW_IDX_8812F(x) | BIT_HI6Q_HW_IDX_8812F(v)) 9039 9040 #define BIT_SHIFT_HI6Q_HOST_IDX_8812F 0 9041 #define BIT_MASK_HI6Q_HOST_IDX_8812F 0xfff 9042 #define BIT_HI6Q_HOST_IDX_8812F(x) \ 9043 (((x) & BIT_MASK_HI6Q_HOST_IDX_8812F) << BIT_SHIFT_HI6Q_HOST_IDX_8812F) 9044 #define BITS_HI6Q_HOST_IDX_8812F \ 9045 (BIT_MASK_HI6Q_HOST_IDX_8812F << BIT_SHIFT_HI6Q_HOST_IDX_8812F) 9046 #define BIT_CLEAR_HI6Q_HOST_IDX_8812F(x) ((x) & (~BITS_HI6Q_HOST_IDX_8812F)) 9047 #define BIT_GET_HI6Q_HOST_IDX_8812F(x) \ 9048 (((x) >> BIT_SHIFT_HI6Q_HOST_IDX_8812F) & BIT_MASK_HI6Q_HOST_IDX_8812F) 9049 #define BIT_SET_HI6Q_HOST_IDX_8812F(x, v) \ 9050 (BIT_CLEAR_HI6Q_HOST_IDX_8812F(x) | BIT_HI6Q_HOST_IDX_8812F(v)) 9051 9052 /* 2 REG_HI7Q_TXBD_IDX_8812F */ 9053 9054 #define BIT_SHIFT_HI7Q_HW_IDX_8812F 16 9055 #define BIT_MASK_HI7Q_HW_IDX_8812F 0xfff 9056 #define BIT_HI7Q_HW_IDX_8812F(x) \ 9057 (((x) & BIT_MASK_HI7Q_HW_IDX_8812F) << BIT_SHIFT_HI7Q_HW_IDX_8812F) 9058 #define BITS_HI7Q_HW_IDX_8812F \ 9059 (BIT_MASK_HI7Q_HW_IDX_8812F << BIT_SHIFT_HI7Q_HW_IDX_8812F) 9060 #define BIT_CLEAR_HI7Q_HW_IDX_8812F(x) ((x) & (~BITS_HI7Q_HW_IDX_8812F)) 9061 #define BIT_GET_HI7Q_HW_IDX_8812F(x) \ 9062 (((x) >> BIT_SHIFT_HI7Q_HW_IDX_8812F) & BIT_MASK_HI7Q_HW_IDX_8812F) 9063 #define BIT_SET_HI7Q_HW_IDX_8812F(x, v) \ 9064 (BIT_CLEAR_HI7Q_HW_IDX_8812F(x) | BIT_HI7Q_HW_IDX_8812F(v)) 9065 9066 #define BIT_SHIFT_HI7Q_HOST_IDX_8812F 0 9067 #define BIT_MASK_HI7Q_HOST_IDX_8812F 0xfff 9068 #define BIT_HI7Q_HOST_IDX_8812F(x) \ 9069 (((x) & BIT_MASK_HI7Q_HOST_IDX_8812F) << BIT_SHIFT_HI7Q_HOST_IDX_8812F) 9070 #define BITS_HI7Q_HOST_IDX_8812F \ 9071 (BIT_MASK_HI7Q_HOST_IDX_8812F << BIT_SHIFT_HI7Q_HOST_IDX_8812F) 9072 #define BIT_CLEAR_HI7Q_HOST_IDX_8812F(x) ((x) & (~BITS_HI7Q_HOST_IDX_8812F)) 9073 #define BIT_GET_HI7Q_HOST_IDX_8812F(x) \ 9074 (((x) >> BIT_SHIFT_HI7Q_HOST_IDX_8812F) & BIT_MASK_HI7Q_HOST_IDX_8812F) 9075 #define BIT_SET_HI7Q_HOST_IDX_8812F(x, v) \ 9076 (BIT_CLEAR_HI7Q_HOST_IDX_8812F(x) | BIT_HI7Q_HOST_IDX_8812F(v)) 9077 9078 /* 2 REG_DBG_SEL_V1_8812F */ 9079 9080 #define BIT_SHIFT_DBG_SEL_8812F 0 9081 #define BIT_MASK_DBG_SEL_8812F 0xff 9082 #define BIT_DBG_SEL_8812F(x) \ 9083 (((x) & BIT_MASK_DBG_SEL_8812F) << BIT_SHIFT_DBG_SEL_8812F) 9084 #define BITS_DBG_SEL_8812F (BIT_MASK_DBG_SEL_8812F << BIT_SHIFT_DBG_SEL_8812F) 9085 #define BIT_CLEAR_DBG_SEL_8812F(x) ((x) & (~BITS_DBG_SEL_8812F)) 9086 #define BIT_GET_DBG_SEL_8812F(x) \ 9087 (((x) >> BIT_SHIFT_DBG_SEL_8812F) & BIT_MASK_DBG_SEL_8812F) 9088 #define BIT_SET_DBG_SEL_8812F(x, v) \ 9089 (BIT_CLEAR_DBG_SEL_8812F(x) | BIT_DBG_SEL_8812F(v)) 9090 9091 /* 2 REG_PCIE_HRPWM1_V1_8812F */ 9092 9093 #define BIT_SHIFT_PCIE_HRPWM_8812F 0 9094 #define BIT_MASK_PCIE_HRPWM_8812F 0xff 9095 #define BIT_PCIE_HRPWM_8812F(x) \ 9096 (((x) & BIT_MASK_PCIE_HRPWM_8812F) << BIT_SHIFT_PCIE_HRPWM_8812F) 9097 #define BITS_PCIE_HRPWM_8812F \ 9098 (BIT_MASK_PCIE_HRPWM_8812F << BIT_SHIFT_PCIE_HRPWM_8812F) 9099 #define BIT_CLEAR_PCIE_HRPWM_8812F(x) ((x) & (~BITS_PCIE_HRPWM_8812F)) 9100 #define BIT_GET_PCIE_HRPWM_8812F(x) \ 9101 (((x) >> BIT_SHIFT_PCIE_HRPWM_8812F) & BIT_MASK_PCIE_HRPWM_8812F) 9102 #define BIT_SET_PCIE_HRPWM_8812F(x, v) \ 9103 (BIT_CLEAR_PCIE_HRPWM_8812F(x) | BIT_PCIE_HRPWM_8812F(v)) 9104 9105 /* 2 REG_PCIE_HCPWM1_V1_8812F */ 9106 9107 #define BIT_SHIFT_PCIE_HCPWM_8812F 0 9108 #define BIT_MASK_PCIE_HCPWM_8812F 0xff 9109 #define BIT_PCIE_HCPWM_8812F(x) \ 9110 (((x) & BIT_MASK_PCIE_HCPWM_8812F) << BIT_SHIFT_PCIE_HCPWM_8812F) 9111 #define BITS_PCIE_HCPWM_8812F \ 9112 (BIT_MASK_PCIE_HCPWM_8812F << BIT_SHIFT_PCIE_HCPWM_8812F) 9113 #define BIT_CLEAR_PCIE_HCPWM_8812F(x) ((x) & (~BITS_PCIE_HCPWM_8812F)) 9114 #define BIT_GET_PCIE_HCPWM_8812F(x) \ 9115 (((x) >> BIT_SHIFT_PCIE_HCPWM_8812F) & BIT_MASK_PCIE_HCPWM_8812F) 9116 #define BIT_SET_PCIE_HCPWM_8812F(x, v) \ 9117 (BIT_CLEAR_PCIE_HCPWM_8812F(x) | BIT_PCIE_HCPWM_8812F(v)) 9118 9119 /* 2 REG_PCIE_CTRL2_8812F */ 9120 #define BIT_DIS_TXDMA_PRE_8812F BIT(7) 9121 #define BIT_DIS_RXDMA_PRE_8812F BIT(6) 9122 9123 #define BIT_SHIFT_HPS_CLKR_PCIE_8812F 4 9124 #define BIT_MASK_HPS_CLKR_PCIE_8812F 0x3 9125 #define BIT_HPS_CLKR_PCIE_8812F(x) \ 9126 (((x) & BIT_MASK_HPS_CLKR_PCIE_8812F) << BIT_SHIFT_HPS_CLKR_PCIE_8812F) 9127 #define BITS_HPS_CLKR_PCIE_8812F \ 9128 (BIT_MASK_HPS_CLKR_PCIE_8812F << BIT_SHIFT_HPS_CLKR_PCIE_8812F) 9129 #define BIT_CLEAR_HPS_CLKR_PCIE_8812F(x) ((x) & (~BITS_HPS_CLKR_PCIE_8812F)) 9130 #define BIT_GET_HPS_CLKR_PCIE_8812F(x) \ 9131 (((x) >> BIT_SHIFT_HPS_CLKR_PCIE_8812F) & BIT_MASK_HPS_CLKR_PCIE_8812F) 9132 #define BIT_SET_HPS_CLKR_PCIE_8812F(x, v) \ 9133 (BIT_CLEAR_HPS_CLKR_PCIE_8812F(x) | BIT_HPS_CLKR_PCIE_8812F(v)) 9134 9135 #define BIT_PCIE_INT_8812F BIT(3) 9136 #define BIT_TXFLAG_EXIT_L1_EN_8812F BIT(2) 9137 #define BIT_EN_RXDMA_ALIGN_8812F BIT(1) 9138 #define BIT_EN_TXDMA_ALIGN_8812F BIT(0) 9139 9140 /* 2 REG_PCIE_HRPWM2_V1_8812F */ 9141 9142 #define BIT_SHIFT_PCIE_HRPWM2_8812F 0 9143 #define BIT_MASK_PCIE_HRPWM2_8812F 0xffff 9144 #define BIT_PCIE_HRPWM2_8812F(x) \ 9145 (((x) & BIT_MASK_PCIE_HRPWM2_8812F) << BIT_SHIFT_PCIE_HRPWM2_8812F) 9146 #define BITS_PCIE_HRPWM2_8812F \ 9147 (BIT_MASK_PCIE_HRPWM2_8812F << BIT_SHIFT_PCIE_HRPWM2_8812F) 9148 #define BIT_CLEAR_PCIE_HRPWM2_8812F(x) ((x) & (~BITS_PCIE_HRPWM2_8812F)) 9149 #define BIT_GET_PCIE_HRPWM2_8812F(x) \ 9150 (((x) >> BIT_SHIFT_PCIE_HRPWM2_8812F) & BIT_MASK_PCIE_HRPWM2_8812F) 9151 #define BIT_SET_PCIE_HRPWM2_8812F(x, v) \ 9152 (BIT_CLEAR_PCIE_HRPWM2_8812F(x) | BIT_PCIE_HRPWM2_8812F(v)) 9153 9154 /* 2 REG_PCIE_HCPWM2_V1_8812F */ 9155 9156 #define BIT_SHIFT_PCIE_HCPWM2_8812F 0 9157 #define BIT_MASK_PCIE_HCPWM2_8812F 0xffff 9158 #define BIT_PCIE_HCPWM2_8812F(x) \ 9159 (((x) & BIT_MASK_PCIE_HCPWM2_8812F) << BIT_SHIFT_PCIE_HCPWM2_8812F) 9160 #define BITS_PCIE_HCPWM2_8812F \ 9161 (BIT_MASK_PCIE_HCPWM2_8812F << BIT_SHIFT_PCIE_HCPWM2_8812F) 9162 #define BIT_CLEAR_PCIE_HCPWM2_8812F(x) ((x) & (~BITS_PCIE_HCPWM2_8812F)) 9163 #define BIT_GET_PCIE_HCPWM2_8812F(x) \ 9164 (((x) >> BIT_SHIFT_PCIE_HCPWM2_8812F) & BIT_MASK_PCIE_HCPWM2_8812F) 9165 #define BIT_SET_PCIE_HCPWM2_8812F(x, v) \ 9166 (BIT_CLEAR_PCIE_HCPWM2_8812F(x) | BIT_PCIE_HCPWM2_8812F(v)) 9167 9168 /* 2 REG_PCIE_H2C_MSG_V1_8812F */ 9169 9170 #define BIT_SHIFT_DRV2FW_INFO_8812F 0 9171 #define BIT_MASK_DRV2FW_INFO_8812F 0xffffffffL 9172 #define BIT_DRV2FW_INFO_8812F(x) \ 9173 (((x) & BIT_MASK_DRV2FW_INFO_8812F) << BIT_SHIFT_DRV2FW_INFO_8812F) 9174 #define BITS_DRV2FW_INFO_8812F \ 9175 (BIT_MASK_DRV2FW_INFO_8812F << BIT_SHIFT_DRV2FW_INFO_8812F) 9176 #define BIT_CLEAR_DRV2FW_INFO_8812F(x) ((x) & (~BITS_DRV2FW_INFO_8812F)) 9177 #define BIT_GET_DRV2FW_INFO_8812F(x) \ 9178 (((x) >> BIT_SHIFT_DRV2FW_INFO_8812F) & BIT_MASK_DRV2FW_INFO_8812F) 9179 #define BIT_SET_DRV2FW_INFO_8812F(x, v) \ 9180 (BIT_CLEAR_DRV2FW_INFO_8812F(x) | BIT_DRV2FW_INFO_8812F(v)) 9181 9182 /* 2 REG_PCIE_C2H_MSG_V1_8812F */ 9183 9184 #define BIT_SHIFT_HCI_PCIE_C2H_MSG_8812F 0 9185 #define BIT_MASK_HCI_PCIE_C2H_MSG_8812F 0xffffffffL 9186 #define BIT_HCI_PCIE_C2H_MSG_8812F(x) \ 9187 (((x) & BIT_MASK_HCI_PCIE_C2H_MSG_8812F) \ 9188 << BIT_SHIFT_HCI_PCIE_C2H_MSG_8812F) 9189 #define BITS_HCI_PCIE_C2H_MSG_8812F \ 9190 (BIT_MASK_HCI_PCIE_C2H_MSG_8812F << BIT_SHIFT_HCI_PCIE_C2H_MSG_8812F) 9191 #define BIT_CLEAR_HCI_PCIE_C2H_MSG_8812F(x) \ 9192 ((x) & (~BITS_HCI_PCIE_C2H_MSG_8812F)) 9193 #define BIT_GET_HCI_PCIE_C2H_MSG_8812F(x) \ 9194 (((x) >> BIT_SHIFT_HCI_PCIE_C2H_MSG_8812F) & \ 9195 BIT_MASK_HCI_PCIE_C2H_MSG_8812F) 9196 #define BIT_SET_HCI_PCIE_C2H_MSG_8812F(x, v) \ 9197 (BIT_CLEAR_HCI_PCIE_C2H_MSG_8812F(x) | BIT_HCI_PCIE_C2H_MSG_8812F(v)) 9198 9199 /* 2 REG_DBI_WDATA_V1_8812F */ 9200 9201 #define BIT_SHIFT_DBI_WDATA_8812F 0 9202 #define BIT_MASK_DBI_WDATA_8812F 0xffffffffL 9203 #define BIT_DBI_WDATA_8812F(x) \ 9204 (((x) & BIT_MASK_DBI_WDATA_8812F) << BIT_SHIFT_DBI_WDATA_8812F) 9205 #define BITS_DBI_WDATA_8812F \ 9206 (BIT_MASK_DBI_WDATA_8812F << BIT_SHIFT_DBI_WDATA_8812F) 9207 #define BIT_CLEAR_DBI_WDATA_8812F(x) ((x) & (~BITS_DBI_WDATA_8812F)) 9208 #define BIT_GET_DBI_WDATA_8812F(x) \ 9209 (((x) >> BIT_SHIFT_DBI_WDATA_8812F) & BIT_MASK_DBI_WDATA_8812F) 9210 #define BIT_SET_DBI_WDATA_8812F(x, v) \ 9211 (BIT_CLEAR_DBI_WDATA_8812F(x) | BIT_DBI_WDATA_8812F(v)) 9212 9213 /* 2 REG_DBI_RDATA_V1_8812F */ 9214 9215 #define BIT_SHIFT_DBI_RDATA_8812F 0 9216 #define BIT_MASK_DBI_RDATA_8812F 0xffffffffL 9217 #define BIT_DBI_RDATA_8812F(x) \ 9218 (((x) & BIT_MASK_DBI_RDATA_8812F) << BIT_SHIFT_DBI_RDATA_8812F) 9219 #define BITS_DBI_RDATA_8812F \ 9220 (BIT_MASK_DBI_RDATA_8812F << BIT_SHIFT_DBI_RDATA_8812F) 9221 #define BIT_CLEAR_DBI_RDATA_8812F(x) ((x) & (~BITS_DBI_RDATA_8812F)) 9222 #define BIT_GET_DBI_RDATA_8812F(x) \ 9223 (((x) >> BIT_SHIFT_DBI_RDATA_8812F) & BIT_MASK_DBI_RDATA_8812F) 9224 #define BIT_SET_DBI_RDATA_8812F(x, v) \ 9225 (BIT_CLEAR_DBI_RDATA_8812F(x) | BIT_DBI_RDATA_8812F(v)) 9226 9227 /* 2 REG_DBI_FLAG_V1_8812F */ 9228 #define BIT_EN_STUCK_DBG_8812F BIT(26) 9229 #define BIT_RX_STUCK_8812F BIT(25) 9230 #define BIT_TX_STUCK_8812F BIT(24) 9231 #define BIT_DBI_RFLAG_8812F BIT(17) 9232 #define BIT_DBI_WFLAG_8812F BIT(16) 9233 9234 #define BIT_SHIFT_DBI_WREN_8812F 12 9235 #define BIT_MASK_DBI_WREN_8812F 0xf 9236 #define BIT_DBI_WREN_8812F(x) \ 9237 (((x) & BIT_MASK_DBI_WREN_8812F) << BIT_SHIFT_DBI_WREN_8812F) 9238 #define BITS_DBI_WREN_8812F \ 9239 (BIT_MASK_DBI_WREN_8812F << BIT_SHIFT_DBI_WREN_8812F) 9240 #define BIT_CLEAR_DBI_WREN_8812F(x) ((x) & (~BITS_DBI_WREN_8812F)) 9241 #define BIT_GET_DBI_WREN_8812F(x) \ 9242 (((x) >> BIT_SHIFT_DBI_WREN_8812F) & BIT_MASK_DBI_WREN_8812F) 9243 #define BIT_SET_DBI_WREN_8812F(x, v) \ 9244 (BIT_CLEAR_DBI_WREN_8812F(x) | BIT_DBI_WREN_8812F(v)) 9245 9246 #define BIT_SHIFT_DBI_ADDR_8812F 0 9247 #define BIT_MASK_DBI_ADDR_8812F 0xfff 9248 #define BIT_DBI_ADDR_8812F(x) \ 9249 (((x) & BIT_MASK_DBI_ADDR_8812F) << BIT_SHIFT_DBI_ADDR_8812F) 9250 #define BITS_DBI_ADDR_8812F \ 9251 (BIT_MASK_DBI_ADDR_8812F << BIT_SHIFT_DBI_ADDR_8812F) 9252 #define BIT_CLEAR_DBI_ADDR_8812F(x) ((x) & (~BITS_DBI_ADDR_8812F)) 9253 #define BIT_GET_DBI_ADDR_8812F(x) \ 9254 (((x) >> BIT_SHIFT_DBI_ADDR_8812F) & BIT_MASK_DBI_ADDR_8812F) 9255 #define BIT_SET_DBI_ADDR_8812F(x, v) \ 9256 (BIT_CLEAR_DBI_ADDR_8812F(x) | BIT_DBI_ADDR_8812F(v)) 9257 9258 /* 2 REG_MDIO_V1_8812F */ 9259 9260 #define BIT_SHIFT_MDIO_RDATA_8812F 16 9261 #define BIT_MASK_MDIO_RDATA_8812F 0xffff 9262 #define BIT_MDIO_RDATA_8812F(x) \ 9263 (((x) & BIT_MASK_MDIO_RDATA_8812F) << BIT_SHIFT_MDIO_RDATA_8812F) 9264 #define BITS_MDIO_RDATA_8812F \ 9265 (BIT_MASK_MDIO_RDATA_8812F << BIT_SHIFT_MDIO_RDATA_8812F) 9266 #define BIT_CLEAR_MDIO_RDATA_8812F(x) ((x) & (~BITS_MDIO_RDATA_8812F)) 9267 #define BIT_GET_MDIO_RDATA_8812F(x) \ 9268 (((x) >> BIT_SHIFT_MDIO_RDATA_8812F) & BIT_MASK_MDIO_RDATA_8812F) 9269 #define BIT_SET_MDIO_RDATA_8812F(x, v) \ 9270 (BIT_CLEAR_MDIO_RDATA_8812F(x) | BIT_MDIO_RDATA_8812F(v)) 9271 9272 #define BIT_SHIFT_MDIO_WDATA_8812F 0 9273 #define BIT_MASK_MDIO_WDATA_8812F 0xffff 9274 #define BIT_MDIO_WDATA_8812F(x) \ 9275 (((x) & BIT_MASK_MDIO_WDATA_8812F) << BIT_SHIFT_MDIO_WDATA_8812F) 9276 #define BITS_MDIO_WDATA_8812F \ 9277 (BIT_MASK_MDIO_WDATA_8812F << BIT_SHIFT_MDIO_WDATA_8812F) 9278 #define BIT_CLEAR_MDIO_WDATA_8812F(x) ((x) & (~BITS_MDIO_WDATA_8812F)) 9279 #define BIT_GET_MDIO_WDATA_8812F(x) \ 9280 (((x) >> BIT_SHIFT_MDIO_WDATA_8812F) & BIT_MASK_MDIO_WDATA_8812F) 9281 #define BIT_SET_MDIO_WDATA_8812F(x, v) \ 9282 (BIT_CLEAR_MDIO_WDATA_8812F(x) | BIT_MDIO_WDATA_8812F(v)) 9283 9284 /* 2 REG_PCIE_MIX_CFG_8812F */ 9285 9286 #define BIT_SHIFT_MDIO_PHY_ADDR_8812F 24 9287 #define BIT_MASK_MDIO_PHY_ADDR_8812F 0x1f 9288 #define BIT_MDIO_PHY_ADDR_8812F(x) \ 9289 (((x) & BIT_MASK_MDIO_PHY_ADDR_8812F) << BIT_SHIFT_MDIO_PHY_ADDR_8812F) 9290 #define BITS_MDIO_PHY_ADDR_8812F \ 9291 (BIT_MASK_MDIO_PHY_ADDR_8812F << BIT_SHIFT_MDIO_PHY_ADDR_8812F) 9292 #define BIT_CLEAR_MDIO_PHY_ADDR_8812F(x) ((x) & (~BITS_MDIO_PHY_ADDR_8812F)) 9293 #define BIT_GET_MDIO_PHY_ADDR_8812F(x) \ 9294 (((x) >> BIT_SHIFT_MDIO_PHY_ADDR_8812F) & BIT_MASK_MDIO_PHY_ADDR_8812F) 9295 #define BIT_SET_MDIO_PHY_ADDR_8812F(x, v) \ 9296 (BIT_CLEAR_MDIO_PHY_ADDR_8812F(x) | BIT_MDIO_PHY_ADDR_8812F(v)) 9297 9298 #define BIT_SHIFT_WATCH_DOG_RECORD_V1_8812F 10 9299 #define BIT_MASK_WATCH_DOG_RECORD_V1_8812F 0x3fff 9300 #define BIT_WATCH_DOG_RECORD_V1_8812F(x) \ 9301 (((x) & BIT_MASK_WATCH_DOG_RECORD_V1_8812F) \ 9302 << BIT_SHIFT_WATCH_DOG_RECORD_V1_8812F) 9303 #define BITS_WATCH_DOG_RECORD_V1_8812F \ 9304 (BIT_MASK_WATCH_DOG_RECORD_V1_8812F \ 9305 << BIT_SHIFT_WATCH_DOG_RECORD_V1_8812F) 9306 #define BIT_CLEAR_WATCH_DOG_RECORD_V1_8812F(x) \ 9307 ((x) & (~BITS_WATCH_DOG_RECORD_V1_8812F)) 9308 #define BIT_GET_WATCH_DOG_RECORD_V1_8812F(x) \ 9309 (((x) >> BIT_SHIFT_WATCH_DOG_RECORD_V1_8812F) & \ 9310 BIT_MASK_WATCH_DOG_RECORD_V1_8812F) 9311 #define BIT_SET_WATCH_DOG_RECORD_V1_8812F(x, v) \ 9312 (BIT_CLEAR_WATCH_DOG_RECORD_V1_8812F(x) | \ 9313 BIT_WATCH_DOG_RECORD_V1_8812F(v)) 9314 9315 #define BIT_R_IO_TIMEOUT_FLAG_V1_8812F BIT(9) 9316 #define BIT_EN_WATCH_DOG_8812F BIT(8) 9317 #define BIT_ECRC_EN_V1_8812F BIT(7) 9318 #define BIT_MDIO_RFLAG_V1_8812F BIT(6) 9319 #define BIT_MDIO_WFLAG_V1_8812F BIT(5) 9320 9321 #define BIT_SHIFT_MDIO_REG_ADDR_V1_8812F 0 9322 #define BIT_MASK_MDIO_REG_ADDR_V1_8812F 0x1f 9323 #define BIT_MDIO_REG_ADDR_V1_8812F(x) \ 9324 (((x) & BIT_MASK_MDIO_REG_ADDR_V1_8812F) \ 9325 << BIT_SHIFT_MDIO_REG_ADDR_V1_8812F) 9326 #define BITS_MDIO_REG_ADDR_V1_8812F \ 9327 (BIT_MASK_MDIO_REG_ADDR_V1_8812F << BIT_SHIFT_MDIO_REG_ADDR_V1_8812F) 9328 #define BIT_CLEAR_MDIO_REG_ADDR_V1_8812F(x) \ 9329 ((x) & (~BITS_MDIO_REG_ADDR_V1_8812F)) 9330 #define BIT_GET_MDIO_REG_ADDR_V1_8812F(x) \ 9331 (((x) >> BIT_SHIFT_MDIO_REG_ADDR_V1_8812F) & \ 9332 BIT_MASK_MDIO_REG_ADDR_V1_8812F) 9333 #define BIT_SET_MDIO_REG_ADDR_V1_8812F(x, v) \ 9334 (BIT_CLEAR_MDIO_REG_ADDR_V1_8812F(x) | BIT_MDIO_REG_ADDR_V1_8812F(v)) 9335 9336 /* 2 REG_HCI_MIX_CFG_8812F */ 9337 9338 #define BIT_SHIFT_WATCH_DOG_TIMER_8812F 28 9339 #define BIT_MASK_WATCH_DOG_TIMER_8812F 0xf 9340 #define BIT_WATCH_DOG_TIMER_8812F(x) \ 9341 (((x) & BIT_MASK_WATCH_DOG_TIMER_8812F) \ 9342 << BIT_SHIFT_WATCH_DOG_TIMER_8812F) 9343 #define BITS_WATCH_DOG_TIMER_8812F \ 9344 (BIT_MASK_WATCH_DOG_TIMER_8812F << BIT_SHIFT_WATCH_DOG_TIMER_8812F) 9345 #define BIT_CLEAR_WATCH_DOG_TIMER_8812F(x) ((x) & (~BITS_WATCH_DOG_TIMER_8812F)) 9346 #define BIT_GET_WATCH_DOG_TIMER_8812F(x) \ 9347 (((x) >> BIT_SHIFT_WATCH_DOG_TIMER_8812F) & \ 9348 BIT_MASK_WATCH_DOG_TIMER_8812F) 9349 #define BIT_SET_WATCH_DOG_TIMER_8812F(x, v) \ 9350 (BIT_CLEAR_WATCH_DOG_TIMER_8812F(x) | BIT_WATCH_DOG_TIMER_8812F(v)) 9351 9352 #define BIT_EN_ALIGN_MTU_8812F BIT(23) 9353 9354 #define BIT_SHIFT_LATENCY_CONTROL_8812F 21 9355 #define BIT_MASK_LATENCY_CONTROL_8812F 0x3 9356 #define BIT_LATENCY_CONTROL_8812F(x) \ 9357 (((x) & BIT_MASK_LATENCY_CONTROL_8812F) \ 9358 << BIT_SHIFT_LATENCY_CONTROL_8812F) 9359 #define BITS_LATENCY_CONTROL_8812F \ 9360 (BIT_MASK_LATENCY_CONTROL_8812F << BIT_SHIFT_LATENCY_CONTROL_8812F) 9361 #define BIT_CLEAR_LATENCY_CONTROL_8812F(x) ((x) & (~BITS_LATENCY_CONTROL_8812F)) 9362 #define BIT_GET_LATENCY_CONTROL_8812F(x) \ 9363 (((x) >> BIT_SHIFT_LATENCY_CONTROL_8812F) & \ 9364 BIT_MASK_LATENCY_CONTROL_8812F) 9365 #define BIT_SET_LATENCY_CONTROL_8812F(x, v) \ 9366 (BIT_CLEAR_LATENCY_CONTROL_8812F(x) | BIT_LATENCY_CONTROL_8812F(v)) 9367 9368 #define BIT_HOST_GEN2_SUPPORT_8812F BIT(20) 9369 9370 #define BIT_SHIFT_TXDMA_ERR_FLAG_V1_8812F 15 9371 #define BIT_MASK_TXDMA_ERR_FLAG_V1_8812F 0x1f 9372 #define BIT_TXDMA_ERR_FLAG_V1_8812F(x) \ 9373 (((x) & BIT_MASK_TXDMA_ERR_FLAG_V1_8812F) \ 9374 << BIT_SHIFT_TXDMA_ERR_FLAG_V1_8812F) 9375 #define BITS_TXDMA_ERR_FLAG_V1_8812F \ 9376 (BIT_MASK_TXDMA_ERR_FLAG_V1_8812F << BIT_SHIFT_TXDMA_ERR_FLAG_V1_8812F) 9377 #define BIT_CLEAR_TXDMA_ERR_FLAG_V1_8812F(x) \ 9378 ((x) & (~BITS_TXDMA_ERR_FLAG_V1_8812F)) 9379 #define BIT_GET_TXDMA_ERR_FLAG_V1_8812F(x) \ 9380 (((x) >> BIT_SHIFT_TXDMA_ERR_FLAG_V1_8812F) & \ 9381 BIT_MASK_TXDMA_ERR_FLAG_V1_8812F) 9382 #define BIT_SET_TXDMA_ERR_FLAG_V1_8812F(x, v) \ 9383 (BIT_CLEAR_TXDMA_ERR_FLAG_V1_8812F(x) | BIT_TXDMA_ERR_FLAG_V1_8812F(v)) 9384 9385 #define BIT_EPHY_RX50_EN_8812F BIT(11) 9386 9387 #define BIT_SHIFT_MSI_TIMEOUT_ID_V1_8812F 8 9388 #define BIT_MASK_MSI_TIMEOUT_ID_V1_8812F 0x7 9389 #define BIT_MSI_TIMEOUT_ID_V1_8812F(x) \ 9390 (((x) & BIT_MASK_MSI_TIMEOUT_ID_V1_8812F) \ 9391 << BIT_SHIFT_MSI_TIMEOUT_ID_V1_8812F) 9392 #define BITS_MSI_TIMEOUT_ID_V1_8812F \ 9393 (BIT_MASK_MSI_TIMEOUT_ID_V1_8812F << BIT_SHIFT_MSI_TIMEOUT_ID_V1_8812F) 9394 #define BIT_CLEAR_MSI_TIMEOUT_ID_V1_8812F(x) \ 9395 ((x) & (~BITS_MSI_TIMEOUT_ID_V1_8812F)) 9396 #define BIT_GET_MSI_TIMEOUT_ID_V1_8812F(x) \ 9397 (((x) >> BIT_SHIFT_MSI_TIMEOUT_ID_V1_8812F) & \ 9398 BIT_MASK_MSI_TIMEOUT_ID_V1_8812F) 9399 #define BIT_SET_MSI_TIMEOUT_ID_V1_8812F(x, v) \ 9400 (BIT_CLEAR_MSI_TIMEOUT_ID_V1_8812F(x) | BIT_MSI_TIMEOUT_ID_V1_8812F(v)) 9401 9402 #define BIT_RADDR_RD_8812F BIT(7) 9403 #define BIT_L1OFF_PWR_OFF_EN_8812F BIT(6) 9404 #define BIT_L0S_LINK_OFF_8812F BIT(4) 9405 #define BIT_ACT_LINK_OFF_8812F BIT(3) 9406 #define BIT_EN_SLOW_MAC_TX_8812F BIT(2) 9407 #define BIT_EN_SLOW_MAC_RX_8812F BIT(1) 9408 #define BIT_EN_SLOW_MAC_HW_8812F BIT(0) 9409 9410 /* 2 REG_STC_INT_CS_8812F(PCIE STATE CHANGE INTERRUPT CONTROL AND STATUS) */ 9411 #define BIT_STC_INT_EN_8812F BIT(31) 9412 9413 #define BIT_SHIFT_STC_INT_FLAG_8812F 16 9414 #define BIT_MASK_STC_INT_FLAG_8812F 0xff 9415 #define BIT_STC_INT_FLAG_8812F(x) \ 9416 (((x) & BIT_MASK_STC_INT_FLAG_8812F) << BIT_SHIFT_STC_INT_FLAG_8812F) 9417 #define BITS_STC_INT_FLAG_8812F \ 9418 (BIT_MASK_STC_INT_FLAG_8812F << BIT_SHIFT_STC_INT_FLAG_8812F) 9419 #define BIT_CLEAR_STC_INT_FLAG_8812F(x) ((x) & (~BITS_STC_INT_FLAG_8812F)) 9420 #define BIT_GET_STC_INT_FLAG_8812F(x) \ 9421 (((x) >> BIT_SHIFT_STC_INT_FLAG_8812F) & BIT_MASK_STC_INT_FLAG_8812F) 9422 #define BIT_SET_STC_INT_FLAG_8812F(x, v) \ 9423 (BIT_CLEAR_STC_INT_FLAG_8812F(x) | BIT_STC_INT_FLAG_8812F(v)) 9424 9425 #define BIT_SHIFT_STC_INT_IDX_8812F 8 9426 #define BIT_MASK_STC_INT_IDX_8812F 0x7 9427 #define BIT_STC_INT_IDX_8812F(x) \ 9428 (((x) & BIT_MASK_STC_INT_IDX_8812F) << BIT_SHIFT_STC_INT_IDX_8812F) 9429 #define BITS_STC_INT_IDX_8812F \ 9430 (BIT_MASK_STC_INT_IDX_8812F << BIT_SHIFT_STC_INT_IDX_8812F) 9431 #define BIT_CLEAR_STC_INT_IDX_8812F(x) ((x) & (~BITS_STC_INT_IDX_8812F)) 9432 #define BIT_GET_STC_INT_IDX_8812F(x) \ 9433 (((x) >> BIT_SHIFT_STC_INT_IDX_8812F) & BIT_MASK_STC_INT_IDX_8812F) 9434 #define BIT_SET_STC_INT_IDX_8812F(x, v) \ 9435 (BIT_CLEAR_STC_INT_IDX_8812F(x) | BIT_STC_INT_IDX_8812F(v)) 9436 9437 #define BIT_SHIFT_STC_INT_REALTIME_CS_8812F 0 9438 #define BIT_MASK_STC_INT_REALTIME_CS_8812F 0x3f 9439 #define BIT_STC_INT_REALTIME_CS_8812F(x) \ 9440 (((x) & BIT_MASK_STC_INT_REALTIME_CS_8812F) \ 9441 << BIT_SHIFT_STC_INT_REALTIME_CS_8812F) 9442 #define BITS_STC_INT_REALTIME_CS_8812F \ 9443 (BIT_MASK_STC_INT_REALTIME_CS_8812F \ 9444 << BIT_SHIFT_STC_INT_REALTIME_CS_8812F) 9445 #define BIT_CLEAR_STC_INT_REALTIME_CS_8812F(x) \ 9446 ((x) & (~BITS_STC_INT_REALTIME_CS_8812F)) 9447 #define BIT_GET_STC_INT_REALTIME_CS_8812F(x) \ 9448 (((x) >> BIT_SHIFT_STC_INT_REALTIME_CS_8812F) & \ 9449 BIT_MASK_STC_INT_REALTIME_CS_8812F) 9450 #define BIT_SET_STC_INT_REALTIME_CS_8812F(x, v) \ 9451 (BIT_CLEAR_STC_INT_REALTIME_CS_8812F(x) | \ 9452 BIT_STC_INT_REALTIME_CS_8812F(v)) 9453 9454 #define BIT_STC_INT_GRP_EN_8812F BIT(31) 9455 9456 #define BIT_SHIFT_STC_INT_EXPECT_LS_8812F 8 9457 #define BIT_MASK_STC_INT_EXPECT_LS_8812F 0x3f 9458 #define BIT_STC_INT_EXPECT_LS_8812F(x) \ 9459 (((x) & BIT_MASK_STC_INT_EXPECT_LS_8812F) \ 9460 << BIT_SHIFT_STC_INT_EXPECT_LS_8812F) 9461 #define BITS_STC_INT_EXPECT_LS_8812F \ 9462 (BIT_MASK_STC_INT_EXPECT_LS_8812F << BIT_SHIFT_STC_INT_EXPECT_LS_8812F) 9463 #define BIT_CLEAR_STC_INT_EXPECT_LS_8812F(x) \ 9464 ((x) & (~BITS_STC_INT_EXPECT_LS_8812F)) 9465 #define BIT_GET_STC_INT_EXPECT_LS_8812F(x) \ 9466 (((x) >> BIT_SHIFT_STC_INT_EXPECT_LS_8812F) & \ 9467 BIT_MASK_STC_INT_EXPECT_LS_8812F) 9468 #define BIT_SET_STC_INT_EXPECT_LS_8812F(x, v) \ 9469 (BIT_CLEAR_STC_INT_EXPECT_LS_8812F(x) | BIT_STC_INT_EXPECT_LS_8812F(v)) 9470 9471 #define BIT_SHIFT_STC_INT_EXPECT_CS_8812F 0 9472 #define BIT_MASK_STC_INT_EXPECT_CS_8812F 0x3f 9473 #define BIT_STC_INT_EXPECT_CS_8812F(x) \ 9474 (((x) & BIT_MASK_STC_INT_EXPECT_CS_8812F) \ 9475 << BIT_SHIFT_STC_INT_EXPECT_CS_8812F) 9476 #define BITS_STC_INT_EXPECT_CS_8812F \ 9477 (BIT_MASK_STC_INT_EXPECT_CS_8812F << BIT_SHIFT_STC_INT_EXPECT_CS_8812F) 9478 #define BIT_CLEAR_STC_INT_EXPECT_CS_8812F(x) \ 9479 ((x) & (~BITS_STC_INT_EXPECT_CS_8812F)) 9480 #define BIT_GET_STC_INT_EXPECT_CS_8812F(x) \ 9481 (((x) >> BIT_SHIFT_STC_INT_EXPECT_CS_8812F) & \ 9482 BIT_MASK_STC_INT_EXPECT_CS_8812F) 9483 #define BIT_SET_STC_INT_EXPECT_CS_8812F(x, v) \ 9484 (BIT_CLEAR_STC_INT_EXPECT_CS_8812F(x) | BIT_STC_INT_EXPECT_CS_8812F(v)) 9485 9486 /* 2 REG_H2CQ_TXBD_DESA_8812F */ 9487 9488 #define BIT_SHIFT_H2CQ_TXBD_DESA_8812F 0 9489 #define BIT_MASK_H2CQ_TXBD_DESA_8812F 0xffffffffffffffffL 9490 #define BIT_H2CQ_TXBD_DESA_8812F(x) \ 9491 (((x) & BIT_MASK_H2CQ_TXBD_DESA_8812F) \ 9492 << BIT_SHIFT_H2CQ_TXBD_DESA_8812F) 9493 #define BITS_H2CQ_TXBD_DESA_8812F \ 9494 (BIT_MASK_H2CQ_TXBD_DESA_8812F << BIT_SHIFT_H2CQ_TXBD_DESA_8812F) 9495 #define BIT_CLEAR_H2CQ_TXBD_DESA_8812F(x) ((x) & (~BITS_H2CQ_TXBD_DESA_8812F)) 9496 #define BIT_GET_H2CQ_TXBD_DESA_8812F(x) \ 9497 (((x) >> BIT_SHIFT_H2CQ_TXBD_DESA_8812F) & \ 9498 BIT_MASK_H2CQ_TXBD_DESA_8812F) 9499 #define BIT_SET_H2CQ_TXBD_DESA_8812F(x, v) \ 9500 (BIT_CLEAR_H2CQ_TXBD_DESA_8812F(x) | BIT_H2CQ_TXBD_DESA_8812F(v)) 9501 9502 /* 2 REG_H2CQ_TXBD_NUM_8812F */ 9503 #define BIT_PCIE_H2CQ_FLAG_8812F BIT(14) 9504 9505 #define BIT_SHIFT_H2CQ_DESC_MODE_8812F 12 9506 #define BIT_MASK_H2CQ_DESC_MODE_8812F 0x3 9507 #define BIT_H2CQ_DESC_MODE_8812F(x) \ 9508 (((x) & BIT_MASK_H2CQ_DESC_MODE_8812F) \ 9509 << BIT_SHIFT_H2CQ_DESC_MODE_8812F) 9510 #define BITS_H2CQ_DESC_MODE_8812F \ 9511 (BIT_MASK_H2CQ_DESC_MODE_8812F << BIT_SHIFT_H2CQ_DESC_MODE_8812F) 9512 #define BIT_CLEAR_H2CQ_DESC_MODE_8812F(x) ((x) & (~BITS_H2CQ_DESC_MODE_8812F)) 9513 #define BIT_GET_H2CQ_DESC_MODE_8812F(x) \ 9514 (((x) >> BIT_SHIFT_H2CQ_DESC_MODE_8812F) & \ 9515 BIT_MASK_H2CQ_DESC_MODE_8812F) 9516 #define BIT_SET_H2CQ_DESC_MODE_8812F(x, v) \ 9517 (BIT_CLEAR_H2CQ_DESC_MODE_8812F(x) | BIT_H2CQ_DESC_MODE_8812F(v)) 9518 9519 #define BIT_SHIFT_H2CQ_DESC_NUM_8812F 0 9520 #define BIT_MASK_H2CQ_DESC_NUM_8812F 0xfff 9521 #define BIT_H2CQ_DESC_NUM_8812F(x) \ 9522 (((x) & BIT_MASK_H2CQ_DESC_NUM_8812F) << BIT_SHIFT_H2CQ_DESC_NUM_8812F) 9523 #define BITS_H2CQ_DESC_NUM_8812F \ 9524 (BIT_MASK_H2CQ_DESC_NUM_8812F << BIT_SHIFT_H2CQ_DESC_NUM_8812F) 9525 #define BIT_CLEAR_H2CQ_DESC_NUM_8812F(x) ((x) & (~BITS_H2CQ_DESC_NUM_8812F)) 9526 #define BIT_GET_H2CQ_DESC_NUM_8812F(x) \ 9527 (((x) >> BIT_SHIFT_H2CQ_DESC_NUM_8812F) & BIT_MASK_H2CQ_DESC_NUM_8812F) 9528 #define BIT_SET_H2CQ_DESC_NUM_8812F(x, v) \ 9529 (BIT_CLEAR_H2CQ_DESC_NUM_8812F(x) | BIT_H2CQ_DESC_NUM_8812F(v)) 9530 9531 /* 2 REG_H2CQ_TXBD_IDX_8812F */ 9532 9533 #define BIT_SHIFT_H2CQ_HW_IDX_8812F 16 9534 #define BIT_MASK_H2CQ_HW_IDX_8812F 0xfff 9535 #define BIT_H2CQ_HW_IDX_8812F(x) \ 9536 (((x) & BIT_MASK_H2CQ_HW_IDX_8812F) << BIT_SHIFT_H2CQ_HW_IDX_8812F) 9537 #define BITS_H2CQ_HW_IDX_8812F \ 9538 (BIT_MASK_H2CQ_HW_IDX_8812F << BIT_SHIFT_H2CQ_HW_IDX_8812F) 9539 #define BIT_CLEAR_H2CQ_HW_IDX_8812F(x) ((x) & (~BITS_H2CQ_HW_IDX_8812F)) 9540 #define BIT_GET_H2CQ_HW_IDX_8812F(x) \ 9541 (((x) >> BIT_SHIFT_H2CQ_HW_IDX_8812F) & BIT_MASK_H2CQ_HW_IDX_8812F) 9542 #define BIT_SET_H2CQ_HW_IDX_8812F(x, v) \ 9543 (BIT_CLEAR_H2CQ_HW_IDX_8812F(x) | BIT_H2CQ_HW_IDX_8812F(v)) 9544 9545 #define BIT_SHIFT_H2CQ_HOST_IDX_8812F 0 9546 #define BIT_MASK_H2CQ_HOST_IDX_8812F 0xfff 9547 #define BIT_H2CQ_HOST_IDX_8812F(x) \ 9548 (((x) & BIT_MASK_H2CQ_HOST_IDX_8812F) << BIT_SHIFT_H2CQ_HOST_IDX_8812F) 9549 #define BITS_H2CQ_HOST_IDX_8812F \ 9550 (BIT_MASK_H2CQ_HOST_IDX_8812F << BIT_SHIFT_H2CQ_HOST_IDX_8812F) 9551 #define BIT_CLEAR_H2CQ_HOST_IDX_8812F(x) ((x) & (~BITS_H2CQ_HOST_IDX_8812F)) 9552 #define BIT_GET_H2CQ_HOST_IDX_8812F(x) \ 9553 (((x) >> BIT_SHIFT_H2CQ_HOST_IDX_8812F) & BIT_MASK_H2CQ_HOST_IDX_8812F) 9554 #define BIT_SET_H2CQ_HOST_IDX_8812F(x, v) \ 9555 (BIT_CLEAR_H2CQ_HOST_IDX_8812F(x) | BIT_H2CQ_HOST_IDX_8812F(v)) 9556 9557 /* 2 REG_H2CQ_CSR_8812F[31:0] (H2CQ CONTROL AND STATUS) */ 9558 #define BIT_H2CQ_FULL_8812F BIT(31) 9559 #define BIT_CLR_H2CQ_HOST_IDX_8812F BIT(16) 9560 #define BIT_CLR_H2CQ_HW_IDX_8812F BIT(8) 9561 #define BIT_STOP_H2CQ_8812F BIT(0) 9562 9563 /* 2 REG_CHANGE_PCIE_SPEED_8812F */ 9564 9565 /* 2 REG_NOT_VALID_8812F */ 9566 9567 #define BIT_SHIFT_RXDMA_ERR_CNT_8812F 8 9568 #define BIT_MASK_RXDMA_ERR_CNT_8812F 0xff 9569 #define BIT_RXDMA_ERR_CNT_8812F(x) \ 9570 (((x) & BIT_MASK_RXDMA_ERR_CNT_8812F) << BIT_SHIFT_RXDMA_ERR_CNT_8812F) 9571 #define BITS_RXDMA_ERR_CNT_8812F \ 9572 (BIT_MASK_RXDMA_ERR_CNT_8812F << BIT_SHIFT_RXDMA_ERR_CNT_8812F) 9573 #define BIT_CLEAR_RXDMA_ERR_CNT_8812F(x) ((x) & (~BITS_RXDMA_ERR_CNT_8812F)) 9574 #define BIT_GET_RXDMA_ERR_CNT_8812F(x) \ 9575 (((x) >> BIT_SHIFT_RXDMA_ERR_CNT_8812F) & BIT_MASK_RXDMA_ERR_CNT_8812F) 9576 #define BIT_SET_RXDMA_ERR_CNT_8812F(x, v) \ 9577 (BIT_CLEAR_RXDMA_ERR_CNT_8812F(x) | BIT_RXDMA_ERR_CNT_8812F(v)) 9578 9579 #define BIT_TXDMA_ERR_HANDLE_REQ_8812F BIT(7) 9580 #define BIT_TXDMA_ERROR_PS_8812F BIT(6) 9581 #define BIT_EN_TXDMA_STUCK_ERR_HANDLE_8812F BIT(5) 9582 #define BIT_EN_TXDMA_RTN_ERR_HANDLE_8812F BIT(4) 9583 #define BIT_RXDMA_ERR_HANDLE_REQ_8812F BIT(3) 9584 #define BIT_RXDMA_ERROR_PS_8812F BIT(2) 9585 #define BIT_EN_RXDMA_STUCK_ERR_HANDLE_8812F BIT(1) 9586 #define BIT_EN_RXDMA_RTN_ERR_HANDLE_8812F BIT(0) 9587 9588 /* 2 REG_DEBUG_STATE1_8812F */ 9589 9590 #define BIT_SHIFT_DEBUG_STATE1_8812F 0 9591 #define BIT_MASK_DEBUG_STATE1_8812F 0xffffffffL 9592 #define BIT_DEBUG_STATE1_8812F(x) \ 9593 (((x) & BIT_MASK_DEBUG_STATE1_8812F) << BIT_SHIFT_DEBUG_STATE1_8812F) 9594 #define BITS_DEBUG_STATE1_8812F \ 9595 (BIT_MASK_DEBUG_STATE1_8812F << BIT_SHIFT_DEBUG_STATE1_8812F) 9596 #define BIT_CLEAR_DEBUG_STATE1_8812F(x) ((x) & (~BITS_DEBUG_STATE1_8812F)) 9597 #define BIT_GET_DEBUG_STATE1_8812F(x) \ 9598 (((x) >> BIT_SHIFT_DEBUG_STATE1_8812F) & BIT_MASK_DEBUG_STATE1_8812F) 9599 #define BIT_SET_DEBUG_STATE1_8812F(x, v) \ 9600 (BIT_CLEAR_DEBUG_STATE1_8812F(x) | BIT_DEBUG_STATE1_8812F(v)) 9601 9602 /* 2 REG_DEBUG_STATE2_8812F */ 9603 9604 #define BIT_SHIFT_DEBUG_STATE2_8812F 0 9605 #define BIT_MASK_DEBUG_STATE2_8812F 0xffffffffL 9606 #define BIT_DEBUG_STATE2_8812F(x) \ 9607 (((x) & BIT_MASK_DEBUG_STATE2_8812F) << BIT_SHIFT_DEBUG_STATE2_8812F) 9608 #define BITS_DEBUG_STATE2_8812F \ 9609 (BIT_MASK_DEBUG_STATE2_8812F << BIT_SHIFT_DEBUG_STATE2_8812F) 9610 #define BIT_CLEAR_DEBUG_STATE2_8812F(x) ((x) & (~BITS_DEBUG_STATE2_8812F)) 9611 #define BIT_GET_DEBUG_STATE2_8812F(x) \ 9612 (((x) >> BIT_SHIFT_DEBUG_STATE2_8812F) & BIT_MASK_DEBUG_STATE2_8812F) 9613 #define BIT_SET_DEBUG_STATE2_8812F(x, v) \ 9614 (BIT_CLEAR_DEBUG_STATE2_8812F(x) | BIT_DEBUG_STATE2_8812F(v)) 9615 9616 /* 2 REG_DEBUG_STATE3_8812F */ 9617 9618 #define BIT_SHIFT_DEBUG_STATE3_8812F 0 9619 #define BIT_MASK_DEBUG_STATE3_8812F 0xffffffffL 9620 #define BIT_DEBUG_STATE3_8812F(x) \ 9621 (((x) & BIT_MASK_DEBUG_STATE3_8812F) << BIT_SHIFT_DEBUG_STATE3_8812F) 9622 #define BITS_DEBUG_STATE3_8812F \ 9623 (BIT_MASK_DEBUG_STATE3_8812F << BIT_SHIFT_DEBUG_STATE3_8812F) 9624 #define BIT_CLEAR_DEBUG_STATE3_8812F(x) ((x) & (~BITS_DEBUG_STATE3_8812F)) 9625 #define BIT_GET_DEBUG_STATE3_8812F(x) \ 9626 (((x) >> BIT_SHIFT_DEBUG_STATE3_8812F) & BIT_MASK_DEBUG_STATE3_8812F) 9627 #define BIT_SET_DEBUG_STATE3_8812F(x, v) \ 9628 (BIT_CLEAR_DEBUG_STATE3_8812F(x) | BIT_DEBUG_STATE3_8812F(v)) 9629 9630 /* 2 REG_CHNL_DMA_CFG_V1_8812F */ 9631 #define BIT_TXHCI_EN_V1_8812F BIT(26) 9632 #define BIT_TXHCI_IDLE_V1_8812F BIT(25) 9633 #define BIT_DMA_PRI_EN_V1_8812F BIT(24) 9634 9635 /* 2 REG_PCIE_HISR0_V1_8812F */ 9636 #define BIT_PSTIMER_2_8812F BIT(31) 9637 #define BIT_PSTIMER_1_8812F BIT(30) 9638 #define BIT_PSTIMER_0_8812F BIT(29) 9639 #define BIT_GTINT4_8812F BIT(28) 9640 #define BIT_GTINT3_8812F BIT(27) 9641 #define BIT_TXBCN0ERR_8812F BIT(26) 9642 #define BIT_TXBCN0OK_8812F BIT(25) 9643 #define BIT_TSF_BIT32_TOGGLE_8812F BIT(24) 9644 #define BIT_TXDMA_START_INT_8812F BIT(23) 9645 #define BIT_TXDMA_STOP_INT_8812F BIT(22) 9646 #define BIT_HISR7_IND_8812F BIT(21) 9647 #define BIT_BCNDMAINT0_8812F BIT(20) 9648 #define BIT_HISR6_IND_8812F BIT(19) 9649 #define BIT_HISR5_IND_8812F BIT(18) 9650 #define BIT_HISR4_IND_8812F BIT(17) 9651 #define BIT_BCNDERR0_8812F BIT(16) 9652 #define BIT_HSISR_IND_ON_INT_8812F BIT(15) 9653 #define BIT_HISR3_IND_8812F BIT(14) 9654 #define BIT_HISR2_IND_8812F BIT(13) 9655 #define BIT_HISR1_IND_8812F BIT(11) 9656 #define BIT_C2HCMD_8812F BIT(10) 9657 #define BIT_CPWM2_8812F BIT(9) 9658 #define BIT_CPWM_8812F BIT(8) 9659 #define BIT_TXDMAOK_CHANNEL15_8812F BIT(7) 9660 #define BIT_TXDMAOK_CHANNEL14_8812F BIT(6) 9661 #define BIT_TXDMAOK_CHANNEL3_8812F BIT(5) 9662 #define BIT_TXDMAOK_CHANNEL2_8812F BIT(4) 9663 #define BIT_TXDMAOK_CHANNEL1_8812F BIT(3) 9664 #define BIT_TXDMAOK_CHANNEL0_8812F BIT(2) 9665 #define BIT_RDU_8812F BIT(1) 9666 #define BIT_RXOK_8812F BIT(0) 9667 9668 /* 2 REG_PCIE_HISR1_V1_8812F */ 9669 #define BIT_PRE_TX_ERR_INT_8812F BIT(31) 9670 #define BIT_TXFIFO_TH_INT_8812F BIT(30) 9671 #define BIT_BTON_STS_UPDATE_INT_8812F BIT(29) 9672 #define BIT_BCNDMAINT7_8812F BIT(27) 9673 #define BIT_BCNDMAINT6_8812F BIT(26) 9674 #define BIT_BCNDMAINT5_8812F BIT(25) 9675 #define BIT_BCNDMAINT4_8812F BIT(24) 9676 #define BIT_BCNDMAINT3_8812F BIT(23) 9677 #define BIT_BCNDMAINT2_8812F BIT(22) 9678 #define BIT_BCNDMAINT1_8812F BIT(21) 9679 #define BIT_BCNDERR7_8812F BIT(20) 9680 #define BIT_BCNDERR6_8812F BIT(19) 9681 #define BIT_BCNDERR5_8812F BIT(18) 9682 #define BIT_BCNDERR4_8812F BIT(17) 9683 #define BIT_BCNDERR3_8812F BIT(16) 9684 #define BIT_BCNDERR2_8812F BIT(15) 9685 #define BIT_BCNDERR1_8812F BIT(14) 9686 #define BIT_ATIMEND_8812F BIT(12) 9687 #define BIT_TXERR_INT_8812F BIT(11) 9688 #define BIT_RXERR_INT_8812F BIT(10) 9689 #define BIT_TXFOVW_8812F BIT(9) 9690 #define BIT_FOVW_8812F BIT(8) 9691 #define BIT_CPU_MGQ_EARLY_INT_8812F BIT(6) 9692 #define BIT_CPU_MGQ_TXDONE_8812F BIT(5) 9693 #define BIT_PSTIMER_5_8812F BIT(4) 9694 #define BIT_PSTIMER_4_8812F BIT(3) 9695 #define BIT_PSTIMER_3_8812F BIT(2) 9696 #define BIT_CPUMGQ_TX_TIMER_8812F BIT(1) 9697 #define BIT_BB_STOPRX_INT_8812F BIT(0) 9698 9699 /* 2 REG_PCIE_HISR2_V1_8812F */ 9700 #define BIT_BCNDMAINT_P4_8812F BIT(31) 9701 #define BIT_BCNDMAINT_P3_8812F BIT(30) 9702 #define BIT_BCNDMAINT_P2_8812F BIT(29) 9703 #define BIT_BCNDMAINT_P1_8812F BIT(28) 9704 #define BIT_SCH_PHY_TXOP_SIFS_INT_8812F BIT(23) 9705 #define BIT_ATIMEND7_8812F BIT(22) 9706 #define BIT_ATIMEND6_8812F BIT(21) 9707 #define BIT_ATIMEND5_8812F BIT(20) 9708 #define BIT_ATIMEND4_8812F BIT(19) 9709 #define BIT_ATIMEND3_8812F BIT(18) 9710 #define BIT_ATIMEND2_8812F BIT(17) 9711 #define BIT_ATIMEND1_8812F BIT(16) 9712 #define BIT_TXBCN7OK_8812F BIT(14) 9713 #define BIT_TXBCN6OK_8812F BIT(13) 9714 #define BIT_TXBCN5OK_8812F BIT(12) 9715 #define BIT_TXBCN4OK_8812F BIT(11) 9716 #define BIT_TXBCN3OK_8812F BIT(10) 9717 #define BIT_TXBCN2OK_8812F BIT(9) 9718 #define BIT_TXBCN1OK_8812F BIT(8) 9719 #define BIT_TXBCN7ERR_8812F BIT(6) 9720 #define BIT_TXBCN6ERR_8812F BIT(5) 9721 #define BIT_TXBCN5ERR_8812F BIT(4) 9722 #define BIT_TXBCN4ERR_8812F BIT(3) 9723 #define BIT_TXBCN3ERR_8812F BIT(2) 9724 #define BIT_TXBCN2ERR_8812F BIT(1) 9725 #define BIT_TXBCN1ERR_8812F BIT(0) 9726 9727 /* 2 REG_PCIE_HISR3_V1_8812F */ 9728 #define BIT_GTINT12_8812F BIT(24) 9729 #define BIT_GTINT11_8812F BIT(23) 9730 #define BIT_GTINT10_8812F BIT(22) 9731 #define BIT_GTINT9_8812F BIT(21) 9732 #define BIT_RX_DESC_BUF_FULL_8812F BIT(20) 9733 #define BIT_CPHY_LDO_OCP_DET_INT_8812F BIT(19) 9734 #define BIT_WDT_PLATFORM_INT_8812F BIT(18) 9735 #define BIT_WDT_CPU_INT_8812F BIT(17) 9736 #define BIT_SETH2CDOK_8812F BIT(16) 9737 #define BIT_H2C_CMD_FULL_8812F BIT(15) 9738 #define BIT_PKT_TRANS_ERR_8812F BIT(14) 9739 #define BIT_TXSHORTCUT_TXDESUPDATEOK_8812F BIT(13) 9740 #define BIT_TXSHORTCUT_BKUPDATEOK_8812F BIT(12) 9741 #define BIT_TXSHORTCUT_BEUPDATEOK_8812F BIT(11) 9742 #define BIT_TXSHORTCUT_VIUPDATEOK_8812F BIT(10) 9743 #define BIT_TXSHORTCUT_VOUPDATEOK_8812F BIT(9) 9744 #define BIT_SEARCH_FAIL_8812F BIT(8) 9745 #define BIT_PWR_INT_127TO96_8812F BIT(7) 9746 #define BIT_PWR_INT_95TO64_8812F BIT(6) 9747 #define BIT_PWR_INT_63TO32_8812F BIT(5) 9748 #define BIT_PWR_INT_31TO0_8812F BIT(4) 9749 #define BIT_RX_DMA_STUCK_8812F BIT(3) 9750 #define BIT_TX_DMA_STUCK_8812F BIT(2) 9751 #define BIT_DDMA0_LP_INT_8812F BIT(1) 9752 #define BIT_DDMA0_HP_INT_8812F BIT(0) 9753 9754 /* 2 REG_NOT_VALID_8812F */ 9755 9756 /* 2 REG_Q0_INFO_8812F */ 9757 9758 #define BIT_SHIFT_QUEUEMACID_Q0_V1_8812F 25 9759 #define BIT_MASK_QUEUEMACID_Q0_V1_8812F 0x7f 9760 #define BIT_QUEUEMACID_Q0_V1_8812F(x) \ 9761 (((x) & BIT_MASK_QUEUEMACID_Q0_V1_8812F) \ 9762 << BIT_SHIFT_QUEUEMACID_Q0_V1_8812F) 9763 #define BITS_QUEUEMACID_Q0_V1_8812F \ 9764 (BIT_MASK_QUEUEMACID_Q0_V1_8812F << BIT_SHIFT_QUEUEMACID_Q0_V1_8812F) 9765 #define BIT_CLEAR_QUEUEMACID_Q0_V1_8812F(x) \ 9766 ((x) & (~BITS_QUEUEMACID_Q0_V1_8812F)) 9767 #define BIT_GET_QUEUEMACID_Q0_V1_8812F(x) \ 9768 (((x) >> BIT_SHIFT_QUEUEMACID_Q0_V1_8812F) & \ 9769 BIT_MASK_QUEUEMACID_Q0_V1_8812F) 9770 #define BIT_SET_QUEUEMACID_Q0_V1_8812F(x, v) \ 9771 (BIT_CLEAR_QUEUEMACID_Q0_V1_8812F(x) | BIT_QUEUEMACID_Q0_V1_8812F(v)) 9772 9773 #define BIT_SHIFT_QUEUEAC_Q0_V1_8812F 23 9774 #define BIT_MASK_QUEUEAC_Q0_V1_8812F 0x3 9775 #define BIT_QUEUEAC_Q0_V1_8812F(x) \ 9776 (((x) & BIT_MASK_QUEUEAC_Q0_V1_8812F) << BIT_SHIFT_QUEUEAC_Q0_V1_8812F) 9777 #define BITS_QUEUEAC_Q0_V1_8812F \ 9778 (BIT_MASK_QUEUEAC_Q0_V1_8812F << BIT_SHIFT_QUEUEAC_Q0_V1_8812F) 9779 #define BIT_CLEAR_QUEUEAC_Q0_V1_8812F(x) ((x) & (~BITS_QUEUEAC_Q0_V1_8812F)) 9780 #define BIT_GET_QUEUEAC_Q0_V1_8812F(x) \ 9781 (((x) >> BIT_SHIFT_QUEUEAC_Q0_V1_8812F) & BIT_MASK_QUEUEAC_Q0_V1_8812F) 9782 #define BIT_SET_QUEUEAC_Q0_V1_8812F(x, v) \ 9783 (BIT_CLEAR_QUEUEAC_Q0_V1_8812F(x) | BIT_QUEUEAC_Q0_V1_8812F(v)) 9784 9785 #define BIT_TIDEMPTY_Q0_V1_8812F BIT(22) 9786 9787 #define BIT_SHIFT_TAIL_PKT_Q0_V2_8812F 11 9788 #define BIT_MASK_TAIL_PKT_Q0_V2_8812F 0x7ff 9789 #define BIT_TAIL_PKT_Q0_V2_8812F(x) \ 9790 (((x) & BIT_MASK_TAIL_PKT_Q0_V2_8812F) \ 9791 << BIT_SHIFT_TAIL_PKT_Q0_V2_8812F) 9792 #define BITS_TAIL_PKT_Q0_V2_8812F \ 9793 (BIT_MASK_TAIL_PKT_Q0_V2_8812F << BIT_SHIFT_TAIL_PKT_Q0_V2_8812F) 9794 #define BIT_CLEAR_TAIL_PKT_Q0_V2_8812F(x) ((x) & (~BITS_TAIL_PKT_Q0_V2_8812F)) 9795 #define BIT_GET_TAIL_PKT_Q0_V2_8812F(x) \ 9796 (((x) >> BIT_SHIFT_TAIL_PKT_Q0_V2_8812F) & \ 9797 BIT_MASK_TAIL_PKT_Q0_V2_8812F) 9798 #define BIT_SET_TAIL_PKT_Q0_V2_8812F(x, v) \ 9799 (BIT_CLEAR_TAIL_PKT_Q0_V2_8812F(x) | BIT_TAIL_PKT_Q0_V2_8812F(v)) 9800 9801 #define BIT_SHIFT_HEAD_PKT_Q0_V1_8812F 0 9802 #define BIT_MASK_HEAD_PKT_Q0_V1_8812F 0x7ff 9803 #define BIT_HEAD_PKT_Q0_V1_8812F(x) \ 9804 (((x) & BIT_MASK_HEAD_PKT_Q0_V1_8812F) \ 9805 << BIT_SHIFT_HEAD_PKT_Q0_V1_8812F) 9806 #define BITS_HEAD_PKT_Q0_V1_8812F \ 9807 (BIT_MASK_HEAD_PKT_Q0_V1_8812F << BIT_SHIFT_HEAD_PKT_Q0_V1_8812F) 9808 #define BIT_CLEAR_HEAD_PKT_Q0_V1_8812F(x) ((x) & (~BITS_HEAD_PKT_Q0_V1_8812F)) 9809 #define BIT_GET_HEAD_PKT_Q0_V1_8812F(x) \ 9810 (((x) >> BIT_SHIFT_HEAD_PKT_Q0_V1_8812F) & \ 9811 BIT_MASK_HEAD_PKT_Q0_V1_8812F) 9812 #define BIT_SET_HEAD_PKT_Q0_V1_8812F(x, v) \ 9813 (BIT_CLEAR_HEAD_PKT_Q0_V1_8812F(x) | BIT_HEAD_PKT_Q0_V1_8812F(v)) 9814 9815 /* 2 REG_Q1_INFO_8812F */ 9816 9817 #define BIT_SHIFT_QUEUEMACID_Q1_V1_8812F 25 9818 #define BIT_MASK_QUEUEMACID_Q1_V1_8812F 0x7f 9819 #define BIT_QUEUEMACID_Q1_V1_8812F(x) \ 9820 (((x) & BIT_MASK_QUEUEMACID_Q1_V1_8812F) \ 9821 << BIT_SHIFT_QUEUEMACID_Q1_V1_8812F) 9822 #define BITS_QUEUEMACID_Q1_V1_8812F \ 9823 (BIT_MASK_QUEUEMACID_Q1_V1_8812F << BIT_SHIFT_QUEUEMACID_Q1_V1_8812F) 9824 #define BIT_CLEAR_QUEUEMACID_Q1_V1_8812F(x) \ 9825 ((x) & (~BITS_QUEUEMACID_Q1_V1_8812F)) 9826 #define BIT_GET_QUEUEMACID_Q1_V1_8812F(x) \ 9827 (((x) >> BIT_SHIFT_QUEUEMACID_Q1_V1_8812F) & \ 9828 BIT_MASK_QUEUEMACID_Q1_V1_8812F) 9829 #define BIT_SET_QUEUEMACID_Q1_V1_8812F(x, v) \ 9830 (BIT_CLEAR_QUEUEMACID_Q1_V1_8812F(x) | BIT_QUEUEMACID_Q1_V1_8812F(v)) 9831 9832 #define BIT_SHIFT_QUEUEAC_Q1_V1_8812F 23 9833 #define BIT_MASK_QUEUEAC_Q1_V1_8812F 0x3 9834 #define BIT_QUEUEAC_Q1_V1_8812F(x) \ 9835 (((x) & BIT_MASK_QUEUEAC_Q1_V1_8812F) << BIT_SHIFT_QUEUEAC_Q1_V1_8812F) 9836 #define BITS_QUEUEAC_Q1_V1_8812F \ 9837 (BIT_MASK_QUEUEAC_Q1_V1_8812F << BIT_SHIFT_QUEUEAC_Q1_V1_8812F) 9838 #define BIT_CLEAR_QUEUEAC_Q1_V1_8812F(x) ((x) & (~BITS_QUEUEAC_Q1_V1_8812F)) 9839 #define BIT_GET_QUEUEAC_Q1_V1_8812F(x) \ 9840 (((x) >> BIT_SHIFT_QUEUEAC_Q1_V1_8812F) & BIT_MASK_QUEUEAC_Q1_V1_8812F) 9841 #define BIT_SET_QUEUEAC_Q1_V1_8812F(x, v) \ 9842 (BIT_CLEAR_QUEUEAC_Q1_V1_8812F(x) | BIT_QUEUEAC_Q1_V1_8812F(v)) 9843 9844 #define BIT_TIDEMPTY_Q1_V1_8812F BIT(22) 9845 9846 #define BIT_SHIFT_TAIL_PKT_Q1_V2_8812F 11 9847 #define BIT_MASK_TAIL_PKT_Q1_V2_8812F 0x7ff 9848 #define BIT_TAIL_PKT_Q1_V2_8812F(x) \ 9849 (((x) & BIT_MASK_TAIL_PKT_Q1_V2_8812F) \ 9850 << BIT_SHIFT_TAIL_PKT_Q1_V2_8812F) 9851 #define BITS_TAIL_PKT_Q1_V2_8812F \ 9852 (BIT_MASK_TAIL_PKT_Q1_V2_8812F << BIT_SHIFT_TAIL_PKT_Q1_V2_8812F) 9853 #define BIT_CLEAR_TAIL_PKT_Q1_V2_8812F(x) ((x) & (~BITS_TAIL_PKT_Q1_V2_8812F)) 9854 #define BIT_GET_TAIL_PKT_Q1_V2_8812F(x) \ 9855 (((x) >> BIT_SHIFT_TAIL_PKT_Q1_V2_8812F) & \ 9856 BIT_MASK_TAIL_PKT_Q1_V2_8812F) 9857 #define BIT_SET_TAIL_PKT_Q1_V2_8812F(x, v) \ 9858 (BIT_CLEAR_TAIL_PKT_Q1_V2_8812F(x) | BIT_TAIL_PKT_Q1_V2_8812F(v)) 9859 9860 #define BIT_SHIFT_HEAD_PKT_Q1_V1_8812F 0 9861 #define BIT_MASK_HEAD_PKT_Q1_V1_8812F 0x7ff 9862 #define BIT_HEAD_PKT_Q1_V1_8812F(x) \ 9863 (((x) & BIT_MASK_HEAD_PKT_Q1_V1_8812F) \ 9864 << BIT_SHIFT_HEAD_PKT_Q1_V1_8812F) 9865 #define BITS_HEAD_PKT_Q1_V1_8812F \ 9866 (BIT_MASK_HEAD_PKT_Q1_V1_8812F << BIT_SHIFT_HEAD_PKT_Q1_V1_8812F) 9867 #define BIT_CLEAR_HEAD_PKT_Q1_V1_8812F(x) ((x) & (~BITS_HEAD_PKT_Q1_V1_8812F)) 9868 #define BIT_GET_HEAD_PKT_Q1_V1_8812F(x) \ 9869 (((x) >> BIT_SHIFT_HEAD_PKT_Q1_V1_8812F) & \ 9870 BIT_MASK_HEAD_PKT_Q1_V1_8812F) 9871 #define BIT_SET_HEAD_PKT_Q1_V1_8812F(x, v) \ 9872 (BIT_CLEAR_HEAD_PKT_Q1_V1_8812F(x) | BIT_HEAD_PKT_Q1_V1_8812F(v)) 9873 9874 /* 2 REG_Q2_INFO_8812F */ 9875 9876 #define BIT_SHIFT_QUEUEMACID_Q2_V1_8812F 25 9877 #define BIT_MASK_QUEUEMACID_Q2_V1_8812F 0x7f 9878 #define BIT_QUEUEMACID_Q2_V1_8812F(x) \ 9879 (((x) & BIT_MASK_QUEUEMACID_Q2_V1_8812F) \ 9880 << BIT_SHIFT_QUEUEMACID_Q2_V1_8812F) 9881 #define BITS_QUEUEMACID_Q2_V1_8812F \ 9882 (BIT_MASK_QUEUEMACID_Q2_V1_8812F << BIT_SHIFT_QUEUEMACID_Q2_V1_8812F) 9883 #define BIT_CLEAR_QUEUEMACID_Q2_V1_8812F(x) \ 9884 ((x) & (~BITS_QUEUEMACID_Q2_V1_8812F)) 9885 #define BIT_GET_QUEUEMACID_Q2_V1_8812F(x) \ 9886 (((x) >> BIT_SHIFT_QUEUEMACID_Q2_V1_8812F) & \ 9887 BIT_MASK_QUEUEMACID_Q2_V1_8812F) 9888 #define BIT_SET_QUEUEMACID_Q2_V1_8812F(x, v) \ 9889 (BIT_CLEAR_QUEUEMACID_Q2_V1_8812F(x) | BIT_QUEUEMACID_Q2_V1_8812F(v)) 9890 9891 #define BIT_SHIFT_QUEUEAC_Q2_V1_8812F 23 9892 #define BIT_MASK_QUEUEAC_Q2_V1_8812F 0x3 9893 #define BIT_QUEUEAC_Q2_V1_8812F(x) \ 9894 (((x) & BIT_MASK_QUEUEAC_Q2_V1_8812F) << BIT_SHIFT_QUEUEAC_Q2_V1_8812F) 9895 #define BITS_QUEUEAC_Q2_V1_8812F \ 9896 (BIT_MASK_QUEUEAC_Q2_V1_8812F << BIT_SHIFT_QUEUEAC_Q2_V1_8812F) 9897 #define BIT_CLEAR_QUEUEAC_Q2_V1_8812F(x) ((x) & (~BITS_QUEUEAC_Q2_V1_8812F)) 9898 #define BIT_GET_QUEUEAC_Q2_V1_8812F(x) \ 9899 (((x) >> BIT_SHIFT_QUEUEAC_Q2_V1_8812F) & BIT_MASK_QUEUEAC_Q2_V1_8812F) 9900 #define BIT_SET_QUEUEAC_Q2_V1_8812F(x, v) \ 9901 (BIT_CLEAR_QUEUEAC_Q2_V1_8812F(x) | BIT_QUEUEAC_Q2_V1_8812F(v)) 9902 9903 #define BIT_TIDEMPTY_Q2_V1_8812F BIT(22) 9904 9905 #define BIT_SHIFT_TAIL_PKT_Q2_V2_8812F 11 9906 #define BIT_MASK_TAIL_PKT_Q2_V2_8812F 0x7ff 9907 #define BIT_TAIL_PKT_Q2_V2_8812F(x) \ 9908 (((x) & BIT_MASK_TAIL_PKT_Q2_V2_8812F) \ 9909 << BIT_SHIFT_TAIL_PKT_Q2_V2_8812F) 9910 #define BITS_TAIL_PKT_Q2_V2_8812F \ 9911 (BIT_MASK_TAIL_PKT_Q2_V2_8812F << BIT_SHIFT_TAIL_PKT_Q2_V2_8812F) 9912 #define BIT_CLEAR_TAIL_PKT_Q2_V2_8812F(x) ((x) & (~BITS_TAIL_PKT_Q2_V2_8812F)) 9913 #define BIT_GET_TAIL_PKT_Q2_V2_8812F(x) \ 9914 (((x) >> BIT_SHIFT_TAIL_PKT_Q2_V2_8812F) & \ 9915 BIT_MASK_TAIL_PKT_Q2_V2_8812F) 9916 #define BIT_SET_TAIL_PKT_Q2_V2_8812F(x, v) \ 9917 (BIT_CLEAR_TAIL_PKT_Q2_V2_8812F(x) | BIT_TAIL_PKT_Q2_V2_8812F(v)) 9918 9919 #define BIT_SHIFT_HEAD_PKT_Q2_V1_8812F 0 9920 #define BIT_MASK_HEAD_PKT_Q2_V1_8812F 0x7ff 9921 #define BIT_HEAD_PKT_Q2_V1_8812F(x) \ 9922 (((x) & BIT_MASK_HEAD_PKT_Q2_V1_8812F) \ 9923 << BIT_SHIFT_HEAD_PKT_Q2_V1_8812F) 9924 #define BITS_HEAD_PKT_Q2_V1_8812F \ 9925 (BIT_MASK_HEAD_PKT_Q2_V1_8812F << BIT_SHIFT_HEAD_PKT_Q2_V1_8812F) 9926 #define BIT_CLEAR_HEAD_PKT_Q2_V1_8812F(x) ((x) & (~BITS_HEAD_PKT_Q2_V1_8812F)) 9927 #define BIT_GET_HEAD_PKT_Q2_V1_8812F(x) \ 9928 (((x) >> BIT_SHIFT_HEAD_PKT_Q2_V1_8812F) & \ 9929 BIT_MASK_HEAD_PKT_Q2_V1_8812F) 9930 #define BIT_SET_HEAD_PKT_Q2_V1_8812F(x, v) \ 9931 (BIT_CLEAR_HEAD_PKT_Q2_V1_8812F(x) | BIT_HEAD_PKT_Q2_V1_8812F(v)) 9932 9933 /* 2 REG_Q3_INFO_8812F */ 9934 9935 #define BIT_SHIFT_QUEUEMACID_Q3_V1_8812F 25 9936 #define BIT_MASK_QUEUEMACID_Q3_V1_8812F 0x7f 9937 #define BIT_QUEUEMACID_Q3_V1_8812F(x) \ 9938 (((x) & BIT_MASK_QUEUEMACID_Q3_V1_8812F) \ 9939 << BIT_SHIFT_QUEUEMACID_Q3_V1_8812F) 9940 #define BITS_QUEUEMACID_Q3_V1_8812F \ 9941 (BIT_MASK_QUEUEMACID_Q3_V1_8812F << BIT_SHIFT_QUEUEMACID_Q3_V1_8812F) 9942 #define BIT_CLEAR_QUEUEMACID_Q3_V1_8812F(x) \ 9943 ((x) & (~BITS_QUEUEMACID_Q3_V1_8812F)) 9944 #define BIT_GET_QUEUEMACID_Q3_V1_8812F(x) \ 9945 (((x) >> BIT_SHIFT_QUEUEMACID_Q3_V1_8812F) & \ 9946 BIT_MASK_QUEUEMACID_Q3_V1_8812F) 9947 #define BIT_SET_QUEUEMACID_Q3_V1_8812F(x, v) \ 9948 (BIT_CLEAR_QUEUEMACID_Q3_V1_8812F(x) | BIT_QUEUEMACID_Q3_V1_8812F(v)) 9949 9950 #define BIT_SHIFT_QUEUEAC_Q3_V1_8812F 23 9951 #define BIT_MASK_QUEUEAC_Q3_V1_8812F 0x3 9952 #define BIT_QUEUEAC_Q3_V1_8812F(x) \ 9953 (((x) & BIT_MASK_QUEUEAC_Q3_V1_8812F) << BIT_SHIFT_QUEUEAC_Q3_V1_8812F) 9954 #define BITS_QUEUEAC_Q3_V1_8812F \ 9955 (BIT_MASK_QUEUEAC_Q3_V1_8812F << BIT_SHIFT_QUEUEAC_Q3_V1_8812F) 9956 #define BIT_CLEAR_QUEUEAC_Q3_V1_8812F(x) ((x) & (~BITS_QUEUEAC_Q3_V1_8812F)) 9957 #define BIT_GET_QUEUEAC_Q3_V1_8812F(x) \ 9958 (((x) >> BIT_SHIFT_QUEUEAC_Q3_V1_8812F) & BIT_MASK_QUEUEAC_Q3_V1_8812F) 9959 #define BIT_SET_QUEUEAC_Q3_V1_8812F(x, v) \ 9960 (BIT_CLEAR_QUEUEAC_Q3_V1_8812F(x) | BIT_QUEUEAC_Q3_V1_8812F(v)) 9961 9962 #define BIT_TIDEMPTY_Q3_V1_8812F BIT(22) 9963 9964 #define BIT_SHIFT_TAIL_PKT_Q3_V2_8812F 11 9965 #define BIT_MASK_TAIL_PKT_Q3_V2_8812F 0x7ff 9966 #define BIT_TAIL_PKT_Q3_V2_8812F(x) \ 9967 (((x) & BIT_MASK_TAIL_PKT_Q3_V2_8812F) \ 9968 << BIT_SHIFT_TAIL_PKT_Q3_V2_8812F) 9969 #define BITS_TAIL_PKT_Q3_V2_8812F \ 9970 (BIT_MASK_TAIL_PKT_Q3_V2_8812F << BIT_SHIFT_TAIL_PKT_Q3_V2_8812F) 9971 #define BIT_CLEAR_TAIL_PKT_Q3_V2_8812F(x) ((x) & (~BITS_TAIL_PKT_Q3_V2_8812F)) 9972 #define BIT_GET_TAIL_PKT_Q3_V2_8812F(x) \ 9973 (((x) >> BIT_SHIFT_TAIL_PKT_Q3_V2_8812F) & \ 9974 BIT_MASK_TAIL_PKT_Q3_V2_8812F) 9975 #define BIT_SET_TAIL_PKT_Q3_V2_8812F(x, v) \ 9976 (BIT_CLEAR_TAIL_PKT_Q3_V2_8812F(x) | BIT_TAIL_PKT_Q3_V2_8812F(v)) 9977 9978 #define BIT_SHIFT_HEAD_PKT_Q3_V1_8812F 0 9979 #define BIT_MASK_HEAD_PKT_Q3_V1_8812F 0x7ff 9980 #define BIT_HEAD_PKT_Q3_V1_8812F(x) \ 9981 (((x) & BIT_MASK_HEAD_PKT_Q3_V1_8812F) \ 9982 << BIT_SHIFT_HEAD_PKT_Q3_V1_8812F) 9983 #define BITS_HEAD_PKT_Q3_V1_8812F \ 9984 (BIT_MASK_HEAD_PKT_Q3_V1_8812F << BIT_SHIFT_HEAD_PKT_Q3_V1_8812F) 9985 #define BIT_CLEAR_HEAD_PKT_Q3_V1_8812F(x) ((x) & (~BITS_HEAD_PKT_Q3_V1_8812F)) 9986 #define BIT_GET_HEAD_PKT_Q3_V1_8812F(x) \ 9987 (((x) >> BIT_SHIFT_HEAD_PKT_Q3_V1_8812F) & \ 9988 BIT_MASK_HEAD_PKT_Q3_V1_8812F) 9989 #define BIT_SET_HEAD_PKT_Q3_V1_8812F(x, v) \ 9990 (BIT_CLEAR_HEAD_PKT_Q3_V1_8812F(x) | BIT_HEAD_PKT_Q3_V1_8812F(v)) 9991 9992 /* 2 REG_MGQ_INFO_8812F */ 9993 9994 #define BIT_SHIFT_QUEUEMACID_MGQ_V1_8812F 25 9995 #define BIT_MASK_QUEUEMACID_MGQ_V1_8812F 0x7f 9996 #define BIT_QUEUEMACID_MGQ_V1_8812F(x) \ 9997 (((x) & BIT_MASK_QUEUEMACID_MGQ_V1_8812F) \ 9998 << BIT_SHIFT_QUEUEMACID_MGQ_V1_8812F) 9999 #define BITS_QUEUEMACID_MGQ_V1_8812F \ 10000 (BIT_MASK_QUEUEMACID_MGQ_V1_8812F << BIT_SHIFT_QUEUEMACID_MGQ_V1_8812F) 10001 #define BIT_CLEAR_QUEUEMACID_MGQ_V1_8812F(x) \ 10002 ((x) & (~BITS_QUEUEMACID_MGQ_V1_8812F)) 10003 #define BIT_GET_QUEUEMACID_MGQ_V1_8812F(x) \ 10004 (((x) >> BIT_SHIFT_QUEUEMACID_MGQ_V1_8812F) & \ 10005 BIT_MASK_QUEUEMACID_MGQ_V1_8812F) 10006 #define BIT_SET_QUEUEMACID_MGQ_V1_8812F(x, v) \ 10007 (BIT_CLEAR_QUEUEMACID_MGQ_V1_8812F(x) | BIT_QUEUEMACID_MGQ_V1_8812F(v)) 10008 10009 #define BIT_SHIFT_QUEUEAC_MGQ_V1_8812F 23 10010 #define BIT_MASK_QUEUEAC_MGQ_V1_8812F 0x3 10011 #define BIT_QUEUEAC_MGQ_V1_8812F(x) \ 10012 (((x) & BIT_MASK_QUEUEAC_MGQ_V1_8812F) \ 10013 << BIT_SHIFT_QUEUEAC_MGQ_V1_8812F) 10014 #define BITS_QUEUEAC_MGQ_V1_8812F \ 10015 (BIT_MASK_QUEUEAC_MGQ_V1_8812F << BIT_SHIFT_QUEUEAC_MGQ_V1_8812F) 10016 #define BIT_CLEAR_QUEUEAC_MGQ_V1_8812F(x) ((x) & (~BITS_QUEUEAC_MGQ_V1_8812F)) 10017 #define BIT_GET_QUEUEAC_MGQ_V1_8812F(x) \ 10018 (((x) >> BIT_SHIFT_QUEUEAC_MGQ_V1_8812F) & \ 10019 BIT_MASK_QUEUEAC_MGQ_V1_8812F) 10020 #define BIT_SET_QUEUEAC_MGQ_V1_8812F(x, v) \ 10021 (BIT_CLEAR_QUEUEAC_MGQ_V1_8812F(x) | BIT_QUEUEAC_MGQ_V1_8812F(v)) 10022 10023 #define BIT_TIDEMPTY_MGQ_V1_8812F BIT(22) 10024 10025 #define BIT_SHIFT_TAIL_PKT_MGQ_V2_8812F 11 10026 #define BIT_MASK_TAIL_PKT_MGQ_V2_8812F 0x7ff 10027 #define BIT_TAIL_PKT_MGQ_V2_8812F(x) \ 10028 (((x) & BIT_MASK_TAIL_PKT_MGQ_V2_8812F) \ 10029 << BIT_SHIFT_TAIL_PKT_MGQ_V2_8812F) 10030 #define BITS_TAIL_PKT_MGQ_V2_8812F \ 10031 (BIT_MASK_TAIL_PKT_MGQ_V2_8812F << BIT_SHIFT_TAIL_PKT_MGQ_V2_8812F) 10032 #define BIT_CLEAR_TAIL_PKT_MGQ_V2_8812F(x) ((x) & (~BITS_TAIL_PKT_MGQ_V2_8812F)) 10033 #define BIT_GET_TAIL_PKT_MGQ_V2_8812F(x) \ 10034 (((x) >> BIT_SHIFT_TAIL_PKT_MGQ_V2_8812F) & \ 10035 BIT_MASK_TAIL_PKT_MGQ_V2_8812F) 10036 #define BIT_SET_TAIL_PKT_MGQ_V2_8812F(x, v) \ 10037 (BIT_CLEAR_TAIL_PKT_MGQ_V2_8812F(x) | BIT_TAIL_PKT_MGQ_V2_8812F(v)) 10038 10039 #define BIT_SHIFT_HEAD_PKT_MGQ_V1_8812F 0 10040 #define BIT_MASK_HEAD_PKT_MGQ_V1_8812F 0x7ff 10041 #define BIT_HEAD_PKT_MGQ_V1_8812F(x) \ 10042 (((x) & BIT_MASK_HEAD_PKT_MGQ_V1_8812F) \ 10043 << BIT_SHIFT_HEAD_PKT_MGQ_V1_8812F) 10044 #define BITS_HEAD_PKT_MGQ_V1_8812F \ 10045 (BIT_MASK_HEAD_PKT_MGQ_V1_8812F << BIT_SHIFT_HEAD_PKT_MGQ_V1_8812F) 10046 #define BIT_CLEAR_HEAD_PKT_MGQ_V1_8812F(x) ((x) & (~BITS_HEAD_PKT_MGQ_V1_8812F)) 10047 #define BIT_GET_HEAD_PKT_MGQ_V1_8812F(x) \ 10048 (((x) >> BIT_SHIFT_HEAD_PKT_MGQ_V1_8812F) & \ 10049 BIT_MASK_HEAD_PKT_MGQ_V1_8812F) 10050 #define BIT_SET_HEAD_PKT_MGQ_V1_8812F(x, v) \ 10051 (BIT_CLEAR_HEAD_PKT_MGQ_V1_8812F(x) | BIT_HEAD_PKT_MGQ_V1_8812F(v)) 10052 10053 /* 2 REG_HIQ_INFO_8812F */ 10054 10055 #define BIT_SHIFT_QUEUEMACID_HIQ_V1_8812F 25 10056 #define BIT_MASK_QUEUEMACID_HIQ_V1_8812F 0x7f 10057 #define BIT_QUEUEMACID_HIQ_V1_8812F(x) \ 10058 (((x) & BIT_MASK_QUEUEMACID_HIQ_V1_8812F) \ 10059 << BIT_SHIFT_QUEUEMACID_HIQ_V1_8812F) 10060 #define BITS_QUEUEMACID_HIQ_V1_8812F \ 10061 (BIT_MASK_QUEUEMACID_HIQ_V1_8812F << BIT_SHIFT_QUEUEMACID_HIQ_V1_8812F) 10062 #define BIT_CLEAR_QUEUEMACID_HIQ_V1_8812F(x) \ 10063 ((x) & (~BITS_QUEUEMACID_HIQ_V1_8812F)) 10064 #define BIT_GET_QUEUEMACID_HIQ_V1_8812F(x) \ 10065 (((x) >> BIT_SHIFT_QUEUEMACID_HIQ_V1_8812F) & \ 10066 BIT_MASK_QUEUEMACID_HIQ_V1_8812F) 10067 #define BIT_SET_QUEUEMACID_HIQ_V1_8812F(x, v) \ 10068 (BIT_CLEAR_QUEUEMACID_HIQ_V1_8812F(x) | BIT_QUEUEMACID_HIQ_V1_8812F(v)) 10069 10070 #define BIT_SHIFT_QUEUEAC_HIQ_V1_8812F 23 10071 #define BIT_MASK_QUEUEAC_HIQ_V1_8812F 0x3 10072 #define BIT_QUEUEAC_HIQ_V1_8812F(x) \ 10073 (((x) & BIT_MASK_QUEUEAC_HIQ_V1_8812F) \ 10074 << BIT_SHIFT_QUEUEAC_HIQ_V1_8812F) 10075 #define BITS_QUEUEAC_HIQ_V1_8812F \ 10076 (BIT_MASK_QUEUEAC_HIQ_V1_8812F << BIT_SHIFT_QUEUEAC_HIQ_V1_8812F) 10077 #define BIT_CLEAR_QUEUEAC_HIQ_V1_8812F(x) ((x) & (~BITS_QUEUEAC_HIQ_V1_8812F)) 10078 #define BIT_GET_QUEUEAC_HIQ_V1_8812F(x) \ 10079 (((x) >> BIT_SHIFT_QUEUEAC_HIQ_V1_8812F) & \ 10080 BIT_MASK_QUEUEAC_HIQ_V1_8812F) 10081 #define BIT_SET_QUEUEAC_HIQ_V1_8812F(x, v) \ 10082 (BIT_CLEAR_QUEUEAC_HIQ_V1_8812F(x) | BIT_QUEUEAC_HIQ_V1_8812F(v)) 10083 10084 #define BIT_TIDEMPTY_HIQ_V1_8812F BIT(22) 10085 10086 #define BIT_SHIFT_TAIL_PKT_HIQ_V2_8812F 11 10087 #define BIT_MASK_TAIL_PKT_HIQ_V2_8812F 0x7ff 10088 #define BIT_TAIL_PKT_HIQ_V2_8812F(x) \ 10089 (((x) & BIT_MASK_TAIL_PKT_HIQ_V2_8812F) \ 10090 << BIT_SHIFT_TAIL_PKT_HIQ_V2_8812F) 10091 #define BITS_TAIL_PKT_HIQ_V2_8812F \ 10092 (BIT_MASK_TAIL_PKT_HIQ_V2_8812F << BIT_SHIFT_TAIL_PKT_HIQ_V2_8812F) 10093 #define BIT_CLEAR_TAIL_PKT_HIQ_V2_8812F(x) ((x) & (~BITS_TAIL_PKT_HIQ_V2_8812F)) 10094 #define BIT_GET_TAIL_PKT_HIQ_V2_8812F(x) \ 10095 (((x) >> BIT_SHIFT_TAIL_PKT_HIQ_V2_8812F) & \ 10096 BIT_MASK_TAIL_PKT_HIQ_V2_8812F) 10097 #define BIT_SET_TAIL_PKT_HIQ_V2_8812F(x, v) \ 10098 (BIT_CLEAR_TAIL_PKT_HIQ_V2_8812F(x) | BIT_TAIL_PKT_HIQ_V2_8812F(v)) 10099 10100 #define BIT_SHIFT_HEAD_PKT_HIQ_V1_8812F 0 10101 #define BIT_MASK_HEAD_PKT_HIQ_V1_8812F 0x7ff 10102 #define BIT_HEAD_PKT_HIQ_V1_8812F(x) \ 10103 (((x) & BIT_MASK_HEAD_PKT_HIQ_V1_8812F) \ 10104 << BIT_SHIFT_HEAD_PKT_HIQ_V1_8812F) 10105 #define BITS_HEAD_PKT_HIQ_V1_8812F \ 10106 (BIT_MASK_HEAD_PKT_HIQ_V1_8812F << BIT_SHIFT_HEAD_PKT_HIQ_V1_8812F) 10107 #define BIT_CLEAR_HEAD_PKT_HIQ_V1_8812F(x) ((x) & (~BITS_HEAD_PKT_HIQ_V1_8812F)) 10108 #define BIT_GET_HEAD_PKT_HIQ_V1_8812F(x) \ 10109 (((x) >> BIT_SHIFT_HEAD_PKT_HIQ_V1_8812F) & \ 10110 BIT_MASK_HEAD_PKT_HIQ_V1_8812F) 10111 #define BIT_SET_HEAD_PKT_HIQ_V1_8812F(x, v) \ 10112 (BIT_CLEAR_HEAD_PKT_HIQ_V1_8812F(x) | BIT_HEAD_PKT_HIQ_V1_8812F(v)) 10113 10114 /* 2 REG_BCNQ_INFO_8812F */ 10115 10116 #define BIT_SHIFT_BCNQ_HEAD_PG_V1_8812F 0 10117 #define BIT_MASK_BCNQ_HEAD_PG_V1_8812F 0xfff 10118 #define BIT_BCNQ_HEAD_PG_V1_8812F(x) \ 10119 (((x) & BIT_MASK_BCNQ_HEAD_PG_V1_8812F) \ 10120 << BIT_SHIFT_BCNQ_HEAD_PG_V1_8812F) 10121 #define BITS_BCNQ_HEAD_PG_V1_8812F \ 10122 (BIT_MASK_BCNQ_HEAD_PG_V1_8812F << BIT_SHIFT_BCNQ_HEAD_PG_V1_8812F) 10123 #define BIT_CLEAR_BCNQ_HEAD_PG_V1_8812F(x) ((x) & (~BITS_BCNQ_HEAD_PG_V1_8812F)) 10124 #define BIT_GET_BCNQ_HEAD_PG_V1_8812F(x) \ 10125 (((x) >> BIT_SHIFT_BCNQ_HEAD_PG_V1_8812F) & \ 10126 BIT_MASK_BCNQ_HEAD_PG_V1_8812F) 10127 #define BIT_SET_BCNQ_HEAD_PG_V1_8812F(x, v) \ 10128 (BIT_CLEAR_BCNQ_HEAD_PG_V1_8812F(x) | BIT_BCNQ_HEAD_PG_V1_8812F(v)) 10129 10130 /* 2 REG_TXPKT_EMPTY_8812F */ 10131 #define BIT_BCNQ_EMPTY_8812F BIT(11) 10132 #define BIT_HQQ_EMPTY_8812F BIT(10) 10133 #define BIT_MQQ_EMPTY_8812F BIT(9) 10134 #define BIT_MGQ_CPU_EMPTY_8812F BIT(8) 10135 #define BIT_AC7Q_EMPTY_8812F BIT(7) 10136 #define BIT_AC6Q_EMPTY_8812F BIT(6) 10137 #define BIT_AC5Q_EMPTY_8812F BIT(5) 10138 #define BIT_AC4Q_EMPTY_8812F BIT(4) 10139 #define BIT_AC3Q_EMPTY_8812F BIT(3) 10140 #define BIT_AC2Q_EMPTY_8812F BIT(2) 10141 #define BIT_AC1Q_EMPTY_8812F BIT(1) 10142 #define BIT_AC0Q_EMPTY_8812F BIT(0) 10143 10144 /* 2 REG_CPU_MGQ_INFO_8812F */ 10145 #define BIT_BCN1_POLL_8812F BIT(30) 10146 #define BIT_CPUMGT_POLL_8812F BIT(29) 10147 #define BIT_BCN_POLL_8812F BIT(28) 10148 #define BIT_CPUMGQ_FW_NUM_V1_8812F BIT(12) 10149 10150 #define BIT_SHIFT_FW_FREE_TAIL_V1_8812F 0 10151 #define BIT_MASK_FW_FREE_TAIL_V1_8812F 0xfff 10152 #define BIT_FW_FREE_TAIL_V1_8812F(x) \ 10153 (((x) & BIT_MASK_FW_FREE_TAIL_V1_8812F) \ 10154 << BIT_SHIFT_FW_FREE_TAIL_V1_8812F) 10155 #define BITS_FW_FREE_TAIL_V1_8812F \ 10156 (BIT_MASK_FW_FREE_TAIL_V1_8812F << BIT_SHIFT_FW_FREE_TAIL_V1_8812F) 10157 #define BIT_CLEAR_FW_FREE_TAIL_V1_8812F(x) ((x) & (~BITS_FW_FREE_TAIL_V1_8812F)) 10158 #define BIT_GET_FW_FREE_TAIL_V1_8812F(x) \ 10159 (((x) >> BIT_SHIFT_FW_FREE_TAIL_V1_8812F) & \ 10160 BIT_MASK_FW_FREE_TAIL_V1_8812F) 10161 #define BIT_SET_FW_FREE_TAIL_V1_8812F(x, v) \ 10162 (BIT_CLEAR_FW_FREE_TAIL_V1_8812F(x) | BIT_FW_FREE_TAIL_V1_8812F(v)) 10163 10164 /* 2 REG_FWHW_TXQ_CTRL_8812F */ 10165 #define BIT_RTS_LIMIT_IN_OFDM_8812F BIT(23) 10166 #define BIT_EN_BCNQ_DL_8812F BIT(22) 10167 #define BIT_EN_RD_RESP_NAV_BK_8812F BIT(21) 10168 #define BIT_EN_WR_FREE_TAIL_8812F BIT(20) 10169 #define BIT_NOTXRPT_USERATE_EN_8812F BIT(19) 10170 #define BIT_DIS_TXFAIL_RPT_8812F BIT(18) 10171 #define BIT_FTM_TIMEOUT_BYPASS_8812F BIT(16) 10172 10173 #define BIT_SHIFT_EN_QUEUE_RPT_8812F 8 10174 #define BIT_MASK_EN_QUEUE_RPT_8812F 0xff 10175 #define BIT_EN_QUEUE_RPT_8812F(x) \ 10176 (((x) & BIT_MASK_EN_QUEUE_RPT_8812F) << BIT_SHIFT_EN_QUEUE_RPT_8812F) 10177 #define BITS_EN_QUEUE_RPT_8812F \ 10178 (BIT_MASK_EN_QUEUE_RPT_8812F << BIT_SHIFT_EN_QUEUE_RPT_8812F) 10179 #define BIT_CLEAR_EN_QUEUE_RPT_8812F(x) ((x) & (~BITS_EN_QUEUE_RPT_8812F)) 10180 #define BIT_GET_EN_QUEUE_RPT_8812F(x) \ 10181 (((x) >> BIT_SHIFT_EN_QUEUE_RPT_8812F) & BIT_MASK_EN_QUEUE_RPT_8812F) 10182 #define BIT_SET_EN_QUEUE_RPT_8812F(x, v) \ 10183 (BIT_CLEAR_EN_QUEUE_RPT_8812F(x) | BIT_EN_QUEUE_RPT_8812F(v)) 10184 10185 #define BIT_EN_RTY_BK_8812F BIT(7) 10186 #define BIT_EN_USE_INI_RAT_8812F BIT(6) 10187 #define BIT_EN_RTS_NAV_BK_8812F BIT(5) 10188 #define BIT_DIS_SSN_CHECK_8812F BIT(4) 10189 #define BIT_MACID_MATCH_RTS_8812F BIT(3) 10190 #define BIT_EN_BCN_TRXRPT_V1_8812F BIT(2) 10191 #define BIT_R_EN_FTMRPT_V1_8812F BIT(1) 10192 #define BIT_R_BMC_NAV_PROTECT_8812F BIT(0) 10193 10194 /* 2 REG_DATAFB_SEL_8812F */ 10195 #define BIT_BROADCAST_RTY_EN_8812F BIT(3) 10196 #define BIT_EN_RTY_BK_COD_8812F BIT(2) 10197 10198 #define BIT_SHIFT__R_DATA_FALLBACK_SEL_8812F 0 10199 #define BIT_MASK__R_DATA_FALLBACK_SEL_8812F 0x3 10200 #define BIT__R_DATA_FALLBACK_SEL_8812F(x) \ 10201 (((x) & BIT_MASK__R_DATA_FALLBACK_SEL_8812F) \ 10202 << BIT_SHIFT__R_DATA_FALLBACK_SEL_8812F) 10203 #define BITS__R_DATA_FALLBACK_SEL_8812F \ 10204 (BIT_MASK__R_DATA_FALLBACK_SEL_8812F \ 10205 << BIT_SHIFT__R_DATA_FALLBACK_SEL_8812F) 10206 #define BIT_CLEAR__R_DATA_FALLBACK_SEL_8812F(x) \ 10207 ((x) & (~BITS__R_DATA_FALLBACK_SEL_8812F)) 10208 #define BIT_GET__R_DATA_FALLBACK_SEL_8812F(x) \ 10209 (((x) >> BIT_SHIFT__R_DATA_FALLBACK_SEL_8812F) & \ 10210 BIT_MASK__R_DATA_FALLBACK_SEL_8812F) 10211 #define BIT_SET__R_DATA_FALLBACK_SEL_8812F(x, v) \ 10212 (BIT_CLEAR__R_DATA_FALLBACK_SEL_8812F(x) | \ 10213 BIT__R_DATA_FALLBACK_SEL_8812F(v)) 10214 10215 /* 2 REG_BCNQ_BDNY_V1_8812F */ 10216 10217 #define BIT_SHIFT_BCNQ_PGBNDY_V1_8812F 0 10218 #define BIT_MASK_BCNQ_PGBNDY_V1_8812F 0xfff 10219 #define BIT_BCNQ_PGBNDY_V1_8812F(x) \ 10220 (((x) & BIT_MASK_BCNQ_PGBNDY_V1_8812F) \ 10221 << BIT_SHIFT_BCNQ_PGBNDY_V1_8812F) 10222 #define BITS_BCNQ_PGBNDY_V1_8812F \ 10223 (BIT_MASK_BCNQ_PGBNDY_V1_8812F << BIT_SHIFT_BCNQ_PGBNDY_V1_8812F) 10224 #define BIT_CLEAR_BCNQ_PGBNDY_V1_8812F(x) ((x) & (~BITS_BCNQ_PGBNDY_V1_8812F)) 10225 #define BIT_GET_BCNQ_PGBNDY_V1_8812F(x) \ 10226 (((x) >> BIT_SHIFT_BCNQ_PGBNDY_V1_8812F) & \ 10227 BIT_MASK_BCNQ_PGBNDY_V1_8812F) 10228 #define BIT_SET_BCNQ_PGBNDY_V1_8812F(x, v) \ 10229 (BIT_CLEAR_BCNQ_PGBNDY_V1_8812F(x) | BIT_BCNQ_PGBNDY_V1_8812F(v)) 10230 10231 /* 2 REG_LIFETIME_EN_8812F */ 10232 #define BIT_BT_INT_CPU_8812F BIT(7) 10233 #define BIT_BT_INT_PTA_8812F BIT(6) 10234 #define BIT_BA_PARSER_EN_8812F BIT(5) 10235 #define BIT_EN_CTRL_RTYBIT_8812F BIT(4) 10236 #define BIT_LIFETIME_BK_EN_8812F BIT(3) 10237 #define BIT_LIFETIME_BE_EN_8812F BIT(2) 10238 #define BIT_LIFETIME_VI_EN_8812F BIT(1) 10239 #define BIT_LIFETIME_VO_EN_8812F BIT(0) 10240 10241 /* 2 REG_NOT_VALID_8812F */ 10242 10243 /* 2 REG_SPEC_SIFS_8812F */ 10244 10245 #define BIT_SHIFT_SPEC_SIFS_OFDM_PTCL_8812F 8 10246 #define BIT_MASK_SPEC_SIFS_OFDM_PTCL_8812F 0xff 10247 #define BIT_SPEC_SIFS_OFDM_PTCL_8812F(x) \ 10248 (((x) & BIT_MASK_SPEC_SIFS_OFDM_PTCL_8812F) \ 10249 << BIT_SHIFT_SPEC_SIFS_OFDM_PTCL_8812F) 10250 #define BITS_SPEC_SIFS_OFDM_PTCL_8812F \ 10251 (BIT_MASK_SPEC_SIFS_OFDM_PTCL_8812F \ 10252 << BIT_SHIFT_SPEC_SIFS_OFDM_PTCL_8812F) 10253 #define BIT_CLEAR_SPEC_SIFS_OFDM_PTCL_8812F(x) \ 10254 ((x) & (~BITS_SPEC_SIFS_OFDM_PTCL_8812F)) 10255 #define BIT_GET_SPEC_SIFS_OFDM_PTCL_8812F(x) \ 10256 (((x) >> BIT_SHIFT_SPEC_SIFS_OFDM_PTCL_8812F) & \ 10257 BIT_MASK_SPEC_SIFS_OFDM_PTCL_8812F) 10258 #define BIT_SET_SPEC_SIFS_OFDM_PTCL_8812F(x, v) \ 10259 (BIT_CLEAR_SPEC_SIFS_OFDM_PTCL_8812F(x) | \ 10260 BIT_SPEC_SIFS_OFDM_PTCL_8812F(v)) 10261 10262 #define BIT_SHIFT_SPEC_SIFS_CCK_PTCL_8812F 0 10263 #define BIT_MASK_SPEC_SIFS_CCK_PTCL_8812F 0xff 10264 #define BIT_SPEC_SIFS_CCK_PTCL_8812F(x) \ 10265 (((x) & BIT_MASK_SPEC_SIFS_CCK_PTCL_8812F) \ 10266 << BIT_SHIFT_SPEC_SIFS_CCK_PTCL_8812F) 10267 #define BITS_SPEC_SIFS_CCK_PTCL_8812F \ 10268 (BIT_MASK_SPEC_SIFS_CCK_PTCL_8812F \ 10269 << BIT_SHIFT_SPEC_SIFS_CCK_PTCL_8812F) 10270 #define BIT_CLEAR_SPEC_SIFS_CCK_PTCL_8812F(x) \ 10271 ((x) & (~BITS_SPEC_SIFS_CCK_PTCL_8812F)) 10272 #define BIT_GET_SPEC_SIFS_CCK_PTCL_8812F(x) \ 10273 (((x) >> BIT_SHIFT_SPEC_SIFS_CCK_PTCL_8812F) & \ 10274 BIT_MASK_SPEC_SIFS_CCK_PTCL_8812F) 10275 #define BIT_SET_SPEC_SIFS_CCK_PTCL_8812F(x, v) \ 10276 (BIT_CLEAR_SPEC_SIFS_CCK_PTCL_8812F(x) | \ 10277 BIT_SPEC_SIFS_CCK_PTCL_8812F(v)) 10278 10279 /* 2 REG_RETRY_LIMIT_8812F */ 10280 10281 #define BIT_SHIFT_SRL_8812F 8 10282 #define BIT_MASK_SRL_8812F 0x3f 10283 #define BIT_SRL_8812F(x) (((x) & BIT_MASK_SRL_8812F) << BIT_SHIFT_SRL_8812F) 10284 #define BITS_SRL_8812F (BIT_MASK_SRL_8812F << BIT_SHIFT_SRL_8812F) 10285 #define BIT_CLEAR_SRL_8812F(x) ((x) & (~BITS_SRL_8812F)) 10286 #define BIT_GET_SRL_8812F(x) (((x) >> BIT_SHIFT_SRL_8812F) & BIT_MASK_SRL_8812F) 10287 #define BIT_SET_SRL_8812F(x, v) (BIT_CLEAR_SRL_8812F(x) | BIT_SRL_8812F(v)) 10288 10289 #define BIT_SHIFT_LRL_8812F 0 10290 #define BIT_MASK_LRL_8812F 0x3f 10291 #define BIT_LRL_8812F(x) (((x) & BIT_MASK_LRL_8812F) << BIT_SHIFT_LRL_8812F) 10292 #define BITS_LRL_8812F (BIT_MASK_LRL_8812F << BIT_SHIFT_LRL_8812F) 10293 #define BIT_CLEAR_LRL_8812F(x) ((x) & (~BITS_LRL_8812F)) 10294 #define BIT_GET_LRL_8812F(x) (((x) >> BIT_SHIFT_LRL_8812F) & BIT_MASK_LRL_8812F) 10295 #define BIT_SET_LRL_8812F(x, v) (BIT_CLEAR_LRL_8812F(x) | BIT_LRL_8812F(v)) 10296 10297 /* 2 REG_TXBF_CTRL_8812F */ 10298 #define BIT_R_ENABLE_NDPA_8812F BIT(31) 10299 #define BIT_USE_NDPA_PARAMETER_8812F BIT(30) 10300 #define BIT_R_PROP_TXBF_8812F BIT(29) 10301 #define BIT_R_EN_NDPA_INT_8812F BIT(28) 10302 #define BIT_R_TXBF1_80M_8812F BIT(27) 10303 #define BIT_R_TXBF1_40M_8812F BIT(26) 10304 #define BIT_R_TXBF1_20M_8812F BIT(25) 10305 10306 #define BIT_SHIFT_R_TXBF1_AID_8812F 16 10307 #define BIT_MASK_R_TXBF1_AID_8812F 0x1ff 10308 #define BIT_R_TXBF1_AID_8812F(x) \ 10309 (((x) & BIT_MASK_R_TXBF1_AID_8812F) << BIT_SHIFT_R_TXBF1_AID_8812F) 10310 #define BITS_R_TXBF1_AID_8812F \ 10311 (BIT_MASK_R_TXBF1_AID_8812F << BIT_SHIFT_R_TXBF1_AID_8812F) 10312 #define BIT_CLEAR_R_TXBF1_AID_8812F(x) ((x) & (~BITS_R_TXBF1_AID_8812F)) 10313 #define BIT_GET_R_TXBF1_AID_8812F(x) \ 10314 (((x) >> BIT_SHIFT_R_TXBF1_AID_8812F) & BIT_MASK_R_TXBF1_AID_8812F) 10315 #define BIT_SET_R_TXBF1_AID_8812F(x, v) \ 10316 (BIT_CLEAR_R_TXBF1_AID_8812F(x) | BIT_R_TXBF1_AID_8812F(v)) 10317 10318 #define BIT_DIS_NDP_BFEN_8812F BIT(15) 10319 #define BIT_R_TXBCN_NOBLOCK_NDP_8812F BIT(14) 10320 #define BIT_R_TXBF0_80M_8812F BIT(11) 10321 #define BIT_R_TXBF0_40M_8812F BIT(10) 10322 #define BIT_R_TXBF0_20M_8812F BIT(9) 10323 10324 #define BIT_SHIFT_R_TXBF0_AID_8812F 0 10325 #define BIT_MASK_R_TXBF0_AID_8812F 0x1ff 10326 #define BIT_R_TXBF0_AID_8812F(x) \ 10327 (((x) & BIT_MASK_R_TXBF0_AID_8812F) << BIT_SHIFT_R_TXBF0_AID_8812F) 10328 #define BITS_R_TXBF0_AID_8812F \ 10329 (BIT_MASK_R_TXBF0_AID_8812F << BIT_SHIFT_R_TXBF0_AID_8812F) 10330 #define BIT_CLEAR_R_TXBF0_AID_8812F(x) ((x) & (~BITS_R_TXBF0_AID_8812F)) 10331 #define BIT_GET_R_TXBF0_AID_8812F(x) \ 10332 (((x) >> BIT_SHIFT_R_TXBF0_AID_8812F) & BIT_MASK_R_TXBF0_AID_8812F) 10333 #define BIT_SET_R_TXBF0_AID_8812F(x, v) \ 10334 (BIT_CLEAR_R_TXBF0_AID_8812F(x) | BIT_R_TXBF0_AID_8812F(v)) 10335 10336 /* 2 REG_DARFRC_8812F */ 10337 10338 #define BIT_SHIFT_DARF_RC4_8812F 24 10339 #define BIT_MASK_DARF_RC4_8812F 0x1f 10340 #define BIT_DARF_RC4_8812F(x) \ 10341 (((x) & BIT_MASK_DARF_RC4_8812F) << BIT_SHIFT_DARF_RC4_8812F) 10342 #define BITS_DARF_RC4_8812F \ 10343 (BIT_MASK_DARF_RC4_8812F << BIT_SHIFT_DARF_RC4_8812F) 10344 #define BIT_CLEAR_DARF_RC4_8812F(x) ((x) & (~BITS_DARF_RC4_8812F)) 10345 #define BIT_GET_DARF_RC4_8812F(x) \ 10346 (((x) >> BIT_SHIFT_DARF_RC4_8812F) & BIT_MASK_DARF_RC4_8812F) 10347 #define BIT_SET_DARF_RC4_8812F(x, v) \ 10348 (BIT_CLEAR_DARF_RC4_8812F(x) | BIT_DARF_RC4_8812F(v)) 10349 10350 #define BIT_SHIFT_DARF_RC3_8812F 16 10351 #define BIT_MASK_DARF_RC3_8812F 0x1f 10352 #define BIT_DARF_RC3_8812F(x) \ 10353 (((x) & BIT_MASK_DARF_RC3_8812F) << BIT_SHIFT_DARF_RC3_8812F) 10354 #define BITS_DARF_RC3_8812F \ 10355 (BIT_MASK_DARF_RC3_8812F << BIT_SHIFT_DARF_RC3_8812F) 10356 #define BIT_CLEAR_DARF_RC3_8812F(x) ((x) & (~BITS_DARF_RC3_8812F)) 10357 #define BIT_GET_DARF_RC3_8812F(x) \ 10358 (((x) >> BIT_SHIFT_DARF_RC3_8812F) & BIT_MASK_DARF_RC3_8812F) 10359 #define BIT_SET_DARF_RC3_8812F(x, v) \ 10360 (BIT_CLEAR_DARF_RC3_8812F(x) | BIT_DARF_RC3_8812F(v)) 10361 10362 #define BIT_SHIFT_DARF_RC2_8812F 8 10363 #define BIT_MASK_DARF_RC2_8812F 0x1f 10364 #define BIT_DARF_RC2_8812F(x) \ 10365 (((x) & BIT_MASK_DARF_RC2_8812F) << BIT_SHIFT_DARF_RC2_8812F) 10366 #define BITS_DARF_RC2_8812F \ 10367 (BIT_MASK_DARF_RC2_8812F << BIT_SHIFT_DARF_RC2_8812F) 10368 #define BIT_CLEAR_DARF_RC2_8812F(x) ((x) & (~BITS_DARF_RC2_8812F)) 10369 #define BIT_GET_DARF_RC2_8812F(x) \ 10370 (((x) >> BIT_SHIFT_DARF_RC2_8812F) & BIT_MASK_DARF_RC2_8812F) 10371 #define BIT_SET_DARF_RC2_8812F(x, v) \ 10372 (BIT_CLEAR_DARF_RC2_8812F(x) | BIT_DARF_RC2_8812F(v)) 10373 10374 #define BIT_SHIFT_DARF_RC1_8812F 0 10375 #define BIT_MASK_DARF_RC1_8812F 0x1f 10376 #define BIT_DARF_RC1_8812F(x) \ 10377 (((x) & BIT_MASK_DARF_RC1_8812F) << BIT_SHIFT_DARF_RC1_8812F) 10378 #define BITS_DARF_RC1_8812F \ 10379 (BIT_MASK_DARF_RC1_8812F << BIT_SHIFT_DARF_RC1_8812F) 10380 #define BIT_CLEAR_DARF_RC1_8812F(x) ((x) & (~BITS_DARF_RC1_8812F)) 10381 #define BIT_GET_DARF_RC1_8812F(x) \ 10382 (((x) >> BIT_SHIFT_DARF_RC1_8812F) & BIT_MASK_DARF_RC1_8812F) 10383 #define BIT_SET_DARF_RC1_8812F(x, v) \ 10384 (BIT_CLEAR_DARF_RC1_8812F(x) | BIT_DARF_RC1_8812F(v)) 10385 10386 /* 2 REG_DARFRCH_8812F */ 10387 10388 #define BIT_SHIFT_DARF_RC8_V1_8812F 24 10389 #define BIT_MASK_DARF_RC8_V1_8812F 0x1f 10390 #define BIT_DARF_RC8_V1_8812F(x) \ 10391 (((x) & BIT_MASK_DARF_RC8_V1_8812F) << BIT_SHIFT_DARF_RC8_V1_8812F) 10392 #define BITS_DARF_RC8_V1_8812F \ 10393 (BIT_MASK_DARF_RC8_V1_8812F << BIT_SHIFT_DARF_RC8_V1_8812F) 10394 #define BIT_CLEAR_DARF_RC8_V1_8812F(x) ((x) & (~BITS_DARF_RC8_V1_8812F)) 10395 #define BIT_GET_DARF_RC8_V1_8812F(x) \ 10396 (((x) >> BIT_SHIFT_DARF_RC8_V1_8812F) & BIT_MASK_DARF_RC8_V1_8812F) 10397 #define BIT_SET_DARF_RC8_V1_8812F(x, v) \ 10398 (BIT_CLEAR_DARF_RC8_V1_8812F(x) | BIT_DARF_RC8_V1_8812F(v)) 10399 10400 #define BIT_SHIFT_DARF_RC7_V1_8812F 16 10401 #define BIT_MASK_DARF_RC7_V1_8812F 0x1f 10402 #define BIT_DARF_RC7_V1_8812F(x) \ 10403 (((x) & BIT_MASK_DARF_RC7_V1_8812F) << BIT_SHIFT_DARF_RC7_V1_8812F) 10404 #define BITS_DARF_RC7_V1_8812F \ 10405 (BIT_MASK_DARF_RC7_V1_8812F << BIT_SHIFT_DARF_RC7_V1_8812F) 10406 #define BIT_CLEAR_DARF_RC7_V1_8812F(x) ((x) & (~BITS_DARF_RC7_V1_8812F)) 10407 #define BIT_GET_DARF_RC7_V1_8812F(x) \ 10408 (((x) >> BIT_SHIFT_DARF_RC7_V1_8812F) & BIT_MASK_DARF_RC7_V1_8812F) 10409 #define BIT_SET_DARF_RC7_V1_8812F(x, v) \ 10410 (BIT_CLEAR_DARF_RC7_V1_8812F(x) | BIT_DARF_RC7_V1_8812F(v)) 10411 10412 #define BIT_SHIFT_DARF_RC6_V1_8812F 8 10413 #define BIT_MASK_DARF_RC6_V1_8812F 0x1f 10414 #define BIT_DARF_RC6_V1_8812F(x) \ 10415 (((x) & BIT_MASK_DARF_RC6_V1_8812F) << BIT_SHIFT_DARF_RC6_V1_8812F) 10416 #define BITS_DARF_RC6_V1_8812F \ 10417 (BIT_MASK_DARF_RC6_V1_8812F << BIT_SHIFT_DARF_RC6_V1_8812F) 10418 #define BIT_CLEAR_DARF_RC6_V1_8812F(x) ((x) & (~BITS_DARF_RC6_V1_8812F)) 10419 #define BIT_GET_DARF_RC6_V1_8812F(x) \ 10420 (((x) >> BIT_SHIFT_DARF_RC6_V1_8812F) & BIT_MASK_DARF_RC6_V1_8812F) 10421 #define BIT_SET_DARF_RC6_V1_8812F(x, v) \ 10422 (BIT_CLEAR_DARF_RC6_V1_8812F(x) | BIT_DARF_RC6_V1_8812F(v)) 10423 10424 #define BIT_SHIFT_DARF_RC5_V1_8812F 0 10425 #define BIT_MASK_DARF_RC5_V1_8812F 0x1f 10426 #define BIT_DARF_RC5_V1_8812F(x) \ 10427 (((x) & BIT_MASK_DARF_RC5_V1_8812F) << BIT_SHIFT_DARF_RC5_V1_8812F) 10428 #define BITS_DARF_RC5_V1_8812F \ 10429 (BIT_MASK_DARF_RC5_V1_8812F << BIT_SHIFT_DARF_RC5_V1_8812F) 10430 #define BIT_CLEAR_DARF_RC5_V1_8812F(x) ((x) & (~BITS_DARF_RC5_V1_8812F)) 10431 #define BIT_GET_DARF_RC5_V1_8812F(x) \ 10432 (((x) >> BIT_SHIFT_DARF_RC5_V1_8812F) & BIT_MASK_DARF_RC5_V1_8812F) 10433 #define BIT_SET_DARF_RC5_V1_8812F(x, v) \ 10434 (BIT_CLEAR_DARF_RC5_V1_8812F(x) | BIT_DARF_RC5_V1_8812F(v)) 10435 10436 /* 2 REG_RARFRC_8812F */ 10437 10438 #define BIT_SHIFT_RARF_RC4_8812F 24 10439 #define BIT_MASK_RARF_RC4_8812F 0x1f 10440 #define BIT_RARF_RC4_8812F(x) \ 10441 (((x) & BIT_MASK_RARF_RC4_8812F) << BIT_SHIFT_RARF_RC4_8812F) 10442 #define BITS_RARF_RC4_8812F \ 10443 (BIT_MASK_RARF_RC4_8812F << BIT_SHIFT_RARF_RC4_8812F) 10444 #define BIT_CLEAR_RARF_RC4_8812F(x) ((x) & (~BITS_RARF_RC4_8812F)) 10445 #define BIT_GET_RARF_RC4_8812F(x) \ 10446 (((x) >> BIT_SHIFT_RARF_RC4_8812F) & BIT_MASK_RARF_RC4_8812F) 10447 #define BIT_SET_RARF_RC4_8812F(x, v) \ 10448 (BIT_CLEAR_RARF_RC4_8812F(x) | BIT_RARF_RC4_8812F(v)) 10449 10450 #define BIT_SHIFT_RARF_RC3_8812F 16 10451 #define BIT_MASK_RARF_RC3_8812F 0x1f 10452 #define BIT_RARF_RC3_8812F(x) \ 10453 (((x) & BIT_MASK_RARF_RC3_8812F) << BIT_SHIFT_RARF_RC3_8812F) 10454 #define BITS_RARF_RC3_8812F \ 10455 (BIT_MASK_RARF_RC3_8812F << BIT_SHIFT_RARF_RC3_8812F) 10456 #define BIT_CLEAR_RARF_RC3_8812F(x) ((x) & (~BITS_RARF_RC3_8812F)) 10457 #define BIT_GET_RARF_RC3_8812F(x) \ 10458 (((x) >> BIT_SHIFT_RARF_RC3_8812F) & BIT_MASK_RARF_RC3_8812F) 10459 #define BIT_SET_RARF_RC3_8812F(x, v) \ 10460 (BIT_CLEAR_RARF_RC3_8812F(x) | BIT_RARF_RC3_8812F(v)) 10461 10462 #define BIT_SHIFT_RARF_RC2_8812F 8 10463 #define BIT_MASK_RARF_RC2_8812F 0x1f 10464 #define BIT_RARF_RC2_8812F(x) \ 10465 (((x) & BIT_MASK_RARF_RC2_8812F) << BIT_SHIFT_RARF_RC2_8812F) 10466 #define BITS_RARF_RC2_8812F \ 10467 (BIT_MASK_RARF_RC2_8812F << BIT_SHIFT_RARF_RC2_8812F) 10468 #define BIT_CLEAR_RARF_RC2_8812F(x) ((x) & (~BITS_RARF_RC2_8812F)) 10469 #define BIT_GET_RARF_RC2_8812F(x) \ 10470 (((x) >> BIT_SHIFT_RARF_RC2_8812F) & BIT_MASK_RARF_RC2_8812F) 10471 #define BIT_SET_RARF_RC2_8812F(x, v) \ 10472 (BIT_CLEAR_RARF_RC2_8812F(x) | BIT_RARF_RC2_8812F(v)) 10473 10474 #define BIT_SHIFT_RARF_RC1_8812F 0 10475 #define BIT_MASK_RARF_RC1_8812F 0x1f 10476 #define BIT_RARF_RC1_8812F(x) \ 10477 (((x) & BIT_MASK_RARF_RC1_8812F) << BIT_SHIFT_RARF_RC1_8812F) 10478 #define BITS_RARF_RC1_8812F \ 10479 (BIT_MASK_RARF_RC1_8812F << BIT_SHIFT_RARF_RC1_8812F) 10480 #define BIT_CLEAR_RARF_RC1_8812F(x) ((x) & (~BITS_RARF_RC1_8812F)) 10481 #define BIT_GET_RARF_RC1_8812F(x) \ 10482 (((x) >> BIT_SHIFT_RARF_RC1_8812F) & BIT_MASK_RARF_RC1_8812F) 10483 #define BIT_SET_RARF_RC1_8812F(x, v) \ 10484 (BIT_CLEAR_RARF_RC1_8812F(x) | BIT_RARF_RC1_8812F(v)) 10485 10486 /* 2 REG_RARFRCH_8812F */ 10487 10488 #define BIT_SHIFT_RARF_RC8_V1_8812F 24 10489 #define BIT_MASK_RARF_RC8_V1_8812F 0x1f 10490 #define BIT_RARF_RC8_V1_8812F(x) \ 10491 (((x) & BIT_MASK_RARF_RC8_V1_8812F) << BIT_SHIFT_RARF_RC8_V1_8812F) 10492 #define BITS_RARF_RC8_V1_8812F \ 10493 (BIT_MASK_RARF_RC8_V1_8812F << BIT_SHIFT_RARF_RC8_V1_8812F) 10494 #define BIT_CLEAR_RARF_RC8_V1_8812F(x) ((x) & (~BITS_RARF_RC8_V1_8812F)) 10495 #define BIT_GET_RARF_RC8_V1_8812F(x) \ 10496 (((x) >> BIT_SHIFT_RARF_RC8_V1_8812F) & BIT_MASK_RARF_RC8_V1_8812F) 10497 #define BIT_SET_RARF_RC8_V1_8812F(x, v) \ 10498 (BIT_CLEAR_RARF_RC8_V1_8812F(x) | BIT_RARF_RC8_V1_8812F(v)) 10499 10500 #define BIT_SHIFT_RARF_RC7_V1_8812F 16 10501 #define BIT_MASK_RARF_RC7_V1_8812F 0x1f 10502 #define BIT_RARF_RC7_V1_8812F(x) \ 10503 (((x) & BIT_MASK_RARF_RC7_V1_8812F) << BIT_SHIFT_RARF_RC7_V1_8812F) 10504 #define BITS_RARF_RC7_V1_8812F \ 10505 (BIT_MASK_RARF_RC7_V1_8812F << BIT_SHIFT_RARF_RC7_V1_8812F) 10506 #define BIT_CLEAR_RARF_RC7_V1_8812F(x) ((x) & (~BITS_RARF_RC7_V1_8812F)) 10507 #define BIT_GET_RARF_RC7_V1_8812F(x) \ 10508 (((x) >> BIT_SHIFT_RARF_RC7_V1_8812F) & BIT_MASK_RARF_RC7_V1_8812F) 10509 #define BIT_SET_RARF_RC7_V1_8812F(x, v) \ 10510 (BIT_CLEAR_RARF_RC7_V1_8812F(x) | BIT_RARF_RC7_V1_8812F(v)) 10511 10512 #define BIT_SHIFT_RARF_RC6_V1_8812F 8 10513 #define BIT_MASK_RARF_RC6_V1_8812F 0x1f 10514 #define BIT_RARF_RC6_V1_8812F(x) \ 10515 (((x) & BIT_MASK_RARF_RC6_V1_8812F) << BIT_SHIFT_RARF_RC6_V1_8812F) 10516 #define BITS_RARF_RC6_V1_8812F \ 10517 (BIT_MASK_RARF_RC6_V1_8812F << BIT_SHIFT_RARF_RC6_V1_8812F) 10518 #define BIT_CLEAR_RARF_RC6_V1_8812F(x) ((x) & (~BITS_RARF_RC6_V1_8812F)) 10519 #define BIT_GET_RARF_RC6_V1_8812F(x) \ 10520 (((x) >> BIT_SHIFT_RARF_RC6_V1_8812F) & BIT_MASK_RARF_RC6_V1_8812F) 10521 #define BIT_SET_RARF_RC6_V1_8812F(x, v) \ 10522 (BIT_CLEAR_RARF_RC6_V1_8812F(x) | BIT_RARF_RC6_V1_8812F(v)) 10523 10524 #define BIT_SHIFT_RARF_RC5_V1_8812F 0 10525 #define BIT_MASK_RARF_RC5_V1_8812F 0x1f 10526 #define BIT_RARF_RC5_V1_8812F(x) \ 10527 (((x) & BIT_MASK_RARF_RC5_V1_8812F) << BIT_SHIFT_RARF_RC5_V1_8812F) 10528 #define BITS_RARF_RC5_V1_8812F \ 10529 (BIT_MASK_RARF_RC5_V1_8812F << BIT_SHIFT_RARF_RC5_V1_8812F) 10530 #define BIT_CLEAR_RARF_RC5_V1_8812F(x) ((x) & (~BITS_RARF_RC5_V1_8812F)) 10531 #define BIT_GET_RARF_RC5_V1_8812F(x) \ 10532 (((x) >> BIT_SHIFT_RARF_RC5_V1_8812F) & BIT_MASK_RARF_RC5_V1_8812F) 10533 #define BIT_SET_RARF_RC5_V1_8812F(x, v) \ 10534 (BIT_CLEAR_RARF_RC5_V1_8812F(x) | BIT_RARF_RC5_V1_8812F(v)) 10535 10536 /* 2 REG_RRSR_8812F */ 10537 10538 #define BIT_SHIFT_RRSR_RSC_8812F 21 10539 #define BIT_MASK_RRSR_RSC_8812F 0x3 10540 #define BIT_RRSR_RSC_8812F(x) \ 10541 (((x) & BIT_MASK_RRSR_RSC_8812F) << BIT_SHIFT_RRSR_RSC_8812F) 10542 #define BITS_RRSR_RSC_8812F \ 10543 (BIT_MASK_RRSR_RSC_8812F << BIT_SHIFT_RRSR_RSC_8812F) 10544 #define BIT_CLEAR_RRSR_RSC_8812F(x) ((x) & (~BITS_RRSR_RSC_8812F)) 10545 #define BIT_GET_RRSR_RSC_8812F(x) \ 10546 (((x) >> BIT_SHIFT_RRSR_RSC_8812F) & BIT_MASK_RRSR_RSC_8812F) 10547 #define BIT_SET_RRSR_RSC_8812F(x, v) \ 10548 (BIT_CLEAR_RRSR_RSC_8812F(x) | BIT_RRSR_RSC_8812F(v)) 10549 10550 #define BIT_SHIFT_RRSC_BITMAP_8812F 0 10551 #define BIT_MASK_RRSC_BITMAP_8812F 0xfffff 10552 #define BIT_RRSC_BITMAP_8812F(x) \ 10553 (((x) & BIT_MASK_RRSC_BITMAP_8812F) << BIT_SHIFT_RRSC_BITMAP_8812F) 10554 #define BITS_RRSC_BITMAP_8812F \ 10555 (BIT_MASK_RRSC_BITMAP_8812F << BIT_SHIFT_RRSC_BITMAP_8812F) 10556 #define BIT_CLEAR_RRSC_BITMAP_8812F(x) ((x) & (~BITS_RRSC_BITMAP_8812F)) 10557 #define BIT_GET_RRSC_BITMAP_8812F(x) \ 10558 (((x) >> BIT_SHIFT_RRSC_BITMAP_8812F) & BIT_MASK_RRSC_BITMAP_8812F) 10559 #define BIT_SET_RRSC_BITMAP_8812F(x, v) \ 10560 (BIT_CLEAR_RRSC_BITMAP_8812F(x) | BIT_RRSC_BITMAP_8812F(v)) 10561 10562 /* 2 REG_NOT_VALID_8812F */ 10563 10564 /* 2 REG_ARFR0_8812F */ 10565 10566 #define BIT_SHIFT_ARFRL0_8812F 0 10567 #define BIT_MASK_ARFRL0_8812F 0xffffffffL 10568 #define BIT_ARFRL0_8812F(x) \ 10569 (((x) & BIT_MASK_ARFRL0_8812F) << BIT_SHIFT_ARFRL0_8812F) 10570 #define BITS_ARFRL0_8812F (BIT_MASK_ARFRL0_8812F << BIT_SHIFT_ARFRL0_8812F) 10571 #define BIT_CLEAR_ARFRL0_8812F(x) ((x) & (~BITS_ARFRL0_8812F)) 10572 #define BIT_GET_ARFRL0_8812F(x) \ 10573 (((x) >> BIT_SHIFT_ARFRL0_8812F) & BIT_MASK_ARFRL0_8812F) 10574 #define BIT_SET_ARFRL0_8812F(x, v) \ 10575 (BIT_CLEAR_ARFRL0_8812F(x) | BIT_ARFRL0_8812F(v)) 10576 10577 /* 2 REG_ARFRH0_8812F */ 10578 10579 #define BIT_SHIFT_ARFRH0_8812F 0 10580 #define BIT_MASK_ARFRH0_8812F 0xffffffffL 10581 #define BIT_ARFRH0_8812F(x) \ 10582 (((x) & BIT_MASK_ARFRH0_8812F) << BIT_SHIFT_ARFRH0_8812F) 10583 #define BITS_ARFRH0_8812F (BIT_MASK_ARFRH0_8812F << BIT_SHIFT_ARFRH0_8812F) 10584 #define BIT_CLEAR_ARFRH0_8812F(x) ((x) & (~BITS_ARFRH0_8812F)) 10585 #define BIT_GET_ARFRH0_8812F(x) \ 10586 (((x) >> BIT_SHIFT_ARFRH0_8812F) & BIT_MASK_ARFRH0_8812F) 10587 #define BIT_SET_ARFRH0_8812F(x, v) \ 10588 (BIT_CLEAR_ARFRH0_8812F(x) | BIT_ARFRH0_8812F(v)) 10589 10590 /* 2 REG_ARFR1_V1_8812F */ 10591 10592 #define BIT_SHIFT_ARFRL1_8812F 0 10593 #define BIT_MASK_ARFRL1_8812F 0xffffffffL 10594 #define BIT_ARFRL1_8812F(x) \ 10595 (((x) & BIT_MASK_ARFRL1_8812F) << BIT_SHIFT_ARFRL1_8812F) 10596 #define BITS_ARFRL1_8812F (BIT_MASK_ARFRL1_8812F << BIT_SHIFT_ARFRL1_8812F) 10597 #define BIT_CLEAR_ARFRL1_8812F(x) ((x) & (~BITS_ARFRL1_8812F)) 10598 #define BIT_GET_ARFRL1_8812F(x) \ 10599 (((x) >> BIT_SHIFT_ARFRL1_8812F) & BIT_MASK_ARFRL1_8812F) 10600 #define BIT_SET_ARFRL1_8812F(x, v) \ 10601 (BIT_CLEAR_ARFRL1_8812F(x) | BIT_ARFRL1_8812F(v)) 10602 10603 /* 2 REG_ARFRH1_V1_8812F */ 10604 10605 #define BIT_SHIFT_ARFRH1_8812F 0 10606 #define BIT_MASK_ARFRH1_8812F 0xffffffffL 10607 #define BIT_ARFRH1_8812F(x) \ 10608 (((x) & BIT_MASK_ARFRH1_8812F) << BIT_SHIFT_ARFRH1_8812F) 10609 #define BITS_ARFRH1_8812F (BIT_MASK_ARFRH1_8812F << BIT_SHIFT_ARFRH1_8812F) 10610 #define BIT_CLEAR_ARFRH1_8812F(x) ((x) & (~BITS_ARFRH1_8812F)) 10611 #define BIT_GET_ARFRH1_8812F(x) \ 10612 (((x) >> BIT_SHIFT_ARFRH1_8812F) & BIT_MASK_ARFRH1_8812F) 10613 #define BIT_SET_ARFRH1_8812F(x, v) \ 10614 (BIT_CLEAR_ARFRH1_8812F(x) | BIT_ARFRH1_8812F(v)) 10615 10616 /* 2 REG_CCK_CHECK_8812F */ 10617 #define BIT_CHECK_CCK_EN_8812F BIT(7) 10618 #define BIT_EN_BCN_PKT_REL_8812F BIT(6) 10619 #define BIT_BCN_PORT_SEL_8812F BIT(5) 10620 #define BIT_MOREDATA_BYPASS_8812F BIT(4) 10621 #define BIT_EN_CLR_CMD_REL_BCN_PKT_8812F BIT(3) 10622 #define BIT_R_EN_SET_MOREDATA_8812F BIT(2) 10623 #define BIT__R_DIS_CLEAR_MACID_RELEASE_8812F BIT(1) 10624 #define BIT__R_MACID_RELEASE_EN_8812F BIT(0) 10625 10626 /* 2 REG_AMPDU_MAX_TIME_V1_8812F */ 10627 10628 #define BIT_SHIFT_AMPDU_MAX_TIME_8812F 0 10629 #define BIT_MASK_AMPDU_MAX_TIME_8812F 0xff 10630 #define BIT_AMPDU_MAX_TIME_8812F(x) \ 10631 (((x) & BIT_MASK_AMPDU_MAX_TIME_8812F) \ 10632 << BIT_SHIFT_AMPDU_MAX_TIME_8812F) 10633 #define BITS_AMPDU_MAX_TIME_8812F \ 10634 (BIT_MASK_AMPDU_MAX_TIME_8812F << BIT_SHIFT_AMPDU_MAX_TIME_8812F) 10635 #define BIT_CLEAR_AMPDU_MAX_TIME_8812F(x) ((x) & (~BITS_AMPDU_MAX_TIME_8812F)) 10636 #define BIT_GET_AMPDU_MAX_TIME_8812F(x) \ 10637 (((x) >> BIT_SHIFT_AMPDU_MAX_TIME_8812F) & \ 10638 BIT_MASK_AMPDU_MAX_TIME_8812F) 10639 #define BIT_SET_AMPDU_MAX_TIME_8812F(x, v) \ 10640 (BIT_CLEAR_AMPDU_MAX_TIME_8812F(x) | BIT_AMPDU_MAX_TIME_8812F(v)) 10641 10642 /* 2 REG_BCNQ1_BDNY_V1_8812F */ 10643 10644 #define BIT_SHIFT_BCNQ1_PGBNDY_V1_8812F 0 10645 #define BIT_MASK_BCNQ1_PGBNDY_V1_8812F 0xfff 10646 #define BIT_BCNQ1_PGBNDY_V1_8812F(x) \ 10647 (((x) & BIT_MASK_BCNQ1_PGBNDY_V1_8812F) \ 10648 << BIT_SHIFT_BCNQ1_PGBNDY_V1_8812F) 10649 #define BITS_BCNQ1_PGBNDY_V1_8812F \ 10650 (BIT_MASK_BCNQ1_PGBNDY_V1_8812F << BIT_SHIFT_BCNQ1_PGBNDY_V1_8812F) 10651 #define BIT_CLEAR_BCNQ1_PGBNDY_V1_8812F(x) ((x) & (~BITS_BCNQ1_PGBNDY_V1_8812F)) 10652 #define BIT_GET_BCNQ1_PGBNDY_V1_8812F(x) \ 10653 (((x) >> BIT_SHIFT_BCNQ1_PGBNDY_V1_8812F) & \ 10654 BIT_MASK_BCNQ1_PGBNDY_V1_8812F) 10655 #define BIT_SET_BCNQ1_PGBNDY_V1_8812F(x, v) \ 10656 (BIT_CLEAR_BCNQ1_PGBNDY_V1_8812F(x) | BIT_BCNQ1_PGBNDY_V1_8812F(v)) 10657 10658 /* 2 REG_RSVD_8812F */ 10659 10660 /* 2 REG_RSVD_8812F */ 10661 10662 /* 2 REG_AMPDU_MAX_LENGTH_HT_8812F */ 10663 10664 #define BIT_SHIFT_AMPDU_MAX_LENGTH_HT_8812F 0 10665 #define BIT_MASK_AMPDU_MAX_LENGTH_HT_8812F 0xffff 10666 #define BIT_AMPDU_MAX_LENGTH_HT_8812F(x) \ 10667 (((x) & BIT_MASK_AMPDU_MAX_LENGTH_HT_8812F) \ 10668 << BIT_SHIFT_AMPDU_MAX_LENGTH_HT_8812F) 10669 #define BITS_AMPDU_MAX_LENGTH_HT_8812F \ 10670 (BIT_MASK_AMPDU_MAX_LENGTH_HT_8812F \ 10671 << BIT_SHIFT_AMPDU_MAX_LENGTH_HT_8812F) 10672 #define BIT_CLEAR_AMPDU_MAX_LENGTH_HT_8812F(x) \ 10673 ((x) & (~BITS_AMPDU_MAX_LENGTH_HT_8812F)) 10674 #define BIT_GET_AMPDU_MAX_LENGTH_HT_8812F(x) \ 10675 (((x) >> BIT_SHIFT_AMPDU_MAX_LENGTH_HT_8812F) & \ 10676 BIT_MASK_AMPDU_MAX_LENGTH_HT_8812F) 10677 #define BIT_SET_AMPDU_MAX_LENGTH_HT_8812F(x, v) \ 10678 (BIT_CLEAR_AMPDU_MAX_LENGTH_HT_8812F(x) | \ 10679 BIT_AMPDU_MAX_LENGTH_HT_8812F(v)) 10680 10681 /* 2 REG_ACQ_STOP_8812F */ 10682 #define BIT_AC7Q_STOP_8812F BIT(7) 10683 #define BIT_AC6Q_STOP_8812F BIT(6) 10684 #define BIT_AC5Q_STOP_8812F BIT(5) 10685 #define BIT_AC4Q_STOP_8812F BIT(4) 10686 #define BIT_AC3Q_STOP_8812F BIT(3) 10687 #define BIT_AC2Q_STOP_8812F BIT(2) 10688 #define BIT_AC1Q_STOP_8812F BIT(1) 10689 #define BIT_AC0Q_STOP_8812F BIT(0) 10690 10691 /* 2 REG_NDPA_RATE_8812F */ 10692 10693 #define BIT_SHIFT_R_NDPA_RATE_V1_8812F 0 10694 #define BIT_MASK_R_NDPA_RATE_V1_8812F 0xff 10695 #define BIT_R_NDPA_RATE_V1_8812F(x) \ 10696 (((x) & BIT_MASK_R_NDPA_RATE_V1_8812F) \ 10697 << BIT_SHIFT_R_NDPA_RATE_V1_8812F) 10698 #define BITS_R_NDPA_RATE_V1_8812F \ 10699 (BIT_MASK_R_NDPA_RATE_V1_8812F << BIT_SHIFT_R_NDPA_RATE_V1_8812F) 10700 #define BIT_CLEAR_R_NDPA_RATE_V1_8812F(x) ((x) & (~BITS_R_NDPA_RATE_V1_8812F)) 10701 #define BIT_GET_R_NDPA_RATE_V1_8812F(x) \ 10702 (((x) >> BIT_SHIFT_R_NDPA_RATE_V1_8812F) & \ 10703 BIT_MASK_R_NDPA_RATE_V1_8812F) 10704 #define BIT_SET_R_NDPA_RATE_V1_8812F(x, v) \ 10705 (BIT_CLEAR_R_NDPA_RATE_V1_8812F(x) | BIT_R_NDPA_RATE_V1_8812F(v)) 10706 10707 /* 2 REG_TX_HANG_CTRL_8812F */ 10708 #define BIT_R_EN_GNT_BT_AWAKE_8812F BIT(3) 10709 #define BIT_EN_EOF_V1_8812F BIT(2) 10710 #define BIT_DIS_OQT_BLOCK_8812F BIT(1) 10711 #define BIT_SEARCH_QUEUE_EN_8812F BIT(0) 10712 10713 /* 2 REG_NDPA_OPT_CTRL_8812F */ 10714 #define BIT_R_DIS_MACID_RELEASE_RTY_8812F BIT(5) 10715 10716 #define BIT_SHIFT_BW_SIGTA_8812F 3 10717 #define BIT_MASK_BW_SIGTA_8812F 0x3 10718 #define BIT_BW_SIGTA_8812F(x) \ 10719 (((x) & BIT_MASK_BW_SIGTA_8812F) << BIT_SHIFT_BW_SIGTA_8812F) 10720 #define BITS_BW_SIGTA_8812F \ 10721 (BIT_MASK_BW_SIGTA_8812F << BIT_SHIFT_BW_SIGTA_8812F) 10722 #define BIT_CLEAR_BW_SIGTA_8812F(x) ((x) & (~BITS_BW_SIGTA_8812F)) 10723 #define BIT_GET_BW_SIGTA_8812F(x) \ 10724 (((x) >> BIT_SHIFT_BW_SIGTA_8812F) & BIT_MASK_BW_SIGTA_8812F) 10725 #define BIT_SET_BW_SIGTA_8812F(x, v) \ 10726 (BIT_CLEAR_BW_SIGTA_8812F(x) | BIT_BW_SIGTA_8812F(v)) 10727 10728 #define BIT_EN_BAR_SIGTA_8812F BIT(2) 10729 10730 #define BIT_SHIFT_R_NDPA_BW_8812F 0 10731 #define BIT_MASK_R_NDPA_BW_8812F 0x3 10732 #define BIT_R_NDPA_BW_8812F(x) \ 10733 (((x) & BIT_MASK_R_NDPA_BW_8812F) << BIT_SHIFT_R_NDPA_BW_8812F) 10734 #define BITS_R_NDPA_BW_8812F \ 10735 (BIT_MASK_R_NDPA_BW_8812F << BIT_SHIFT_R_NDPA_BW_8812F) 10736 #define BIT_CLEAR_R_NDPA_BW_8812F(x) ((x) & (~BITS_R_NDPA_BW_8812F)) 10737 #define BIT_GET_R_NDPA_BW_8812F(x) \ 10738 (((x) >> BIT_SHIFT_R_NDPA_BW_8812F) & BIT_MASK_R_NDPA_BW_8812F) 10739 #define BIT_SET_R_NDPA_BW_8812F(x, v) \ 10740 (BIT_CLEAR_R_NDPA_BW_8812F(x) | BIT_R_NDPA_BW_8812F(v)) 10741 10742 /* 2 REG_AMPDU_MAX_LENGTH_VHT_8812F */ 10743 10744 #define BIT_SHIFT_AMPDU_MAX_LENGTH_VHT_V1_8812F 0 10745 #define BIT_MASK_AMPDU_MAX_LENGTH_VHT_V1_8812F 0xfffff 10746 #define BIT_AMPDU_MAX_LENGTH_VHT_V1_8812F(x) \ 10747 (((x) & BIT_MASK_AMPDU_MAX_LENGTH_VHT_V1_8812F) \ 10748 << BIT_SHIFT_AMPDU_MAX_LENGTH_VHT_V1_8812F) 10749 #define BITS_AMPDU_MAX_LENGTH_VHT_V1_8812F \ 10750 (BIT_MASK_AMPDU_MAX_LENGTH_VHT_V1_8812F \ 10751 << BIT_SHIFT_AMPDU_MAX_LENGTH_VHT_V1_8812F) 10752 #define BIT_CLEAR_AMPDU_MAX_LENGTH_VHT_V1_8812F(x) \ 10753 ((x) & (~BITS_AMPDU_MAX_LENGTH_VHT_V1_8812F)) 10754 #define BIT_GET_AMPDU_MAX_LENGTH_VHT_V1_8812F(x) \ 10755 (((x) >> BIT_SHIFT_AMPDU_MAX_LENGTH_VHT_V1_8812F) & \ 10756 BIT_MASK_AMPDU_MAX_LENGTH_VHT_V1_8812F) 10757 #define BIT_SET_AMPDU_MAX_LENGTH_VHT_V1_8812F(x, v) \ 10758 (BIT_CLEAR_AMPDU_MAX_LENGTH_VHT_V1_8812F(x) | \ 10759 BIT_AMPDU_MAX_LENGTH_VHT_V1_8812F(v)) 10760 10761 /* 2 REG_RD_RESP_PKT_TH_8812F */ 10762 10763 #define BIT_SHIFT_RD_RESP_PKT_TH_V1_8812F 0 10764 #define BIT_MASK_RD_RESP_PKT_TH_V1_8812F 0x3f 10765 #define BIT_RD_RESP_PKT_TH_V1_8812F(x) \ 10766 (((x) & BIT_MASK_RD_RESP_PKT_TH_V1_8812F) \ 10767 << BIT_SHIFT_RD_RESP_PKT_TH_V1_8812F) 10768 #define BITS_RD_RESP_PKT_TH_V1_8812F \ 10769 (BIT_MASK_RD_RESP_PKT_TH_V1_8812F << BIT_SHIFT_RD_RESP_PKT_TH_V1_8812F) 10770 #define BIT_CLEAR_RD_RESP_PKT_TH_V1_8812F(x) \ 10771 ((x) & (~BITS_RD_RESP_PKT_TH_V1_8812F)) 10772 #define BIT_GET_RD_RESP_PKT_TH_V1_8812F(x) \ 10773 (((x) >> BIT_SHIFT_RD_RESP_PKT_TH_V1_8812F) & \ 10774 BIT_MASK_RD_RESP_PKT_TH_V1_8812F) 10775 #define BIT_SET_RD_RESP_PKT_TH_V1_8812F(x, v) \ 10776 (BIT_CLEAR_RD_RESP_PKT_TH_V1_8812F(x) | BIT_RD_RESP_PKT_TH_V1_8812F(v)) 10777 10778 /* 2 REG_CMDQ_INFO_8812F */ 10779 10780 #define BIT_SHIFT_QUEUEMACID_CMDQ_V1_8812F 25 10781 #define BIT_MASK_QUEUEMACID_CMDQ_V1_8812F 0x7f 10782 #define BIT_QUEUEMACID_CMDQ_V1_8812F(x) \ 10783 (((x) & BIT_MASK_QUEUEMACID_CMDQ_V1_8812F) \ 10784 << BIT_SHIFT_QUEUEMACID_CMDQ_V1_8812F) 10785 #define BITS_QUEUEMACID_CMDQ_V1_8812F \ 10786 (BIT_MASK_QUEUEMACID_CMDQ_V1_8812F \ 10787 << BIT_SHIFT_QUEUEMACID_CMDQ_V1_8812F) 10788 #define BIT_CLEAR_QUEUEMACID_CMDQ_V1_8812F(x) \ 10789 ((x) & (~BITS_QUEUEMACID_CMDQ_V1_8812F)) 10790 #define BIT_GET_QUEUEMACID_CMDQ_V1_8812F(x) \ 10791 (((x) >> BIT_SHIFT_QUEUEMACID_CMDQ_V1_8812F) & \ 10792 BIT_MASK_QUEUEMACID_CMDQ_V1_8812F) 10793 #define BIT_SET_QUEUEMACID_CMDQ_V1_8812F(x, v) \ 10794 (BIT_CLEAR_QUEUEMACID_CMDQ_V1_8812F(x) | \ 10795 BIT_QUEUEMACID_CMDQ_V1_8812F(v)) 10796 10797 #define BIT_SHIFT_QUEUEAC_CMDQ_V1_8812F 23 10798 #define BIT_MASK_QUEUEAC_CMDQ_V1_8812F 0x3 10799 #define BIT_QUEUEAC_CMDQ_V1_8812F(x) \ 10800 (((x) & BIT_MASK_QUEUEAC_CMDQ_V1_8812F) \ 10801 << BIT_SHIFT_QUEUEAC_CMDQ_V1_8812F) 10802 #define BITS_QUEUEAC_CMDQ_V1_8812F \ 10803 (BIT_MASK_QUEUEAC_CMDQ_V1_8812F << BIT_SHIFT_QUEUEAC_CMDQ_V1_8812F) 10804 #define BIT_CLEAR_QUEUEAC_CMDQ_V1_8812F(x) ((x) & (~BITS_QUEUEAC_CMDQ_V1_8812F)) 10805 #define BIT_GET_QUEUEAC_CMDQ_V1_8812F(x) \ 10806 (((x) >> BIT_SHIFT_QUEUEAC_CMDQ_V1_8812F) & \ 10807 BIT_MASK_QUEUEAC_CMDQ_V1_8812F) 10808 #define BIT_SET_QUEUEAC_CMDQ_V1_8812F(x, v) \ 10809 (BIT_CLEAR_QUEUEAC_CMDQ_V1_8812F(x) | BIT_QUEUEAC_CMDQ_V1_8812F(v)) 10810 10811 #define BIT_TIDEMPTY_CMDQ_V1_8812F BIT(22) 10812 10813 #define BIT_SHIFT_TAIL_PKT_Q4_V2_8812F 11 10814 #define BIT_MASK_TAIL_PKT_Q4_V2_8812F 0x7ff 10815 #define BIT_TAIL_PKT_Q4_V2_8812F(x) \ 10816 (((x) & BIT_MASK_TAIL_PKT_Q4_V2_8812F) \ 10817 << BIT_SHIFT_TAIL_PKT_Q4_V2_8812F) 10818 #define BITS_TAIL_PKT_Q4_V2_8812F \ 10819 (BIT_MASK_TAIL_PKT_Q4_V2_8812F << BIT_SHIFT_TAIL_PKT_Q4_V2_8812F) 10820 #define BIT_CLEAR_TAIL_PKT_Q4_V2_8812F(x) ((x) & (~BITS_TAIL_PKT_Q4_V2_8812F)) 10821 #define BIT_GET_TAIL_PKT_Q4_V2_8812F(x) \ 10822 (((x) >> BIT_SHIFT_TAIL_PKT_Q4_V2_8812F) & \ 10823 BIT_MASK_TAIL_PKT_Q4_V2_8812F) 10824 #define BIT_SET_TAIL_PKT_Q4_V2_8812F(x, v) \ 10825 (BIT_CLEAR_TAIL_PKT_Q4_V2_8812F(x) | BIT_TAIL_PKT_Q4_V2_8812F(v)) 10826 10827 #define BIT_SHIFT_HEAD_PKT_CMDQ_V1_8812F 0 10828 #define BIT_MASK_HEAD_PKT_CMDQ_V1_8812F 0x7ff 10829 #define BIT_HEAD_PKT_CMDQ_V1_8812F(x) \ 10830 (((x) & BIT_MASK_HEAD_PKT_CMDQ_V1_8812F) \ 10831 << BIT_SHIFT_HEAD_PKT_CMDQ_V1_8812F) 10832 #define BITS_HEAD_PKT_CMDQ_V1_8812F \ 10833 (BIT_MASK_HEAD_PKT_CMDQ_V1_8812F << BIT_SHIFT_HEAD_PKT_CMDQ_V1_8812F) 10834 #define BIT_CLEAR_HEAD_PKT_CMDQ_V1_8812F(x) \ 10835 ((x) & (~BITS_HEAD_PKT_CMDQ_V1_8812F)) 10836 #define BIT_GET_HEAD_PKT_CMDQ_V1_8812F(x) \ 10837 (((x) >> BIT_SHIFT_HEAD_PKT_CMDQ_V1_8812F) & \ 10838 BIT_MASK_HEAD_PKT_CMDQ_V1_8812F) 10839 #define BIT_SET_HEAD_PKT_CMDQ_V1_8812F(x, v) \ 10840 (BIT_CLEAR_HEAD_PKT_CMDQ_V1_8812F(x) | BIT_HEAD_PKT_CMDQ_V1_8812F(v)) 10841 10842 /* 2 REG_Q4_INFO_8812F */ 10843 10844 #define BIT_SHIFT_QUEUEMACID_Q4_V1_8812F 25 10845 #define BIT_MASK_QUEUEMACID_Q4_V1_8812F 0x7f 10846 #define BIT_QUEUEMACID_Q4_V1_8812F(x) \ 10847 (((x) & BIT_MASK_QUEUEMACID_Q4_V1_8812F) \ 10848 << BIT_SHIFT_QUEUEMACID_Q4_V1_8812F) 10849 #define BITS_QUEUEMACID_Q4_V1_8812F \ 10850 (BIT_MASK_QUEUEMACID_Q4_V1_8812F << BIT_SHIFT_QUEUEMACID_Q4_V1_8812F) 10851 #define BIT_CLEAR_QUEUEMACID_Q4_V1_8812F(x) \ 10852 ((x) & (~BITS_QUEUEMACID_Q4_V1_8812F)) 10853 #define BIT_GET_QUEUEMACID_Q4_V1_8812F(x) \ 10854 (((x) >> BIT_SHIFT_QUEUEMACID_Q4_V1_8812F) & \ 10855 BIT_MASK_QUEUEMACID_Q4_V1_8812F) 10856 #define BIT_SET_QUEUEMACID_Q4_V1_8812F(x, v) \ 10857 (BIT_CLEAR_QUEUEMACID_Q4_V1_8812F(x) | BIT_QUEUEMACID_Q4_V1_8812F(v)) 10858 10859 #define BIT_SHIFT_QUEUEAC_Q4_V1_8812F 23 10860 #define BIT_MASK_QUEUEAC_Q4_V1_8812F 0x3 10861 #define BIT_QUEUEAC_Q4_V1_8812F(x) \ 10862 (((x) & BIT_MASK_QUEUEAC_Q4_V1_8812F) << BIT_SHIFT_QUEUEAC_Q4_V1_8812F) 10863 #define BITS_QUEUEAC_Q4_V1_8812F \ 10864 (BIT_MASK_QUEUEAC_Q4_V1_8812F << BIT_SHIFT_QUEUEAC_Q4_V1_8812F) 10865 #define BIT_CLEAR_QUEUEAC_Q4_V1_8812F(x) ((x) & (~BITS_QUEUEAC_Q4_V1_8812F)) 10866 #define BIT_GET_QUEUEAC_Q4_V1_8812F(x) \ 10867 (((x) >> BIT_SHIFT_QUEUEAC_Q4_V1_8812F) & BIT_MASK_QUEUEAC_Q4_V1_8812F) 10868 #define BIT_SET_QUEUEAC_Q4_V1_8812F(x, v) \ 10869 (BIT_CLEAR_QUEUEAC_Q4_V1_8812F(x) | BIT_QUEUEAC_Q4_V1_8812F(v)) 10870 10871 #define BIT_TIDEMPTY_Q4_V1_8812F BIT(22) 10872 10873 #define BIT_SHIFT_TAIL_PKT_Q4_V2_8812F 11 10874 #define BIT_MASK_TAIL_PKT_Q4_V2_8812F 0x7ff 10875 #define BIT_TAIL_PKT_Q4_V2_8812F(x) \ 10876 (((x) & BIT_MASK_TAIL_PKT_Q4_V2_8812F) \ 10877 << BIT_SHIFT_TAIL_PKT_Q4_V2_8812F) 10878 #define BITS_TAIL_PKT_Q4_V2_8812F \ 10879 (BIT_MASK_TAIL_PKT_Q4_V2_8812F << BIT_SHIFT_TAIL_PKT_Q4_V2_8812F) 10880 #define BIT_CLEAR_TAIL_PKT_Q4_V2_8812F(x) ((x) & (~BITS_TAIL_PKT_Q4_V2_8812F)) 10881 #define BIT_GET_TAIL_PKT_Q4_V2_8812F(x) \ 10882 (((x) >> BIT_SHIFT_TAIL_PKT_Q4_V2_8812F) & \ 10883 BIT_MASK_TAIL_PKT_Q4_V2_8812F) 10884 #define BIT_SET_TAIL_PKT_Q4_V2_8812F(x, v) \ 10885 (BIT_CLEAR_TAIL_PKT_Q4_V2_8812F(x) | BIT_TAIL_PKT_Q4_V2_8812F(v)) 10886 10887 #define BIT_SHIFT_HEAD_PKT_Q4_V1_8812F 0 10888 #define BIT_MASK_HEAD_PKT_Q4_V1_8812F 0x7ff 10889 #define BIT_HEAD_PKT_Q4_V1_8812F(x) \ 10890 (((x) & BIT_MASK_HEAD_PKT_Q4_V1_8812F) \ 10891 << BIT_SHIFT_HEAD_PKT_Q4_V1_8812F) 10892 #define BITS_HEAD_PKT_Q4_V1_8812F \ 10893 (BIT_MASK_HEAD_PKT_Q4_V1_8812F << BIT_SHIFT_HEAD_PKT_Q4_V1_8812F) 10894 #define BIT_CLEAR_HEAD_PKT_Q4_V1_8812F(x) ((x) & (~BITS_HEAD_PKT_Q4_V1_8812F)) 10895 #define BIT_GET_HEAD_PKT_Q4_V1_8812F(x) \ 10896 (((x) >> BIT_SHIFT_HEAD_PKT_Q4_V1_8812F) & \ 10897 BIT_MASK_HEAD_PKT_Q4_V1_8812F) 10898 #define BIT_SET_HEAD_PKT_Q4_V1_8812F(x, v) \ 10899 (BIT_CLEAR_HEAD_PKT_Q4_V1_8812F(x) | BIT_HEAD_PKT_Q4_V1_8812F(v)) 10900 10901 /* 2 REG_Q5_INFO_8812F */ 10902 10903 #define BIT_SHIFT_QUEUEMACID_Q5_V1_8812F 25 10904 #define BIT_MASK_QUEUEMACID_Q5_V1_8812F 0x7f 10905 #define BIT_QUEUEMACID_Q5_V1_8812F(x) \ 10906 (((x) & BIT_MASK_QUEUEMACID_Q5_V1_8812F) \ 10907 << BIT_SHIFT_QUEUEMACID_Q5_V1_8812F) 10908 #define BITS_QUEUEMACID_Q5_V1_8812F \ 10909 (BIT_MASK_QUEUEMACID_Q5_V1_8812F << BIT_SHIFT_QUEUEMACID_Q5_V1_8812F) 10910 #define BIT_CLEAR_QUEUEMACID_Q5_V1_8812F(x) \ 10911 ((x) & (~BITS_QUEUEMACID_Q5_V1_8812F)) 10912 #define BIT_GET_QUEUEMACID_Q5_V1_8812F(x) \ 10913 (((x) >> BIT_SHIFT_QUEUEMACID_Q5_V1_8812F) & \ 10914 BIT_MASK_QUEUEMACID_Q5_V1_8812F) 10915 #define BIT_SET_QUEUEMACID_Q5_V1_8812F(x, v) \ 10916 (BIT_CLEAR_QUEUEMACID_Q5_V1_8812F(x) | BIT_QUEUEMACID_Q5_V1_8812F(v)) 10917 10918 #define BIT_SHIFT_QUEUEAC_Q5_V1_8812F 23 10919 #define BIT_MASK_QUEUEAC_Q5_V1_8812F 0x3 10920 #define BIT_QUEUEAC_Q5_V1_8812F(x) \ 10921 (((x) & BIT_MASK_QUEUEAC_Q5_V1_8812F) << BIT_SHIFT_QUEUEAC_Q5_V1_8812F) 10922 #define BITS_QUEUEAC_Q5_V1_8812F \ 10923 (BIT_MASK_QUEUEAC_Q5_V1_8812F << BIT_SHIFT_QUEUEAC_Q5_V1_8812F) 10924 #define BIT_CLEAR_QUEUEAC_Q5_V1_8812F(x) ((x) & (~BITS_QUEUEAC_Q5_V1_8812F)) 10925 #define BIT_GET_QUEUEAC_Q5_V1_8812F(x) \ 10926 (((x) >> BIT_SHIFT_QUEUEAC_Q5_V1_8812F) & BIT_MASK_QUEUEAC_Q5_V1_8812F) 10927 #define BIT_SET_QUEUEAC_Q5_V1_8812F(x, v) \ 10928 (BIT_CLEAR_QUEUEAC_Q5_V1_8812F(x) | BIT_QUEUEAC_Q5_V1_8812F(v)) 10929 10930 #define BIT_TIDEMPTY_Q5_V1_8812F BIT(22) 10931 10932 #define BIT_SHIFT_TAIL_PKT_Q5_V2_8812F 11 10933 #define BIT_MASK_TAIL_PKT_Q5_V2_8812F 0x7ff 10934 #define BIT_TAIL_PKT_Q5_V2_8812F(x) \ 10935 (((x) & BIT_MASK_TAIL_PKT_Q5_V2_8812F) \ 10936 << BIT_SHIFT_TAIL_PKT_Q5_V2_8812F) 10937 #define BITS_TAIL_PKT_Q5_V2_8812F \ 10938 (BIT_MASK_TAIL_PKT_Q5_V2_8812F << BIT_SHIFT_TAIL_PKT_Q5_V2_8812F) 10939 #define BIT_CLEAR_TAIL_PKT_Q5_V2_8812F(x) ((x) & (~BITS_TAIL_PKT_Q5_V2_8812F)) 10940 #define BIT_GET_TAIL_PKT_Q5_V2_8812F(x) \ 10941 (((x) >> BIT_SHIFT_TAIL_PKT_Q5_V2_8812F) & \ 10942 BIT_MASK_TAIL_PKT_Q5_V2_8812F) 10943 #define BIT_SET_TAIL_PKT_Q5_V2_8812F(x, v) \ 10944 (BIT_CLEAR_TAIL_PKT_Q5_V2_8812F(x) | BIT_TAIL_PKT_Q5_V2_8812F(v)) 10945 10946 #define BIT_SHIFT_HEAD_PKT_Q5_V1_8812F 0 10947 #define BIT_MASK_HEAD_PKT_Q5_V1_8812F 0x7ff 10948 #define BIT_HEAD_PKT_Q5_V1_8812F(x) \ 10949 (((x) & BIT_MASK_HEAD_PKT_Q5_V1_8812F) \ 10950 << BIT_SHIFT_HEAD_PKT_Q5_V1_8812F) 10951 #define BITS_HEAD_PKT_Q5_V1_8812F \ 10952 (BIT_MASK_HEAD_PKT_Q5_V1_8812F << BIT_SHIFT_HEAD_PKT_Q5_V1_8812F) 10953 #define BIT_CLEAR_HEAD_PKT_Q5_V1_8812F(x) ((x) & (~BITS_HEAD_PKT_Q5_V1_8812F)) 10954 #define BIT_GET_HEAD_PKT_Q5_V1_8812F(x) \ 10955 (((x) >> BIT_SHIFT_HEAD_PKT_Q5_V1_8812F) & \ 10956 BIT_MASK_HEAD_PKT_Q5_V1_8812F) 10957 #define BIT_SET_HEAD_PKT_Q5_V1_8812F(x, v) \ 10958 (BIT_CLEAR_HEAD_PKT_Q5_V1_8812F(x) | BIT_HEAD_PKT_Q5_V1_8812F(v)) 10959 10960 /* 2 REG_Q6_INFO_8812F */ 10961 10962 #define BIT_SHIFT_QUEUEMACID_Q6_V1_8812F 25 10963 #define BIT_MASK_QUEUEMACID_Q6_V1_8812F 0x7f 10964 #define BIT_QUEUEMACID_Q6_V1_8812F(x) \ 10965 (((x) & BIT_MASK_QUEUEMACID_Q6_V1_8812F) \ 10966 << BIT_SHIFT_QUEUEMACID_Q6_V1_8812F) 10967 #define BITS_QUEUEMACID_Q6_V1_8812F \ 10968 (BIT_MASK_QUEUEMACID_Q6_V1_8812F << BIT_SHIFT_QUEUEMACID_Q6_V1_8812F) 10969 #define BIT_CLEAR_QUEUEMACID_Q6_V1_8812F(x) \ 10970 ((x) & (~BITS_QUEUEMACID_Q6_V1_8812F)) 10971 #define BIT_GET_QUEUEMACID_Q6_V1_8812F(x) \ 10972 (((x) >> BIT_SHIFT_QUEUEMACID_Q6_V1_8812F) & \ 10973 BIT_MASK_QUEUEMACID_Q6_V1_8812F) 10974 #define BIT_SET_QUEUEMACID_Q6_V1_8812F(x, v) \ 10975 (BIT_CLEAR_QUEUEMACID_Q6_V1_8812F(x) | BIT_QUEUEMACID_Q6_V1_8812F(v)) 10976 10977 #define BIT_SHIFT_QUEUEAC_Q6_V1_8812F 23 10978 #define BIT_MASK_QUEUEAC_Q6_V1_8812F 0x3 10979 #define BIT_QUEUEAC_Q6_V1_8812F(x) \ 10980 (((x) & BIT_MASK_QUEUEAC_Q6_V1_8812F) << BIT_SHIFT_QUEUEAC_Q6_V1_8812F) 10981 #define BITS_QUEUEAC_Q6_V1_8812F \ 10982 (BIT_MASK_QUEUEAC_Q6_V1_8812F << BIT_SHIFT_QUEUEAC_Q6_V1_8812F) 10983 #define BIT_CLEAR_QUEUEAC_Q6_V1_8812F(x) ((x) & (~BITS_QUEUEAC_Q6_V1_8812F)) 10984 #define BIT_GET_QUEUEAC_Q6_V1_8812F(x) \ 10985 (((x) >> BIT_SHIFT_QUEUEAC_Q6_V1_8812F) & BIT_MASK_QUEUEAC_Q6_V1_8812F) 10986 #define BIT_SET_QUEUEAC_Q6_V1_8812F(x, v) \ 10987 (BIT_CLEAR_QUEUEAC_Q6_V1_8812F(x) | BIT_QUEUEAC_Q6_V1_8812F(v)) 10988 10989 #define BIT_TIDEMPTY_Q6_V1_8812F BIT(22) 10990 10991 #define BIT_SHIFT_TAIL_PKT_Q6_V2_8812F 11 10992 #define BIT_MASK_TAIL_PKT_Q6_V2_8812F 0x7ff 10993 #define BIT_TAIL_PKT_Q6_V2_8812F(x) \ 10994 (((x) & BIT_MASK_TAIL_PKT_Q6_V2_8812F) \ 10995 << BIT_SHIFT_TAIL_PKT_Q6_V2_8812F) 10996 #define BITS_TAIL_PKT_Q6_V2_8812F \ 10997 (BIT_MASK_TAIL_PKT_Q6_V2_8812F << BIT_SHIFT_TAIL_PKT_Q6_V2_8812F) 10998 #define BIT_CLEAR_TAIL_PKT_Q6_V2_8812F(x) ((x) & (~BITS_TAIL_PKT_Q6_V2_8812F)) 10999 #define BIT_GET_TAIL_PKT_Q6_V2_8812F(x) \ 11000 (((x) >> BIT_SHIFT_TAIL_PKT_Q6_V2_8812F) & \ 11001 BIT_MASK_TAIL_PKT_Q6_V2_8812F) 11002 #define BIT_SET_TAIL_PKT_Q6_V2_8812F(x, v) \ 11003 (BIT_CLEAR_TAIL_PKT_Q6_V2_8812F(x) | BIT_TAIL_PKT_Q6_V2_8812F(v)) 11004 11005 #define BIT_SHIFT_HEAD_PKT_Q6_V1_8812F 0 11006 #define BIT_MASK_HEAD_PKT_Q6_V1_8812F 0x7ff 11007 #define BIT_HEAD_PKT_Q6_V1_8812F(x) \ 11008 (((x) & BIT_MASK_HEAD_PKT_Q6_V1_8812F) \ 11009 << BIT_SHIFT_HEAD_PKT_Q6_V1_8812F) 11010 #define BITS_HEAD_PKT_Q6_V1_8812F \ 11011 (BIT_MASK_HEAD_PKT_Q6_V1_8812F << BIT_SHIFT_HEAD_PKT_Q6_V1_8812F) 11012 #define BIT_CLEAR_HEAD_PKT_Q6_V1_8812F(x) ((x) & (~BITS_HEAD_PKT_Q6_V1_8812F)) 11013 #define BIT_GET_HEAD_PKT_Q6_V1_8812F(x) \ 11014 (((x) >> BIT_SHIFT_HEAD_PKT_Q6_V1_8812F) & \ 11015 BIT_MASK_HEAD_PKT_Q6_V1_8812F) 11016 #define BIT_SET_HEAD_PKT_Q6_V1_8812F(x, v) \ 11017 (BIT_CLEAR_HEAD_PKT_Q6_V1_8812F(x) | BIT_HEAD_PKT_Q6_V1_8812F(v)) 11018 11019 /* 2 REG_Q7_INFO_8812F */ 11020 11021 #define BIT_SHIFT_QUEUEMACID_Q7_V1_8812F 25 11022 #define BIT_MASK_QUEUEMACID_Q7_V1_8812F 0x7f 11023 #define BIT_QUEUEMACID_Q7_V1_8812F(x) \ 11024 (((x) & BIT_MASK_QUEUEMACID_Q7_V1_8812F) \ 11025 << BIT_SHIFT_QUEUEMACID_Q7_V1_8812F) 11026 #define BITS_QUEUEMACID_Q7_V1_8812F \ 11027 (BIT_MASK_QUEUEMACID_Q7_V1_8812F << BIT_SHIFT_QUEUEMACID_Q7_V1_8812F) 11028 #define BIT_CLEAR_QUEUEMACID_Q7_V1_8812F(x) \ 11029 ((x) & (~BITS_QUEUEMACID_Q7_V1_8812F)) 11030 #define BIT_GET_QUEUEMACID_Q7_V1_8812F(x) \ 11031 (((x) >> BIT_SHIFT_QUEUEMACID_Q7_V1_8812F) & \ 11032 BIT_MASK_QUEUEMACID_Q7_V1_8812F) 11033 #define BIT_SET_QUEUEMACID_Q7_V1_8812F(x, v) \ 11034 (BIT_CLEAR_QUEUEMACID_Q7_V1_8812F(x) | BIT_QUEUEMACID_Q7_V1_8812F(v)) 11035 11036 #define BIT_SHIFT_QUEUEAC_Q7_V1_8812F 23 11037 #define BIT_MASK_QUEUEAC_Q7_V1_8812F 0x3 11038 #define BIT_QUEUEAC_Q7_V1_8812F(x) \ 11039 (((x) & BIT_MASK_QUEUEAC_Q7_V1_8812F) << BIT_SHIFT_QUEUEAC_Q7_V1_8812F) 11040 #define BITS_QUEUEAC_Q7_V1_8812F \ 11041 (BIT_MASK_QUEUEAC_Q7_V1_8812F << BIT_SHIFT_QUEUEAC_Q7_V1_8812F) 11042 #define BIT_CLEAR_QUEUEAC_Q7_V1_8812F(x) ((x) & (~BITS_QUEUEAC_Q7_V1_8812F)) 11043 #define BIT_GET_QUEUEAC_Q7_V1_8812F(x) \ 11044 (((x) >> BIT_SHIFT_QUEUEAC_Q7_V1_8812F) & BIT_MASK_QUEUEAC_Q7_V1_8812F) 11045 #define BIT_SET_QUEUEAC_Q7_V1_8812F(x, v) \ 11046 (BIT_CLEAR_QUEUEAC_Q7_V1_8812F(x) | BIT_QUEUEAC_Q7_V1_8812F(v)) 11047 11048 #define BIT_TIDEMPTY_Q7_V1_8812F BIT(22) 11049 11050 #define BIT_SHIFT_TAIL_PKT_Q7_V2_8812F 11 11051 #define BIT_MASK_TAIL_PKT_Q7_V2_8812F 0x7ff 11052 #define BIT_TAIL_PKT_Q7_V2_8812F(x) \ 11053 (((x) & BIT_MASK_TAIL_PKT_Q7_V2_8812F) \ 11054 << BIT_SHIFT_TAIL_PKT_Q7_V2_8812F) 11055 #define BITS_TAIL_PKT_Q7_V2_8812F \ 11056 (BIT_MASK_TAIL_PKT_Q7_V2_8812F << BIT_SHIFT_TAIL_PKT_Q7_V2_8812F) 11057 #define BIT_CLEAR_TAIL_PKT_Q7_V2_8812F(x) ((x) & (~BITS_TAIL_PKT_Q7_V2_8812F)) 11058 #define BIT_GET_TAIL_PKT_Q7_V2_8812F(x) \ 11059 (((x) >> BIT_SHIFT_TAIL_PKT_Q7_V2_8812F) & \ 11060 BIT_MASK_TAIL_PKT_Q7_V2_8812F) 11061 #define BIT_SET_TAIL_PKT_Q7_V2_8812F(x, v) \ 11062 (BIT_CLEAR_TAIL_PKT_Q7_V2_8812F(x) | BIT_TAIL_PKT_Q7_V2_8812F(v)) 11063 11064 #define BIT_SHIFT_HEAD_PKT_Q7_V1_8812F 0 11065 #define BIT_MASK_HEAD_PKT_Q7_V1_8812F 0x7ff 11066 #define BIT_HEAD_PKT_Q7_V1_8812F(x) \ 11067 (((x) & BIT_MASK_HEAD_PKT_Q7_V1_8812F) \ 11068 << BIT_SHIFT_HEAD_PKT_Q7_V1_8812F) 11069 #define BITS_HEAD_PKT_Q7_V1_8812F \ 11070 (BIT_MASK_HEAD_PKT_Q7_V1_8812F << BIT_SHIFT_HEAD_PKT_Q7_V1_8812F) 11071 #define BIT_CLEAR_HEAD_PKT_Q7_V1_8812F(x) ((x) & (~BITS_HEAD_PKT_Q7_V1_8812F)) 11072 #define BIT_GET_HEAD_PKT_Q7_V1_8812F(x) \ 11073 (((x) >> BIT_SHIFT_HEAD_PKT_Q7_V1_8812F) & \ 11074 BIT_MASK_HEAD_PKT_Q7_V1_8812F) 11075 #define BIT_SET_HEAD_PKT_Q7_V1_8812F(x, v) \ 11076 (BIT_CLEAR_HEAD_PKT_Q7_V1_8812F(x) | BIT_HEAD_PKT_Q7_V1_8812F(v)) 11077 11078 /* 2 REG_WMAC_LBK_BUF_HD_V1_8812F */ 11079 11080 #define BIT_SHIFT_WMAC_LBK_BUF_HEAD_V1_8812F 0 11081 #define BIT_MASK_WMAC_LBK_BUF_HEAD_V1_8812F 0xfff 11082 #define BIT_WMAC_LBK_BUF_HEAD_V1_8812F(x) \ 11083 (((x) & BIT_MASK_WMAC_LBK_BUF_HEAD_V1_8812F) \ 11084 << BIT_SHIFT_WMAC_LBK_BUF_HEAD_V1_8812F) 11085 #define BITS_WMAC_LBK_BUF_HEAD_V1_8812F \ 11086 (BIT_MASK_WMAC_LBK_BUF_HEAD_V1_8812F \ 11087 << BIT_SHIFT_WMAC_LBK_BUF_HEAD_V1_8812F) 11088 #define BIT_CLEAR_WMAC_LBK_BUF_HEAD_V1_8812F(x) \ 11089 ((x) & (~BITS_WMAC_LBK_BUF_HEAD_V1_8812F)) 11090 #define BIT_GET_WMAC_LBK_BUF_HEAD_V1_8812F(x) \ 11091 (((x) >> BIT_SHIFT_WMAC_LBK_BUF_HEAD_V1_8812F) & \ 11092 BIT_MASK_WMAC_LBK_BUF_HEAD_V1_8812F) 11093 #define BIT_SET_WMAC_LBK_BUF_HEAD_V1_8812F(x, v) \ 11094 (BIT_CLEAR_WMAC_LBK_BUF_HEAD_V1_8812F(x) | \ 11095 BIT_WMAC_LBK_BUF_HEAD_V1_8812F(v)) 11096 11097 /* 2 REG_MGQ_BDNY_V1_8812F */ 11098 11099 #define BIT_SHIFT_MGQ_PGBNDY_V1_8812F 0 11100 #define BIT_MASK_MGQ_PGBNDY_V1_8812F 0xfff 11101 #define BIT_MGQ_PGBNDY_V1_8812F(x) \ 11102 (((x) & BIT_MASK_MGQ_PGBNDY_V1_8812F) << BIT_SHIFT_MGQ_PGBNDY_V1_8812F) 11103 #define BITS_MGQ_PGBNDY_V1_8812F \ 11104 (BIT_MASK_MGQ_PGBNDY_V1_8812F << BIT_SHIFT_MGQ_PGBNDY_V1_8812F) 11105 #define BIT_CLEAR_MGQ_PGBNDY_V1_8812F(x) ((x) & (~BITS_MGQ_PGBNDY_V1_8812F)) 11106 #define BIT_GET_MGQ_PGBNDY_V1_8812F(x) \ 11107 (((x) >> BIT_SHIFT_MGQ_PGBNDY_V1_8812F) & BIT_MASK_MGQ_PGBNDY_V1_8812F) 11108 #define BIT_SET_MGQ_PGBNDY_V1_8812F(x, v) \ 11109 (BIT_CLEAR_MGQ_PGBNDY_V1_8812F(x) | BIT_MGQ_PGBNDY_V1_8812F(v)) 11110 11111 /* 2 REG_TXRPT_CTRL_8812F */ 11112 11113 #define BIT_SHIFT_TRXRPT_TIMER_TH_8812F 24 11114 #define BIT_MASK_TRXRPT_TIMER_TH_8812F 0xff 11115 #define BIT_TRXRPT_TIMER_TH_8812F(x) \ 11116 (((x) & BIT_MASK_TRXRPT_TIMER_TH_8812F) \ 11117 << BIT_SHIFT_TRXRPT_TIMER_TH_8812F) 11118 #define BITS_TRXRPT_TIMER_TH_8812F \ 11119 (BIT_MASK_TRXRPT_TIMER_TH_8812F << BIT_SHIFT_TRXRPT_TIMER_TH_8812F) 11120 #define BIT_CLEAR_TRXRPT_TIMER_TH_8812F(x) ((x) & (~BITS_TRXRPT_TIMER_TH_8812F)) 11121 #define BIT_GET_TRXRPT_TIMER_TH_8812F(x) \ 11122 (((x) >> BIT_SHIFT_TRXRPT_TIMER_TH_8812F) & \ 11123 BIT_MASK_TRXRPT_TIMER_TH_8812F) 11124 #define BIT_SET_TRXRPT_TIMER_TH_8812F(x, v) \ 11125 (BIT_CLEAR_TRXRPT_TIMER_TH_8812F(x) | BIT_TRXRPT_TIMER_TH_8812F(v)) 11126 11127 #define BIT_SHIFT_TRXRPT_LEN_TH_8812F 16 11128 #define BIT_MASK_TRXRPT_LEN_TH_8812F 0xff 11129 #define BIT_TRXRPT_LEN_TH_8812F(x) \ 11130 (((x) & BIT_MASK_TRXRPT_LEN_TH_8812F) << BIT_SHIFT_TRXRPT_LEN_TH_8812F) 11131 #define BITS_TRXRPT_LEN_TH_8812F \ 11132 (BIT_MASK_TRXRPT_LEN_TH_8812F << BIT_SHIFT_TRXRPT_LEN_TH_8812F) 11133 #define BIT_CLEAR_TRXRPT_LEN_TH_8812F(x) ((x) & (~BITS_TRXRPT_LEN_TH_8812F)) 11134 #define BIT_GET_TRXRPT_LEN_TH_8812F(x) \ 11135 (((x) >> BIT_SHIFT_TRXRPT_LEN_TH_8812F) & BIT_MASK_TRXRPT_LEN_TH_8812F) 11136 #define BIT_SET_TRXRPT_LEN_TH_8812F(x, v) \ 11137 (BIT_CLEAR_TRXRPT_LEN_TH_8812F(x) | BIT_TRXRPT_LEN_TH_8812F(v)) 11138 11139 #define BIT_SHIFT_TRXRPT_READ_PTR_8812F 8 11140 #define BIT_MASK_TRXRPT_READ_PTR_8812F 0xff 11141 #define BIT_TRXRPT_READ_PTR_8812F(x) \ 11142 (((x) & BIT_MASK_TRXRPT_READ_PTR_8812F) \ 11143 << BIT_SHIFT_TRXRPT_READ_PTR_8812F) 11144 #define BITS_TRXRPT_READ_PTR_8812F \ 11145 (BIT_MASK_TRXRPT_READ_PTR_8812F << BIT_SHIFT_TRXRPT_READ_PTR_8812F) 11146 #define BIT_CLEAR_TRXRPT_READ_PTR_8812F(x) ((x) & (~BITS_TRXRPT_READ_PTR_8812F)) 11147 #define BIT_GET_TRXRPT_READ_PTR_8812F(x) \ 11148 (((x) >> BIT_SHIFT_TRXRPT_READ_PTR_8812F) & \ 11149 BIT_MASK_TRXRPT_READ_PTR_8812F) 11150 #define BIT_SET_TRXRPT_READ_PTR_8812F(x, v) \ 11151 (BIT_CLEAR_TRXRPT_READ_PTR_8812F(x) | BIT_TRXRPT_READ_PTR_8812F(v)) 11152 11153 #define BIT_SHIFT_TRXRPT_WRITE_PTR_8812F 0 11154 #define BIT_MASK_TRXRPT_WRITE_PTR_8812F 0xff 11155 #define BIT_TRXRPT_WRITE_PTR_8812F(x) \ 11156 (((x) & BIT_MASK_TRXRPT_WRITE_PTR_8812F) \ 11157 << BIT_SHIFT_TRXRPT_WRITE_PTR_8812F) 11158 #define BITS_TRXRPT_WRITE_PTR_8812F \ 11159 (BIT_MASK_TRXRPT_WRITE_PTR_8812F << BIT_SHIFT_TRXRPT_WRITE_PTR_8812F) 11160 #define BIT_CLEAR_TRXRPT_WRITE_PTR_8812F(x) \ 11161 ((x) & (~BITS_TRXRPT_WRITE_PTR_8812F)) 11162 #define BIT_GET_TRXRPT_WRITE_PTR_8812F(x) \ 11163 (((x) >> BIT_SHIFT_TRXRPT_WRITE_PTR_8812F) & \ 11164 BIT_MASK_TRXRPT_WRITE_PTR_8812F) 11165 #define BIT_SET_TRXRPT_WRITE_PTR_8812F(x, v) \ 11166 (BIT_CLEAR_TRXRPT_WRITE_PTR_8812F(x) | BIT_TRXRPT_WRITE_PTR_8812F(v)) 11167 11168 /* 2 REG_INIRTS_RATE_SEL_8812F */ 11169 #define BIT_LEAG_RTS_BW_DUP_8812F BIT(5) 11170 11171 /* 2 REG_BASIC_CFEND_RATE_8812F */ 11172 11173 #define BIT_SHIFT_BASIC_CFEND_RATE_8812F 0 11174 #define BIT_MASK_BASIC_CFEND_RATE_8812F 0x1f 11175 #define BIT_BASIC_CFEND_RATE_8812F(x) \ 11176 (((x) & BIT_MASK_BASIC_CFEND_RATE_8812F) \ 11177 << BIT_SHIFT_BASIC_CFEND_RATE_8812F) 11178 #define BITS_BASIC_CFEND_RATE_8812F \ 11179 (BIT_MASK_BASIC_CFEND_RATE_8812F << BIT_SHIFT_BASIC_CFEND_RATE_8812F) 11180 #define BIT_CLEAR_BASIC_CFEND_RATE_8812F(x) \ 11181 ((x) & (~BITS_BASIC_CFEND_RATE_8812F)) 11182 #define BIT_GET_BASIC_CFEND_RATE_8812F(x) \ 11183 (((x) >> BIT_SHIFT_BASIC_CFEND_RATE_8812F) & \ 11184 BIT_MASK_BASIC_CFEND_RATE_8812F) 11185 #define BIT_SET_BASIC_CFEND_RATE_8812F(x, v) \ 11186 (BIT_CLEAR_BASIC_CFEND_RATE_8812F(x) | BIT_BASIC_CFEND_RATE_8812F(v)) 11187 11188 /* 2 REG_STBC_CFEND_RATE_8812F */ 11189 11190 #define BIT_SHIFT_STBC_CFEND_RATE_8812F 0 11191 #define BIT_MASK_STBC_CFEND_RATE_8812F 0x1f 11192 #define BIT_STBC_CFEND_RATE_8812F(x) \ 11193 (((x) & BIT_MASK_STBC_CFEND_RATE_8812F) \ 11194 << BIT_SHIFT_STBC_CFEND_RATE_8812F) 11195 #define BITS_STBC_CFEND_RATE_8812F \ 11196 (BIT_MASK_STBC_CFEND_RATE_8812F << BIT_SHIFT_STBC_CFEND_RATE_8812F) 11197 #define BIT_CLEAR_STBC_CFEND_RATE_8812F(x) ((x) & (~BITS_STBC_CFEND_RATE_8812F)) 11198 #define BIT_GET_STBC_CFEND_RATE_8812F(x) \ 11199 (((x) >> BIT_SHIFT_STBC_CFEND_RATE_8812F) & \ 11200 BIT_MASK_STBC_CFEND_RATE_8812F) 11201 #define BIT_SET_STBC_CFEND_RATE_8812F(x, v) \ 11202 (BIT_CLEAR_STBC_CFEND_RATE_8812F(x) | BIT_STBC_CFEND_RATE_8812F(v)) 11203 11204 /* 2 REG_DATA_SC_8812F */ 11205 11206 #define BIT_SHIFT_TXSC_40M_8812F 4 11207 #define BIT_MASK_TXSC_40M_8812F 0xf 11208 #define BIT_TXSC_40M_8812F(x) \ 11209 (((x) & BIT_MASK_TXSC_40M_8812F) << BIT_SHIFT_TXSC_40M_8812F) 11210 #define BITS_TXSC_40M_8812F \ 11211 (BIT_MASK_TXSC_40M_8812F << BIT_SHIFT_TXSC_40M_8812F) 11212 #define BIT_CLEAR_TXSC_40M_8812F(x) ((x) & (~BITS_TXSC_40M_8812F)) 11213 #define BIT_GET_TXSC_40M_8812F(x) \ 11214 (((x) >> BIT_SHIFT_TXSC_40M_8812F) & BIT_MASK_TXSC_40M_8812F) 11215 #define BIT_SET_TXSC_40M_8812F(x, v) \ 11216 (BIT_CLEAR_TXSC_40M_8812F(x) | BIT_TXSC_40M_8812F(v)) 11217 11218 #define BIT_SHIFT_TXSC_20M_8812F 0 11219 #define BIT_MASK_TXSC_20M_8812F 0xf 11220 #define BIT_TXSC_20M_8812F(x) \ 11221 (((x) & BIT_MASK_TXSC_20M_8812F) << BIT_SHIFT_TXSC_20M_8812F) 11222 #define BITS_TXSC_20M_8812F \ 11223 (BIT_MASK_TXSC_20M_8812F << BIT_SHIFT_TXSC_20M_8812F) 11224 #define BIT_CLEAR_TXSC_20M_8812F(x) ((x) & (~BITS_TXSC_20M_8812F)) 11225 #define BIT_GET_TXSC_20M_8812F(x) \ 11226 (((x) >> BIT_SHIFT_TXSC_20M_8812F) & BIT_MASK_TXSC_20M_8812F) 11227 #define BIT_SET_TXSC_20M_8812F(x, v) \ 11228 (BIT_CLEAR_TXSC_20M_8812F(x) | BIT_TXSC_20M_8812F(v)) 11229 11230 /* 2 REG_MACID_SLEEP3_8812F */ 11231 11232 #define BIT_SHIFT_MACID127_96_PKTSLEEP_8812F 0 11233 #define BIT_MASK_MACID127_96_PKTSLEEP_8812F 0xffffffffL 11234 #define BIT_MACID127_96_PKTSLEEP_8812F(x) \ 11235 (((x) & BIT_MASK_MACID127_96_PKTSLEEP_8812F) \ 11236 << BIT_SHIFT_MACID127_96_PKTSLEEP_8812F) 11237 #define BITS_MACID127_96_PKTSLEEP_8812F \ 11238 (BIT_MASK_MACID127_96_PKTSLEEP_8812F \ 11239 << BIT_SHIFT_MACID127_96_PKTSLEEP_8812F) 11240 #define BIT_CLEAR_MACID127_96_PKTSLEEP_8812F(x) \ 11241 ((x) & (~BITS_MACID127_96_PKTSLEEP_8812F)) 11242 #define BIT_GET_MACID127_96_PKTSLEEP_8812F(x) \ 11243 (((x) >> BIT_SHIFT_MACID127_96_PKTSLEEP_8812F) & \ 11244 BIT_MASK_MACID127_96_PKTSLEEP_8812F) 11245 #define BIT_SET_MACID127_96_PKTSLEEP_8812F(x, v) \ 11246 (BIT_CLEAR_MACID127_96_PKTSLEEP_8812F(x) | \ 11247 BIT_MACID127_96_PKTSLEEP_8812F(v)) 11248 11249 /* 2 REG_MACID_SLEEP1_8812F */ 11250 11251 #define BIT_SHIFT_MACID63_32_PKTSLEEP_8812F 0 11252 #define BIT_MASK_MACID63_32_PKTSLEEP_8812F 0xffffffffL 11253 #define BIT_MACID63_32_PKTSLEEP_8812F(x) \ 11254 (((x) & BIT_MASK_MACID63_32_PKTSLEEP_8812F) \ 11255 << BIT_SHIFT_MACID63_32_PKTSLEEP_8812F) 11256 #define BITS_MACID63_32_PKTSLEEP_8812F \ 11257 (BIT_MASK_MACID63_32_PKTSLEEP_8812F \ 11258 << BIT_SHIFT_MACID63_32_PKTSLEEP_8812F) 11259 #define BIT_CLEAR_MACID63_32_PKTSLEEP_8812F(x) \ 11260 ((x) & (~BITS_MACID63_32_PKTSLEEP_8812F)) 11261 #define BIT_GET_MACID63_32_PKTSLEEP_8812F(x) \ 11262 (((x) >> BIT_SHIFT_MACID63_32_PKTSLEEP_8812F) & \ 11263 BIT_MASK_MACID63_32_PKTSLEEP_8812F) 11264 #define BIT_SET_MACID63_32_PKTSLEEP_8812F(x, v) \ 11265 (BIT_CLEAR_MACID63_32_PKTSLEEP_8812F(x) | \ 11266 BIT_MACID63_32_PKTSLEEP_8812F(v)) 11267 11268 /* 2 REG_ARFR2_V1_8812F */ 11269 11270 #define BIT_SHIFT_ARFRL2_8812F 0 11271 #define BIT_MASK_ARFRL2_8812F 0xffffffffL 11272 #define BIT_ARFRL2_8812F(x) \ 11273 (((x) & BIT_MASK_ARFRL2_8812F) << BIT_SHIFT_ARFRL2_8812F) 11274 #define BITS_ARFRL2_8812F (BIT_MASK_ARFRL2_8812F << BIT_SHIFT_ARFRL2_8812F) 11275 #define BIT_CLEAR_ARFRL2_8812F(x) ((x) & (~BITS_ARFRL2_8812F)) 11276 #define BIT_GET_ARFRL2_8812F(x) \ 11277 (((x) >> BIT_SHIFT_ARFRL2_8812F) & BIT_MASK_ARFRL2_8812F) 11278 #define BIT_SET_ARFRL2_8812F(x, v) \ 11279 (BIT_CLEAR_ARFRL2_8812F(x) | BIT_ARFRL2_8812F(v)) 11280 11281 /* 2 REG_ARFRH2_V1_8812F */ 11282 11283 #define BIT_SHIFT_ARFRH2_8812F 0 11284 #define BIT_MASK_ARFRH2_8812F 0xffffffffL 11285 #define BIT_ARFRH2_8812F(x) \ 11286 (((x) & BIT_MASK_ARFRH2_8812F) << BIT_SHIFT_ARFRH2_8812F) 11287 #define BITS_ARFRH2_8812F (BIT_MASK_ARFRH2_8812F << BIT_SHIFT_ARFRH2_8812F) 11288 #define BIT_CLEAR_ARFRH2_8812F(x) ((x) & (~BITS_ARFRH2_8812F)) 11289 #define BIT_GET_ARFRH2_8812F(x) \ 11290 (((x) >> BIT_SHIFT_ARFRH2_8812F) & BIT_MASK_ARFRH2_8812F) 11291 #define BIT_SET_ARFRH2_8812F(x, v) \ 11292 (BIT_CLEAR_ARFRH2_8812F(x) | BIT_ARFRH2_8812F(v)) 11293 11294 /* 2 REG_ARFR3_V1_8812F */ 11295 11296 #define BIT_SHIFT_ARFRL3_8812F 0 11297 #define BIT_MASK_ARFRL3_8812F 0xffffffffL 11298 #define BIT_ARFRL3_8812F(x) \ 11299 (((x) & BIT_MASK_ARFRL3_8812F) << BIT_SHIFT_ARFRL3_8812F) 11300 #define BITS_ARFRL3_8812F (BIT_MASK_ARFRL3_8812F << BIT_SHIFT_ARFRL3_8812F) 11301 #define BIT_CLEAR_ARFRL3_8812F(x) ((x) & (~BITS_ARFRL3_8812F)) 11302 #define BIT_GET_ARFRL3_8812F(x) \ 11303 (((x) >> BIT_SHIFT_ARFRL3_8812F) & BIT_MASK_ARFRL3_8812F) 11304 #define BIT_SET_ARFRL3_8812F(x, v) \ 11305 (BIT_CLEAR_ARFRL3_8812F(x) | BIT_ARFRL3_8812F(v)) 11306 11307 /* 2 REG_ARFRH3_V1_8812F */ 11308 11309 #define BIT_SHIFT_ARFRH3_8812F 0 11310 #define BIT_MASK_ARFRH3_8812F 0xffffffffL 11311 #define BIT_ARFRH3_8812F(x) \ 11312 (((x) & BIT_MASK_ARFRH3_8812F) << BIT_SHIFT_ARFRH3_8812F) 11313 #define BITS_ARFRH3_8812F (BIT_MASK_ARFRH3_8812F << BIT_SHIFT_ARFRH3_8812F) 11314 #define BIT_CLEAR_ARFRH3_8812F(x) ((x) & (~BITS_ARFRH3_8812F)) 11315 #define BIT_GET_ARFRH3_8812F(x) \ 11316 (((x) >> BIT_SHIFT_ARFRH3_8812F) & BIT_MASK_ARFRH3_8812F) 11317 #define BIT_SET_ARFRH3_8812F(x, v) \ 11318 (BIT_CLEAR_ARFRH3_8812F(x) | BIT_ARFRH3_8812F(v)) 11319 11320 /* 2 REG_ARFR4_8812F */ 11321 11322 #define BIT_SHIFT_ARFRL4_8812F 0 11323 #define BIT_MASK_ARFRL4_8812F 0xffffffffL 11324 #define BIT_ARFRL4_8812F(x) \ 11325 (((x) & BIT_MASK_ARFRL4_8812F) << BIT_SHIFT_ARFRL4_8812F) 11326 #define BITS_ARFRL4_8812F (BIT_MASK_ARFRL4_8812F << BIT_SHIFT_ARFRL4_8812F) 11327 #define BIT_CLEAR_ARFRL4_8812F(x) ((x) & (~BITS_ARFRL4_8812F)) 11328 #define BIT_GET_ARFRL4_8812F(x) \ 11329 (((x) >> BIT_SHIFT_ARFRL4_8812F) & BIT_MASK_ARFRL4_8812F) 11330 #define BIT_SET_ARFRL4_8812F(x, v) \ 11331 (BIT_CLEAR_ARFRL4_8812F(x) | BIT_ARFRL4_8812F(v)) 11332 11333 /* 2 REG_ARFRH4_8812F */ 11334 11335 #define BIT_SHIFT_ARFRH4_8812F 0 11336 #define BIT_MASK_ARFRH4_8812F 0xffffffffL 11337 #define BIT_ARFRH4_8812F(x) \ 11338 (((x) & BIT_MASK_ARFRH4_8812F) << BIT_SHIFT_ARFRH4_8812F) 11339 #define BITS_ARFRH4_8812F (BIT_MASK_ARFRH4_8812F << BIT_SHIFT_ARFRH4_8812F) 11340 #define BIT_CLEAR_ARFRH4_8812F(x) ((x) & (~BITS_ARFRH4_8812F)) 11341 #define BIT_GET_ARFRH4_8812F(x) \ 11342 (((x) >> BIT_SHIFT_ARFRH4_8812F) & BIT_MASK_ARFRH4_8812F) 11343 #define BIT_SET_ARFRH4_8812F(x, v) \ 11344 (BIT_CLEAR_ARFRH4_8812F(x) | BIT_ARFRH4_8812F(v)) 11345 11346 /* 2 REG_ARFR5_8812F */ 11347 11348 #define BIT_SHIFT_ARFRL5_8812F 0 11349 #define BIT_MASK_ARFRL5_8812F 0xffffffffL 11350 #define BIT_ARFRL5_8812F(x) \ 11351 (((x) & BIT_MASK_ARFRL5_8812F) << BIT_SHIFT_ARFRL5_8812F) 11352 #define BITS_ARFRL5_8812F (BIT_MASK_ARFRL5_8812F << BIT_SHIFT_ARFRL5_8812F) 11353 #define BIT_CLEAR_ARFRL5_8812F(x) ((x) & (~BITS_ARFRL5_8812F)) 11354 #define BIT_GET_ARFRL5_8812F(x) \ 11355 (((x) >> BIT_SHIFT_ARFRL5_8812F) & BIT_MASK_ARFRL5_8812F) 11356 #define BIT_SET_ARFRL5_8812F(x, v) \ 11357 (BIT_CLEAR_ARFRL5_8812F(x) | BIT_ARFRL5_8812F(v)) 11358 11359 /* 2 REG_ARFRH5_8812F */ 11360 11361 #define BIT_SHIFT_ARFRH5_8812F 0 11362 #define BIT_MASK_ARFRH5_8812F 0xffffffffL 11363 #define BIT_ARFRH5_8812F(x) \ 11364 (((x) & BIT_MASK_ARFRH5_8812F) << BIT_SHIFT_ARFRH5_8812F) 11365 #define BITS_ARFRH5_8812F (BIT_MASK_ARFRH5_8812F << BIT_SHIFT_ARFRH5_8812F) 11366 #define BIT_CLEAR_ARFRH5_8812F(x) ((x) & (~BITS_ARFRH5_8812F)) 11367 #define BIT_GET_ARFRH5_8812F(x) \ 11368 (((x) >> BIT_SHIFT_ARFRH5_8812F) & BIT_MASK_ARFRH5_8812F) 11369 #define BIT_SET_ARFRH5_8812F(x, v) \ 11370 (BIT_CLEAR_ARFRH5_8812F(x) | BIT_ARFRH5_8812F(v)) 11371 11372 /* 2 REG_TXRPT_START_OFFSET_8812F */ 11373 11374 #define BIT_SHIFT_MACID_MURATE_OFFSET_8812F 24 11375 #define BIT_MASK_MACID_MURATE_OFFSET_8812F 0xff 11376 #define BIT_MACID_MURATE_OFFSET_8812F(x) \ 11377 (((x) & BIT_MASK_MACID_MURATE_OFFSET_8812F) \ 11378 << BIT_SHIFT_MACID_MURATE_OFFSET_8812F) 11379 #define BITS_MACID_MURATE_OFFSET_8812F \ 11380 (BIT_MASK_MACID_MURATE_OFFSET_8812F \ 11381 << BIT_SHIFT_MACID_MURATE_OFFSET_8812F) 11382 #define BIT_CLEAR_MACID_MURATE_OFFSET_8812F(x) \ 11383 ((x) & (~BITS_MACID_MURATE_OFFSET_8812F)) 11384 #define BIT_GET_MACID_MURATE_OFFSET_8812F(x) \ 11385 (((x) >> BIT_SHIFT_MACID_MURATE_OFFSET_8812F) & \ 11386 BIT_MASK_MACID_MURATE_OFFSET_8812F) 11387 #define BIT_SET_MACID_MURATE_OFFSET_8812F(x, v) \ 11388 (BIT_CLEAR_MACID_MURATE_OFFSET_8812F(x) | \ 11389 BIT_MACID_MURATE_OFFSET_8812F(v)) 11390 11391 #define BIT_SHIFT_TXRPT_MISS_COUNT_8812F 17 11392 #define BIT_MASK_TXRPT_MISS_COUNT_8812F 0x7 11393 #define BIT_TXRPT_MISS_COUNT_8812F(x) \ 11394 (((x) & BIT_MASK_TXRPT_MISS_COUNT_8812F) \ 11395 << BIT_SHIFT_TXRPT_MISS_COUNT_8812F) 11396 #define BITS_TXRPT_MISS_COUNT_8812F \ 11397 (BIT_MASK_TXRPT_MISS_COUNT_8812F << BIT_SHIFT_TXRPT_MISS_COUNT_8812F) 11398 #define BIT_CLEAR_TXRPT_MISS_COUNT_8812F(x) \ 11399 ((x) & (~BITS_TXRPT_MISS_COUNT_8812F)) 11400 #define BIT_GET_TXRPT_MISS_COUNT_8812F(x) \ 11401 (((x) >> BIT_SHIFT_TXRPT_MISS_COUNT_8812F) & \ 11402 BIT_MASK_TXRPT_MISS_COUNT_8812F) 11403 #define BIT_SET_TXRPT_MISS_COUNT_8812F(x, v) \ 11404 (BIT_CLEAR_TXRPT_MISS_COUNT_8812F(x) | BIT_TXRPT_MISS_COUNT_8812F(v)) 11405 11406 #define BIT_RPTFIFO_SIZE_OPT_8812F BIT(16) 11407 11408 #define BIT_SHIFT_MACID_CTRL_OFFSET_8812F 8 11409 #define BIT_MASK_MACID_CTRL_OFFSET_8812F 0xff 11410 #define BIT_MACID_CTRL_OFFSET_8812F(x) \ 11411 (((x) & BIT_MASK_MACID_CTRL_OFFSET_8812F) \ 11412 << BIT_SHIFT_MACID_CTRL_OFFSET_8812F) 11413 #define BITS_MACID_CTRL_OFFSET_8812F \ 11414 (BIT_MASK_MACID_CTRL_OFFSET_8812F << BIT_SHIFT_MACID_CTRL_OFFSET_8812F) 11415 #define BIT_CLEAR_MACID_CTRL_OFFSET_8812F(x) \ 11416 ((x) & (~BITS_MACID_CTRL_OFFSET_8812F)) 11417 #define BIT_GET_MACID_CTRL_OFFSET_8812F(x) \ 11418 (((x) >> BIT_SHIFT_MACID_CTRL_OFFSET_8812F) & \ 11419 BIT_MASK_MACID_CTRL_OFFSET_8812F) 11420 #define BIT_SET_MACID_CTRL_OFFSET_8812F(x, v) \ 11421 (BIT_CLEAR_MACID_CTRL_OFFSET_8812F(x) | BIT_MACID_CTRL_OFFSET_8812F(v)) 11422 11423 #define BIT_SHIFT_AMPDU_TXRPT_OFFSET_8812F 0 11424 #define BIT_MASK_AMPDU_TXRPT_OFFSET_8812F 0xff 11425 #define BIT_AMPDU_TXRPT_OFFSET_8812F(x) \ 11426 (((x) & BIT_MASK_AMPDU_TXRPT_OFFSET_8812F) \ 11427 << BIT_SHIFT_AMPDU_TXRPT_OFFSET_8812F) 11428 #define BITS_AMPDU_TXRPT_OFFSET_8812F \ 11429 (BIT_MASK_AMPDU_TXRPT_OFFSET_8812F \ 11430 << BIT_SHIFT_AMPDU_TXRPT_OFFSET_8812F) 11431 #define BIT_CLEAR_AMPDU_TXRPT_OFFSET_8812F(x) \ 11432 ((x) & (~BITS_AMPDU_TXRPT_OFFSET_8812F)) 11433 #define BIT_GET_AMPDU_TXRPT_OFFSET_8812F(x) \ 11434 (((x) >> BIT_SHIFT_AMPDU_TXRPT_OFFSET_8812F) & \ 11435 BIT_MASK_AMPDU_TXRPT_OFFSET_8812F) 11436 #define BIT_SET_AMPDU_TXRPT_OFFSET_8812F(x, v) \ 11437 (BIT_CLEAR_AMPDU_TXRPT_OFFSET_8812F(x) | \ 11438 BIT_AMPDU_TXRPT_OFFSET_8812F(v)) 11439 11440 /* 2 REG_RRSR_CTS_8812F */ 11441 11442 #define BIT_SHIFT_RRCTSSR_RSC_8812F 21 11443 #define BIT_MASK_RRCTSSR_RSC_8812F 0x3 11444 #define BIT_RRCTSSR_RSC_8812F(x) \ 11445 (((x) & BIT_MASK_RRCTSSR_RSC_8812F) << BIT_SHIFT_RRCTSSR_RSC_8812F) 11446 #define BITS_RRCTSSR_RSC_8812F \ 11447 (BIT_MASK_RRCTSSR_RSC_8812F << BIT_SHIFT_RRCTSSR_RSC_8812F) 11448 #define BIT_CLEAR_RRCTSSR_RSC_8812F(x) ((x) & (~BITS_RRCTSSR_RSC_8812F)) 11449 #define BIT_GET_RRCTSSR_RSC_8812F(x) \ 11450 (((x) >> BIT_SHIFT_RRCTSSR_RSC_8812F) & BIT_MASK_RRCTSSR_RSC_8812F) 11451 #define BIT_SET_RRCTSSR_RSC_8812F(x, v) \ 11452 (BIT_CLEAR_RRCTSSR_RSC_8812F(x) | BIT_RRCTSSR_RSC_8812F(v)) 11453 11454 #define BIT_SHIFT_RRCTSSC_BITMAP_8812F 0 11455 #define BIT_MASK_RRCTSSC_BITMAP_8812F 0xfffff 11456 #define BIT_RRCTSSC_BITMAP_8812F(x) \ 11457 (((x) & BIT_MASK_RRCTSSC_BITMAP_8812F) \ 11458 << BIT_SHIFT_RRCTSSC_BITMAP_8812F) 11459 #define BITS_RRCTSSC_BITMAP_8812F \ 11460 (BIT_MASK_RRCTSSC_BITMAP_8812F << BIT_SHIFT_RRCTSSC_BITMAP_8812F) 11461 #define BIT_CLEAR_RRCTSSC_BITMAP_8812F(x) ((x) & (~BITS_RRCTSSC_BITMAP_8812F)) 11462 #define BIT_GET_RRCTSSC_BITMAP_8812F(x) \ 11463 (((x) >> BIT_SHIFT_RRCTSSC_BITMAP_8812F) & \ 11464 BIT_MASK_RRCTSSC_BITMAP_8812F) 11465 #define BIT_SET_RRCTSSC_BITMAP_8812F(x, v) \ 11466 (BIT_CLEAR_RRCTSSC_BITMAP_8812F(x) | BIT_RRCTSSC_BITMAP_8812F(v)) 11467 11468 /* 2 REG_NOT_VALID_8812F */ 11469 11470 /* 2 REG_POWER_STAGE1_8812F */ 11471 #define BIT_PTA_WL_PRI_MASK_CPU_MGQ_8812F BIT(31) 11472 #define BIT_PTA_WL_PRI_MASK_BCNQ_8812F BIT(30) 11473 #define BIT_PTA_WL_PRI_MASK_HIQ_8812F BIT(29) 11474 #define BIT_PTA_WL_PRI_MASK_MGQ_8812F BIT(28) 11475 #define BIT_PTA_WL_PRI_MASK_BK_8812F BIT(27) 11476 #define BIT_PTA_WL_PRI_MASK_BE_8812F BIT(26) 11477 #define BIT_PTA_WL_PRI_MASK_VI_8812F BIT(25) 11478 #define BIT_PTA_WL_PRI_MASK_VO_8812F BIT(24) 11479 11480 #define BIT_SHIFT_POWER_STAGE1_8812F 0 11481 #define BIT_MASK_POWER_STAGE1_8812F 0xffffff 11482 #define BIT_POWER_STAGE1_8812F(x) \ 11483 (((x) & BIT_MASK_POWER_STAGE1_8812F) << BIT_SHIFT_POWER_STAGE1_8812F) 11484 #define BITS_POWER_STAGE1_8812F \ 11485 (BIT_MASK_POWER_STAGE1_8812F << BIT_SHIFT_POWER_STAGE1_8812F) 11486 #define BIT_CLEAR_POWER_STAGE1_8812F(x) ((x) & (~BITS_POWER_STAGE1_8812F)) 11487 #define BIT_GET_POWER_STAGE1_8812F(x) \ 11488 (((x) >> BIT_SHIFT_POWER_STAGE1_8812F) & BIT_MASK_POWER_STAGE1_8812F) 11489 #define BIT_SET_POWER_STAGE1_8812F(x, v) \ 11490 (BIT_CLEAR_POWER_STAGE1_8812F(x) | BIT_POWER_STAGE1_8812F(v)) 11491 11492 /* 2 REG_POWER_STAGE2_8812F */ 11493 #define BIT__R_CTRL_PKT_POW_ADJ_8812F BIT(24) 11494 11495 #define BIT_SHIFT_POWER_STAGE2_8812F 0 11496 #define BIT_MASK_POWER_STAGE2_8812F 0xffffff 11497 #define BIT_POWER_STAGE2_8812F(x) \ 11498 (((x) & BIT_MASK_POWER_STAGE2_8812F) << BIT_SHIFT_POWER_STAGE2_8812F) 11499 #define BITS_POWER_STAGE2_8812F \ 11500 (BIT_MASK_POWER_STAGE2_8812F << BIT_SHIFT_POWER_STAGE2_8812F) 11501 #define BIT_CLEAR_POWER_STAGE2_8812F(x) ((x) & (~BITS_POWER_STAGE2_8812F)) 11502 #define BIT_GET_POWER_STAGE2_8812F(x) \ 11503 (((x) >> BIT_SHIFT_POWER_STAGE2_8812F) & BIT_MASK_POWER_STAGE2_8812F) 11504 #define BIT_SET_POWER_STAGE2_8812F(x, v) \ 11505 (BIT_CLEAR_POWER_STAGE2_8812F(x) | BIT_POWER_STAGE2_8812F(v)) 11506 11507 /* 2 REG_SW_AMPDU_BURST_MODE_CTRL_8812F */ 11508 11509 #define BIT_SHIFT_PAD_NUM_THRES_8812F 24 11510 #define BIT_MASK_PAD_NUM_THRES_8812F 0x3f 11511 #define BIT_PAD_NUM_THRES_8812F(x) \ 11512 (((x) & BIT_MASK_PAD_NUM_THRES_8812F) << BIT_SHIFT_PAD_NUM_THRES_8812F) 11513 #define BITS_PAD_NUM_THRES_8812F \ 11514 (BIT_MASK_PAD_NUM_THRES_8812F << BIT_SHIFT_PAD_NUM_THRES_8812F) 11515 #define BIT_CLEAR_PAD_NUM_THRES_8812F(x) ((x) & (~BITS_PAD_NUM_THRES_8812F)) 11516 #define BIT_GET_PAD_NUM_THRES_8812F(x) \ 11517 (((x) >> BIT_SHIFT_PAD_NUM_THRES_8812F) & BIT_MASK_PAD_NUM_THRES_8812F) 11518 #define BIT_SET_PAD_NUM_THRES_8812F(x, v) \ 11519 (BIT_CLEAR_PAD_NUM_THRES_8812F(x) | BIT_PAD_NUM_THRES_8812F(v)) 11520 11521 #define BIT_R_DMA_THIS_QUEUE_BK_8812F BIT(23) 11522 #define BIT_R_DMA_THIS_QUEUE_BE_8812F BIT(22) 11523 #define BIT_R_DMA_THIS_QUEUE_VI_8812F BIT(21) 11524 #define BIT_R_DMA_THIS_QUEUE_VO_8812F BIT(20) 11525 11526 #define BIT_SHIFT_R_TOTAL_LEN_TH_8812F 8 11527 #define BIT_MASK_R_TOTAL_LEN_TH_8812F 0xfff 11528 #define BIT_R_TOTAL_LEN_TH_8812F(x) \ 11529 (((x) & BIT_MASK_R_TOTAL_LEN_TH_8812F) \ 11530 << BIT_SHIFT_R_TOTAL_LEN_TH_8812F) 11531 #define BITS_R_TOTAL_LEN_TH_8812F \ 11532 (BIT_MASK_R_TOTAL_LEN_TH_8812F << BIT_SHIFT_R_TOTAL_LEN_TH_8812F) 11533 #define BIT_CLEAR_R_TOTAL_LEN_TH_8812F(x) ((x) & (~BITS_R_TOTAL_LEN_TH_8812F)) 11534 #define BIT_GET_R_TOTAL_LEN_TH_8812F(x) \ 11535 (((x) >> BIT_SHIFT_R_TOTAL_LEN_TH_8812F) & \ 11536 BIT_MASK_R_TOTAL_LEN_TH_8812F) 11537 #define BIT_SET_R_TOTAL_LEN_TH_8812F(x, v) \ 11538 (BIT_CLEAR_R_TOTAL_LEN_TH_8812F(x) | BIT_R_TOTAL_LEN_TH_8812F(v)) 11539 11540 #define BIT_EN_NEW_EARLY_8812F BIT(7) 11541 #define BIT_PRE_TX_CMD_8812F BIT(6) 11542 11543 #define BIT_SHIFT_NUM_SCL_EN_8812F 4 11544 #define BIT_MASK_NUM_SCL_EN_8812F 0x3 11545 #define BIT_NUM_SCL_EN_8812F(x) \ 11546 (((x) & BIT_MASK_NUM_SCL_EN_8812F) << BIT_SHIFT_NUM_SCL_EN_8812F) 11547 #define BITS_NUM_SCL_EN_8812F \ 11548 (BIT_MASK_NUM_SCL_EN_8812F << BIT_SHIFT_NUM_SCL_EN_8812F) 11549 #define BIT_CLEAR_NUM_SCL_EN_8812F(x) ((x) & (~BITS_NUM_SCL_EN_8812F)) 11550 #define BIT_GET_NUM_SCL_EN_8812F(x) \ 11551 (((x) >> BIT_SHIFT_NUM_SCL_EN_8812F) & BIT_MASK_NUM_SCL_EN_8812F) 11552 #define BIT_SET_NUM_SCL_EN_8812F(x, v) \ 11553 (BIT_CLEAR_NUM_SCL_EN_8812F(x) | BIT_NUM_SCL_EN_8812F(v)) 11554 11555 #define BIT_BK_EN_8812F BIT(3) 11556 #define BIT_BE_EN_8812F BIT(2) 11557 #define BIT_VI_EN_8812F BIT(1) 11558 #define BIT_VO_EN_8812F BIT(0) 11559 11560 /* 2 REG_PKT_LIFE_TIME_8812F */ 11561 11562 #define BIT_SHIFT_PKT_LIFTIME_BEBK_8812F 16 11563 #define BIT_MASK_PKT_LIFTIME_BEBK_8812F 0xffff 11564 #define BIT_PKT_LIFTIME_BEBK_8812F(x) \ 11565 (((x) & BIT_MASK_PKT_LIFTIME_BEBK_8812F) \ 11566 << BIT_SHIFT_PKT_LIFTIME_BEBK_8812F) 11567 #define BITS_PKT_LIFTIME_BEBK_8812F \ 11568 (BIT_MASK_PKT_LIFTIME_BEBK_8812F << BIT_SHIFT_PKT_LIFTIME_BEBK_8812F) 11569 #define BIT_CLEAR_PKT_LIFTIME_BEBK_8812F(x) \ 11570 ((x) & (~BITS_PKT_LIFTIME_BEBK_8812F)) 11571 #define BIT_GET_PKT_LIFTIME_BEBK_8812F(x) \ 11572 (((x) >> BIT_SHIFT_PKT_LIFTIME_BEBK_8812F) & \ 11573 BIT_MASK_PKT_LIFTIME_BEBK_8812F) 11574 #define BIT_SET_PKT_LIFTIME_BEBK_8812F(x, v) \ 11575 (BIT_CLEAR_PKT_LIFTIME_BEBK_8812F(x) | BIT_PKT_LIFTIME_BEBK_8812F(v)) 11576 11577 #define BIT_SHIFT_PKT_LIFTIME_VOVI_8812F 0 11578 #define BIT_MASK_PKT_LIFTIME_VOVI_8812F 0xffff 11579 #define BIT_PKT_LIFTIME_VOVI_8812F(x) \ 11580 (((x) & BIT_MASK_PKT_LIFTIME_VOVI_8812F) \ 11581 << BIT_SHIFT_PKT_LIFTIME_VOVI_8812F) 11582 #define BITS_PKT_LIFTIME_VOVI_8812F \ 11583 (BIT_MASK_PKT_LIFTIME_VOVI_8812F << BIT_SHIFT_PKT_LIFTIME_VOVI_8812F) 11584 #define BIT_CLEAR_PKT_LIFTIME_VOVI_8812F(x) \ 11585 ((x) & (~BITS_PKT_LIFTIME_VOVI_8812F)) 11586 #define BIT_GET_PKT_LIFTIME_VOVI_8812F(x) \ 11587 (((x) >> BIT_SHIFT_PKT_LIFTIME_VOVI_8812F) & \ 11588 BIT_MASK_PKT_LIFTIME_VOVI_8812F) 11589 #define BIT_SET_PKT_LIFTIME_VOVI_8812F(x, v) \ 11590 (BIT_CLEAR_PKT_LIFTIME_VOVI_8812F(x) | BIT_PKT_LIFTIME_VOVI_8812F(v)) 11591 11592 /* 2 REG_STBC_SETTING_8812F */ 11593 11594 #define BIT_SHIFT_CDEND_TXTIME_L_8812F 4 11595 #define BIT_MASK_CDEND_TXTIME_L_8812F 0xf 11596 #define BIT_CDEND_TXTIME_L_8812F(x) \ 11597 (((x) & BIT_MASK_CDEND_TXTIME_L_8812F) \ 11598 << BIT_SHIFT_CDEND_TXTIME_L_8812F) 11599 #define BITS_CDEND_TXTIME_L_8812F \ 11600 (BIT_MASK_CDEND_TXTIME_L_8812F << BIT_SHIFT_CDEND_TXTIME_L_8812F) 11601 #define BIT_CLEAR_CDEND_TXTIME_L_8812F(x) ((x) & (~BITS_CDEND_TXTIME_L_8812F)) 11602 #define BIT_GET_CDEND_TXTIME_L_8812F(x) \ 11603 (((x) >> BIT_SHIFT_CDEND_TXTIME_L_8812F) & \ 11604 BIT_MASK_CDEND_TXTIME_L_8812F) 11605 #define BIT_SET_CDEND_TXTIME_L_8812F(x, v) \ 11606 (BIT_CLEAR_CDEND_TXTIME_L_8812F(x) | BIT_CDEND_TXTIME_L_8812F(v)) 11607 11608 #define BIT_SHIFT_NESS_8812F 2 11609 #define BIT_MASK_NESS_8812F 0x3 11610 #define BIT_NESS_8812F(x) (((x) & BIT_MASK_NESS_8812F) << BIT_SHIFT_NESS_8812F) 11611 #define BITS_NESS_8812F (BIT_MASK_NESS_8812F << BIT_SHIFT_NESS_8812F) 11612 #define BIT_CLEAR_NESS_8812F(x) ((x) & (~BITS_NESS_8812F)) 11613 #define BIT_GET_NESS_8812F(x) \ 11614 (((x) >> BIT_SHIFT_NESS_8812F) & BIT_MASK_NESS_8812F) 11615 #define BIT_SET_NESS_8812F(x, v) (BIT_CLEAR_NESS_8812F(x) | BIT_NESS_8812F(v)) 11616 11617 #define BIT_SHIFT_STBC_CFEND_8812F 0 11618 #define BIT_MASK_STBC_CFEND_8812F 0x3 11619 #define BIT_STBC_CFEND_8812F(x) \ 11620 (((x) & BIT_MASK_STBC_CFEND_8812F) << BIT_SHIFT_STBC_CFEND_8812F) 11621 #define BITS_STBC_CFEND_8812F \ 11622 (BIT_MASK_STBC_CFEND_8812F << BIT_SHIFT_STBC_CFEND_8812F) 11623 #define BIT_CLEAR_STBC_CFEND_8812F(x) ((x) & (~BITS_STBC_CFEND_8812F)) 11624 #define BIT_GET_STBC_CFEND_8812F(x) \ 11625 (((x) >> BIT_SHIFT_STBC_CFEND_8812F) & BIT_MASK_STBC_CFEND_8812F) 11626 #define BIT_SET_STBC_CFEND_8812F(x, v) \ 11627 (BIT_CLEAR_STBC_CFEND_8812F(x) | BIT_STBC_CFEND_8812F(v)) 11628 11629 /* 2 REG_STBC_SETTING2_8812F */ 11630 11631 #define BIT_SHIFT_CDEND_TXTIME_H_8812F 0 11632 #define BIT_MASK_CDEND_TXTIME_H_8812F 0x1f 11633 #define BIT_CDEND_TXTIME_H_8812F(x) \ 11634 (((x) & BIT_MASK_CDEND_TXTIME_H_8812F) \ 11635 << BIT_SHIFT_CDEND_TXTIME_H_8812F) 11636 #define BITS_CDEND_TXTIME_H_8812F \ 11637 (BIT_MASK_CDEND_TXTIME_H_8812F << BIT_SHIFT_CDEND_TXTIME_H_8812F) 11638 #define BIT_CLEAR_CDEND_TXTIME_H_8812F(x) ((x) & (~BITS_CDEND_TXTIME_H_8812F)) 11639 #define BIT_GET_CDEND_TXTIME_H_8812F(x) \ 11640 (((x) >> BIT_SHIFT_CDEND_TXTIME_H_8812F) & \ 11641 BIT_MASK_CDEND_TXTIME_H_8812F) 11642 #define BIT_SET_CDEND_TXTIME_H_8812F(x, v) \ 11643 (BIT_CLEAR_CDEND_TXTIME_H_8812F(x) | BIT_CDEND_TXTIME_H_8812F(v)) 11644 11645 /* 2 REG_QUEUE_CTRL_8812F */ 11646 #define BIT_FORCE_RND_PRI_8812F BIT(6) 11647 #define BIT_PTA_EDCCA_EN_8812F BIT(5) 11648 #define BIT_PTA_WL_TX_EN_8812F BIT(4) 11649 #define BIT_R_USE_DATA_BW_8812F BIT(3) 11650 #define BIT_TRI_PKT_INT_MODE1_8812F BIT(2) 11651 #define BIT_TRI_PKT_INT_MODE0_8812F BIT(1) 11652 #define BIT_ACQ_MODE_SEL_8812F BIT(0) 11653 11654 /* 2 REG_SINGLE_AMPDU_CTRL_8812F */ 11655 #define BIT_EN_SINGLE_APMDU_8812F BIT(7) 11656 11657 #define BIT_SHIFT_SNDTX_MAXTIME_8812F 0 11658 #define BIT_MASK_SNDTX_MAXTIME_8812F 0x7f 11659 #define BIT_SNDTX_MAXTIME_8812F(x) \ 11660 (((x) & BIT_MASK_SNDTX_MAXTIME_8812F) << BIT_SHIFT_SNDTX_MAXTIME_8812F) 11661 #define BITS_SNDTX_MAXTIME_8812F \ 11662 (BIT_MASK_SNDTX_MAXTIME_8812F << BIT_SHIFT_SNDTX_MAXTIME_8812F) 11663 #define BIT_CLEAR_SNDTX_MAXTIME_8812F(x) ((x) & (~BITS_SNDTX_MAXTIME_8812F)) 11664 #define BIT_GET_SNDTX_MAXTIME_8812F(x) \ 11665 (((x) >> BIT_SHIFT_SNDTX_MAXTIME_8812F) & BIT_MASK_SNDTX_MAXTIME_8812F) 11666 #define BIT_SET_SNDTX_MAXTIME_8812F(x, v) \ 11667 (BIT_CLEAR_SNDTX_MAXTIME_8812F(x) | BIT_SNDTX_MAXTIME_8812F(v)) 11668 11669 /* 2 REG_PROT_MODE_CTRL_8812F */ 11670 #define BIT_SND_SIFS_TXDATA_8812F BIT(31) 11671 #define BIT_TX_SND_MATCH_MACID_8812F BIT(30) 11672 11673 #define BIT_SHIFT_RTS_MAX_AGG_NUM_8812F 24 11674 #define BIT_MASK_RTS_MAX_AGG_NUM_8812F 0x3f 11675 #define BIT_RTS_MAX_AGG_NUM_8812F(x) \ 11676 (((x) & BIT_MASK_RTS_MAX_AGG_NUM_8812F) \ 11677 << BIT_SHIFT_RTS_MAX_AGG_NUM_8812F) 11678 #define BITS_RTS_MAX_AGG_NUM_8812F \ 11679 (BIT_MASK_RTS_MAX_AGG_NUM_8812F << BIT_SHIFT_RTS_MAX_AGG_NUM_8812F) 11680 #define BIT_CLEAR_RTS_MAX_AGG_NUM_8812F(x) ((x) & (~BITS_RTS_MAX_AGG_NUM_8812F)) 11681 #define BIT_GET_RTS_MAX_AGG_NUM_8812F(x) \ 11682 (((x) >> BIT_SHIFT_RTS_MAX_AGG_NUM_8812F) & \ 11683 BIT_MASK_RTS_MAX_AGG_NUM_8812F) 11684 #define BIT_SET_RTS_MAX_AGG_NUM_8812F(x, v) \ 11685 (BIT_CLEAR_RTS_MAX_AGG_NUM_8812F(x) | BIT_RTS_MAX_AGG_NUM_8812F(v)) 11686 11687 #define BIT_SHIFT_MAX_AGG_NUM_8812F 16 11688 #define BIT_MASK_MAX_AGG_NUM_8812F 0x3f 11689 #define BIT_MAX_AGG_NUM_8812F(x) \ 11690 (((x) & BIT_MASK_MAX_AGG_NUM_8812F) << BIT_SHIFT_MAX_AGG_NUM_8812F) 11691 #define BITS_MAX_AGG_NUM_8812F \ 11692 (BIT_MASK_MAX_AGG_NUM_8812F << BIT_SHIFT_MAX_AGG_NUM_8812F) 11693 #define BIT_CLEAR_MAX_AGG_NUM_8812F(x) ((x) & (~BITS_MAX_AGG_NUM_8812F)) 11694 #define BIT_GET_MAX_AGG_NUM_8812F(x) \ 11695 (((x) >> BIT_SHIFT_MAX_AGG_NUM_8812F) & BIT_MASK_MAX_AGG_NUM_8812F) 11696 #define BIT_SET_MAX_AGG_NUM_8812F(x, v) \ 11697 (BIT_CLEAR_MAX_AGG_NUM_8812F(x) | BIT_MAX_AGG_NUM_8812F(v)) 11698 11699 #define BIT_SHIFT_RTS_TXTIME_TH_8812F 8 11700 #define BIT_MASK_RTS_TXTIME_TH_8812F 0xff 11701 #define BIT_RTS_TXTIME_TH_8812F(x) \ 11702 (((x) & BIT_MASK_RTS_TXTIME_TH_8812F) << BIT_SHIFT_RTS_TXTIME_TH_8812F) 11703 #define BITS_RTS_TXTIME_TH_8812F \ 11704 (BIT_MASK_RTS_TXTIME_TH_8812F << BIT_SHIFT_RTS_TXTIME_TH_8812F) 11705 #define BIT_CLEAR_RTS_TXTIME_TH_8812F(x) ((x) & (~BITS_RTS_TXTIME_TH_8812F)) 11706 #define BIT_GET_RTS_TXTIME_TH_8812F(x) \ 11707 (((x) >> BIT_SHIFT_RTS_TXTIME_TH_8812F) & BIT_MASK_RTS_TXTIME_TH_8812F) 11708 #define BIT_SET_RTS_TXTIME_TH_8812F(x, v) \ 11709 (BIT_CLEAR_RTS_TXTIME_TH_8812F(x) | BIT_RTS_TXTIME_TH_8812F(v)) 11710 11711 #define BIT_SHIFT_RTS_LEN_TH_8812F 0 11712 #define BIT_MASK_RTS_LEN_TH_8812F 0xff 11713 #define BIT_RTS_LEN_TH_8812F(x) \ 11714 (((x) & BIT_MASK_RTS_LEN_TH_8812F) << BIT_SHIFT_RTS_LEN_TH_8812F) 11715 #define BITS_RTS_LEN_TH_8812F \ 11716 (BIT_MASK_RTS_LEN_TH_8812F << BIT_SHIFT_RTS_LEN_TH_8812F) 11717 #define BIT_CLEAR_RTS_LEN_TH_8812F(x) ((x) & (~BITS_RTS_LEN_TH_8812F)) 11718 #define BIT_GET_RTS_LEN_TH_8812F(x) \ 11719 (((x) >> BIT_SHIFT_RTS_LEN_TH_8812F) & BIT_MASK_RTS_LEN_TH_8812F) 11720 #define BIT_SET_RTS_LEN_TH_8812F(x, v) \ 11721 (BIT_CLEAR_RTS_LEN_TH_8812F(x) | BIT_RTS_LEN_TH_8812F(v)) 11722 11723 /* 2 REG_BAR_MODE_CTRL_8812F */ 11724 11725 #define BIT_SHIFT_BAR_RTY_LMT_8812F 16 11726 #define BIT_MASK_BAR_RTY_LMT_8812F 0x3 11727 #define BIT_BAR_RTY_LMT_8812F(x) \ 11728 (((x) & BIT_MASK_BAR_RTY_LMT_8812F) << BIT_SHIFT_BAR_RTY_LMT_8812F) 11729 #define BITS_BAR_RTY_LMT_8812F \ 11730 (BIT_MASK_BAR_RTY_LMT_8812F << BIT_SHIFT_BAR_RTY_LMT_8812F) 11731 #define BIT_CLEAR_BAR_RTY_LMT_8812F(x) ((x) & (~BITS_BAR_RTY_LMT_8812F)) 11732 #define BIT_GET_BAR_RTY_LMT_8812F(x) \ 11733 (((x) >> BIT_SHIFT_BAR_RTY_LMT_8812F) & BIT_MASK_BAR_RTY_LMT_8812F) 11734 #define BIT_SET_BAR_RTY_LMT_8812F(x, v) \ 11735 (BIT_CLEAR_BAR_RTY_LMT_8812F(x) | BIT_BAR_RTY_LMT_8812F(v)) 11736 11737 #define BIT_SHIFT_BAR_PKT_TXTIME_TH_8812F 8 11738 #define BIT_MASK_BAR_PKT_TXTIME_TH_8812F 0xff 11739 #define BIT_BAR_PKT_TXTIME_TH_8812F(x) \ 11740 (((x) & BIT_MASK_BAR_PKT_TXTIME_TH_8812F) \ 11741 << BIT_SHIFT_BAR_PKT_TXTIME_TH_8812F) 11742 #define BITS_BAR_PKT_TXTIME_TH_8812F \ 11743 (BIT_MASK_BAR_PKT_TXTIME_TH_8812F << BIT_SHIFT_BAR_PKT_TXTIME_TH_8812F) 11744 #define BIT_CLEAR_BAR_PKT_TXTIME_TH_8812F(x) \ 11745 ((x) & (~BITS_BAR_PKT_TXTIME_TH_8812F)) 11746 #define BIT_GET_BAR_PKT_TXTIME_TH_8812F(x) \ 11747 (((x) >> BIT_SHIFT_BAR_PKT_TXTIME_TH_8812F) & \ 11748 BIT_MASK_BAR_PKT_TXTIME_TH_8812F) 11749 #define BIT_SET_BAR_PKT_TXTIME_TH_8812F(x, v) \ 11750 (BIT_CLEAR_BAR_PKT_TXTIME_TH_8812F(x) | BIT_BAR_PKT_TXTIME_TH_8812F(v)) 11751 11752 #define BIT_BAR_EN_V1_8812F BIT(6) 11753 11754 #define BIT_SHIFT_BAR_PKTNUM_TH_V1_8812F 0 11755 #define BIT_MASK_BAR_PKTNUM_TH_V1_8812F 0x3f 11756 #define BIT_BAR_PKTNUM_TH_V1_8812F(x) \ 11757 (((x) & BIT_MASK_BAR_PKTNUM_TH_V1_8812F) \ 11758 << BIT_SHIFT_BAR_PKTNUM_TH_V1_8812F) 11759 #define BITS_BAR_PKTNUM_TH_V1_8812F \ 11760 (BIT_MASK_BAR_PKTNUM_TH_V1_8812F << BIT_SHIFT_BAR_PKTNUM_TH_V1_8812F) 11761 #define BIT_CLEAR_BAR_PKTNUM_TH_V1_8812F(x) \ 11762 ((x) & (~BITS_BAR_PKTNUM_TH_V1_8812F)) 11763 #define BIT_GET_BAR_PKTNUM_TH_V1_8812F(x) \ 11764 (((x) >> BIT_SHIFT_BAR_PKTNUM_TH_V1_8812F) & \ 11765 BIT_MASK_BAR_PKTNUM_TH_V1_8812F) 11766 #define BIT_SET_BAR_PKTNUM_TH_V1_8812F(x, v) \ 11767 (BIT_CLEAR_BAR_PKTNUM_TH_V1_8812F(x) | BIT_BAR_PKTNUM_TH_V1_8812F(v)) 11768 11769 /* 2 REG_RA_TRY_RATE_AGG_LMT_8812F */ 11770 11771 #define BIT_SHIFT_RA_TRY_RATE_AGG_LMT_V1_8812F 0 11772 #define BIT_MASK_RA_TRY_RATE_AGG_LMT_V1_8812F 0x3f 11773 #define BIT_RA_TRY_RATE_AGG_LMT_V1_8812F(x) \ 11774 (((x) & BIT_MASK_RA_TRY_RATE_AGG_LMT_V1_8812F) \ 11775 << BIT_SHIFT_RA_TRY_RATE_AGG_LMT_V1_8812F) 11776 #define BITS_RA_TRY_RATE_AGG_LMT_V1_8812F \ 11777 (BIT_MASK_RA_TRY_RATE_AGG_LMT_V1_8812F \ 11778 << BIT_SHIFT_RA_TRY_RATE_AGG_LMT_V1_8812F) 11779 #define BIT_CLEAR_RA_TRY_RATE_AGG_LMT_V1_8812F(x) \ 11780 ((x) & (~BITS_RA_TRY_RATE_AGG_LMT_V1_8812F)) 11781 #define BIT_GET_RA_TRY_RATE_AGG_LMT_V1_8812F(x) \ 11782 (((x) >> BIT_SHIFT_RA_TRY_RATE_AGG_LMT_V1_8812F) & \ 11783 BIT_MASK_RA_TRY_RATE_AGG_LMT_V1_8812F) 11784 #define BIT_SET_RA_TRY_RATE_AGG_LMT_V1_8812F(x, v) \ 11785 (BIT_CLEAR_RA_TRY_RATE_AGG_LMT_V1_8812F(x) | \ 11786 BIT_RA_TRY_RATE_AGG_LMT_V1_8812F(v)) 11787 11788 /* 2 REG_MACID_SLEEP2_8812F */ 11789 11790 #define BIT_SHIFT_MACID95_64PKTSLEEP_8812F 0 11791 #define BIT_MASK_MACID95_64PKTSLEEP_8812F 0xffffffffL 11792 #define BIT_MACID95_64PKTSLEEP_8812F(x) \ 11793 (((x) & BIT_MASK_MACID95_64PKTSLEEP_8812F) \ 11794 << BIT_SHIFT_MACID95_64PKTSLEEP_8812F) 11795 #define BITS_MACID95_64PKTSLEEP_8812F \ 11796 (BIT_MASK_MACID95_64PKTSLEEP_8812F \ 11797 << BIT_SHIFT_MACID95_64PKTSLEEP_8812F) 11798 #define BIT_CLEAR_MACID95_64PKTSLEEP_8812F(x) \ 11799 ((x) & (~BITS_MACID95_64PKTSLEEP_8812F)) 11800 #define BIT_GET_MACID95_64PKTSLEEP_8812F(x) \ 11801 (((x) >> BIT_SHIFT_MACID95_64PKTSLEEP_8812F) & \ 11802 BIT_MASK_MACID95_64PKTSLEEP_8812F) 11803 #define BIT_SET_MACID95_64PKTSLEEP_8812F(x, v) \ 11804 (BIT_CLEAR_MACID95_64PKTSLEEP_8812F(x) | \ 11805 BIT_MACID95_64PKTSLEEP_8812F(v)) 11806 11807 /* 2 REG_MACID_SLEEP_8812F */ 11808 11809 #define BIT_SHIFT_MACID31_0_PKTSLEEP_8812F 0 11810 #define BIT_MASK_MACID31_0_PKTSLEEP_8812F 0xffffffffL 11811 #define BIT_MACID31_0_PKTSLEEP_8812F(x) \ 11812 (((x) & BIT_MASK_MACID31_0_PKTSLEEP_8812F) \ 11813 << BIT_SHIFT_MACID31_0_PKTSLEEP_8812F) 11814 #define BITS_MACID31_0_PKTSLEEP_8812F \ 11815 (BIT_MASK_MACID31_0_PKTSLEEP_8812F \ 11816 << BIT_SHIFT_MACID31_0_PKTSLEEP_8812F) 11817 #define BIT_CLEAR_MACID31_0_PKTSLEEP_8812F(x) \ 11818 ((x) & (~BITS_MACID31_0_PKTSLEEP_8812F)) 11819 #define BIT_GET_MACID31_0_PKTSLEEP_8812F(x) \ 11820 (((x) >> BIT_SHIFT_MACID31_0_PKTSLEEP_8812F) & \ 11821 BIT_MASK_MACID31_0_PKTSLEEP_8812F) 11822 #define BIT_SET_MACID31_0_PKTSLEEP_8812F(x, v) \ 11823 (BIT_CLEAR_MACID31_0_PKTSLEEP_8812F(x) | \ 11824 BIT_MACID31_0_PKTSLEEP_8812F(v)) 11825 11826 /* 2 REG_HW_SEQ0_8812F */ 11827 11828 #define BIT_SHIFT_HW_SSN_SEQ0_8812F 0 11829 #define BIT_MASK_HW_SSN_SEQ0_8812F 0xfff 11830 #define BIT_HW_SSN_SEQ0_8812F(x) \ 11831 (((x) & BIT_MASK_HW_SSN_SEQ0_8812F) << BIT_SHIFT_HW_SSN_SEQ0_8812F) 11832 #define BITS_HW_SSN_SEQ0_8812F \ 11833 (BIT_MASK_HW_SSN_SEQ0_8812F << BIT_SHIFT_HW_SSN_SEQ0_8812F) 11834 #define BIT_CLEAR_HW_SSN_SEQ0_8812F(x) ((x) & (~BITS_HW_SSN_SEQ0_8812F)) 11835 #define BIT_GET_HW_SSN_SEQ0_8812F(x) \ 11836 (((x) >> BIT_SHIFT_HW_SSN_SEQ0_8812F) & BIT_MASK_HW_SSN_SEQ0_8812F) 11837 #define BIT_SET_HW_SSN_SEQ0_8812F(x, v) \ 11838 (BIT_CLEAR_HW_SSN_SEQ0_8812F(x) | BIT_HW_SSN_SEQ0_8812F(v)) 11839 11840 /* 2 REG_HW_SEQ1_8812F */ 11841 11842 #define BIT_SHIFT_HW_SSN_SEQ1_8812F 0 11843 #define BIT_MASK_HW_SSN_SEQ1_8812F 0xfff 11844 #define BIT_HW_SSN_SEQ1_8812F(x) \ 11845 (((x) & BIT_MASK_HW_SSN_SEQ1_8812F) << BIT_SHIFT_HW_SSN_SEQ1_8812F) 11846 #define BITS_HW_SSN_SEQ1_8812F \ 11847 (BIT_MASK_HW_SSN_SEQ1_8812F << BIT_SHIFT_HW_SSN_SEQ1_8812F) 11848 #define BIT_CLEAR_HW_SSN_SEQ1_8812F(x) ((x) & (~BITS_HW_SSN_SEQ1_8812F)) 11849 #define BIT_GET_HW_SSN_SEQ1_8812F(x) \ 11850 (((x) >> BIT_SHIFT_HW_SSN_SEQ1_8812F) & BIT_MASK_HW_SSN_SEQ1_8812F) 11851 #define BIT_SET_HW_SSN_SEQ1_8812F(x, v) \ 11852 (BIT_CLEAR_HW_SSN_SEQ1_8812F(x) | BIT_HW_SSN_SEQ1_8812F(v)) 11853 11854 /* 2 REG_HW_SEQ2_8812F */ 11855 11856 #define BIT_SHIFT_HW_SSN_SEQ2_8812F 0 11857 #define BIT_MASK_HW_SSN_SEQ2_8812F 0xfff 11858 #define BIT_HW_SSN_SEQ2_8812F(x) \ 11859 (((x) & BIT_MASK_HW_SSN_SEQ2_8812F) << BIT_SHIFT_HW_SSN_SEQ2_8812F) 11860 #define BITS_HW_SSN_SEQ2_8812F \ 11861 (BIT_MASK_HW_SSN_SEQ2_8812F << BIT_SHIFT_HW_SSN_SEQ2_8812F) 11862 #define BIT_CLEAR_HW_SSN_SEQ2_8812F(x) ((x) & (~BITS_HW_SSN_SEQ2_8812F)) 11863 #define BIT_GET_HW_SSN_SEQ2_8812F(x) \ 11864 (((x) >> BIT_SHIFT_HW_SSN_SEQ2_8812F) & BIT_MASK_HW_SSN_SEQ2_8812F) 11865 #define BIT_SET_HW_SSN_SEQ2_8812F(x, v) \ 11866 (BIT_CLEAR_HW_SSN_SEQ2_8812F(x) | BIT_HW_SSN_SEQ2_8812F(v)) 11867 11868 /* 2 REG_HW_SEQ3_8812F */ 11869 11870 #define BIT_SHIFT_CSI_HWSEQ_SEL_8812F 12 11871 #define BIT_MASK_CSI_HWSEQ_SEL_8812F 0x3 11872 #define BIT_CSI_HWSEQ_SEL_8812F(x) \ 11873 (((x) & BIT_MASK_CSI_HWSEQ_SEL_8812F) << BIT_SHIFT_CSI_HWSEQ_SEL_8812F) 11874 #define BITS_CSI_HWSEQ_SEL_8812F \ 11875 (BIT_MASK_CSI_HWSEQ_SEL_8812F << BIT_SHIFT_CSI_HWSEQ_SEL_8812F) 11876 #define BIT_CLEAR_CSI_HWSEQ_SEL_8812F(x) ((x) & (~BITS_CSI_HWSEQ_SEL_8812F)) 11877 #define BIT_GET_CSI_HWSEQ_SEL_8812F(x) \ 11878 (((x) >> BIT_SHIFT_CSI_HWSEQ_SEL_8812F) & BIT_MASK_CSI_HWSEQ_SEL_8812F) 11879 #define BIT_SET_CSI_HWSEQ_SEL_8812F(x, v) \ 11880 (BIT_CLEAR_CSI_HWSEQ_SEL_8812F(x) | BIT_CSI_HWSEQ_SEL_8812F(v)) 11881 11882 #define BIT_SHIFT_HW_SSN_SEQ3_8812F 0 11883 #define BIT_MASK_HW_SSN_SEQ3_8812F 0xfff 11884 #define BIT_HW_SSN_SEQ3_8812F(x) \ 11885 (((x) & BIT_MASK_HW_SSN_SEQ3_8812F) << BIT_SHIFT_HW_SSN_SEQ3_8812F) 11886 #define BITS_HW_SSN_SEQ3_8812F \ 11887 (BIT_MASK_HW_SSN_SEQ3_8812F << BIT_SHIFT_HW_SSN_SEQ3_8812F) 11888 #define BIT_CLEAR_HW_SSN_SEQ3_8812F(x) ((x) & (~BITS_HW_SSN_SEQ3_8812F)) 11889 #define BIT_GET_HW_SSN_SEQ3_8812F(x) \ 11890 (((x) >> BIT_SHIFT_HW_SSN_SEQ3_8812F) & BIT_MASK_HW_SSN_SEQ3_8812F) 11891 #define BIT_SET_HW_SSN_SEQ3_8812F(x, v) \ 11892 (BIT_CLEAR_HW_SSN_SEQ3_8812F(x) | BIT_HW_SSN_SEQ3_8812F(v)) 11893 11894 /* 2 REG_NULL_PKT_STATUS_V1_8812F */ 11895 11896 #define BIT_SHIFT_PTCL_TOTAL_PG_V2_8812F 2 11897 #define BIT_MASK_PTCL_TOTAL_PG_V2_8812F 0x3fff 11898 #define BIT_PTCL_TOTAL_PG_V2_8812F(x) \ 11899 (((x) & BIT_MASK_PTCL_TOTAL_PG_V2_8812F) \ 11900 << BIT_SHIFT_PTCL_TOTAL_PG_V2_8812F) 11901 #define BITS_PTCL_TOTAL_PG_V2_8812F \ 11902 (BIT_MASK_PTCL_TOTAL_PG_V2_8812F << BIT_SHIFT_PTCL_TOTAL_PG_V2_8812F) 11903 #define BIT_CLEAR_PTCL_TOTAL_PG_V2_8812F(x) \ 11904 ((x) & (~BITS_PTCL_TOTAL_PG_V2_8812F)) 11905 #define BIT_GET_PTCL_TOTAL_PG_V2_8812F(x) \ 11906 (((x) >> BIT_SHIFT_PTCL_TOTAL_PG_V2_8812F) & \ 11907 BIT_MASK_PTCL_TOTAL_PG_V2_8812F) 11908 #define BIT_SET_PTCL_TOTAL_PG_V2_8812F(x, v) \ 11909 (BIT_CLEAR_PTCL_TOTAL_PG_V2_8812F(x) | BIT_PTCL_TOTAL_PG_V2_8812F(v)) 11910 11911 #define BIT_TX_NULL_1_8812F BIT(1) 11912 #define BIT_TX_NULL_0_8812F BIT(0) 11913 11914 /* 2 REG_PTCL_ERR_STATUS_8812F */ 11915 #define BIT_PTCL_RATE_TABLE_INVALID_8812F BIT(7) 11916 #define BIT_FTM_T2R_ERROR_8812F BIT(6) 11917 #define BIT_PTCL_ERR0_8812F BIT(5) 11918 #define BIT_PTCL_ERR1_8812F BIT(4) 11919 #define BIT_PTCL_ERR2_8812F BIT(3) 11920 #define BIT_PTCL_ERR3_8812F BIT(2) 11921 #define BIT_PTCL_ERR4_8812F BIT(1) 11922 #define BIT_PTCL_ERR5_8812F BIT(0) 11923 11924 /* 2 REG_NULL_PKT_STATUS_EXTEND_8812F */ 11925 #define BIT_CLI3_TX_NULL_1_8812F BIT(7) 11926 #define BIT_CLI3_TX_NULL_0_8812F BIT(6) 11927 #define BIT_CLI2_TX_NULL_1_8812F BIT(5) 11928 #define BIT_CLI2_TX_NULL_0_8812F BIT(4) 11929 #define BIT_CLI1_TX_NULL_1_8812F BIT(3) 11930 #define BIT_CLI1_TX_NULL_0_8812F BIT(2) 11931 #define BIT_CLI0_TX_NULL_1_8812F BIT(1) 11932 #define BIT_CLI0_TX_NULL_0_8812F BIT(0) 11933 11934 /* 2 REG_HQMGQ_DROP_8812F */ 11935 #define BIT_HIQ_DROP_8812F BIT(7) 11936 #define BIT_MGQ_DROP_8812F BIT(6) 11937 #define BIT_CLR_HGQ_REQ_BLOCK_8812F BIT(5) 11938 11939 /* 2 REG_PRECNT_CTRL_8812F */ 11940 11941 #define BIT_SHIFT_COLLISION_DETECT_TIME_8812F 12 11942 #define BIT_MASK_COLLISION_DETECT_TIME_8812F 0xf 11943 #define BIT_COLLISION_DETECT_TIME_8812F(x) \ 11944 (((x) & BIT_MASK_COLLISION_DETECT_TIME_8812F) \ 11945 << BIT_SHIFT_COLLISION_DETECT_TIME_8812F) 11946 #define BITS_COLLISION_DETECT_TIME_8812F \ 11947 (BIT_MASK_COLLISION_DETECT_TIME_8812F \ 11948 << BIT_SHIFT_COLLISION_DETECT_TIME_8812F) 11949 #define BIT_CLEAR_COLLISION_DETECT_TIME_8812F(x) \ 11950 ((x) & (~BITS_COLLISION_DETECT_TIME_8812F)) 11951 #define BIT_GET_COLLISION_DETECT_TIME_8812F(x) \ 11952 (((x) >> BIT_SHIFT_COLLISION_DETECT_TIME_8812F) & \ 11953 BIT_MASK_COLLISION_DETECT_TIME_8812F) 11954 #define BIT_SET_COLLISION_DETECT_TIME_8812F(x, v) \ 11955 (BIT_CLEAR_COLLISION_DETECT_TIME_8812F(x) | \ 11956 BIT_COLLISION_DETECT_TIME_8812F(v)) 11957 11958 #define BIT_EN_PRECNT_8812F BIT(11) 11959 11960 #define BIT_SHIFT_PRECNT_TH_8812F 0 11961 #define BIT_MASK_PRECNT_TH_8812F 0x7ff 11962 #define BIT_PRECNT_TH_8812F(x) \ 11963 (((x) & BIT_MASK_PRECNT_TH_8812F) << BIT_SHIFT_PRECNT_TH_8812F) 11964 #define BITS_PRECNT_TH_8812F \ 11965 (BIT_MASK_PRECNT_TH_8812F << BIT_SHIFT_PRECNT_TH_8812F) 11966 #define BIT_CLEAR_PRECNT_TH_8812F(x) ((x) & (~BITS_PRECNT_TH_8812F)) 11967 #define BIT_GET_PRECNT_TH_8812F(x) \ 11968 (((x) >> BIT_SHIFT_PRECNT_TH_8812F) & BIT_MASK_PRECNT_TH_8812F) 11969 #define BIT_SET_PRECNT_TH_8812F(x, v) \ 11970 (BIT_CLEAR_PRECNT_TH_8812F(x) | BIT_PRECNT_TH_8812F(v)) 11971 11972 /* 2 REG_NOT_VALID_8812F */ 11973 11974 /* 2 REG_BT_POLLUTE_PKT_CNT_8812F */ 11975 11976 #define BIT_SHIFT_BT_POLLUTE_PKT_CNT_8812F 0 11977 #define BIT_MASK_BT_POLLUTE_PKT_CNT_8812F 0xffff 11978 #define BIT_BT_POLLUTE_PKT_CNT_8812F(x) \ 11979 (((x) & BIT_MASK_BT_POLLUTE_PKT_CNT_8812F) \ 11980 << BIT_SHIFT_BT_POLLUTE_PKT_CNT_8812F) 11981 #define BITS_BT_POLLUTE_PKT_CNT_8812F \ 11982 (BIT_MASK_BT_POLLUTE_PKT_CNT_8812F \ 11983 << BIT_SHIFT_BT_POLLUTE_PKT_CNT_8812F) 11984 #define BIT_CLEAR_BT_POLLUTE_PKT_CNT_8812F(x) \ 11985 ((x) & (~BITS_BT_POLLUTE_PKT_CNT_8812F)) 11986 #define BIT_GET_BT_POLLUTE_PKT_CNT_8812F(x) \ 11987 (((x) >> BIT_SHIFT_BT_POLLUTE_PKT_CNT_8812F) & \ 11988 BIT_MASK_BT_POLLUTE_PKT_CNT_8812F) 11989 #define BIT_SET_BT_POLLUTE_PKT_CNT_8812F(x, v) \ 11990 (BIT_CLEAR_BT_POLLUTE_PKT_CNT_8812F(x) | \ 11991 BIT_BT_POLLUTE_PKT_CNT_8812F(v)) 11992 11993 /* 2 REG_NOT_VALID_8812F */ 11994 11995 /* 2 REG_PTCL_DBG_8812F */ 11996 11997 #define BIT_SHIFT_PTCL_DBG_8812F 0 11998 #define BIT_MASK_PTCL_DBG_8812F 0xffffffffL 11999 #define BIT_PTCL_DBG_8812F(x) \ 12000 (((x) & BIT_MASK_PTCL_DBG_8812F) << BIT_SHIFT_PTCL_DBG_8812F) 12001 #define BITS_PTCL_DBG_8812F \ 12002 (BIT_MASK_PTCL_DBG_8812F << BIT_SHIFT_PTCL_DBG_8812F) 12003 #define BIT_CLEAR_PTCL_DBG_8812F(x) ((x) & (~BITS_PTCL_DBG_8812F)) 12004 #define BIT_GET_PTCL_DBG_8812F(x) \ 12005 (((x) >> BIT_SHIFT_PTCL_DBG_8812F) & BIT_MASK_PTCL_DBG_8812F) 12006 #define BIT_SET_PTCL_DBG_8812F(x, v) \ 12007 (BIT_CLEAR_PTCL_DBG_8812F(x) | BIT_PTCL_DBG_8812F(v)) 12008 12009 /* 2 REG_NOT_VALID_8812F */ 12010 12011 /* 2 REG_CPUMGQ_TIMER_CTRL2_8812F */ 12012 12013 #define BIT_SHIFT_TRI_HEAD_ADDR_8812F 16 12014 #define BIT_MASK_TRI_HEAD_ADDR_8812F 0xfff 12015 #define BIT_TRI_HEAD_ADDR_8812F(x) \ 12016 (((x) & BIT_MASK_TRI_HEAD_ADDR_8812F) << BIT_SHIFT_TRI_HEAD_ADDR_8812F) 12017 #define BITS_TRI_HEAD_ADDR_8812F \ 12018 (BIT_MASK_TRI_HEAD_ADDR_8812F << BIT_SHIFT_TRI_HEAD_ADDR_8812F) 12019 #define BIT_CLEAR_TRI_HEAD_ADDR_8812F(x) ((x) & (~BITS_TRI_HEAD_ADDR_8812F)) 12020 #define BIT_GET_TRI_HEAD_ADDR_8812F(x) \ 12021 (((x) >> BIT_SHIFT_TRI_HEAD_ADDR_8812F) & BIT_MASK_TRI_HEAD_ADDR_8812F) 12022 #define BIT_SET_TRI_HEAD_ADDR_8812F(x, v) \ 12023 (BIT_CLEAR_TRI_HEAD_ADDR_8812F(x) | BIT_TRI_HEAD_ADDR_8812F(v)) 12024 12025 #define BIT_DROP_TH_EN_8812F BIT(8) 12026 12027 #define BIT_SHIFT_DROP_TH_8812F 0 12028 #define BIT_MASK_DROP_TH_8812F 0xff 12029 #define BIT_DROP_TH_8812F(x) \ 12030 (((x) & BIT_MASK_DROP_TH_8812F) << BIT_SHIFT_DROP_TH_8812F) 12031 #define BITS_DROP_TH_8812F (BIT_MASK_DROP_TH_8812F << BIT_SHIFT_DROP_TH_8812F) 12032 #define BIT_CLEAR_DROP_TH_8812F(x) ((x) & (~BITS_DROP_TH_8812F)) 12033 #define BIT_GET_DROP_TH_8812F(x) \ 12034 (((x) >> BIT_SHIFT_DROP_TH_8812F) & BIT_MASK_DROP_TH_8812F) 12035 #define BIT_SET_DROP_TH_8812F(x, v) \ 12036 (BIT_CLEAR_DROP_TH_8812F(x) | BIT_DROP_TH_8812F(v)) 12037 12038 /* 2 REG_NOT_VALID_8812F */ 12039 12040 /* 2 REG_DUMMY_PAGE4_V1_8812F */ 12041 12042 /* 2 REG_MOREDATA_8812F */ 12043 #define BIT_MOREDATA_CTRL2_EN_V1_8812F BIT(3) 12044 #define BIT_MOREDATA_CTRL1_EN_V1_8812F BIT(2) 12045 #define BIT_PKTIN_MOREDATA_REPLACE_ENABLE_V1_8812F BIT(0) 12046 12047 /* 2 REG_Q0_Q1_INFO_8812F */ 12048 #define BIT_QUEUE_MACID_AC_NOT_THE_SAME_8812F BIT(31) 12049 12050 #define BIT_SHIFT_GTAB_ID_8812F 28 12051 #define BIT_MASK_GTAB_ID_8812F 0x7 12052 #define BIT_GTAB_ID_8812F(x) \ 12053 (((x) & BIT_MASK_GTAB_ID_8812F) << BIT_SHIFT_GTAB_ID_8812F) 12054 #define BITS_GTAB_ID_8812F (BIT_MASK_GTAB_ID_8812F << BIT_SHIFT_GTAB_ID_8812F) 12055 #define BIT_CLEAR_GTAB_ID_8812F(x) ((x) & (~BITS_GTAB_ID_8812F)) 12056 #define BIT_GET_GTAB_ID_8812F(x) \ 12057 (((x) >> BIT_SHIFT_GTAB_ID_8812F) & BIT_MASK_GTAB_ID_8812F) 12058 #define BIT_SET_GTAB_ID_8812F(x, v) \ 12059 (BIT_CLEAR_GTAB_ID_8812F(x) | BIT_GTAB_ID_8812F(v)) 12060 12061 #define BIT_SHIFT_AC1_PKT_INFO_8812F 16 12062 #define BIT_MASK_AC1_PKT_INFO_8812F 0xfff 12063 #define BIT_AC1_PKT_INFO_8812F(x) \ 12064 (((x) & BIT_MASK_AC1_PKT_INFO_8812F) << BIT_SHIFT_AC1_PKT_INFO_8812F) 12065 #define BITS_AC1_PKT_INFO_8812F \ 12066 (BIT_MASK_AC1_PKT_INFO_8812F << BIT_SHIFT_AC1_PKT_INFO_8812F) 12067 #define BIT_CLEAR_AC1_PKT_INFO_8812F(x) ((x) & (~BITS_AC1_PKT_INFO_8812F)) 12068 #define BIT_GET_AC1_PKT_INFO_8812F(x) \ 12069 (((x) >> BIT_SHIFT_AC1_PKT_INFO_8812F) & BIT_MASK_AC1_PKT_INFO_8812F) 12070 #define BIT_SET_AC1_PKT_INFO_8812F(x, v) \ 12071 (BIT_CLEAR_AC1_PKT_INFO_8812F(x) | BIT_AC1_PKT_INFO_8812F(v)) 12072 12073 #define BIT_QUEUE_MACID_AC_NOT_THE_SAME_V1_8812F BIT(15) 12074 12075 #define BIT_SHIFT_GTAB_ID_V1_8812F 12 12076 #define BIT_MASK_GTAB_ID_V1_8812F 0x7 12077 #define BIT_GTAB_ID_V1_8812F(x) \ 12078 (((x) & BIT_MASK_GTAB_ID_V1_8812F) << BIT_SHIFT_GTAB_ID_V1_8812F) 12079 #define BITS_GTAB_ID_V1_8812F \ 12080 (BIT_MASK_GTAB_ID_V1_8812F << BIT_SHIFT_GTAB_ID_V1_8812F) 12081 #define BIT_CLEAR_GTAB_ID_V1_8812F(x) ((x) & (~BITS_GTAB_ID_V1_8812F)) 12082 #define BIT_GET_GTAB_ID_V1_8812F(x) \ 12083 (((x) >> BIT_SHIFT_GTAB_ID_V1_8812F) & BIT_MASK_GTAB_ID_V1_8812F) 12084 #define BIT_SET_GTAB_ID_V1_8812F(x, v) \ 12085 (BIT_CLEAR_GTAB_ID_V1_8812F(x) | BIT_GTAB_ID_V1_8812F(v)) 12086 12087 #define BIT_SHIFT_AC0_PKT_INFO_8812F 0 12088 #define BIT_MASK_AC0_PKT_INFO_8812F 0xfff 12089 #define BIT_AC0_PKT_INFO_8812F(x) \ 12090 (((x) & BIT_MASK_AC0_PKT_INFO_8812F) << BIT_SHIFT_AC0_PKT_INFO_8812F) 12091 #define BITS_AC0_PKT_INFO_8812F \ 12092 (BIT_MASK_AC0_PKT_INFO_8812F << BIT_SHIFT_AC0_PKT_INFO_8812F) 12093 #define BIT_CLEAR_AC0_PKT_INFO_8812F(x) ((x) & (~BITS_AC0_PKT_INFO_8812F)) 12094 #define BIT_GET_AC0_PKT_INFO_8812F(x) \ 12095 (((x) >> BIT_SHIFT_AC0_PKT_INFO_8812F) & BIT_MASK_AC0_PKT_INFO_8812F) 12096 #define BIT_SET_AC0_PKT_INFO_8812F(x, v) \ 12097 (BIT_CLEAR_AC0_PKT_INFO_8812F(x) | BIT_AC0_PKT_INFO_8812F(v)) 12098 12099 /* 2 REG_Q2_Q3_INFO_8812F */ 12100 #define BIT_QUEUE_MACID_AC_NOT_THE_SAME_8812F BIT(31) 12101 12102 #define BIT_SHIFT_GTAB_ID_8812F 28 12103 #define BIT_MASK_GTAB_ID_8812F 0x7 12104 #define BIT_GTAB_ID_8812F(x) \ 12105 (((x) & BIT_MASK_GTAB_ID_8812F) << BIT_SHIFT_GTAB_ID_8812F) 12106 #define BITS_GTAB_ID_8812F (BIT_MASK_GTAB_ID_8812F << BIT_SHIFT_GTAB_ID_8812F) 12107 #define BIT_CLEAR_GTAB_ID_8812F(x) ((x) & (~BITS_GTAB_ID_8812F)) 12108 #define BIT_GET_GTAB_ID_8812F(x) \ 12109 (((x) >> BIT_SHIFT_GTAB_ID_8812F) & BIT_MASK_GTAB_ID_8812F) 12110 #define BIT_SET_GTAB_ID_8812F(x, v) \ 12111 (BIT_CLEAR_GTAB_ID_8812F(x) | BIT_GTAB_ID_8812F(v)) 12112 12113 #define BIT_SHIFT_AC3_PKT_INFO_8812F 16 12114 #define BIT_MASK_AC3_PKT_INFO_8812F 0xfff 12115 #define BIT_AC3_PKT_INFO_8812F(x) \ 12116 (((x) & BIT_MASK_AC3_PKT_INFO_8812F) << BIT_SHIFT_AC3_PKT_INFO_8812F) 12117 #define BITS_AC3_PKT_INFO_8812F \ 12118 (BIT_MASK_AC3_PKT_INFO_8812F << BIT_SHIFT_AC3_PKT_INFO_8812F) 12119 #define BIT_CLEAR_AC3_PKT_INFO_8812F(x) ((x) & (~BITS_AC3_PKT_INFO_8812F)) 12120 #define BIT_GET_AC3_PKT_INFO_8812F(x) \ 12121 (((x) >> BIT_SHIFT_AC3_PKT_INFO_8812F) & BIT_MASK_AC3_PKT_INFO_8812F) 12122 #define BIT_SET_AC3_PKT_INFO_8812F(x, v) \ 12123 (BIT_CLEAR_AC3_PKT_INFO_8812F(x) | BIT_AC3_PKT_INFO_8812F(v)) 12124 12125 #define BIT_QUEUE_MACID_AC_NOT_THE_SAME_V1_8812F BIT(15) 12126 12127 #define BIT_SHIFT_GTAB_ID_V1_8812F 12 12128 #define BIT_MASK_GTAB_ID_V1_8812F 0x7 12129 #define BIT_GTAB_ID_V1_8812F(x) \ 12130 (((x) & BIT_MASK_GTAB_ID_V1_8812F) << BIT_SHIFT_GTAB_ID_V1_8812F) 12131 #define BITS_GTAB_ID_V1_8812F \ 12132 (BIT_MASK_GTAB_ID_V1_8812F << BIT_SHIFT_GTAB_ID_V1_8812F) 12133 #define BIT_CLEAR_GTAB_ID_V1_8812F(x) ((x) & (~BITS_GTAB_ID_V1_8812F)) 12134 #define BIT_GET_GTAB_ID_V1_8812F(x) \ 12135 (((x) >> BIT_SHIFT_GTAB_ID_V1_8812F) & BIT_MASK_GTAB_ID_V1_8812F) 12136 #define BIT_SET_GTAB_ID_V1_8812F(x, v) \ 12137 (BIT_CLEAR_GTAB_ID_V1_8812F(x) | BIT_GTAB_ID_V1_8812F(v)) 12138 12139 #define BIT_SHIFT_AC2_PKT_INFO_8812F 0 12140 #define BIT_MASK_AC2_PKT_INFO_8812F 0xfff 12141 #define BIT_AC2_PKT_INFO_8812F(x) \ 12142 (((x) & BIT_MASK_AC2_PKT_INFO_8812F) << BIT_SHIFT_AC2_PKT_INFO_8812F) 12143 #define BITS_AC2_PKT_INFO_8812F \ 12144 (BIT_MASK_AC2_PKT_INFO_8812F << BIT_SHIFT_AC2_PKT_INFO_8812F) 12145 #define BIT_CLEAR_AC2_PKT_INFO_8812F(x) ((x) & (~BITS_AC2_PKT_INFO_8812F)) 12146 #define BIT_GET_AC2_PKT_INFO_8812F(x) \ 12147 (((x) >> BIT_SHIFT_AC2_PKT_INFO_8812F) & BIT_MASK_AC2_PKT_INFO_8812F) 12148 #define BIT_SET_AC2_PKT_INFO_8812F(x, v) \ 12149 (BIT_CLEAR_AC2_PKT_INFO_8812F(x) | BIT_AC2_PKT_INFO_8812F(v)) 12150 12151 /* 2 REG_Q4_Q5_INFO_8812F */ 12152 #define BIT_QUEUE_MACID_AC_NOT_THE_SAME_8812F BIT(31) 12153 12154 #define BIT_SHIFT_GTAB_ID_8812F 28 12155 #define BIT_MASK_GTAB_ID_8812F 0x7 12156 #define BIT_GTAB_ID_8812F(x) \ 12157 (((x) & BIT_MASK_GTAB_ID_8812F) << BIT_SHIFT_GTAB_ID_8812F) 12158 #define BITS_GTAB_ID_8812F (BIT_MASK_GTAB_ID_8812F << BIT_SHIFT_GTAB_ID_8812F) 12159 #define BIT_CLEAR_GTAB_ID_8812F(x) ((x) & (~BITS_GTAB_ID_8812F)) 12160 #define BIT_GET_GTAB_ID_8812F(x) \ 12161 (((x) >> BIT_SHIFT_GTAB_ID_8812F) & BIT_MASK_GTAB_ID_8812F) 12162 #define BIT_SET_GTAB_ID_8812F(x, v) \ 12163 (BIT_CLEAR_GTAB_ID_8812F(x) | BIT_GTAB_ID_8812F(v)) 12164 12165 #define BIT_SHIFT_AC5_PKT_INFO_8812F 16 12166 #define BIT_MASK_AC5_PKT_INFO_8812F 0xfff 12167 #define BIT_AC5_PKT_INFO_8812F(x) \ 12168 (((x) & BIT_MASK_AC5_PKT_INFO_8812F) << BIT_SHIFT_AC5_PKT_INFO_8812F) 12169 #define BITS_AC5_PKT_INFO_8812F \ 12170 (BIT_MASK_AC5_PKT_INFO_8812F << BIT_SHIFT_AC5_PKT_INFO_8812F) 12171 #define BIT_CLEAR_AC5_PKT_INFO_8812F(x) ((x) & (~BITS_AC5_PKT_INFO_8812F)) 12172 #define BIT_GET_AC5_PKT_INFO_8812F(x) \ 12173 (((x) >> BIT_SHIFT_AC5_PKT_INFO_8812F) & BIT_MASK_AC5_PKT_INFO_8812F) 12174 #define BIT_SET_AC5_PKT_INFO_8812F(x, v) \ 12175 (BIT_CLEAR_AC5_PKT_INFO_8812F(x) | BIT_AC5_PKT_INFO_8812F(v)) 12176 12177 #define BIT_QUEUE_MACID_AC_NOT_THE_SAME_V1_8812F BIT(15) 12178 12179 #define BIT_SHIFT_GTAB_ID_V1_8812F 12 12180 #define BIT_MASK_GTAB_ID_V1_8812F 0x7 12181 #define BIT_GTAB_ID_V1_8812F(x) \ 12182 (((x) & BIT_MASK_GTAB_ID_V1_8812F) << BIT_SHIFT_GTAB_ID_V1_8812F) 12183 #define BITS_GTAB_ID_V1_8812F \ 12184 (BIT_MASK_GTAB_ID_V1_8812F << BIT_SHIFT_GTAB_ID_V1_8812F) 12185 #define BIT_CLEAR_GTAB_ID_V1_8812F(x) ((x) & (~BITS_GTAB_ID_V1_8812F)) 12186 #define BIT_GET_GTAB_ID_V1_8812F(x) \ 12187 (((x) >> BIT_SHIFT_GTAB_ID_V1_8812F) & BIT_MASK_GTAB_ID_V1_8812F) 12188 #define BIT_SET_GTAB_ID_V1_8812F(x, v) \ 12189 (BIT_CLEAR_GTAB_ID_V1_8812F(x) | BIT_GTAB_ID_V1_8812F(v)) 12190 12191 #define BIT_SHIFT_AC4_PKT_INFO_8812F 0 12192 #define BIT_MASK_AC4_PKT_INFO_8812F 0xfff 12193 #define BIT_AC4_PKT_INFO_8812F(x) \ 12194 (((x) & BIT_MASK_AC4_PKT_INFO_8812F) << BIT_SHIFT_AC4_PKT_INFO_8812F) 12195 #define BITS_AC4_PKT_INFO_8812F \ 12196 (BIT_MASK_AC4_PKT_INFO_8812F << BIT_SHIFT_AC4_PKT_INFO_8812F) 12197 #define BIT_CLEAR_AC4_PKT_INFO_8812F(x) ((x) & (~BITS_AC4_PKT_INFO_8812F)) 12198 #define BIT_GET_AC4_PKT_INFO_8812F(x) \ 12199 (((x) >> BIT_SHIFT_AC4_PKT_INFO_8812F) & BIT_MASK_AC4_PKT_INFO_8812F) 12200 #define BIT_SET_AC4_PKT_INFO_8812F(x, v) \ 12201 (BIT_CLEAR_AC4_PKT_INFO_8812F(x) | BIT_AC4_PKT_INFO_8812F(v)) 12202 12203 /* 2 REG_Q6_Q7_INFO_8812F */ 12204 #define BIT_QUEUE_MACID_AC_NOT_THE_SAME_8812F BIT(31) 12205 12206 #define BIT_SHIFT_GTAB_ID_8812F 28 12207 #define BIT_MASK_GTAB_ID_8812F 0x7 12208 #define BIT_GTAB_ID_8812F(x) \ 12209 (((x) & BIT_MASK_GTAB_ID_8812F) << BIT_SHIFT_GTAB_ID_8812F) 12210 #define BITS_GTAB_ID_8812F (BIT_MASK_GTAB_ID_8812F << BIT_SHIFT_GTAB_ID_8812F) 12211 #define BIT_CLEAR_GTAB_ID_8812F(x) ((x) & (~BITS_GTAB_ID_8812F)) 12212 #define BIT_GET_GTAB_ID_8812F(x) \ 12213 (((x) >> BIT_SHIFT_GTAB_ID_8812F) & BIT_MASK_GTAB_ID_8812F) 12214 #define BIT_SET_GTAB_ID_8812F(x, v) \ 12215 (BIT_CLEAR_GTAB_ID_8812F(x) | BIT_GTAB_ID_8812F(v)) 12216 12217 #define BIT_SHIFT_AC7_PKT_INFO_8812F 16 12218 #define BIT_MASK_AC7_PKT_INFO_8812F 0xfff 12219 #define BIT_AC7_PKT_INFO_8812F(x) \ 12220 (((x) & BIT_MASK_AC7_PKT_INFO_8812F) << BIT_SHIFT_AC7_PKT_INFO_8812F) 12221 #define BITS_AC7_PKT_INFO_8812F \ 12222 (BIT_MASK_AC7_PKT_INFO_8812F << BIT_SHIFT_AC7_PKT_INFO_8812F) 12223 #define BIT_CLEAR_AC7_PKT_INFO_8812F(x) ((x) & (~BITS_AC7_PKT_INFO_8812F)) 12224 #define BIT_GET_AC7_PKT_INFO_8812F(x) \ 12225 (((x) >> BIT_SHIFT_AC7_PKT_INFO_8812F) & BIT_MASK_AC7_PKT_INFO_8812F) 12226 #define BIT_SET_AC7_PKT_INFO_8812F(x, v) \ 12227 (BIT_CLEAR_AC7_PKT_INFO_8812F(x) | BIT_AC7_PKT_INFO_8812F(v)) 12228 12229 #define BIT_QUEUE_MACID_AC_NOT_THE_SAME_V1_8812F BIT(15) 12230 12231 #define BIT_SHIFT_GTAB_ID_V1_8812F 12 12232 #define BIT_MASK_GTAB_ID_V1_8812F 0x7 12233 #define BIT_GTAB_ID_V1_8812F(x) \ 12234 (((x) & BIT_MASK_GTAB_ID_V1_8812F) << BIT_SHIFT_GTAB_ID_V1_8812F) 12235 #define BITS_GTAB_ID_V1_8812F \ 12236 (BIT_MASK_GTAB_ID_V1_8812F << BIT_SHIFT_GTAB_ID_V1_8812F) 12237 #define BIT_CLEAR_GTAB_ID_V1_8812F(x) ((x) & (~BITS_GTAB_ID_V1_8812F)) 12238 #define BIT_GET_GTAB_ID_V1_8812F(x) \ 12239 (((x) >> BIT_SHIFT_GTAB_ID_V1_8812F) & BIT_MASK_GTAB_ID_V1_8812F) 12240 #define BIT_SET_GTAB_ID_V1_8812F(x, v) \ 12241 (BIT_CLEAR_GTAB_ID_V1_8812F(x) | BIT_GTAB_ID_V1_8812F(v)) 12242 12243 #define BIT_SHIFT_AC6_PKT_INFO_8812F 0 12244 #define BIT_MASK_AC6_PKT_INFO_8812F 0xfff 12245 #define BIT_AC6_PKT_INFO_8812F(x) \ 12246 (((x) & BIT_MASK_AC6_PKT_INFO_8812F) << BIT_SHIFT_AC6_PKT_INFO_8812F) 12247 #define BITS_AC6_PKT_INFO_8812F \ 12248 (BIT_MASK_AC6_PKT_INFO_8812F << BIT_SHIFT_AC6_PKT_INFO_8812F) 12249 #define BIT_CLEAR_AC6_PKT_INFO_8812F(x) ((x) & (~BITS_AC6_PKT_INFO_8812F)) 12250 #define BIT_GET_AC6_PKT_INFO_8812F(x) \ 12251 (((x) >> BIT_SHIFT_AC6_PKT_INFO_8812F) & BIT_MASK_AC6_PKT_INFO_8812F) 12252 #define BIT_SET_AC6_PKT_INFO_8812F(x, v) \ 12253 (BIT_CLEAR_AC6_PKT_INFO_8812F(x) | BIT_AC6_PKT_INFO_8812F(v)) 12254 12255 /* 2 REG_MGQ_HIQ_INFO_8812F */ 12256 12257 #define BIT_SHIFT_HIQ_PKT_INFO_8812F 16 12258 #define BIT_MASK_HIQ_PKT_INFO_8812F 0xfff 12259 #define BIT_HIQ_PKT_INFO_8812F(x) \ 12260 (((x) & BIT_MASK_HIQ_PKT_INFO_8812F) << BIT_SHIFT_HIQ_PKT_INFO_8812F) 12261 #define BITS_HIQ_PKT_INFO_8812F \ 12262 (BIT_MASK_HIQ_PKT_INFO_8812F << BIT_SHIFT_HIQ_PKT_INFO_8812F) 12263 #define BIT_CLEAR_HIQ_PKT_INFO_8812F(x) ((x) & (~BITS_HIQ_PKT_INFO_8812F)) 12264 #define BIT_GET_HIQ_PKT_INFO_8812F(x) \ 12265 (((x) >> BIT_SHIFT_HIQ_PKT_INFO_8812F) & BIT_MASK_HIQ_PKT_INFO_8812F) 12266 #define BIT_SET_HIQ_PKT_INFO_8812F(x, v) \ 12267 (BIT_CLEAR_HIQ_PKT_INFO_8812F(x) | BIT_HIQ_PKT_INFO_8812F(v)) 12268 12269 #define BIT_SHIFT_MGQ_PKT_INFO_8812F 0 12270 #define BIT_MASK_MGQ_PKT_INFO_8812F 0xfff 12271 #define BIT_MGQ_PKT_INFO_8812F(x) \ 12272 (((x) & BIT_MASK_MGQ_PKT_INFO_8812F) << BIT_SHIFT_MGQ_PKT_INFO_8812F) 12273 #define BITS_MGQ_PKT_INFO_8812F \ 12274 (BIT_MASK_MGQ_PKT_INFO_8812F << BIT_SHIFT_MGQ_PKT_INFO_8812F) 12275 #define BIT_CLEAR_MGQ_PKT_INFO_8812F(x) ((x) & (~BITS_MGQ_PKT_INFO_8812F)) 12276 #define BIT_GET_MGQ_PKT_INFO_8812F(x) \ 12277 (((x) >> BIT_SHIFT_MGQ_PKT_INFO_8812F) & BIT_MASK_MGQ_PKT_INFO_8812F) 12278 #define BIT_SET_MGQ_PKT_INFO_8812F(x, v) \ 12279 (BIT_CLEAR_MGQ_PKT_INFO_8812F(x) | BIT_MGQ_PKT_INFO_8812F(v)) 12280 12281 /* 2 REG_CMDQ_BCNQ_INFO_8812F */ 12282 12283 #define BIT_SHIFT_CMDQ_PKT_INFO_8812F 16 12284 #define BIT_MASK_CMDQ_PKT_INFO_8812F 0xfff 12285 #define BIT_CMDQ_PKT_INFO_8812F(x) \ 12286 (((x) & BIT_MASK_CMDQ_PKT_INFO_8812F) << BIT_SHIFT_CMDQ_PKT_INFO_8812F) 12287 #define BITS_CMDQ_PKT_INFO_8812F \ 12288 (BIT_MASK_CMDQ_PKT_INFO_8812F << BIT_SHIFT_CMDQ_PKT_INFO_8812F) 12289 #define BIT_CLEAR_CMDQ_PKT_INFO_8812F(x) ((x) & (~BITS_CMDQ_PKT_INFO_8812F)) 12290 #define BIT_GET_CMDQ_PKT_INFO_8812F(x) \ 12291 (((x) >> BIT_SHIFT_CMDQ_PKT_INFO_8812F) & BIT_MASK_CMDQ_PKT_INFO_8812F) 12292 #define BIT_SET_CMDQ_PKT_INFO_8812F(x, v) \ 12293 (BIT_CLEAR_CMDQ_PKT_INFO_8812F(x) | BIT_CMDQ_PKT_INFO_8812F(v)) 12294 12295 #define BIT_SHIFT_BCNQ_PKT_INFO_8812F 0 12296 #define BIT_MASK_BCNQ_PKT_INFO_8812F 0xfff 12297 #define BIT_BCNQ_PKT_INFO_8812F(x) \ 12298 (((x) & BIT_MASK_BCNQ_PKT_INFO_8812F) << BIT_SHIFT_BCNQ_PKT_INFO_8812F) 12299 #define BITS_BCNQ_PKT_INFO_8812F \ 12300 (BIT_MASK_BCNQ_PKT_INFO_8812F << BIT_SHIFT_BCNQ_PKT_INFO_8812F) 12301 #define BIT_CLEAR_BCNQ_PKT_INFO_8812F(x) ((x) & (~BITS_BCNQ_PKT_INFO_8812F)) 12302 #define BIT_GET_BCNQ_PKT_INFO_8812F(x) \ 12303 (((x) >> BIT_SHIFT_BCNQ_PKT_INFO_8812F) & BIT_MASK_BCNQ_PKT_INFO_8812F) 12304 #define BIT_SET_BCNQ_PKT_INFO_8812F(x, v) \ 12305 (BIT_CLEAR_BCNQ_PKT_INFO_8812F(x) | BIT_BCNQ_PKT_INFO_8812F(v)) 12306 12307 /* 2 REG_LOOPBACK_OPTION_8812F */ 12308 #define BIT_LOOPACK_FAST_EDCA_EN_8812F BIT(24) 12309 12310 /* 2 REG_AESIV_SETTING_8812F */ 12311 12312 #define BIT_SHIFT_AESIV_OFFSET_8812F 0 12313 #define BIT_MASK_AESIV_OFFSET_8812F 0xfff 12314 #define BIT_AESIV_OFFSET_8812F(x) \ 12315 (((x) & BIT_MASK_AESIV_OFFSET_8812F) << BIT_SHIFT_AESIV_OFFSET_8812F) 12316 #define BITS_AESIV_OFFSET_8812F \ 12317 (BIT_MASK_AESIV_OFFSET_8812F << BIT_SHIFT_AESIV_OFFSET_8812F) 12318 #define BIT_CLEAR_AESIV_OFFSET_8812F(x) ((x) & (~BITS_AESIV_OFFSET_8812F)) 12319 #define BIT_GET_AESIV_OFFSET_8812F(x) \ 12320 (((x) >> BIT_SHIFT_AESIV_OFFSET_8812F) & BIT_MASK_AESIV_OFFSET_8812F) 12321 #define BIT_SET_AESIV_OFFSET_8812F(x, v) \ 12322 (BIT_CLEAR_AESIV_OFFSET_8812F(x) | BIT_AESIV_OFFSET_8812F(v)) 12323 12324 /* 2 REG_BF0_TIME_SETTING_8812F */ 12325 #define BIT_BF0_TIMER_SET_8812F BIT(31) 12326 #define BIT_BF0_TIMER_CLR_8812F BIT(30) 12327 #define BIT_BF0_UPDATE_EN_8812F BIT(29) 12328 #define BIT_BF0_TIMER_EN_8812F BIT(28) 12329 12330 #define BIT_SHIFT_BF0_PRETIME_OVER_8812F 16 12331 #define BIT_MASK_BF0_PRETIME_OVER_8812F 0xfff 12332 #define BIT_BF0_PRETIME_OVER_8812F(x) \ 12333 (((x) & BIT_MASK_BF0_PRETIME_OVER_8812F) \ 12334 << BIT_SHIFT_BF0_PRETIME_OVER_8812F) 12335 #define BITS_BF0_PRETIME_OVER_8812F \ 12336 (BIT_MASK_BF0_PRETIME_OVER_8812F << BIT_SHIFT_BF0_PRETIME_OVER_8812F) 12337 #define BIT_CLEAR_BF0_PRETIME_OVER_8812F(x) \ 12338 ((x) & (~BITS_BF0_PRETIME_OVER_8812F)) 12339 #define BIT_GET_BF0_PRETIME_OVER_8812F(x) \ 12340 (((x) >> BIT_SHIFT_BF0_PRETIME_OVER_8812F) & \ 12341 BIT_MASK_BF0_PRETIME_OVER_8812F) 12342 #define BIT_SET_BF0_PRETIME_OVER_8812F(x, v) \ 12343 (BIT_CLEAR_BF0_PRETIME_OVER_8812F(x) | BIT_BF0_PRETIME_OVER_8812F(v)) 12344 12345 #define BIT_SHIFT_BF0_LIFETIME_8812F 0 12346 #define BIT_MASK_BF0_LIFETIME_8812F 0xffff 12347 #define BIT_BF0_LIFETIME_8812F(x) \ 12348 (((x) & BIT_MASK_BF0_LIFETIME_8812F) << BIT_SHIFT_BF0_LIFETIME_8812F) 12349 #define BITS_BF0_LIFETIME_8812F \ 12350 (BIT_MASK_BF0_LIFETIME_8812F << BIT_SHIFT_BF0_LIFETIME_8812F) 12351 #define BIT_CLEAR_BF0_LIFETIME_8812F(x) ((x) & (~BITS_BF0_LIFETIME_8812F)) 12352 #define BIT_GET_BF0_LIFETIME_8812F(x) \ 12353 (((x) >> BIT_SHIFT_BF0_LIFETIME_8812F) & BIT_MASK_BF0_LIFETIME_8812F) 12354 #define BIT_SET_BF0_LIFETIME_8812F(x, v) \ 12355 (BIT_CLEAR_BF0_LIFETIME_8812F(x) | BIT_BF0_LIFETIME_8812F(v)) 12356 12357 /* 2 REG_BF1_TIME_SETTING_8812F */ 12358 #define BIT_BF1_TIMER_SET_8812F BIT(31) 12359 #define BIT_BF1_TIMER_CLR_8812F BIT(30) 12360 #define BIT_BF1_UPDATE_EN_8812F BIT(29) 12361 #define BIT_BF1_TIMER_EN_8812F BIT(28) 12362 12363 #define BIT_SHIFT_BF1_PRETIME_OVER_8812F 16 12364 #define BIT_MASK_BF1_PRETIME_OVER_8812F 0xfff 12365 #define BIT_BF1_PRETIME_OVER_8812F(x) \ 12366 (((x) & BIT_MASK_BF1_PRETIME_OVER_8812F) \ 12367 << BIT_SHIFT_BF1_PRETIME_OVER_8812F) 12368 #define BITS_BF1_PRETIME_OVER_8812F \ 12369 (BIT_MASK_BF1_PRETIME_OVER_8812F << BIT_SHIFT_BF1_PRETIME_OVER_8812F) 12370 #define BIT_CLEAR_BF1_PRETIME_OVER_8812F(x) \ 12371 ((x) & (~BITS_BF1_PRETIME_OVER_8812F)) 12372 #define BIT_GET_BF1_PRETIME_OVER_8812F(x) \ 12373 (((x) >> BIT_SHIFT_BF1_PRETIME_OVER_8812F) & \ 12374 BIT_MASK_BF1_PRETIME_OVER_8812F) 12375 #define BIT_SET_BF1_PRETIME_OVER_8812F(x, v) \ 12376 (BIT_CLEAR_BF1_PRETIME_OVER_8812F(x) | BIT_BF1_PRETIME_OVER_8812F(v)) 12377 12378 #define BIT_SHIFT_BF1_LIFETIME_8812F 0 12379 #define BIT_MASK_BF1_LIFETIME_8812F 0xffff 12380 #define BIT_BF1_LIFETIME_8812F(x) \ 12381 (((x) & BIT_MASK_BF1_LIFETIME_8812F) << BIT_SHIFT_BF1_LIFETIME_8812F) 12382 #define BITS_BF1_LIFETIME_8812F \ 12383 (BIT_MASK_BF1_LIFETIME_8812F << BIT_SHIFT_BF1_LIFETIME_8812F) 12384 #define BIT_CLEAR_BF1_LIFETIME_8812F(x) ((x) & (~BITS_BF1_LIFETIME_8812F)) 12385 #define BIT_GET_BF1_LIFETIME_8812F(x) \ 12386 (((x) >> BIT_SHIFT_BF1_LIFETIME_8812F) & BIT_MASK_BF1_LIFETIME_8812F) 12387 #define BIT_SET_BF1_LIFETIME_8812F(x, v) \ 12388 (BIT_CLEAR_BF1_LIFETIME_8812F(x) | BIT_BF1_LIFETIME_8812F(v)) 12389 12390 /* 2 REG_BF_TIMEOUT_EN_8812F */ 12391 #define BIT_EN_VHT_LDPC_8812F BIT(9) 12392 #define BIT_EN_HT_LDPC_8812F BIT(8) 12393 #define BIT_BF1_TIMEOUT_EN_8812F BIT(1) 12394 #define BIT_BF0_TIMEOUT_EN_8812F BIT(0) 12395 12396 /* 2 REG_MACID_RELEASE0_8812F */ 12397 12398 #define BIT_SHIFT_MACID31_0_RELEASE_8812F 0 12399 #define BIT_MASK_MACID31_0_RELEASE_8812F 0xffffffffL 12400 #define BIT_MACID31_0_RELEASE_8812F(x) \ 12401 (((x) & BIT_MASK_MACID31_0_RELEASE_8812F) \ 12402 << BIT_SHIFT_MACID31_0_RELEASE_8812F) 12403 #define BITS_MACID31_0_RELEASE_8812F \ 12404 (BIT_MASK_MACID31_0_RELEASE_8812F << BIT_SHIFT_MACID31_0_RELEASE_8812F) 12405 #define BIT_CLEAR_MACID31_0_RELEASE_8812F(x) \ 12406 ((x) & (~BITS_MACID31_0_RELEASE_8812F)) 12407 #define BIT_GET_MACID31_0_RELEASE_8812F(x) \ 12408 (((x) >> BIT_SHIFT_MACID31_0_RELEASE_8812F) & \ 12409 BIT_MASK_MACID31_0_RELEASE_8812F) 12410 #define BIT_SET_MACID31_0_RELEASE_8812F(x, v) \ 12411 (BIT_CLEAR_MACID31_0_RELEASE_8812F(x) | BIT_MACID31_0_RELEASE_8812F(v)) 12412 12413 /* 2 REG_MACID_RELEASE1_8812F */ 12414 12415 #define BIT_SHIFT_MACID63_32_RELEASE_8812F 0 12416 #define BIT_MASK_MACID63_32_RELEASE_8812F 0xffffffffL 12417 #define BIT_MACID63_32_RELEASE_8812F(x) \ 12418 (((x) & BIT_MASK_MACID63_32_RELEASE_8812F) \ 12419 << BIT_SHIFT_MACID63_32_RELEASE_8812F) 12420 #define BITS_MACID63_32_RELEASE_8812F \ 12421 (BIT_MASK_MACID63_32_RELEASE_8812F \ 12422 << BIT_SHIFT_MACID63_32_RELEASE_8812F) 12423 #define BIT_CLEAR_MACID63_32_RELEASE_8812F(x) \ 12424 ((x) & (~BITS_MACID63_32_RELEASE_8812F)) 12425 #define BIT_GET_MACID63_32_RELEASE_8812F(x) \ 12426 (((x) >> BIT_SHIFT_MACID63_32_RELEASE_8812F) & \ 12427 BIT_MASK_MACID63_32_RELEASE_8812F) 12428 #define BIT_SET_MACID63_32_RELEASE_8812F(x, v) \ 12429 (BIT_CLEAR_MACID63_32_RELEASE_8812F(x) | \ 12430 BIT_MACID63_32_RELEASE_8812F(v)) 12431 12432 /* 2 REG_MACID_RELEASE2_8812F */ 12433 12434 #define BIT_SHIFT_MACID95_64_RELEASE_8812F 0 12435 #define BIT_MASK_MACID95_64_RELEASE_8812F 0xffffffffL 12436 #define BIT_MACID95_64_RELEASE_8812F(x) \ 12437 (((x) & BIT_MASK_MACID95_64_RELEASE_8812F) \ 12438 << BIT_SHIFT_MACID95_64_RELEASE_8812F) 12439 #define BITS_MACID95_64_RELEASE_8812F \ 12440 (BIT_MASK_MACID95_64_RELEASE_8812F \ 12441 << BIT_SHIFT_MACID95_64_RELEASE_8812F) 12442 #define BIT_CLEAR_MACID95_64_RELEASE_8812F(x) \ 12443 ((x) & (~BITS_MACID95_64_RELEASE_8812F)) 12444 #define BIT_GET_MACID95_64_RELEASE_8812F(x) \ 12445 (((x) >> BIT_SHIFT_MACID95_64_RELEASE_8812F) & \ 12446 BIT_MASK_MACID95_64_RELEASE_8812F) 12447 #define BIT_SET_MACID95_64_RELEASE_8812F(x, v) \ 12448 (BIT_CLEAR_MACID95_64_RELEASE_8812F(x) | \ 12449 BIT_MACID95_64_RELEASE_8812F(v)) 12450 12451 /* 2 REG_MACID_RELEASE3_8812F */ 12452 12453 #define BIT_SHIFT_MACID127_96_RELEASE_8812F 0 12454 #define BIT_MASK_MACID127_96_RELEASE_8812F 0xffffffffL 12455 #define BIT_MACID127_96_RELEASE_8812F(x) \ 12456 (((x) & BIT_MASK_MACID127_96_RELEASE_8812F) \ 12457 << BIT_SHIFT_MACID127_96_RELEASE_8812F) 12458 #define BITS_MACID127_96_RELEASE_8812F \ 12459 (BIT_MASK_MACID127_96_RELEASE_8812F \ 12460 << BIT_SHIFT_MACID127_96_RELEASE_8812F) 12461 #define BIT_CLEAR_MACID127_96_RELEASE_8812F(x) \ 12462 ((x) & (~BITS_MACID127_96_RELEASE_8812F)) 12463 #define BIT_GET_MACID127_96_RELEASE_8812F(x) \ 12464 (((x) >> BIT_SHIFT_MACID127_96_RELEASE_8812F) & \ 12465 BIT_MASK_MACID127_96_RELEASE_8812F) 12466 #define BIT_SET_MACID127_96_RELEASE_8812F(x, v) \ 12467 (BIT_CLEAR_MACID127_96_RELEASE_8812F(x) | \ 12468 BIT_MACID127_96_RELEASE_8812F(v)) 12469 12470 /* 2 REG_MACID_RELEASE_SETTING_8812F */ 12471 #define BIT_MACID_VALUE_8812F BIT(7) 12472 12473 #define BIT_SHIFT_MACID_OFFSET_8812F 0 12474 #define BIT_MASK_MACID_OFFSET_8812F 0x7f 12475 #define BIT_MACID_OFFSET_8812F(x) \ 12476 (((x) & BIT_MASK_MACID_OFFSET_8812F) << BIT_SHIFT_MACID_OFFSET_8812F) 12477 #define BITS_MACID_OFFSET_8812F \ 12478 (BIT_MASK_MACID_OFFSET_8812F << BIT_SHIFT_MACID_OFFSET_8812F) 12479 #define BIT_CLEAR_MACID_OFFSET_8812F(x) ((x) & (~BITS_MACID_OFFSET_8812F)) 12480 #define BIT_GET_MACID_OFFSET_8812F(x) \ 12481 (((x) >> BIT_SHIFT_MACID_OFFSET_8812F) & BIT_MASK_MACID_OFFSET_8812F) 12482 #define BIT_SET_MACID_OFFSET_8812F(x, v) \ 12483 (BIT_CLEAR_MACID_OFFSET_8812F(x) | BIT_MACID_OFFSET_8812F(v)) 12484 12485 /* 2 REG_FAST_EDCA_VOVI_SETTING_8812F */ 12486 12487 #define BIT_SHIFT_VI_FAST_EDCA_TO_8812F 24 12488 #define BIT_MASK_VI_FAST_EDCA_TO_8812F 0xff 12489 #define BIT_VI_FAST_EDCA_TO_8812F(x) \ 12490 (((x) & BIT_MASK_VI_FAST_EDCA_TO_8812F) \ 12491 << BIT_SHIFT_VI_FAST_EDCA_TO_8812F) 12492 #define BITS_VI_FAST_EDCA_TO_8812F \ 12493 (BIT_MASK_VI_FAST_EDCA_TO_8812F << BIT_SHIFT_VI_FAST_EDCA_TO_8812F) 12494 #define BIT_CLEAR_VI_FAST_EDCA_TO_8812F(x) ((x) & (~BITS_VI_FAST_EDCA_TO_8812F)) 12495 #define BIT_GET_VI_FAST_EDCA_TO_8812F(x) \ 12496 (((x) >> BIT_SHIFT_VI_FAST_EDCA_TO_8812F) & \ 12497 BIT_MASK_VI_FAST_EDCA_TO_8812F) 12498 #define BIT_SET_VI_FAST_EDCA_TO_8812F(x, v) \ 12499 (BIT_CLEAR_VI_FAST_EDCA_TO_8812F(x) | BIT_VI_FAST_EDCA_TO_8812F(v)) 12500 12501 #define BIT_VI_THRESHOLD_SEL_8812F BIT(23) 12502 12503 #define BIT_SHIFT_VI_FAST_EDCA_PKT_TH_8812F 16 12504 #define BIT_MASK_VI_FAST_EDCA_PKT_TH_8812F 0x7f 12505 #define BIT_VI_FAST_EDCA_PKT_TH_8812F(x) \ 12506 (((x) & BIT_MASK_VI_FAST_EDCA_PKT_TH_8812F) \ 12507 << BIT_SHIFT_VI_FAST_EDCA_PKT_TH_8812F) 12508 #define BITS_VI_FAST_EDCA_PKT_TH_8812F \ 12509 (BIT_MASK_VI_FAST_EDCA_PKT_TH_8812F \ 12510 << BIT_SHIFT_VI_FAST_EDCA_PKT_TH_8812F) 12511 #define BIT_CLEAR_VI_FAST_EDCA_PKT_TH_8812F(x) \ 12512 ((x) & (~BITS_VI_FAST_EDCA_PKT_TH_8812F)) 12513 #define BIT_GET_VI_FAST_EDCA_PKT_TH_8812F(x) \ 12514 (((x) >> BIT_SHIFT_VI_FAST_EDCA_PKT_TH_8812F) & \ 12515 BIT_MASK_VI_FAST_EDCA_PKT_TH_8812F) 12516 #define BIT_SET_VI_FAST_EDCA_PKT_TH_8812F(x, v) \ 12517 (BIT_CLEAR_VI_FAST_EDCA_PKT_TH_8812F(x) | \ 12518 BIT_VI_FAST_EDCA_PKT_TH_8812F(v)) 12519 12520 #define BIT_SHIFT_VO_FAST_EDCA_TO_8812F 8 12521 #define BIT_MASK_VO_FAST_EDCA_TO_8812F 0xff 12522 #define BIT_VO_FAST_EDCA_TO_8812F(x) \ 12523 (((x) & BIT_MASK_VO_FAST_EDCA_TO_8812F) \ 12524 << BIT_SHIFT_VO_FAST_EDCA_TO_8812F) 12525 #define BITS_VO_FAST_EDCA_TO_8812F \ 12526 (BIT_MASK_VO_FAST_EDCA_TO_8812F << BIT_SHIFT_VO_FAST_EDCA_TO_8812F) 12527 #define BIT_CLEAR_VO_FAST_EDCA_TO_8812F(x) ((x) & (~BITS_VO_FAST_EDCA_TO_8812F)) 12528 #define BIT_GET_VO_FAST_EDCA_TO_8812F(x) \ 12529 (((x) >> BIT_SHIFT_VO_FAST_EDCA_TO_8812F) & \ 12530 BIT_MASK_VO_FAST_EDCA_TO_8812F) 12531 #define BIT_SET_VO_FAST_EDCA_TO_8812F(x, v) \ 12532 (BIT_CLEAR_VO_FAST_EDCA_TO_8812F(x) | BIT_VO_FAST_EDCA_TO_8812F(v)) 12533 12534 #define BIT_VO_THRESHOLD_SEL_8812F BIT(7) 12535 12536 #define BIT_SHIFT_VO_FAST_EDCA_PKT_TH_8812F 0 12537 #define BIT_MASK_VO_FAST_EDCA_PKT_TH_8812F 0x7f 12538 #define BIT_VO_FAST_EDCA_PKT_TH_8812F(x) \ 12539 (((x) & BIT_MASK_VO_FAST_EDCA_PKT_TH_8812F) \ 12540 << BIT_SHIFT_VO_FAST_EDCA_PKT_TH_8812F) 12541 #define BITS_VO_FAST_EDCA_PKT_TH_8812F \ 12542 (BIT_MASK_VO_FAST_EDCA_PKT_TH_8812F \ 12543 << BIT_SHIFT_VO_FAST_EDCA_PKT_TH_8812F) 12544 #define BIT_CLEAR_VO_FAST_EDCA_PKT_TH_8812F(x) \ 12545 ((x) & (~BITS_VO_FAST_EDCA_PKT_TH_8812F)) 12546 #define BIT_GET_VO_FAST_EDCA_PKT_TH_8812F(x) \ 12547 (((x) >> BIT_SHIFT_VO_FAST_EDCA_PKT_TH_8812F) & \ 12548 BIT_MASK_VO_FAST_EDCA_PKT_TH_8812F) 12549 #define BIT_SET_VO_FAST_EDCA_PKT_TH_8812F(x, v) \ 12550 (BIT_CLEAR_VO_FAST_EDCA_PKT_TH_8812F(x) | \ 12551 BIT_VO_FAST_EDCA_PKT_TH_8812F(v)) 12552 12553 /* 2 REG_FAST_EDCA_BEBK_SETTING_8812F */ 12554 12555 #define BIT_SHIFT_BK_FAST_EDCA_TO_8812F 24 12556 #define BIT_MASK_BK_FAST_EDCA_TO_8812F 0xff 12557 #define BIT_BK_FAST_EDCA_TO_8812F(x) \ 12558 (((x) & BIT_MASK_BK_FAST_EDCA_TO_8812F) \ 12559 << BIT_SHIFT_BK_FAST_EDCA_TO_8812F) 12560 #define BITS_BK_FAST_EDCA_TO_8812F \ 12561 (BIT_MASK_BK_FAST_EDCA_TO_8812F << BIT_SHIFT_BK_FAST_EDCA_TO_8812F) 12562 #define BIT_CLEAR_BK_FAST_EDCA_TO_8812F(x) ((x) & (~BITS_BK_FAST_EDCA_TO_8812F)) 12563 #define BIT_GET_BK_FAST_EDCA_TO_8812F(x) \ 12564 (((x) >> BIT_SHIFT_BK_FAST_EDCA_TO_8812F) & \ 12565 BIT_MASK_BK_FAST_EDCA_TO_8812F) 12566 #define BIT_SET_BK_FAST_EDCA_TO_8812F(x, v) \ 12567 (BIT_CLEAR_BK_FAST_EDCA_TO_8812F(x) | BIT_BK_FAST_EDCA_TO_8812F(v)) 12568 12569 #define BIT_BK_THRESHOLD_SEL_8812F BIT(23) 12570 12571 #define BIT_SHIFT_BK_FAST_EDCA_PKT_TH_8812F 16 12572 #define BIT_MASK_BK_FAST_EDCA_PKT_TH_8812F 0x7f 12573 #define BIT_BK_FAST_EDCA_PKT_TH_8812F(x) \ 12574 (((x) & BIT_MASK_BK_FAST_EDCA_PKT_TH_8812F) \ 12575 << BIT_SHIFT_BK_FAST_EDCA_PKT_TH_8812F) 12576 #define BITS_BK_FAST_EDCA_PKT_TH_8812F \ 12577 (BIT_MASK_BK_FAST_EDCA_PKT_TH_8812F \ 12578 << BIT_SHIFT_BK_FAST_EDCA_PKT_TH_8812F) 12579 #define BIT_CLEAR_BK_FAST_EDCA_PKT_TH_8812F(x) \ 12580 ((x) & (~BITS_BK_FAST_EDCA_PKT_TH_8812F)) 12581 #define BIT_GET_BK_FAST_EDCA_PKT_TH_8812F(x) \ 12582 (((x) >> BIT_SHIFT_BK_FAST_EDCA_PKT_TH_8812F) & \ 12583 BIT_MASK_BK_FAST_EDCA_PKT_TH_8812F) 12584 #define BIT_SET_BK_FAST_EDCA_PKT_TH_8812F(x, v) \ 12585 (BIT_CLEAR_BK_FAST_EDCA_PKT_TH_8812F(x) | \ 12586 BIT_BK_FAST_EDCA_PKT_TH_8812F(v)) 12587 12588 #define BIT_SHIFT_BE_FAST_EDCA_TO_8812F 8 12589 #define BIT_MASK_BE_FAST_EDCA_TO_8812F 0xff 12590 #define BIT_BE_FAST_EDCA_TO_8812F(x) \ 12591 (((x) & BIT_MASK_BE_FAST_EDCA_TO_8812F) \ 12592 << BIT_SHIFT_BE_FAST_EDCA_TO_8812F) 12593 #define BITS_BE_FAST_EDCA_TO_8812F \ 12594 (BIT_MASK_BE_FAST_EDCA_TO_8812F << BIT_SHIFT_BE_FAST_EDCA_TO_8812F) 12595 #define BIT_CLEAR_BE_FAST_EDCA_TO_8812F(x) ((x) & (~BITS_BE_FAST_EDCA_TO_8812F)) 12596 #define BIT_GET_BE_FAST_EDCA_TO_8812F(x) \ 12597 (((x) >> BIT_SHIFT_BE_FAST_EDCA_TO_8812F) & \ 12598 BIT_MASK_BE_FAST_EDCA_TO_8812F) 12599 #define BIT_SET_BE_FAST_EDCA_TO_8812F(x, v) \ 12600 (BIT_CLEAR_BE_FAST_EDCA_TO_8812F(x) | BIT_BE_FAST_EDCA_TO_8812F(v)) 12601 12602 #define BIT_BE_THRESHOLD_SEL_8812F BIT(7) 12603 12604 #define BIT_SHIFT_BE_FAST_EDCA_PKT_TH_8812F 0 12605 #define BIT_MASK_BE_FAST_EDCA_PKT_TH_8812F 0x7f 12606 #define BIT_BE_FAST_EDCA_PKT_TH_8812F(x) \ 12607 (((x) & BIT_MASK_BE_FAST_EDCA_PKT_TH_8812F) \ 12608 << BIT_SHIFT_BE_FAST_EDCA_PKT_TH_8812F) 12609 #define BITS_BE_FAST_EDCA_PKT_TH_8812F \ 12610 (BIT_MASK_BE_FAST_EDCA_PKT_TH_8812F \ 12611 << BIT_SHIFT_BE_FAST_EDCA_PKT_TH_8812F) 12612 #define BIT_CLEAR_BE_FAST_EDCA_PKT_TH_8812F(x) \ 12613 ((x) & (~BITS_BE_FAST_EDCA_PKT_TH_8812F)) 12614 #define BIT_GET_BE_FAST_EDCA_PKT_TH_8812F(x) \ 12615 (((x) >> BIT_SHIFT_BE_FAST_EDCA_PKT_TH_8812F) & \ 12616 BIT_MASK_BE_FAST_EDCA_PKT_TH_8812F) 12617 #define BIT_SET_BE_FAST_EDCA_PKT_TH_8812F(x, v) \ 12618 (BIT_CLEAR_BE_FAST_EDCA_PKT_TH_8812F(x) | \ 12619 BIT_BE_FAST_EDCA_PKT_TH_8812F(v)) 12620 12621 /* 2 REG_MACID_DROP0_8812F */ 12622 12623 #define BIT_SHIFT_MACID31_0_DROP_8812F 0 12624 #define BIT_MASK_MACID31_0_DROP_8812F 0xffffffffL 12625 #define BIT_MACID31_0_DROP_8812F(x) \ 12626 (((x) & BIT_MASK_MACID31_0_DROP_8812F) \ 12627 << BIT_SHIFT_MACID31_0_DROP_8812F) 12628 #define BITS_MACID31_0_DROP_8812F \ 12629 (BIT_MASK_MACID31_0_DROP_8812F << BIT_SHIFT_MACID31_0_DROP_8812F) 12630 #define BIT_CLEAR_MACID31_0_DROP_8812F(x) ((x) & (~BITS_MACID31_0_DROP_8812F)) 12631 #define BIT_GET_MACID31_0_DROP_8812F(x) \ 12632 (((x) >> BIT_SHIFT_MACID31_0_DROP_8812F) & \ 12633 BIT_MASK_MACID31_0_DROP_8812F) 12634 #define BIT_SET_MACID31_0_DROP_8812F(x, v) \ 12635 (BIT_CLEAR_MACID31_0_DROP_8812F(x) | BIT_MACID31_0_DROP_8812F(v)) 12636 12637 /* 2 REG_MACID_DROP1_8812F */ 12638 12639 #define BIT_SHIFT_MACID63_32_DROP_8812F 0 12640 #define BIT_MASK_MACID63_32_DROP_8812F 0xffffffffL 12641 #define BIT_MACID63_32_DROP_8812F(x) \ 12642 (((x) & BIT_MASK_MACID63_32_DROP_8812F) \ 12643 << BIT_SHIFT_MACID63_32_DROP_8812F) 12644 #define BITS_MACID63_32_DROP_8812F \ 12645 (BIT_MASK_MACID63_32_DROP_8812F << BIT_SHIFT_MACID63_32_DROP_8812F) 12646 #define BIT_CLEAR_MACID63_32_DROP_8812F(x) ((x) & (~BITS_MACID63_32_DROP_8812F)) 12647 #define BIT_GET_MACID63_32_DROP_8812F(x) \ 12648 (((x) >> BIT_SHIFT_MACID63_32_DROP_8812F) & \ 12649 BIT_MASK_MACID63_32_DROP_8812F) 12650 #define BIT_SET_MACID63_32_DROP_8812F(x, v) \ 12651 (BIT_CLEAR_MACID63_32_DROP_8812F(x) | BIT_MACID63_32_DROP_8812F(v)) 12652 12653 /* 2 REG_MACID_DROP2_8812F */ 12654 12655 #define BIT_SHIFT_MACID95_64_DROP_8812F 0 12656 #define BIT_MASK_MACID95_64_DROP_8812F 0xffffffffL 12657 #define BIT_MACID95_64_DROP_8812F(x) \ 12658 (((x) & BIT_MASK_MACID95_64_DROP_8812F) \ 12659 << BIT_SHIFT_MACID95_64_DROP_8812F) 12660 #define BITS_MACID95_64_DROP_8812F \ 12661 (BIT_MASK_MACID95_64_DROP_8812F << BIT_SHIFT_MACID95_64_DROP_8812F) 12662 #define BIT_CLEAR_MACID95_64_DROP_8812F(x) ((x) & (~BITS_MACID95_64_DROP_8812F)) 12663 #define BIT_GET_MACID95_64_DROP_8812F(x) \ 12664 (((x) >> BIT_SHIFT_MACID95_64_DROP_8812F) & \ 12665 BIT_MASK_MACID95_64_DROP_8812F) 12666 #define BIT_SET_MACID95_64_DROP_8812F(x, v) \ 12667 (BIT_CLEAR_MACID95_64_DROP_8812F(x) | BIT_MACID95_64_DROP_8812F(v)) 12668 12669 /* 2 REG_MACID_DROP3_8812F */ 12670 12671 #define BIT_SHIFT_MACID127_96_DROP_8812F 0 12672 #define BIT_MASK_MACID127_96_DROP_8812F 0xffffffffL 12673 #define BIT_MACID127_96_DROP_8812F(x) \ 12674 (((x) & BIT_MASK_MACID127_96_DROP_8812F) \ 12675 << BIT_SHIFT_MACID127_96_DROP_8812F) 12676 #define BITS_MACID127_96_DROP_8812F \ 12677 (BIT_MASK_MACID127_96_DROP_8812F << BIT_SHIFT_MACID127_96_DROP_8812F) 12678 #define BIT_CLEAR_MACID127_96_DROP_8812F(x) \ 12679 ((x) & (~BITS_MACID127_96_DROP_8812F)) 12680 #define BIT_GET_MACID127_96_DROP_8812F(x) \ 12681 (((x) >> BIT_SHIFT_MACID127_96_DROP_8812F) & \ 12682 BIT_MASK_MACID127_96_DROP_8812F) 12683 #define BIT_SET_MACID127_96_DROP_8812F(x, v) \ 12684 (BIT_CLEAR_MACID127_96_DROP_8812F(x) | BIT_MACID127_96_DROP_8812F(v)) 12685 12686 /* 2 REG_R_MACID_RELEASE_SUCCESS_0_8812F */ 12687 12688 #define BIT_SHIFT_R_MACID_RELEASE_SUCCESS_0_8812F 0 12689 #define BIT_MASK_R_MACID_RELEASE_SUCCESS_0_8812F 0xffffffffL 12690 #define BIT_R_MACID_RELEASE_SUCCESS_0_8812F(x) \ 12691 (((x) & BIT_MASK_R_MACID_RELEASE_SUCCESS_0_8812F) \ 12692 << BIT_SHIFT_R_MACID_RELEASE_SUCCESS_0_8812F) 12693 #define BITS_R_MACID_RELEASE_SUCCESS_0_8812F \ 12694 (BIT_MASK_R_MACID_RELEASE_SUCCESS_0_8812F \ 12695 << BIT_SHIFT_R_MACID_RELEASE_SUCCESS_0_8812F) 12696 #define BIT_CLEAR_R_MACID_RELEASE_SUCCESS_0_8812F(x) \ 12697 ((x) & (~BITS_R_MACID_RELEASE_SUCCESS_0_8812F)) 12698 #define BIT_GET_R_MACID_RELEASE_SUCCESS_0_8812F(x) \ 12699 (((x) >> BIT_SHIFT_R_MACID_RELEASE_SUCCESS_0_8812F) & \ 12700 BIT_MASK_R_MACID_RELEASE_SUCCESS_0_8812F) 12701 #define BIT_SET_R_MACID_RELEASE_SUCCESS_0_8812F(x, v) \ 12702 (BIT_CLEAR_R_MACID_RELEASE_SUCCESS_0_8812F(x) | \ 12703 BIT_R_MACID_RELEASE_SUCCESS_0_8812F(v)) 12704 12705 /* 2 REG_R_MACID_RELEASE_SUCCESS_1_8812F */ 12706 12707 #define BIT_SHIFT_R_MACID_RELEASE_SUCCESS_1_8812F 0 12708 #define BIT_MASK_R_MACID_RELEASE_SUCCESS_1_8812F 0xffffffffL 12709 #define BIT_R_MACID_RELEASE_SUCCESS_1_8812F(x) \ 12710 (((x) & BIT_MASK_R_MACID_RELEASE_SUCCESS_1_8812F) \ 12711 << BIT_SHIFT_R_MACID_RELEASE_SUCCESS_1_8812F) 12712 #define BITS_R_MACID_RELEASE_SUCCESS_1_8812F \ 12713 (BIT_MASK_R_MACID_RELEASE_SUCCESS_1_8812F \ 12714 << BIT_SHIFT_R_MACID_RELEASE_SUCCESS_1_8812F) 12715 #define BIT_CLEAR_R_MACID_RELEASE_SUCCESS_1_8812F(x) \ 12716 ((x) & (~BITS_R_MACID_RELEASE_SUCCESS_1_8812F)) 12717 #define BIT_GET_R_MACID_RELEASE_SUCCESS_1_8812F(x) \ 12718 (((x) >> BIT_SHIFT_R_MACID_RELEASE_SUCCESS_1_8812F) & \ 12719 BIT_MASK_R_MACID_RELEASE_SUCCESS_1_8812F) 12720 #define BIT_SET_R_MACID_RELEASE_SUCCESS_1_8812F(x, v) \ 12721 (BIT_CLEAR_R_MACID_RELEASE_SUCCESS_1_8812F(x) | \ 12722 BIT_R_MACID_RELEASE_SUCCESS_1_8812F(v)) 12723 12724 /* 2 REG_R_MACID_RELEASE_SUCCESS_2_8812F */ 12725 12726 #define BIT_SHIFT_R_MACID_RELEASE_SUCCESS_2_8812F 0 12727 #define BIT_MASK_R_MACID_RELEASE_SUCCESS_2_8812F 0xffffffffL 12728 #define BIT_R_MACID_RELEASE_SUCCESS_2_8812F(x) \ 12729 (((x) & BIT_MASK_R_MACID_RELEASE_SUCCESS_2_8812F) \ 12730 << BIT_SHIFT_R_MACID_RELEASE_SUCCESS_2_8812F) 12731 #define BITS_R_MACID_RELEASE_SUCCESS_2_8812F \ 12732 (BIT_MASK_R_MACID_RELEASE_SUCCESS_2_8812F \ 12733 << BIT_SHIFT_R_MACID_RELEASE_SUCCESS_2_8812F) 12734 #define BIT_CLEAR_R_MACID_RELEASE_SUCCESS_2_8812F(x) \ 12735 ((x) & (~BITS_R_MACID_RELEASE_SUCCESS_2_8812F)) 12736 #define BIT_GET_R_MACID_RELEASE_SUCCESS_2_8812F(x) \ 12737 (((x) >> BIT_SHIFT_R_MACID_RELEASE_SUCCESS_2_8812F) & \ 12738 BIT_MASK_R_MACID_RELEASE_SUCCESS_2_8812F) 12739 #define BIT_SET_R_MACID_RELEASE_SUCCESS_2_8812F(x, v) \ 12740 (BIT_CLEAR_R_MACID_RELEASE_SUCCESS_2_8812F(x) | \ 12741 BIT_R_MACID_RELEASE_SUCCESS_2_8812F(v)) 12742 12743 /* 2 REG_R_MACID_RELEASE_SUCCESS_3_8812F */ 12744 12745 #define BIT_SHIFT_R_MACID_RELEASE_SUCCESS_3_8812F 0 12746 #define BIT_MASK_R_MACID_RELEASE_SUCCESS_3_8812F 0xffffffffL 12747 #define BIT_R_MACID_RELEASE_SUCCESS_3_8812F(x) \ 12748 (((x) & BIT_MASK_R_MACID_RELEASE_SUCCESS_3_8812F) \ 12749 << BIT_SHIFT_R_MACID_RELEASE_SUCCESS_3_8812F) 12750 #define BITS_R_MACID_RELEASE_SUCCESS_3_8812F \ 12751 (BIT_MASK_R_MACID_RELEASE_SUCCESS_3_8812F \ 12752 << BIT_SHIFT_R_MACID_RELEASE_SUCCESS_3_8812F) 12753 #define BIT_CLEAR_R_MACID_RELEASE_SUCCESS_3_8812F(x) \ 12754 ((x) & (~BITS_R_MACID_RELEASE_SUCCESS_3_8812F)) 12755 #define BIT_GET_R_MACID_RELEASE_SUCCESS_3_8812F(x) \ 12756 (((x) >> BIT_SHIFT_R_MACID_RELEASE_SUCCESS_3_8812F) & \ 12757 BIT_MASK_R_MACID_RELEASE_SUCCESS_3_8812F) 12758 #define BIT_SET_R_MACID_RELEASE_SUCCESS_3_8812F(x, v) \ 12759 (BIT_CLEAR_R_MACID_RELEASE_SUCCESS_3_8812F(x) | \ 12760 BIT_R_MACID_RELEASE_SUCCESS_3_8812F(v)) 12761 12762 /* 2 REG_MGQ_FIFO_WRITE_POINTER_8812F */ 12763 #define BIT_MGQ_FIFO_OV_8812F BIT(7) 12764 #define BIT_MGQ_FIFO_WPTR_ERROR_8812F BIT(6) 12765 #define BIT_EN_MGQ_FIFO_LIFETIME_8812F BIT(5) 12766 12767 #define BIT_SHIFT_MGQ_FIFO_WPTR_8812F 0 12768 #define BIT_MASK_MGQ_FIFO_WPTR_8812F 0x1f 12769 #define BIT_MGQ_FIFO_WPTR_8812F(x) \ 12770 (((x) & BIT_MASK_MGQ_FIFO_WPTR_8812F) << BIT_SHIFT_MGQ_FIFO_WPTR_8812F) 12771 #define BITS_MGQ_FIFO_WPTR_8812F \ 12772 (BIT_MASK_MGQ_FIFO_WPTR_8812F << BIT_SHIFT_MGQ_FIFO_WPTR_8812F) 12773 #define BIT_CLEAR_MGQ_FIFO_WPTR_8812F(x) ((x) & (~BITS_MGQ_FIFO_WPTR_8812F)) 12774 #define BIT_GET_MGQ_FIFO_WPTR_8812F(x) \ 12775 (((x) >> BIT_SHIFT_MGQ_FIFO_WPTR_8812F) & BIT_MASK_MGQ_FIFO_WPTR_8812F) 12776 #define BIT_SET_MGQ_FIFO_WPTR_8812F(x, v) \ 12777 (BIT_CLEAR_MGQ_FIFO_WPTR_8812F(x) | BIT_MGQ_FIFO_WPTR_8812F(v)) 12778 12779 /* 2 REG_MGQ_FIFO_READ_POINTER_8812F */ 12780 12781 #define BIT_SHIFT_MGQ_FIFO_SIZE_8812F 14 12782 #define BIT_MASK_MGQ_FIFO_SIZE_8812F 0x3 12783 #define BIT_MGQ_FIFO_SIZE_8812F(x) \ 12784 (((x) & BIT_MASK_MGQ_FIFO_SIZE_8812F) << BIT_SHIFT_MGQ_FIFO_SIZE_8812F) 12785 #define BITS_MGQ_FIFO_SIZE_8812F \ 12786 (BIT_MASK_MGQ_FIFO_SIZE_8812F << BIT_SHIFT_MGQ_FIFO_SIZE_8812F) 12787 #define BIT_CLEAR_MGQ_FIFO_SIZE_8812F(x) ((x) & (~BITS_MGQ_FIFO_SIZE_8812F)) 12788 #define BIT_GET_MGQ_FIFO_SIZE_8812F(x) \ 12789 (((x) >> BIT_SHIFT_MGQ_FIFO_SIZE_8812F) & BIT_MASK_MGQ_FIFO_SIZE_8812F) 12790 #define BIT_SET_MGQ_FIFO_SIZE_8812F(x, v) \ 12791 (BIT_CLEAR_MGQ_FIFO_SIZE_8812F(x) | BIT_MGQ_FIFO_SIZE_8812F(v)) 12792 12793 #define BIT_MGQ_FIFO_PAUSE_8812F BIT(13) 12794 12795 #define BIT_SHIFT_MGQ_FIFO_RPTR_8812F 8 12796 #define BIT_MASK_MGQ_FIFO_RPTR_8812F 0x1f 12797 #define BIT_MGQ_FIFO_RPTR_8812F(x) \ 12798 (((x) & BIT_MASK_MGQ_FIFO_RPTR_8812F) << BIT_SHIFT_MGQ_FIFO_RPTR_8812F) 12799 #define BITS_MGQ_FIFO_RPTR_8812F \ 12800 (BIT_MASK_MGQ_FIFO_RPTR_8812F << BIT_SHIFT_MGQ_FIFO_RPTR_8812F) 12801 #define BIT_CLEAR_MGQ_FIFO_RPTR_8812F(x) ((x) & (~BITS_MGQ_FIFO_RPTR_8812F)) 12802 #define BIT_GET_MGQ_FIFO_RPTR_8812F(x) \ 12803 (((x) >> BIT_SHIFT_MGQ_FIFO_RPTR_8812F) & BIT_MASK_MGQ_FIFO_RPTR_8812F) 12804 #define BIT_SET_MGQ_FIFO_RPTR_8812F(x, v) \ 12805 (BIT_CLEAR_MGQ_FIFO_RPTR_8812F(x) | BIT_MGQ_FIFO_RPTR_8812F(v)) 12806 12807 /* 2 REG_MGQ_FIFO_ENABLE_8812F */ 12808 #define BIT_MGQ_FIFO_EN_8812F BIT(15) 12809 12810 #define BIT_SHIFT_MGQ_FIFO_PG_SIZE_8812F 12 12811 #define BIT_MASK_MGQ_FIFO_PG_SIZE_8812F 0x7 12812 #define BIT_MGQ_FIFO_PG_SIZE_8812F(x) \ 12813 (((x) & BIT_MASK_MGQ_FIFO_PG_SIZE_8812F) \ 12814 << BIT_SHIFT_MGQ_FIFO_PG_SIZE_8812F) 12815 #define BITS_MGQ_FIFO_PG_SIZE_8812F \ 12816 (BIT_MASK_MGQ_FIFO_PG_SIZE_8812F << BIT_SHIFT_MGQ_FIFO_PG_SIZE_8812F) 12817 #define BIT_CLEAR_MGQ_FIFO_PG_SIZE_8812F(x) \ 12818 ((x) & (~BITS_MGQ_FIFO_PG_SIZE_8812F)) 12819 #define BIT_GET_MGQ_FIFO_PG_SIZE_8812F(x) \ 12820 (((x) >> BIT_SHIFT_MGQ_FIFO_PG_SIZE_8812F) & \ 12821 BIT_MASK_MGQ_FIFO_PG_SIZE_8812F) 12822 #define BIT_SET_MGQ_FIFO_PG_SIZE_8812F(x, v) \ 12823 (BIT_CLEAR_MGQ_FIFO_PG_SIZE_8812F(x) | BIT_MGQ_FIFO_PG_SIZE_8812F(v)) 12824 12825 #define BIT_SHIFT_MGQ_FIFO_START_PG_8812F 0 12826 #define BIT_MASK_MGQ_FIFO_START_PG_8812F 0xfff 12827 #define BIT_MGQ_FIFO_START_PG_8812F(x) \ 12828 (((x) & BIT_MASK_MGQ_FIFO_START_PG_8812F) \ 12829 << BIT_SHIFT_MGQ_FIFO_START_PG_8812F) 12830 #define BITS_MGQ_FIFO_START_PG_8812F \ 12831 (BIT_MASK_MGQ_FIFO_START_PG_8812F << BIT_SHIFT_MGQ_FIFO_START_PG_8812F) 12832 #define BIT_CLEAR_MGQ_FIFO_START_PG_8812F(x) \ 12833 ((x) & (~BITS_MGQ_FIFO_START_PG_8812F)) 12834 #define BIT_GET_MGQ_FIFO_START_PG_8812F(x) \ 12835 (((x) >> BIT_SHIFT_MGQ_FIFO_START_PG_8812F) & \ 12836 BIT_MASK_MGQ_FIFO_START_PG_8812F) 12837 #define BIT_SET_MGQ_FIFO_START_PG_8812F(x, v) \ 12838 (BIT_CLEAR_MGQ_FIFO_START_PG_8812F(x) | BIT_MGQ_FIFO_START_PG_8812F(v)) 12839 12840 /* 2 REG_MGQ_FIFO_RELEASE_INT_MASK_8812F */ 12841 12842 #define BIT_SHIFT_MGQ_FIFO_REL_INT_MASK_8812F 0 12843 #define BIT_MASK_MGQ_FIFO_REL_INT_MASK_8812F 0xffff 12844 #define BIT_MGQ_FIFO_REL_INT_MASK_8812F(x) \ 12845 (((x) & BIT_MASK_MGQ_FIFO_REL_INT_MASK_8812F) \ 12846 << BIT_SHIFT_MGQ_FIFO_REL_INT_MASK_8812F) 12847 #define BITS_MGQ_FIFO_REL_INT_MASK_8812F \ 12848 (BIT_MASK_MGQ_FIFO_REL_INT_MASK_8812F \ 12849 << BIT_SHIFT_MGQ_FIFO_REL_INT_MASK_8812F) 12850 #define BIT_CLEAR_MGQ_FIFO_REL_INT_MASK_8812F(x) \ 12851 ((x) & (~BITS_MGQ_FIFO_REL_INT_MASK_8812F)) 12852 #define BIT_GET_MGQ_FIFO_REL_INT_MASK_8812F(x) \ 12853 (((x) >> BIT_SHIFT_MGQ_FIFO_REL_INT_MASK_8812F) & \ 12854 BIT_MASK_MGQ_FIFO_REL_INT_MASK_8812F) 12855 #define BIT_SET_MGQ_FIFO_REL_INT_MASK_8812F(x, v) \ 12856 (BIT_CLEAR_MGQ_FIFO_REL_INT_MASK_8812F(x) | \ 12857 BIT_MGQ_FIFO_REL_INT_MASK_8812F(v)) 12858 12859 /* 2 REG_MGQ_FIFO_RELEASE_INT_FLAG_8812F */ 12860 12861 #define BIT_SHIFT_MGQ_FIFO_REL_INT_FLAG_8812F 0 12862 #define BIT_MASK_MGQ_FIFO_REL_INT_FLAG_8812F 0xffff 12863 #define BIT_MGQ_FIFO_REL_INT_FLAG_8812F(x) \ 12864 (((x) & BIT_MASK_MGQ_FIFO_REL_INT_FLAG_8812F) \ 12865 << BIT_SHIFT_MGQ_FIFO_REL_INT_FLAG_8812F) 12866 #define BITS_MGQ_FIFO_REL_INT_FLAG_8812F \ 12867 (BIT_MASK_MGQ_FIFO_REL_INT_FLAG_8812F \ 12868 << BIT_SHIFT_MGQ_FIFO_REL_INT_FLAG_8812F) 12869 #define BIT_CLEAR_MGQ_FIFO_REL_INT_FLAG_8812F(x) \ 12870 ((x) & (~BITS_MGQ_FIFO_REL_INT_FLAG_8812F)) 12871 #define BIT_GET_MGQ_FIFO_REL_INT_FLAG_8812F(x) \ 12872 (((x) >> BIT_SHIFT_MGQ_FIFO_REL_INT_FLAG_8812F) & \ 12873 BIT_MASK_MGQ_FIFO_REL_INT_FLAG_8812F) 12874 #define BIT_SET_MGQ_FIFO_REL_INT_FLAG_8812F(x, v) \ 12875 (BIT_CLEAR_MGQ_FIFO_REL_INT_FLAG_8812F(x) | \ 12876 BIT_MGQ_FIFO_REL_INT_FLAG_8812F(v)) 12877 12878 /* 2 REG_MGQ_FIFO_VALID_MAP_8812F */ 12879 12880 #define BIT_SHIFT_MGQ_FIFO_PKT_VALID_MAP_8812F 0 12881 #define BIT_MASK_MGQ_FIFO_PKT_VALID_MAP_8812F 0xffff 12882 #define BIT_MGQ_FIFO_PKT_VALID_MAP_8812F(x) \ 12883 (((x) & BIT_MASK_MGQ_FIFO_PKT_VALID_MAP_8812F) \ 12884 << BIT_SHIFT_MGQ_FIFO_PKT_VALID_MAP_8812F) 12885 #define BITS_MGQ_FIFO_PKT_VALID_MAP_8812F \ 12886 (BIT_MASK_MGQ_FIFO_PKT_VALID_MAP_8812F \ 12887 << BIT_SHIFT_MGQ_FIFO_PKT_VALID_MAP_8812F) 12888 #define BIT_CLEAR_MGQ_FIFO_PKT_VALID_MAP_8812F(x) \ 12889 ((x) & (~BITS_MGQ_FIFO_PKT_VALID_MAP_8812F)) 12890 #define BIT_GET_MGQ_FIFO_PKT_VALID_MAP_8812F(x) \ 12891 (((x) >> BIT_SHIFT_MGQ_FIFO_PKT_VALID_MAP_8812F) & \ 12892 BIT_MASK_MGQ_FIFO_PKT_VALID_MAP_8812F) 12893 #define BIT_SET_MGQ_FIFO_PKT_VALID_MAP_8812F(x, v) \ 12894 (BIT_CLEAR_MGQ_FIFO_PKT_VALID_MAP_8812F(x) | \ 12895 BIT_MGQ_FIFO_PKT_VALID_MAP_8812F(v)) 12896 12897 /* 2 REG_MGQ_FIFO_LIFETIME_8812F */ 12898 12899 #define BIT_SHIFT_MGQ_FIFO_LIFETIME_8812F 0 12900 #define BIT_MASK_MGQ_FIFO_LIFETIME_8812F 0xffff 12901 #define BIT_MGQ_FIFO_LIFETIME_8812F(x) \ 12902 (((x) & BIT_MASK_MGQ_FIFO_LIFETIME_8812F) \ 12903 << BIT_SHIFT_MGQ_FIFO_LIFETIME_8812F) 12904 #define BITS_MGQ_FIFO_LIFETIME_8812F \ 12905 (BIT_MASK_MGQ_FIFO_LIFETIME_8812F << BIT_SHIFT_MGQ_FIFO_LIFETIME_8812F) 12906 #define BIT_CLEAR_MGQ_FIFO_LIFETIME_8812F(x) \ 12907 ((x) & (~BITS_MGQ_FIFO_LIFETIME_8812F)) 12908 #define BIT_GET_MGQ_FIFO_LIFETIME_8812F(x) \ 12909 (((x) >> BIT_SHIFT_MGQ_FIFO_LIFETIME_8812F) & \ 12910 BIT_MASK_MGQ_FIFO_LIFETIME_8812F) 12911 #define BIT_SET_MGQ_FIFO_LIFETIME_8812F(x, v) \ 12912 (BIT_CLEAR_MGQ_FIFO_LIFETIME_8812F(x) | BIT_MGQ_FIFO_LIFETIME_8812F(v)) 12913 12914 /* 2 REG_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8812F */ 12915 12916 #define BIT_SHIFT_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8812F 0 12917 #define BIT_MASK_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8812F 0x7f 12918 #define BIT_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8812F(x) \ 12919 (((x) & BIT_MASK_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8812F) \ 12920 << BIT_SHIFT_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8812F) 12921 #define BITS_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8812F \ 12922 (BIT_MASK_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8812F \ 12923 << BIT_SHIFT_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8812F) 12924 #define BIT_CLEAR_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8812F(x) \ 12925 ((x) & (~BITS_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8812F)) 12926 #define BIT_GET_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8812F(x) \ 12927 (((x) >> BIT_SHIFT_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8812F) & \ 12928 BIT_MASK_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8812F) 12929 #define BIT_SET_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8812F(x, v) \ 12930 (BIT_CLEAR_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8812F(x) | \ 12931 BIT_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8812F(v)) 12932 12933 /* 2 REG_SHCUT_SETTING_8812F */ 12934 12935 /* 2 REG_SHCUT_LLC_ETH_TYPE0_8812F */ 12936 12937 /* 2 REG_SHCUT_LLC_ETH_TYPE1_8812F */ 12938 12939 /* 2 REG_SHCUT_LLC_OUI0_8812F */ 12940 12941 /* 2 REG_SHCUT_LLC_OUI1_8812F */ 12942 12943 /* 2 REG_SHCUT_LLC_OUI2_8812F */ 12944 12945 /* 2 REG_MU_TX_CTL_8812F */ 12946 #define BIT_R_MU_P1_WAIT_STATE_EN_8812F BIT(16) 12947 12948 #define BIT_SHIFT_R_MU_RL_8812F 12 12949 #define BIT_MASK_R_MU_RL_8812F 0xf 12950 #define BIT_R_MU_RL_8812F(x) \ 12951 (((x) & BIT_MASK_R_MU_RL_8812F) << BIT_SHIFT_R_MU_RL_8812F) 12952 #define BITS_R_MU_RL_8812F (BIT_MASK_R_MU_RL_8812F << BIT_SHIFT_R_MU_RL_8812F) 12953 #define BIT_CLEAR_R_MU_RL_8812F(x) ((x) & (~BITS_R_MU_RL_8812F)) 12954 #define BIT_GET_R_MU_RL_8812F(x) \ 12955 (((x) >> BIT_SHIFT_R_MU_RL_8812F) & BIT_MASK_R_MU_RL_8812F) 12956 #define BIT_SET_R_MU_RL_8812F(x, v) \ 12957 (BIT_CLEAR_R_MU_RL_8812F(x) | BIT_R_MU_RL_8812F(v)) 12958 12959 #define BIT_R_FORCE_P1_RATEDOWN_8812F BIT(11) 12960 12961 #define BIT_SHIFT_R_MU_TAB_SEL_8812F 8 12962 #define BIT_MASK_R_MU_TAB_SEL_8812F 0x7 12963 #define BIT_R_MU_TAB_SEL_8812F(x) \ 12964 (((x) & BIT_MASK_R_MU_TAB_SEL_8812F) << BIT_SHIFT_R_MU_TAB_SEL_8812F) 12965 #define BITS_R_MU_TAB_SEL_8812F \ 12966 (BIT_MASK_R_MU_TAB_SEL_8812F << BIT_SHIFT_R_MU_TAB_SEL_8812F) 12967 #define BIT_CLEAR_R_MU_TAB_SEL_8812F(x) ((x) & (~BITS_R_MU_TAB_SEL_8812F)) 12968 #define BIT_GET_R_MU_TAB_SEL_8812F(x) \ 12969 (((x) >> BIT_SHIFT_R_MU_TAB_SEL_8812F) & BIT_MASK_R_MU_TAB_SEL_8812F) 12970 #define BIT_SET_R_MU_TAB_SEL_8812F(x, v) \ 12971 (BIT_CLEAR_R_MU_TAB_SEL_8812F(x) | BIT_R_MU_TAB_SEL_8812F(v)) 12972 12973 #define BIT_R_EN_MU_MIMO_8812F BIT(7) 12974 #define BIT_R_EN_REVERS_GTAB_8812F BIT(6) 12975 12976 #define BIT_SHIFT_R_MU_TABLE_VALID_8812F 0 12977 #define BIT_MASK_R_MU_TABLE_VALID_8812F 0x3f 12978 #define BIT_R_MU_TABLE_VALID_8812F(x) \ 12979 (((x) & BIT_MASK_R_MU_TABLE_VALID_8812F) \ 12980 << BIT_SHIFT_R_MU_TABLE_VALID_8812F) 12981 #define BITS_R_MU_TABLE_VALID_8812F \ 12982 (BIT_MASK_R_MU_TABLE_VALID_8812F << BIT_SHIFT_R_MU_TABLE_VALID_8812F) 12983 #define BIT_CLEAR_R_MU_TABLE_VALID_8812F(x) \ 12984 ((x) & (~BITS_R_MU_TABLE_VALID_8812F)) 12985 #define BIT_GET_R_MU_TABLE_VALID_8812F(x) \ 12986 (((x) >> BIT_SHIFT_R_MU_TABLE_VALID_8812F) & \ 12987 BIT_MASK_R_MU_TABLE_VALID_8812F) 12988 #define BIT_SET_R_MU_TABLE_VALID_8812F(x, v) \ 12989 (BIT_CLEAR_R_MU_TABLE_VALID_8812F(x) | BIT_R_MU_TABLE_VALID_8812F(v)) 12990 12991 /* 2 REG_MU_STA_GID_VLD_8812F */ 12992 12993 #define BIT_SHIFT_R_MU_STA_GTAB_VALID_8812F 0 12994 #define BIT_MASK_R_MU_STA_GTAB_VALID_8812F 0xffffffffL 12995 #define BIT_R_MU_STA_GTAB_VALID_8812F(x) \ 12996 (((x) & BIT_MASK_R_MU_STA_GTAB_VALID_8812F) \ 12997 << BIT_SHIFT_R_MU_STA_GTAB_VALID_8812F) 12998 #define BITS_R_MU_STA_GTAB_VALID_8812F \ 12999 (BIT_MASK_R_MU_STA_GTAB_VALID_8812F \ 13000 << BIT_SHIFT_R_MU_STA_GTAB_VALID_8812F) 13001 #define BIT_CLEAR_R_MU_STA_GTAB_VALID_8812F(x) \ 13002 ((x) & (~BITS_R_MU_STA_GTAB_VALID_8812F)) 13003 #define BIT_GET_R_MU_STA_GTAB_VALID_8812F(x) \ 13004 (((x) >> BIT_SHIFT_R_MU_STA_GTAB_VALID_8812F) & \ 13005 BIT_MASK_R_MU_STA_GTAB_VALID_8812F) 13006 #define BIT_SET_R_MU_STA_GTAB_VALID_8812F(x, v) \ 13007 (BIT_CLEAR_R_MU_STA_GTAB_VALID_8812F(x) | \ 13008 BIT_R_MU_STA_GTAB_VALID_8812F(v)) 13009 13010 /* 2 REG_MU_STA_USER_POS_INFO_8812F */ 13011 13012 #define BIT_SHIFT_R_MU_STA_GTAB_POSITION_L_8812F 0 13013 #define BIT_MASK_R_MU_STA_GTAB_POSITION_L_8812F 0xffffffffL 13014 #define BIT_R_MU_STA_GTAB_POSITION_L_8812F(x) \ 13015 (((x) & BIT_MASK_R_MU_STA_GTAB_POSITION_L_8812F) \ 13016 << BIT_SHIFT_R_MU_STA_GTAB_POSITION_L_8812F) 13017 #define BITS_R_MU_STA_GTAB_POSITION_L_8812F \ 13018 (BIT_MASK_R_MU_STA_GTAB_POSITION_L_8812F \ 13019 << BIT_SHIFT_R_MU_STA_GTAB_POSITION_L_8812F) 13020 #define BIT_CLEAR_R_MU_STA_GTAB_POSITION_L_8812F(x) \ 13021 ((x) & (~BITS_R_MU_STA_GTAB_POSITION_L_8812F)) 13022 #define BIT_GET_R_MU_STA_GTAB_POSITION_L_8812F(x) \ 13023 (((x) >> BIT_SHIFT_R_MU_STA_GTAB_POSITION_L_8812F) & \ 13024 BIT_MASK_R_MU_STA_GTAB_POSITION_L_8812F) 13025 #define BIT_SET_R_MU_STA_GTAB_POSITION_L_8812F(x, v) \ 13026 (BIT_CLEAR_R_MU_STA_GTAB_POSITION_L_8812F(x) | \ 13027 BIT_R_MU_STA_GTAB_POSITION_L_8812F(v)) 13028 13029 /* 2 REG_MU_STA_USER_POS_INFO_H_8812F */ 13030 13031 #define BIT_SHIFT_R_MU_STA_GTAB_POSITION_H_8812F 0 13032 #define BIT_MASK_R_MU_STA_GTAB_POSITION_H_8812F 0xffffffffL 13033 #define BIT_R_MU_STA_GTAB_POSITION_H_8812F(x) \ 13034 (((x) & BIT_MASK_R_MU_STA_GTAB_POSITION_H_8812F) \ 13035 << BIT_SHIFT_R_MU_STA_GTAB_POSITION_H_8812F) 13036 #define BITS_R_MU_STA_GTAB_POSITION_H_8812F \ 13037 (BIT_MASK_R_MU_STA_GTAB_POSITION_H_8812F \ 13038 << BIT_SHIFT_R_MU_STA_GTAB_POSITION_H_8812F) 13039 #define BIT_CLEAR_R_MU_STA_GTAB_POSITION_H_8812F(x) \ 13040 ((x) & (~BITS_R_MU_STA_GTAB_POSITION_H_8812F)) 13041 #define BIT_GET_R_MU_STA_GTAB_POSITION_H_8812F(x) \ 13042 (((x) >> BIT_SHIFT_R_MU_STA_GTAB_POSITION_H_8812F) & \ 13043 BIT_MASK_R_MU_STA_GTAB_POSITION_H_8812F) 13044 #define BIT_SET_R_MU_STA_GTAB_POSITION_H_8812F(x, v) \ 13045 (BIT_CLEAR_R_MU_STA_GTAB_POSITION_H_8812F(x) | \ 13046 BIT_R_MU_STA_GTAB_POSITION_H_8812F(v)) 13047 13048 /* 2 REG_CHNL_INFO_CTRL_8812F */ 13049 #define BIT_CHNL_REF_RXNAV_8812F BIT(7) 13050 #define BIT_CHNL_REF_VBON_8812F BIT(6) 13051 #define BIT_CHNL_REF_EDCA_8812F BIT(5) 13052 #define BIT_CHNL_REF_CCA_8812F BIT(4) 13053 #define BIT_RST_CHNL_BUSY_8812F BIT(3) 13054 #define BIT_RST_CHNL_IDLE_8812F BIT(2) 13055 #define BIT_CHNL_INFO_RST_8812F BIT(1) 13056 #define BIT_ATM_AIRTIME_EN_8812F BIT(0) 13057 13058 /* 2 REG_CHNL_IDLE_TIME_8812F */ 13059 13060 #define BIT_SHIFT_CHNL_IDLE_TIME_8812F 0 13061 #define BIT_MASK_CHNL_IDLE_TIME_8812F 0xffffffffL 13062 #define BIT_CHNL_IDLE_TIME_8812F(x) \ 13063 (((x) & BIT_MASK_CHNL_IDLE_TIME_8812F) \ 13064 << BIT_SHIFT_CHNL_IDLE_TIME_8812F) 13065 #define BITS_CHNL_IDLE_TIME_8812F \ 13066 (BIT_MASK_CHNL_IDLE_TIME_8812F << BIT_SHIFT_CHNL_IDLE_TIME_8812F) 13067 #define BIT_CLEAR_CHNL_IDLE_TIME_8812F(x) ((x) & (~BITS_CHNL_IDLE_TIME_8812F)) 13068 #define BIT_GET_CHNL_IDLE_TIME_8812F(x) \ 13069 (((x) >> BIT_SHIFT_CHNL_IDLE_TIME_8812F) & \ 13070 BIT_MASK_CHNL_IDLE_TIME_8812F) 13071 #define BIT_SET_CHNL_IDLE_TIME_8812F(x, v) \ 13072 (BIT_CLEAR_CHNL_IDLE_TIME_8812F(x) | BIT_CHNL_IDLE_TIME_8812F(v)) 13073 13074 /* 2 REG_CHNL_BUSY_TIME_8812F */ 13075 13076 #define BIT_SHIFT_CHNL_BUSY_TIME_8812F 0 13077 #define BIT_MASK_CHNL_BUSY_TIME_8812F 0xffffffffL 13078 #define BIT_CHNL_BUSY_TIME_8812F(x) \ 13079 (((x) & BIT_MASK_CHNL_BUSY_TIME_8812F) \ 13080 << BIT_SHIFT_CHNL_BUSY_TIME_8812F) 13081 #define BITS_CHNL_BUSY_TIME_8812F \ 13082 (BIT_MASK_CHNL_BUSY_TIME_8812F << BIT_SHIFT_CHNL_BUSY_TIME_8812F) 13083 #define BIT_CLEAR_CHNL_BUSY_TIME_8812F(x) ((x) & (~BITS_CHNL_BUSY_TIME_8812F)) 13084 #define BIT_GET_CHNL_BUSY_TIME_8812F(x) \ 13085 (((x) >> BIT_SHIFT_CHNL_BUSY_TIME_8812F) & \ 13086 BIT_MASK_CHNL_BUSY_TIME_8812F) 13087 #define BIT_SET_CHNL_BUSY_TIME_8812F(x, v) \ 13088 (BIT_CLEAR_CHNL_BUSY_TIME_8812F(x) | BIT_CHNL_BUSY_TIME_8812F(v)) 13089 13090 /* 2 REG_MU_TRX_DBG_CNT_V1_8812F */ 13091 #define BIT_MU_DNGCNT_RST_8812F BIT(20) 13092 13093 #define BIT_SHIFT_MU_DNGCNT_SEL_8812F 16 13094 #define BIT_MASK_MU_DNGCNT_SEL_8812F 0xf 13095 #define BIT_MU_DNGCNT_SEL_8812F(x) \ 13096 (((x) & BIT_MASK_MU_DNGCNT_SEL_8812F) << BIT_SHIFT_MU_DNGCNT_SEL_8812F) 13097 #define BITS_MU_DNGCNT_SEL_8812F \ 13098 (BIT_MASK_MU_DNGCNT_SEL_8812F << BIT_SHIFT_MU_DNGCNT_SEL_8812F) 13099 #define BIT_CLEAR_MU_DNGCNT_SEL_8812F(x) ((x) & (~BITS_MU_DNGCNT_SEL_8812F)) 13100 #define BIT_GET_MU_DNGCNT_SEL_8812F(x) \ 13101 (((x) >> BIT_SHIFT_MU_DNGCNT_SEL_8812F) & BIT_MASK_MU_DNGCNT_SEL_8812F) 13102 #define BIT_SET_MU_DNGCNT_SEL_8812F(x, v) \ 13103 (BIT_CLEAR_MU_DNGCNT_SEL_8812F(x) | BIT_MU_DNGCNT_SEL_8812F(v)) 13104 13105 #define BIT_SHIFT_MU_DNGCNT_8812F 0 13106 #define BIT_MASK_MU_DNGCNT_8812F 0xffff 13107 #define BIT_MU_DNGCNT_8812F(x) \ 13108 (((x) & BIT_MASK_MU_DNGCNT_8812F) << BIT_SHIFT_MU_DNGCNT_8812F) 13109 #define BITS_MU_DNGCNT_8812F \ 13110 (BIT_MASK_MU_DNGCNT_8812F << BIT_SHIFT_MU_DNGCNT_8812F) 13111 #define BIT_CLEAR_MU_DNGCNT_8812F(x) ((x) & (~BITS_MU_DNGCNT_8812F)) 13112 #define BIT_GET_MU_DNGCNT_8812F(x) \ 13113 (((x) >> BIT_SHIFT_MU_DNGCNT_8812F) & BIT_MASK_MU_DNGCNT_8812F) 13114 #define BIT_SET_MU_DNGCNT_8812F(x, v) \ 13115 (BIT_CLEAR_MU_DNGCNT_8812F(x) | BIT_MU_DNGCNT_8812F(v)) 13116 13117 /* 2 REG_SU_DURATION_8812F */ 13118 13119 #define BIT_SHIFT_SU_DURATION_8812F 0 13120 #define BIT_MASK_SU_DURATION_8812F 0xffff 13121 #define BIT_SU_DURATION_8812F(x) \ 13122 (((x) & BIT_MASK_SU_DURATION_8812F) << BIT_SHIFT_SU_DURATION_8812F) 13123 #define BITS_SU_DURATION_8812F \ 13124 (BIT_MASK_SU_DURATION_8812F << BIT_SHIFT_SU_DURATION_8812F) 13125 #define BIT_CLEAR_SU_DURATION_8812F(x) ((x) & (~BITS_SU_DURATION_8812F)) 13126 #define BIT_GET_SU_DURATION_8812F(x) \ 13127 (((x) >> BIT_SHIFT_SU_DURATION_8812F) & BIT_MASK_SU_DURATION_8812F) 13128 #define BIT_SET_SU_DURATION_8812F(x, v) \ 13129 (BIT_CLEAR_SU_DURATION_8812F(x) | BIT_SU_DURATION_8812F(v)) 13130 13131 /* 2 REG_MU_DURATION_8812F */ 13132 13133 #define BIT_SHIFT_MU_DURATION_8812F 0 13134 #define BIT_MASK_MU_DURATION_8812F 0xffff 13135 #define BIT_MU_DURATION_8812F(x) \ 13136 (((x) & BIT_MASK_MU_DURATION_8812F) << BIT_SHIFT_MU_DURATION_8812F) 13137 #define BITS_MU_DURATION_8812F \ 13138 (BIT_MASK_MU_DURATION_8812F << BIT_SHIFT_MU_DURATION_8812F) 13139 #define BIT_CLEAR_MU_DURATION_8812F(x) ((x) & (~BITS_MU_DURATION_8812F)) 13140 #define BIT_GET_MU_DURATION_8812F(x) \ 13141 (((x) >> BIT_SHIFT_MU_DURATION_8812F) & BIT_MASK_MU_DURATION_8812F) 13142 #define BIT_SET_MU_DURATION_8812F(x, v) \ 13143 (BIT_CLEAR_MU_DURATION_8812F(x) | BIT_MU_DURATION_8812F(v)) 13144 13145 /* 2 REG_HW_NDPA_RTY_LIMIT_8812F */ 13146 13147 #define BIT_SHIFT_HW_NDPA_RTY_LIMIT_8812F 0 13148 #define BIT_MASK_HW_NDPA_RTY_LIMIT_8812F 0xf 13149 #define BIT_HW_NDPA_RTY_LIMIT_8812F(x) \ 13150 (((x) & BIT_MASK_HW_NDPA_RTY_LIMIT_8812F) \ 13151 << BIT_SHIFT_HW_NDPA_RTY_LIMIT_8812F) 13152 #define BITS_HW_NDPA_RTY_LIMIT_8812F \ 13153 (BIT_MASK_HW_NDPA_RTY_LIMIT_8812F << BIT_SHIFT_HW_NDPA_RTY_LIMIT_8812F) 13154 #define BIT_CLEAR_HW_NDPA_RTY_LIMIT_8812F(x) \ 13155 ((x) & (~BITS_HW_NDPA_RTY_LIMIT_8812F)) 13156 #define BIT_GET_HW_NDPA_RTY_LIMIT_8812F(x) \ 13157 (((x) >> BIT_SHIFT_HW_NDPA_RTY_LIMIT_8812F) & \ 13158 BIT_MASK_HW_NDPA_RTY_LIMIT_8812F) 13159 #define BIT_SET_HW_NDPA_RTY_LIMIT_8812F(x, v) \ 13160 (BIT_CLEAR_HW_NDPA_RTY_LIMIT_8812F(x) | BIT_HW_NDPA_RTY_LIMIT_8812F(v)) 13161 13162 /* 2 REG_RSVD_8812F */ 13163 13164 /* 2 REG_NOT_VALID_8812F */ 13165 13166 /* 2 REG_EDCA_VO_PARAM_8812F */ 13167 13168 #define BIT_SHIFT_TXOPLIMIT_8812F 16 13169 #define BIT_MASK_TXOPLIMIT_8812F 0x7ff 13170 #define BIT_TXOPLIMIT_8812F(x) \ 13171 (((x) & BIT_MASK_TXOPLIMIT_8812F) << BIT_SHIFT_TXOPLIMIT_8812F) 13172 #define BITS_TXOPLIMIT_8812F \ 13173 (BIT_MASK_TXOPLIMIT_8812F << BIT_SHIFT_TXOPLIMIT_8812F) 13174 #define BIT_CLEAR_TXOPLIMIT_8812F(x) ((x) & (~BITS_TXOPLIMIT_8812F)) 13175 #define BIT_GET_TXOPLIMIT_8812F(x) \ 13176 (((x) >> BIT_SHIFT_TXOPLIMIT_8812F) & BIT_MASK_TXOPLIMIT_8812F) 13177 #define BIT_SET_TXOPLIMIT_8812F(x, v) \ 13178 (BIT_CLEAR_TXOPLIMIT_8812F(x) | BIT_TXOPLIMIT_8812F(v)) 13179 13180 #define BIT_SHIFT_CW_8812F 8 13181 #define BIT_MASK_CW_8812F 0xff 13182 #define BIT_CW_8812F(x) (((x) & BIT_MASK_CW_8812F) << BIT_SHIFT_CW_8812F) 13183 #define BITS_CW_8812F (BIT_MASK_CW_8812F << BIT_SHIFT_CW_8812F) 13184 #define BIT_CLEAR_CW_8812F(x) ((x) & (~BITS_CW_8812F)) 13185 #define BIT_GET_CW_8812F(x) (((x) >> BIT_SHIFT_CW_8812F) & BIT_MASK_CW_8812F) 13186 #define BIT_SET_CW_8812F(x, v) (BIT_CLEAR_CW_8812F(x) | BIT_CW_8812F(v)) 13187 13188 #define BIT_SHIFT_AIFS_8812F 0 13189 #define BIT_MASK_AIFS_8812F 0xff 13190 #define BIT_AIFS_8812F(x) (((x) & BIT_MASK_AIFS_8812F) << BIT_SHIFT_AIFS_8812F) 13191 #define BITS_AIFS_8812F (BIT_MASK_AIFS_8812F << BIT_SHIFT_AIFS_8812F) 13192 #define BIT_CLEAR_AIFS_8812F(x) ((x) & (~BITS_AIFS_8812F)) 13193 #define BIT_GET_AIFS_8812F(x) \ 13194 (((x) >> BIT_SHIFT_AIFS_8812F) & BIT_MASK_AIFS_8812F) 13195 #define BIT_SET_AIFS_8812F(x, v) (BIT_CLEAR_AIFS_8812F(x) | BIT_AIFS_8812F(v)) 13196 13197 /* 2 REG_EDCA_VI_PARAM_8812F */ 13198 13199 /* 2 REG_NOT_VALID_8812F */ 13200 13201 #define BIT_SHIFT_TXOPLIMIT_8812F 16 13202 #define BIT_MASK_TXOPLIMIT_8812F 0x7ff 13203 #define BIT_TXOPLIMIT_8812F(x) \ 13204 (((x) & BIT_MASK_TXOPLIMIT_8812F) << BIT_SHIFT_TXOPLIMIT_8812F) 13205 #define BITS_TXOPLIMIT_8812F \ 13206 (BIT_MASK_TXOPLIMIT_8812F << BIT_SHIFT_TXOPLIMIT_8812F) 13207 #define BIT_CLEAR_TXOPLIMIT_8812F(x) ((x) & (~BITS_TXOPLIMIT_8812F)) 13208 #define BIT_GET_TXOPLIMIT_8812F(x) \ 13209 (((x) >> BIT_SHIFT_TXOPLIMIT_8812F) & BIT_MASK_TXOPLIMIT_8812F) 13210 #define BIT_SET_TXOPLIMIT_8812F(x, v) \ 13211 (BIT_CLEAR_TXOPLIMIT_8812F(x) | BIT_TXOPLIMIT_8812F(v)) 13212 13213 #define BIT_SHIFT_CW_8812F 8 13214 #define BIT_MASK_CW_8812F 0xff 13215 #define BIT_CW_8812F(x) (((x) & BIT_MASK_CW_8812F) << BIT_SHIFT_CW_8812F) 13216 #define BITS_CW_8812F (BIT_MASK_CW_8812F << BIT_SHIFT_CW_8812F) 13217 #define BIT_CLEAR_CW_8812F(x) ((x) & (~BITS_CW_8812F)) 13218 #define BIT_GET_CW_8812F(x) (((x) >> BIT_SHIFT_CW_8812F) & BIT_MASK_CW_8812F) 13219 #define BIT_SET_CW_8812F(x, v) (BIT_CLEAR_CW_8812F(x) | BIT_CW_8812F(v)) 13220 13221 #define BIT_SHIFT_AIFS_8812F 0 13222 #define BIT_MASK_AIFS_8812F 0xff 13223 #define BIT_AIFS_8812F(x) (((x) & BIT_MASK_AIFS_8812F) << BIT_SHIFT_AIFS_8812F) 13224 #define BITS_AIFS_8812F (BIT_MASK_AIFS_8812F << BIT_SHIFT_AIFS_8812F) 13225 #define BIT_CLEAR_AIFS_8812F(x) ((x) & (~BITS_AIFS_8812F)) 13226 #define BIT_GET_AIFS_8812F(x) \ 13227 (((x) >> BIT_SHIFT_AIFS_8812F) & BIT_MASK_AIFS_8812F) 13228 #define BIT_SET_AIFS_8812F(x, v) (BIT_CLEAR_AIFS_8812F(x) | BIT_AIFS_8812F(v)) 13229 13230 /* 2 REG_EDCA_BE_PARAM_8812F */ 13231 13232 /* 2 REG_NOT_VALID_8812F */ 13233 13234 #define BIT_SHIFT_TXOPLIMIT_8812F 16 13235 #define BIT_MASK_TXOPLIMIT_8812F 0x7ff 13236 #define BIT_TXOPLIMIT_8812F(x) \ 13237 (((x) & BIT_MASK_TXOPLIMIT_8812F) << BIT_SHIFT_TXOPLIMIT_8812F) 13238 #define BITS_TXOPLIMIT_8812F \ 13239 (BIT_MASK_TXOPLIMIT_8812F << BIT_SHIFT_TXOPLIMIT_8812F) 13240 #define BIT_CLEAR_TXOPLIMIT_8812F(x) ((x) & (~BITS_TXOPLIMIT_8812F)) 13241 #define BIT_GET_TXOPLIMIT_8812F(x) \ 13242 (((x) >> BIT_SHIFT_TXOPLIMIT_8812F) & BIT_MASK_TXOPLIMIT_8812F) 13243 #define BIT_SET_TXOPLIMIT_8812F(x, v) \ 13244 (BIT_CLEAR_TXOPLIMIT_8812F(x) | BIT_TXOPLIMIT_8812F(v)) 13245 13246 #define BIT_SHIFT_CW_8812F 8 13247 #define BIT_MASK_CW_8812F 0xff 13248 #define BIT_CW_8812F(x) (((x) & BIT_MASK_CW_8812F) << BIT_SHIFT_CW_8812F) 13249 #define BITS_CW_8812F (BIT_MASK_CW_8812F << BIT_SHIFT_CW_8812F) 13250 #define BIT_CLEAR_CW_8812F(x) ((x) & (~BITS_CW_8812F)) 13251 #define BIT_GET_CW_8812F(x) (((x) >> BIT_SHIFT_CW_8812F) & BIT_MASK_CW_8812F) 13252 #define BIT_SET_CW_8812F(x, v) (BIT_CLEAR_CW_8812F(x) | BIT_CW_8812F(v)) 13253 13254 #define BIT_SHIFT_AIFS_8812F 0 13255 #define BIT_MASK_AIFS_8812F 0xff 13256 #define BIT_AIFS_8812F(x) (((x) & BIT_MASK_AIFS_8812F) << BIT_SHIFT_AIFS_8812F) 13257 #define BITS_AIFS_8812F (BIT_MASK_AIFS_8812F << BIT_SHIFT_AIFS_8812F) 13258 #define BIT_CLEAR_AIFS_8812F(x) ((x) & (~BITS_AIFS_8812F)) 13259 #define BIT_GET_AIFS_8812F(x) \ 13260 (((x) >> BIT_SHIFT_AIFS_8812F) & BIT_MASK_AIFS_8812F) 13261 #define BIT_SET_AIFS_8812F(x, v) (BIT_CLEAR_AIFS_8812F(x) | BIT_AIFS_8812F(v)) 13262 13263 /* 2 REG_EDCA_BK_PARAM_8812F */ 13264 13265 /* 2 REG_NOT_VALID_8812F */ 13266 13267 #define BIT_SHIFT_TXOPLIMIT_8812F 16 13268 #define BIT_MASK_TXOPLIMIT_8812F 0x7ff 13269 #define BIT_TXOPLIMIT_8812F(x) \ 13270 (((x) & BIT_MASK_TXOPLIMIT_8812F) << BIT_SHIFT_TXOPLIMIT_8812F) 13271 #define BITS_TXOPLIMIT_8812F \ 13272 (BIT_MASK_TXOPLIMIT_8812F << BIT_SHIFT_TXOPLIMIT_8812F) 13273 #define BIT_CLEAR_TXOPLIMIT_8812F(x) ((x) & (~BITS_TXOPLIMIT_8812F)) 13274 #define BIT_GET_TXOPLIMIT_8812F(x) \ 13275 (((x) >> BIT_SHIFT_TXOPLIMIT_8812F) & BIT_MASK_TXOPLIMIT_8812F) 13276 #define BIT_SET_TXOPLIMIT_8812F(x, v) \ 13277 (BIT_CLEAR_TXOPLIMIT_8812F(x) | BIT_TXOPLIMIT_8812F(v)) 13278 13279 #define BIT_SHIFT_CW_8812F 8 13280 #define BIT_MASK_CW_8812F 0xff 13281 #define BIT_CW_8812F(x) (((x) & BIT_MASK_CW_8812F) << BIT_SHIFT_CW_8812F) 13282 #define BITS_CW_8812F (BIT_MASK_CW_8812F << BIT_SHIFT_CW_8812F) 13283 #define BIT_CLEAR_CW_8812F(x) ((x) & (~BITS_CW_8812F)) 13284 #define BIT_GET_CW_8812F(x) (((x) >> BIT_SHIFT_CW_8812F) & BIT_MASK_CW_8812F) 13285 #define BIT_SET_CW_8812F(x, v) (BIT_CLEAR_CW_8812F(x) | BIT_CW_8812F(v)) 13286 13287 #define BIT_SHIFT_AIFS_8812F 0 13288 #define BIT_MASK_AIFS_8812F 0xff 13289 #define BIT_AIFS_8812F(x) (((x) & BIT_MASK_AIFS_8812F) << BIT_SHIFT_AIFS_8812F) 13290 #define BITS_AIFS_8812F (BIT_MASK_AIFS_8812F << BIT_SHIFT_AIFS_8812F) 13291 #define BIT_CLEAR_AIFS_8812F(x) ((x) & (~BITS_AIFS_8812F)) 13292 #define BIT_GET_AIFS_8812F(x) \ 13293 (((x) >> BIT_SHIFT_AIFS_8812F) & BIT_MASK_AIFS_8812F) 13294 #define BIT_SET_AIFS_8812F(x, v) (BIT_CLEAR_AIFS_8812F(x) | BIT_AIFS_8812F(v)) 13295 13296 /* 2 REG_BCNTCFG_8812F */ 13297 13298 #define BIT_SHIFT_BCNCW_MAX_8812F 12 13299 #define BIT_MASK_BCNCW_MAX_8812F 0xf 13300 #define BIT_BCNCW_MAX_8812F(x) \ 13301 (((x) & BIT_MASK_BCNCW_MAX_8812F) << BIT_SHIFT_BCNCW_MAX_8812F) 13302 #define BITS_BCNCW_MAX_8812F \ 13303 (BIT_MASK_BCNCW_MAX_8812F << BIT_SHIFT_BCNCW_MAX_8812F) 13304 #define BIT_CLEAR_BCNCW_MAX_8812F(x) ((x) & (~BITS_BCNCW_MAX_8812F)) 13305 #define BIT_GET_BCNCW_MAX_8812F(x) \ 13306 (((x) >> BIT_SHIFT_BCNCW_MAX_8812F) & BIT_MASK_BCNCW_MAX_8812F) 13307 #define BIT_SET_BCNCW_MAX_8812F(x, v) \ 13308 (BIT_CLEAR_BCNCW_MAX_8812F(x) | BIT_BCNCW_MAX_8812F(v)) 13309 13310 #define BIT_SHIFT_BCNCW_MIN_8812F 8 13311 #define BIT_MASK_BCNCW_MIN_8812F 0xf 13312 #define BIT_BCNCW_MIN_8812F(x) \ 13313 (((x) & BIT_MASK_BCNCW_MIN_8812F) << BIT_SHIFT_BCNCW_MIN_8812F) 13314 #define BITS_BCNCW_MIN_8812F \ 13315 (BIT_MASK_BCNCW_MIN_8812F << BIT_SHIFT_BCNCW_MIN_8812F) 13316 #define BIT_CLEAR_BCNCW_MIN_8812F(x) ((x) & (~BITS_BCNCW_MIN_8812F)) 13317 #define BIT_GET_BCNCW_MIN_8812F(x) \ 13318 (((x) >> BIT_SHIFT_BCNCW_MIN_8812F) & BIT_MASK_BCNCW_MIN_8812F) 13319 #define BIT_SET_BCNCW_MIN_8812F(x, v) \ 13320 (BIT_CLEAR_BCNCW_MIN_8812F(x) | BIT_BCNCW_MIN_8812F(v)) 13321 13322 #define BIT_SHIFT_BCNIFS_8812F 0 13323 #define BIT_MASK_BCNIFS_8812F 0xff 13324 #define BIT_BCNIFS_8812F(x) \ 13325 (((x) & BIT_MASK_BCNIFS_8812F) << BIT_SHIFT_BCNIFS_8812F) 13326 #define BITS_BCNIFS_8812F (BIT_MASK_BCNIFS_8812F << BIT_SHIFT_BCNIFS_8812F) 13327 #define BIT_CLEAR_BCNIFS_8812F(x) ((x) & (~BITS_BCNIFS_8812F)) 13328 #define BIT_GET_BCNIFS_8812F(x) \ 13329 (((x) >> BIT_SHIFT_BCNIFS_8812F) & BIT_MASK_BCNIFS_8812F) 13330 #define BIT_SET_BCNIFS_8812F(x, v) \ 13331 (BIT_CLEAR_BCNIFS_8812F(x) | BIT_BCNIFS_8812F(v)) 13332 13333 /* 2 REG_NOT_VALID_8812F */ 13334 13335 /* 2 REG_PIFS_8812F */ 13336 13337 #define BIT_SHIFT_PIFS_8812F 0 13338 #define BIT_MASK_PIFS_8812F 0xff 13339 #define BIT_PIFS_8812F(x) (((x) & BIT_MASK_PIFS_8812F) << BIT_SHIFT_PIFS_8812F) 13340 #define BITS_PIFS_8812F (BIT_MASK_PIFS_8812F << BIT_SHIFT_PIFS_8812F) 13341 #define BIT_CLEAR_PIFS_8812F(x) ((x) & (~BITS_PIFS_8812F)) 13342 #define BIT_GET_PIFS_8812F(x) \ 13343 (((x) >> BIT_SHIFT_PIFS_8812F) & BIT_MASK_PIFS_8812F) 13344 #define BIT_SET_PIFS_8812F(x, v) (BIT_CLEAR_PIFS_8812F(x) | BIT_PIFS_8812F(v)) 13345 13346 /* 2 REG_RDG_PIFS_8812F */ 13347 13348 #define BIT_SHIFT_RDG_PIFS_8812F 0 13349 #define BIT_MASK_RDG_PIFS_8812F 0xff 13350 #define BIT_RDG_PIFS_8812F(x) \ 13351 (((x) & BIT_MASK_RDG_PIFS_8812F) << BIT_SHIFT_RDG_PIFS_8812F) 13352 #define BITS_RDG_PIFS_8812F \ 13353 (BIT_MASK_RDG_PIFS_8812F << BIT_SHIFT_RDG_PIFS_8812F) 13354 #define BIT_CLEAR_RDG_PIFS_8812F(x) ((x) & (~BITS_RDG_PIFS_8812F)) 13355 #define BIT_GET_RDG_PIFS_8812F(x) \ 13356 (((x) >> BIT_SHIFT_RDG_PIFS_8812F) & BIT_MASK_RDG_PIFS_8812F) 13357 #define BIT_SET_RDG_PIFS_8812F(x, v) \ 13358 (BIT_CLEAR_RDG_PIFS_8812F(x) | BIT_RDG_PIFS_8812F(v)) 13359 13360 /* 2 REG_SIFS_8812F */ 13361 13362 #define BIT_SHIFT_SIFS_OFDM_TRX_8812F 24 13363 #define BIT_MASK_SIFS_OFDM_TRX_8812F 0xff 13364 #define BIT_SIFS_OFDM_TRX_8812F(x) \ 13365 (((x) & BIT_MASK_SIFS_OFDM_TRX_8812F) << BIT_SHIFT_SIFS_OFDM_TRX_8812F) 13366 #define BITS_SIFS_OFDM_TRX_8812F \ 13367 (BIT_MASK_SIFS_OFDM_TRX_8812F << BIT_SHIFT_SIFS_OFDM_TRX_8812F) 13368 #define BIT_CLEAR_SIFS_OFDM_TRX_8812F(x) ((x) & (~BITS_SIFS_OFDM_TRX_8812F)) 13369 #define BIT_GET_SIFS_OFDM_TRX_8812F(x) \ 13370 (((x) >> BIT_SHIFT_SIFS_OFDM_TRX_8812F) & BIT_MASK_SIFS_OFDM_TRX_8812F) 13371 #define BIT_SET_SIFS_OFDM_TRX_8812F(x, v) \ 13372 (BIT_CLEAR_SIFS_OFDM_TRX_8812F(x) | BIT_SIFS_OFDM_TRX_8812F(v)) 13373 13374 #define BIT_SHIFT_SIFS_CCK_TRX_8812F 16 13375 #define BIT_MASK_SIFS_CCK_TRX_8812F 0xff 13376 #define BIT_SIFS_CCK_TRX_8812F(x) \ 13377 (((x) & BIT_MASK_SIFS_CCK_TRX_8812F) << BIT_SHIFT_SIFS_CCK_TRX_8812F) 13378 #define BITS_SIFS_CCK_TRX_8812F \ 13379 (BIT_MASK_SIFS_CCK_TRX_8812F << BIT_SHIFT_SIFS_CCK_TRX_8812F) 13380 #define BIT_CLEAR_SIFS_CCK_TRX_8812F(x) ((x) & (~BITS_SIFS_CCK_TRX_8812F)) 13381 #define BIT_GET_SIFS_CCK_TRX_8812F(x) \ 13382 (((x) >> BIT_SHIFT_SIFS_CCK_TRX_8812F) & BIT_MASK_SIFS_CCK_TRX_8812F) 13383 #define BIT_SET_SIFS_CCK_TRX_8812F(x, v) \ 13384 (BIT_CLEAR_SIFS_CCK_TRX_8812F(x) | BIT_SIFS_CCK_TRX_8812F(v)) 13385 13386 #define BIT_SHIFT_SIFS_OFDM_CTX_8812F 8 13387 #define BIT_MASK_SIFS_OFDM_CTX_8812F 0xff 13388 #define BIT_SIFS_OFDM_CTX_8812F(x) \ 13389 (((x) & BIT_MASK_SIFS_OFDM_CTX_8812F) << BIT_SHIFT_SIFS_OFDM_CTX_8812F) 13390 #define BITS_SIFS_OFDM_CTX_8812F \ 13391 (BIT_MASK_SIFS_OFDM_CTX_8812F << BIT_SHIFT_SIFS_OFDM_CTX_8812F) 13392 #define BIT_CLEAR_SIFS_OFDM_CTX_8812F(x) ((x) & (~BITS_SIFS_OFDM_CTX_8812F)) 13393 #define BIT_GET_SIFS_OFDM_CTX_8812F(x) \ 13394 (((x) >> BIT_SHIFT_SIFS_OFDM_CTX_8812F) & BIT_MASK_SIFS_OFDM_CTX_8812F) 13395 #define BIT_SET_SIFS_OFDM_CTX_8812F(x, v) \ 13396 (BIT_CLEAR_SIFS_OFDM_CTX_8812F(x) | BIT_SIFS_OFDM_CTX_8812F(v)) 13397 13398 #define BIT_SHIFT_SIFS_CCK_CTX_8812F 0 13399 #define BIT_MASK_SIFS_CCK_CTX_8812F 0xff 13400 #define BIT_SIFS_CCK_CTX_8812F(x) \ 13401 (((x) & BIT_MASK_SIFS_CCK_CTX_8812F) << BIT_SHIFT_SIFS_CCK_CTX_8812F) 13402 #define BITS_SIFS_CCK_CTX_8812F \ 13403 (BIT_MASK_SIFS_CCK_CTX_8812F << BIT_SHIFT_SIFS_CCK_CTX_8812F) 13404 #define BIT_CLEAR_SIFS_CCK_CTX_8812F(x) ((x) & (~BITS_SIFS_CCK_CTX_8812F)) 13405 #define BIT_GET_SIFS_CCK_CTX_8812F(x) \ 13406 (((x) >> BIT_SHIFT_SIFS_CCK_CTX_8812F) & BIT_MASK_SIFS_CCK_CTX_8812F) 13407 #define BIT_SET_SIFS_CCK_CTX_8812F(x, v) \ 13408 (BIT_CLEAR_SIFS_CCK_CTX_8812F(x) | BIT_SIFS_CCK_CTX_8812F(v)) 13409 13410 /* 2 REG_TSFTR_SYN_OFFSET_8812F */ 13411 13412 #define BIT_SHIFT_TSFTR_SNC_OFFSET_8812F 0 13413 #define BIT_MASK_TSFTR_SNC_OFFSET_8812F 0xffff 13414 #define BIT_TSFTR_SNC_OFFSET_8812F(x) \ 13415 (((x) & BIT_MASK_TSFTR_SNC_OFFSET_8812F) \ 13416 << BIT_SHIFT_TSFTR_SNC_OFFSET_8812F) 13417 #define BITS_TSFTR_SNC_OFFSET_8812F \ 13418 (BIT_MASK_TSFTR_SNC_OFFSET_8812F << BIT_SHIFT_TSFTR_SNC_OFFSET_8812F) 13419 #define BIT_CLEAR_TSFTR_SNC_OFFSET_8812F(x) \ 13420 ((x) & (~BITS_TSFTR_SNC_OFFSET_8812F)) 13421 #define BIT_GET_TSFTR_SNC_OFFSET_8812F(x) \ 13422 (((x) >> BIT_SHIFT_TSFTR_SNC_OFFSET_8812F) & \ 13423 BIT_MASK_TSFTR_SNC_OFFSET_8812F) 13424 #define BIT_SET_TSFTR_SNC_OFFSET_8812F(x, v) \ 13425 (BIT_CLEAR_TSFTR_SNC_OFFSET_8812F(x) | BIT_TSFTR_SNC_OFFSET_8812F(v)) 13426 13427 /* 2 REG_AGGR_BREAK_TIME_8812F */ 13428 13429 #define BIT_SHIFT_AGGR_BK_TIME_8812F 0 13430 #define BIT_MASK_AGGR_BK_TIME_8812F 0xff 13431 #define BIT_AGGR_BK_TIME_8812F(x) \ 13432 (((x) & BIT_MASK_AGGR_BK_TIME_8812F) << BIT_SHIFT_AGGR_BK_TIME_8812F) 13433 #define BITS_AGGR_BK_TIME_8812F \ 13434 (BIT_MASK_AGGR_BK_TIME_8812F << BIT_SHIFT_AGGR_BK_TIME_8812F) 13435 #define BIT_CLEAR_AGGR_BK_TIME_8812F(x) ((x) & (~BITS_AGGR_BK_TIME_8812F)) 13436 #define BIT_GET_AGGR_BK_TIME_8812F(x) \ 13437 (((x) >> BIT_SHIFT_AGGR_BK_TIME_8812F) & BIT_MASK_AGGR_BK_TIME_8812F) 13438 #define BIT_SET_AGGR_BK_TIME_8812F(x, v) \ 13439 (BIT_CLEAR_AGGR_BK_TIME_8812F(x) | BIT_AGGR_BK_TIME_8812F(v)) 13440 13441 /* 2 REG_SLOT_8812F */ 13442 13443 #define BIT_SHIFT_SLOT_8812F 0 13444 #define BIT_MASK_SLOT_8812F 0xff 13445 #define BIT_SLOT_8812F(x) (((x) & BIT_MASK_SLOT_8812F) << BIT_SHIFT_SLOT_8812F) 13446 #define BITS_SLOT_8812F (BIT_MASK_SLOT_8812F << BIT_SHIFT_SLOT_8812F) 13447 #define BIT_CLEAR_SLOT_8812F(x) ((x) & (~BITS_SLOT_8812F)) 13448 #define BIT_GET_SLOT_8812F(x) \ 13449 (((x) >> BIT_SHIFT_SLOT_8812F) & BIT_MASK_SLOT_8812F) 13450 #define BIT_SET_SLOT_8812F(x, v) (BIT_CLEAR_SLOT_8812F(x) | BIT_SLOT_8812F(v)) 13451 13452 /* 2 REG_NOA_ON_ERLY_TIME_8812F */ 13453 13454 #define BIT_SHIFT__NOA_ON_ERLY_TIME_8812F 0 13455 #define BIT_MASK__NOA_ON_ERLY_TIME_8812F 0xff 13456 #define BIT__NOA_ON_ERLY_TIME_8812F(x) \ 13457 (((x) & BIT_MASK__NOA_ON_ERLY_TIME_8812F) \ 13458 << BIT_SHIFT__NOA_ON_ERLY_TIME_8812F) 13459 #define BITS__NOA_ON_ERLY_TIME_8812F \ 13460 (BIT_MASK__NOA_ON_ERLY_TIME_8812F << BIT_SHIFT__NOA_ON_ERLY_TIME_8812F) 13461 #define BIT_CLEAR__NOA_ON_ERLY_TIME_8812F(x) \ 13462 ((x) & (~BITS__NOA_ON_ERLY_TIME_8812F)) 13463 #define BIT_GET__NOA_ON_ERLY_TIME_8812F(x) \ 13464 (((x) >> BIT_SHIFT__NOA_ON_ERLY_TIME_8812F) & \ 13465 BIT_MASK__NOA_ON_ERLY_TIME_8812F) 13466 #define BIT_SET__NOA_ON_ERLY_TIME_8812F(x, v) \ 13467 (BIT_CLEAR__NOA_ON_ERLY_TIME_8812F(x) | BIT__NOA_ON_ERLY_TIME_8812F(v)) 13468 13469 /* 2 REG_NOA_OFF_ERLY_TIME_8812F */ 13470 13471 #define BIT_SHIFT__NOA_OFF_ERLY_TIME_8812F 0 13472 #define BIT_MASK__NOA_OFF_ERLY_TIME_8812F 0xff 13473 #define BIT__NOA_OFF_ERLY_TIME_8812F(x) \ 13474 (((x) & BIT_MASK__NOA_OFF_ERLY_TIME_8812F) \ 13475 << BIT_SHIFT__NOA_OFF_ERLY_TIME_8812F) 13476 #define BITS__NOA_OFF_ERLY_TIME_8812F \ 13477 (BIT_MASK__NOA_OFF_ERLY_TIME_8812F \ 13478 << BIT_SHIFT__NOA_OFF_ERLY_TIME_8812F) 13479 #define BIT_CLEAR__NOA_OFF_ERLY_TIME_8812F(x) \ 13480 ((x) & (~BITS__NOA_OFF_ERLY_TIME_8812F)) 13481 #define BIT_GET__NOA_OFF_ERLY_TIME_8812F(x) \ 13482 (((x) >> BIT_SHIFT__NOA_OFF_ERLY_TIME_8812F) & \ 13483 BIT_MASK__NOA_OFF_ERLY_TIME_8812F) 13484 #define BIT_SET__NOA_OFF_ERLY_TIME_8812F(x, v) \ 13485 (BIT_CLEAR__NOA_OFF_ERLY_TIME_8812F(x) | \ 13486 BIT__NOA_OFF_ERLY_TIME_8812F(v)) 13487 13488 /* 2 REG_NOT_VALID_8812F */ 13489 13490 /* 2 REG_NOT_VALID_8812F */ 13491 13492 /* 2 REG_TX_PTCL_CTRL_8812F */ 13493 #define BIT_DIS_EDCCA_8812F BIT(15) 13494 #define BIT_DIS_CCA_8812F BIT(14) 13495 #define BIT_LSIG_TXOP_TXCMD_NAV_8812F BIT(13) 13496 #define BIT_SIFS_BK_EN_8812F BIT(12) 13497 13498 #define BIT_SHIFT_TXQ_NAV_MSK_8812F 8 13499 #define BIT_MASK_TXQ_NAV_MSK_8812F 0xf 13500 #define BIT_TXQ_NAV_MSK_8812F(x) \ 13501 (((x) & BIT_MASK_TXQ_NAV_MSK_8812F) << BIT_SHIFT_TXQ_NAV_MSK_8812F) 13502 #define BITS_TXQ_NAV_MSK_8812F \ 13503 (BIT_MASK_TXQ_NAV_MSK_8812F << BIT_SHIFT_TXQ_NAV_MSK_8812F) 13504 #define BIT_CLEAR_TXQ_NAV_MSK_8812F(x) ((x) & (~BITS_TXQ_NAV_MSK_8812F)) 13505 #define BIT_GET_TXQ_NAV_MSK_8812F(x) \ 13506 (((x) >> BIT_SHIFT_TXQ_NAV_MSK_8812F) & BIT_MASK_TXQ_NAV_MSK_8812F) 13507 #define BIT_SET_TXQ_NAV_MSK_8812F(x, v) \ 13508 (BIT_CLEAR_TXQ_NAV_MSK_8812F(x) | BIT_TXQ_NAV_MSK_8812F(v)) 13509 13510 #define BIT_DIS_CW_8812F BIT(7) 13511 #define BIT_NAV_END_TXOP_8812F BIT(6) 13512 #define BIT_RDG_END_TXOP_8812F BIT(5) 13513 #define BIT_AC_INBCN_HOLD_8812F BIT(4) 13514 #define BIT_MGTQ_TXOP_EN_8812F BIT(3) 13515 #define BIT_MGTQ_RTSMF_EN_8812F BIT(2) 13516 #define BIT_HIQ_RTSMF_EN_8812F BIT(1) 13517 #define BIT_BCN_RTSMF_EN_8812F BIT(0) 13518 13519 /* 2 REG_TXPAUSE_8812F */ 13520 #define BIT_STOP_BCN_HI_MGT_8812F BIT(7) 13521 #define BIT_MAC_STOPBCNQ_8812F BIT(6) 13522 #define BIT_MAC_STOPHIQ_8812F BIT(5) 13523 #define BIT_MAC_STOPMGQ_8812F BIT(4) 13524 #define BIT_MAC_STOPBK_8812F BIT(3) 13525 #define BIT_MAC_STOPBE_8812F BIT(2) 13526 #define BIT_MAC_STOPVI_8812F BIT(1) 13527 #define BIT_MAC_STOPVO_8812F BIT(0) 13528 13529 /* 2 REG_DIS_TXREQ_CLR_8812F */ 13530 #define BIT_DIS_BT_CCA_8812F BIT(7) 13531 #define BIT_DIS_TXREQ_CLR_HI_8812F BIT(5) 13532 #define BIT_DIS_TXREQ_CLR_MGQ_8812F BIT(4) 13533 #define BIT_DIS_TXREQ_CLR_VO_8812F BIT(3) 13534 #define BIT_DIS_TXREQ_CLR_VI_8812F BIT(2) 13535 #define BIT_DIS_TXREQ_CLR_BE_8812F BIT(1) 13536 #define BIT_DIS_TXREQ_CLR_BK_8812F BIT(0) 13537 13538 /* 2 REG_RD_CTRL_8812F */ 13539 #define BIT_EN_CLR_TXREQ_INCCA_8812F BIT(15) 13540 #define BIT_DIS_TX_OVER_BCNQ_8812F BIT(14) 13541 #define BIT_EN_BCNERR_INCCCA_8812F BIT(13) 13542 #define BIT_EDCCA_MSK_CNTDOWN_EN_8812F BIT(11) 13543 #define BIT_DIS_TXOP_CFE_8812F BIT(10) 13544 #define BIT_DIS_LSIG_CFE_8812F BIT(9) 13545 #define BIT_DIS_STBC_CFE_8812F BIT(8) 13546 #define BIT_BKQ_RD_INIT_EN_8812F BIT(7) 13547 #define BIT_BEQ_RD_INIT_EN_8812F BIT(6) 13548 #define BIT_VIQ_RD_INIT_EN_8812F BIT(5) 13549 #define BIT_VOQ_RD_INIT_EN_8812F BIT(4) 13550 #define BIT_BKQ_RD_RESP_EN_8812F BIT(3) 13551 #define BIT_BEQ_RD_RESP_EN_8812F BIT(2) 13552 #define BIT_VIQ_RD_RESP_EN_8812F BIT(1) 13553 #define BIT_VOQ_RD_RESP_EN_8812F BIT(0) 13554 13555 /* 2 REG_MBSSID_CTRL_8812F */ 13556 #define BIT_MBID_BCNQ7_EN_8812F BIT(7) 13557 #define BIT_MBID_BCNQ6_EN_8812F BIT(6) 13558 #define BIT_MBID_BCNQ5_EN_8812F BIT(5) 13559 #define BIT_MBID_BCNQ4_EN_8812F BIT(4) 13560 #define BIT_MBID_BCNQ3_EN_8812F BIT(3) 13561 #define BIT_MBID_BCNQ2_EN_8812F BIT(2) 13562 #define BIT_MBID_BCNQ1_EN_8812F BIT(1) 13563 #define BIT_MBID_BCNQ0_EN_8812F BIT(0) 13564 13565 /* 2 REG_P2PPS_CTRL_8812F */ 13566 #define BIT_P2P_CTW_ALLSTASLEEP_8812F BIT(7) 13567 #define BIT_P2P_OFF_DISTX_EN_8812F BIT(6) 13568 #define BIT_PWR_MGT_EN_8812F BIT(5) 13569 #define BIT_P2P_NOA1_EN_8812F BIT(2) 13570 #define BIT_P2P_NOA0_EN_8812F BIT(1) 13571 13572 /* 2 REG_PKT_LIFETIME_CTRL_8812F */ 13573 #define BIT_EN_P2P_CTWND1_8812F BIT(23) 13574 #define BIT_EN_BKF_CLR_TXREQ_8812F BIT(22) 13575 #define BIT_EN_TSFBIT32_RST_P2P_8812F BIT(21) 13576 #define BIT_EN_BCN_TX_BTCCA_8812F BIT(20) 13577 #define BIT_DIS_PKT_TX_ATIM_8812F BIT(19) 13578 #define BIT_DIS_BCN_DIS_CTN_8812F BIT(18) 13579 #define BIT_EN_NAVEND_RST_TXOP_8812F BIT(17) 13580 #define BIT_EN_FILTER_CCA_8812F BIT(16) 13581 13582 #define BIT_SHIFT_CCA_FILTER_THRS_8812F 8 13583 #define BIT_MASK_CCA_FILTER_THRS_8812F 0xff 13584 #define BIT_CCA_FILTER_THRS_8812F(x) \ 13585 (((x) & BIT_MASK_CCA_FILTER_THRS_8812F) \ 13586 << BIT_SHIFT_CCA_FILTER_THRS_8812F) 13587 #define BITS_CCA_FILTER_THRS_8812F \ 13588 (BIT_MASK_CCA_FILTER_THRS_8812F << BIT_SHIFT_CCA_FILTER_THRS_8812F) 13589 #define BIT_CLEAR_CCA_FILTER_THRS_8812F(x) ((x) & (~BITS_CCA_FILTER_THRS_8812F)) 13590 #define BIT_GET_CCA_FILTER_THRS_8812F(x) \ 13591 (((x) >> BIT_SHIFT_CCA_FILTER_THRS_8812F) & \ 13592 BIT_MASK_CCA_FILTER_THRS_8812F) 13593 #define BIT_SET_CCA_FILTER_THRS_8812F(x, v) \ 13594 (BIT_CLEAR_CCA_FILTER_THRS_8812F(x) | BIT_CCA_FILTER_THRS_8812F(v)) 13595 13596 #define BIT_SHIFT_EDCCA_THRS_8812F 0 13597 #define BIT_MASK_EDCCA_THRS_8812F 0xff 13598 #define BIT_EDCCA_THRS_8812F(x) \ 13599 (((x) & BIT_MASK_EDCCA_THRS_8812F) << BIT_SHIFT_EDCCA_THRS_8812F) 13600 #define BITS_EDCCA_THRS_8812F \ 13601 (BIT_MASK_EDCCA_THRS_8812F << BIT_SHIFT_EDCCA_THRS_8812F) 13602 #define BIT_CLEAR_EDCCA_THRS_8812F(x) ((x) & (~BITS_EDCCA_THRS_8812F)) 13603 #define BIT_GET_EDCCA_THRS_8812F(x) \ 13604 (((x) >> BIT_SHIFT_EDCCA_THRS_8812F) & BIT_MASK_EDCCA_THRS_8812F) 13605 #define BIT_SET_EDCCA_THRS_8812F(x, v) \ 13606 (BIT_CLEAR_EDCCA_THRS_8812F(x) | BIT_EDCCA_THRS_8812F(v)) 13607 13608 /* 2 REG_P2PPS_SPEC_STATE_8812F */ 13609 #define BIT_SPEC_POWER_STATE_8812F BIT(7) 13610 #define BIT_SPEC_CTWINDOW_ON_8812F BIT(6) 13611 #define BIT_SPEC_BEACON_AREA_ON_8812F BIT(5) 13612 #define BIT_SPEC_CTWIN_EARLY_DISTX_8812F BIT(4) 13613 #define BIT_SPEC_NOA1_OFF_PERIOD_8812F BIT(3) 13614 #define BIT_SPEC_FORCE_DOZE1_8812F BIT(2) 13615 #define BIT_SPEC_NOA0_OFF_PERIOD_8812F BIT(1) 13616 #define BIT_SPEC_FORCE_DOZE0_8812F BIT(0) 13617 13618 /* 2 REG_TXOP_LIMIT_CTRL_8812F */ 13619 13620 #define BIT_SHIFT_TXOP_TBTT_CNT_8812F 24 13621 #define BIT_MASK_TXOP_TBTT_CNT_8812F 0xff 13622 #define BIT_TXOP_TBTT_CNT_8812F(x) \ 13623 (((x) & BIT_MASK_TXOP_TBTT_CNT_8812F) << BIT_SHIFT_TXOP_TBTT_CNT_8812F) 13624 #define BITS_TXOP_TBTT_CNT_8812F \ 13625 (BIT_MASK_TXOP_TBTT_CNT_8812F << BIT_SHIFT_TXOP_TBTT_CNT_8812F) 13626 #define BIT_CLEAR_TXOP_TBTT_CNT_8812F(x) ((x) & (~BITS_TXOP_TBTT_CNT_8812F)) 13627 #define BIT_GET_TXOP_TBTT_CNT_8812F(x) \ 13628 (((x) >> BIT_SHIFT_TXOP_TBTT_CNT_8812F) & BIT_MASK_TXOP_TBTT_CNT_8812F) 13629 #define BIT_SET_TXOP_TBTT_CNT_8812F(x, v) \ 13630 (BIT_CLEAR_TXOP_TBTT_CNT_8812F(x) | BIT_TXOP_TBTT_CNT_8812F(v)) 13631 13632 #define BIT_SHIFT_TXOP_TBTT_CNT_SEL_8812F 20 13633 #define BIT_MASK_TXOP_TBTT_CNT_SEL_8812F 0xf 13634 #define BIT_TXOP_TBTT_CNT_SEL_8812F(x) \ 13635 (((x) & BIT_MASK_TXOP_TBTT_CNT_SEL_8812F) \ 13636 << BIT_SHIFT_TXOP_TBTT_CNT_SEL_8812F) 13637 #define BITS_TXOP_TBTT_CNT_SEL_8812F \ 13638 (BIT_MASK_TXOP_TBTT_CNT_SEL_8812F << BIT_SHIFT_TXOP_TBTT_CNT_SEL_8812F) 13639 #define BIT_CLEAR_TXOP_TBTT_CNT_SEL_8812F(x) \ 13640 ((x) & (~BITS_TXOP_TBTT_CNT_SEL_8812F)) 13641 #define BIT_GET_TXOP_TBTT_CNT_SEL_8812F(x) \ 13642 (((x) >> BIT_SHIFT_TXOP_TBTT_CNT_SEL_8812F) & \ 13643 BIT_MASK_TXOP_TBTT_CNT_SEL_8812F) 13644 #define BIT_SET_TXOP_TBTT_CNT_SEL_8812F(x, v) \ 13645 (BIT_CLEAR_TXOP_TBTT_CNT_SEL_8812F(x) | BIT_TXOP_TBTT_CNT_SEL_8812F(v)) 13646 13647 #define BIT_SHIFT_TXOP_LMT_EN_8812F 16 13648 #define BIT_MASK_TXOP_LMT_EN_8812F 0xf 13649 #define BIT_TXOP_LMT_EN_8812F(x) \ 13650 (((x) & BIT_MASK_TXOP_LMT_EN_8812F) << BIT_SHIFT_TXOP_LMT_EN_8812F) 13651 #define BITS_TXOP_LMT_EN_8812F \ 13652 (BIT_MASK_TXOP_LMT_EN_8812F << BIT_SHIFT_TXOP_LMT_EN_8812F) 13653 #define BIT_CLEAR_TXOP_LMT_EN_8812F(x) ((x) & (~BITS_TXOP_LMT_EN_8812F)) 13654 #define BIT_GET_TXOP_LMT_EN_8812F(x) \ 13655 (((x) >> BIT_SHIFT_TXOP_LMT_EN_8812F) & BIT_MASK_TXOP_LMT_EN_8812F) 13656 #define BIT_SET_TXOP_LMT_EN_8812F(x, v) \ 13657 (BIT_CLEAR_TXOP_LMT_EN_8812F(x) | BIT_TXOP_LMT_EN_8812F(v)) 13658 13659 #define BIT_SHIFT_TXOP_LMT_TX_TIME_8812F 8 13660 #define BIT_MASK_TXOP_LMT_TX_TIME_8812F 0xff 13661 #define BIT_TXOP_LMT_TX_TIME_8812F(x) \ 13662 (((x) & BIT_MASK_TXOP_LMT_TX_TIME_8812F) \ 13663 << BIT_SHIFT_TXOP_LMT_TX_TIME_8812F) 13664 #define BITS_TXOP_LMT_TX_TIME_8812F \ 13665 (BIT_MASK_TXOP_LMT_TX_TIME_8812F << BIT_SHIFT_TXOP_LMT_TX_TIME_8812F) 13666 #define BIT_CLEAR_TXOP_LMT_TX_TIME_8812F(x) \ 13667 ((x) & (~BITS_TXOP_LMT_TX_TIME_8812F)) 13668 #define BIT_GET_TXOP_LMT_TX_TIME_8812F(x) \ 13669 (((x) >> BIT_SHIFT_TXOP_LMT_TX_TIME_8812F) & \ 13670 BIT_MASK_TXOP_LMT_TX_TIME_8812F) 13671 #define BIT_SET_TXOP_LMT_TX_TIME_8812F(x, v) \ 13672 (BIT_CLEAR_TXOP_LMT_TX_TIME_8812F(x) | BIT_TXOP_LMT_TX_TIME_8812F(v)) 13673 13674 #define BIT_TXOP_CNT_TRIGGER_RESET_8812F BIT(7) 13675 13676 #define BIT_SHIFT_TXOP_LMT_PKT_NUM_8812F 0 13677 #define BIT_MASK_TXOP_LMT_PKT_NUM_8812F 0x3f 13678 #define BIT_TXOP_LMT_PKT_NUM_8812F(x) \ 13679 (((x) & BIT_MASK_TXOP_LMT_PKT_NUM_8812F) \ 13680 << BIT_SHIFT_TXOP_LMT_PKT_NUM_8812F) 13681 #define BITS_TXOP_LMT_PKT_NUM_8812F \ 13682 (BIT_MASK_TXOP_LMT_PKT_NUM_8812F << BIT_SHIFT_TXOP_LMT_PKT_NUM_8812F) 13683 #define BIT_CLEAR_TXOP_LMT_PKT_NUM_8812F(x) \ 13684 ((x) & (~BITS_TXOP_LMT_PKT_NUM_8812F)) 13685 #define BIT_GET_TXOP_LMT_PKT_NUM_8812F(x) \ 13686 (((x) >> BIT_SHIFT_TXOP_LMT_PKT_NUM_8812F) & \ 13687 BIT_MASK_TXOP_LMT_PKT_NUM_8812F) 13688 #define BIT_SET_TXOP_LMT_PKT_NUM_8812F(x, v) \ 13689 (BIT_CLEAR_TXOP_LMT_PKT_NUM_8812F(x) | BIT_TXOP_LMT_PKT_NUM_8812F(v)) 13690 13691 /* 2 REG_BAR_TX_CTRL_8812F */ 13692 13693 /* 2 REG_P2PON_DIS_TXTIME_8812F */ 13694 13695 #define BIT_SHIFT_P2PON_DIS_TXTIME_8812F 0 13696 #define BIT_MASK_P2PON_DIS_TXTIME_8812F 0xff 13697 #define BIT_P2PON_DIS_TXTIME_8812F(x) \ 13698 (((x) & BIT_MASK_P2PON_DIS_TXTIME_8812F) \ 13699 << BIT_SHIFT_P2PON_DIS_TXTIME_8812F) 13700 #define BITS_P2PON_DIS_TXTIME_8812F \ 13701 (BIT_MASK_P2PON_DIS_TXTIME_8812F << BIT_SHIFT_P2PON_DIS_TXTIME_8812F) 13702 #define BIT_CLEAR_P2PON_DIS_TXTIME_8812F(x) \ 13703 ((x) & (~BITS_P2PON_DIS_TXTIME_8812F)) 13704 #define BIT_GET_P2PON_DIS_TXTIME_8812F(x) \ 13705 (((x) >> BIT_SHIFT_P2PON_DIS_TXTIME_8812F) & \ 13706 BIT_MASK_P2PON_DIS_TXTIME_8812F) 13707 #define BIT_SET_P2PON_DIS_TXTIME_8812F(x, v) \ 13708 (BIT_CLEAR_P2PON_DIS_TXTIME_8812F(x) | BIT_P2PON_DIS_TXTIME_8812F(v)) 13709 13710 /* 2 REG_NOT_VALID_8812F */ 13711 13712 /* 2 REG_NOT_VALID_8812F */ 13713 13714 /* 2 REG_CCA_TXEN_CNT_8812F */ 13715 #define BIT_ENABLE_STOP_UPDATE_NAV_8812F BIT(21) 13716 #define BIT_ENABLE_GEN_RANDON_SLOT_TX_8812F BIT(20) 13717 #define BIT_ENABLE_RANDOM_SHIFT_TX_8812F BIT(19) 13718 #define BIT_ENABLE_EDCA_REF_FUNCTION_8812F BIT(18) 13719 #define BIT_CCA_TXEN_CNT_SWITCH_8812F BIT(17) 13720 #define BIT_CCA_TXEN_CNT_EN_8812F BIT(16) 13721 13722 #define BIT_SHIFT_CCA_TXEN_BIG_CNT_8812F 8 13723 #define BIT_MASK_CCA_TXEN_BIG_CNT_8812F 0xff 13724 #define BIT_CCA_TXEN_BIG_CNT_8812F(x) \ 13725 (((x) & BIT_MASK_CCA_TXEN_BIG_CNT_8812F) \ 13726 << BIT_SHIFT_CCA_TXEN_BIG_CNT_8812F) 13727 #define BITS_CCA_TXEN_BIG_CNT_8812F \ 13728 (BIT_MASK_CCA_TXEN_BIG_CNT_8812F << BIT_SHIFT_CCA_TXEN_BIG_CNT_8812F) 13729 #define BIT_CLEAR_CCA_TXEN_BIG_CNT_8812F(x) \ 13730 ((x) & (~BITS_CCA_TXEN_BIG_CNT_8812F)) 13731 #define BIT_GET_CCA_TXEN_BIG_CNT_8812F(x) \ 13732 (((x) >> BIT_SHIFT_CCA_TXEN_BIG_CNT_8812F) & \ 13733 BIT_MASK_CCA_TXEN_BIG_CNT_8812F) 13734 #define BIT_SET_CCA_TXEN_BIG_CNT_8812F(x, v) \ 13735 (BIT_CLEAR_CCA_TXEN_BIG_CNT_8812F(x) | BIT_CCA_TXEN_BIG_CNT_8812F(v)) 13736 13737 #define BIT_SHIFT_CCA_TXEN_SMALL_CNT_8812F 0 13738 #define BIT_MASK_CCA_TXEN_SMALL_CNT_8812F 0xff 13739 #define BIT_CCA_TXEN_SMALL_CNT_8812F(x) \ 13740 (((x) & BIT_MASK_CCA_TXEN_SMALL_CNT_8812F) \ 13741 << BIT_SHIFT_CCA_TXEN_SMALL_CNT_8812F) 13742 #define BITS_CCA_TXEN_SMALL_CNT_8812F \ 13743 (BIT_MASK_CCA_TXEN_SMALL_CNT_8812F \ 13744 << BIT_SHIFT_CCA_TXEN_SMALL_CNT_8812F) 13745 #define BIT_CLEAR_CCA_TXEN_SMALL_CNT_8812F(x) \ 13746 ((x) & (~BITS_CCA_TXEN_SMALL_CNT_8812F)) 13747 #define BIT_GET_CCA_TXEN_SMALL_CNT_8812F(x) \ 13748 (((x) >> BIT_SHIFT_CCA_TXEN_SMALL_CNT_8812F) & \ 13749 BIT_MASK_CCA_TXEN_SMALL_CNT_8812F) 13750 #define BIT_SET_CCA_TXEN_SMALL_CNT_8812F(x, v) \ 13751 (BIT_CLEAR_CCA_TXEN_SMALL_CNT_8812F(x) | \ 13752 BIT_CCA_TXEN_SMALL_CNT_8812F(v)) 13753 13754 /* 2 REG_MAX_INTER_COLLISION_8812F */ 13755 13756 #define BIT_SHIFT_MAX_INTER_COLLISION_BK_8812F 24 13757 #define BIT_MASK_MAX_INTER_COLLISION_BK_8812F 0xff 13758 #define BIT_MAX_INTER_COLLISION_BK_8812F(x) \ 13759 (((x) & BIT_MASK_MAX_INTER_COLLISION_BK_8812F) \ 13760 << BIT_SHIFT_MAX_INTER_COLLISION_BK_8812F) 13761 #define BITS_MAX_INTER_COLLISION_BK_8812F \ 13762 (BIT_MASK_MAX_INTER_COLLISION_BK_8812F \ 13763 << BIT_SHIFT_MAX_INTER_COLLISION_BK_8812F) 13764 #define BIT_CLEAR_MAX_INTER_COLLISION_BK_8812F(x) \ 13765 ((x) & (~BITS_MAX_INTER_COLLISION_BK_8812F)) 13766 #define BIT_GET_MAX_INTER_COLLISION_BK_8812F(x) \ 13767 (((x) >> BIT_SHIFT_MAX_INTER_COLLISION_BK_8812F) & \ 13768 BIT_MASK_MAX_INTER_COLLISION_BK_8812F) 13769 #define BIT_SET_MAX_INTER_COLLISION_BK_8812F(x, v) \ 13770 (BIT_CLEAR_MAX_INTER_COLLISION_BK_8812F(x) | \ 13771 BIT_MAX_INTER_COLLISION_BK_8812F(v)) 13772 13773 #define BIT_SHIFT_MAX_INTER_COLLISION_BE_8812F 16 13774 #define BIT_MASK_MAX_INTER_COLLISION_BE_8812F 0xff 13775 #define BIT_MAX_INTER_COLLISION_BE_8812F(x) \ 13776 (((x) & BIT_MASK_MAX_INTER_COLLISION_BE_8812F) \ 13777 << BIT_SHIFT_MAX_INTER_COLLISION_BE_8812F) 13778 #define BITS_MAX_INTER_COLLISION_BE_8812F \ 13779 (BIT_MASK_MAX_INTER_COLLISION_BE_8812F \ 13780 << BIT_SHIFT_MAX_INTER_COLLISION_BE_8812F) 13781 #define BIT_CLEAR_MAX_INTER_COLLISION_BE_8812F(x) \ 13782 ((x) & (~BITS_MAX_INTER_COLLISION_BE_8812F)) 13783 #define BIT_GET_MAX_INTER_COLLISION_BE_8812F(x) \ 13784 (((x) >> BIT_SHIFT_MAX_INTER_COLLISION_BE_8812F) & \ 13785 BIT_MASK_MAX_INTER_COLLISION_BE_8812F) 13786 #define BIT_SET_MAX_INTER_COLLISION_BE_8812F(x, v) \ 13787 (BIT_CLEAR_MAX_INTER_COLLISION_BE_8812F(x) | \ 13788 BIT_MAX_INTER_COLLISION_BE_8812F(v)) 13789 13790 #define BIT_SHIFT_MAX_INTER_COLLISION_VI_8812F 8 13791 #define BIT_MASK_MAX_INTER_COLLISION_VI_8812F 0xff 13792 #define BIT_MAX_INTER_COLLISION_VI_8812F(x) \ 13793 (((x) & BIT_MASK_MAX_INTER_COLLISION_VI_8812F) \ 13794 << BIT_SHIFT_MAX_INTER_COLLISION_VI_8812F) 13795 #define BITS_MAX_INTER_COLLISION_VI_8812F \ 13796 (BIT_MASK_MAX_INTER_COLLISION_VI_8812F \ 13797 << BIT_SHIFT_MAX_INTER_COLLISION_VI_8812F) 13798 #define BIT_CLEAR_MAX_INTER_COLLISION_VI_8812F(x) \ 13799 ((x) & (~BITS_MAX_INTER_COLLISION_VI_8812F)) 13800 #define BIT_GET_MAX_INTER_COLLISION_VI_8812F(x) \ 13801 (((x) >> BIT_SHIFT_MAX_INTER_COLLISION_VI_8812F) & \ 13802 BIT_MASK_MAX_INTER_COLLISION_VI_8812F) 13803 #define BIT_SET_MAX_INTER_COLLISION_VI_8812F(x, v) \ 13804 (BIT_CLEAR_MAX_INTER_COLLISION_VI_8812F(x) | \ 13805 BIT_MAX_INTER_COLLISION_VI_8812F(v)) 13806 13807 #define BIT_SHIFT_MAX_INTER_COLLISION_VO_8812F 0 13808 #define BIT_MASK_MAX_INTER_COLLISION_VO_8812F 0xff 13809 #define BIT_MAX_INTER_COLLISION_VO_8812F(x) \ 13810 (((x) & BIT_MASK_MAX_INTER_COLLISION_VO_8812F) \ 13811 << BIT_SHIFT_MAX_INTER_COLLISION_VO_8812F) 13812 #define BITS_MAX_INTER_COLLISION_VO_8812F \ 13813 (BIT_MASK_MAX_INTER_COLLISION_VO_8812F \ 13814 << BIT_SHIFT_MAX_INTER_COLLISION_VO_8812F) 13815 #define BIT_CLEAR_MAX_INTER_COLLISION_VO_8812F(x) \ 13816 ((x) & (~BITS_MAX_INTER_COLLISION_VO_8812F)) 13817 #define BIT_GET_MAX_INTER_COLLISION_VO_8812F(x) \ 13818 (((x) >> BIT_SHIFT_MAX_INTER_COLLISION_VO_8812F) & \ 13819 BIT_MASK_MAX_INTER_COLLISION_VO_8812F) 13820 #define BIT_SET_MAX_INTER_COLLISION_VO_8812F(x, v) \ 13821 (BIT_CLEAR_MAX_INTER_COLLISION_VO_8812F(x) | \ 13822 BIT_MAX_INTER_COLLISION_VO_8812F(v)) 13823 13824 /* 2 REG_MAX_INTER_COLLISION_CNT_8812F */ 13825 #define BIT_MAX_INTER_COLLISION_EN_8812F BIT(16) 13826 13827 #define BIT_SHIFT_MAX_INTER_COLLISION_CNT_BK_8812F 12 13828 #define BIT_MASK_MAX_INTER_COLLISION_CNT_BK_8812F 0xf 13829 #define BIT_MAX_INTER_COLLISION_CNT_BK_8812F(x) \ 13830 (((x) & BIT_MASK_MAX_INTER_COLLISION_CNT_BK_8812F) \ 13831 << BIT_SHIFT_MAX_INTER_COLLISION_CNT_BK_8812F) 13832 #define BITS_MAX_INTER_COLLISION_CNT_BK_8812F \ 13833 (BIT_MASK_MAX_INTER_COLLISION_CNT_BK_8812F \ 13834 << BIT_SHIFT_MAX_INTER_COLLISION_CNT_BK_8812F) 13835 #define BIT_CLEAR_MAX_INTER_COLLISION_CNT_BK_8812F(x) \ 13836 ((x) & (~BITS_MAX_INTER_COLLISION_CNT_BK_8812F)) 13837 #define BIT_GET_MAX_INTER_COLLISION_CNT_BK_8812F(x) \ 13838 (((x) >> BIT_SHIFT_MAX_INTER_COLLISION_CNT_BK_8812F) & \ 13839 BIT_MASK_MAX_INTER_COLLISION_CNT_BK_8812F) 13840 #define BIT_SET_MAX_INTER_COLLISION_CNT_BK_8812F(x, v) \ 13841 (BIT_CLEAR_MAX_INTER_COLLISION_CNT_BK_8812F(x) | \ 13842 BIT_MAX_INTER_COLLISION_CNT_BK_8812F(v)) 13843 13844 #define BIT_SHIFT_MAX_INTER_COLLISION_CNT_BE_8812F 8 13845 #define BIT_MASK_MAX_INTER_COLLISION_CNT_BE_8812F 0xf 13846 #define BIT_MAX_INTER_COLLISION_CNT_BE_8812F(x) \ 13847 (((x) & BIT_MASK_MAX_INTER_COLLISION_CNT_BE_8812F) \ 13848 << BIT_SHIFT_MAX_INTER_COLLISION_CNT_BE_8812F) 13849 #define BITS_MAX_INTER_COLLISION_CNT_BE_8812F \ 13850 (BIT_MASK_MAX_INTER_COLLISION_CNT_BE_8812F \ 13851 << BIT_SHIFT_MAX_INTER_COLLISION_CNT_BE_8812F) 13852 #define BIT_CLEAR_MAX_INTER_COLLISION_CNT_BE_8812F(x) \ 13853 ((x) & (~BITS_MAX_INTER_COLLISION_CNT_BE_8812F)) 13854 #define BIT_GET_MAX_INTER_COLLISION_CNT_BE_8812F(x) \ 13855 (((x) >> BIT_SHIFT_MAX_INTER_COLLISION_CNT_BE_8812F) & \ 13856 BIT_MASK_MAX_INTER_COLLISION_CNT_BE_8812F) 13857 #define BIT_SET_MAX_INTER_COLLISION_CNT_BE_8812F(x, v) \ 13858 (BIT_CLEAR_MAX_INTER_COLLISION_CNT_BE_8812F(x) | \ 13859 BIT_MAX_INTER_COLLISION_CNT_BE_8812F(v)) 13860 13861 #define BIT_SHIFT_MAX_INTER_COLLISION_CNT_VI_8812F 4 13862 #define BIT_MASK_MAX_INTER_COLLISION_CNT_VI_8812F 0xf 13863 #define BIT_MAX_INTER_COLLISION_CNT_VI_8812F(x) \ 13864 (((x) & BIT_MASK_MAX_INTER_COLLISION_CNT_VI_8812F) \ 13865 << BIT_SHIFT_MAX_INTER_COLLISION_CNT_VI_8812F) 13866 #define BITS_MAX_INTER_COLLISION_CNT_VI_8812F \ 13867 (BIT_MASK_MAX_INTER_COLLISION_CNT_VI_8812F \ 13868 << BIT_SHIFT_MAX_INTER_COLLISION_CNT_VI_8812F) 13869 #define BIT_CLEAR_MAX_INTER_COLLISION_CNT_VI_8812F(x) \ 13870 ((x) & (~BITS_MAX_INTER_COLLISION_CNT_VI_8812F)) 13871 #define BIT_GET_MAX_INTER_COLLISION_CNT_VI_8812F(x) \ 13872 (((x) >> BIT_SHIFT_MAX_INTER_COLLISION_CNT_VI_8812F) & \ 13873 BIT_MASK_MAX_INTER_COLLISION_CNT_VI_8812F) 13874 #define BIT_SET_MAX_INTER_COLLISION_CNT_VI_8812F(x, v) \ 13875 (BIT_CLEAR_MAX_INTER_COLLISION_CNT_VI_8812F(x) | \ 13876 BIT_MAX_INTER_COLLISION_CNT_VI_8812F(v)) 13877 13878 #define BIT_SHIFT_MAX_INTER_COLLISION_CNT_VO_8812F 0 13879 #define BIT_MASK_MAX_INTER_COLLISION_CNT_VO_8812F 0xf 13880 #define BIT_MAX_INTER_COLLISION_CNT_VO_8812F(x) \ 13881 (((x) & BIT_MASK_MAX_INTER_COLLISION_CNT_VO_8812F) \ 13882 << BIT_SHIFT_MAX_INTER_COLLISION_CNT_VO_8812F) 13883 #define BITS_MAX_INTER_COLLISION_CNT_VO_8812F \ 13884 (BIT_MASK_MAX_INTER_COLLISION_CNT_VO_8812F \ 13885 << BIT_SHIFT_MAX_INTER_COLLISION_CNT_VO_8812F) 13886 #define BIT_CLEAR_MAX_INTER_COLLISION_CNT_VO_8812F(x) \ 13887 ((x) & (~BITS_MAX_INTER_COLLISION_CNT_VO_8812F)) 13888 #define BIT_GET_MAX_INTER_COLLISION_CNT_VO_8812F(x) \ 13889 (((x) >> BIT_SHIFT_MAX_INTER_COLLISION_CNT_VO_8812F) & \ 13890 BIT_MASK_MAX_INTER_COLLISION_CNT_VO_8812F) 13891 #define BIT_SET_MAX_INTER_COLLISION_CNT_VO_8812F(x, v) \ 13892 (BIT_CLEAR_MAX_INTER_COLLISION_CNT_VO_8812F(x) | \ 13893 BIT_MAX_INTER_COLLISION_CNT_VO_8812F(v)) 13894 13895 /* 2 REG_TBTT_PROHIBIT_8812F */ 13896 13897 #define BIT_SHIFT_TBTT_HOLD_TIME_AP_8812F 8 13898 #define BIT_MASK_TBTT_HOLD_TIME_AP_8812F 0xfff 13899 #define BIT_TBTT_HOLD_TIME_AP_8812F(x) \ 13900 (((x) & BIT_MASK_TBTT_HOLD_TIME_AP_8812F) \ 13901 << BIT_SHIFT_TBTT_HOLD_TIME_AP_8812F) 13902 #define BITS_TBTT_HOLD_TIME_AP_8812F \ 13903 (BIT_MASK_TBTT_HOLD_TIME_AP_8812F << BIT_SHIFT_TBTT_HOLD_TIME_AP_8812F) 13904 #define BIT_CLEAR_TBTT_HOLD_TIME_AP_8812F(x) \ 13905 ((x) & (~BITS_TBTT_HOLD_TIME_AP_8812F)) 13906 #define BIT_GET_TBTT_HOLD_TIME_AP_8812F(x) \ 13907 (((x) >> BIT_SHIFT_TBTT_HOLD_TIME_AP_8812F) & \ 13908 BIT_MASK_TBTT_HOLD_TIME_AP_8812F) 13909 #define BIT_SET_TBTT_HOLD_TIME_AP_8812F(x, v) \ 13910 (BIT_CLEAR_TBTT_HOLD_TIME_AP_8812F(x) | BIT_TBTT_HOLD_TIME_AP_8812F(v)) 13911 13912 #define BIT_SHIFT_TBTT_PROHIBIT_SETUP_8812F 0 13913 #define BIT_MASK_TBTT_PROHIBIT_SETUP_8812F 0xf 13914 #define BIT_TBTT_PROHIBIT_SETUP_8812F(x) \ 13915 (((x) & BIT_MASK_TBTT_PROHIBIT_SETUP_8812F) \ 13916 << BIT_SHIFT_TBTT_PROHIBIT_SETUP_8812F) 13917 #define BITS_TBTT_PROHIBIT_SETUP_8812F \ 13918 (BIT_MASK_TBTT_PROHIBIT_SETUP_8812F \ 13919 << BIT_SHIFT_TBTT_PROHIBIT_SETUP_8812F) 13920 #define BIT_CLEAR_TBTT_PROHIBIT_SETUP_8812F(x) \ 13921 ((x) & (~BITS_TBTT_PROHIBIT_SETUP_8812F)) 13922 #define BIT_GET_TBTT_PROHIBIT_SETUP_8812F(x) \ 13923 (((x) >> BIT_SHIFT_TBTT_PROHIBIT_SETUP_8812F) & \ 13924 BIT_MASK_TBTT_PROHIBIT_SETUP_8812F) 13925 #define BIT_SET_TBTT_PROHIBIT_SETUP_8812F(x, v) \ 13926 (BIT_CLEAR_TBTT_PROHIBIT_SETUP_8812F(x) | \ 13927 BIT_TBTT_PROHIBIT_SETUP_8812F(v)) 13928 13929 /* 2 REG_P2PPS_STATE_8812F */ 13930 #define BIT_POWER_STATE_8812F BIT(7) 13931 #define BIT_CTWINDOW_ON_8812F BIT(6) 13932 #define BIT_BEACON_AREA_ON_8812F BIT(5) 13933 #define BIT_CTWIN_EARLY_DISTX_8812F BIT(4) 13934 #define BIT_NOA1_OFF_PERIOD_8812F BIT(3) 13935 #define BIT_FORCE_DOZE1_8812F BIT(2) 13936 #define BIT_NOA0_OFF_PERIOD_8812F BIT(1) 13937 #define BIT_FORCE_DOZE0_8812F BIT(0) 13938 13939 /* 2 REG_RD_NAV_NXT_8812F */ 13940 13941 #define BIT_SHIFT_RD_NAV_PROT_NXT_8812F 0 13942 #define BIT_MASK_RD_NAV_PROT_NXT_8812F 0xffff 13943 #define BIT_RD_NAV_PROT_NXT_8812F(x) \ 13944 (((x) & BIT_MASK_RD_NAV_PROT_NXT_8812F) \ 13945 << BIT_SHIFT_RD_NAV_PROT_NXT_8812F) 13946 #define BITS_RD_NAV_PROT_NXT_8812F \ 13947 (BIT_MASK_RD_NAV_PROT_NXT_8812F << BIT_SHIFT_RD_NAV_PROT_NXT_8812F) 13948 #define BIT_CLEAR_RD_NAV_PROT_NXT_8812F(x) ((x) & (~BITS_RD_NAV_PROT_NXT_8812F)) 13949 #define BIT_GET_RD_NAV_PROT_NXT_8812F(x) \ 13950 (((x) >> BIT_SHIFT_RD_NAV_PROT_NXT_8812F) & \ 13951 BIT_MASK_RD_NAV_PROT_NXT_8812F) 13952 #define BIT_SET_RD_NAV_PROT_NXT_8812F(x, v) \ 13953 (BIT_CLEAR_RD_NAV_PROT_NXT_8812F(x) | BIT_RD_NAV_PROT_NXT_8812F(v)) 13954 13955 /* 2 REG_NAV_PROT_LEN_8812F */ 13956 13957 #define BIT_SHIFT_NAV_PROT_LEN_8812F 0 13958 #define BIT_MASK_NAV_PROT_LEN_8812F 0xffff 13959 #define BIT_NAV_PROT_LEN_8812F(x) \ 13960 (((x) & BIT_MASK_NAV_PROT_LEN_8812F) << BIT_SHIFT_NAV_PROT_LEN_8812F) 13961 #define BITS_NAV_PROT_LEN_8812F \ 13962 (BIT_MASK_NAV_PROT_LEN_8812F << BIT_SHIFT_NAV_PROT_LEN_8812F) 13963 #define BIT_CLEAR_NAV_PROT_LEN_8812F(x) ((x) & (~BITS_NAV_PROT_LEN_8812F)) 13964 #define BIT_GET_NAV_PROT_LEN_8812F(x) \ 13965 (((x) >> BIT_SHIFT_NAV_PROT_LEN_8812F) & BIT_MASK_NAV_PROT_LEN_8812F) 13966 #define BIT_SET_NAV_PROT_LEN_8812F(x, v) \ 13967 (BIT_CLEAR_NAV_PROT_LEN_8812F(x) | BIT_NAV_PROT_LEN_8812F(v)) 13968 13969 /* 2 REG_FTM_PTT_8812F */ 13970 13971 #define BIT_SHIFT_FTM_PTT_TSF_R2T_SEL_8812F 22 13972 #define BIT_MASK_FTM_PTT_TSF_R2T_SEL_8812F 0x7 13973 #define BIT_FTM_PTT_TSF_R2T_SEL_8812F(x) \ 13974 (((x) & BIT_MASK_FTM_PTT_TSF_R2T_SEL_8812F) \ 13975 << BIT_SHIFT_FTM_PTT_TSF_R2T_SEL_8812F) 13976 #define BITS_FTM_PTT_TSF_R2T_SEL_8812F \ 13977 (BIT_MASK_FTM_PTT_TSF_R2T_SEL_8812F \ 13978 << BIT_SHIFT_FTM_PTT_TSF_R2T_SEL_8812F) 13979 #define BIT_CLEAR_FTM_PTT_TSF_R2T_SEL_8812F(x) \ 13980 ((x) & (~BITS_FTM_PTT_TSF_R2T_SEL_8812F)) 13981 #define BIT_GET_FTM_PTT_TSF_R2T_SEL_8812F(x) \ 13982 (((x) >> BIT_SHIFT_FTM_PTT_TSF_R2T_SEL_8812F) & \ 13983 BIT_MASK_FTM_PTT_TSF_R2T_SEL_8812F) 13984 #define BIT_SET_FTM_PTT_TSF_R2T_SEL_8812F(x, v) \ 13985 (BIT_CLEAR_FTM_PTT_TSF_R2T_SEL_8812F(x) | \ 13986 BIT_FTM_PTT_TSF_R2T_SEL_8812F(v)) 13987 13988 #define BIT_SHIFT_FTM_PTT_TSF_T2R_SEL_8812F 19 13989 #define BIT_MASK_FTM_PTT_TSF_T2R_SEL_8812F 0x7 13990 #define BIT_FTM_PTT_TSF_T2R_SEL_8812F(x) \ 13991 (((x) & BIT_MASK_FTM_PTT_TSF_T2R_SEL_8812F) \ 13992 << BIT_SHIFT_FTM_PTT_TSF_T2R_SEL_8812F) 13993 #define BITS_FTM_PTT_TSF_T2R_SEL_8812F \ 13994 (BIT_MASK_FTM_PTT_TSF_T2R_SEL_8812F \ 13995 << BIT_SHIFT_FTM_PTT_TSF_T2R_SEL_8812F) 13996 #define BIT_CLEAR_FTM_PTT_TSF_T2R_SEL_8812F(x) \ 13997 ((x) & (~BITS_FTM_PTT_TSF_T2R_SEL_8812F)) 13998 #define BIT_GET_FTM_PTT_TSF_T2R_SEL_8812F(x) \ 13999 (((x) >> BIT_SHIFT_FTM_PTT_TSF_T2R_SEL_8812F) & \ 14000 BIT_MASK_FTM_PTT_TSF_T2R_SEL_8812F) 14001 #define BIT_SET_FTM_PTT_TSF_T2R_SEL_8812F(x, v) \ 14002 (BIT_CLEAR_FTM_PTT_TSF_T2R_SEL_8812F(x) | \ 14003 BIT_FTM_PTT_TSF_T2R_SEL_8812F(v)) 14004 14005 #define BIT_SHIFT_FTM_PTT_TSF_SEL_8812F 16 14006 #define BIT_MASK_FTM_PTT_TSF_SEL_8812F 0x7 14007 #define BIT_FTM_PTT_TSF_SEL_8812F(x) \ 14008 (((x) & BIT_MASK_FTM_PTT_TSF_SEL_8812F) \ 14009 << BIT_SHIFT_FTM_PTT_TSF_SEL_8812F) 14010 #define BITS_FTM_PTT_TSF_SEL_8812F \ 14011 (BIT_MASK_FTM_PTT_TSF_SEL_8812F << BIT_SHIFT_FTM_PTT_TSF_SEL_8812F) 14012 #define BIT_CLEAR_FTM_PTT_TSF_SEL_8812F(x) ((x) & (~BITS_FTM_PTT_TSF_SEL_8812F)) 14013 #define BIT_GET_FTM_PTT_TSF_SEL_8812F(x) \ 14014 (((x) >> BIT_SHIFT_FTM_PTT_TSF_SEL_8812F) & \ 14015 BIT_MASK_FTM_PTT_TSF_SEL_8812F) 14016 #define BIT_SET_FTM_PTT_TSF_SEL_8812F(x, v) \ 14017 (BIT_CLEAR_FTM_PTT_TSF_SEL_8812F(x) | BIT_FTM_PTT_TSF_SEL_8812F(v)) 14018 14019 #define BIT_SHIFT_FTM_PTT_VALUE_8812F 0 14020 #define BIT_MASK_FTM_PTT_VALUE_8812F 0xffff 14021 #define BIT_FTM_PTT_VALUE_8812F(x) \ 14022 (((x) & BIT_MASK_FTM_PTT_VALUE_8812F) << BIT_SHIFT_FTM_PTT_VALUE_8812F) 14023 #define BITS_FTM_PTT_VALUE_8812F \ 14024 (BIT_MASK_FTM_PTT_VALUE_8812F << BIT_SHIFT_FTM_PTT_VALUE_8812F) 14025 #define BIT_CLEAR_FTM_PTT_VALUE_8812F(x) ((x) & (~BITS_FTM_PTT_VALUE_8812F)) 14026 #define BIT_GET_FTM_PTT_VALUE_8812F(x) \ 14027 (((x) >> BIT_SHIFT_FTM_PTT_VALUE_8812F) & BIT_MASK_FTM_PTT_VALUE_8812F) 14028 #define BIT_SET_FTM_PTT_VALUE_8812F(x, v) \ 14029 (BIT_CLEAR_FTM_PTT_VALUE_8812F(x) | BIT_FTM_PTT_VALUE_8812F(v)) 14030 14031 /* 2 REG_FTM_TSF_8812F */ 14032 14033 #define BIT_SHIFT_FTM_T2_TSF_8812F 16 14034 #define BIT_MASK_FTM_T2_TSF_8812F 0xffff 14035 #define BIT_FTM_T2_TSF_8812F(x) \ 14036 (((x) & BIT_MASK_FTM_T2_TSF_8812F) << BIT_SHIFT_FTM_T2_TSF_8812F) 14037 #define BITS_FTM_T2_TSF_8812F \ 14038 (BIT_MASK_FTM_T2_TSF_8812F << BIT_SHIFT_FTM_T2_TSF_8812F) 14039 #define BIT_CLEAR_FTM_T2_TSF_8812F(x) ((x) & (~BITS_FTM_T2_TSF_8812F)) 14040 #define BIT_GET_FTM_T2_TSF_8812F(x) \ 14041 (((x) >> BIT_SHIFT_FTM_T2_TSF_8812F) & BIT_MASK_FTM_T2_TSF_8812F) 14042 #define BIT_SET_FTM_T2_TSF_8812F(x, v) \ 14043 (BIT_CLEAR_FTM_T2_TSF_8812F(x) | BIT_FTM_T2_TSF_8812F(v)) 14044 14045 #define BIT_SHIFT_FTM_T1_TSF_8812F 0 14046 #define BIT_MASK_FTM_T1_TSF_8812F 0xffff 14047 #define BIT_FTM_T1_TSF_8812F(x) \ 14048 (((x) & BIT_MASK_FTM_T1_TSF_8812F) << BIT_SHIFT_FTM_T1_TSF_8812F) 14049 #define BITS_FTM_T1_TSF_8812F \ 14050 (BIT_MASK_FTM_T1_TSF_8812F << BIT_SHIFT_FTM_T1_TSF_8812F) 14051 #define BIT_CLEAR_FTM_T1_TSF_8812F(x) ((x) & (~BITS_FTM_T1_TSF_8812F)) 14052 #define BIT_GET_FTM_T1_TSF_8812F(x) \ 14053 (((x) >> BIT_SHIFT_FTM_T1_TSF_8812F) & BIT_MASK_FTM_T1_TSF_8812F) 14054 #define BIT_SET_FTM_T1_TSF_8812F(x, v) \ 14055 (BIT_CLEAR_FTM_T1_TSF_8812F(x) | BIT_FTM_T1_TSF_8812F(v)) 14056 14057 /* 2 REG_BCN_CTRL_8812F */ 14058 #define BIT_DIS_RX_BSSID_FIT_8812F BIT(6) 14059 #define BIT_P0_EN_TXBCN_RPT_8812F BIT(5) 14060 #define BIT_DIS_TSF_UDT_8812F BIT(4) 14061 #define BIT_EN_BCN_FUNCTION_8812F BIT(3) 14062 #define BIT_P0_EN_RXBCN_RPT_8812F BIT(2) 14063 #define BIT_EN_P2P_CTWINDOW_8812F BIT(1) 14064 #define BIT_EN_P2P_BCNQ_AREA_8812F BIT(0) 14065 14066 /* 2 REG_BCN_CTRL_CLINT0_8812F */ 14067 #define BIT_CLI0_DIS_RX_BSSID_FIT_8812F BIT(6) 14068 #define BIT_CLI0_DIS_TSF_UDT_8812F BIT(4) 14069 #define BIT_CLI0_EN_BCN_FUNCTION_8812F BIT(3) 14070 #define BIT_CLI0_EN_RXBCN_RPT_8812F BIT(2) 14071 #define BIT_CLI0_ENP2P_CTWINDOW_8812F BIT(1) 14072 #define BIT_CLI0_ENP2P_BCNQ_AREA_8812F BIT(0) 14073 14074 /* 2 REG_MBID_NUM_8812F */ 14075 #define BIT_EN_PRE_DL_BEACON_8812F BIT(3) 14076 14077 #define BIT_SHIFT_MBID_BCN_NUM_8812F 0 14078 #define BIT_MASK_MBID_BCN_NUM_8812F 0x7 14079 #define BIT_MBID_BCN_NUM_8812F(x) \ 14080 (((x) & BIT_MASK_MBID_BCN_NUM_8812F) << BIT_SHIFT_MBID_BCN_NUM_8812F) 14081 #define BITS_MBID_BCN_NUM_8812F \ 14082 (BIT_MASK_MBID_BCN_NUM_8812F << BIT_SHIFT_MBID_BCN_NUM_8812F) 14083 #define BIT_CLEAR_MBID_BCN_NUM_8812F(x) ((x) & (~BITS_MBID_BCN_NUM_8812F)) 14084 #define BIT_GET_MBID_BCN_NUM_8812F(x) \ 14085 (((x) >> BIT_SHIFT_MBID_BCN_NUM_8812F) & BIT_MASK_MBID_BCN_NUM_8812F) 14086 #define BIT_SET_MBID_BCN_NUM_8812F(x, v) \ 14087 (BIT_CLEAR_MBID_BCN_NUM_8812F(x) | BIT_MBID_BCN_NUM_8812F(v)) 14088 14089 /* 2 REG_DUAL_TSF_RST_8812F */ 14090 #define BIT_FREECNT_RST_8812F BIT(5) 14091 #define BIT_TSFTR_CLI3_RST_8812F BIT(4) 14092 #define BIT_TSFTR_CLI2_RST_8812F BIT(3) 14093 #define BIT_TSFTR_CLI1_RST_8812F BIT(2) 14094 #define BIT_TSFTR_CLI0_RST_8812F BIT(1) 14095 #define BIT_TSFTR_RST_8812F BIT(0) 14096 14097 /* 2 REG_MBSSID_BCN_SPACE_8812F */ 14098 14099 #define BIT_SHIFT_BCN_TIMER_SEL_FWRD_8812F 28 14100 #define BIT_MASK_BCN_TIMER_SEL_FWRD_8812F 0x7 14101 #define BIT_BCN_TIMER_SEL_FWRD_8812F(x) \ 14102 (((x) & BIT_MASK_BCN_TIMER_SEL_FWRD_8812F) \ 14103 << BIT_SHIFT_BCN_TIMER_SEL_FWRD_8812F) 14104 #define BITS_BCN_TIMER_SEL_FWRD_8812F \ 14105 (BIT_MASK_BCN_TIMER_SEL_FWRD_8812F \ 14106 << BIT_SHIFT_BCN_TIMER_SEL_FWRD_8812F) 14107 #define BIT_CLEAR_BCN_TIMER_SEL_FWRD_8812F(x) \ 14108 ((x) & (~BITS_BCN_TIMER_SEL_FWRD_8812F)) 14109 #define BIT_GET_BCN_TIMER_SEL_FWRD_8812F(x) \ 14110 (((x) >> BIT_SHIFT_BCN_TIMER_SEL_FWRD_8812F) & \ 14111 BIT_MASK_BCN_TIMER_SEL_FWRD_8812F) 14112 #define BIT_SET_BCN_TIMER_SEL_FWRD_8812F(x, v) \ 14113 (BIT_CLEAR_BCN_TIMER_SEL_FWRD_8812F(x) | \ 14114 BIT_BCN_TIMER_SEL_FWRD_8812F(v)) 14115 14116 #define BIT_SHIFT_BCN_SPACE_CLINT0_8812F 16 14117 #define BIT_MASK_BCN_SPACE_CLINT0_8812F 0xfff 14118 #define BIT_BCN_SPACE_CLINT0_8812F(x) \ 14119 (((x) & BIT_MASK_BCN_SPACE_CLINT0_8812F) \ 14120 << BIT_SHIFT_BCN_SPACE_CLINT0_8812F) 14121 #define BITS_BCN_SPACE_CLINT0_8812F \ 14122 (BIT_MASK_BCN_SPACE_CLINT0_8812F << BIT_SHIFT_BCN_SPACE_CLINT0_8812F) 14123 #define BIT_CLEAR_BCN_SPACE_CLINT0_8812F(x) \ 14124 ((x) & (~BITS_BCN_SPACE_CLINT0_8812F)) 14125 #define BIT_GET_BCN_SPACE_CLINT0_8812F(x) \ 14126 (((x) >> BIT_SHIFT_BCN_SPACE_CLINT0_8812F) & \ 14127 BIT_MASK_BCN_SPACE_CLINT0_8812F) 14128 #define BIT_SET_BCN_SPACE_CLINT0_8812F(x, v) \ 14129 (BIT_CLEAR_BCN_SPACE_CLINT0_8812F(x) | BIT_BCN_SPACE_CLINT0_8812F(v)) 14130 14131 #define BIT_SHIFT_BCN_SPACE0_8812F 0 14132 #define BIT_MASK_BCN_SPACE0_8812F 0xffff 14133 #define BIT_BCN_SPACE0_8812F(x) \ 14134 (((x) & BIT_MASK_BCN_SPACE0_8812F) << BIT_SHIFT_BCN_SPACE0_8812F) 14135 #define BITS_BCN_SPACE0_8812F \ 14136 (BIT_MASK_BCN_SPACE0_8812F << BIT_SHIFT_BCN_SPACE0_8812F) 14137 #define BIT_CLEAR_BCN_SPACE0_8812F(x) ((x) & (~BITS_BCN_SPACE0_8812F)) 14138 #define BIT_GET_BCN_SPACE0_8812F(x) \ 14139 (((x) >> BIT_SHIFT_BCN_SPACE0_8812F) & BIT_MASK_BCN_SPACE0_8812F) 14140 #define BIT_SET_BCN_SPACE0_8812F(x, v) \ 14141 (BIT_CLEAR_BCN_SPACE0_8812F(x) | BIT_BCN_SPACE0_8812F(v)) 14142 14143 /* 2 REG_DRVERLYINT_8812F */ 14144 14145 #define BIT_SHIFT_DRVERLYITV_8812F 0 14146 #define BIT_MASK_DRVERLYITV_8812F 0xff 14147 #define BIT_DRVERLYITV_8812F(x) \ 14148 (((x) & BIT_MASK_DRVERLYITV_8812F) << BIT_SHIFT_DRVERLYITV_8812F) 14149 #define BITS_DRVERLYITV_8812F \ 14150 (BIT_MASK_DRVERLYITV_8812F << BIT_SHIFT_DRVERLYITV_8812F) 14151 #define BIT_CLEAR_DRVERLYITV_8812F(x) ((x) & (~BITS_DRVERLYITV_8812F)) 14152 #define BIT_GET_DRVERLYITV_8812F(x) \ 14153 (((x) >> BIT_SHIFT_DRVERLYITV_8812F) & BIT_MASK_DRVERLYITV_8812F) 14154 #define BIT_SET_DRVERLYITV_8812F(x, v) \ 14155 (BIT_CLEAR_DRVERLYITV_8812F(x) | BIT_DRVERLYITV_8812F(v)) 14156 14157 /* 2 REG_BCNDMATIM_8812F */ 14158 14159 #define BIT_SHIFT_BCNDMATIM_8812F 0 14160 #define BIT_MASK_BCNDMATIM_8812F 0xff 14161 #define BIT_BCNDMATIM_8812F(x) \ 14162 (((x) & BIT_MASK_BCNDMATIM_8812F) << BIT_SHIFT_BCNDMATIM_8812F) 14163 #define BITS_BCNDMATIM_8812F \ 14164 (BIT_MASK_BCNDMATIM_8812F << BIT_SHIFT_BCNDMATIM_8812F) 14165 #define BIT_CLEAR_BCNDMATIM_8812F(x) ((x) & (~BITS_BCNDMATIM_8812F)) 14166 #define BIT_GET_BCNDMATIM_8812F(x) \ 14167 (((x) >> BIT_SHIFT_BCNDMATIM_8812F) & BIT_MASK_BCNDMATIM_8812F) 14168 #define BIT_SET_BCNDMATIM_8812F(x, v) \ 14169 (BIT_CLEAR_BCNDMATIM_8812F(x) | BIT_BCNDMATIM_8812F(v)) 14170 14171 /* 2 REG_ATIMWND_8812F */ 14172 14173 #define BIT_SHIFT_ATIMWND0_8812F 0 14174 #define BIT_MASK_ATIMWND0_8812F 0xffff 14175 #define BIT_ATIMWND0_8812F(x) \ 14176 (((x) & BIT_MASK_ATIMWND0_8812F) << BIT_SHIFT_ATIMWND0_8812F) 14177 #define BITS_ATIMWND0_8812F \ 14178 (BIT_MASK_ATIMWND0_8812F << BIT_SHIFT_ATIMWND0_8812F) 14179 #define BIT_CLEAR_ATIMWND0_8812F(x) ((x) & (~BITS_ATIMWND0_8812F)) 14180 #define BIT_GET_ATIMWND0_8812F(x) \ 14181 (((x) >> BIT_SHIFT_ATIMWND0_8812F) & BIT_MASK_ATIMWND0_8812F) 14182 #define BIT_SET_ATIMWND0_8812F(x, v) \ 14183 (BIT_CLEAR_ATIMWND0_8812F(x) | BIT_ATIMWND0_8812F(v)) 14184 14185 /* 2 REG_USTIME_TSF_8812F */ 14186 14187 #define BIT_SHIFT_USTIME_TSF_V1_8812F 0 14188 #define BIT_MASK_USTIME_TSF_V1_8812F 0xff 14189 #define BIT_USTIME_TSF_V1_8812F(x) \ 14190 (((x) & BIT_MASK_USTIME_TSF_V1_8812F) << BIT_SHIFT_USTIME_TSF_V1_8812F) 14191 #define BITS_USTIME_TSF_V1_8812F \ 14192 (BIT_MASK_USTIME_TSF_V1_8812F << BIT_SHIFT_USTIME_TSF_V1_8812F) 14193 #define BIT_CLEAR_USTIME_TSF_V1_8812F(x) ((x) & (~BITS_USTIME_TSF_V1_8812F)) 14194 #define BIT_GET_USTIME_TSF_V1_8812F(x) \ 14195 (((x) >> BIT_SHIFT_USTIME_TSF_V1_8812F) & BIT_MASK_USTIME_TSF_V1_8812F) 14196 #define BIT_SET_USTIME_TSF_V1_8812F(x, v) \ 14197 (BIT_CLEAR_USTIME_TSF_V1_8812F(x) | BIT_USTIME_TSF_V1_8812F(v)) 14198 14199 /* 2 REG_BCN_MAX_ERR_8812F */ 14200 14201 #define BIT_SHIFT_BCN_MAX_ERR_8812F 0 14202 #define BIT_MASK_BCN_MAX_ERR_8812F 0xff 14203 #define BIT_BCN_MAX_ERR_8812F(x) \ 14204 (((x) & BIT_MASK_BCN_MAX_ERR_8812F) << BIT_SHIFT_BCN_MAX_ERR_8812F) 14205 #define BITS_BCN_MAX_ERR_8812F \ 14206 (BIT_MASK_BCN_MAX_ERR_8812F << BIT_SHIFT_BCN_MAX_ERR_8812F) 14207 #define BIT_CLEAR_BCN_MAX_ERR_8812F(x) ((x) & (~BITS_BCN_MAX_ERR_8812F)) 14208 #define BIT_GET_BCN_MAX_ERR_8812F(x) \ 14209 (((x) >> BIT_SHIFT_BCN_MAX_ERR_8812F) & BIT_MASK_BCN_MAX_ERR_8812F) 14210 #define BIT_SET_BCN_MAX_ERR_8812F(x, v) \ 14211 (BIT_CLEAR_BCN_MAX_ERR_8812F(x) | BIT_BCN_MAX_ERR_8812F(v)) 14212 14213 /* 2 REG_RXTSF_OFFSET_CCK_8812F */ 14214 14215 #define BIT_SHIFT_CCK_RXTSF_OFFSET_8812F 0 14216 #define BIT_MASK_CCK_RXTSF_OFFSET_8812F 0xff 14217 #define BIT_CCK_RXTSF_OFFSET_8812F(x) \ 14218 (((x) & BIT_MASK_CCK_RXTSF_OFFSET_8812F) \ 14219 << BIT_SHIFT_CCK_RXTSF_OFFSET_8812F) 14220 #define BITS_CCK_RXTSF_OFFSET_8812F \ 14221 (BIT_MASK_CCK_RXTSF_OFFSET_8812F << BIT_SHIFT_CCK_RXTSF_OFFSET_8812F) 14222 #define BIT_CLEAR_CCK_RXTSF_OFFSET_8812F(x) \ 14223 ((x) & (~BITS_CCK_RXTSF_OFFSET_8812F)) 14224 #define BIT_GET_CCK_RXTSF_OFFSET_8812F(x) \ 14225 (((x) >> BIT_SHIFT_CCK_RXTSF_OFFSET_8812F) & \ 14226 BIT_MASK_CCK_RXTSF_OFFSET_8812F) 14227 #define BIT_SET_CCK_RXTSF_OFFSET_8812F(x, v) \ 14228 (BIT_CLEAR_CCK_RXTSF_OFFSET_8812F(x) | BIT_CCK_RXTSF_OFFSET_8812F(v)) 14229 14230 /* 2 REG_RXTSF_OFFSET_OFDM_8812F */ 14231 14232 #define BIT_SHIFT_OFDM_RXTSF_OFFSET_8812F 0 14233 #define BIT_MASK_OFDM_RXTSF_OFFSET_8812F 0xff 14234 #define BIT_OFDM_RXTSF_OFFSET_8812F(x) \ 14235 (((x) & BIT_MASK_OFDM_RXTSF_OFFSET_8812F) \ 14236 << BIT_SHIFT_OFDM_RXTSF_OFFSET_8812F) 14237 #define BITS_OFDM_RXTSF_OFFSET_8812F \ 14238 (BIT_MASK_OFDM_RXTSF_OFFSET_8812F << BIT_SHIFT_OFDM_RXTSF_OFFSET_8812F) 14239 #define BIT_CLEAR_OFDM_RXTSF_OFFSET_8812F(x) \ 14240 ((x) & (~BITS_OFDM_RXTSF_OFFSET_8812F)) 14241 #define BIT_GET_OFDM_RXTSF_OFFSET_8812F(x) \ 14242 (((x) >> BIT_SHIFT_OFDM_RXTSF_OFFSET_8812F) & \ 14243 BIT_MASK_OFDM_RXTSF_OFFSET_8812F) 14244 #define BIT_SET_OFDM_RXTSF_OFFSET_8812F(x, v) \ 14245 (BIT_CLEAR_OFDM_RXTSF_OFFSET_8812F(x) | BIT_OFDM_RXTSF_OFFSET_8812F(v)) 14246 14247 /* 2 REG_TSFTR_8812F */ 14248 14249 #define BIT_SHIFT_TSF_TIMER_V1_8812F 0 14250 #define BIT_MASK_TSF_TIMER_V1_8812F 0xffffffffL 14251 #define BIT_TSF_TIMER_V1_8812F(x) \ 14252 (((x) & BIT_MASK_TSF_TIMER_V1_8812F) << BIT_SHIFT_TSF_TIMER_V1_8812F) 14253 #define BITS_TSF_TIMER_V1_8812F \ 14254 (BIT_MASK_TSF_TIMER_V1_8812F << BIT_SHIFT_TSF_TIMER_V1_8812F) 14255 #define BIT_CLEAR_TSF_TIMER_V1_8812F(x) ((x) & (~BITS_TSF_TIMER_V1_8812F)) 14256 #define BIT_GET_TSF_TIMER_V1_8812F(x) \ 14257 (((x) >> BIT_SHIFT_TSF_TIMER_V1_8812F) & BIT_MASK_TSF_TIMER_V1_8812F) 14258 #define BIT_SET_TSF_TIMER_V1_8812F(x, v) \ 14259 (BIT_CLEAR_TSF_TIMER_V1_8812F(x) | BIT_TSF_TIMER_V1_8812F(v)) 14260 14261 /* 2 REG_TSFTR_1_8812F */ 14262 14263 #define BIT_SHIFT_TSF_TIMER_V2_8812F 0 14264 #define BIT_MASK_TSF_TIMER_V2_8812F 0xffffffffL 14265 #define BIT_TSF_TIMER_V2_8812F(x) \ 14266 (((x) & BIT_MASK_TSF_TIMER_V2_8812F) << BIT_SHIFT_TSF_TIMER_V2_8812F) 14267 #define BITS_TSF_TIMER_V2_8812F \ 14268 (BIT_MASK_TSF_TIMER_V2_8812F << BIT_SHIFT_TSF_TIMER_V2_8812F) 14269 #define BIT_CLEAR_TSF_TIMER_V2_8812F(x) ((x) & (~BITS_TSF_TIMER_V2_8812F)) 14270 #define BIT_GET_TSF_TIMER_V2_8812F(x) \ 14271 (((x) >> BIT_SHIFT_TSF_TIMER_V2_8812F) & BIT_MASK_TSF_TIMER_V2_8812F) 14272 #define BIT_SET_TSF_TIMER_V2_8812F(x, v) \ 14273 (BIT_CLEAR_TSF_TIMER_V2_8812F(x) | BIT_TSF_TIMER_V2_8812F(v)) 14274 14275 /* 2 REG_FREERUN_CNT_8812F */ 14276 14277 #define BIT_SHIFT_FREERUN_CNT_V1_8812F 0 14278 #define BIT_MASK_FREERUN_CNT_V1_8812F 0xffffffffL 14279 #define BIT_FREERUN_CNT_V1_8812F(x) \ 14280 (((x) & BIT_MASK_FREERUN_CNT_V1_8812F) \ 14281 << BIT_SHIFT_FREERUN_CNT_V1_8812F) 14282 #define BITS_FREERUN_CNT_V1_8812F \ 14283 (BIT_MASK_FREERUN_CNT_V1_8812F << BIT_SHIFT_FREERUN_CNT_V1_8812F) 14284 #define BIT_CLEAR_FREERUN_CNT_V1_8812F(x) ((x) & (~BITS_FREERUN_CNT_V1_8812F)) 14285 #define BIT_GET_FREERUN_CNT_V1_8812F(x) \ 14286 (((x) >> BIT_SHIFT_FREERUN_CNT_V1_8812F) & \ 14287 BIT_MASK_FREERUN_CNT_V1_8812F) 14288 #define BIT_SET_FREERUN_CNT_V1_8812F(x, v) \ 14289 (BIT_CLEAR_FREERUN_CNT_V1_8812F(x) | BIT_FREERUN_CNT_V1_8812F(v)) 14290 14291 /* 2 REG_FREERUN_CNT_1_8812F */ 14292 14293 #define BIT_SHIFT_FREERUN_CNT_V2_8812F 0 14294 #define BIT_MASK_FREERUN_CNT_V2_8812F 0xffffffffL 14295 #define BIT_FREERUN_CNT_V2_8812F(x) \ 14296 (((x) & BIT_MASK_FREERUN_CNT_V2_8812F) \ 14297 << BIT_SHIFT_FREERUN_CNT_V2_8812F) 14298 #define BITS_FREERUN_CNT_V2_8812F \ 14299 (BIT_MASK_FREERUN_CNT_V2_8812F << BIT_SHIFT_FREERUN_CNT_V2_8812F) 14300 #define BIT_CLEAR_FREERUN_CNT_V2_8812F(x) ((x) & (~BITS_FREERUN_CNT_V2_8812F)) 14301 #define BIT_GET_FREERUN_CNT_V2_8812F(x) \ 14302 (((x) >> BIT_SHIFT_FREERUN_CNT_V2_8812F) & \ 14303 BIT_MASK_FREERUN_CNT_V2_8812F) 14304 #define BIT_SET_FREERUN_CNT_V2_8812F(x, v) \ 14305 (BIT_CLEAR_FREERUN_CNT_V2_8812F(x) | BIT_FREERUN_CNT_V2_8812F(v)) 14306 14307 /* 2 REG_ATIMWND1_V1_8812F */ 14308 14309 #define BIT_SHIFT_ATIMWND1_V1_8812F 0 14310 #define BIT_MASK_ATIMWND1_V1_8812F 0xff 14311 #define BIT_ATIMWND1_V1_8812F(x) \ 14312 (((x) & BIT_MASK_ATIMWND1_V1_8812F) << BIT_SHIFT_ATIMWND1_V1_8812F) 14313 #define BITS_ATIMWND1_V1_8812F \ 14314 (BIT_MASK_ATIMWND1_V1_8812F << BIT_SHIFT_ATIMWND1_V1_8812F) 14315 #define BIT_CLEAR_ATIMWND1_V1_8812F(x) ((x) & (~BITS_ATIMWND1_V1_8812F)) 14316 #define BIT_GET_ATIMWND1_V1_8812F(x) \ 14317 (((x) >> BIT_SHIFT_ATIMWND1_V1_8812F) & BIT_MASK_ATIMWND1_V1_8812F) 14318 #define BIT_SET_ATIMWND1_V1_8812F(x, v) \ 14319 (BIT_CLEAR_ATIMWND1_V1_8812F(x) | BIT_ATIMWND1_V1_8812F(v)) 14320 14321 /* 2 REG_TBTT_PROHIBIT_INFRA_8812F */ 14322 14323 #define BIT_SHIFT_TBTT_PROHIBIT_INFRA_8812F 0 14324 #define BIT_MASK_TBTT_PROHIBIT_INFRA_8812F 0xff 14325 #define BIT_TBTT_PROHIBIT_INFRA_8812F(x) \ 14326 (((x) & BIT_MASK_TBTT_PROHIBIT_INFRA_8812F) \ 14327 << BIT_SHIFT_TBTT_PROHIBIT_INFRA_8812F) 14328 #define BITS_TBTT_PROHIBIT_INFRA_8812F \ 14329 (BIT_MASK_TBTT_PROHIBIT_INFRA_8812F \ 14330 << BIT_SHIFT_TBTT_PROHIBIT_INFRA_8812F) 14331 #define BIT_CLEAR_TBTT_PROHIBIT_INFRA_8812F(x) \ 14332 ((x) & (~BITS_TBTT_PROHIBIT_INFRA_8812F)) 14333 #define BIT_GET_TBTT_PROHIBIT_INFRA_8812F(x) \ 14334 (((x) >> BIT_SHIFT_TBTT_PROHIBIT_INFRA_8812F) & \ 14335 BIT_MASK_TBTT_PROHIBIT_INFRA_8812F) 14336 #define BIT_SET_TBTT_PROHIBIT_INFRA_8812F(x, v) \ 14337 (BIT_CLEAR_TBTT_PROHIBIT_INFRA_8812F(x) | \ 14338 BIT_TBTT_PROHIBIT_INFRA_8812F(v)) 14339 14340 /* 2 REG_CTWND_8812F */ 14341 14342 #define BIT_SHIFT_CTWND_8812F 0 14343 #define BIT_MASK_CTWND_8812F 0xff 14344 #define BIT_CTWND_8812F(x) \ 14345 (((x) & BIT_MASK_CTWND_8812F) << BIT_SHIFT_CTWND_8812F) 14346 #define BITS_CTWND_8812F (BIT_MASK_CTWND_8812F << BIT_SHIFT_CTWND_8812F) 14347 #define BIT_CLEAR_CTWND_8812F(x) ((x) & (~BITS_CTWND_8812F)) 14348 #define BIT_GET_CTWND_8812F(x) \ 14349 (((x) >> BIT_SHIFT_CTWND_8812F) & BIT_MASK_CTWND_8812F) 14350 #define BIT_SET_CTWND_8812F(x, v) \ 14351 (BIT_CLEAR_CTWND_8812F(x) | BIT_CTWND_8812F(v)) 14352 14353 /* 2 REG_BCNIVLCUNT_8812F */ 14354 14355 #define BIT_SHIFT_BCNIVLCUNT_8812F 0 14356 #define BIT_MASK_BCNIVLCUNT_8812F 0x7f 14357 #define BIT_BCNIVLCUNT_8812F(x) \ 14358 (((x) & BIT_MASK_BCNIVLCUNT_8812F) << BIT_SHIFT_BCNIVLCUNT_8812F) 14359 #define BITS_BCNIVLCUNT_8812F \ 14360 (BIT_MASK_BCNIVLCUNT_8812F << BIT_SHIFT_BCNIVLCUNT_8812F) 14361 #define BIT_CLEAR_BCNIVLCUNT_8812F(x) ((x) & (~BITS_BCNIVLCUNT_8812F)) 14362 #define BIT_GET_BCNIVLCUNT_8812F(x) \ 14363 (((x) >> BIT_SHIFT_BCNIVLCUNT_8812F) & BIT_MASK_BCNIVLCUNT_8812F) 14364 #define BIT_SET_BCNIVLCUNT_8812F(x, v) \ 14365 (BIT_CLEAR_BCNIVLCUNT_8812F(x) | BIT_BCNIVLCUNT_8812F(v)) 14366 14367 /* 2 REG_BCNDROPCTRL_8812F */ 14368 #define BIT_BEACON_DROP_EN_8812F BIT(7) 14369 14370 #define BIT_SHIFT_BEACON_DROP_IVL_8812F 0 14371 #define BIT_MASK_BEACON_DROP_IVL_8812F 0x7f 14372 #define BIT_BEACON_DROP_IVL_8812F(x) \ 14373 (((x) & BIT_MASK_BEACON_DROP_IVL_8812F) \ 14374 << BIT_SHIFT_BEACON_DROP_IVL_8812F) 14375 #define BITS_BEACON_DROP_IVL_8812F \ 14376 (BIT_MASK_BEACON_DROP_IVL_8812F << BIT_SHIFT_BEACON_DROP_IVL_8812F) 14377 #define BIT_CLEAR_BEACON_DROP_IVL_8812F(x) ((x) & (~BITS_BEACON_DROP_IVL_8812F)) 14378 #define BIT_GET_BEACON_DROP_IVL_8812F(x) \ 14379 (((x) >> BIT_SHIFT_BEACON_DROP_IVL_8812F) & \ 14380 BIT_MASK_BEACON_DROP_IVL_8812F) 14381 #define BIT_SET_BEACON_DROP_IVL_8812F(x, v) \ 14382 (BIT_CLEAR_BEACON_DROP_IVL_8812F(x) | BIT_BEACON_DROP_IVL_8812F(v)) 14383 14384 /* 2 REG_HGQ_TIMEOUT_PERIOD_8812F */ 14385 14386 #define BIT_SHIFT_HGQ_TIMEOUT_PERIOD_8812F 0 14387 #define BIT_MASK_HGQ_TIMEOUT_PERIOD_8812F 0xff 14388 #define BIT_HGQ_TIMEOUT_PERIOD_8812F(x) \ 14389 (((x) & BIT_MASK_HGQ_TIMEOUT_PERIOD_8812F) \ 14390 << BIT_SHIFT_HGQ_TIMEOUT_PERIOD_8812F) 14391 #define BITS_HGQ_TIMEOUT_PERIOD_8812F \ 14392 (BIT_MASK_HGQ_TIMEOUT_PERIOD_8812F \ 14393 << BIT_SHIFT_HGQ_TIMEOUT_PERIOD_8812F) 14394 #define BIT_CLEAR_HGQ_TIMEOUT_PERIOD_8812F(x) \ 14395 ((x) & (~BITS_HGQ_TIMEOUT_PERIOD_8812F)) 14396 #define BIT_GET_HGQ_TIMEOUT_PERIOD_8812F(x) \ 14397 (((x) >> BIT_SHIFT_HGQ_TIMEOUT_PERIOD_8812F) & \ 14398 BIT_MASK_HGQ_TIMEOUT_PERIOD_8812F) 14399 #define BIT_SET_HGQ_TIMEOUT_PERIOD_8812F(x, v) \ 14400 (BIT_CLEAR_HGQ_TIMEOUT_PERIOD_8812F(x) | \ 14401 BIT_HGQ_TIMEOUT_PERIOD_8812F(v)) 14402 14403 /* 2 REG_TXCMD_TIMEOUT_PERIOD_8812F */ 14404 14405 #define BIT_SHIFT_TXCMD_TIMEOUT_PERIOD_8812F 0 14406 #define BIT_MASK_TXCMD_TIMEOUT_PERIOD_8812F 0xff 14407 #define BIT_TXCMD_TIMEOUT_PERIOD_8812F(x) \ 14408 (((x) & BIT_MASK_TXCMD_TIMEOUT_PERIOD_8812F) \ 14409 << BIT_SHIFT_TXCMD_TIMEOUT_PERIOD_8812F) 14410 #define BITS_TXCMD_TIMEOUT_PERIOD_8812F \ 14411 (BIT_MASK_TXCMD_TIMEOUT_PERIOD_8812F \ 14412 << BIT_SHIFT_TXCMD_TIMEOUT_PERIOD_8812F) 14413 #define BIT_CLEAR_TXCMD_TIMEOUT_PERIOD_8812F(x) \ 14414 ((x) & (~BITS_TXCMD_TIMEOUT_PERIOD_8812F)) 14415 #define BIT_GET_TXCMD_TIMEOUT_PERIOD_8812F(x) \ 14416 (((x) >> BIT_SHIFT_TXCMD_TIMEOUT_PERIOD_8812F) & \ 14417 BIT_MASK_TXCMD_TIMEOUT_PERIOD_8812F) 14418 #define BIT_SET_TXCMD_TIMEOUT_PERIOD_8812F(x, v) \ 14419 (BIT_CLEAR_TXCMD_TIMEOUT_PERIOD_8812F(x) | \ 14420 BIT_TXCMD_TIMEOUT_PERIOD_8812F(v)) 14421 14422 /* 2 REG_MISC_CTRL_8812F */ 14423 #define BIT_DIS_MARK_TSF_US_V2_8812F BIT(7) 14424 #define BIT_AUTO_SYNC_BY_TBTT_8812F BIT(6) 14425 #define BIT_DIS_TRX_CAL_BCN_8812F BIT(5) 14426 #define BIT_DIS_TX_CAL_TBTT_8812F BIT(4) 14427 #define BIT_EN_FREECNT_8812F BIT(3) 14428 #define BIT_BCN_AGGRESSION_8812F BIT(2) 14429 14430 #define BIT_SHIFT_DIS_SECONDARY_CCA_8812F 0 14431 #define BIT_MASK_DIS_SECONDARY_CCA_8812F 0x3 14432 #define BIT_DIS_SECONDARY_CCA_8812F(x) \ 14433 (((x) & BIT_MASK_DIS_SECONDARY_CCA_8812F) \ 14434 << BIT_SHIFT_DIS_SECONDARY_CCA_8812F) 14435 #define BITS_DIS_SECONDARY_CCA_8812F \ 14436 (BIT_MASK_DIS_SECONDARY_CCA_8812F << BIT_SHIFT_DIS_SECONDARY_CCA_8812F) 14437 #define BIT_CLEAR_DIS_SECONDARY_CCA_8812F(x) \ 14438 ((x) & (~BITS_DIS_SECONDARY_CCA_8812F)) 14439 #define BIT_GET_DIS_SECONDARY_CCA_8812F(x) \ 14440 (((x) >> BIT_SHIFT_DIS_SECONDARY_CCA_8812F) & \ 14441 BIT_MASK_DIS_SECONDARY_CCA_8812F) 14442 #define BIT_SET_DIS_SECONDARY_CCA_8812F(x, v) \ 14443 (BIT_CLEAR_DIS_SECONDARY_CCA_8812F(x) | BIT_DIS_SECONDARY_CCA_8812F(v)) 14444 14445 /* 2 REG_BCN_CTRL_CLINT1_8812F */ 14446 #define BIT_CLI1_DIS_RX_BSSID_FIT_8812F BIT(6) 14447 #define BIT_CLI1_DIS_TSF_UDT_8812F BIT(4) 14448 #define BIT_CLI1_EN_BCN_FUNCTION_8812F BIT(3) 14449 #define BIT_CLI1_EN_RXBCN_RPT_8812F BIT(2) 14450 #define BIT_CLI1_ENP2P_CTWINDOW_8812F BIT(1) 14451 #define BIT_CLI1_ENP2P_BCNQ_AREA_8812F BIT(0) 14452 14453 /* 2 REG_BCN_CTRL_CLINT2_8812F */ 14454 #define BIT_CLI2_DIS_RX_BSSID_FIT_8812F BIT(6) 14455 #define BIT_CLI2_DIS_TSF_UDT_8812F BIT(4) 14456 #define BIT_CLI2_EN_BCN_FUNCTION_8812F BIT(3) 14457 #define BIT_CLI2_EN_RXBCN_RPT_8812F BIT(2) 14458 #define BIT_CLI2_ENP2P_CTWINDOW_8812F BIT(1) 14459 #define BIT_CLI2_ENP2P_BCNQ_AREA_8812F BIT(0) 14460 14461 /* 2 REG_BCN_CTRL_CLINT3_8812F */ 14462 #define BIT_CLI3_DIS_RX_BSSID_FIT_8812F BIT(6) 14463 #define BIT_CLI3_DIS_TSF_UDT_8812F BIT(4) 14464 #define BIT_CLI3_EN_BCN_FUNCTION_8812F BIT(3) 14465 #define BIT_CLI3_EN_RXBCN_RPT_8812F BIT(2) 14466 #define BIT_CLI3_ENP2P_CTWINDOW_8812F BIT(1) 14467 #define BIT_CLI3_ENP2P_BCNQ_AREA_8812F BIT(0) 14468 14469 /* 2 REG_EXTEND_CTRL_8812F */ 14470 #define BIT_EN_TSFBIT32_RST_P2P2_8812F BIT(5) 14471 #define BIT_EN_TSFBIT32_RST_P2P1_8812F BIT(4) 14472 14473 #define BIT_SHIFT_PORT_SEL_8812F 0 14474 #define BIT_MASK_PORT_SEL_8812F 0x7 14475 #define BIT_PORT_SEL_8812F(x) \ 14476 (((x) & BIT_MASK_PORT_SEL_8812F) << BIT_SHIFT_PORT_SEL_8812F) 14477 #define BITS_PORT_SEL_8812F \ 14478 (BIT_MASK_PORT_SEL_8812F << BIT_SHIFT_PORT_SEL_8812F) 14479 #define BIT_CLEAR_PORT_SEL_8812F(x) ((x) & (~BITS_PORT_SEL_8812F)) 14480 #define BIT_GET_PORT_SEL_8812F(x) \ 14481 (((x) >> BIT_SHIFT_PORT_SEL_8812F) & BIT_MASK_PORT_SEL_8812F) 14482 #define BIT_SET_PORT_SEL_8812F(x, v) \ 14483 (BIT_CLEAR_PORT_SEL_8812F(x) | BIT_PORT_SEL_8812F(v)) 14484 14485 /* 2 REG_P2PPS1_SPEC_STATE_8812F */ 14486 #define BIT_P2P1_SPEC_POWER_STATE_8812F BIT(7) 14487 #define BIT_P2P1_SPEC_CTWINDOW_ON_8812F BIT(6) 14488 #define BIT_P2P1_SPEC_BCN_AREA_ON_8812F BIT(5) 14489 #define BIT_P2P1_SPEC_CTWIN_EARLY_DISTX_8812F BIT(4) 14490 #define BIT_P2P1_SPEC_NOA1_OFF_PERIOD_8812F BIT(3) 14491 #define BIT_P2P1_SPEC_FORCE_DOZE1_8812F BIT(2) 14492 #define BIT_P2P1_SPEC_NOA0_OFF_PERIOD_8812F BIT(1) 14493 #define BIT_P2P1_SPEC_FORCE_DOZE0_8812F BIT(0) 14494 14495 /* 2 REG_P2PPS1_STATE_8812F */ 14496 #define BIT_P2P1_POWER_STATE_8812F BIT(7) 14497 #define BIT_P2P1_CTWINDOW_ON_8812F BIT(6) 14498 #define BIT_P2P1_BEACON_AREA_ON_8812F BIT(5) 14499 #define BIT_P2P1_CTWIN_EARLY_DISTX_8812F BIT(4) 14500 #define BIT_P2P1_NOA1_OFF_PERIOD_8812F BIT(3) 14501 #define BIT_P2P1_FORCE_DOZE1_8812F BIT(2) 14502 #define BIT_P2P1_NOA0_OFF_PERIOD_8812F BIT(1) 14503 #define BIT_P2P1_FORCE_DOZE0_8812F BIT(0) 14504 14505 /* 2 REG_P2PPS2_SPEC_STATE_8812F */ 14506 #define BIT_P2P2_SPEC_POWER_STATE_8812F BIT(7) 14507 #define BIT_P2P2_SPEC_CTWINDOW_ON_8812F BIT(6) 14508 #define BIT_P2P2_SPEC_BCN_AREA_ON_8812F BIT(5) 14509 #define BIT_P2P2_SPEC_CTWIN_EARLY_DISTX_8812F BIT(4) 14510 #define BIT_P2P2_SPEC_NOA1_OFF_PERIOD_8812F BIT(3) 14511 #define BIT_P2P2_SPEC_FORCE_DOZE1_8812F BIT(2) 14512 #define BIT_P2P2_SPEC_NOA0_OFF_PERIOD_8812F BIT(1) 14513 #define BIT_P2P2_SPEC_FORCE_DOZE0_8812F BIT(0) 14514 14515 /* 2 REG_P2PPS2_STATE_8812F */ 14516 #define BIT_P2P2_POWER_STATE_8812F BIT(7) 14517 #define BIT_P2P2_CTWINDOW_ON_8812F BIT(6) 14518 #define BIT_P2P2_BEACON_AREA_ON_8812F BIT(5) 14519 #define BIT_P2P2_CTWIN_EARLY_DISTX_8812F BIT(4) 14520 #define BIT_P2P2_NOA1_OFF_PERIOD_8812F BIT(3) 14521 #define BIT_P2P2_FORCE_DOZE1_8812F BIT(2) 14522 #define BIT_P2P2_NOA0_OFF_PERIOD_8812F BIT(1) 14523 #define BIT_P2P2_FORCE_DOZE0_8812F BIT(0) 14524 14525 /* 2 REG_PS_TIMER0_8812F */ 14526 14527 #define BIT_SHIFT_PSTIMER0_INT_8812F 5 14528 #define BIT_MASK_PSTIMER0_INT_8812F 0x7ffffff 14529 #define BIT_PSTIMER0_INT_8812F(x) \ 14530 (((x) & BIT_MASK_PSTIMER0_INT_8812F) << BIT_SHIFT_PSTIMER0_INT_8812F) 14531 #define BITS_PSTIMER0_INT_8812F \ 14532 (BIT_MASK_PSTIMER0_INT_8812F << BIT_SHIFT_PSTIMER0_INT_8812F) 14533 #define BIT_CLEAR_PSTIMER0_INT_8812F(x) ((x) & (~BITS_PSTIMER0_INT_8812F)) 14534 #define BIT_GET_PSTIMER0_INT_8812F(x) \ 14535 (((x) >> BIT_SHIFT_PSTIMER0_INT_8812F) & BIT_MASK_PSTIMER0_INT_8812F) 14536 #define BIT_SET_PSTIMER0_INT_8812F(x, v) \ 14537 (BIT_CLEAR_PSTIMER0_INT_8812F(x) | BIT_PSTIMER0_INT_8812F(v)) 14538 14539 /* 2 REG_PS_TIMER1_8812F */ 14540 14541 #define BIT_SHIFT_PSTIMER1_INT_8812F 5 14542 #define BIT_MASK_PSTIMER1_INT_8812F 0x7ffffff 14543 #define BIT_PSTIMER1_INT_8812F(x) \ 14544 (((x) & BIT_MASK_PSTIMER1_INT_8812F) << BIT_SHIFT_PSTIMER1_INT_8812F) 14545 #define BITS_PSTIMER1_INT_8812F \ 14546 (BIT_MASK_PSTIMER1_INT_8812F << BIT_SHIFT_PSTIMER1_INT_8812F) 14547 #define BIT_CLEAR_PSTIMER1_INT_8812F(x) ((x) & (~BITS_PSTIMER1_INT_8812F)) 14548 #define BIT_GET_PSTIMER1_INT_8812F(x) \ 14549 (((x) >> BIT_SHIFT_PSTIMER1_INT_8812F) & BIT_MASK_PSTIMER1_INT_8812F) 14550 #define BIT_SET_PSTIMER1_INT_8812F(x, v) \ 14551 (BIT_CLEAR_PSTIMER1_INT_8812F(x) | BIT_PSTIMER1_INT_8812F(v)) 14552 14553 /* 2 REG_PS_TIMER2_8812F */ 14554 14555 #define BIT_SHIFT_PSTIMER2_INT_8812F 5 14556 #define BIT_MASK_PSTIMER2_INT_8812F 0x7ffffff 14557 #define BIT_PSTIMER2_INT_8812F(x) \ 14558 (((x) & BIT_MASK_PSTIMER2_INT_8812F) << BIT_SHIFT_PSTIMER2_INT_8812F) 14559 #define BITS_PSTIMER2_INT_8812F \ 14560 (BIT_MASK_PSTIMER2_INT_8812F << BIT_SHIFT_PSTIMER2_INT_8812F) 14561 #define BIT_CLEAR_PSTIMER2_INT_8812F(x) ((x) & (~BITS_PSTIMER2_INT_8812F)) 14562 #define BIT_GET_PSTIMER2_INT_8812F(x) \ 14563 (((x) >> BIT_SHIFT_PSTIMER2_INT_8812F) & BIT_MASK_PSTIMER2_INT_8812F) 14564 #define BIT_SET_PSTIMER2_INT_8812F(x, v) \ 14565 (BIT_CLEAR_PSTIMER2_INT_8812F(x) | BIT_PSTIMER2_INT_8812F(v)) 14566 14567 /* 2 REG_TBTT_CTN_AREA_8812F */ 14568 14569 #define BIT_SHIFT_TBTT_CTN_AREA_8812F 0 14570 #define BIT_MASK_TBTT_CTN_AREA_8812F 0xff 14571 #define BIT_TBTT_CTN_AREA_8812F(x) \ 14572 (((x) & BIT_MASK_TBTT_CTN_AREA_8812F) << BIT_SHIFT_TBTT_CTN_AREA_8812F) 14573 #define BITS_TBTT_CTN_AREA_8812F \ 14574 (BIT_MASK_TBTT_CTN_AREA_8812F << BIT_SHIFT_TBTT_CTN_AREA_8812F) 14575 #define BIT_CLEAR_TBTT_CTN_AREA_8812F(x) ((x) & (~BITS_TBTT_CTN_AREA_8812F)) 14576 #define BIT_GET_TBTT_CTN_AREA_8812F(x) \ 14577 (((x) >> BIT_SHIFT_TBTT_CTN_AREA_8812F) & BIT_MASK_TBTT_CTN_AREA_8812F) 14578 #define BIT_SET_TBTT_CTN_AREA_8812F(x, v) \ 14579 (BIT_CLEAR_TBTT_CTN_AREA_8812F(x) | BIT_TBTT_CTN_AREA_8812F(v)) 14580 14581 /* 2 REG_NOT_VALID_8812F */ 14582 14583 /* 2 REG_FORCE_BCN_IFS_8812F */ 14584 14585 #define BIT_SHIFT_FORCE_BCN_IFS_8812F 0 14586 #define BIT_MASK_FORCE_BCN_IFS_8812F 0xff 14587 #define BIT_FORCE_BCN_IFS_8812F(x) \ 14588 (((x) & BIT_MASK_FORCE_BCN_IFS_8812F) << BIT_SHIFT_FORCE_BCN_IFS_8812F) 14589 #define BITS_FORCE_BCN_IFS_8812F \ 14590 (BIT_MASK_FORCE_BCN_IFS_8812F << BIT_SHIFT_FORCE_BCN_IFS_8812F) 14591 #define BIT_CLEAR_FORCE_BCN_IFS_8812F(x) ((x) & (~BITS_FORCE_BCN_IFS_8812F)) 14592 #define BIT_GET_FORCE_BCN_IFS_8812F(x) \ 14593 (((x) >> BIT_SHIFT_FORCE_BCN_IFS_8812F) & BIT_MASK_FORCE_BCN_IFS_8812F) 14594 #define BIT_SET_FORCE_BCN_IFS_8812F(x, v) \ 14595 (BIT_CLEAR_FORCE_BCN_IFS_8812F(x) | BIT_FORCE_BCN_IFS_8812F(v)) 14596 14597 /* 2 REG_NOT_VALID_8812F */ 14598 14599 /* 2 REG_TXOP_MIN_8812F */ 14600 #define BIT_HIQ_NAV_BREAK_EN_8812F BIT(15) 14601 #define BIT_MGQ_NAV_BREAK_EN_8812F BIT(14) 14602 14603 #define BIT_SHIFT_TXOP_MIN_8812F 0 14604 #define BIT_MASK_TXOP_MIN_8812F 0x3fff 14605 #define BIT_TXOP_MIN_8812F(x) \ 14606 (((x) & BIT_MASK_TXOP_MIN_8812F) << BIT_SHIFT_TXOP_MIN_8812F) 14607 #define BITS_TXOP_MIN_8812F \ 14608 (BIT_MASK_TXOP_MIN_8812F << BIT_SHIFT_TXOP_MIN_8812F) 14609 #define BIT_CLEAR_TXOP_MIN_8812F(x) ((x) & (~BITS_TXOP_MIN_8812F)) 14610 #define BIT_GET_TXOP_MIN_8812F(x) \ 14611 (((x) >> BIT_SHIFT_TXOP_MIN_8812F) & BIT_MASK_TXOP_MIN_8812F) 14612 #define BIT_SET_TXOP_MIN_8812F(x, v) \ 14613 (BIT_CLEAR_TXOP_MIN_8812F(x) | BIT_TXOP_MIN_8812F(v)) 14614 14615 /* 2 REG_PRE_BKF_TIME_8812F */ 14616 14617 #define BIT_SHIFT_PRE_BKF_TIME_8812F 0 14618 #define BIT_MASK_PRE_BKF_TIME_8812F 0xff 14619 #define BIT_PRE_BKF_TIME_8812F(x) \ 14620 (((x) & BIT_MASK_PRE_BKF_TIME_8812F) << BIT_SHIFT_PRE_BKF_TIME_8812F) 14621 #define BITS_PRE_BKF_TIME_8812F \ 14622 (BIT_MASK_PRE_BKF_TIME_8812F << BIT_SHIFT_PRE_BKF_TIME_8812F) 14623 #define BIT_CLEAR_PRE_BKF_TIME_8812F(x) ((x) & (~BITS_PRE_BKF_TIME_8812F)) 14624 #define BIT_GET_PRE_BKF_TIME_8812F(x) \ 14625 (((x) >> BIT_SHIFT_PRE_BKF_TIME_8812F) & BIT_MASK_PRE_BKF_TIME_8812F) 14626 #define BIT_SET_PRE_BKF_TIME_8812F(x, v) \ 14627 (BIT_CLEAR_PRE_BKF_TIME_8812F(x) | BIT_PRE_BKF_TIME_8812F(v)) 14628 14629 /* 2 REG_CROSS_TXOP_CTRL_8812F */ 14630 #define BIT_TXFAIL_BREACK_TXOP_EN_8812F BIT(3) 14631 #define BIT_DTIM_BYPASS_8812F BIT(2) 14632 #define BIT_RTS_NAV_TXOP_8812F BIT(1) 14633 #define BIT_NOT_CROSS_TXOP_8812F BIT(0) 14634 14635 /* 2 REG_NOT_VALID_8812F */ 14636 14637 /* 2 REG_RX_TBTT_SHIFT_V1_8812F */ 14638 #define BIT_RX_TBTT_SHIFT_RW_FLAG_V1_8812F BIT(31) 14639 14640 #define BIT_SHIFT_RX_TBTT_SHIFT_OFFSET_V1_8812F 16 14641 #define BIT_MASK_RX_TBTT_SHIFT_OFFSET_V1_8812F 0xfff 14642 #define BIT_RX_TBTT_SHIFT_OFFSET_V1_8812F(x) \ 14643 (((x) & BIT_MASK_RX_TBTT_SHIFT_OFFSET_V1_8812F) \ 14644 << BIT_SHIFT_RX_TBTT_SHIFT_OFFSET_V1_8812F) 14645 #define BITS_RX_TBTT_SHIFT_OFFSET_V1_8812F \ 14646 (BIT_MASK_RX_TBTT_SHIFT_OFFSET_V1_8812F \ 14647 << BIT_SHIFT_RX_TBTT_SHIFT_OFFSET_V1_8812F) 14648 #define BIT_CLEAR_RX_TBTT_SHIFT_OFFSET_V1_8812F(x) \ 14649 ((x) & (~BITS_RX_TBTT_SHIFT_OFFSET_V1_8812F)) 14650 #define BIT_GET_RX_TBTT_SHIFT_OFFSET_V1_8812F(x) \ 14651 (((x) >> BIT_SHIFT_RX_TBTT_SHIFT_OFFSET_V1_8812F) & \ 14652 BIT_MASK_RX_TBTT_SHIFT_OFFSET_V1_8812F) 14653 #define BIT_SET_RX_TBTT_SHIFT_OFFSET_V1_8812F(x, v) \ 14654 (BIT_CLEAR_RX_TBTT_SHIFT_OFFSET_V1_8812F(x) | \ 14655 BIT_RX_TBTT_SHIFT_OFFSET_V1_8812F(v)) 14656 14657 #define BIT_SHIFT_RX_TBTT_SHIFT_SEL_V1_8812F 8 14658 #define BIT_MASK_RX_TBTT_SHIFT_SEL_V1_8812F 0x7 14659 #define BIT_RX_TBTT_SHIFT_SEL_V1_8812F(x) \ 14660 (((x) & BIT_MASK_RX_TBTT_SHIFT_SEL_V1_8812F) \ 14661 << BIT_SHIFT_RX_TBTT_SHIFT_SEL_V1_8812F) 14662 #define BITS_RX_TBTT_SHIFT_SEL_V1_8812F \ 14663 (BIT_MASK_RX_TBTT_SHIFT_SEL_V1_8812F \ 14664 << BIT_SHIFT_RX_TBTT_SHIFT_SEL_V1_8812F) 14665 #define BIT_CLEAR_RX_TBTT_SHIFT_SEL_V1_8812F(x) \ 14666 ((x) & (~BITS_RX_TBTT_SHIFT_SEL_V1_8812F)) 14667 #define BIT_GET_RX_TBTT_SHIFT_SEL_V1_8812F(x) \ 14668 (((x) >> BIT_SHIFT_RX_TBTT_SHIFT_SEL_V1_8812F) & \ 14669 BIT_MASK_RX_TBTT_SHIFT_SEL_V1_8812F) 14670 #define BIT_SET_RX_TBTT_SHIFT_SEL_V1_8812F(x, v) \ 14671 (BIT_CLEAR_RX_TBTT_SHIFT_SEL_V1_8812F(x) | \ 14672 BIT_RX_TBTT_SHIFT_SEL_V1_8812F(v)) 14673 14674 /* 2 REG_NOT_VALID_8812F */ 14675 14676 /* 2 REG_ATIMWND2_8812F */ 14677 14678 #define BIT_SHIFT_ATIMWND2_8812F 0 14679 #define BIT_MASK_ATIMWND2_8812F 0xff 14680 #define BIT_ATIMWND2_8812F(x) \ 14681 (((x) & BIT_MASK_ATIMWND2_8812F) << BIT_SHIFT_ATIMWND2_8812F) 14682 #define BITS_ATIMWND2_8812F \ 14683 (BIT_MASK_ATIMWND2_8812F << BIT_SHIFT_ATIMWND2_8812F) 14684 #define BIT_CLEAR_ATIMWND2_8812F(x) ((x) & (~BITS_ATIMWND2_8812F)) 14685 #define BIT_GET_ATIMWND2_8812F(x) \ 14686 (((x) >> BIT_SHIFT_ATIMWND2_8812F) & BIT_MASK_ATIMWND2_8812F) 14687 #define BIT_SET_ATIMWND2_8812F(x, v) \ 14688 (BIT_CLEAR_ATIMWND2_8812F(x) | BIT_ATIMWND2_8812F(v)) 14689 14690 /* 2 REG_ATIMWND3_8812F */ 14691 14692 #define BIT_SHIFT_ATIMWND3_8812F 0 14693 #define BIT_MASK_ATIMWND3_8812F 0xff 14694 #define BIT_ATIMWND3_8812F(x) \ 14695 (((x) & BIT_MASK_ATIMWND3_8812F) << BIT_SHIFT_ATIMWND3_8812F) 14696 #define BITS_ATIMWND3_8812F \ 14697 (BIT_MASK_ATIMWND3_8812F << BIT_SHIFT_ATIMWND3_8812F) 14698 #define BIT_CLEAR_ATIMWND3_8812F(x) ((x) & (~BITS_ATIMWND3_8812F)) 14699 #define BIT_GET_ATIMWND3_8812F(x) \ 14700 (((x) >> BIT_SHIFT_ATIMWND3_8812F) & BIT_MASK_ATIMWND3_8812F) 14701 #define BIT_SET_ATIMWND3_8812F(x, v) \ 14702 (BIT_CLEAR_ATIMWND3_8812F(x) | BIT_ATIMWND3_8812F(v)) 14703 14704 /* 2 REG_ATIMWND4_8812F */ 14705 14706 #define BIT_SHIFT_ATIMWND4_8812F 0 14707 #define BIT_MASK_ATIMWND4_8812F 0xff 14708 #define BIT_ATIMWND4_8812F(x) \ 14709 (((x) & BIT_MASK_ATIMWND4_8812F) << BIT_SHIFT_ATIMWND4_8812F) 14710 #define BITS_ATIMWND4_8812F \ 14711 (BIT_MASK_ATIMWND4_8812F << BIT_SHIFT_ATIMWND4_8812F) 14712 #define BIT_CLEAR_ATIMWND4_8812F(x) ((x) & (~BITS_ATIMWND4_8812F)) 14713 #define BIT_GET_ATIMWND4_8812F(x) \ 14714 (((x) >> BIT_SHIFT_ATIMWND4_8812F) & BIT_MASK_ATIMWND4_8812F) 14715 #define BIT_SET_ATIMWND4_8812F(x, v) \ 14716 (BIT_CLEAR_ATIMWND4_8812F(x) | BIT_ATIMWND4_8812F(v)) 14717 14718 /* 2 REG_ATIMWND5_8812F */ 14719 14720 #define BIT_SHIFT_ATIMWND5_8812F 0 14721 #define BIT_MASK_ATIMWND5_8812F 0xff 14722 #define BIT_ATIMWND5_8812F(x) \ 14723 (((x) & BIT_MASK_ATIMWND5_8812F) << BIT_SHIFT_ATIMWND5_8812F) 14724 #define BITS_ATIMWND5_8812F \ 14725 (BIT_MASK_ATIMWND5_8812F << BIT_SHIFT_ATIMWND5_8812F) 14726 #define BIT_CLEAR_ATIMWND5_8812F(x) ((x) & (~BITS_ATIMWND5_8812F)) 14727 #define BIT_GET_ATIMWND5_8812F(x) \ 14728 (((x) >> BIT_SHIFT_ATIMWND5_8812F) & BIT_MASK_ATIMWND5_8812F) 14729 #define BIT_SET_ATIMWND5_8812F(x, v) \ 14730 (BIT_CLEAR_ATIMWND5_8812F(x) | BIT_ATIMWND5_8812F(v)) 14731 14732 /* 2 REG_ATIMWND6_8812F */ 14733 14734 #define BIT_SHIFT_ATIMWND6_8812F 0 14735 #define BIT_MASK_ATIMWND6_8812F 0xff 14736 #define BIT_ATIMWND6_8812F(x) \ 14737 (((x) & BIT_MASK_ATIMWND6_8812F) << BIT_SHIFT_ATIMWND6_8812F) 14738 #define BITS_ATIMWND6_8812F \ 14739 (BIT_MASK_ATIMWND6_8812F << BIT_SHIFT_ATIMWND6_8812F) 14740 #define BIT_CLEAR_ATIMWND6_8812F(x) ((x) & (~BITS_ATIMWND6_8812F)) 14741 #define BIT_GET_ATIMWND6_8812F(x) \ 14742 (((x) >> BIT_SHIFT_ATIMWND6_8812F) & BIT_MASK_ATIMWND6_8812F) 14743 #define BIT_SET_ATIMWND6_8812F(x, v) \ 14744 (BIT_CLEAR_ATIMWND6_8812F(x) | BIT_ATIMWND6_8812F(v)) 14745 14746 /* 2 REG_ATIMWND7_8812F */ 14747 14748 #define BIT_SHIFT_ATIMWND7_8812F 0 14749 #define BIT_MASK_ATIMWND7_8812F 0xff 14750 #define BIT_ATIMWND7_8812F(x) \ 14751 (((x) & BIT_MASK_ATIMWND7_8812F) << BIT_SHIFT_ATIMWND7_8812F) 14752 #define BITS_ATIMWND7_8812F \ 14753 (BIT_MASK_ATIMWND7_8812F << BIT_SHIFT_ATIMWND7_8812F) 14754 #define BIT_CLEAR_ATIMWND7_8812F(x) ((x) & (~BITS_ATIMWND7_8812F)) 14755 #define BIT_GET_ATIMWND7_8812F(x) \ 14756 (((x) >> BIT_SHIFT_ATIMWND7_8812F) & BIT_MASK_ATIMWND7_8812F) 14757 #define BIT_SET_ATIMWND7_8812F(x, v) \ 14758 (BIT_CLEAR_ATIMWND7_8812F(x) | BIT_ATIMWND7_8812F(v)) 14759 14760 /* 2 REG_ATIMUGT_8812F */ 14761 14762 #define BIT_SHIFT_ATIM_URGENT_8812F 0 14763 #define BIT_MASK_ATIM_URGENT_8812F 0xff 14764 #define BIT_ATIM_URGENT_8812F(x) \ 14765 (((x) & BIT_MASK_ATIM_URGENT_8812F) << BIT_SHIFT_ATIM_URGENT_8812F) 14766 #define BITS_ATIM_URGENT_8812F \ 14767 (BIT_MASK_ATIM_URGENT_8812F << BIT_SHIFT_ATIM_URGENT_8812F) 14768 #define BIT_CLEAR_ATIM_URGENT_8812F(x) ((x) & (~BITS_ATIM_URGENT_8812F)) 14769 #define BIT_GET_ATIM_URGENT_8812F(x) \ 14770 (((x) >> BIT_SHIFT_ATIM_URGENT_8812F) & BIT_MASK_ATIM_URGENT_8812F) 14771 #define BIT_SET_ATIM_URGENT_8812F(x, v) \ 14772 (BIT_CLEAR_ATIM_URGENT_8812F(x) | BIT_ATIM_URGENT_8812F(v)) 14773 14774 /* 2 REG_HIQ_NO_LMT_EN_8812F */ 14775 #define BIT_HIQ_NO_LMT_EN_VAP7_8812F BIT(7) 14776 #define BIT_HIQ_NO_LMT_EN_VAP6_8812F BIT(6) 14777 #define BIT_HIQ_NO_LMT_EN_VAP5_8812F BIT(5) 14778 #define BIT_HIQ_NO_LMT_EN_VAP4_8812F BIT(4) 14779 #define BIT_HIQ_NO_LMT_EN_VAP3_8812F BIT(3) 14780 #define BIT_HIQ_NO_LMT_EN_VAP2_8812F BIT(2) 14781 #define BIT_HIQ_NO_LMT_EN_VAP1_8812F BIT(1) 14782 #define BIT_HIQ_NO_LMT_EN_ROOT_8812F BIT(0) 14783 14784 /* 2 REG_DTIM_COUNTER_ROOT_8812F */ 14785 14786 #define BIT_SHIFT_DTIM_COUNT_ROOT_8812F 0 14787 #define BIT_MASK_DTIM_COUNT_ROOT_8812F 0xff 14788 #define BIT_DTIM_COUNT_ROOT_8812F(x) \ 14789 (((x) & BIT_MASK_DTIM_COUNT_ROOT_8812F) \ 14790 << BIT_SHIFT_DTIM_COUNT_ROOT_8812F) 14791 #define BITS_DTIM_COUNT_ROOT_8812F \ 14792 (BIT_MASK_DTIM_COUNT_ROOT_8812F << BIT_SHIFT_DTIM_COUNT_ROOT_8812F) 14793 #define BIT_CLEAR_DTIM_COUNT_ROOT_8812F(x) ((x) & (~BITS_DTIM_COUNT_ROOT_8812F)) 14794 #define BIT_GET_DTIM_COUNT_ROOT_8812F(x) \ 14795 (((x) >> BIT_SHIFT_DTIM_COUNT_ROOT_8812F) & \ 14796 BIT_MASK_DTIM_COUNT_ROOT_8812F) 14797 #define BIT_SET_DTIM_COUNT_ROOT_8812F(x, v) \ 14798 (BIT_CLEAR_DTIM_COUNT_ROOT_8812F(x) | BIT_DTIM_COUNT_ROOT_8812F(v)) 14799 14800 /* 2 REG_DTIM_COUNTER_VAP1_8812F */ 14801 14802 #define BIT_SHIFT_DTIM_COUNT_VAP1_8812F 0 14803 #define BIT_MASK_DTIM_COUNT_VAP1_8812F 0xff 14804 #define BIT_DTIM_COUNT_VAP1_8812F(x) \ 14805 (((x) & BIT_MASK_DTIM_COUNT_VAP1_8812F) \ 14806 << BIT_SHIFT_DTIM_COUNT_VAP1_8812F) 14807 #define BITS_DTIM_COUNT_VAP1_8812F \ 14808 (BIT_MASK_DTIM_COUNT_VAP1_8812F << BIT_SHIFT_DTIM_COUNT_VAP1_8812F) 14809 #define BIT_CLEAR_DTIM_COUNT_VAP1_8812F(x) ((x) & (~BITS_DTIM_COUNT_VAP1_8812F)) 14810 #define BIT_GET_DTIM_COUNT_VAP1_8812F(x) \ 14811 (((x) >> BIT_SHIFT_DTIM_COUNT_VAP1_8812F) & \ 14812 BIT_MASK_DTIM_COUNT_VAP1_8812F) 14813 #define BIT_SET_DTIM_COUNT_VAP1_8812F(x, v) \ 14814 (BIT_CLEAR_DTIM_COUNT_VAP1_8812F(x) | BIT_DTIM_COUNT_VAP1_8812F(v)) 14815 14816 /* 2 REG_DTIM_COUNTER_VAP2_8812F */ 14817 14818 #define BIT_SHIFT_DTIM_COUNT_VAP2_8812F 0 14819 #define BIT_MASK_DTIM_COUNT_VAP2_8812F 0xff 14820 #define BIT_DTIM_COUNT_VAP2_8812F(x) \ 14821 (((x) & BIT_MASK_DTIM_COUNT_VAP2_8812F) \ 14822 << BIT_SHIFT_DTIM_COUNT_VAP2_8812F) 14823 #define BITS_DTIM_COUNT_VAP2_8812F \ 14824 (BIT_MASK_DTIM_COUNT_VAP2_8812F << BIT_SHIFT_DTIM_COUNT_VAP2_8812F) 14825 #define BIT_CLEAR_DTIM_COUNT_VAP2_8812F(x) ((x) & (~BITS_DTIM_COUNT_VAP2_8812F)) 14826 #define BIT_GET_DTIM_COUNT_VAP2_8812F(x) \ 14827 (((x) >> BIT_SHIFT_DTIM_COUNT_VAP2_8812F) & \ 14828 BIT_MASK_DTIM_COUNT_VAP2_8812F) 14829 #define BIT_SET_DTIM_COUNT_VAP2_8812F(x, v) \ 14830 (BIT_CLEAR_DTIM_COUNT_VAP2_8812F(x) | BIT_DTIM_COUNT_VAP2_8812F(v)) 14831 14832 /* 2 REG_DTIM_COUNTER_VAP3_8812F */ 14833 14834 #define BIT_SHIFT_DTIM_COUNT_VAP3_8812F 0 14835 #define BIT_MASK_DTIM_COUNT_VAP3_8812F 0xff 14836 #define BIT_DTIM_COUNT_VAP3_8812F(x) \ 14837 (((x) & BIT_MASK_DTIM_COUNT_VAP3_8812F) \ 14838 << BIT_SHIFT_DTIM_COUNT_VAP3_8812F) 14839 #define BITS_DTIM_COUNT_VAP3_8812F \ 14840 (BIT_MASK_DTIM_COUNT_VAP3_8812F << BIT_SHIFT_DTIM_COUNT_VAP3_8812F) 14841 #define BIT_CLEAR_DTIM_COUNT_VAP3_8812F(x) ((x) & (~BITS_DTIM_COUNT_VAP3_8812F)) 14842 #define BIT_GET_DTIM_COUNT_VAP3_8812F(x) \ 14843 (((x) >> BIT_SHIFT_DTIM_COUNT_VAP3_8812F) & \ 14844 BIT_MASK_DTIM_COUNT_VAP3_8812F) 14845 #define BIT_SET_DTIM_COUNT_VAP3_8812F(x, v) \ 14846 (BIT_CLEAR_DTIM_COUNT_VAP3_8812F(x) | BIT_DTIM_COUNT_VAP3_8812F(v)) 14847 14848 /* 2 REG_DTIM_COUNTER_VAP4_8812F */ 14849 14850 #define BIT_SHIFT_DTIM_COUNT_VAP4_8812F 0 14851 #define BIT_MASK_DTIM_COUNT_VAP4_8812F 0xff 14852 #define BIT_DTIM_COUNT_VAP4_8812F(x) \ 14853 (((x) & BIT_MASK_DTIM_COUNT_VAP4_8812F) \ 14854 << BIT_SHIFT_DTIM_COUNT_VAP4_8812F) 14855 #define BITS_DTIM_COUNT_VAP4_8812F \ 14856 (BIT_MASK_DTIM_COUNT_VAP4_8812F << BIT_SHIFT_DTIM_COUNT_VAP4_8812F) 14857 #define BIT_CLEAR_DTIM_COUNT_VAP4_8812F(x) ((x) & (~BITS_DTIM_COUNT_VAP4_8812F)) 14858 #define BIT_GET_DTIM_COUNT_VAP4_8812F(x) \ 14859 (((x) >> BIT_SHIFT_DTIM_COUNT_VAP4_8812F) & \ 14860 BIT_MASK_DTIM_COUNT_VAP4_8812F) 14861 #define BIT_SET_DTIM_COUNT_VAP4_8812F(x, v) \ 14862 (BIT_CLEAR_DTIM_COUNT_VAP4_8812F(x) | BIT_DTIM_COUNT_VAP4_8812F(v)) 14863 14864 /* 2 REG_DTIM_COUNTER_VAP5_8812F */ 14865 14866 #define BIT_SHIFT_DTIM_COUNT_VAP5_8812F 0 14867 #define BIT_MASK_DTIM_COUNT_VAP5_8812F 0xff 14868 #define BIT_DTIM_COUNT_VAP5_8812F(x) \ 14869 (((x) & BIT_MASK_DTIM_COUNT_VAP5_8812F) \ 14870 << BIT_SHIFT_DTIM_COUNT_VAP5_8812F) 14871 #define BITS_DTIM_COUNT_VAP5_8812F \ 14872 (BIT_MASK_DTIM_COUNT_VAP5_8812F << BIT_SHIFT_DTIM_COUNT_VAP5_8812F) 14873 #define BIT_CLEAR_DTIM_COUNT_VAP5_8812F(x) ((x) & (~BITS_DTIM_COUNT_VAP5_8812F)) 14874 #define BIT_GET_DTIM_COUNT_VAP5_8812F(x) \ 14875 (((x) >> BIT_SHIFT_DTIM_COUNT_VAP5_8812F) & \ 14876 BIT_MASK_DTIM_COUNT_VAP5_8812F) 14877 #define BIT_SET_DTIM_COUNT_VAP5_8812F(x, v) \ 14878 (BIT_CLEAR_DTIM_COUNT_VAP5_8812F(x) | BIT_DTIM_COUNT_VAP5_8812F(v)) 14879 14880 /* 2 REG_DTIM_COUNTER_VAP6_8812F */ 14881 14882 #define BIT_SHIFT_DTIM_COUNT_VAP6_8812F 0 14883 #define BIT_MASK_DTIM_COUNT_VAP6_8812F 0xff 14884 #define BIT_DTIM_COUNT_VAP6_8812F(x) \ 14885 (((x) & BIT_MASK_DTIM_COUNT_VAP6_8812F) \ 14886 << BIT_SHIFT_DTIM_COUNT_VAP6_8812F) 14887 #define BITS_DTIM_COUNT_VAP6_8812F \ 14888 (BIT_MASK_DTIM_COUNT_VAP6_8812F << BIT_SHIFT_DTIM_COUNT_VAP6_8812F) 14889 #define BIT_CLEAR_DTIM_COUNT_VAP6_8812F(x) ((x) & (~BITS_DTIM_COUNT_VAP6_8812F)) 14890 #define BIT_GET_DTIM_COUNT_VAP6_8812F(x) \ 14891 (((x) >> BIT_SHIFT_DTIM_COUNT_VAP6_8812F) & \ 14892 BIT_MASK_DTIM_COUNT_VAP6_8812F) 14893 #define BIT_SET_DTIM_COUNT_VAP6_8812F(x, v) \ 14894 (BIT_CLEAR_DTIM_COUNT_VAP6_8812F(x) | BIT_DTIM_COUNT_VAP6_8812F(v)) 14895 14896 /* 2 REG_DTIM_COUNTER_VAP7_8812F */ 14897 14898 #define BIT_SHIFT_DTIM_COUNT_VAP7_8812F 0 14899 #define BIT_MASK_DTIM_COUNT_VAP7_8812F 0xff 14900 #define BIT_DTIM_COUNT_VAP7_8812F(x) \ 14901 (((x) & BIT_MASK_DTIM_COUNT_VAP7_8812F) \ 14902 << BIT_SHIFT_DTIM_COUNT_VAP7_8812F) 14903 #define BITS_DTIM_COUNT_VAP7_8812F \ 14904 (BIT_MASK_DTIM_COUNT_VAP7_8812F << BIT_SHIFT_DTIM_COUNT_VAP7_8812F) 14905 #define BIT_CLEAR_DTIM_COUNT_VAP7_8812F(x) ((x) & (~BITS_DTIM_COUNT_VAP7_8812F)) 14906 #define BIT_GET_DTIM_COUNT_VAP7_8812F(x) \ 14907 (((x) >> BIT_SHIFT_DTIM_COUNT_VAP7_8812F) & \ 14908 BIT_MASK_DTIM_COUNT_VAP7_8812F) 14909 #define BIT_SET_DTIM_COUNT_VAP7_8812F(x, v) \ 14910 (BIT_CLEAR_DTIM_COUNT_VAP7_8812F(x) | BIT_DTIM_COUNT_VAP7_8812F(v)) 14911 14912 /* 2 REG_DIS_ATIM_8812F */ 14913 #define BIT_DIS_ATIM_VAP7_8812F BIT(7) 14914 #define BIT_DIS_ATIM_VAP6_8812F BIT(6) 14915 #define BIT_DIS_ATIM_VAP5_8812F BIT(5) 14916 #define BIT_DIS_ATIM_VAP4_8812F BIT(4) 14917 #define BIT_DIS_ATIM_VAP3_8812F BIT(3) 14918 #define BIT_DIS_ATIM_VAP2_8812F BIT(2) 14919 #define BIT_DIS_ATIM_VAP1_8812F BIT(1) 14920 #define BIT_DIS_ATIM_ROOT_8812F BIT(0) 14921 14922 /* 2 REG_EARLY_128US_8812F */ 14923 14924 #define BIT_SHIFT_TSFT_SEL_TIMER1_8812F 3 14925 #define BIT_MASK_TSFT_SEL_TIMER1_8812F 0x7 14926 #define BIT_TSFT_SEL_TIMER1_8812F(x) \ 14927 (((x) & BIT_MASK_TSFT_SEL_TIMER1_8812F) \ 14928 << BIT_SHIFT_TSFT_SEL_TIMER1_8812F) 14929 #define BITS_TSFT_SEL_TIMER1_8812F \ 14930 (BIT_MASK_TSFT_SEL_TIMER1_8812F << BIT_SHIFT_TSFT_SEL_TIMER1_8812F) 14931 #define BIT_CLEAR_TSFT_SEL_TIMER1_8812F(x) ((x) & (~BITS_TSFT_SEL_TIMER1_8812F)) 14932 #define BIT_GET_TSFT_SEL_TIMER1_8812F(x) \ 14933 (((x) >> BIT_SHIFT_TSFT_SEL_TIMER1_8812F) & \ 14934 BIT_MASK_TSFT_SEL_TIMER1_8812F) 14935 #define BIT_SET_TSFT_SEL_TIMER1_8812F(x, v) \ 14936 (BIT_CLEAR_TSFT_SEL_TIMER1_8812F(x) | BIT_TSFT_SEL_TIMER1_8812F(v)) 14937 14938 #define BIT_SHIFT_EARLY_128US_8812F 0 14939 #define BIT_MASK_EARLY_128US_8812F 0x7 14940 #define BIT_EARLY_128US_8812F(x) \ 14941 (((x) & BIT_MASK_EARLY_128US_8812F) << BIT_SHIFT_EARLY_128US_8812F) 14942 #define BITS_EARLY_128US_8812F \ 14943 (BIT_MASK_EARLY_128US_8812F << BIT_SHIFT_EARLY_128US_8812F) 14944 #define BIT_CLEAR_EARLY_128US_8812F(x) ((x) & (~BITS_EARLY_128US_8812F)) 14945 #define BIT_GET_EARLY_128US_8812F(x) \ 14946 (((x) >> BIT_SHIFT_EARLY_128US_8812F) & BIT_MASK_EARLY_128US_8812F) 14947 #define BIT_SET_EARLY_128US_8812F(x, v) \ 14948 (BIT_CLEAR_EARLY_128US_8812F(x) | BIT_EARLY_128US_8812F(v)) 14949 14950 /* 2 REG_P2PPS1_CTRL_8812F */ 14951 #define BIT_P2P1_CTW_ALLSTASLEEP_8812F BIT(7) 14952 #define BIT_P2P1_OFF_DISTX_EN_8812F BIT(6) 14953 #define BIT_P2P1_PWR_MGT_EN_8812F BIT(5) 14954 #define BIT_P2P1_NOA1_EN_8812F BIT(2) 14955 #define BIT_P2P1_NOA0_EN_8812F BIT(1) 14956 14957 /* 2 REG_P2PPS2_CTRL_8812F */ 14958 #define BIT_P2P2_CTW_ALLSTASLEEP_8812F BIT(7) 14959 #define BIT_P2P2_OFF_DISTX_EN_8812F BIT(6) 14960 #define BIT_P2P2_PWR_MGT_EN_8812F BIT(5) 14961 #define BIT_P2P2_NOA1_EN_8812F BIT(2) 14962 #define BIT_P2P2_NOA0_EN_8812F BIT(1) 14963 14964 /* 2 REG_TIMER0_SRC_SEL_8812F */ 14965 14966 #define BIT_SHIFT_SYNC_CLI_SEL_8812F 4 14967 #define BIT_MASK_SYNC_CLI_SEL_8812F 0x7 14968 #define BIT_SYNC_CLI_SEL_8812F(x) \ 14969 (((x) & BIT_MASK_SYNC_CLI_SEL_8812F) << BIT_SHIFT_SYNC_CLI_SEL_8812F) 14970 #define BITS_SYNC_CLI_SEL_8812F \ 14971 (BIT_MASK_SYNC_CLI_SEL_8812F << BIT_SHIFT_SYNC_CLI_SEL_8812F) 14972 #define BIT_CLEAR_SYNC_CLI_SEL_8812F(x) ((x) & (~BITS_SYNC_CLI_SEL_8812F)) 14973 #define BIT_GET_SYNC_CLI_SEL_8812F(x) \ 14974 (((x) >> BIT_SHIFT_SYNC_CLI_SEL_8812F) & BIT_MASK_SYNC_CLI_SEL_8812F) 14975 #define BIT_SET_SYNC_CLI_SEL_8812F(x, v) \ 14976 (BIT_CLEAR_SYNC_CLI_SEL_8812F(x) | BIT_SYNC_CLI_SEL_8812F(v)) 14977 14978 #define BIT_SHIFT_TSFT_SEL_TIMER0_8812F 0 14979 #define BIT_MASK_TSFT_SEL_TIMER0_8812F 0x7 14980 #define BIT_TSFT_SEL_TIMER0_8812F(x) \ 14981 (((x) & BIT_MASK_TSFT_SEL_TIMER0_8812F) \ 14982 << BIT_SHIFT_TSFT_SEL_TIMER0_8812F) 14983 #define BITS_TSFT_SEL_TIMER0_8812F \ 14984 (BIT_MASK_TSFT_SEL_TIMER0_8812F << BIT_SHIFT_TSFT_SEL_TIMER0_8812F) 14985 #define BIT_CLEAR_TSFT_SEL_TIMER0_8812F(x) ((x) & (~BITS_TSFT_SEL_TIMER0_8812F)) 14986 #define BIT_GET_TSFT_SEL_TIMER0_8812F(x) \ 14987 (((x) >> BIT_SHIFT_TSFT_SEL_TIMER0_8812F) & \ 14988 BIT_MASK_TSFT_SEL_TIMER0_8812F) 14989 #define BIT_SET_TSFT_SEL_TIMER0_8812F(x, v) \ 14990 (BIT_CLEAR_TSFT_SEL_TIMER0_8812F(x) | BIT_TSFT_SEL_TIMER0_8812F(v)) 14991 14992 /* 2 REG_NOA_UNIT_SEL_8812F */ 14993 14994 #define BIT_SHIFT_NOA_UNIT2_SEL_8812F 8 14995 #define BIT_MASK_NOA_UNIT2_SEL_8812F 0x7 14996 #define BIT_NOA_UNIT2_SEL_8812F(x) \ 14997 (((x) & BIT_MASK_NOA_UNIT2_SEL_8812F) << BIT_SHIFT_NOA_UNIT2_SEL_8812F) 14998 #define BITS_NOA_UNIT2_SEL_8812F \ 14999 (BIT_MASK_NOA_UNIT2_SEL_8812F << BIT_SHIFT_NOA_UNIT2_SEL_8812F) 15000 #define BIT_CLEAR_NOA_UNIT2_SEL_8812F(x) ((x) & (~BITS_NOA_UNIT2_SEL_8812F)) 15001 #define BIT_GET_NOA_UNIT2_SEL_8812F(x) \ 15002 (((x) >> BIT_SHIFT_NOA_UNIT2_SEL_8812F) & BIT_MASK_NOA_UNIT2_SEL_8812F) 15003 #define BIT_SET_NOA_UNIT2_SEL_8812F(x, v) \ 15004 (BIT_CLEAR_NOA_UNIT2_SEL_8812F(x) | BIT_NOA_UNIT2_SEL_8812F(v)) 15005 15006 #define BIT_SHIFT_NOA_UNIT1_SEL_8812F 4 15007 #define BIT_MASK_NOA_UNIT1_SEL_8812F 0x7 15008 #define BIT_NOA_UNIT1_SEL_8812F(x) \ 15009 (((x) & BIT_MASK_NOA_UNIT1_SEL_8812F) << BIT_SHIFT_NOA_UNIT1_SEL_8812F) 15010 #define BITS_NOA_UNIT1_SEL_8812F \ 15011 (BIT_MASK_NOA_UNIT1_SEL_8812F << BIT_SHIFT_NOA_UNIT1_SEL_8812F) 15012 #define BIT_CLEAR_NOA_UNIT1_SEL_8812F(x) ((x) & (~BITS_NOA_UNIT1_SEL_8812F)) 15013 #define BIT_GET_NOA_UNIT1_SEL_8812F(x) \ 15014 (((x) >> BIT_SHIFT_NOA_UNIT1_SEL_8812F) & BIT_MASK_NOA_UNIT1_SEL_8812F) 15015 #define BIT_SET_NOA_UNIT1_SEL_8812F(x, v) \ 15016 (BIT_CLEAR_NOA_UNIT1_SEL_8812F(x) | BIT_NOA_UNIT1_SEL_8812F(v)) 15017 15018 #define BIT_SHIFT_NOA_UNIT0_SEL_8812F 0 15019 #define BIT_MASK_NOA_UNIT0_SEL_8812F 0x7 15020 #define BIT_NOA_UNIT0_SEL_8812F(x) \ 15021 (((x) & BIT_MASK_NOA_UNIT0_SEL_8812F) << BIT_SHIFT_NOA_UNIT0_SEL_8812F) 15022 #define BITS_NOA_UNIT0_SEL_8812F \ 15023 (BIT_MASK_NOA_UNIT0_SEL_8812F << BIT_SHIFT_NOA_UNIT0_SEL_8812F) 15024 #define BIT_CLEAR_NOA_UNIT0_SEL_8812F(x) ((x) & (~BITS_NOA_UNIT0_SEL_8812F)) 15025 #define BIT_GET_NOA_UNIT0_SEL_8812F(x) \ 15026 (((x) >> BIT_SHIFT_NOA_UNIT0_SEL_8812F) & BIT_MASK_NOA_UNIT0_SEL_8812F) 15027 #define BIT_SET_NOA_UNIT0_SEL_8812F(x, v) \ 15028 (BIT_CLEAR_NOA_UNIT0_SEL_8812F(x) | BIT_NOA_UNIT0_SEL_8812F(v)) 15029 15030 /* 2 REG_P2POFF_DIS_TXTIME_8812F */ 15031 15032 #define BIT_SHIFT_P2POFF_DIS_TXTIME_8812F 0 15033 #define BIT_MASK_P2POFF_DIS_TXTIME_8812F 0xff 15034 #define BIT_P2POFF_DIS_TXTIME_8812F(x) \ 15035 (((x) & BIT_MASK_P2POFF_DIS_TXTIME_8812F) \ 15036 << BIT_SHIFT_P2POFF_DIS_TXTIME_8812F) 15037 #define BITS_P2POFF_DIS_TXTIME_8812F \ 15038 (BIT_MASK_P2POFF_DIS_TXTIME_8812F << BIT_SHIFT_P2POFF_DIS_TXTIME_8812F) 15039 #define BIT_CLEAR_P2POFF_DIS_TXTIME_8812F(x) \ 15040 ((x) & (~BITS_P2POFF_DIS_TXTIME_8812F)) 15041 #define BIT_GET_P2POFF_DIS_TXTIME_8812F(x) \ 15042 (((x) >> BIT_SHIFT_P2POFF_DIS_TXTIME_8812F) & \ 15043 BIT_MASK_P2POFF_DIS_TXTIME_8812F) 15044 #define BIT_SET_P2POFF_DIS_TXTIME_8812F(x, v) \ 15045 (BIT_CLEAR_P2POFF_DIS_TXTIME_8812F(x) | BIT_P2POFF_DIS_TXTIME_8812F(v)) 15046 15047 /* 2 REG_MBSSID_BCN_SPACE2_8812F */ 15048 15049 #define BIT_SHIFT_BCN_SPACE_CLINT2_8812F 16 15050 #define BIT_MASK_BCN_SPACE_CLINT2_8812F 0xfff 15051 #define BIT_BCN_SPACE_CLINT2_8812F(x) \ 15052 (((x) & BIT_MASK_BCN_SPACE_CLINT2_8812F) \ 15053 << BIT_SHIFT_BCN_SPACE_CLINT2_8812F) 15054 #define BITS_BCN_SPACE_CLINT2_8812F \ 15055 (BIT_MASK_BCN_SPACE_CLINT2_8812F << BIT_SHIFT_BCN_SPACE_CLINT2_8812F) 15056 #define BIT_CLEAR_BCN_SPACE_CLINT2_8812F(x) \ 15057 ((x) & (~BITS_BCN_SPACE_CLINT2_8812F)) 15058 #define BIT_GET_BCN_SPACE_CLINT2_8812F(x) \ 15059 (((x) >> BIT_SHIFT_BCN_SPACE_CLINT2_8812F) & \ 15060 BIT_MASK_BCN_SPACE_CLINT2_8812F) 15061 #define BIT_SET_BCN_SPACE_CLINT2_8812F(x, v) \ 15062 (BIT_CLEAR_BCN_SPACE_CLINT2_8812F(x) | BIT_BCN_SPACE_CLINT2_8812F(v)) 15063 15064 #define BIT_SHIFT_BCN_SPACE_CLINT1_8812F 0 15065 #define BIT_MASK_BCN_SPACE_CLINT1_8812F 0xfff 15066 #define BIT_BCN_SPACE_CLINT1_8812F(x) \ 15067 (((x) & BIT_MASK_BCN_SPACE_CLINT1_8812F) \ 15068 << BIT_SHIFT_BCN_SPACE_CLINT1_8812F) 15069 #define BITS_BCN_SPACE_CLINT1_8812F \ 15070 (BIT_MASK_BCN_SPACE_CLINT1_8812F << BIT_SHIFT_BCN_SPACE_CLINT1_8812F) 15071 #define BIT_CLEAR_BCN_SPACE_CLINT1_8812F(x) \ 15072 ((x) & (~BITS_BCN_SPACE_CLINT1_8812F)) 15073 #define BIT_GET_BCN_SPACE_CLINT1_8812F(x) \ 15074 (((x) >> BIT_SHIFT_BCN_SPACE_CLINT1_8812F) & \ 15075 BIT_MASK_BCN_SPACE_CLINT1_8812F) 15076 #define BIT_SET_BCN_SPACE_CLINT1_8812F(x, v) \ 15077 (BIT_CLEAR_BCN_SPACE_CLINT1_8812F(x) | BIT_BCN_SPACE_CLINT1_8812F(v)) 15078 15079 /* 2 REG_MBSSID_BCN_SPACE3_8812F */ 15080 15081 #define BIT_SHIFT_SUB_BCN_SPACE_8812F 16 15082 #define BIT_MASK_SUB_BCN_SPACE_8812F 0xff 15083 #define BIT_SUB_BCN_SPACE_8812F(x) \ 15084 (((x) & BIT_MASK_SUB_BCN_SPACE_8812F) << BIT_SHIFT_SUB_BCN_SPACE_8812F) 15085 #define BITS_SUB_BCN_SPACE_8812F \ 15086 (BIT_MASK_SUB_BCN_SPACE_8812F << BIT_SHIFT_SUB_BCN_SPACE_8812F) 15087 #define BIT_CLEAR_SUB_BCN_SPACE_8812F(x) ((x) & (~BITS_SUB_BCN_SPACE_8812F)) 15088 #define BIT_GET_SUB_BCN_SPACE_8812F(x) \ 15089 (((x) >> BIT_SHIFT_SUB_BCN_SPACE_8812F) & BIT_MASK_SUB_BCN_SPACE_8812F) 15090 #define BIT_SET_SUB_BCN_SPACE_8812F(x, v) \ 15091 (BIT_CLEAR_SUB_BCN_SPACE_8812F(x) | BIT_SUB_BCN_SPACE_8812F(v)) 15092 15093 #define BIT_SHIFT_BCN_SPACE_CLINT3_8812F 0 15094 #define BIT_MASK_BCN_SPACE_CLINT3_8812F 0xfff 15095 #define BIT_BCN_SPACE_CLINT3_8812F(x) \ 15096 (((x) & BIT_MASK_BCN_SPACE_CLINT3_8812F) \ 15097 << BIT_SHIFT_BCN_SPACE_CLINT3_8812F) 15098 #define BITS_BCN_SPACE_CLINT3_8812F \ 15099 (BIT_MASK_BCN_SPACE_CLINT3_8812F << BIT_SHIFT_BCN_SPACE_CLINT3_8812F) 15100 #define BIT_CLEAR_BCN_SPACE_CLINT3_8812F(x) \ 15101 ((x) & (~BITS_BCN_SPACE_CLINT3_8812F)) 15102 #define BIT_GET_BCN_SPACE_CLINT3_8812F(x) \ 15103 (((x) >> BIT_SHIFT_BCN_SPACE_CLINT3_8812F) & \ 15104 BIT_MASK_BCN_SPACE_CLINT3_8812F) 15105 #define BIT_SET_BCN_SPACE_CLINT3_8812F(x, v) \ 15106 (BIT_CLEAR_BCN_SPACE_CLINT3_8812F(x) | BIT_BCN_SPACE_CLINT3_8812F(v)) 15107 15108 /* 2 REG_ACMHWCTRL_8812F */ 15109 #define BIT_BEQ_ACM_STATUS_8812F BIT(7) 15110 #define BIT_VIQ_ACM_STATUS_8812F BIT(6) 15111 #define BIT_VOQ_ACM_STATUS_8812F BIT(5) 15112 #define BIT_BEQ_ACM_EN_8812F BIT(3) 15113 #define BIT_VIQ_ACM_EN_8812F BIT(2) 15114 #define BIT_VOQ_ACM_EN_8812F BIT(1) 15115 #define BIT_ACMHWEN_8812F BIT(0) 15116 15117 /* 2 REG_ACMRSTCTRL_8812F */ 15118 #define BIT_BE_ACM_RESET_USED_TIME_8812F BIT(2) 15119 #define BIT_VI_ACM_RESET_USED_TIME_8812F BIT(1) 15120 #define BIT_VO_ACM_RESET_USED_TIME_8812F BIT(0) 15121 15122 /* 2 REG_ACMAVG_8812F */ 15123 15124 #define BIT_SHIFT_AVGPERIOD_8812F 0 15125 #define BIT_MASK_AVGPERIOD_8812F 0xffff 15126 #define BIT_AVGPERIOD_8812F(x) \ 15127 (((x) & BIT_MASK_AVGPERIOD_8812F) << BIT_SHIFT_AVGPERIOD_8812F) 15128 #define BITS_AVGPERIOD_8812F \ 15129 (BIT_MASK_AVGPERIOD_8812F << BIT_SHIFT_AVGPERIOD_8812F) 15130 #define BIT_CLEAR_AVGPERIOD_8812F(x) ((x) & (~BITS_AVGPERIOD_8812F)) 15131 #define BIT_GET_AVGPERIOD_8812F(x) \ 15132 (((x) >> BIT_SHIFT_AVGPERIOD_8812F) & BIT_MASK_AVGPERIOD_8812F) 15133 #define BIT_SET_AVGPERIOD_8812F(x, v) \ 15134 (BIT_CLEAR_AVGPERIOD_8812F(x) | BIT_AVGPERIOD_8812F(v)) 15135 15136 /* 2 REG_VO_ADMTIME_8812F */ 15137 15138 #define BIT_SHIFT_VO_ADMITTED_TIME_8812F 0 15139 #define BIT_MASK_VO_ADMITTED_TIME_8812F 0xffff 15140 #define BIT_VO_ADMITTED_TIME_8812F(x) \ 15141 (((x) & BIT_MASK_VO_ADMITTED_TIME_8812F) \ 15142 << BIT_SHIFT_VO_ADMITTED_TIME_8812F) 15143 #define BITS_VO_ADMITTED_TIME_8812F \ 15144 (BIT_MASK_VO_ADMITTED_TIME_8812F << BIT_SHIFT_VO_ADMITTED_TIME_8812F) 15145 #define BIT_CLEAR_VO_ADMITTED_TIME_8812F(x) \ 15146 ((x) & (~BITS_VO_ADMITTED_TIME_8812F)) 15147 #define BIT_GET_VO_ADMITTED_TIME_8812F(x) \ 15148 (((x) >> BIT_SHIFT_VO_ADMITTED_TIME_8812F) & \ 15149 BIT_MASK_VO_ADMITTED_TIME_8812F) 15150 #define BIT_SET_VO_ADMITTED_TIME_8812F(x, v) \ 15151 (BIT_CLEAR_VO_ADMITTED_TIME_8812F(x) | BIT_VO_ADMITTED_TIME_8812F(v)) 15152 15153 /* 2 REG_VI_ADMTIME_8812F */ 15154 15155 #define BIT_SHIFT_VI_ADMITTED_TIME_8812F 0 15156 #define BIT_MASK_VI_ADMITTED_TIME_8812F 0xffff 15157 #define BIT_VI_ADMITTED_TIME_8812F(x) \ 15158 (((x) & BIT_MASK_VI_ADMITTED_TIME_8812F) \ 15159 << BIT_SHIFT_VI_ADMITTED_TIME_8812F) 15160 #define BITS_VI_ADMITTED_TIME_8812F \ 15161 (BIT_MASK_VI_ADMITTED_TIME_8812F << BIT_SHIFT_VI_ADMITTED_TIME_8812F) 15162 #define BIT_CLEAR_VI_ADMITTED_TIME_8812F(x) \ 15163 ((x) & (~BITS_VI_ADMITTED_TIME_8812F)) 15164 #define BIT_GET_VI_ADMITTED_TIME_8812F(x) \ 15165 (((x) >> BIT_SHIFT_VI_ADMITTED_TIME_8812F) & \ 15166 BIT_MASK_VI_ADMITTED_TIME_8812F) 15167 #define BIT_SET_VI_ADMITTED_TIME_8812F(x, v) \ 15168 (BIT_CLEAR_VI_ADMITTED_TIME_8812F(x) | BIT_VI_ADMITTED_TIME_8812F(v)) 15169 15170 /* 2 REG_BE_ADMTIME_8812F */ 15171 15172 #define BIT_SHIFT_BE_ADMITTED_TIME_8812F 0 15173 #define BIT_MASK_BE_ADMITTED_TIME_8812F 0xffff 15174 #define BIT_BE_ADMITTED_TIME_8812F(x) \ 15175 (((x) & BIT_MASK_BE_ADMITTED_TIME_8812F) \ 15176 << BIT_SHIFT_BE_ADMITTED_TIME_8812F) 15177 #define BITS_BE_ADMITTED_TIME_8812F \ 15178 (BIT_MASK_BE_ADMITTED_TIME_8812F << BIT_SHIFT_BE_ADMITTED_TIME_8812F) 15179 #define BIT_CLEAR_BE_ADMITTED_TIME_8812F(x) \ 15180 ((x) & (~BITS_BE_ADMITTED_TIME_8812F)) 15181 #define BIT_GET_BE_ADMITTED_TIME_8812F(x) \ 15182 (((x) >> BIT_SHIFT_BE_ADMITTED_TIME_8812F) & \ 15183 BIT_MASK_BE_ADMITTED_TIME_8812F) 15184 #define BIT_SET_BE_ADMITTED_TIME_8812F(x, v) \ 15185 (BIT_CLEAR_BE_ADMITTED_TIME_8812F(x) | BIT_BE_ADMITTED_TIME_8812F(v)) 15186 15187 /* 2 REG_MAC_HEADER_NAV_OFFSET_8812F */ 15188 15189 #define BIT_SHIFT_MAC_HEADER_NAV_OFFSET_8812F 0 15190 #define BIT_MASK_MAC_HEADER_NAV_OFFSET_8812F 0xff 15191 #define BIT_MAC_HEADER_NAV_OFFSET_8812F(x) \ 15192 (((x) & BIT_MASK_MAC_HEADER_NAV_OFFSET_8812F) \ 15193 << BIT_SHIFT_MAC_HEADER_NAV_OFFSET_8812F) 15194 #define BITS_MAC_HEADER_NAV_OFFSET_8812F \ 15195 (BIT_MASK_MAC_HEADER_NAV_OFFSET_8812F \ 15196 << BIT_SHIFT_MAC_HEADER_NAV_OFFSET_8812F) 15197 #define BIT_CLEAR_MAC_HEADER_NAV_OFFSET_8812F(x) \ 15198 ((x) & (~BITS_MAC_HEADER_NAV_OFFSET_8812F)) 15199 #define BIT_GET_MAC_HEADER_NAV_OFFSET_8812F(x) \ 15200 (((x) >> BIT_SHIFT_MAC_HEADER_NAV_OFFSET_8812F) & \ 15201 BIT_MASK_MAC_HEADER_NAV_OFFSET_8812F) 15202 #define BIT_SET_MAC_HEADER_NAV_OFFSET_8812F(x, v) \ 15203 (BIT_CLEAR_MAC_HEADER_NAV_OFFSET_8812F(x) | \ 15204 BIT_MAC_HEADER_NAV_OFFSET_8812F(v)) 15205 15206 /* 2 REG_DIS_NDPA_NAV_CHECK_8812F */ 15207 #define BIT_CHG_POWER_BCN_AREA_V1_8812F BIT(1) 15208 #define BIT_DIS_NDPA_NAV_CHECK_8812F BIT(0) 15209 15210 /* 2 REG_EDCA_RANDOM_GEN_8812F */ 15211 15212 #define BIT_SHIFT_RANDOM_GEN_8812F 0 15213 #define BIT_MASK_RANDOM_GEN_8812F 0xffffff 15214 #define BIT_RANDOM_GEN_8812F(x) \ 15215 (((x) & BIT_MASK_RANDOM_GEN_8812F) << BIT_SHIFT_RANDOM_GEN_8812F) 15216 #define BITS_RANDOM_GEN_8812F \ 15217 (BIT_MASK_RANDOM_GEN_8812F << BIT_SHIFT_RANDOM_GEN_8812F) 15218 #define BIT_CLEAR_RANDOM_GEN_8812F(x) ((x) & (~BITS_RANDOM_GEN_8812F)) 15219 #define BIT_GET_RANDOM_GEN_8812F(x) \ 15220 (((x) >> BIT_SHIFT_RANDOM_GEN_8812F) & BIT_MASK_RANDOM_GEN_8812F) 15221 #define BIT_SET_RANDOM_GEN_8812F(x, v) \ 15222 (BIT_CLEAR_RANDOM_GEN_8812F(x) | BIT_RANDOM_GEN_8812F(v)) 15223 15224 /* 2 REG_TXCMD_NOA_SEL_8812F */ 15225 15226 #define BIT_SHIFT_NOA_SEL_V2_8812F 4 15227 #define BIT_MASK_NOA_SEL_V2_8812F 0x7 15228 #define BIT_NOA_SEL_V2_8812F(x) \ 15229 (((x) & BIT_MASK_NOA_SEL_V2_8812F) << BIT_SHIFT_NOA_SEL_V2_8812F) 15230 #define BITS_NOA_SEL_V2_8812F \ 15231 (BIT_MASK_NOA_SEL_V2_8812F << BIT_SHIFT_NOA_SEL_V2_8812F) 15232 #define BIT_CLEAR_NOA_SEL_V2_8812F(x) ((x) & (~BITS_NOA_SEL_V2_8812F)) 15233 #define BIT_GET_NOA_SEL_V2_8812F(x) \ 15234 (((x) >> BIT_SHIFT_NOA_SEL_V2_8812F) & BIT_MASK_NOA_SEL_V2_8812F) 15235 #define BIT_SET_NOA_SEL_V2_8812F(x, v) \ 15236 (BIT_CLEAR_NOA_SEL_V2_8812F(x) | BIT_NOA_SEL_V2_8812F(v)) 15237 15238 #define BIT_SHIFT_TXCMD_SEG_SEL_8812F 0 15239 #define BIT_MASK_TXCMD_SEG_SEL_8812F 0xf 15240 #define BIT_TXCMD_SEG_SEL_8812F(x) \ 15241 (((x) & BIT_MASK_TXCMD_SEG_SEL_8812F) << BIT_SHIFT_TXCMD_SEG_SEL_8812F) 15242 #define BITS_TXCMD_SEG_SEL_8812F \ 15243 (BIT_MASK_TXCMD_SEG_SEL_8812F << BIT_SHIFT_TXCMD_SEG_SEL_8812F) 15244 #define BIT_CLEAR_TXCMD_SEG_SEL_8812F(x) ((x) & (~BITS_TXCMD_SEG_SEL_8812F)) 15245 #define BIT_GET_TXCMD_SEG_SEL_8812F(x) \ 15246 (((x) >> BIT_SHIFT_TXCMD_SEG_SEL_8812F) & BIT_MASK_TXCMD_SEG_SEL_8812F) 15247 #define BIT_SET_TXCMD_SEG_SEL_8812F(x, v) \ 15248 (BIT_CLEAR_TXCMD_SEG_SEL_8812F(x) | BIT_TXCMD_SEG_SEL_8812F(v)) 15249 15250 /* 2 REG_32K_CLK_SEL_8812F */ 15251 #define BIT_R_BCNERR_CNT_EN_8812F BIT(20) 15252 15253 #define BIT_SHIFT_R_BCNERR_PORT_SEL_8812F 16 15254 #define BIT_MASK_R_BCNERR_PORT_SEL_8812F 0x7 15255 #define BIT_R_BCNERR_PORT_SEL_8812F(x) \ 15256 (((x) & BIT_MASK_R_BCNERR_PORT_SEL_8812F) \ 15257 << BIT_SHIFT_R_BCNERR_PORT_SEL_8812F) 15258 #define BITS_R_BCNERR_PORT_SEL_8812F \ 15259 (BIT_MASK_R_BCNERR_PORT_SEL_8812F << BIT_SHIFT_R_BCNERR_PORT_SEL_8812F) 15260 #define BIT_CLEAR_R_BCNERR_PORT_SEL_8812F(x) \ 15261 ((x) & (~BITS_R_BCNERR_PORT_SEL_8812F)) 15262 #define BIT_GET_R_BCNERR_PORT_SEL_8812F(x) \ 15263 (((x) >> BIT_SHIFT_R_BCNERR_PORT_SEL_8812F) & \ 15264 BIT_MASK_R_BCNERR_PORT_SEL_8812F) 15265 #define BIT_SET_R_BCNERR_PORT_SEL_8812F(x, v) \ 15266 (BIT_CLEAR_R_BCNERR_PORT_SEL_8812F(x) | BIT_R_BCNERR_PORT_SEL_8812F(v)) 15267 15268 #define BIT_SHIFT_R_TXPAUSE1_8812F 8 15269 #define BIT_MASK_R_TXPAUSE1_8812F 0xff 15270 #define BIT_R_TXPAUSE1_8812F(x) \ 15271 (((x) & BIT_MASK_R_TXPAUSE1_8812F) << BIT_SHIFT_R_TXPAUSE1_8812F) 15272 #define BITS_R_TXPAUSE1_8812F \ 15273 (BIT_MASK_R_TXPAUSE1_8812F << BIT_SHIFT_R_TXPAUSE1_8812F) 15274 #define BIT_CLEAR_R_TXPAUSE1_8812F(x) ((x) & (~BITS_R_TXPAUSE1_8812F)) 15275 #define BIT_GET_R_TXPAUSE1_8812F(x) \ 15276 (((x) >> BIT_SHIFT_R_TXPAUSE1_8812F) & BIT_MASK_R_TXPAUSE1_8812F) 15277 #define BIT_SET_R_TXPAUSE1_8812F(x, v) \ 15278 (BIT_CLEAR_R_TXPAUSE1_8812F(x) | BIT_R_TXPAUSE1_8812F(v)) 15279 15280 #define BIT_SLEEP_32K_EN_V1_8812F BIT(2) 15281 15282 #define BIT_SHIFT_BW_CFG_8812F 0 15283 #define BIT_MASK_BW_CFG_8812F 0x3 15284 #define BIT_BW_CFG_8812F(x) \ 15285 (((x) & BIT_MASK_BW_CFG_8812F) << BIT_SHIFT_BW_CFG_8812F) 15286 #define BITS_BW_CFG_8812F (BIT_MASK_BW_CFG_8812F << BIT_SHIFT_BW_CFG_8812F) 15287 #define BIT_CLEAR_BW_CFG_8812F(x) ((x) & (~BITS_BW_CFG_8812F)) 15288 #define BIT_GET_BW_CFG_8812F(x) \ 15289 (((x) >> BIT_SHIFT_BW_CFG_8812F) & BIT_MASK_BW_CFG_8812F) 15290 #define BIT_SET_BW_CFG_8812F(x, v) \ 15291 (BIT_CLEAR_BW_CFG_8812F(x) | BIT_BW_CFG_8812F(v)) 15292 15293 /* 2 REG_EARLYINT_ADJUST_8812F */ 15294 15295 #define BIT_SHIFT_RXBCN_TIMER_8812F 16 15296 #define BIT_MASK_RXBCN_TIMER_8812F 0xffff 15297 #define BIT_RXBCN_TIMER_8812F(x) \ 15298 (((x) & BIT_MASK_RXBCN_TIMER_8812F) << BIT_SHIFT_RXBCN_TIMER_8812F) 15299 #define BITS_RXBCN_TIMER_8812F \ 15300 (BIT_MASK_RXBCN_TIMER_8812F << BIT_SHIFT_RXBCN_TIMER_8812F) 15301 #define BIT_CLEAR_RXBCN_TIMER_8812F(x) ((x) & (~BITS_RXBCN_TIMER_8812F)) 15302 #define BIT_GET_RXBCN_TIMER_8812F(x) \ 15303 (((x) >> BIT_SHIFT_RXBCN_TIMER_8812F) & BIT_MASK_RXBCN_TIMER_8812F) 15304 #define BIT_SET_RXBCN_TIMER_8812F(x, v) \ 15305 (BIT_CLEAR_RXBCN_TIMER_8812F(x) | BIT_RXBCN_TIMER_8812F(v)) 15306 15307 #define BIT_SHIFT_R_ERLYINTADJ_8812F 0 15308 #define BIT_MASK_R_ERLYINTADJ_8812F 0xffff 15309 #define BIT_R_ERLYINTADJ_8812F(x) \ 15310 (((x) & BIT_MASK_R_ERLYINTADJ_8812F) << BIT_SHIFT_R_ERLYINTADJ_8812F) 15311 #define BITS_R_ERLYINTADJ_8812F \ 15312 (BIT_MASK_R_ERLYINTADJ_8812F << BIT_SHIFT_R_ERLYINTADJ_8812F) 15313 #define BIT_CLEAR_R_ERLYINTADJ_8812F(x) ((x) & (~BITS_R_ERLYINTADJ_8812F)) 15314 #define BIT_GET_R_ERLYINTADJ_8812F(x) \ 15315 (((x) >> BIT_SHIFT_R_ERLYINTADJ_8812F) & BIT_MASK_R_ERLYINTADJ_8812F) 15316 #define BIT_SET_R_ERLYINTADJ_8812F(x, v) \ 15317 (BIT_CLEAR_R_ERLYINTADJ_8812F(x) | BIT_R_ERLYINTADJ_8812F(v)) 15318 15319 /* 2 REG_BCNERR_CNT_8812F */ 15320 15321 #define BIT_SHIFT_BCNERR_CNT_OTHERS_8812F 24 15322 #define BIT_MASK_BCNERR_CNT_OTHERS_8812F 0xff 15323 #define BIT_BCNERR_CNT_OTHERS_8812F(x) \ 15324 (((x) & BIT_MASK_BCNERR_CNT_OTHERS_8812F) \ 15325 << BIT_SHIFT_BCNERR_CNT_OTHERS_8812F) 15326 #define BITS_BCNERR_CNT_OTHERS_8812F \ 15327 (BIT_MASK_BCNERR_CNT_OTHERS_8812F << BIT_SHIFT_BCNERR_CNT_OTHERS_8812F) 15328 #define BIT_CLEAR_BCNERR_CNT_OTHERS_8812F(x) \ 15329 ((x) & (~BITS_BCNERR_CNT_OTHERS_8812F)) 15330 #define BIT_GET_BCNERR_CNT_OTHERS_8812F(x) \ 15331 (((x) >> BIT_SHIFT_BCNERR_CNT_OTHERS_8812F) & \ 15332 BIT_MASK_BCNERR_CNT_OTHERS_8812F) 15333 #define BIT_SET_BCNERR_CNT_OTHERS_8812F(x, v) \ 15334 (BIT_CLEAR_BCNERR_CNT_OTHERS_8812F(x) | BIT_BCNERR_CNT_OTHERS_8812F(v)) 15335 15336 #define BIT_SHIFT_BCNERR_CNT_INVALID_8812F 16 15337 #define BIT_MASK_BCNERR_CNT_INVALID_8812F 0xff 15338 #define BIT_BCNERR_CNT_INVALID_8812F(x) \ 15339 (((x) & BIT_MASK_BCNERR_CNT_INVALID_8812F) \ 15340 << BIT_SHIFT_BCNERR_CNT_INVALID_8812F) 15341 #define BITS_BCNERR_CNT_INVALID_8812F \ 15342 (BIT_MASK_BCNERR_CNT_INVALID_8812F \ 15343 << BIT_SHIFT_BCNERR_CNT_INVALID_8812F) 15344 #define BIT_CLEAR_BCNERR_CNT_INVALID_8812F(x) \ 15345 ((x) & (~BITS_BCNERR_CNT_INVALID_8812F)) 15346 #define BIT_GET_BCNERR_CNT_INVALID_8812F(x) \ 15347 (((x) >> BIT_SHIFT_BCNERR_CNT_INVALID_8812F) & \ 15348 BIT_MASK_BCNERR_CNT_INVALID_8812F) 15349 #define BIT_SET_BCNERR_CNT_INVALID_8812F(x, v) \ 15350 (BIT_CLEAR_BCNERR_CNT_INVALID_8812F(x) | \ 15351 BIT_BCNERR_CNT_INVALID_8812F(v)) 15352 15353 #define BIT_SHIFT_BCNERR_CNT_MAC_8812F 8 15354 #define BIT_MASK_BCNERR_CNT_MAC_8812F 0xff 15355 #define BIT_BCNERR_CNT_MAC_8812F(x) \ 15356 (((x) & BIT_MASK_BCNERR_CNT_MAC_8812F) \ 15357 << BIT_SHIFT_BCNERR_CNT_MAC_8812F) 15358 #define BITS_BCNERR_CNT_MAC_8812F \ 15359 (BIT_MASK_BCNERR_CNT_MAC_8812F << BIT_SHIFT_BCNERR_CNT_MAC_8812F) 15360 #define BIT_CLEAR_BCNERR_CNT_MAC_8812F(x) ((x) & (~BITS_BCNERR_CNT_MAC_8812F)) 15361 #define BIT_GET_BCNERR_CNT_MAC_8812F(x) \ 15362 (((x) >> BIT_SHIFT_BCNERR_CNT_MAC_8812F) & \ 15363 BIT_MASK_BCNERR_CNT_MAC_8812F) 15364 #define BIT_SET_BCNERR_CNT_MAC_8812F(x, v) \ 15365 (BIT_CLEAR_BCNERR_CNT_MAC_8812F(x) | BIT_BCNERR_CNT_MAC_8812F(v)) 15366 15367 #define BIT_SHIFT_BCNERR_CNT_CCA_8812F 0 15368 #define BIT_MASK_BCNERR_CNT_CCA_8812F 0xff 15369 #define BIT_BCNERR_CNT_CCA_8812F(x) \ 15370 (((x) & BIT_MASK_BCNERR_CNT_CCA_8812F) \ 15371 << BIT_SHIFT_BCNERR_CNT_CCA_8812F) 15372 #define BITS_BCNERR_CNT_CCA_8812F \ 15373 (BIT_MASK_BCNERR_CNT_CCA_8812F << BIT_SHIFT_BCNERR_CNT_CCA_8812F) 15374 #define BIT_CLEAR_BCNERR_CNT_CCA_8812F(x) ((x) & (~BITS_BCNERR_CNT_CCA_8812F)) 15375 #define BIT_GET_BCNERR_CNT_CCA_8812F(x) \ 15376 (((x) >> BIT_SHIFT_BCNERR_CNT_CCA_8812F) & \ 15377 BIT_MASK_BCNERR_CNT_CCA_8812F) 15378 #define BIT_SET_BCNERR_CNT_CCA_8812F(x, v) \ 15379 (BIT_CLEAR_BCNERR_CNT_CCA_8812F(x) | BIT_BCNERR_CNT_CCA_8812F(v)) 15380 15381 /* 2 REG_BCNERR_CNT_2_8812F */ 15382 15383 #define BIT_SHIFT_BCNERR_CNT_EDCCA_8812F 0 15384 #define BIT_MASK_BCNERR_CNT_EDCCA_8812F 0xff 15385 #define BIT_BCNERR_CNT_EDCCA_8812F(x) \ 15386 (((x) & BIT_MASK_BCNERR_CNT_EDCCA_8812F) \ 15387 << BIT_SHIFT_BCNERR_CNT_EDCCA_8812F) 15388 #define BITS_BCNERR_CNT_EDCCA_8812F \ 15389 (BIT_MASK_BCNERR_CNT_EDCCA_8812F << BIT_SHIFT_BCNERR_CNT_EDCCA_8812F) 15390 #define BIT_CLEAR_BCNERR_CNT_EDCCA_8812F(x) \ 15391 ((x) & (~BITS_BCNERR_CNT_EDCCA_8812F)) 15392 #define BIT_GET_BCNERR_CNT_EDCCA_8812F(x) \ 15393 (((x) >> BIT_SHIFT_BCNERR_CNT_EDCCA_8812F) & \ 15394 BIT_MASK_BCNERR_CNT_EDCCA_8812F) 15395 #define BIT_SET_BCNERR_CNT_EDCCA_8812F(x, v) \ 15396 (BIT_CLEAR_BCNERR_CNT_EDCCA_8812F(x) | BIT_BCNERR_CNT_EDCCA_8812F(v)) 15397 15398 /* 2 REG_NOA_PARAM_8812F */ 15399 15400 #define BIT_SHIFT_NOA_DURATION_V1_8812F 0 15401 #define BIT_MASK_NOA_DURATION_V1_8812F 0xffffffffL 15402 #define BIT_NOA_DURATION_V1_8812F(x) \ 15403 (((x) & BIT_MASK_NOA_DURATION_V1_8812F) \ 15404 << BIT_SHIFT_NOA_DURATION_V1_8812F) 15405 #define BITS_NOA_DURATION_V1_8812F \ 15406 (BIT_MASK_NOA_DURATION_V1_8812F << BIT_SHIFT_NOA_DURATION_V1_8812F) 15407 #define BIT_CLEAR_NOA_DURATION_V1_8812F(x) ((x) & (~BITS_NOA_DURATION_V1_8812F)) 15408 #define BIT_GET_NOA_DURATION_V1_8812F(x) \ 15409 (((x) >> BIT_SHIFT_NOA_DURATION_V1_8812F) & \ 15410 BIT_MASK_NOA_DURATION_V1_8812F) 15411 #define BIT_SET_NOA_DURATION_V1_8812F(x, v) \ 15412 (BIT_CLEAR_NOA_DURATION_V1_8812F(x) | BIT_NOA_DURATION_V1_8812F(v)) 15413 15414 /* 2 REG_NOA_PARAM_1_8812F */ 15415 15416 #define BIT_SHIFT_NOA_INTERVAL_V1_8812F 0 15417 #define BIT_MASK_NOA_INTERVAL_V1_8812F 0xffffffffL 15418 #define BIT_NOA_INTERVAL_V1_8812F(x) \ 15419 (((x) & BIT_MASK_NOA_INTERVAL_V1_8812F) \ 15420 << BIT_SHIFT_NOA_INTERVAL_V1_8812F) 15421 #define BITS_NOA_INTERVAL_V1_8812F \ 15422 (BIT_MASK_NOA_INTERVAL_V1_8812F << BIT_SHIFT_NOA_INTERVAL_V1_8812F) 15423 #define BIT_CLEAR_NOA_INTERVAL_V1_8812F(x) ((x) & (~BITS_NOA_INTERVAL_V1_8812F)) 15424 #define BIT_GET_NOA_INTERVAL_V1_8812F(x) \ 15425 (((x) >> BIT_SHIFT_NOA_INTERVAL_V1_8812F) & \ 15426 BIT_MASK_NOA_INTERVAL_V1_8812F) 15427 #define BIT_SET_NOA_INTERVAL_V1_8812F(x, v) \ 15428 (BIT_CLEAR_NOA_INTERVAL_V1_8812F(x) | BIT_NOA_INTERVAL_V1_8812F(v)) 15429 15430 /* 2 REG_NOA_PARAM_2_8812F */ 15431 15432 #define BIT_SHIFT_NOA_START_TIME_V1_8812F 0 15433 #define BIT_MASK_NOA_START_TIME_V1_8812F 0xffffffffL 15434 #define BIT_NOA_START_TIME_V1_8812F(x) \ 15435 (((x) & BIT_MASK_NOA_START_TIME_V1_8812F) \ 15436 << BIT_SHIFT_NOA_START_TIME_V1_8812F) 15437 #define BITS_NOA_START_TIME_V1_8812F \ 15438 (BIT_MASK_NOA_START_TIME_V1_8812F << BIT_SHIFT_NOA_START_TIME_V1_8812F) 15439 #define BIT_CLEAR_NOA_START_TIME_V1_8812F(x) \ 15440 ((x) & (~BITS_NOA_START_TIME_V1_8812F)) 15441 #define BIT_GET_NOA_START_TIME_V1_8812F(x) \ 15442 (((x) >> BIT_SHIFT_NOA_START_TIME_V1_8812F) & \ 15443 BIT_MASK_NOA_START_TIME_V1_8812F) 15444 #define BIT_SET_NOA_START_TIME_V1_8812F(x, v) \ 15445 (BIT_CLEAR_NOA_START_TIME_V1_8812F(x) | BIT_NOA_START_TIME_V1_8812F(v)) 15446 15447 /* 2 REG_NOA_PARAM_3_8812F */ 15448 15449 #define BIT_SHIFT_NOA_COUNT_V1_8812F 0 15450 #define BIT_MASK_NOA_COUNT_V1_8812F 0xffffffffL 15451 #define BIT_NOA_COUNT_V1_8812F(x) \ 15452 (((x) & BIT_MASK_NOA_COUNT_V1_8812F) << BIT_SHIFT_NOA_COUNT_V1_8812F) 15453 #define BITS_NOA_COUNT_V1_8812F \ 15454 (BIT_MASK_NOA_COUNT_V1_8812F << BIT_SHIFT_NOA_COUNT_V1_8812F) 15455 #define BIT_CLEAR_NOA_COUNT_V1_8812F(x) ((x) & (~BITS_NOA_COUNT_V1_8812F)) 15456 #define BIT_GET_NOA_COUNT_V1_8812F(x) \ 15457 (((x) >> BIT_SHIFT_NOA_COUNT_V1_8812F) & BIT_MASK_NOA_COUNT_V1_8812F) 15458 #define BIT_SET_NOA_COUNT_V1_8812F(x, v) \ 15459 (BIT_CLEAR_NOA_COUNT_V1_8812F(x) | BIT_NOA_COUNT_V1_8812F(v)) 15460 15461 /* 2 REG_P2P_RST_8812F */ 15462 #define BIT_P2P2_PWR_RST1_8812F BIT(5) 15463 #define BIT_P2P2_PWR_RST0_8812F BIT(4) 15464 #define BIT_P2P1_PWR_RST1_8812F BIT(3) 15465 #define BIT_P2P1_PWR_RST0_8812F BIT(2) 15466 #define BIT_P2P_PWR_RST1_V1_8812F BIT(1) 15467 #define BIT_P2P_PWR_RST0_V1_8812F BIT(0) 15468 15469 /* 2 REG_SCHEDULER_RST_8812F */ 15470 #define BIT_SYNC_CLI_ONCE_RIGHT_NOW_8812F BIT(2) 15471 #define BIT_SYNC_CLI_ONCE_BY_TBTT_8812F BIT(1) 15472 #define BIT_SCHEDULER_RST_V1_8812F BIT(0) 15473 15474 /* 2 REG_NOT_VALID_8812F */ 15475 15476 /* 2 REG_NOT_VALID_8812F */ 15477 15478 /* 2 REG_SCH_DBG_VALUE_8812F */ 15479 15480 #define BIT_SHIFT_SCH_DBG_VALUE_8812F 0 15481 #define BIT_MASK_SCH_DBG_VALUE_8812F 0xffffffffL 15482 #define BIT_SCH_DBG_VALUE_8812F(x) \ 15483 (((x) & BIT_MASK_SCH_DBG_VALUE_8812F) << BIT_SHIFT_SCH_DBG_VALUE_8812F) 15484 #define BITS_SCH_DBG_VALUE_8812F \ 15485 (BIT_MASK_SCH_DBG_VALUE_8812F << BIT_SHIFT_SCH_DBG_VALUE_8812F) 15486 #define BIT_CLEAR_SCH_DBG_VALUE_8812F(x) ((x) & (~BITS_SCH_DBG_VALUE_8812F)) 15487 #define BIT_GET_SCH_DBG_VALUE_8812F(x) \ 15488 (((x) >> BIT_SHIFT_SCH_DBG_VALUE_8812F) & BIT_MASK_SCH_DBG_VALUE_8812F) 15489 #define BIT_SET_SCH_DBG_VALUE_8812F(x, v) \ 15490 (BIT_CLEAR_SCH_DBG_VALUE_8812F(x) | BIT_SCH_DBG_VALUE_8812F(v)) 15491 15492 /* 2 REG_SCH_TXCMD_8812F */ 15493 15494 #define BIT_SHIFT_SCH_TXCMD_8812F 0 15495 #define BIT_MASK_SCH_TXCMD_8812F 0xffffffffL 15496 #define BIT_SCH_TXCMD_8812F(x) \ 15497 (((x) & BIT_MASK_SCH_TXCMD_8812F) << BIT_SHIFT_SCH_TXCMD_8812F) 15498 #define BITS_SCH_TXCMD_8812F \ 15499 (BIT_MASK_SCH_TXCMD_8812F << BIT_SHIFT_SCH_TXCMD_8812F) 15500 #define BIT_CLEAR_SCH_TXCMD_8812F(x) ((x) & (~BITS_SCH_TXCMD_8812F)) 15501 #define BIT_GET_SCH_TXCMD_8812F(x) \ 15502 (((x) >> BIT_SHIFT_SCH_TXCMD_8812F) & BIT_MASK_SCH_TXCMD_8812F) 15503 #define BIT_SET_SCH_TXCMD_8812F(x, v) \ 15504 (BIT_CLEAR_SCH_TXCMD_8812F(x) | BIT_SCH_TXCMD_8812F(v)) 15505 15506 /* 2 REG_PAGE5_DUMMY_8812F */ 15507 15508 /* 2 REG_CPUMGQ_TX_TIMER_8812F */ 15509 15510 #define BIT_SHIFT_CPUMGQ_TX_TIMER_V1_8812F 0 15511 #define BIT_MASK_CPUMGQ_TX_TIMER_V1_8812F 0xffffffffL 15512 #define BIT_CPUMGQ_TX_TIMER_V1_8812F(x) \ 15513 (((x) & BIT_MASK_CPUMGQ_TX_TIMER_V1_8812F) \ 15514 << BIT_SHIFT_CPUMGQ_TX_TIMER_V1_8812F) 15515 #define BITS_CPUMGQ_TX_TIMER_V1_8812F \ 15516 (BIT_MASK_CPUMGQ_TX_TIMER_V1_8812F \ 15517 << BIT_SHIFT_CPUMGQ_TX_TIMER_V1_8812F) 15518 #define BIT_CLEAR_CPUMGQ_TX_TIMER_V1_8812F(x) \ 15519 ((x) & (~BITS_CPUMGQ_TX_TIMER_V1_8812F)) 15520 #define BIT_GET_CPUMGQ_TX_TIMER_V1_8812F(x) \ 15521 (((x) >> BIT_SHIFT_CPUMGQ_TX_TIMER_V1_8812F) & \ 15522 BIT_MASK_CPUMGQ_TX_TIMER_V1_8812F) 15523 #define BIT_SET_CPUMGQ_TX_TIMER_V1_8812F(x, v) \ 15524 (BIT_CLEAR_CPUMGQ_TX_TIMER_V1_8812F(x) | \ 15525 BIT_CPUMGQ_TX_TIMER_V1_8812F(v)) 15526 15527 /* 2 REG_PS_TIMER_A_8812F */ 15528 15529 #define BIT_SHIFT_PS_TIMER_A_V1_8812F 0 15530 #define BIT_MASK_PS_TIMER_A_V1_8812F 0xffffffffL 15531 #define BIT_PS_TIMER_A_V1_8812F(x) \ 15532 (((x) & BIT_MASK_PS_TIMER_A_V1_8812F) << BIT_SHIFT_PS_TIMER_A_V1_8812F) 15533 #define BITS_PS_TIMER_A_V1_8812F \ 15534 (BIT_MASK_PS_TIMER_A_V1_8812F << BIT_SHIFT_PS_TIMER_A_V1_8812F) 15535 #define BIT_CLEAR_PS_TIMER_A_V1_8812F(x) ((x) & (~BITS_PS_TIMER_A_V1_8812F)) 15536 #define BIT_GET_PS_TIMER_A_V1_8812F(x) \ 15537 (((x) >> BIT_SHIFT_PS_TIMER_A_V1_8812F) & BIT_MASK_PS_TIMER_A_V1_8812F) 15538 #define BIT_SET_PS_TIMER_A_V1_8812F(x, v) \ 15539 (BIT_CLEAR_PS_TIMER_A_V1_8812F(x) | BIT_PS_TIMER_A_V1_8812F(v)) 15540 15541 /* 2 REG_PS_TIMER_B_8812F */ 15542 15543 #define BIT_SHIFT_PS_TIMER_B_V1_8812F 0 15544 #define BIT_MASK_PS_TIMER_B_V1_8812F 0xffffffffL 15545 #define BIT_PS_TIMER_B_V1_8812F(x) \ 15546 (((x) & BIT_MASK_PS_TIMER_B_V1_8812F) << BIT_SHIFT_PS_TIMER_B_V1_8812F) 15547 #define BITS_PS_TIMER_B_V1_8812F \ 15548 (BIT_MASK_PS_TIMER_B_V1_8812F << BIT_SHIFT_PS_TIMER_B_V1_8812F) 15549 #define BIT_CLEAR_PS_TIMER_B_V1_8812F(x) ((x) & (~BITS_PS_TIMER_B_V1_8812F)) 15550 #define BIT_GET_PS_TIMER_B_V1_8812F(x) \ 15551 (((x) >> BIT_SHIFT_PS_TIMER_B_V1_8812F) & BIT_MASK_PS_TIMER_B_V1_8812F) 15552 #define BIT_SET_PS_TIMER_B_V1_8812F(x, v) \ 15553 (BIT_CLEAR_PS_TIMER_B_V1_8812F(x) | BIT_PS_TIMER_B_V1_8812F(v)) 15554 15555 /* 2 REG_PS_TIMER_C_8812F */ 15556 15557 #define BIT_SHIFT_PS_TIMER_C_V1_8812F 0 15558 #define BIT_MASK_PS_TIMER_C_V1_8812F 0xffffffffL 15559 #define BIT_PS_TIMER_C_V1_8812F(x) \ 15560 (((x) & BIT_MASK_PS_TIMER_C_V1_8812F) << BIT_SHIFT_PS_TIMER_C_V1_8812F) 15561 #define BITS_PS_TIMER_C_V1_8812F \ 15562 (BIT_MASK_PS_TIMER_C_V1_8812F << BIT_SHIFT_PS_TIMER_C_V1_8812F) 15563 #define BIT_CLEAR_PS_TIMER_C_V1_8812F(x) ((x) & (~BITS_PS_TIMER_C_V1_8812F)) 15564 #define BIT_GET_PS_TIMER_C_V1_8812F(x) \ 15565 (((x) >> BIT_SHIFT_PS_TIMER_C_V1_8812F) & BIT_MASK_PS_TIMER_C_V1_8812F) 15566 #define BIT_SET_PS_TIMER_C_V1_8812F(x, v) \ 15567 (BIT_CLEAR_PS_TIMER_C_V1_8812F(x) | BIT_PS_TIMER_C_V1_8812F(v)) 15568 15569 /* 2 REG_PS_TIMER_ABC_CPUMGQ_TIMER_CRTL_8812F */ 15570 #define BIT_CPUMGQ_TIMER_EN_8812F BIT(31) 15571 #define BIT_CPUMGQ_TX_EN_8812F BIT(28) 15572 15573 #define BIT_SHIFT_CPUMGQ_TIMER_TSF_SEL_8812F 24 15574 #define BIT_MASK_CPUMGQ_TIMER_TSF_SEL_8812F 0x7 15575 #define BIT_CPUMGQ_TIMER_TSF_SEL_8812F(x) \ 15576 (((x) & BIT_MASK_CPUMGQ_TIMER_TSF_SEL_8812F) \ 15577 << BIT_SHIFT_CPUMGQ_TIMER_TSF_SEL_8812F) 15578 #define BITS_CPUMGQ_TIMER_TSF_SEL_8812F \ 15579 (BIT_MASK_CPUMGQ_TIMER_TSF_SEL_8812F \ 15580 << BIT_SHIFT_CPUMGQ_TIMER_TSF_SEL_8812F) 15581 #define BIT_CLEAR_CPUMGQ_TIMER_TSF_SEL_8812F(x) \ 15582 ((x) & (~BITS_CPUMGQ_TIMER_TSF_SEL_8812F)) 15583 #define BIT_GET_CPUMGQ_TIMER_TSF_SEL_8812F(x) \ 15584 (((x) >> BIT_SHIFT_CPUMGQ_TIMER_TSF_SEL_8812F) & \ 15585 BIT_MASK_CPUMGQ_TIMER_TSF_SEL_8812F) 15586 #define BIT_SET_CPUMGQ_TIMER_TSF_SEL_8812F(x, v) \ 15587 (BIT_CLEAR_CPUMGQ_TIMER_TSF_SEL_8812F(x) | \ 15588 BIT_CPUMGQ_TIMER_TSF_SEL_8812F(v)) 15589 15590 #define BIT_PS_TIMER_C_EN_8812F BIT(23) 15591 15592 #define BIT_SHIFT_PS_TIMER_C_TSF_SEL_8812F 16 15593 #define BIT_MASK_PS_TIMER_C_TSF_SEL_8812F 0x7 15594 #define BIT_PS_TIMER_C_TSF_SEL_8812F(x) \ 15595 (((x) & BIT_MASK_PS_TIMER_C_TSF_SEL_8812F) \ 15596 << BIT_SHIFT_PS_TIMER_C_TSF_SEL_8812F) 15597 #define BITS_PS_TIMER_C_TSF_SEL_8812F \ 15598 (BIT_MASK_PS_TIMER_C_TSF_SEL_8812F \ 15599 << BIT_SHIFT_PS_TIMER_C_TSF_SEL_8812F) 15600 #define BIT_CLEAR_PS_TIMER_C_TSF_SEL_8812F(x) \ 15601 ((x) & (~BITS_PS_TIMER_C_TSF_SEL_8812F)) 15602 #define BIT_GET_PS_TIMER_C_TSF_SEL_8812F(x) \ 15603 (((x) >> BIT_SHIFT_PS_TIMER_C_TSF_SEL_8812F) & \ 15604 BIT_MASK_PS_TIMER_C_TSF_SEL_8812F) 15605 #define BIT_SET_PS_TIMER_C_TSF_SEL_8812F(x, v) \ 15606 (BIT_CLEAR_PS_TIMER_C_TSF_SEL_8812F(x) | \ 15607 BIT_PS_TIMER_C_TSF_SEL_8812F(v)) 15608 15609 #define BIT_PS_TIMER_B_EN_8812F BIT(15) 15610 15611 #define BIT_SHIFT_PS_TIMER_B_TSF_SEL_8812F 8 15612 #define BIT_MASK_PS_TIMER_B_TSF_SEL_8812F 0x7 15613 #define BIT_PS_TIMER_B_TSF_SEL_8812F(x) \ 15614 (((x) & BIT_MASK_PS_TIMER_B_TSF_SEL_8812F) \ 15615 << BIT_SHIFT_PS_TIMER_B_TSF_SEL_8812F) 15616 #define BITS_PS_TIMER_B_TSF_SEL_8812F \ 15617 (BIT_MASK_PS_TIMER_B_TSF_SEL_8812F \ 15618 << BIT_SHIFT_PS_TIMER_B_TSF_SEL_8812F) 15619 #define BIT_CLEAR_PS_TIMER_B_TSF_SEL_8812F(x) \ 15620 ((x) & (~BITS_PS_TIMER_B_TSF_SEL_8812F)) 15621 #define BIT_GET_PS_TIMER_B_TSF_SEL_8812F(x) \ 15622 (((x) >> BIT_SHIFT_PS_TIMER_B_TSF_SEL_8812F) & \ 15623 BIT_MASK_PS_TIMER_B_TSF_SEL_8812F) 15624 #define BIT_SET_PS_TIMER_B_TSF_SEL_8812F(x, v) \ 15625 (BIT_CLEAR_PS_TIMER_B_TSF_SEL_8812F(x) | \ 15626 BIT_PS_TIMER_B_TSF_SEL_8812F(v)) 15627 15628 #define BIT_PS_TIMER_A_EN_8812F BIT(7) 15629 15630 #define BIT_SHIFT_PS_TIMER_A_TSF_SEL_8812F 0 15631 #define BIT_MASK_PS_TIMER_A_TSF_SEL_8812F 0x7 15632 #define BIT_PS_TIMER_A_TSF_SEL_8812F(x) \ 15633 (((x) & BIT_MASK_PS_TIMER_A_TSF_SEL_8812F) \ 15634 << BIT_SHIFT_PS_TIMER_A_TSF_SEL_8812F) 15635 #define BITS_PS_TIMER_A_TSF_SEL_8812F \ 15636 (BIT_MASK_PS_TIMER_A_TSF_SEL_8812F \ 15637 << BIT_SHIFT_PS_TIMER_A_TSF_SEL_8812F) 15638 #define BIT_CLEAR_PS_TIMER_A_TSF_SEL_8812F(x) \ 15639 ((x) & (~BITS_PS_TIMER_A_TSF_SEL_8812F)) 15640 #define BIT_GET_PS_TIMER_A_TSF_SEL_8812F(x) \ 15641 (((x) >> BIT_SHIFT_PS_TIMER_A_TSF_SEL_8812F) & \ 15642 BIT_MASK_PS_TIMER_A_TSF_SEL_8812F) 15643 #define BIT_SET_PS_TIMER_A_TSF_SEL_8812F(x, v) \ 15644 (BIT_CLEAR_PS_TIMER_A_TSF_SEL_8812F(x) | \ 15645 BIT_PS_TIMER_A_TSF_SEL_8812F(v)) 15646 15647 /* 2 REG_CPUMGQ_TX_TIMER_EARLY_8812F */ 15648 15649 #define BIT_SHIFT_CPUMGQ_TX_TIMER_EARLY_8812F 0 15650 #define BIT_MASK_CPUMGQ_TX_TIMER_EARLY_8812F 0xff 15651 #define BIT_CPUMGQ_TX_TIMER_EARLY_8812F(x) \ 15652 (((x) & BIT_MASK_CPUMGQ_TX_TIMER_EARLY_8812F) \ 15653 << BIT_SHIFT_CPUMGQ_TX_TIMER_EARLY_8812F) 15654 #define BITS_CPUMGQ_TX_TIMER_EARLY_8812F \ 15655 (BIT_MASK_CPUMGQ_TX_TIMER_EARLY_8812F \ 15656 << BIT_SHIFT_CPUMGQ_TX_TIMER_EARLY_8812F) 15657 #define BIT_CLEAR_CPUMGQ_TX_TIMER_EARLY_8812F(x) \ 15658 ((x) & (~BITS_CPUMGQ_TX_TIMER_EARLY_8812F)) 15659 #define BIT_GET_CPUMGQ_TX_TIMER_EARLY_8812F(x) \ 15660 (((x) >> BIT_SHIFT_CPUMGQ_TX_TIMER_EARLY_8812F) & \ 15661 BIT_MASK_CPUMGQ_TX_TIMER_EARLY_8812F) 15662 #define BIT_SET_CPUMGQ_TX_TIMER_EARLY_8812F(x, v) \ 15663 (BIT_CLEAR_CPUMGQ_TX_TIMER_EARLY_8812F(x) | \ 15664 BIT_CPUMGQ_TX_TIMER_EARLY_8812F(v)) 15665 15666 /* 2 REG_PS_TIMER_A_EARLY_8812F */ 15667 15668 #define BIT_SHIFT_PS_TIMER_A_EARLY_8812F 0 15669 #define BIT_MASK_PS_TIMER_A_EARLY_8812F 0xff 15670 #define BIT_PS_TIMER_A_EARLY_8812F(x) \ 15671 (((x) & BIT_MASK_PS_TIMER_A_EARLY_8812F) \ 15672 << BIT_SHIFT_PS_TIMER_A_EARLY_8812F) 15673 #define BITS_PS_TIMER_A_EARLY_8812F \ 15674 (BIT_MASK_PS_TIMER_A_EARLY_8812F << BIT_SHIFT_PS_TIMER_A_EARLY_8812F) 15675 #define BIT_CLEAR_PS_TIMER_A_EARLY_8812F(x) \ 15676 ((x) & (~BITS_PS_TIMER_A_EARLY_8812F)) 15677 #define BIT_GET_PS_TIMER_A_EARLY_8812F(x) \ 15678 (((x) >> BIT_SHIFT_PS_TIMER_A_EARLY_8812F) & \ 15679 BIT_MASK_PS_TIMER_A_EARLY_8812F) 15680 #define BIT_SET_PS_TIMER_A_EARLY_8812F(x, v) \ 15681 (BIT_CLEAR_PS_TIMER_A_EARLY_8812F(x) | BIT_PS_TIMER_A_EARLY_8812F(v)) 15682 15683 /* 2 REG_PS_TIMER_B_EARLY_8812F */ 15684 15685 #define BIT_SHIFT_PS_TIMER_B_EARLY_8812F 0 15686 #define BIT_MASK_PS_TIMER_B_EARLY_8812F 0xff 15687 #define BIT_PS_TIMER_B_EARLY_8812F(x) \ 15688 (((x) & BIT_MASK_PS_TIMER_B_EARLY_8812F) \ 15689 << BIT_SHIFT_PS_TIMER_B_EARLY_8812F) 15690 #define BITS_PS_TIMER_B_EARLY_8812F \ 15691 (BIT_MASK_PS_TIMER_B_EARLY_8812F << BIT_SHIFT_PS_TIMER_B_EARLY_8812F) 15692 #define BIT_CLEAR_PS_TIMER_B_EARLY_8812F(x) \ 15693 ((x) & (~BITS_PS_TIMER_B_EARLY_8812F)) 15694 #define BIT_GET_PS_TIMER_B_EARLY_8812F(x) \ 15695 (((x) >> BIT_SHIFT_PS_TIMER_B_EARLY_8812F) & \ 15696 BIT_MASK_PS_TIMER_B_EARLY_8812F) 15697 #define BIT_SET_PS_TIMER_B_EARLY_8812F(x, v) \ 15698 (BIT_CLEAR_PS_TIMER_B_EARLY_8812F(x) | BIT_PS_TIMER_B_EARLY_8812F(v)) 15699 15700 /* 2 REG_PS_TIMER_C_EARLY_8812F */ 15701 15702 #define BIT_SHIFT_PS_TIMER_C_EARLY_8812F 0 15703 #define BIT_MASK_PS_TIMER_C_EARLY_8812F 0xff 15704 #define BIT_PS_TIMER_C_EARLY_8812F(x) \ 15705 (((x) & BIT_MASK_PS_TIMER_C_EARLY_8812F) \ 15706 << BIT_SHIFT_PS_TIMER_C_EARLY_8812F) 15707 #define BITS_PS_TIMER_C_EARLY_8812F \ 15708 (BIT_MASK_PS_TIMER_C_EARLY_8812F << BIT_SHIFT_PS_TIMER_C_EARLY_8812F) 15709 #define BIT_CLEAR_PS_TIMER_C_EARLY_8812F(x) \ 15710 ((x) & (~BITS_PS_TIMER_C_EARLY_8812F)) 15711 #define BIT_GET_PS_TIMER_C_EARLY_8812F(x) \ 15712 (((x) >> BIT_SHIFT_PS_TIMER_C_EARLY_8812F) & \ 15713 BIT_MASK_PS_TIMER_C_EARLY_8812F) 15714 #define BIT_SET_PS_TIMER_C_EARLY_8812F(x, v) \ 15715 (BIT_CLEAR_PS_TIMER_C_EARLY_8812F(x) | BIT_PS_TIMER_C_EARLY_8812F(v)) 15716 15717 /* 2 REG_CPUMGQ_PARAMETER_8812F */ 15718 15719 /* 2 REG_NOT_VALID_8812F */ 15720 #define BIT_MAC_STOP_CPUMGQ_8812F BIT(16) 15721 15722 #define BIT_SHIFT_CW_8812F 8 15723 #define BIT_MASK_CW_8812F 0xff 15724 #define BIT_CW_8812F(x) (((x) & BIT_MASK_CW_8812F) << BIT_SHIFT_CW_8812F) 15725 #define BITS_CW_8812F (BIT_MASK_CW_8812F << BIT_SHIFT_CW_8812F) 15726 #define BIT_CLEAR_CW_8812F(x) ((x) & (~BITS_CW_8812F)) 15727 #define BIT_GET_CW_8812F(x) (((x) >> BIT_SHIFT_CW_8812F) & BIT_MASK_CW_8812F) 15728 #define BIT_SET_CW_8812F(x, v) (BIT_CLEAR_CW_8812F(x) | BIT_CW_8812F(v)) 15729 15730 #define BIT_SHIFT_AIFS_8812F 0 15731 #define BIT_MASK_AIFS_8812F 0xff 15732 #define BIT_AIFS_8812F(x) (((x) & BIT_MASK_AIFS_8812F) << BIT_SHIFT_AIFS_8812F) 15733 #define BITS_AIFS_8812F (BIT_MASK_AIFS_8812F << BIT_SHIFT_AIFS_8812F) 15734 #define BIT_CLEAR_AIFS_8812F(x) ((x) & (~BITS_AIFS_8812F)) 15735 #define BIT_GET_AIFS_8812F(x) \ 15736 (((x) >> BIT_SHIFT_AIFS_8812F) & BIT_MASK_AIFS_8812F) 15737 #define BIT_SET_AIFS_8812F(x, v) (BIT_CLEAR_AIFS_8812F(x) | BIT_AIFS_8812F(v)) 15738 15739 /* 2 REG_NOT_VALID_8812F */ 15740 15741 /* 2 REG_TSF_SYNC_ADJ_8812F */ 15742 15743 #define BIT_SHIFT_R_P0_TSFT_ADJ_VAL_8812F 16 15744 #define BIT_MASK_R_P0_TSFT_ADJ_VAL_8812F 0xffff 15745 #define BIT_R_P0_TSFT_ADJ_VAL_8812F(x) \ 15746 (((x) & BIT_MASK_R_P0_TSFT_ADJ_VAL_8812F) \ 15747 << BIT_SHIFT_R_P0_TSFT_ADJ_VAL_8812F) 15748 #define BITS_R_P0_TSFT_ADJ_VAL_8812F \ 15749 (BIT_MASK_R_P0_TSFT_ADJ_VAL_8812F << BIT_SHIFT_R_P0_TSFT_ADJ_VAL_8812F) 15750 #define BIT_CLEAR_R_P0_TSFT_ADJ_VAL_8812F(x) \ 15751 ((x) & (~BITS_R_P0_TSFT_ADJ_VAL_8812F)) 15752 #define BIT_GET_R_P0_TSFT_ADJ_VAL_8812F(x) \ 15753 (((x) >> BIT_SHIFT_R_P0_TSFT_ADJ_VAL_8812F) & \ 15754 BIT_MASK_R_P0_TSFT_ADJ_VAL_8812F) 15755 #define BIT_SET_R_P0_TSFT_ADJ_VAL_8812F(x, v) \ 15756 (BIT_CLEAR_R_P0_TSFT_ADJ_VAL_8812F(x) | BIT_R_P0_TSFT_ADJ_VAL_8812F(v)) 15757 15758 #define BIT_R_X_COMP_Y_OVER_8812F BIT(8) 15759 15760 #define BIT_SHIFT_R_X_SYNC_SEL_8812F 3 15761 #define BIT_MASK_R_X_SYNC_SEL_8812F 0x7 15762 #define BIT_R_X_SYNC_SEL_8812F(x) \ 15763 (((x) & BIT_MASK_R_X_SYNC_SEL_8812F) << BIT_SHIFT_R_X_SYNC_SEL_8812F) 15764 #define BITS_R_X_SYNC_SEL_8812F \ 15765 (BIT_MASK_R_X_SYNC_SEL_8812F << BIT_SHIFT_R_X_SYNC_SEL_8812F) 15766 #define BIT_CLEAR_R_X_SYNC_SEL_8812F(x) ((x) & (~BITS_R_X_SYNC_SEL_8812F)) 15767 #define BIT_GET_R_X_SYNC_SEL_8812F(x) \ 15768 (((x) >> BIT_SHIFT_R_X_SYNC_SEL_8812F) & BIT_MASK_R_X_SYNC_SEL_8812F) 15769 #define BIT_SET_R_X_SYNC_SEL_8812F(x, v) \ 15770 (BIT_CLEAR_R_X_SYNC_SEL_8812F(x) | BIT_R_X_SYNC_SEL_8812F(v)) 15771 15772 #define BIT_SHIFT_R_SYNC_Y_SEL_8812F 0 15773 #define BIT_MASK_R_SYNC_Y_SEL_8812F 0x7 15774 #define BIT_R_SYNC_Y_SEL_8812F(x) \ 15775 (((x) & BIT_MASK_R_SYNC_Y_SEL_8812F) << BIT_SHIFT_R_SYNC_Y_SEL_8812F) 15776 #define BITS_R_SYNC_Y_SEL_8812F \ 15777 (BIT_MASK_R_SYNC_Y_SEL_8812F << BIT_SHIFT_R_SYNC_Y_SEL_8812F) 15778 #define BIT_CLEAR_R_SYNC_Y_SEL_8812F(x) ((x) & (~BITS_R_SYNC_Y_SEL_8812F)) 15779 #define BIT_GET_R_SYNC_Y_SEL_8812F(x) \ 15780 (((x) >> BIT_SHIFT_R_SYNC_Y_SEL_8812F) & BIT_MASK_R_SYNC_Y_SEL_8812F) 15781 #define BIT_SET_R_SYNC_Y_SEL_8812F(x, v) \ 15782 (BIT_CLEAR_R_SYNC_Y_SEL_8812F(x) | BIT_R_SYNC_Y_SEL_8812F(v)) 15783 15784 /* 2 REG_TSF_ADJ_VLAUE_8812F */ 15785 15786 #define BIT_SHIFT_R_CLI1_TSFT_ADJ_VAL_8812F 16 15787 #define BIT_MASK_R_CLI1_TSFT_ADJ_VAL_8812F 0xffff 15788 #define BIT_R_CLI1_TSFT_ADJ_VAL_8812F(x) \ 15789 (((x) & BIT_MASK_R_CLI1_TSFT_ADJ_VAL_8812F) \ 15790 << BIT_SHIFT_R_CLI1_TSFT_ADJ_VAL_8812F) 15791 #define BITS_R_CLI1_TSFT_ADJ_VAL_8812F \ 15792 (BIT_MASK_R_CLI1_TSFT_ADJ_VAL_8812F \ 15793 << BIT_SHIFT_R_CLI1_TSFT_ADJ_VAL_8812F) 15794 #define BIT_CLEAR_R_CLI1_TSFT_ADJ_VAL_8812F(x) \ 15795 ((x) & (~BITS_R_CLI1_TSFT_ADJ_VAL_8812F)) 15796 #define BIT_GET_R_CLI1_TSFT_ADJ_VAL_8812F(x) \ 15797 (((x) >> BIT_SHIFT_R_CLI1_TSFT_ADJ_VAL_8812F) & \ 15798 BIT_MASK_R_CLI1_TSFT_ADJ_VAL_8812F) 15799 #define BIT_SET_R_CLI1_TSFT_ADJ_VAL_8812F(x, v) \ 15800 (BIT_CLEAR_R_CLI1_TSFT_ADJ_VAL_8812F(x) | \ 15801 BIT_R_CLI1_TSFT_ADJ_VAL_8812F(v)) 15802 15803 #define BIT_SHIFT_R_CLI0_TSFT_ADJ_VAL_8812F 0 15804 #define BIT_MASK_R_CLI0_TSFT_ADJ_VAL_8812F 0xffff 15805 #define BIT_R_CLI0_TSFT_ADJ_VAL_8812F(x) \ 15806 (((x) & BIT_MASK_R_CLI0_TSFT_ADJ_VAL_8812F) \ 15807 << BIT_SHIFT_R_CLI0_TSFT_ADJ_VAL_8812F) 15808 #define BITS_R_CLI0_TSFT_ADJ_VAL_8812F \ 15809 (BIT_MASK_R_CLI0_TSFT_ADJ_VAL_8812F \ 15810 << BIT_SHIFT_R_CLI0_TSFT_ADJ_VAL_8812F) 15811 #define BIT_CLEAR_R_CLI0_TSFT_ADJ_VAL_8812F(x) \ 15812 ((x) & (~BITS_R_CLI0_TSFT_ADJ_VAL_8812F)) 15813 #define BIT_GET_R_CLI0_TSFT_ADJ_VAL_8812F(x) \ 15814 (((x) >> BIT_SHIFT_R_CLI0_TSFT_ADJ_VAL_8812F) & \ 15815 BIT_MASK_R_CLI0_TSFT_ADJ_VAL_8812F) 15816 #define BIT_SET_R_CLI0_TSFT_ADJ_VAL_8812F(x, v) \ 15817 (BIT_CLEAR_R_CLI0_TSFT_ADJ_VAL_8812F(x) | \ 15818 BIT_R_CLI0_TSFT_ADJ_VAL_8812F(v)) 15819 15820 /* 2 REG_TSF_ADJ_VLAUE_2_8812F */ 15821 15822 #define BIT_SHIFT_R_CLI3_TSFT_ADJ_VAL_8812F 16 15823 #define BIT_MASK_R_CLI3_TSFT_ADJ_VAL_8812F 0xffff 15824 #define BIT_R_CLI3_TSFT_ADJ_VAL_8812F(x) \ 15825 (((x) & BIT_MASK_R_CLI3_TSFT_ADJ_VAL_8812F) \ 15826 << BIT_SHIFT_R_CLI3_TSFT_ADJ_VAL_8812F) 15827 #define BITS_R_CLI3_TSFT_ADJ_VAL_8812F \ 15828 (BIT_MASK_R_CLI3_TSFT_ADJ_VAL_8812F \ 15829 << BIT_SHIFT_R_CLI3_TSFT_ADJ_VAL_8812F) 15830 #define BIT_CLEAR_R_CLI3_TSFT_ADJ_VAL_8812F(x) \ 15831 ((x) & (~BITS_R_CLI3_TSFT_ADJ_VAL_8812F)) 15832 #define BIT_GET_R_CLI3_TSFT_ADJ_VAL_8812F(x) \ 15833 (((x) >> BIT_SHIFT_R_CLI3_TSFT_ADJ_VAL_8812F) & \ 15834 BIT_MASK_R_CLI3_TSFT_ADJ_VAL_8812F) 15835 #define BIT_SET_R_CLI3_TSFT_ADJ_VAL_8812F(x, v) \ 15836 (BIT_CLEAR_R_CLI3_TSFT_ADJ_VAL_8812F(x) | \ 15837 BIT_R_CLI3_TSFT_ADJ_VAL_8812F(v)) 15838 15839 #define BIT_SHIFT_R_CLI2_TSFT_ADJ_VAL_8812F 0 15840 #define BIT_MASK_R_CLI2_TSFT_ADJ_VAL_8812F 0xffff 15841 #define BIT_R_CLI2_TSFT_ADJ_VAL_8812F(x) \ 15842 (((x) & BIT_MASK_R_CLI2_TSFT_ADJ_VAL_8812F) \ 15843 << BIT_SHIFT_R_CLI2_TSFT_ADJ_VAL_8812F) 15844 #define BITS_R_CLI2_TSFT_ADJ_VAL_8812F \ 15845 (BIT_MASK_R_CLI2_TSFT_ADJ_VAL_8812F \ 15846 << BIT_SHIFT_R_CLI2_TSFT_ADJ_VAL_8812F) 15847 #define BIT_CLEAR_R_CLI2_TSFT_ADJ_VAL_8812F(x) \ 15848 ((x) & (~BITS_R_CLI2_TSFT_ADJ_VAL_8812F)) 15849 #define BIT_GET_R_CLI2_TSFT_ADJ_VAL_8812F(x) \ 15850 (((x) >> BIT_SHIFT_R_CLI2_TSFT_ADJ_VAL_8812F) & \ 15851 BIT_MASK_R_CLI2_TSFT_ADJ_VAL_8812F) 15852 #define BIT_SET_R_CLI2_TSFT_ADJ_VAL_8812F(x, v) \ 15853 (BIT_CLEAR_R_CLI2_TSFT_ADJ_VAL_8812F(x) | \ 15854 BIT_R_CLI2_TSFT_ADJ_VAL_8812F(v)) 15855 15856 /* 2 REG_NOT_VALID_8812F */ 15857 15858 /* 2 REG_NOT_VALID_8812F */ 15859 15860 /* 2 REG_NOT_VALID_8812F */ 15861 15862 /* 2 REG_NOT_VALID_8812F */ 15863 15864 /* 2 REG_NOT_VALID_8812F */ 15865 15866 /* 2 REG_NOT_VALID_8812F */ 15867 15868 /* 2 REG_NOT_VALID_8812F */ 15869 15870 /* 2 REG_NOT_VALID_8812F */ 15871 15872 /* 2 REG_RSVD_8812F */ 15873 15874 /* 2 REG_RSVD_8812F */ 15875 15876 /* 2 REG_RSVD_8812F */ 15877 15878 /* 2 REG_RSVD_8812F */ 15879 15880 /* 2 REG_RSVD_8812F */ 15881 15882 /* 2 REG_RSVD_8812F */ 15883 15884 /* 2 REG_RSVD_8812F */ 15885 15886 /* 2 REG_RSVD_8812F */ 15887 15888 /* 2 REG_P2PPS_HW_AUTO_PAUSE_CTRL_8812F */ 15889 #define BIT_P2PPS_NOA_STOP_TX_HANG_8812F BIT(31) 15890 #define BIT_P2PPS_MACID_PAUSE_EN_8812F BIT(11) 15891 #define BIT_P2PPS__MGQ_PAUSE_8812F BIT(10) 15892 #define BIT_P2PPS__HIQ_PAUSE_8812F BIT(9) 15893 #define BIT_P2PPS__BCNQ_PAUSE_8812F BIT(8) 15894 15895 #define BIT_SHIFT_P2PPS_MACID_PAUSE_8812F 0 15896 #define BIT_MASK_P2PPS_MACID_PAUSE_8812F 0xff 15897 #define BIT_P2PPS_MACID_PAUSE_8812F(x) \ 15898 (((x) & BIT_MASK_P2PPS_MACID_PAUSE_8812F) \ 15899 << BIT_SHIFT_P2PPS_MACID_PAUSE_8812F) 15900 #define BITS_P2PPS_MACID_PAUSE_8812F \ 15901 (BIT_MASK_P2PPS_MACID_PAUSE_8812F << BIT_SHIFT_P2PPS_MACID_PAUSE_8812F) 15902 #define BIT_CLEAR_P2PPS_MACID_PAUSE_8812F(x) \ 15903 ((x) & (~BITS_P2PPS_MACID_PAUSE_8812F)) 15904 #define BIT_GET_P2PPS_MACID_PAUSE_8812F(x) \ 15905 (((x) >> BIT_SHIFT_P2PPS_MACID_PAUSE_8812F) & \ 15906 BIT_MASK_P2PPS_MACID_PAUSE_8812F) 15907 #define BIT_SET_P2PPS_MACID_PAUSE_8812F(x, v) \ 15908 (BIT_CLEAR_P2PPS_MACID_PAUSE_8812F(x) | BIT_P2PPS_MACID_PAUSE_8812F(v)) 15909 15910 /* 2 REG_P2PPS1_HW_AUTO_PAUSE_CTRL_8812F */ 15911 #define BIT_P2PPS1_NOA_STOP_TX_HANG_8812F BIT(31) 15912 #define BIT_P2PPS1_MACID_PAUSE_EN_8812F BIT(11) 15913 #define BIT_P2PPS1__MGQ_PAUSE_8812F BIT(10) 15914 #define BIT_P2PPS1__HIQ_PAUSE_8812F BIT(9) 15915 #define BIT_P2PPS1__BCNQ_PAUSE_8812F BIT(8) 15916 15917 #define BIT_SHIFT_P2PPS1_MACID_PAUSE_8812F 0 15918 #define BIT_MASK_P2PPS1_MACID_PAUSE_8812F 0xff 15919 #define BIT_P2PPS1_MACID_PAUSE_8812F(x) \ 15920 (((x) & BIT_MASK_P2PPS1_MACID_PAUSE_8812F) \ 15921 << BIT_SHIFT_P2PPS1_MACID_PAUSE_8812F) 15922 #define BITS_P2PPS1_MACID_PAUSE_8812F \ 15923 (BIT_MASK_P2PPS1_MACID_PAUSE_8812F \ 15924 << BIT_SHIFT_P2PPS1_MACID_PAUSE_8812F) 15925 #define BIT_CLEAR_P2PPS1_MACID_PAUSE_8812F(x) \ 15926 ((x) & (~BITS_P2PPS1_MACID_PAUSE_8812F)) 15927 #define BIT_GET_P2PPS1_MACID_PAUSE_8812F(x) \ 15928 (((x) >> BIT_SHIFT_P2PPS1_MACID_PAUSE_8812F) & \ 15929 BIT_MASK_P2PPS1_MACID_PAUSE_8812F) 15930 #define BIT_SET_P2PPS1_MACID_PAUSE_8812F(x, v) \ 15931 (BIT_CLEAR_P2PPS1_MACID_PAUSE_8812F(x) | \ 15932 BIT_P2PPS1_MACID_PAUSE_8812F(v)) 15933 15934 /* 2 REG_P2PPS2_HW_AUTO_PAUSE_CTRL_8812F */ 15935 #define BIT_P2PPS2_NOA_STOP_TX_HANG_8812F BIT(31) 15936 #define BIT_P2PPS2_MACID_PAUSE_EN_8812F BIT(11) 15937 #define BIT_P2PPS2__MGQ_PAUSE_8812F BIT(10) 15938 #define BIT_P2PPS2__HIQ_PAUSE_8812F BIT(9) 15939 #define BIT_P2PPS2__BCNQ_PAUSE_8812F BIT(8) 15940 15941 #define BIT_SHIFT_P2PPS2_MACID_PAUSE_8812F 0 15942 #define BIT_MASK_P2PPS2_MACID_PAUSE_8812F 0xff 15943 #define BIT_P2PPS2_MACID_PAUSE_8812F(x) \ 15944 (((x) & BIT_MASK_P2PPS2_MACID_PAUSE_8812F) \ 15945 << BIT_SHIFT_P2PPS2_MACID_PAUSE_8812F) 15946 #define BITS_P2PPS2_MACID_PAUSE_8812F \ 15947 (BIT_MASK_P2PPS2_MACID_PAUSE_8812F \ 15948 << BIT_SHIFT_P2PPS2_MACID_PAUSE_8812F) 15949 #define BIT_CLEAR_P2PPS2_MACID_PAUSE_8812F(x) \ 15950 ((x) & (~BITS_P2PPS2_MACID_PAUSE_8812F)) 15951 #define BIT_GET_P2PPS2_MACID_PAUSE_8812F(x) \ 15952 (((x) >> BIT_SHIFT_P2PPS2_MACID_PAUSE_8812F) & \ 15953 BIT_MASK_P2PPS2_MACID_PAUSE_8812F) 15954 #define BIT_SET_P2PPS2_MACID_PAUSE_8812F(x, v) \ 15955 (BIT_CLEAR_P2PPS2_MACID_PAUSE_8812F(x) | \ 15956 BIT_P2PPS2_MACID_PAUSE_8812F(v)) 15957 15958 /* 2 REG_RSVD_8812F */ 15959 15960 /* 2 REG_RSVD_8812F */ 15961 15962 /* 2 REG_RSVD_8812F */ 15963 15964 /* 2 REG_RSVD_8812F */ 15965 15966 /* 2 REG_RSVD_8812F */ 15967 15968 /* 2 REG_RSVD_8812F */ 15969 15970 /* 2 REG_RSVD_8812F */ 15971 15972 /* 2 REG_RSVD_8812F */ 15973 15974 /* 2 REG_RSVD_8812F */ 15975 15976 /* 2 REG_RSVD_8812F */ 15977 15978 /* 2 REG_RSVD_8812F */ 15979 15980 /* 2 REG_RSVD_8812F */ 15981 15982 /* 2 REG_RSVD_8812F */ 15983 15984 /* 2 REG_RSVD_8812F */ 15985 15986 /* 2 REG_RSVD_8812F */ 15987 15988 /* 2 REG_RSVD_8812F */ 15989 15990 /* 2 REG_RSVD_8812F */ 15991 15992 /* 2 REG_RSVD_8812F */ 15993 15994 /* 2 REG_RSVD_8812F */ 15995 15996 /* 2 REG_RSVD_8812F */ 15997 15998 /* 2 REG_RSVD_8812F */ 15999 16000 /* 2 REG_RSVD_8812F */ 16001 16002 /* 2 REG_RSVD_8812F */ 16003 16004 /* 2 REG_RSVD_8812F */ 16005 16006 /* 2 REG_RSVD_8812F */ 16007 16008 /* 2 REG_RSVD_8812F */ 16009 16010 /* 2 REG_RSVD_8812F */ 16011 16012 /* 2 REG_RSVD_8812F */ 16013 16014 /* 2 REG_RSVD_8812F */ 16015 16016 /* 2 REG_RSVD_8812F */ 16017 16018 /* 2 REG_RSVD_8812F */ 16019 16020 /* 2 REG_RSVD_8812F */ 16021 16022 /* 2 REG_RSVD_8812F */ 16023 16024 /* 2 REG_RSVD_8812F */ 16025 16026 /* 2 REG_NOT_VALID_8812F */ 16027 16028 /* 2 REG_WMAC_CR_8812F (WMAC CR AND APSD CONTROL REGISTER) */ 16029 #define BIT_IC_MACPHY_M_8812F BIT(0) 16030 16031 /* 2 REG_WMAC_FWPKT_CR_8812F */ 16032 #define BIT_FWEN_8812F BIT(7) 16033 #define BIT_PHYSTS_PKT_CTRL_8812F BIT(6) 16034 #define BIT_APPHDR_MIDSRCH_FAIL_8812F BIT(4) 16035 #define BIT_FWPARSING_EN_8812F BIT(3) 16036 16037 #define BIT_SHIFT_APPEND_MHDR_LEN_8812F 0 16038 #define BIT_MASK_APPEND_MHDR_LEN_8812F 0x7 16039 #define BIT_APPEND_MHDR_LEN_8812F(x) \ 16040 (((x) & BIT_MASK_APPEND_MHDR_LEN_8812F) \ 16041 << BIT_SHIFT_APPEND_MHDR_LEN_8812F) 16042 #define BITS_APPEND_MHDR_LEN_8812F \ 16043 (BIT_MASK_APPEND_MHDR_LEN_8812F << BIT_SHIFT_APPEND_MHDR_LEN_8812F) 16044 #define BIT_CLEAR_APPEND_MHDR_LEN_8812F(x) ((x) & (~BITS_APPEND_MHDR_LEN_8812F)) 16045 #define BIT_GET_APPEND_MHDR_LEN_8812F(x) \ 16046 (((x) >> BIT_SHIFT_APPEND_MHDR_LEN_8812F) & \ 16047 BIT_MASK_APPEND_MHDR_LEN_8812F) 16048 #define BIT_SET_APPEND_MHDR_LEN_8812F(x, v) \ 16049 (BIT_CLEAR_APPEND_MHDR_LEN_8812F(x) | BIT_APPEND_MHDR_LEN_8812F(v)) 16050 16051 /* 2 REG_FW_STS_FILTER_8812F */ 16052 #define BIT_DATA_FW_STS_FILTER_8812F BIT(2) 16053 #define BIT_CTRL_FW_STS_FILTER_8812F BIT(1) 16054 #define BIT_MGNT_FW_STS_FILTER_8812F BIT(0) 16055 16056 /* 2 REG_RSVD_8812F */ 16057 16058 /* 2 REG_TCR_8812F (TRANSMISSION CONFIGURATION REGISTER) */ 16059 #define BIT_WMAC_EN_RTS_ADDR_8812F BIT(31) 16060 #define BIT_WMAC_DISABLE_CCK_8812F BIT(30) 16061 #define BIT_WMAC_RAW_LEN_8812F BIT(29) 16062 #define BIT_WMAC_NOTX_IN_RXNDP_8812F BIT(28) 16063 #define BIT_WMAC_EN_EOF_8812F BIT(27) 16064 #define BIT_WMAC_BF_SEL_8812F BIT(26) 16065 #define BIT_WMAC_ANTMODE_SEL_8812F BIT(25) 16066 #define BIT_WMAC_TCRPWRMGT_HWCTL_8812F BIT(24) 16067 #define BIT_WMAC_SMOOTH_VAL_8812F BIT(23) 16068 #define BIT_WMAC_EN_SCRAM_INC_8812F BIT(22) 16069 #define BIT_UNDERFLOWEN_CMPLEN_SEL_8812F BIT(21) 16070 #define BIT_FETCH_MPDU_AFTER_WSEC_RDY_8812F BIT(20) 16071 #define BIT_WMAC_TCR_EN_20MST_8812F BIT(19) 16072 #define BIT_WMAC_DIS_SIGTA_8812F BIT(18) 16073 #define BIT_WMAC_DIS_A2B0_8812F BIT(17) 16074 #define BIT_WMAC_MSK_SIGBCRC_8812F BIT(16) 16075 #define BIT_WMAC_TCR_ERRSTEN_3_8812F BIT(15) 16076 #define BIT_WMAC_TCR_ERRSTEN_2_8812F BIT(14) 16077 #define BIT_WMAC_TCR_ERRSTEN_1_8812F BIT(13) 16078 #define BIT_WMAC_TCR_ERRSTEN_0_8812F BIT(12) 16079 #define BIT_WMAC_TCR_TXSK_PERPKT_8812F BIT(11) 16080 #define BIT_ICV_8812F BIT(10) 16081 #define BIT_CFEND_FORMAT_8812F BIT(9) 16082 #define BIT_CRC_8812F BIT(8) 16083 #define BIT_WMAC_TCRPWRMGT_HWDATA_EN_8812F BIT(7) 16084 #define BIT_PWR_ST_8812F BIT(6) 16085 #define BIT_WMAC_TCR_UPD_TIMIE_8812F BIT(5) 16086 #define BIT_WMAC_TCR_UPD_HGQMD_8812F BIT(4) 16087 #define BIT_VHTSIGA1_TXPS_8812F BIT(3) 16088 #define BIT_PAD_SEL_8812F BIT(2) 16089 #define BIT_DIS_GCLK_8812F BIT(1) 16090 #define BIT_WMAC_TCRPWRMGT_HWACT_EN_8812F BIT(0) 16091 16092 /* 2 REG_RCR_8812F (RECEIVE CONFIGURATION REGISTER) */ 16093 #define BIT_APP_FCS_8812F BIT(31) 16094 #define BIT_APP_MIC_8812F BIT(30) 16095 #define BIT_APP_ICV_8812F BIT(29) 16096 #define BIT_APP_PHYSTS_8812F BIT(28) 16097 #define BIT_APP_BASSN_8812F BIT(27) 16098 #define BIT_VHT_DACK_8812F BIT(26) 16099 #define BIT_TCPOFLD_EN_8812F BIT(25) 16100 #define BIT_ENMBID_8812F BIT(24) 16101 #define BIT_LSIGEN_8812F BIT(23) 16102 #define BIT_MFBEN_8812F BIT(22) 16103 #define BIT_DISCHKPPDLLEN_8812F BIT(21) 16104 #define BIT_PKTCTL_DLEN_8812F BIT(20) 16105 #define BIT_DISGCLK_8812F BIT(19) 16106 #define BIT_TIM_PARSER_EN_8812F BIT(18) 16107 #define BIT_BC_MD_EN_8812F BIT(17) 16108 #define BIT_UC_MD_EN_8812F BIT(16) 16109 #define BIT_RXSK_PERPKT_8812F BIT(15) 16110 #define BIT_HTC_LOC_CTRL_8812F BIT(14) 16111 #define BIT_ACK_WITH_CBSSID_DATA_OPTION_8812F BIT(13) 16112 #define BIT_RPFM_CAM_ENABLE_8812F BIT(12) 16113 #define BIT_TA_BCN_8812F BIT(11) 16114 #define BIT_DISDECMYPKT_8812F BIT(10) 16115 #define BIT_AICV_8812F BIT(9) 16116 #define BIT_ACRC32_8812F BIT(8) 16117 #define BIT_CBSSID_BCN_8812F BIT(7) 16118 #define BIT_CBSSID_DATA_8812F BIT(6) 16119 #define BIT_APWRMGT_8812F BIT(5) 16120 #define BIT_ADD3_8812F BIT(4) 16121 #define BIT_AB_8812F BIT(3) 16122 #define BIT_AM_8812F BIT(2) 16123 #define BIT_APM_8812F BIT(1) 16124 #define BIT_AAP_8812F BIT(0) 16125 16126 /* 2 REG_RX_PKT_LIMIT_8812F (RX PACKET LENGTH LIMIT REGISTER) */ 16127 16128 #define BIT_SHIFT_RXPKTLMT_8812F 0 16129 #define BIT_MASK_RXPKTLMT_8812F 0x3f 16130 #define BIT_RXPKTLMT_8812F(x) \ 16131 (((x) & BIT_MASK_RXPKTLMT_8812F) << BIT_SHIFT_RXPKTLMT_8812F) 16132 #define BITS_RXPKTLMT_8812F \ 16133 (BIT_MASK_RXPKTLMT_8812F << BIT_SHIFT_RXPKTLMT_8812F) 16134 #define BIT_CLEAR_RXPKTLMT_8812F(x) ((x) & (~BITS_RXPKTLMT_8812F)) 16135 #define BIT_GET_RXPKTLMT_8812F(x) \ 16136 (((x) >> BIT_SHIFT_RXPKTLMT_8812F) & BIT_MASK_RXPKTLMT_8812F) 16137 #define BIT_SET_RXPKTLMT_8812F(x, v) \ 16138 (BIT_CLEAR_RXPKTLMT_8812F(x) | BIT_RXPKTLMT_8812F(v)) 16139 16140 /* 2 REG_RX_DLK_TIME_8812F (RX DEADLOCK TIME REGISTER) */ 16141 16142 #define BIT_SHIFT_RX_DLK_TIME_8812F 0 16143 #define BIT_MASK_RX_DLK_TIME_8812F 0xff 16144 #define BIT_RX_DLK_TIME_8812F(x) \ 16145 (((x) & BIT_MASK_RX_DLK_TIME_8812F) << BIT_SHIFT_RX_DLK_TIME_8812F) 16146 #define BITS_RX_DLK_TIME_8812F \ 16147 (BIT_MASK_RX_DLK_TIME_8812F << BIT_SHIFT_RX_DLK_TIME_8812F) 16148 #define BIT_CLEAR_RX_DLK_TIME_8812F(x) ((x) & (~BITS_RX_DLK_TIME_8812F)) 16149 #define BIT_GET_RX_DLK_TIME_8812F(x) \ 16150 (((x) >> BIT_SHIFT_RX_DLK_TIME_8812F) & BIT_MASK_RX_DLK_TIME_8812F) 16151 #define BIT_SET_RX_DLK_TIME_8812F(x, v) \ 16152 (BIT_CLEAR_RX_DLK_TIME_8812F(x) | BIT_RX_DLK_TIME_8812F(v)) 16153 16154 /* 2 REG_RSVD_8812F */ 16155 16156 /* 2 REG_RX_DRVINFO_SZ_8812F (RX DRIVER INFO SIZE REGISTER) */ 16157 #define BIT_PHYSTS_PER_PKT_MODE_8812F BIT(7) 16158 16159 #define BIT_SHIFT_DRVINFO_SZ_V1_8812F 0 16160 #define BIT_MASK_DRVINFO_SZ_V1_8812F 0xf 16161 #define BIT_DRVINFO_SZ_V1_8812F(x) \ 16162 (((x) & BIT_MASK_DRVINFO_SZ_V1_8812F) << BIT_SHIFT_DRVINFO_SZ_V1_8812F) 16163 #define BITS_DRVINFO_SZ_V1_8812F \ 16164 (BIT_MASK_DRVINFO_SZ_V1_8812F << BIT_SHIFT_DRVINFO_SZ_V1_8812F) 16165 #define BIT_CLEAR_DRVINFO_SZ_V1_8812F(x) ((x) & (~BITS_DRVINFO_SZ_V1_8812F)) 16166 #define BIT_GET_DRVINFO_SZ_V1_8812F(x) \ 16167 (((x) >> BIT_SHIFT_DRVINFO_SZ_V1_8812F) & BIT_MASK_DRVINFO_SZ_V1_8812F) 16168 #define BIT_SET_DRVINFO_SZ_V1_8812F(x, v) \ 16169 (BIT_CLEAR_DRVINFO_SZ_V1_8812F(x) | BIT_DRVINFO_SZ_V1_8812F(v)) 16170 16171 /* 2 REG_MACID_8812F (MAC ID REGISTER) */ 16172 16173 #define BIT_SHIFT_MACID_V1_8812F 0 16174 #define BIT_MASK_MACID_V1_8812F 0xffffffffL 16175 #define BIT_MACID_V1_8812F(x) \ 16176 (((x) & BIT_MASK_MACID_V1_8812F) << BIT_SHIFT_MACID_V1_8812F) 16177 #define BITS_MACID_V1_8812F \ 16178 (BIT_MASK_MACID_V1_8812F << BIT_SHIFT_MACID_V1_8812F) 16179 #define BIT_CLEAR_MACID_V1_8812F(x) ((x) & (~BITS_MACID_V1_8812F)) 16180 #define BIT_GET_MACID_V1_8812F(x) \ 16181 (((x) >> BIT_SHIFT_MACID_V1_8812F) & BIT_MASK_MACID_V1_8812F) 16182 #define BIT_SET_MACID_V1_8812F(x, v) \ 16183 (BIT_CLEAR_MACID_V1_8812F(x) | BIT_MACID_V1_8812F(v)) 16184 16185 /* 2 REG_MACID_H_8812F (MAC ID REGISTER) */ 16186 16187 #define BIT_SHIFT_MACID_H_V1_8812F 0 16188 #define BIT_MASK_MACID_H_V1_8812F 0xffff 16189 #define BIT_MACID_H_V1_8812F(x) \ 16190 (((x) & BIT_MASK_MACID_H_V1_8812F) << BIT_SHIFT_MACID_H_V1_8812F) 16191 #define BITS_MACID_H_V1_8812F \ 16192 (BIT_MASK_MACID_H_V1_8812F << BIT_SHIFT_MACID_H_V1_8812F) 16193 #define BIT_CLEAR_MACID_H_V1_8812F(x) ((x) & (~BITS_MACID_H_V1_8812F)) 16194 #define BIT_GET_MACID_H_V1_8812F(x) \ 16195 (((x) >> BIT_SHIFT_MACID_H_V1_8812F) & BIT_MASK_MACID_H_V1_8812F) 16196 #define BIT_SET_MACID_H_V1_8812F(x, v) \ 16197 (BIT_CLEAR_MACID_H_V1_8812F(x) | BIT_MACID_H_V1_8812F(v)) 16198 16199 /* 2 REG_BSSID_8812F (BSSID REGISTER) */ 16200 16201 #define BIT_SHIFT_BSSID_V1_8812F 0 16202 #define BIT_MASK_BSSID_V1_8812F 0xffffffffL 16203 #define BIT_BSSID_V1_8812F(x) \ 16204 (((x) & BIT_MASK_BSSID_V1_8812F) << BIT_SHIFT_BSSID_V1_8812F) 16205 #define BITS_BSSID_V1_8812F \ 16206 (BIT_MASK_BSSID_V1_8812F << BIT_SHIFT_BSSID_V1_8812F) 16207 #define BIT_CLEAR_BSSID_V1_8812F(x) ((x) & (~BITS_BSSID_V1_8812F)) 16208 #define BIT_GET_BSSID_V1_8812F(x) \ 16209 (((x) >> BIT_SHIFT_BSSID_V1_8812F) & BIT_MASK_BSSID_V1_8812F) 16210 #define BIT_SET_BSSID_V1_8812F(x, v) \ 16211 (BIT_CLEAR_BSSID_V1_8812F(x) | BIT_BSSID_V1_8812F(v)) 16212 16213 /* 2 REG_BSSID_H_8812F (BSSID REGISTER) */ 16214 16215 /* 2 REG_NOT_VALID_8812F */ 16216 16217 #define BIT_SHIFT_BSSID_H_V1_8812F 0 16218 #define BIT_MASK_BSSID_H_V1_8812F 0xffff 16219 #define BIT_BSSID_H_V1_8812F(x) \ 16220 (((x) & BIT_MASK_BSSID_H_V1_8812F) << BIT_SHIFT_BSSID_H_V1_8812F) 16221 #define BITS_BSSID_H_V1_8812F \ 16222 (BIT_MASK_BSSID_H_V1_8812F << BIT_SHIFT_BSSID_H_V1_8812F) 16223 #define BIT_CLEAR_BSSID_H_V1_8812F(x) ((x) & (~BITS_BSSID_H_V1_8812F)) 16224 #define BIT_GET_BSSID_H_V1_8812F(x) \ 16225 (((x) >> BIT_SHIFT_BSSID_H_V1_8812F) & BIT_MASK_BSSID_H_V1_8812F) 16226 #define BIT_SET_BSSID_H_V1_8812F(x, v) \ 16227 (BIT_CLEAR_BSSID_H_V1_8812F(x) | BIT_BSSID_H_V1_8812F(v)) 16228 16229 /* 2 REG_MAR_8812F (MULTICAST ADDRESS REGISTER) */ 16230 16231 #define BIT_SHIFT_MAR_V1_8812F 0 16232 #define BIT_MASK_MAR_V1_8812F 0xffffffffL 16233 #define BIT_MAR_V1_8812F(x) \ 16234 (((x) & BIT_MASK_MAR_V1_8812F) << BIT_SHIFT_MAR_V1_8812F) 16235 #define BITS_MAR_V1_8812F (BIT_MASK_MAR_V1_8812F << BIT_SHIFT_MAR_V1_8812F) 16236 #define BIT_CLEAR_MAR_V1_8812F(x) ((x) & (~BITS_MAR_V1_8812F)) 16237 #define BIT_GET_MAR_V1_8812F(x) \ 16238 (((x) >> BIT_SHIFT_MAR_V1_8812F) & BIT_MASK_MAR_V1_8812F) 16239 #define BIT_SET_MAR_V1_8812F(x, v) \ 16240 (BIT_CLEAR_MAR_V1_8812F(x) | BIT_MAR_V1_8812F(v)) 16241 16242 /* 2 REG_MAR_H_8812F (MULTICAST ADDRESS REGISTER) */ 16243 16244 #define BIT_SHIFT_MAR_H_V1_8812F 0 16245 #define BIT_MASK_MAR_H_V1_8812F 0xffffffffL 16246 #define BIT_MAR_H_V1_8812F(x) \ 16247 (((x) & BIT_MASK_MAR_H_V1_8812F) << BIT_SHIFT_MAR_H_V1_8812F) 16248 #define BITS_MAR_H_V1_8812F \ 16249 (BIT_MASK_MAR_H_V1_8812F << BIT_SHIFT_MAR_H_V1_8812F) 16250 #define BIT_CLEAR_MAR_H_V1_8812F(x) ((x) & (~BITS_MAR_H_V1_8812F)) 16251 #define BIT_GET_MAR_H_V1_8812F(x) \ 16252 (((x) >> BIT_SHIFT_MAR_H_V1_8812F) & BIT_MASK_MAR_H_V1_8812F) 16253 #define BIT_SET_MAR_H_V1_8812F(x, v) \ 16254 (BIT_CLEAR_MAR_H_V1_8812F(x) | BIT_MAR_H_V1_8812F(v)) 16255 16256 /* 2 REG_MBIDCAMCFG_1_8812F (MBSSID CAM CONFIGURATION REGISTER) */ 16257 16258 #define BIT_SHIFT_MBIDCAM_RWDATA_L_8812F 0 16259 #define BIT_MASK_MBIDCAM_RWDATA_L_8812F 0xffffffffL 16260 #define BIT_MBIDCAM_RWDATA_L_8812F(x) \ 16261 (((x) & BIT_MASK_MBIDCAM_RWDATA_L_8812F) \ 16262 << BIT_SHIFT_MBIDCAM_RWDATA_L_8812F) 16263 #define BITS_MBIDCAM_RWDATA_L_8812F \ 16264 (BIT_MASK_MBIDCAM_RWDATA_L_8812F << BIT_SHIFT_MBIDCAM_RWDATA_L_8812F) 16265 #define BIT_CLEAR_MBIDCAM_RWDATA_L_8812F(x) \ 16266 ((x) & (~BITS_MBIDCAM_RWDATA_L_8812F)) 16267 #define BIT_GET_MBIDCAM_RWDATA_L_8812F(x) \ 16268 (((x) >> BIT_SHIFT_MBIDCAM_RWDATA_L_8812F) & \ 16269 BIT_MASK_MBIDCAM_RWDATA_L_8812F) 16270 #define BIT_SET_MBIDCAM_RWDATA_L_8812F(x, v) \ 16271 (BIT_CLEAR_MBIDCAM_RWDATA_L_8812F(x) | BIT_MBIDCAM_RWDATA_L_8812F(v)) 16272 16273 /* 2 REG_MBIDCAMCFG_2_8812F (MBSSID CAM CONFIGURATION REGISTER) */ 16274 #define BIT_MBIDCAM_POLL_8812F BIT(31) 16275 #define BIT_MBIDCAM_WT_EN_8812F BIT(30) 16276 16277 #define BIT_SHIFT_MBIDCAM_ADDR_V1_8812F 24 16278 #define BIT_MASK_MBIDCAM_ADDR_V1_8812F 0x3f 16279 #define BIT_MBIDCAM_ADDR_V1_8812F(x) \ 16280 (((x) & BIT_MASK_MBIDCAM_ADDR_V1_8812F) \ 16281 << BIT_SHIFT_MBIDCAM_ADDR_V1_8812F) 16282 #define BITS_MBIDCAM_ADDR_V1_8812F \ 16283 (BIT_MASK_MBIDCAM_ADDR_V1_8812F << BIT_SHIFT_MBIDCAM_ADDR_V1_8812F) 16284 #define BIT_CLEAR_MBIDCAM_ADDR_V1_8812F(x) ((x) & (~BITS_MBIDCAM_ADDR_V1_8812F)) 16285 #define BIT_GET_MBIDCAM_ADDR_V1_8812F(x) \ 16286 (((x) >> BIT_SHIFT_MBIDCAM_ADDR_V1_8812F) & \ 16287 BIT_MASK_MBIDCAM_ADDR_V1_8812F) 16288 #define BIT_SET_MBIDCAM_ADDR_V1_8812F(x, v) \ 16289 (BIT_CLEAR_MBIDCAM_ADDR_V1_8812F(x) | BIT_MBIDCAM_ADDR_V1_8812F(v)) 16290 16291 #define BIT_MBIDCAM_VALID_8812F BIT(23) 16292 #define BIT_LSIC_TXOP_EN_8812F BIT(17) 16293 #define BIT_CTS_EN_8812F BIT(16) 16294 16295 #define BIT_SHIFT_MBIDCAM_RWDATA_H_8812F 0 16296 #define BIT_MASK_MBIDCAM_RWDATA_H_8812F 0xffff 16297 #define BIT_MBIDCAM_RWDATA_H_8812F(x) \ 16298 (((x) & BIT_MASK_MBIDCAM_RWDATA_H_8812F) \ 16299 << BIT_SHIFT_MBIDCAM_RWDATA_H_8812F) 16300 #define BITS_MBIDCAM_RWDATA_H_8812F \ 16301 (BIT_MASK_MBIDCAM_RWDATA_H_8812F << BIT_SHIFT_MBIDCAM_RWDATA_H_8812F) 16302 #define BIT_CLEAR_MBIDCAM_RWDATA_H_8812F(x) \ 16303 ((x) & (~BITS_MBIDCAM_RWDATA_H_8812F)) 16304 #define BIT_GET_MBIDCAM_RWDATA_H_8812F(x) \ 16305 (((x) >> BIT_SHIFT_MBIDCAM_RWDATA_H_8812F) & \ 16306 BIT_MASK_MBIDCAM_RWDATA_H_8812F) 16307 #define BIT_SET_MBIDCAM_RWDATA_H_8812F(x, v) \ 16308 (BIT_CLEAR_MBIDCAM_RWDATA_H_8812F(x) | BIT_MBIDCAM_RWDATA_H_8812F(v)) 16309 16310 /* 2 REG_WMAC_TCR_TSFT_OFS_8812F */ 16311 16312 #define BIT_SHIFT_WMAC_TCR_TSFT_OFS_8812F 0 16313 #define BIT_MASK_WMAC_TCR_TSFT_OFS_8812F 0xffff 16314 #define BIT_WMAC_TCR_TSFT_OFS_8812F(x) \ 16315 (((x) & BIT_MASK_WMAC_TCR_TSFT_OFS_8812F) \ 16316 << BIT_SHIFT_WMAC_TCR_TSFT_OFS_8812F) 16317 #define BITS_WMAC_TCR_TSFT_OFS_8812F \ 16318 (BIT_MASK_WMAC_TCR_TSFT_OFS_8812F << BIT_SHIFT_WMAC_TCR_TSFT_OFS_8812F) 16319 #define BIT_CLEAR_WMAC_TCR_TSFT_OFS_8812F(x) \ 16320 ((x) & (~BITS_WMAC_TCR_TSFT_OFS_8812F)) 16321 #define BIT_GET_WMAC_TCR_TSFT_OFS_8812F(x) \ 16322 (((x) >> BIT_SHIFT_WMAC_TCR_TSFT_OFS_8812F) & \ 16323 BIT_MASK_WMAC_TCR_TSFT_OFS_8812F) 16324 #define BIT_SET_WMAC_TCR_TSFT_OFS_8812F(x, v) \ 16325 (BIT_CLEAR_WMAC_TCR_TSFT_OFS_8812F(x) | BIT_WMAC_TCR_TSFT_OFS_8812F(v)) 16326 16327 /* 2 REG_UDF_THSD_8812F */ 16328 #define BIT_UDF_THSD_V1_8812F BIT(7) 16329 16330 #define BIT_SHIFT_UDF_THSD_VALUE_8812F 0 16331 #define BIT_MASK_UDF_THSD_VALUE_8812F 0x7f 16332 #define BIT_UDF_THSD_VALUE_8812F(x) \ 16333 (((x) & BIT_MASK_UDF_THSD_VALUE_8812F) \ 16334 << BIT_SHIFT_UDF_THSD_VALUE_8812F) 16335 #define BITS_UDF_THSD_VALUE_8812F \ 16336 (BIT_MASK_UDF_THSD_VALUE_8812F << BIT_SHIFT_UDF_THSD_VALUE_8812F) 16337 #define BIT_CLEAR_UDF_THSD_VALUE_8812F(x) ((x) & (~BITS_UDF_THSD_VALUE_8812F)) 16338 #define BIT_GET_UDF_THSD_VALUE_8812F(x) \ 16339 (((x) >> BIT_SHIFT_UDF_THSD_VALUE_8812F) & \ 16340 BIT_MASK_UDF_THSD_VALUE_8812F) 16341 #define BIT_SET_UDF_THSD_VALUE_8812F(x, v) \ 16342 (BIT_CLEAR_UDF_THSD_VALUE_8812F(x) | BIT_UDF_THSD_VALUE_8812F(v)) 16343 16344 /* 2 REG_ZLD_NUM_8812F */ 16345 16346 #define BIT_SHIFT_ZLD_NUM_8812F 0 16347 #define BIT_MASK_ZLD_NUM_8812F 0xff 16348 #define BIT_ZLD_NUM_8812F(x) \ 16349 (((x) & BIT_MASK_ZLD_NUM_8812F) << BIT_SHIFT_ZLD_NUM_8812F) 16350 #define BITS_ZLD_NUM_8812F (BIT_MASK_ZLD_NUM_8812F << BIT_SHIFT_ZLD_NUM_8812F) 16351 #define BIT_CLEAR_ZLD_NUM_8812F(x) ((x) & (~BITS_ZLD_NUM_8812F)) 16352 #define BIT_GET_ZLD_NUM_8812F(x) \ 16353 (((x) >> BIT_SHIFT_ZLD_NUM_8812F) & BIT_MASK_ZLD_NUM_8812F) 16354 #define BIT_SET_ZLD_NUM_8812F(x, v) \ 16355 (BIT_CLEAR_ZLD_NUM_8812F(x) | BIT_ZLD_NUM_8812F(v)) 16356 16357 /* 2 REG_STMP_THSD_8812F */ 16358 16359 #define BIT_SHIFT_STMP_THSD_8812F 0 16360 #define BIT_MASK_STMP_THSD_8812F 0xff 16361 #define BIT_STMP_THSD_8812F(x) \ 16362 (((x) & BIT_MASK_STMP_THSD_8812F) << BIT_SHIFT_STMP_THSD_8812F) 16363 #define BITS_STMP_THSD_8812F \ 16364 (BIT_MASK_STMP_THSD_8812F << BIT_SHIFT_STMP_THSD_8812F) 16365 #define BIT_CLEAR_STMP_THSD_8812F(x) ((x) & (~BITS_STMP_THSD_8812F)) 16366 #define BIT_GET_STMP_THSD_8812F(x) \ 16367 (((x) >> BIT_SHIFT_STMP_THSD_8812F) & BIT_MASK_STMP_THSD_8812F) 16368 #define BIT_SET_STMP_THSD_8812F(x, v) \ 16369 (BIT_CLEAR_STMP_THSD_8812F(x) | BIT_STMP_THSD_8812F(v)) 16370 16371 /* 2 REG_WMAC_TXTIMEOUT_8812F */ 16372 16373 #define BIT_SHIFT_WMAC_TXTIMEOUT_8812F 0 16374 #define BIT_MASK_WMAC_TXTIMEOUT_8812F 0xff 16375 #define BIT_WMAC_TXTIMEOUT_8812F(x) \ 16376 (((x) & BIT_MASK_WMAC_TXTIMEOUT_8812F) \ 16377 << BIT_SHIFT_WMAC_TXTIMEOUT_8812F) 16378 #define BITS_WMAC_TXTIMEOUT_8812F \ 16379 (BIT_MASK_WMAC_TXTIMEOUT_8812F << BIT_SHIFT_WMAC_TXTIMEOUT_8812F) 16380 #define BIT_CLEAR_WMAC_TXTIMEOUT_8812F(x) ((x) & (~BITS_WMAC_TXTIMEOUT_8812F)) 16381 #define BIT_GET_WMAC_TXTIMEOUT_8812F(x) \ 16382 (((x) >> BIT_SHIFT_WMAC_TXTIMEOUT_8812F) & \ 16383 BIT_MASK_WMAC_TXTIMEOUT_8812F) 16384 #define BIT_SET_WMAC_TXTIMEOUT_8812F(x, v) \ 16385 (BIT_CLEAR_WMAC_TXTIMEOUT_8812F(x) | BIT_WMAC_TXTIMEOUT_8812F(v)) 16386 16387 /* 2 REG_NOT_VALID_8812F */ 16388 16389 /* 2 REG_USTIME_EDCA_8812F (US TIME TUNING FOR EDCA REGISTER) */ 16390 16391 #define BIT_SHIFT_USTIME_EDCA_8812F 0 16392 #define BIT_MASK_USTIME_EDCA_8812F 0xff 16393 #define BIT_USTIME_EDCA_8812F(x) \ 16394 (((x) & BIT_MASK_USTIME_EDCA_8812F) << BIT_SHIFT_USTIME_EDCA_8812F) 16395 #define BITS_USTIME_EDCA_8812F \ 16396 (BIT_MASK_USTIME_EDCA_8812F << BIT_SHIFT_USTIME_EDCA_8812F) 16397 #define BIT_CLEAR_USTIME_EDCA_8812F(x) ((x) & (~BITS_USTIME_EDCA_8812F)) 16398 #define BIT_GET_USTIME_EDCA_8812F(x) \ 16399 (((x) >> BIT_SHIFT_USTIME_EDCA_8812F) & BIT_MASK_USTIME_EDCA_8812F) 16400 #define BIT_SET_USTIME_EDCA_8812F(x, v) \ 16401 (BIT_CLEAR_USTIME_EDCA_8812F(x) | BIT_USTIME_EDCA_8812F(v)) 16402 16403 /* 2 REG_ACKTO_CCK_8812F (ACK TIMEOUT REGISTER FOR CCK RATE) */ 16404 16405 #define BIT_SHIFT_ACKTO_CCK_8812F 0 16406 #define BIT_MASK_ACKTO_CCK_8812F 0xff 16407 #define BIT_ACKTO_CCK_8812F(x) \ 16408 (((x) & BIT_MASK_ACKTO_CCK_8812F) << BIT_SHIFT_ACKTO_CCK_8812F) 16409 #define BITS_ACKTO_CCK_8812F \ 16410 (BIT_MASK_ACKTO_CCK_8812F << BIT_SHIFT_ACKTO_CCK_8812F) 16411 #define BIT_CLEAR_ACKTO_CCK_8812F(x) ((x) & (~BITS_ACKTO_CCK_8812F)) 16412 #define BIT_GET_ACKTO_CCK_8812F(x) \ 16413 (((x) >> BIT_SHIFT_ACKTO_CCK_8812F) & BIT_MASK_ACKTO_CCK_8812F) 16414 #define BIT_SET_ACKTO_CCK_8812F(x, v) \ 16415 (BIT_CLEAR_ACKTO_CCK_8812F(x) | BIT_ACKTO_CCK_8812F(v)) 16416 16417 /* 2 REG_MAC_SPEC_SIFS_8812F (SPECIFICATION SIFS REGISTER) */ 16418 16419 #define BIT_SHIFT_SPEC_SIFS_OFDM_8812F 8 16420 #define BIT_MASK_SPEC_SIFS_OFDM_8812F 0xff 16421 #define BIT_SPEC_SIFS_OFDM_8812F(x) \ 16422 (((x) & BIT_MASK_SPEC_SIFS_OFDM_8812F) \ 16423 << BIT_SHIFT_SPEC_SIFS_OFDM_8812F) 16424 #define BITS_SPEC_SIFS_OFDM_8812F \ 16425 (BIT_MASK_SPEC_SIFS_OFDM_8812F << BIT_SHIFT_SPEC_SIFS_OFDM_8812F) 16426 #define BIT_CLEAR_SPEC_SIFS_OFDM_8812F(x) ((x) & (~BITS_SPEC_SIFS_OFDM_8812F)) 16427 #define BIT_GET_SPEC_SIFS_OFDM_8812F(x) \ 16428 (((x) >> BIT_SHIFT_SPEC_SIFS_OFDM_8812F) & \ 16429 BIT_MASK_SPEC_SIFS_OFDM_8812F) 16430 #define BIT_SET_SPEC_SIFS_OFDM_8812F(x, v) \ 16431 (BIT_CLEAR_SPEC_SIFS_OFDM_8812F(x) | BIT_SPEC_SIFS_OFDM_8812F(v)) 16432 16433 #define BIT_SHIFT_SPEC_SIFS_CCK_8812F 0 16434 #define BIT_MASK_SPEC_SIFS_CCK_8812F 0xff 16435 #define BIT_SPEC_SIFS_CCK_8812F(x) \ 16436 (((x) & BIT_MASK_SPEC_SIFS_CCK_8812F) << BIT_SHIFT_SPEC_SIFS_CCK_8812F) 16437 #define BITS_SPEC_SIFS_CCK_8812F \ 16438 (BIT_MASK_SPEC_SIFS_CCK_8812F << BIT_SHIFT_SPEC_SIFS_CCK_8812F) 16439 #define BIT_CLEAR_SPEC_SIFS_CCK_8812F(x) ((x) & (~BITS_SPEC_SIFS_CCK_8812F)) 16440 #define BIT_GET_SPEC_SIFS_CCK_8812F(x) \ 16441 (((x) >> BIT_SHIFT_SPEC_SIFS_CCK_8812F) & BIT_MASK_SPEC_SIFS_CCK_8812F) 16442 #define BIT_SET_SPEC_SIFS_CCK_8812F(x, v) \ 16443 (BIT_CLEAR_SPEC_SIFS_CCK_8812F(x) | BIT_SPEC_SIFS_CCK_8812F(v)) 16444 16445 /* 2 REG_RESP_SIFS_CCK_8812F (RESPONSE SIFS FOR CCK REGISTER) */ 16446 16447 #define BIT_SHIFT_SIFS_R2T_CCK_8812F 8 16448 #define BIT_MASK_SIFS_R2T_CCK_8812F 0xff 16449 #define BIT_SIFS_R2T_CCK_8812F(x) \ 16450 (((x) & BIT_MASK_SIFS_R2T_CCK_8812F) << BIT_SHIFT_SIFS_R2T_CCK_8812F) 16451 #define BITS_SIFS_R2T_CCK_8812F \ 16452 (BIT_MASK_SIFS_R2T_CCK_8812F << BIT_SHIFT_SIFS_R2T_CCK_8812F) 16453 #define BIT_CLEAR_SIFS_R2T_CCK_8812F(x) ((x) & (~BITS_SIFS_R2T_CCK_8812F)) 16454 #define BIT_GET_SIFS_R2T_CCK_8812F(x) \ 16455 (((x) >> BIT_SHIFT_SIFS_R2T_CCK_8812F) & BIT_MASK_SIFS_R2T_CCK_8812F) 16456 #define BIT_SET_SIFS_R2T_CCK_8812F(x, v) \ 16457 (BIT_CLEAR_SIFS_R2T_CCK_8812F(x) | BIT_SIFS_R2T_CCK_8812F(v)) 16458 16459 #define BIT_SHIFT_SIFS_T2T_CCK_8812F 0 16460 #define BIT_MASK_SIFS_T2T_CCK_8812F 0xff 16461 #define BIT_SIFS_T2T_CCK_8812F(x) \ 16462 (((x) & BIT_MASK_SIFS_T2T_CCK_8812F) << BIT_SHIFT_SIFS_T2T_CCK_8812F) 16463 #define BITS_SIFS_T2T_CCK_8812F \ 16464 (BIT_MASK_SIFS_T2T_CCK_8812F << BIT_SHIFT_SIFS_T2T_CCK_8812F) 16465 #define BIT_CLEAR_SIFS_T2T_CCK_8812F(x) ((x) & (~BITS_SIFS_T2T_CCK_8812F)) 16466 #define BIT_GET_SIFS_T2T_CCK_8812F(x) \ 16467 (((x) >> BIT_SHIFT_SIFS_T2T_CCK_8812F) & BIT_MASK_SIFS_T2T_CCK_8812F) 16468 #define BIT_SET_SIFS_T2T_CCK_8812F(x, v) \ 16469 (BIT_CLEAR_SIFS_T2T_CCK_8812F(x) | BIT_SIFS_T2T_CCK_8812F(v)) 16470 16471 /* 2 REG_RESP_SIFS_OFDM_8812F (RESPONSE SIFS FOR OFDM REGISTER) */ 16472 16473 #define BIT_SHIFT_SIFS_R2T_OFDM_8812F 8 16474 #define BIT_MASK_SIFS_R2T_OFDM_8812F 0xff 16475 #define BIT_SIFS_R2T_OFDM_8812F(x) \ 16476 (((x) & BIT_MASK_SIFS_R2T_OFDM_8812F) << BIT_SHIFT_SIFS_R2T_OFDM_8812F) 16477 #define BITS_SIFS_R2T_OFDM_8812F \ 16478 (BIT_MASK_SIFS_R2T_OFDM_8812F << BIT_SHIFT_SIFS_R2T_OFDM_8812F) 16479 #define BIT_CLEAR_SIFS_R2T_OFDM_8812F(x) ((x) & (~BITS_SIFS_R2T_OFDM_8812F)) 16480 #define BIT_GET_SIFS_R2T_OFDM_8812F(x) \ 16481 (((x) >> BIT_SHIFT_SIFS_R2T_OFDM_8812F) & BIT_MASK_SIFS_R2T_OFDM_8812F) 16482 #define BIT_SET_SIFS_R2T_OFDM_8812F(x, v) \ 16483 (BIT_CLEAR_SIFS_R2T_OFDM_8812F(x) | BIT_SIFS_R2T_OFDM_8812F(v)) 16484 16485 #define BIT_SHIFT_SIFS_T2T_OFDM_8812F 0 16486 #define BIT_MASK_SIFS_T2T_OFDM_8812F 0xff 16487 #define BIT_SIFS_T2T_OFDM_8812F(x) \ 16488 (((x) & BIT_MASK_SIFS_T2T_OFDM_8812F) << BIT_SHIFT_SIFS_T2T_OFDM_8812F) 16489 #define BITS_SIFS_T2T_OFDM_8812F \ 16490 (BIT_MASK_SIFS_T2T_OFDM_8812F << BIT_SHIFT_SIFS_T2T_OFDM_8812F) 16491 #define BIT_CLEAR_SIFS_T2T_OFDM_8812F(x) ((x) & (~BITS_SIFS_T2T_OFDM_8812F)) 16492 #define BIT_GET_SIFS_T2T_OFDM_8812F(x) \ 16493 (((x) >> BIT_SHIFT_SIFS_T2T_OFDM_8812F) & BIT_MASK_SIFS_T2T_OFDM_8812F) 16494 #define BIT_SET_SIFS_T2T_OFDM_8812F(x, v) \ 16495 (BIT_CLEAR_SIFS_T2T_OFDM_8812F(x) | BIT_SIFS_T2T_OFDM_8812F(v)) 16496 16497 /* 2 REG_ACKTO_8812F (ACK TIMEOUT REGISTER) */ 16498 16499 #define BIT_SHIFT_ACKTO_8812F 0 16500 #define BIT_MASK_ACKTO_8812F 0xff 16501 #define BIT_ACKTO_8812F(x) \ 16502 (((x) & BIT_MASK_ACKTO_8812F) << BIT_SHIFT_ACKTO_8812F) 16503 #define BITS_ACKTO_8812F (BIT_MASK_ACKTO_8812F << BIT_SHIFT_ACKTO_8812F) 16504 #define BIT_CLEAR_ACKTO_8812F(x) ((x) & (~BITS_ACKTO_8812F)) 16505 #define BIT_GET_ACKTO_8812F(x) \ 16506 (((x) >> BIT_SHIFT_ACKTO_8812F) & BIT_MASK_ACKTO_8812F) 16507 #define BIT_SET_ACKTO_8812F(x, v) \ 16508 (BIT_CLEAR_ACKTO_8812F(x) | BIT_ACKTO_8812F(v)) 16509 16510 /* 2 REG_CTS2TO_8812F (CTS2 TIMEOUT REGISTER) */ 16511 16512 #define BIT_SHIFT_CTS2TO_8812F 0 16513 #define BIT_MASK_CTS2TO_8812F 0xff 16514 #define BIT_CTS2TO_8812F(x) \ 16515 (((x) & BIT_MASK_CTS2TO_8812F) << BIT_SHIFT_CTS2TO_8812F) 16516 #define BITS_CTS2TO_8812F (BIT_MASK_CTS2TO_8812F << BIT_SHIFT_CTS2TO_8812F) 16517 #define BIT_CLEAR_CTS2TO_8812F(x) ((x) & (~BITS_CTS2TO_8812F)) 16518 #define BIT_GET_CTS2TO_8812F(x) \ 16519 (((x) >> BIT_SHIFT_CTS2TO_8812F) & BIT_MASK_CTS2TO_8812F) 16520 #define BIT_SET_CTS2TO_8812F(x, v) \ 16521 (BIT_CLEAR_CTS2TO_8812F(x) | BIT_CTS2TO_8812F(v)) 16522 16523 /* 2 REG_EIFS_8812F (EIFS REGISTER) */ 16524 16525 #define BIT_SHIFT_EIFS_8812F 0 16526 #define BIT_MASK_EIFS_8812F 0xffff 16527 #define BIT_EIFS_8812F(x) (((x) & BIT_MASK_EIFS_8812F) << BIT_SHIFT_EIFS_8812F) 16528 #define BITS_EIFS_8812F (BIT_MASK_EIFS_8812F << BIT_SHIFT_EIFS_8812F) 16529 #define BIT_CLEAR_EIFS_8812F(x) ((x) & (~BITS_EIFS_8812F)) 16530 #define BIT_GET_EIFS_8812F(x) \ 16531 (((x) >> BIT_SHIFT_EIFS_8812F) & BIT_MASK_EIFS_8812F) 16532 #define BIT_SET_EIFS_8812F(x, v) (BIT_CLEAR_EIFS_8812F(x) | BIT_EIFS_8812F(v)) 16533 16534 /* 2 REG_RPFM_MAP0_8812F */ 16535 #define BIT_MGT_RPFM15EN_8812F BIT(15) 16536 #define BIT_MGT_RPFM14EN_8812F BIT(14) 16537 #define BIT_MGT_RPFM13EN_8812F BIT(13) 16538 #define BIT_MGT_RPFM12EN_8812F BIT(12) 16539 #define BIT_MGT_RPFM11EN_8812F BIT(11) 16540 #define BIT_MGT_RPFM10EN_8812F BIT(10) 16541 #define BIT_MGT_RPFM9EN_8812F BIT(9) 16542 #define BIT_MGT_RPFM8EN_8812F BIT(8) 16543 #define BIT_MGT_RPFM7EN_8812F BIT(7) 16544 #define BIT_MGT_RPFM6EN_8812F BIT(6) 16545 #define BIT_MGT_RPFM5EN_8812F BIT(5) 16546 #define BIT_MGT_RPFM4EN_8812F BIT(4) 16547 #define BIT_MGT_RPFM3EN_8812F BIT(3) 16548 #define BIT_MGT_RPFM2EN_8812F BIT(2) 16549 #define BIT_MGT_RPFM1EN_8812F BIT(1) 16550 #define BIT_MGT_RPFM0EN_8812F BIT(0) 16551 16552 /* 2 REG_RPFM_MAP1_V1_8812F */ 16553 #define BIT_DATA_RPFM15EN_8812F BIT(15) 16554 #define BIT_DATA_RPFM14EN_8812F BIT(14) 16555 #define BIT_DATA_RPFM13EN_8812F BIT(13) 16556 #define BIT_DATA_RPFM12EN_8812F BIT(12) 16557 #define BIT_DATA_RPFM11EN_8812F BIT(11) 16558 #define BIT_DATA_RPFM10EN_8812F BIT(10) 16559 #define BIT_DATA_RPFM9EN_8812F BIT(9) 16560 #define BIT_DATA_RPFM8EN_8812F BIT(8) 16561 #define BIT_DATA_RPFM7EN_8812F BIT(7) 16562 #define BIT_DATA_RPFM6EN_8812F BIT(6) 16563 #define BIT_DATA_RPFM5EN_8812F BIT(5) 16564 #define BIT_DATA_RPFM4EN_8812F BIT(4) 16565 #define BIT_DATA_RPFM3EN_8812F BIT(3) 16566 #define BIT_DATA_RPFM2EN_8812F BIT(2) 16567 #define BIT_DATA_RPFM1EN_8812F BIT(1) 16568 #define BIT_DATA_RPFM0EN_8812F BIT(0) 16569 16570 /* 2 REG_RPFM_CAM_CMD_8812F (RX PAYLOAD FRAME MASK CAM COMMAND REGISTER) */ 16571 #define BIT_RPFM_CAM_POLLING_8812F BIT(31) 16572 #define BIT_RPFM_CAM_CLR_8812F BIT(30) 16573 #define BIT_RPFM_CAM_WE_8812F BIT(16) 16574 16575 #define BIT_SHIFT_RPFM_CAM_ADDR_8812F 0 16576 #define BIT_MASK_RPFM_CAM_ADDR_8812F 0x7f 16577 #define BIT_RPFM_CAM_ADDR_8812F(x) \ 16578 (((x) & BIT_MASK_RPFM_CAM_ADDR_8812F) << BIT_SHIFT_RPFM_CAM_ADDR_8812F) 16579 #define BITS_RPFM_CAM_ADDR_8812F \ 16580 (BIT_MASK_RPFM_CAM_ADDR_8812F << BIT_SHIFT_RPFM_CAM_ADDR_8812F) 16581 #define BIT_CLEAR_RPFM_CAM_ADDR_8812F(x) ((x) & (~BITS_RPFM_CAM_ADDR_8812F)) 16582 #define BIT_GET_RPFM_CAM_ADDR_8812F(x) \ 16583 (((x) >> BIT_SHIFT_RPFM_CAM_ADDR_8812F) & BIT_MASK_RPFM_CAM_ADDR_8812F) 16584 #define BIT_SET_RPFM_CAM_ADDR_8812F(x, v) \ 16585 (BIT_CLEAR_RPFM_CAM_ADDR_8812F(x) | BIT_RPFM_CAM_ADDR_8812F(v)) 16586 16587 /* 2 REG_RPFM_CAM_RWD_8812F (ACK TIMEOUT REGISTER) */ 16588 16589 #define BIT_SHIFT_RPFM_CAM_RWD_8812F 0 16590 #define BIT_MASK_RPFM_CAM_RWD_8812F 0xffffffffL 16591 #define BIT_RPFM_CAM_RWD_8812F(x) \ 16592 (((x) & BIT_MASK_RPFM_CAM_RWD_8812F) << BIT_SHIFT_RPFM_CAM_RWD_8812F) 16593 #define BITS_RPFM_CAM_RWD_8812F \ 16594 (BIT_MASK_RPFM_CAM_RWD_8812F << BIT_SHIFT_RPFM_CAM_RWD_8812F) 16595 #define BIT_CLEAR_RPFM_CAM_RWD_8812F(x) ((x) & (~BITS_RPFM_CAM_RWD_8812F)) 16596 #define BIT_GET_RPFM_CAM_RWD_8812F(x) \ 16597 (((x) >> BIT_SHIFT_RPFM_CAM_RWD_8812F) & BIT_MASK_RPFM_CAM_RWD_8812F) 16598 #define BIT_SET_RPFM_CAM_RWD_8812F(x, v) \ 16599 (BIT_CLEAR_RPFM_CAM_RWD_8812F(x) | BIT_RPFM_CAM_RWD_8812F(v)) 16600 16601 /* 2 REG_NAV_CTRL_8812F (NAV CONTROL REGISTER) */ 16602 16603 #define BIT_SHIFT_NAV_UPPER_8812F 16 16604 #define BIT_MASK_NAV_UPPER_8812F 0xff 16605 #define BIT_NAV_UPPER_8812F(x) \ 16606 (((x) & BIT_MASK_NAV_UPPER_8812F) << BIT_SHIFT_NAV_UPPER_8812F) 16607 #define BITS_NAV_UPPER_8812F \ 16608 (BIT_MASK_NAV_UPPER_8812F << BIT_SHIFT_NAV_UPPER_8812F) 16609 #define BIT_CLEAR_NAV_UPPER_8812F(x) ((x) & (~BITS_NAV_UPPER_8812F)) 16610 #define BIT_GET_NAV_UPPER_8812F(x) \ 16611 (((x) >> BIT_SHIFT_NAV_UPPER_8812F) & BIT_MASK_NAV_UPPER_8812F) 16612 #define BIT_SET_NAV_UPPER_8812F(x, v) \ 16613 (BIT_CLEAR_NAV_UPPER_8812F(x) | BIT_NAV_UPPER_8812F(v)) 16614 16615 #define BIT_SHIFT_RXMYRTS_NAV_8812F 8 16616 #define BIT_MASK_RXMYRTS_NAV_8812F 0xf 16617 #define BIT_RXMYRTS_NAV_8812F(x) \ 16618 (((x) & BIT_MASK_RXMYRTS_NAV_8812F) << BIT_SHIFT_RXMYRTS_NAV_8812F) 16619 #define BITS_RXMYRTS_NAV_8812F \ 16620 (BIT_MASK_RXMYRTS_NAV_8812F << BIT_SHIFT_RXMYRTS_NAV_8812F) 16621 #define BIT_CLEAR_RXMYRTS_NAV_8812F(x) ((x) & (~BITS_RXMYRTS_NAV_8812F)) 16622 #define BIT_GET_RXMYRTS_NAV_8812F(x) \ 16623 (((x) >> BIT_SHIFT_RXMYRTS_NAV_8812F) & BIT_MASK_RXMYRTS_NAV_8812F) 16624 #define BIT_SET_RXMYRTS_NAV_8812F(x, v) \ 16625 (BIT_CLEAR_RXMYRTS_NAV_8812F(x) | BIT_RXMYRTS_NAV_8812F(v)) 16626 16627 #define BIT_SHIFT_RTSRST_8812F 0 16628 #define BIT_MASK_RTSRST_8812F 0xff 16629 #define BIT_RTSRST_8812F(x) \ 16630 (((x) & BIT_MASK_RTSRST_8812F) << BIT_SHIFT_RTSRST_8812F) 16631 #define BITS_RTSRST_8812F (BIT_MASK_RTSRST_8812F << BIT_SHIFT_RTSRST_8812F) 16632 #define BIT_CLEAR_RTSRST_8812F(x) ((x) & (~BITS_RTSRST_8812F)) 16633 #define BIT_GET_RTSRST_8812F(x) \ 16634 (((x) >> BIT_SHIFT_RTSRST_8812F) & BIT_MASK_RTSRST_8812F) 16635 #define BIT_SET_RTSRST_8812F(x, v) \ 16636 (BIT_CLEAR_RTSRST_8812F(x) | BIT_RTSRST_8812F(v)) 16637 16638 /* 2 REG_BACAMCMD_8812F (BLOCK ACK CAM COMMAND REGISTER) */ 16639 #define BIT_BACAM_POLL_8812F BIT(31) 16640 #define BIT_BACAM_RST_8812F BIT(17) 16641 #define BIT_BACAM_RW_8812F BIT(16) 16642 16643 #define BIT_SHIFT_TXSBM_8812F 14 16644 #define BIT_MASK_TXSBM_8812F 0x3 16645 #define BIT_TXSBM_8812F(x) \ 16646 (((x) & BIT_MASK_TXSBM_8812F) << BIT_SHIFT_TXSBM_8812F) 16647 #define BITS_TXSBM_8812F (BIT_MASK_TXSBM_8812F << BIT_SHIFT_TXSBM_8812F) 16648 #define BIT_CLEAR_TXSBM_8812F(x) ((x) & (~BITS_TXSBM_8812F)) 16649 #define BIT_GET_TXSBM_8812F(x) \ 16650 (((x) >> BIT_SHIFT_TXSBM_8812F) & BIT_MASK_TXSBM_8812F) 16651 #define BIT_SET_TXSBM_8812F(x, v) \ 16652 (BIT_CLEAR_TXSBM_8812F(x) | BIT_TXSBM_8812F(v)) 16653 16654 #define BIT_SHIFT_BACAM_ADDR_8812F 0 16655 #define BIT_MASK_BACAM_ADDR_8812F 0x3f 16656 #define BIT_BACAM_ADDR_8812F(x) \ 16657 (((x) & BIT_MASK_BACAM_ADDR_8812F) << BIT_SHIFT_BACAM_ADDR_8812F) 16658 #define BITS_BACAM_ADDR_8812F \ 16659 (BIT_MASK_BACAM_ADDR_8812F << BIT_SHIFT_BACAM_ADDR_8812F) 16660 #define BIT_CLEAR_BACAM_ADDR_8812F(x) ((x) & (~BITS_BACAM_ADDR_8812F)) 16661 #define BIT_GET_BACAM_ADDR_8812F(x) \ 16662 (((x) >> BIT_SHIFT_BACAM_ADDR_8812F) & BIT_MASK_BACAM_ADDR_8812F) 16663 #define BIT_SET_BACAM_ADDR_8812F(x, v) \ 16664 (BIT_CLEAR_BACAM_ADDR_8812F(x) | BIT_BACAM_ADDR_8812F(v)) 16665 16666 /* 2 REG_BACAMCONTENT_8812F (BLOCK ACK CAM CONTENT REGISTER) */ 16667 16668 #define BIT_SHIFT_BA_CONTENT_L_8812F 0 16669 #define BIT_MASK_BA_CONTENT_L_8812F 0xffffffffL 16670 #define BIT_BA_CONTENT_L_8812F(x) \ 16671 (((x) & BIT_MASK_BA_CONTENT_L_8812F) << BIT_SHIFT_BA_CONTENT_L_8812F) 16672 #define BITS_BA_CONTENT_L_8812F \ 16673 (BIT_MASK_BA_CONTENT_L_8812F << BIT_SHIFT_BA_CONTENT_L_8812F) 16674 #define BIT_CLEAR_BA_CONTENT_L_8812F(x) ((x) & (~BITS_BA_CONTENT_L_8812F)) 16675 #define BIT_GET_BA_CONTENT_L_8812F(x) \ 16676 (((x) >> BIT_SHIFT_BA_CONTENT_L_8812F) & BIT_MASK_BA_CONTENT_L_8812F) 16677 #define BIT_SET_BA_CONTENT_L_8812F(x, v) \ 16678 (BIT_CLEAR_BA_CONTENT_L_8812F(x) | BIT_BA_CONTENT_L_8812F(v)) 16679 16680 /* 2 REG_BACAMCONTENT_H_8812F (BLOCK ACK CAM CONTENT REGISTER) */ 16681 16682 #define BIT_SHIFT_BA_CONTENT_H_8812F 0 16683 #define BIT_MASK_BA_CONTENT_H_8812F 0xffffffffL 16684 #define BIT_BA_CONTENT_H_8812F(x) \ 16685 (((x) & BIT_MASK_BA_CONTENT_H_8812F) << BIT_SHIFT_BA_CONTENT_H_8812F) 16686 #define BITS_BA_CONTENT_H_8812F \ 16687 (BIT_MASK_BA_CONTENT_H_8812F << BIT_SHIFT_BA_CONTENT_H_8812F) 16688 #define BIT_CLEAR_BA_CONTENT_H_8812F(x) ((x) & (~BITS_BA_CONTENT_H_8812F)) 16689 #define BIT_GET_BA_CONTENT_H_8812F(x) \ 16690 (((x) >> BIT_SHIFT_BA_CONTENT_H_8812F) & BIT_MASK_BA_CONTENT_H_8812F) 16691 #define BIT_SET_BA_CONTENT_H_8812F(x, v) \ 16692 (BIT_CLEAR_BA_CONTENT_H_8812F(x) | BIT_BA_CONTENT_H_8812F(v)) 16693 16694 /* 2 REG_LBDLY_8812F (LOOPBACK DELAY REGISTER) */ 16695 16696 #define BIT_SHIFT_LBDLY_8812F 0 16697 #define BIT_MASK_LBDLY_8812F 0x1f 16698 #define BIT_LBDLY_8812F(x) \ 16699 (((x) & BIT_MASK_LBDLY_8812F) << BIT_SHIFT_LBDLY_8812F) 16700 #define BITS_LBDLY_8812F (BIT_MASK_LBDLY_8812F << BIT_SHIFT_LBDLY_8812F) 16701 #define BIT_CLEAR_LBDLY_8812F(x) ((x) & (~BITS_LBDLY_8812F)) 16702 #define BIT_GET_LBDLY_8812F(x) \ 16703 (((x) >> BIT_SHIFT_LBDLY_8812F) & BIT_MASK_LBDLY_8812F) 16704 #define BIT_SET_LBDLY_8812F(x, v) \ 16705 (BIT_CLEAR_LBDLY_8812F(x) | BIT_LBDLY_8812F(v)) 16706 16707 /* 2 REG_WMAC_BACAM_RPMEN_8812F */ 16708 16709 #define BIT_SHIFT_BITMAP_SSNBK_COUNTER_8812F 2 16710 #define BIT_MASK_BITMAP_SSNBK_COUNTER_8812F 0x3f 16711 #define BIT_BITMAP_SSNBK_COUNTER_8812F(x) \ 16712 (((x) & BIT_MASK_BITMAP_SSNBK_COUNTER_8812F) \ 16713 << BIT_SHIFT_BITMAP_SSNBK_COUNTER_8812F) 16714 #define BITS_BITMAP_SSNBK_COUNTER_8812F \ 16715 (BIT_MASK_BITMAP_SSNBK_COUNTER_8812F \ 16716 << BIT_SHIFT_BITMAP_SSNBK_COUNTER_8812F) 16717 #define BIT_CLEAR_BITMAP_SSNBK_COUNTER_8812F(x) \ 16718 ((x) & (~BITS_BITMAP_SSNBK_COUNTER_8812F)) 16719 #define BIT_GET_BITMAP_SSNBK_COUNTER_8812F(x) \ 16720 (((x) >> BIT_SHIFT_BITMAP_SSNBK_COUNTER_8812F) & \ 16721 BIT_MASK_BITMAP_SSNBK_COUNTER_8812F) 16722 #define BIT_SET_BITMAP_SSNBK_COUNTER_8812F(x, v) \ 16723 (BIT_CLEAR_BITMAP_SSNBK_COUNTER_8812F(x) | \ 16724 BIT_BITMAP_SSNBK_COUNTER_8812F(v)) 16725 16726 #define BIT_BITMAP_EN_8812F BIT(1) 16727 #define BIT_WMAC_BACAM_RPMEN_8812F BIT(0) 16728 16729 /* 2 REG_TX_RX_8812F STATUS */ 16730 16731 #define BIT_SHIFT_RXPKT_TYPE_8812F 2 16732 #define BIT_MASK_RXPKT_TYPE_8812F 0x3f 16733 #define BIT_RXPKT_TYPE_8812F(x) \ 16734 (((x) & BIT_MASK_RXPKT_TYPE_8812F) << BIT_SHIFT_RXPKT_TYPE_8812F) 16735 #define BITS_RXPKT_TYPE_8812F \ 16736 (BIT_MASK_RXPKT_TYPE_8812F << BIT_SHIFT_RXPKT_TYPE_8812F) 16737 #define BIT_CLEAR_RXPKT_TYPE_8812F(x) ((x) & (~BITS_RXPKT_TYPE_8812F)) 16738 #define BIT_GET_RXPKT_TYPE_8812F(x) \ 16739 (((x) >> BIT_SHIFT_RXPKT_TYPE_8812F) & BIT_MASK_RXPKT_TYPE_8812F) 16740 #define BIT_SET_RXPKT_TYPE_8812F(x, v) \ 16741 (BIT_CLEAR_RXPKT_TYPE_8812F(x) | BIT_RXPKT_TYPE_8812F(v)) 16742 16743 #define BIT_TXACT_IND_8812F BIT(1) 16744 #define BIT_RXACT_IND_8812F BIT(0) 16745 16746 /* 2 REG_WMAC_BITMAP_CTL_8812F */ 16747 #define BIT_BITMAP_VO_8812F BIT(7) 16748 #define BIT_BITMAP_VI_8812F BIT(6) 16749 #define BIT_BITMAP_BE_8812F BIT(5) 16750 #define BIT_BITMAP_BK_8812F BIT(4) 16751 16752 #define BIT_SHIFT_BITMAP_CONDITION_8812F 2 16753 #define BIT_MASK_BITMAP_CONDITION_8812F 0x3 16754 #define BIT_BITMAP_CONDITION_8812F(x) \ 16755 (((x) & BIT_MASK_BITMAP_CONDITION_8812F) \ 16756 << BIT_SHIFT_BITMAP_CONDITION_8812F) 16757 #define BITS_BITMAP_CONDITION_8812F \ 16758 (BIT_MASK_BITMAP_CONDITION_8812F << BIT_SHIFT_BITMAP_CONDITION_8812F) 16759 #define BIT_CLEAR_BITMAP_CONDITION_8812F(x) \ 16760 ((x) & (~BITS_BITMAP_CONDITION_8812F)) 16761 #define BIT_GET_BITMAP_CONDITION_8812F(x) \ 16762 (((x) >> BIT_SHIFT_BITMAP_CONDITION_8812F) & \ 16763 BIT_MASK_BITMAP_CONDITION_8812F) 16764 #define BIT_SET_BITMAP_CONDITION_8812F(x, v) \ 16765 (BIT_CLEAR_BITMAP_CONDITION_8812F(x) | BIT_BITMAP_CONDITION_8812F(v)) 16766 16767 #define BIT_BITMAP_SSNBK_COUNTER_CLR_8812F BIT(1) 16768 #define BIT_BITMAP_FORCE_8812F BIT(0) 16769 16770 /* 2 REG_RXERR_RPT_8812F (RX ERROR REPORT REGISTER) */ 16771 16772 #define BIT_SHIFT_RXERR_RPT_SEL_V1_3_0_8812F 28 16773 #define BIT_MASK_RXERR_RPT_SEL_V1_3_0_8812F 0xf 16774 #define BIT_RXERR_RPT_SEL_V1_3_0_8812F(x) \ 16775 (((x) & BIT_MASK_RXERR_RPT_SEL_V1_3_0_8812F) \ 16776 << BIT_SHIFT_RXERR_RPT_SEL_V1_3_0_8812F) 16777 #define BITS_RXERR_RPT_SEL_V1_3_0_8812F \ 16778 (BIT_MASK_RXERR_RPT_SEL_V1_3_0_8812F \ 16779 << BIT_SHIFT_RXERR_RPT_SEL_V1_3_0_8812F) 16780 #define BIT_CLEAR_RXERR_RPT_SEL_V1_3_0_8812F(x) \ 16781 ((x) & (~BITS_RXERR_RPT_SEL_V1_3_0_8812F)) 16782 #define BIT_GET_RXERR_RPT_SEL_V1_3_0_8812F(x) \ 16783 (((x) >> BIT_SHIFT_RXERR_RPT_SEL_V1_3_0_8812F) & \ 16784 BIT_MASK_RXERR_RPT_SEL_V1_3_0_8812F) 16785 #define BIT_SET_RXERR_RPT_SEL_V1_3_0_8812F(x, v) \ 16786 (BIT_CLEAR_RXERR_RPT_SEL_V1_3_0_8812F(x) | \ 16787 BIT_RXERR_RPT_SEL_V1_3_0_8812F(v)) 16788 16789 #define BIT_RXERR_RPT_RST_8812F BIT(27) 16790 #define BIT_RXERR_RPT_SEL_V1_4_8812F BIT(26) 16791 16792 #define BIT_SHIFT_UD_SELECT_BSSID_2_1_8812F 24 16793 #define BIT_MASK_UD_SELECT_BSSID_2_1_8812F 0x3 16794 #define BIT_UD_SELECT_BSSID_2_1_8812F(x) \ 16795 (((x) & BIT_MASK_UD_SELECT_BSSID_2_1_8812F) \ 16796 << BIT_SHIFT_UD_SELECT_BSSID_2_1_8812F) 16797 #define BITS_UD_SELECT_BSSID_2_1_8812F \ 16798 (BIT_MASK_UD_SELECT_BSSID_2_1_8812F \ 16799 << BIT_SHIFT_UD_SELECT_BSSID_2_1_8812F) 16800 #define BIT_CLEAR_UD_SELECT_BSSID_2_1_8812F(x) \ 16801 ((x) & (~BITS_UD_SELECT_BSSID_2_1_8812F)) 16802 #define BIT_GET_UD_SELECT_BSSID_2_1_8812F(x) \ 16803 (((x) >> BIT_SHIFT_UD_SELECT_BSSID_2_1_8812F) & \ 16804 BIT_MASK_UD_SELECT_BSSID_2_1_8812F) 16805 #define BIT_SET_UD_SELECT_BSSID_2_1_8812F(x, v) \ 16806 (BIT_CLEAR_UD_SELECT_BSSID_2_1_8812F(x) | \ 16807 BIT_UD_SELECT_BSSID_2_1_8812F(v)) 16808 16809 #define BIT_W1S_8812F BIT(23) 16810 #define BIT_UD_SELECT_BSSID_0_8812F BIT(22) 16811 16812 #define BIT_SHIFT_UD_SUB_TYPE_8812F 18 16813 #define BIT_MASK_UD_SUB_TYPE_8812F 0xf 16814 #define BIT_UD_SUB_TYPE_8812F(x) \ 16815 (((x) & BIT_MASK_UD_SUB_TYPE_8812F) << BIT_SHIFT_UD_SUB_TYPE_8812F) 16816 #define BITS_UD_SUB_TYPE_8812F \ 16817 (BIT_MASK_UD_SUB_TYPE_8812F << BIT_SHIFT_UD_SUB_TYPE_8812F) 16818 #define BIT_CLEAR_UD_SUB_TYPE_8812F(x) ((x) & (~BITS_UD_SUB_TYPE_8812F)) 16819 #define BIT_GET_UD_SUB_TYPE_8812F(x) \ 16820 (((x) >> BIT_SHIFT_UD_SUB_TYPE_8812F) & BIT_MASK_UD_SUB_TYPE_8812F) 16821 #define BIT_SET_UD_SUB_TYPE_8812F(x, v) \ 16822 (BIT_CLEAR_UD_SUB_TYPE_8812F(x) | BIT_UD_SUB_TYPE_8812F(v)) 16823 16824 #define BIT_SHIFT_UD_TYPE_8812F 16 16825 #define BIT_MASK_UD_TYPE_8812F 0x3 16826 #define BIT_UD_TYPE_8812F(x) \ 16827 (((x) & BIT_MASK_UD_TYPE_8812F) << BIT_SHIFT_UD_TYPE_8812F) 16828 #define BITS_UD_TYPE_8812F (BIT_MASK_UD_TYPE_8812F << BIT_SHIFT_UD_TYPE_8812F) 16829 #define BIT_CLEAR_UD_TYPE_8812F(x) ((x) & (~BITS_UD_TYPE_8812F)) 16830 #define BIT_GET_UD_TYPE_8812F(x) \ 16831 (((x) >> BIT_SHIFT_UD_TYPE_8812F) & BIT_MASK_UD_TYPE_8812F) 16832 #define BIT_SET_UD_TYPE_8812F(x, v) \ 16833 (BIT_CLEAR_UD_TYPE_8812F(x) | BIT_UD_TYPE_8812F(v)) 16834 16835 #define BIT_SHIFT_RPT_COUNTER_8812F 0 16836 #define BIT_MASK_RPT_COUNTER_8812F 0xffff 16837 #define BIT_RPT_COUNTER_8812F(x) \ 16838 (((x) & BIT_MASK_RPT_COUNTER_8812F) << BIT_SHIFT_RPT_COUNTER_8812F) 16839 #define BITS_RPT_COUNTER_8812F \ 16840 (BIT_MASK_RPT_COUNTER_8812F << BIT_SHIFT_RPT_COUNTER_8812F) 16841 #define BIT_CLEAR_RPT_COUNTER_8812F(x) ((x) & (~BITS_RPT_COUNTER_8812F)) 16842 #define BIT_GET_RPT_COUNTER_8812F(x) \ 16843 (((x) >> BIT_SHIFT_RPT_COUNTER_8812F) & BIT_MASK_RPT_COUNTER_8812F) 16844 #define BIT_SET_RPT_COUNTER_8812F(x, v) \ 16845 (BIT_CLEAR_RPT_COUNTER_8812F(x) | BIT_RPT_COUNTER_8812F(v)) 16846 16847 /* 2 REG_WMAC_TRXPTCL_CTL_8812F (WMAC TX/RX PROTOCOL CONTROL REGISTER) */ 16848 #define BIT_ACKTO_BLOCK_SCH_EN_8812F BIT(27) 16849 #define BIT_EIFS_BLOCK_SCH_EN_8812F BIT(26) 16850 #define BIT_PLCPCHK_RST_EIFS_8812F BIT(25) 16851 #define BIT_CCA_RST_EIFS_8812F BIT(24) 16852 #define BIT_DIS_UPD_MYRXPKTNAV_8812F BIT(23) 16853 #define BIT_EARLY_TXBA_8812F BIT(22) 16854 16855 #define BIT_SHIFT_RESP_CHNBUSY_8812F 20 16856 #define BIT_MASK_RESP_CHNBUSY_8812F 0x3 16857 #define BIT_RESP_CHNBUSY_8812F(x) \ 16858 (((x) & BIT_MASK_RESP_CHNBUSY_8812F) << BIT_SHIFT_RESP_CHNBUSY_8812F) 16859 #define BITS_RESP_CHNBUSY_8812F \ 16860 (BIT_MASK_RESP_CHNBUSY_8812F << BIT_SHIFT_RESP_CHNBUSY_8812F) 16861 #define BIT_CLEAR_RESP_CHNBUSY_8812F(x) ((x) & (~BITS_RESP_CHNBUSY_8812F)) 16862 #define BIT_GET_RESP_CHNBUSY_8812F(x) \ 16863 (((x) >> BIT_SHIFT_RESP_CHNBUSY_8812F) & BIT_MASK_RESP_CHNBUSY_8812F) 16864 #define BIT_SET_RESP_CHNBUSY_8812F(x, v) \ 16865 (BIT_CLEAR_RESP_CHNBUSY_8812F(x) | BIT_RESP_CHNBUSY_8812F(v)) 16866 16867 #define BIT_RESP_DCTS_EN_8812F BIT(19) 16868 #define BIT_RESP_DCFE_EN_8812F BIT(18) 16869 #define BIT_RESP_SPLCPEN_8812F BIT(17) 16870 #define BIT_RESP_SGIEN_8812F BIT(16) 16871 #define BIT_RESP_LDPC_EN_8812F BIT(15) 16872 #define BIT_DIS_RESP_ACKINCCA_8812F BIT(14) 16873 #define BIT_DIS_RESP_CTSINCCA_8812F BIT(13) 16874 16875 #define BIT_SHIFT_R_WMAC_SECOND_CCA_TIMER_8812F 10 16876 #define BIT_MASK_R_WMAC_SECOND_CCA_TIMER_8812F 0x7 16877 #define BIT_R_WMAC_SECOND_CCA_TIMER_8812F(x) \ 16878 (((x) & BIT_MASK_R_WMAC_SECOND_CCA_TIMER_8812F) \ 16879 << BIT_SHIFT_R_WMAC_SECOND_CCA_TIMER_8812F) 16880 #define BITS_R_WMAC_SECOND_CCA_TIMER_8812F \ 16881 (BIT_MASK_R_WMAC_SECOND_CCA_TIMER_8812F \ 16882 << BIT_SHIFT_R_WMAC_SECOND_CCA_TIMER_8812F) 16883 #define BIT_CLEAR_R_WMAC_SECOND_CCA_TIMER_8812F(x) \ 16884 ((x) & (~BITS_R_WMAC_SECOND_CCA_TIMER_8812F)) 16885 #define BIT_GET_R_WMAC_SECOND_CCA_TIMER_8812F(x) \ 16886 (((x) >> BIT_SHIFT_R_WMAC_SECOND_CCA_TIMER_8812F) & \ 16887 BIT_MASK_R_WMAC_SECOND_CCA_TIMER_8812F) 16888 #define BIT_SET_R_WMAC_SECOND_CCA_TIMER_8812F(x, v) \ 16889 (BIT_CLEAR_R_WMAC_SECOND_CCA_TIMER_8812F(x) | \ 16890 BIT_R_WMAC_SECOND_CCA_TIMER_8812F(v)) 16891 16892 #define BIT_SHIFT_RFMOD_8812F 7 16893 #define BIT_MASK_RFMOD_8812F 0x3 16894 #define BIT_RFMOD_8812F(x) \ 16895 (((x) & BIT_MASK_RFMOD_8812F) << BIT_SHIFT_RFMOD_8812F) 16896 #define BITS_RFMOD_8812F (BIT_MASK_RFMOD_8812F << BIT_SHIFT_RFMOD_8812F) 16897 #define BIT_CLEAR_RFMOD_8812F(x) ((x) & (~BITS_RFMOD_8812F)) 16898 #define BIT_GET_RFMOD_8812F(x) \ 16899 (((x) >> BIT_SHIFT_RFMOD_8812F) & BIT_MASK_RFMOD_8812F) 16900 #define BIT_SET_RFMOD_8812F(x, v) \ 16901 (BIT_CLEAR_RFMOD_8812F(x) | BIT_RFMOD_8812F(v)) 16902 16903 #define BIT_SHIFT_RESP_CTS_DYNBW_SEL_8812F 5 16904 #define BIT_MASK_RESP_CTS_DYNBW_SEL_8812F 0x3 16905 #define BIT_RESP_CTS_DYNBW_SEL_8812F(x) \ 16906 (((x) & BIT_MASK_RESP_CTS_DYNBW_SEL_8812F) \ 16907 << BIT_SHIFT_RESP_CTS_DYNBW_SEL_8812F) 16908 #define BITS_RESP_CTS_DYNBW_SEL_8812F \ 16909 (BIT_MASK_RESP_CTS_DYNBW_SEL_8812F \ 16910 << BIT_SHIFT_RESP_CTS_DYNBW_SEL_8812F) 16911 #define BIT_CLEAR_RESP_CTS_DYNBW_SEL_8812F(x) \ 16912 ((x) & (~BITS_RESP_CTS_DYNBW_SEL_8812F)) 16913 #define BIT_GET_RESP_CTS_DYNBW_SEL_8812F(x) \ 16914 (((x) >> BIT_SHIFT_RESP_CTS_DYNBW_SEL_8812F) & \ 16915 BIT_MASK_RESP_CTS_DYNBW_SEL_8812F) 16916 #define BIT_SET_RESP_CTS_DYNBW_SEL_8812F(x, v) \ 16917 (BIT_CLEAR_RESP_CTS_DYNBW_SEL_8812F(x) | \ 16918 BIT_RESP_CTS_DYNBW_SEL_8812F(v)) 16919 16920 #define BIT_DLY_TX_WAIT_RXANTSEL_8812F BIT(4) 16921 #define BIT_TXRESP_BY_RXANTSEL_8812F BIT(3) 16922 16923 #define BIT_SHIFT_ORIG_DCTS_CHK_8812F 0 16924 #define BIT_MASK_ORIG_DCTS_CHK_8812F 0x3 16925 #define BIT_ORIG_DCTS_CHK_8812F(x) \ 16926 (((x) & BIT_MASK_ORIG_DCTS_CHK_8812F) << BIT_SHIFT_ORIG_DCTS_CHK_8812F) 16927 #define BITS_ORIG_DCTS_CHK_8812F \ 16928 (BIT_MASK_ORIG_DCTS_CHK_8812F << BIT_SHIFT_ORIG_DCTS_CHK_8812F) 16929 #define BIT_CLEAR_ORIG_DCTS_CHK_8812F(x) ((x) & (~BITS_ORIG_DCTS_CHK_8812F)) 16930 #define BIT_GET_ORIG_DCTS_CHK_8812F(x) \ 16931 (((x) >> BIT_SHIFT_ORIG_DCTS_CHK_8812F) & BIT_MASK_ORIG_DCTS_CHK_8812F) 16932 #define BIT_SET_ORIG_DCTS_CHK_8812F(x, v) \ 16933 (BIT_CLEAR_ORIG_DCTS_CHK_8812F(x) | BIT_ORIG_DCTS_CHK_8812F(v)) 16934 16935 /* 2 REG_WMAC_TRXPTCL_CTL_H_8812F */ 16936 16937 #define BIT_SHIFT_ACKBA_TYPSEL_8812F 28 16938 #define BIT_MASK_ACKBA_TYPSEL_8812F 0xf 16939 #define BIT_ACKBA_TYPSEL_8812F(x) \ 16940 (((x) & BIT_MASK_ACKBA_TYPSEL_8812F) << BIT_SHIFT_ACKBA_TYPSEL_8812F) 16941 #define BITS_ACKBA_TYPSEL_8812F \ 16942 (BIT_MASK_ACKBA_TYPSEL_8812F << BIT_SHIFT_ACKBA_TYPSEL_8812F) 16943 #define BIT_CLEAR_ACKBA_TYPSEL_8812F(x) ((x) & (~BITS_ACKBA_TYPSEL_8812F)) 16944 #define BIT_GET_ACKBA_TYPSEL_8812F(x) \ 16945 (((x) >> BIT_SHIFT_ACKBA_TYPSEL_8812F) & BIT_MASK_ACKBA_TYPSEL_8812F) 16946 #define BIT_SET_ACKBA_TYPSEL_8812F(x, v) \ 16947 (BIT_CLEAR_ACKBA_TYPSEL_8812F(x) | BIT_ACKBA_TYPSEL_8812F(v)) 16948 16949 #define BIT_SHIFT_ACKBA_ACKPCHK_8812F 24 16950 #define BIT_MASK_ACKBA_ACKPCHK_8812F 0xf 16951 #define BIT_ACKBA_ACKPCHK_8812F(x) \ 16952 (((x) & BIT_MASK_ACKBA_ACKPCHK_8812F) << BIT_SHIFT_ACKBA_ACKPCHK_8812F) 16953 #define BITS_ACKBA_ACKPCHK_8812F \ 16954 (BIT_MASK_ACKBA_ACKPCHK_8812F << BIT_SHIFT_ACKBA_ACKPCHK_8812F) 16955 #define BIT_CLEAR_ACKBA_ACKPCHK_8812F(x) ((x) & (~BITS_ACKBA_ACKPCHK_8812F)) 16956 #define BIT_GET_ACKBA_ACKPCHK_8812F(x) \ 16957 (((x) >> BIT_SHIFT_ACKBA_ACKPCHK_8812F) & BIT_MASK_ACKBA_ACKPCHK_8812F) 16958 #define BIT_SET_ACKBA_ACKPCHK_8812F(x, v) \ 16959 (BIT_CLEAR_ACKBA_ACKPCHK_8812F(x) | BIT_ACKBA_ACKPCHK_8812F(v)) 16960 16961 #define BIT_SHIFT_ACKBAR_TYPESEL_8812F 16 16962 #define BIT_MASK_ACKBAR_TYPESEL_8812F 0xff 16963 #define BIT_ACKBAR_TYPESEL_8812F(x) \ 16964 (((x) & BIT_MASK_ACKBAR_TYPESEL_8812F) \ 16965 << BIT_SHIFT_ACKBAR_TYPESEL_8812F) 16966 #define BITS_ACKBAR_TYPESEL_8812F \ 16967 (BIT_MASK_ACKBAR_TYPESEL_8812F << BIT_SHIFT_ACKBAR_TYPESEL_8812F) 16968 #define BIT_CLEAR_ACKBAR_TYPESEL_8812F(x) ((x) & (~BITS_ACKBAR_TYPESEL_8812F)) 16969 #define BIT_GET_ACKBAR_TYPESEL_8812F(x) \ 16970 (((x) >> BIT_SHIFT_ACKBAR_TYPESEL_8812F) & \ 16971 BIT_MASK_ACKBAR_TYPESEL_8812F) 16972 #define BIT_SET_ACKBAR_TYPESEL_8812F(x, v) \ 16973 (BIT_CLEAR_ACKBAR_TYPESEL_8812F(x) | BIT_ACKBAR_TYPESEL_8812F(v)) 16974 16975 #define BIT_SHIFT_ACKBAR_ACKPCHK_8812F 12 16976 #define BIT_MASK_ACKBAR_ACKPCHK_8812F 0xf 16977 #define BIT_ACKBAR_ACKPCHK_8812F(x) \ 16978 (((x) & BIT_MASK_ACKBAR_ACKPCHK_8812F) \ 16979 << BIT_SHIFT_ACKBAR_ACKPCHK_8812F) 16980 #define BITS_ACKBAR_ACKPCHK_8812F \ 16981 (BIT_MASK_ACKBAR_ACKPCHK_8812F << BIT_SHIFT_ACKBAR_ACKPCHK_8812F) 16982 #define BIT_CLEAR_ACKBAR_ACKPCHK_8812F(x) ((x) & (~BITS_ACKBAR_ACKPCHK_8812F)) 16983 #define BIT_GET_ACKBAR_ACKPCHK_8812F(x) \ 16984 (((x) >> BIT_SHIFT_ACKBAR_ACKPCHK_8812F) & \ 16985 BIT_MASK_ACKBAR_ACKPCHK_8812F) 16986 #define BIT_SET_ACKBAR_ACKPCHK_8812F(x, v) \ 16987 (BIT_CLEAR_ACKBAR_ACKPCHK_8812F(x) | BIT_ACKBAR_ACKPCHK_8812F(v)) 16988 16989 #define BIT_RXBA_IGNOREA2_V1_8812F BIT(10) 16990 #define BIT_EN_SAVE_ALL_TXOPADDR_V1_8812F BIT(9) 16991 #define BIT_EN_TXCTS_TO_TXOPOWNER_INRXNAV_V1_8812F BIT(8) 16992 #define BIT_DIS_TXBA_AMPDUFCSERR_V1_8812F BIT(7) 16993 #define BIT_DIS_TXBA_RXBARINFULL_V1_8812F BIT(6) 16994 #define BIT_DIS_TXCFE_INFULL_V1_8812F BIT(5) 16995 #define BIT_DIS_TXCTS_INFULL_V1_8812F BIT(4) 16996 #define BIT_EN_TXACKBA_IN_TX_RDG_V1_8812F BIT(3) 16997 #define BIT_EN_TXACKBA_IN_TXOP_V1_8812F BIT(2) 16998 #define BIT_EN_TXCTS_IN_RXNAV_V1_8812F BIT(1) 16999 #define BIT_EN_TXCTS_INTXOP_V1_8812F BIT(0) 17000 17001 /* 2 REG_CAMCMD_8812F (CAM COMMAND REGISTER) */ 17002 #define BIT_SECCAM_POLLING_8812F BIT(31) 17003 #define BIT_SECCAM_CLR_8812F BIT(30) 17004 #define BIT_SECCAM_WE_8812F BIT(16) 17005 17006 #define BIT_SHIFT_SECCAM_ADDR_V2_8812F 0 17007 #define BIT_MASK_SECCAM_ADDR_V2_8812F 0x3ff 17008 #define BIT_SECCAM_ADDR_V2_8812F(x) \ 17009 (((x) & BIT_MASK_SECCAM_ADDR_V2_8812F) \ 17010 << BIT_SHIFT_SECCAM_ADDR_V2_8812F) 17011 #define BITS_SECCAM_ADDR_V2_8812F \ 17012 (BIT_MASK_SECCAM_ADDR_V2_8812F << BIT_SHIFT_SECCAM_ADDR_V2_8812F) 17013 #define BIT_CLEAR_SECCAM_ADDR_V2_8812F(x) ((x) & (~BITS_SECCAM_ADDR_V2_8812F)) 17014 #define BIT_GET_SECCAM_ADDR_V2_8812F(x) \ 17015 (((x) >> BIT_SHIFT_SECCAM_ADDR_V2_8812F) & \ 17016 BIT_MASK_SECCAM_ADDR_V2_8812F) 17017 #define BIT_SET_SECCAM_ADDR_V2_8812F(x, v) \ 17018 (BIT_CLEAR_SECCAM_ADDR_V2_8812F(x) | BIT_SECCAM_ADDR_V2_8812F(v)) 17019 17020 /* 2 REG_CAMWRITE_8812F (CAM WRITE REGISTER) */ 17021 17022 #define BIT_SHIFT_CAMW_DATA_8812F 0 17023 #define BIT_MASK_CAMW_DATA_8812F 0xffffffffL 17024 #define BIT_CAMW_DATA_8812F(x) \ 17025 (((x) & BIT_MASK_CAMW_DATA_8812F) << BIT_SHIFT_CAMW_DATA_8812F) 17026 #define BITS_CAMW_DATA_8812F \ 17027 (BIT_MASK_CAMW_DATA_8812F << BIT_SHIFT_CAMW_DATA_8812F) 17028 #define BIT_CLEAR_CAMW_DATA_8812F(x) ((x) & (~BITS_CAMW_DATA_8812F)) 17029 #define BIT_GET_CAMW_DATA_8812F(x) \ 17030 (((x) >> BIT_SHIFT_CAMW_DATA_8812F) & BIT_MASK_CAMW_DATA_8812F) 17031 #define BIT_SET_CAMW_DATA_8812F(x, v) \ 17032 (BIT_CLEAR_CAMW_DATA_8812F(x) | BIT_CAMW_DATA_8812F(v)) 17033 17034 /* 2 REG_CAMREAD_8812F (CAM READ REGISTER) */ 17035 17036 #define BIT_SHIFT_CAMR_DATA_8812F 0 17037 #define BIT_MASK_CAMR_DATA_8812F 0xffffffffL 17038 #define BIT_CAMR_DATA_8812F(x) \ 17039 (((x) & BIT_MASK_CAMR_DATA_8812F) << BIT_SHIFT_CAMR_DATA_8812F) 17040 #define BITS_CAMR_DATA_8812F \ 17041 (BIT_MASK_CAMR_DATA_8812F << BIT_SHIFT_CAMR_DATA_8812F) 17042 #define BIT_CLEAR_CAMR_DATA_8812F(x) ((x) & (~BITS_CAMR_DATA_8812F)) 17043 #define BIT_GET_CAMR_DATA_8812F(x) \ 17044 (((x) >> BIT_SHIFT_CAMR_DATA_8812F) & BIT_MASK_CAMR_DATA_8812F) 17045 #define BIT_SET_CAMR_DATA_8812F(x, v) \ 17046 (BIT_CLEAR_CAMR_DATA_8812F(x) | BIT_CAMR_DATA_8812F(v)) 17047 17048 /* 2 REG_CAMDBG_8812F (CAM DEBUG REGISTER) */ 17049 #define BIT_SECCAM_INFO_8812F BIT(31) 17050 #define BIT_SEC_KEYFOUND_8812F BIT(15) 17051 17052 #define BIT_SHIFT_CAMDBG_SEC_TYPE_8812F 12 17053 #define BIT_MASK_CAMDBG_SEC_TYPE_8812F 0x7 17054 #define BIT_CAMDBG_SEC_TYPE_8812F(x) \ 17055 (((x) & BIT_MASK_CAMDBG_SEC_TYPE_8812F) \ 17056 << BIT_SHIFT_CAMDBG_SEC_TYPE_8812F) 17057 #define BITS_CAMDBG_SEC_TYPE_8812F \ 17058 (BIT_MASK_CAMDBG_SEC_TYPE_8812F << BIT_SHIFT_CAMDBG_SEC_TYPE_8812F) 17059 #define BIT_CLEAR_CAMDBG_SEC_TYPE_8812F(x) ((x) & (~BITS_CAMDBG_SEC_TYPE_8812F)) 17060 #define BIT_GET_CAMDBG_SEC_TYPE_8812F(x) \ 17061 (((x) >> BIT_SHIFT_CAMDBG_SEC_TYPE_8812F) & \ 17062 BIT_MASK_CAMDBG_SEC_TYPE_8812F) 17063 #define BIT_SET_CAMDBG_SEC_TYPE_8812F(x, v) \ 17064 (BIT_CLEAR_CAMDBG_SEC_TYPE_8812F(x) | BIT_CAMDBG_SEC_TYPE_8812F(v)) 17065 17066 #define BIT_CAMDBG_EXT_SECTYPE_8812F BIT(11) 17067 17068 #define BIT_SHIFT_CAMDBG_MIC_KEY_IDX_8812F 5 17069 #define BIT_MASK_CAMDBG_MIC_KEY_IDX_8812F 0x1f 17070 #define BIT_CAMDBG_MIC_KEY_IDX_8812F(x) \ 17071 (((x) & BIT_MASK_CAMDBG_MIC_KEY_IDX_8812F) \ 17072 << BIT_SHIFT_CAMDBG_MIC_KEY_IDX_8812F) 17073 #define BITS_CAMDBG_MIC_KEY_IDX_8812F \ 17074 (BIT_MASK_CAMDBG_MIC_KEY_IDX_8812F \ 17075 << BIT_SHIFT_CAMDBG_MIC_KEY_IDX_8812F) 17076 #define BIT_CLEAR_CAMDBG_MIC_KEY_IDX_8812F(x) \ 17077 ((x) & (~BITS_CAMDBG_MIC_KEY_IDX_8812F)) 17078 #define BIT_GET_CAMDBG_MIC_KEY_IDX_8812F(x) \ 17079 (((x) >> BIT_SHIFT_CAMDBG_MIC_KEY_IDX_8812F) & \ 17080 BIT_MASK_CAMDBG_MIC_KEY_IDX_8812F) 17081 #define BIT_SET_CAMDBG_MIC_KEY_IDX_8812F(x, v) \ 17082 (BIT_CLEAR_CAMDBG_MIC_KEY_IDX_8812F(x) | \ 17083 BIT_CAMDBG_MIC_KEY_IDX_8812F(v)) 17084 17085 #define BIT_SHIFT_CAMDBG_SEC_KEY_IDX_8812F 0 17086 #define BIT_MASK_CAMDBG_SEC_KEY_IDX_8812F 0x1f 17087 #define BIT_CAMDBG_SEC_KEY_IDX_8812F(x) \ 17088 (((x) & BIT_MASK_CAMDBG_SEC_KEY_IDX_8812F) \ 17089 << BIT_SHIFT_CAMDBG_SEC_KEY_IDX_8812F) 17090 #define BITS_CAMDBG_SEC_KEY_IDX_8812F \ 17091 (BIT_MASK_CAMDBG_SEC_KEY_IDX_8812F \ 17092 << BIT_SHIFT_CAMDBG_SEC_KEY_IDX_8812F) 17093 #define BIT_CLEAR_CAMDBG_SEC_KEY_IDX_8812F(x) \ 17094 ((x) & (~BITS_CAMDBG_SEC_KEY_IDX_8812F)) 17095 #define BIT_GET_CAMDBG_SEC_KEY_IDX_8812F(x) \ 17096 (((x) >> BIT_SHIFT_CAMDBG_SEC_KEY_IDX_8812F) & \ 17097 BIT_MASK_CAMDBG_SEC_KEY_IDX_8812F) 17098 #define BIT_SET_CAMDBG_SEC_KEY_IDX_8812F(x, v) \ 17099 (BIT_CLEAR_CAMDBG_SEC_KEY_IDX_8812F(x) | \ 17100 BIT_CAMDBG_SEC_KEY_IDX_8812F(v)) 17101 17102 /* 2 REG_SECCFG_8812F (SECURITY CONFIGURATION REGISTER) */ 17103 #define BIT_DIS_GCLK_WAPI_8812F BIT(15) 17104 #define BIT_DIS_GCLK_AES_8812F BIT(14) 17105 #define BIT_DIS_GCLK_TKIP_8812F BIT(13) 17106 #define BIT_AES_SEL_QC_1_8812F BIT(12) 17107 #define BIT_AES_SEL_QC_0_8812F BIT(11) 17108 #define BIT_CHK_BMC_8812F BIT(9) 17109 #define BIT_CHK_KEYID_8812F BIT(8) 17110 #define BIT_RXBCUSEDK_8812F BIT(7) 17111 #define BIT_TXBCUSEDK_8812F BIT(6) 17112 #define BIT_NOSKMC_8812F BIT(5) 17113 #define BIT_SKBYA2_8812F BIT(4) 17114 #define BIT_RXDEC_8812F BIT(3) 17115 #define BIT_TXENC_8812F BIT(2) 17116 #define BIT_RXUHUSEDK_8812F BIT(1) 17117 #define BIT_TXUHUSEDK_8812F BIT(0) 17118 17119 /* 2 REG_RXFILTER_CATEGORY_1_8812F */ 17120 17121 #define BIT_SHIFT_RXFILTER_CATEGORY_1_8812F 0 17122 #define BIT_MASK_RXFILTER_CATEGORY_1_8812F 0xff 17123 #define BIT_RXFILTER_CATEGORY_1_8812F(x) \ 17124 (((x) & BIT_MASK_RXFILTER_CATEGORY_1_8812F) \ 17125 << BIT_SHIFT_RXFILTER_CATEGORY_1_8812F) 17126 #define BITS_RXFILTER_CATEGORY_1_8812F \ 17127 (BIT_MASK_RXFILTER_CATEGORY_1_8812F \ 17128 << BIT_SHIFT_RXFILTER_CATEGORY_1_8812F) 17129 #define BIT_CLEAR_RXFILTER_CATEGORY_1_8812F(x) \ 17130 ((x) & (~BITS_RXFILTER_CATEGORY_1_8812F)) 17131 #define BIT_GET_RXFILTER_CATEGORY_1_8812F(x) \ 17132 (((x) >> BIT_SHIFT_RXFILTER_CATEGORY_1_8812F) & \ 17133 BIT_MASK_RXFILTER_CATEGORY_1_8812F) 17134 #define BIT_SET_RXFILTER_CATEGORY_1_8812F(x, v) \ 17135 (BIT_CLEAR_RXFILTER_CATEGORY_1_8812F(x) | \ 17136 BIT_RXFILTER_CATEGORY_1_8812F(v)) 17137 17138 /* 2 REG_RXFILTER_ACTION_1_8812F */ 17139 17140 #define BIT_SHIFT_RXFILTER_ACTION_1_8812F 0 17141 #define BIT_MASK_RXFILTER_ACTION_1_8812F 0xff 17142 #define BIT_RXFILTER_ACTION_1_8812F(x) \ 17143 (((x) & BIT_MASK_RXFILTER_ACTION_1_8812F) \ 17144 << BIT_SHIFT_RXFILTER_ACTION_1_8812F) 17145 #define BITS_RXFILTER_ACTION_1_8812F \ 17146 (BIT_MASK_RXFILTER_ACTION_1_8812F << BIT_SHIFT_RXFILTER_ACTION_1_8812F) 17147 #define BIT_CLEAR_RXFILTER_ACTION_1_8812F(x) \ 17148 ((x) & (~BITS_RXFILTER_ACTION_1_8812F)) 17149 #define BIT_GET_RXFILTER_ACTION_1_8812F(x) \ 17150 (((x) >> BIT_SHIFT_RXFILTER_ACTION_1_8812F) & \ 17151 BIT_MASK_RXFILTER_ACTION_1_8812F) 17152 #define BIT_SET_RXFILTER_ACTION_1_8812F(x, v) \ 17153 (BIT_CLEAR_RXFILTER_ACTION_1_8812F(x) | BIT_RXFILTER_ACTION_1_8812F(v)) 17154 17155 /* 2 REG_RXFILTER_CATEGORY_2_8812F */ 17156 17157 #define BIT_SHIFT_RXFILTER_CATEGORY_2_8812F 0 17158 #define BIT_MASK_RXFILTER_CATEGORY_2_8812F 0xff 17159 #define BIT_RXFILTER_CATEGORY_2_8812F(x) \ 17160 (((x) & BIT_MASK_RXFILTER_CATEGORY_2_8812F) \ 17161 << BIT_SHIFT_RXFILTER_CATEGORY_2_8812F) 17162 #define BITS_RXFILTER_CATEGORY_2_8812F \ 17163 (BIT_MASK_RXFILTER_CATEGORY_2_8812F \ 17164 << BIT_SHIFT_RXFILTER_CATEGORY_2_8812F) 17165 #define BIT_CLEAR_RXFILTER_CATEGORY_2_8812F(x) \ 17166 ((x) & (~BITS_RXFILTER_CATEGORY_2_8812F)) 17167 #define BIT_GET_RXFILTER_CATEGORY_2_8812F(x) \ 17168 (((x) >> BIT_SHIFT_RXFILTER_CATEGORY_2_8812F) & \ 17169 BIT_MASK_RXFILTER_CATEGORY_2_8812F) 17170 #define BIT_SET_RXFILTER_CATEGORY_2_8812F(x, v) \ 17171 (BIT_CLEAR_RXFILTER_CATEGORY_2_8812F(x) | \ 17172 BIT_RXFILTER_CATEGORY_2_8812F(v)) 17173 17174 /* 2 REG_RXFILTER_ACTION_2_8812F */ 17175 17176 #define BIT_SHIFT_RXFILTER_ACTION_2_8812F 0 17177 #define BIT_MASK_RXFILTER_ACTION_2_8812F 0xff 17178 #define BIT_RXFILTER_ACTION_2_8812F(x) \ 17179 (((x) & BIT_MASK_RXFILTER_ACTION_2_8812F) \ 17180 << BIT_SHIFT_RXFILTER_ACTION_2_8812F) 17181 #define BITS_RXFILTER_ACTION_2_8812F \ 17182 (BIT_MASK_RXFILTER_ACTION_2_8812F << BIT_SHIFT_RXFILTER_ACTION_2_8812F) 17183 #define BIT_CLEAR_RXFILTER_ACTION_2_8812F(x) \ 17184 ((x) & (~BITS_RXFILTER_ACTION_2_8812F)) 17185 #define BIT_GET_RXFILTER_ACTION_2_8812F(x) \ 17186 (((x) >> BIT_SHIFT_RXFILTER_ACTION_2_8812F) & \ 17187 BIT_MASK_RXFILTER_ACTION_2_8812F) 17188 #define BIT_SET_RXFILTER_ACTION_2_8812F(x, v) \ 17189 (BIT_CLEAR_RXFILTER_ACTION_2_8812F(x) | BIT_RXFILTER_ACTION_2_8812F(v)) 17190 17191 /* 2 REG_RXFILTER_CATEGORY_3_8812F */ 17192 17193 #define BIT_SHIFT_RXFILTER_CATEGORY_3_8812F 0 17194 #define BIT_MASK_RXFILTER_CATEGORY_3_8812F 0xff 17195 #define BIT_RXFILTER_CATEGORY_3_8812F(x) \ 17196 (((x) & BIT_MASK_RXFILTER_CATEGORY_3_8812F) \ 17197 << BIT_SHIFT_RXFILTER_CATEGORY_3_8812F) 17198 #define BITS_RXFILTER_CATEGORY_3_8812F \ 17199 (BIT_MASK_RXFILTER_CATEGORY_3_8812F \ 17200 << BIT_SHIFT_RXFILTER_CATEGORY_3_8812F) 17201 #define BIT_CLEAR_RXFILTER_CATEGORY_3_8812F(x) \ 17202 ((x) & (~BITS_RXFILTER_CATEGORY_3_8812F)) 17203 #define BIT_GET_RXFILTER_CATEGORY_3_8812F(x) \ 17204 (((x) >> BIT_SHIFT_RXFILTER_CATEGORY_3_8812F) & \ 17205 BIT_MASK_RXFILTER_CATEGORY_3_8812F) 17206 #define BIT_SET_RXFILTER_CATEGORY_3_8812F(x, v) \ 17207 (BIT_CLEAR_RXFILTER_CATEGORY_3_8812F(x) | \ 17208 BIT_RXFILTER_CATEGORY_3_8812F(v)) 17209 17210 /* 2 REG_RXFILTER_ACTION_3_8812F */ 17211 17212 #define BIT_SHIFT_RXFILTER_ACTION_3_8812F 0 17213 #define BIT_MASK_RXFILTER_ACTION_3_8812F 0xff 17214 #define BIT_RXFILTER_ACTION_3_8812F(x) \ 17215 (((x) & BIT_MASK_RXFILTER_ACTION_3_8812F) \ 17216 << BIT_SHIFT_RXFILTER_ACTION_3_8812F) 17217 #define BITS_RXFILTER_ACTION_3_8812F \ 17218 (BIT_MASK_RXFILTER_ACTION_3_8812F << BIT_SHIFT_RXFILTER_ACTION_3_8812F) 17219 #define BIT_CLEAR_RXFILTER_ACTION_3_8812F(x) \ 17220 ((x) & (~BITS_RXFILTER_ACTION_3_8812F)) 17221 #define BIT_GET_RXFILTER_ACTION_3_8812F(x) \ 17222 (((x) >> BIT_SHIFT_RXFILTER_ACTION_3_8812F) & \ 17223 BIT_MASK_RXFILTER_ACTION_3_8812F) 17224 #define BIT_SET_RXFILTER_ACTION_3_8812F(x, v) \ 17225 (BIT_CLEAR_RXFILTER_ACTION_3_8812F(x) | BIT_RXFILTER_ACTION_3_8812F(v)) 17226 17227 /* 2 REG_RXFLTMAP3_8812F (RX FILTER MAP GROUP 3) */ 17228 #define BIT_MGTFLT15EN_FW_8812F BIT(15) 17229 #define BIT_MGTFLT14EN_FW_8812F BIT(14) 17230 #define BIT_MGTFLT13EN_FW_8812F BIT(13) 17231 #define BIT_MGTFLT12EN_FW_8812F BIT(12) 17232 #define BIT_MGTFLT11EN_FW_8812F BIT(11) 17233 #define BIT_MGTFLT10EN_FW_8812F BIT(10) 17234 #define BIT_MGTFLT9EN_FW_8812F BIT(9) 17235 #define BIT_MGTFLT8EN_FW_8812F BIT(8) 17236 #define BIT_MGTFLT7EN_FW_8812F BIT(7) 17237 #define BIT_MGTFLT6EN_FW_8812F BIT(6) 17238 #define BIT_MGTFLT5EN_FW_8812F BIT(5) 17239 #define BIT_MGTFLT4EN_FW_8812F BIT(4) 17240 #define BIT_MGTFLT3EN_FW_8812F BIT(3) 17241 #define BIT_MGTFLT2EN_FW_8812F BIT(2) 17242 #define BIT_MGTFLT1EN_FW_8812F BIT(1) 17243 #define BIT_MGTFLT0EN_FW_8812F BIT(0) 17244 17245 /* 2 REG_RXFLTMAP4_8812F (RX FILTER MAP GROUP 4) */ 17246 #define BIT_CTRLFLT15EN_FW_8812F BIT(15) 17247 #define BIT_CTRLFLT14EN_FW_8812F BIT(14) 17248 #define BIT_CTRLFLT13EN_FW_8812F BIT(13) 17249 #define BIT_CTRLFLT12EN_FW_8812F BIT(12) 17250 #define BIT_CTRLFLT11EN_FW_8812F BIT(11) 17251 #define BIT_CTRLFLT10EN_FW_8812F BIT(10) 17252 #define BIT_CTRLFLT9EN_FW_8812F BIT(9) 17253 #define BIT_CTRLFLT8EN_FW_8812F BIT(8) 17254 #define BIT_CTRLFLT7EN_FW_8812F BIT(7) 17255 #define BIT_CTRLFLT6EN_FW_8812F BIT(6) 17256 #define BIT_CTRLFLT5EN_FW_8812F BIT(5) 17257 #define BIT_CTRLFLT4EN_FW_8812F BIT(4) 17258 #define BIT_CTRLFLT3EN_FW_8812F BIT(3) 17259 #define BIT_CTRLFLT2EN_FW_8812F BIT(2) 17260 #define BIT_CTRLFLT1EN_FW_8812F BIT(1) 17261 #define BIT_CTRLFLT0EN_FW_8812F BIT(0) 17262 17263 /* 2 REG_RXFLTMAP5_8812F (RX FILTER MAP GROUP 5) */ 17264 #define BIT_DATAFLT15EN_FW_8812F BIT(15) 17265 #define BIT_DATAFLT14EN_FW_8812F BIT(14) 17266 #define BIT_DATAFLT13EN_FW_8812F BIT(13) 17267 #define BIT_DATAFLT12EN_FW_8812F BIT(12) 17268 #define BIT_DATAFLT11EN_FW_8812F BIT(11) 17269 #define BIT_DATAFLT10EN_FW_8812F BIT(10) 17270 #define BIT_DATAFLT9EN_FW_8812F BIT(9) 17271 #define BIT_DATAFLT8EN_FW_8812F BIT(8) 17272 #define BIT_DATAFLT7EN_FW_8812F BIT(7) 17273 #define BIT_DATAFLT6EN_FW_8812F BIT(6) 17274 #define BIT_DATAFLT5EN_FW_8812F BIT(5) 17275 #define BIT_DATAFLT4EN_FW_8812F BIT(4) 17276 #define BIT_DATAFLT3EN_FW_8812F BIT(3) 17277 #define BIT_DATAFLT2EN_FW_8812F BIT(2) 17278 #define BIT_DATAFLT1EN_FW_8812F BIT(1) 17279 #define BIT_DATAFLT0EN_FW_8812F BIT(0) 17280 17281 /* 2 REG_RXFLTMAP6_8812F (RX FILTER MAP GROUP 6) */ 17282 #define BIT_ACTIONFLT15EN_FW_8812F BIT(15) 17283 #define BIT_ACTIONFLT14EN_FW_8812F BIT(14) 17284 #define BIT_ACTIONFLT13EN_FW_8812F BIT(13) 17285 #define BIT_ACTIONFLT12EN_FW_8812F BIT(12) 17286 #define BIT_ACTIONFLT11EN_FW_8812F BIT(11) 17287 #define BIT_ACTIONFLT10EN_FW_8812F BIT(10) 17288 #define BIT_ACTIONFLT9EN_FW_8812F BIT(9) 17289 #define BIT_ACTIONFLT8EN_FW_8812F BIT(8) 17290 #define BIT_ACTIONFLT7EN_FW_8812F BIT(7) 17291 #define BIT_ACTIONFLT6EN_FW_8812F BIT(6) 17292 #define BIT_ACTIONFLT5EN_FW_8812F BIT(5) 17293 #define BIT_ACTIONFLT4EN_FW_8812F BIT(4) 17294 #define BIT_ACTIONFLT3EN_FW_8812F BIT(3) 17295 #define BIT_ACTIONFLT2EN_FW_8812F BIT(2) 17296 #define BIT_ACTIONFLT1EN_FW_8812F BIT(1) 17297 #define BIT_ACTIONFLT0EN_FW_8812F BIT(0) 17298 17299 /* 2 REG_WOW_CTRL_8812F (WAKE ON WLAN CONTROL REGISTER) */ 17300 17301 #define BIT_SHIFT_PSF_BSSIDSEL_B2B1_8812F 6 17302 #define BIT_MASK_PSF_BSSIDSEL_B2B1_8812F 0x3 17303 #define BIT_PSF_BSSIDSEL_B2B1_8812F(x) \ 17304 (((x) & BIT_MASK_PSF_BSSIDSEL_B2B1_8812F) \ 17305 << BIT_SHIFT_PSF_BSSIDSEL_B2B1_8812F) 17306 #define BITS_PSF_BSSIDSEL_B2B1_8812F \ 17307 (BIT_MASK_PSF_BSSIDSEL_B2B1_8812F << BIT_SHIFT_PSF_BSSIDSEL_B2B1_8812F) 17308 #define BIT_CLEAR_PSF_BSSIDSEL_B2B1_8812F(x) \ 17309 ((x) & (~BITS_PSF_BSSIDSEL_B2B1_8812F)) 17310 #define BIT_GET_PSF_BSSIDSEL_B2B1_8812F(x) \ 17311 (((x) >> BIT_SHIFT_PSF_BSSIDSEL_B2B1_8812F) & \ 17312 BIT_MASK_PSF_BSSIDSEL_B2B1_8812F) 17313 #define BIT_SET_PSF_BSSIDSEL_B2B1_8812F(x, v) \ 17314 (BIT_CLEAR_PSF_BSSIDSEL_B2B1_8812F(x) | BIT_PSF_BSSIDSEL_B2B1_8812F(v)) 17315 17316 #define BIT_WOWHCI_8812F BIT(5) 17317 #define BIT_PSF_BSSIDSEL_B0_8812F BIT(4) 17318 #define BIT_UWF_8812F BIT(3) 17319 #define BIT_MAGIC_8812F BIT(2) 17320 #define BIT_WOWEN_8812F BIT(1) 17321 #define BIT_FORCE_WAKEUP_8812F BIT(0) 17322 17323 /* 2 REG_NAN_RX_TSF_FILTER_8812F(NAN_RX_TSF_ADDRESS_FILTER) */ 17324 #define BIT_CHK_TSF_TA_8812F BIT(2) 17325 #define BIT_CHK_TSF_CBSSID_8812F BIT(1) 17326 #define BIT_CHK_TSF_EN_8812F BIT(0) 17327 17328 /* 2 REG_PS_RX_INFO_8812F (POWER SAVE RX INFORMATION REGISTER) */ 17329 17330 #define BIT_SHIFT_PORTSEL__PS_RX_INFO_8812F 5 17331 #define BIT_MASK_PORTSEL__PS_RX_INFO_8812F 0x7 17332 #define BIT_PORTSEL__PS_RX_INFO_8812F(x) \ 17333 (((x) & BIT_MASK_PORTSEL__PS_RX_INFO_8812F) \ 17334 << BIT_SHIFT_PORTSEL__PS_RX_INFO_8812F) 17335 #define BITS_PORTSEL__PS_RX_INFO_8812F \ 17336 (BIT_MASK_PORTSEL__PS_RX_INFO_8812F \ 17337 << BIT_SHIFT_PORTSEL__PS_RX_INFO_8812F) 17338 #define BIT_CLEAR_PORTSEL__PS_RX_INFO_8812F(x) \ 17339 ((x) & (~BITS_PORTSEL__PS_RX_INFO_8812F)) 17340 #define BIT_GET_PORTSEL__PS_RX_INFO_8812F(x) \ 17341 (((x) >> BIT_SHIFT_PORTSEL__PS_RX_INFO_8812F) & \ 17342 BIT_MASK_PORTSEL__PS_RX_INFO_8812F) 17343 #define BIT_SET_PORTSEL__PS_RX_INFO_8812F(x, v) \ 17344 (BIT_CLEAR_PORTSEL__PS_RX_INFO_8812F(x) | \ 17345 BIT_PORTSEL__PS_RX_INFO_8812F(v)) 17346 17347 #define BIT_RXCTRLIN0_8812F BIT(4) 17348 #define BIT_RXMGTIN0_8812F BIT(3) 17349 #define BIT_RXDATAIN2_8812F BIT(2) 17350 #define BIT_RXDATAIN1_8812F BIT(1) 17351 #define BIT_RXDATAIN0_8812F BIT(0) 17352 17353 /* 2 REG_WMMPS_UAPSD_TID_8812F (WMM POWER SAVE UAPSD TID REGISTER) */ 17354 #define BIT_WMMPS_UAPSD_TID7_8812F BIT(7) 17355 #define BIT_WMMPS_UAPSD_TID6_8812F BIT(6) 17356 #define BIT_WMMPS_UAPSD_TID5_8812F BIT(5) 17357 #define BIT_WMMPS_UAPSD_TID4_8812F BIT(4) 17358 #define BIT_WMMPS_UAPSD_TID3_8812F BIT(3) 17359 #define BIT_WMMPS_UAPSD_TID2_8812F BIT(2) 17360 #define BIT_WMMPS_UAPSD_TID1_8812F BIT(1) 17361 #define BIT_WMMPS_UAPSD_TID0_8812F BIT(0) 17362 17363 /* 2 REG_LPNAV_CTRL_8812F (LOW POWER NAV CONTROL REGISTER) */ 17364 17365 /* 2 REG_WKFMCAM_CMD_8812F (WAKEUP FRAME CAM COMMAND REGISTER) */ 17366 #define BIT_WKFCAM_POLLING_V1_8812F BIT(31) 17367 #define BIT_WKFCAM_CLR_V1_8812F BIT(30) 17368 #define BIT_WKFCAM_WE_8812F BIT(16) 17369 17370 #define BIT_SHIFT_WKFCAM_ADDR_V2_8812F 8 17371 #define BIT_MASK_WKFCAM_ADDR_V2_8812F 0xff 17372 #define BIT_WKFCAM_ADDR_V2_8812F(x) \ 17373 (((x) & BIT_MASK_WKFCAM_ADDR_V2_8812F) \ 17374 << BIT_SHIFT_WKFCAM_ADDR_V2_8812F) 17375 #define BITS_WKFCAM_ADDR_V2_8812F \ 17376 (BIT_MASK_WKFCAM_ADDR_V2_8812F << BIT_SHIFT_WKFCAM_ADDR_V2_8812F) 17377 #define BIT_CLEAR_WKFCAM_ADDR_V2_8812F(x) ((x) & (~BITS_WKFCAM_ADDR_V2_8812F)) 17378 #define BIT_GET_WKFCAM_ADDR_V2_8812F(x) \ 17379 (((x) >> BIT_SHIFT_WKFCAM_ADDR_V2_8812F) & \ 17380 BIT_MASK_WKFCAM_ADDR_V2_8812F) 17381 #define BIT_SET_WKFCAM_ADDR_V2_8812F(x, v) \ 17382 (BIT_CLEAR_WKFCAM_ADDR_V2_8812F(x) | BIT_WKFCAM_ADDR_V2_8812F(v)) 17383 17384 #define BIT_SHIFT_WKFCAM_CAM_NUM_V1_8812F 0 17385 #define BIT_MASK_WKFCAM_CAM_NUM_V1_8812F 0xff 17386 #define BIT_WKFCAM_CAM_NUM_V1_8812F(x) \ 17387 (((x) & BIT_MASK_WKFCAM_CAM_NUM_V1_8812F) \ 17388 << BIT_SHIFT_WKFCAM_CAM_NUM_V1_8812F) 17389 #define BITS_WKFCAM_CAM_NUM_V1_8812F \ 17390 (BIT_MASK_WKFCAM_CAM_NUM_V1_8812F << BIT_SHIFT_WKFCAM_CAM_NUM_V1_8812F) 17391 #define BIT_CLEAR_WKFCAM_CAM_NUM_V1_8812F(x) \ 17392 ((x) & (~BITS_WKFCAM_CAM_NUM_V1_8812F)) 17393 #define BIT_GET_WKFCAM_CAM_NUM_V1_8812F(x) \ 17394 (((x) >> BIT_SHIFT_WKFCAM_CAM_NUM_V1_8812F) & \ 17395 BIT_MASK_WKFCAM_CAM_NUM_V1_8812F) 17396 #define BIT_SET_WKFCAM_CAM_NUM_V1_8812F(x, v) \ 17397 (BIT_CLEAR_WKFCAM_CAM_NUM_V1_8812F(x) | BIT_WKFCAM_CAM_NUM_V1_8812F(v)) 17398 17399 /* 2 REG_WKFMCAM_RWD_8812F (WAKEUP FRAME READ/WRITE DATA) */ 17400 17401 #define BIT_SHIFT_WKFMCAM_RWD_8812F 0 17402 #define BIT_MASK_WKFMCAM_RWD_8812F 0xffffffffL 17403 #define BIT_WKFMCAM_RWD_8812F(x) \ 17404 (((x) & BIT_MASK_WKFMCAM_RWD_8812F) << BIT_SHIFT_WKFMCAM_RWD_8812F) 17405 #define BITS_WKFMCAM_RWD_8812F \ 17406 (BIT_MASK_WKFMCAM_RWD_8812F << BIT_SHIFT_WKFMCAM_RWD_8812F) 17407 #define BIT_CLEAR_WKFMCAM_RWD_8812F(x) ((x) & (~BITS_WKFMCAM_RWD_8812F)) 17408 #define BIT_GET_WKFMCAM_RWD_8812F(x) \ 17409 (((x) >> BIT_SHIFT_WKFMCAM_RWD_8812F) & BIT_MASK_WKFMCAM_RWD_8812F) 17410 #define BIT_SET_WKFMCAM_RWD_8812F(x, v) \ 17411 (BIT_CLEAR_WKFMCAM_RWD_8812F(x) | BIT_WKFMCAM_RWD_8812F(v)) 17412 17413 /* 2 REG_RXFLTMAP0_8812F (RX FILTER MAP GROUP 0) */ 17414 #define BIT_MGTFLT15EN_8812F BIT(15) 17415 #define BIT_MGTFLT14EN_8812F BIT(14) 17416 #define BIT_MGTFLT13EN_8812F BIT(13) 17417 #define BIT_MGTFLT12EN_8812F BIT(12) 17418 #define BIT_MGTFLT11EN_8812F BIT(11) 17419 #define BIT_MGTFLT10EN_8812F BIT(10) 17420 #define BIT_MGTFLT9EN_8812F BIT(9) 17421 #define BIT_MGTFLT8EN_8812F BIT(8) 17422 #define BIT_MGTFLT7EN_8812F BIT(7) 17423 #define BIT_MGTFLT6EN_8812F BIT(6) 17424 #define BIT_MGTFLT5EN_8812F BIT(5) 17425 #define BIT_MGTFLT4EN_8812F BIT(4) 17426 #define BIT_MGTFLT3EN_8812F BIT(3) 17427 #define BIT_MGTFLT2EN_8812F BIT(2) 17428 #define BIT_MGTFLT1EN_8812F BIT(1) 17429 #define BIT_MGTFLT0EN_8812F BIT(0) 17430 17431 /* 2 REG_RXFLTMAP1_8812F (RX FILTER MAP GROUP 1) */ 17432 #define BIT_CTRLFLT15EN_8812F BIT(15) 17433 #define BIT_CTRLFLT14EN_8812F BIT(14) 17434 #define BIT_CTRLFLT13EN_8812F BIT(13) 17435 #define BIT_CTRLFLT12EN_8812F BIT(12) 17436 #define BIT_CTRLFLT11EN_8812F BIT(11) 17437 #define BIT_CTRLFLT10EN_8812F BIT(10) 17438 #define BIT_CTRLFLT9EN_8812F BIT(9) 17439 #define BIT_CTRLFLT8EN_8812F BIT(8) 17440 #define BIT_CTRLFLT7EN_8812F BIT(7) 17441 #define BIT_CTRLFLT6EN_8812F BIT(6) 17442 #define BIT_CTRLFLT5EN_8812F BIT(5) 17443 #define BIT_CTRLFLT4EN_8812F BIT(4) 17444 #define BIT_CTRLFLT3EN_8812F BIT(3) 17445 #define BIT_CTRLFLT2EN_8812F BIT(2) 17446 #define BIT_CTRLFLT1EN_8812F BIT(1) 17447 #define BIT_CTRLFLT0EN_8812F BIT(0) 17448 17449 /* 2 REG_RXFLTMAP2_8812F (RX FILTER MAP GROUP 2) */ 17450 #define BIT_DATAFLT15EN_8812F BIT(15) 17451 #define BIT_DATAFLT14EN_8812F BIT(14) 17452 #define BIT_DATAFLT13EN_8812F BIT(13) 17453 #define BIT_DATAFLT12EN_8812F BIT(12) 17454 #define BIT_DATAFLT11EN_8812F BIT(11) 17455 #define BIT_DATAFLT10EN_8812F BIT(10) 17456 #define BIT_DATAFLT9EN_8812F BIT(9) 17457 #define BIT_DATAFLT8EN_8812F BIT(8) 17458 #define BIT_DATAFLT7EN_8812F BIT(7) 17459 #define BIT_DATAFLT6EN_8812F BIT(6) 17460 #define BIT_DATAFLT5EN_8812F BIT(5) 17461 #define BIT_DATAFLT4EN_8812F BIT(4) 17462 #define BIT_DATAFLT3EN_8812F BIT(3) 17463 #define BIT_DATAFLT2EN_8812F BIT(2) 17464 #define BIT_DATAFLT1EN_8812F BIT(1) 17465 #define BIT_DATAFLT0EN_8812F BIT(0) 17466 17467 /* 2 REG_RSVD_8812F */ 17468 17469 /* 2 REG_BCN_PSR_RPT_8812F (BEACON PARSER REPORT REGISTER) */ 17470 17471 #define BIT_SHIFT_DTIM_CNT_8812F 24 17472 #define BIT_MASK_DTIM_CNT_8812F 0xff 17473 #define BIT_DTIM_CNT_8812F(x) \ 17474 (((x) & BIT_MASK_DTIM_CNT_8812F) << BIT_SHIFT_DTIM_CNT_8812F) 17475 #define BITS_DTIM_CNT_8812F \ 17476 (BIT_MASK_DTIM_CNT_8812F << BIT_SHIFT_DTIM_CNT_8812F) 17477 #define BIT_CLEAR_DTIM_CNT_8812F(x) ((x) & (~BITS_DTIM_CNT_8812F)) 17478 #define BIT_GET_DTIM_CNT_8812F(x) \ 17479 (((x) >> BIT_SHIFT_DTIM_CNT_8812F) & BIT_MASK_DTIM_CNT_8812F) 17480 #define BIT_SET_DTIM_CNT_8812F(x, v) \ 17481 (BIT_CLEAR_DTIM_CNT_8812F(x) | BIT_DTIM_CNT_8812F(v)) 17482 17483 #define BIT_SHIFT_DTIM_PERIOD_8812F 16 17484 #define BIT_MASK_DTIM_PERIOD_8812F 0xff 17485 #define BIT_DTIM_PERIOD_8812F(x) \ 17486 (((x) & BIT_MASK_DTIM_PERIOD_8812F) << BIT_SHIFT_DTIM_PERIOD_8812F) 17487 #define BITS_DTIM_PERIOD_8812F \ 17488 (BIT_MASK_DTIM_PERIOD_8812F << BIT_SHIFT_DTIM_PERIOD_8812F) 17489 #define BIT_CLEAR_DTIM_PERIOD_8812F(x) ((x) & (~BITS_DTIM_PERIOD_8812F)) 17490 #define BIT_GET_DTIM_PERIOD_8812F(x) \ 17491 (((x) >> BIT_SHIFT_DTIM_PERIOD_8812F) & BIT_MASK_DTIM_PERIOD_8812F) 17492 #define BIT_SET_DTIM_PERIOD_8812F(x, v) \ 17493 (BIT_CLEAR_DTIM_PERIOD_8812F(x) | BIT_DTIM_PERIOD_8812F(v)) 17494 17495 #define BIT_DTIM_8812F BIT(15) 17496 #define BIT_TIM_8812F BIT(14) 17497 #define BIT_RPT_VALID_8812F BIT(13) 17498 17499 #define BIT_SHIFT_PS_AID_0_8812F 0 17500 #define BIT_MASK_PS_AID_0_8812F 0x7ff 17501 #define BIT_PS_AID_0_8812F(x) \ 17502 (((x) & BIT_MASK_PS_AID_0_8812F) << BIT_SHIFT_PS_AID_0_8812F) 17503 #define BITS_PS_AID_0_8812F \ 17504 (BIT_MASK_PS_AID_0_8812F << BIT_SHIFT_PS_AID_0_8812F) 17505 #define BIT_CLEAR_PS_AID_0_8812F(x) ((x) & (~BITS_PS_AID_0_8812F)) 17506 #define BIT_GET_PS_AID_0_8812F(x) \ 17507 (((x) >> BIT_SHIFT_PS_AID_0_8812F) & BIT_MASK_PS_AID_0_8812F) 17508 #define BIT_SET_PS_AID_0_8812F(x, v) \ 17509 (BIT_CLEAR_PS_AID_0_8812F(x) | BIT_PS_AID_0_8812F(v)) 17510 17511 /* 2 REG_FLC_RPC_8812F (FW LPS CONDITION -- RX PKT COUNTER) */ 17512 17513 #define BIT_SHIFT_FLC_RPC_8812F 0 17514 #define BIT_MASK_FLC_RPC_8812F 0xff 17515 #define BIT_FLC_RPC_8812F(x) \ 17516 (((x) & BIT_MASK_FLC_RPC_8812F) << BIT_SHIFT_FLC_RPC_8812F) 17517 #define BITS_FLC_RPC_8812F (BIT_MASK_FLC_RPC_8812F << BIT_SHIFT_FLC_RPC_8812F) 17518 #define BIT_CLEAR_FLC_RPC_8812F(x) ((x) & (~BITS_FLC_RPC_8812F)) 17519 #define BIT_GET_FLC_RPC_8812F(x) \ 17520 (((x) >> BIT_SHIFT_FLC_RPC_8812F) & BIT_MASK_FLC_RPC_8812F) 17521 #define BIT_SET_FLC_RPC_8812F(x, v) \ 17522 (BIT_CLEAR_FLC_RPC_8812F(x) | BIT_FLC_RPC_8812F(v)) 17523 17524 /* 2 REG_FLC_RPCT_8812F (FLC_RPC THRESHOLD) */ 17525 17526 #define BIT_SHIFT_FLC_RPCT_8812F 0 17527 #define BIT_MASK_FLC_RPCT_8812F 0xff 17528 #define BIT_FLC_RPCT_8812F(x) \ 17529 (((x) & BIT_MASK_FLC_RPCT_8812F) << BIT_SHIFT_FLC_RPCT_8812F) 17530 #define BITS_FLC_RPCT_8812F \ 17531 (BIT_MASK_FLC_RPCT_8812F << BIT_SHIFT_FLC_RPCT_8812F) 17532 #define BIT_CLEAR_FLC_RPCT_8812F(x) ((x) & (~BITS_FLC_RPCT_8812F)) 17533 #define BIT_GET_FLC_RPCT_8812F(x) \ 17534 (((x) >> BIT_SHIFT_FLC_RPCT_8812F) & BIT_MASK_FLC_RPCT_8812F) 17535 #define BIT_SET_FLC_RPCT_8812F(x, v) \ 17536 (BIT_CLEAR_FLC_RPCT_8812F(x) | BIT_FLC_RPCT_8812F(v)) 17537 17538 /* 2 REG_FLC_PTS_8812F (PKT TYPE SELECTION OF FLC_RPC T) */ 17539 #define BIT_CMF_8812F BIT(2) 17540 #define BIT_CCF_8812F BIT(1) 17541 #define BIT_CDF_8812F BIT(0) 17542 17543 /* 2 REG_FLC_TRPC_8812F (TIMER OF FLC_RPC) */ 17544 #define BIT_FLC_RPCT_V1_8812F BIT(7) 17545 #define BIT_MODE_8812F BIT(6) 17546 17547 #define BIT_SHIFT_TRPCD_8812F 0 17548 #define BIT_MASK_TRPCD_8812F 0x3f 17549 #define BIT_TRPCD_8812F(x) \ 17550 (((x) & BIT_MASK_TRPCD_8812F) << BIT_SHIFT_TRPCD_8812F) 17551 #define BITS_TRPCD_8812F (BIT_MASK_TRPCD_8812F << BIT_SHIFT_TRPCD_8812F) 17552 #define BIT_CLEAR_TRPCD_8812F(x) ((x) & (~BITS_TRPCD_8812F)) 17553 #define BIT_GET_TRPCD_8812F(x) \ 17554 (((x) >> BIT_SHIFT_TRPCD_8812F) & BIT_MASK_TRPCD_8812F) 17555 #define BIT_SET_TRPCD_8812F(x, v) \ 17556 (BIT_CLEAR_TRPCD_8812F(x) | BIT_TRPCD_8812F(v)) 17557 17558 /* 2 REG_RXPKTMON_CTRL_8812F */ 17559 17560 #define BIT_SHIFT_RXBKQPKT_SEQ_8812F 20 17561 #define BIT_MASK_RXBKQPKT_SEQ_8812F 0xf 17562 #define BIT_RXBKQPKT_SEQ_8812F(x) \ 17563 (((x) & BIT_MASK_RXBKQPKT_SEQ_8812F) << BIT_SHIFT_RXBKQPKT_SEQ_8812F) 17564 #define BITS_RXBKQPKT_SEQ_8812F \ 17565 (BIT_MASK_RXBKQPKT_SEQ_8812F << BIT_SHIFT_RXBKQPKT_SEQ_8812F) 17566 #define BIT_CLEAR_RXBKQPKT_SEQ_8812F(x) ((x) & (~BITS_RXBKQPKT_SEQ_8812F)) 17567 #define BIT_GET_RXBKQPKT_SEQ_8812F(x) \ 17568 (((x) >> BIT_SHIFT_RXBKQPKT_SEQ_8812F) & BIT_MASK_RXBKQPKT_SEQ_8812F) 17569 #define BIT_SET_RXBKQPKT_SEQ_8812F(x, v) \ 17570 (BIT_CLEAR_RXBKQPKT_SEQ_8812F(x) | BIT_RXBKQPKT_SEQ_8812F(v)) 17571 17572 #define BIT_SHIFT_RXBEQPKT_SEQ_8812F 16 17573 #define BIT_MASK_RXBEQPKT_SEQ_8812F 0xf 17574 #define BIT_RXBEQPKT_SEQ_8812F(x) \ 17575 (((x) & BIT_MASK_RXBEQPKT_SEQ_8812F) << BIT_SHIFT_RXBEQPKT_SEQ_8812F) 17576 #define BITS_RXBEQPKT_SEQ_8812F \ 17577 (BIT_MASK_RXBEQPKT_SEQ_8812F << BIT_SHIFT_RXBEQPKT_SEQ_8812F) 17578 #define BIT_CLEAR_RXBEQPKT_SEQ_8812F(x) ((x) & (~BITS_RXBEQPKT_SEQ_8812F)) 17579 #define BIT_GET_RXBEQPKT_SEQ_8812F(x) \ 17580 (((x) >> BIT_SHIFT_RXBEQPKT_SEQ_8812F) & BIT_MASK_RXBEQPKT_SEQ_8812F) 17581 #define BIT_SET_RXBEQPKT_SEQ_8812F(x, v) \ 17582 (BIT_CLEAR_RXBEQPKT_SEQ_8812F(x) | BIT_RXBEQPKT_SEQ_8812F(v)) 17583 17584 #define BIT_SHIFT_RXVIQPKT_SEQ_8812F 12 17585 #define BIT_MASK_RXVIQPKT_SEQ_8812F 0xf 17586 #define BIT_RXVIQPKT_SEQ_8812F(x) \ 17587 (((x) & BIT_MASK_RXVIQPKT_SEQ_8812F) << BIT_SHIFT_RXVIQPKT_SEQ_8812F) 17588 #define BITS_RXVIQPKT_SEQ_8812F \ 17589 (BIT_MASK_RXVIQPKT_SEQ_8812F << BIT_SHIFT_RXVIQPKT_SEQ_8812F) 17590 #define BIT_CLEAR_RXVIQPKT_SEQ_8812F(x) ((x) & (~BITS_RXVIQPKT_SEQ_8812F)) 17591 #define BIT_GET_RXVIQPKT_SEQ_8812F(x) \ 17592 (((x) >> BIT_SHIFT_RXVIQPKT_SEQ_8812F) & BIT_MASK_RXVIQPKT_SEQ_8812F) 17593 #define BIT_SET_RXVIQPKT_SEQ_8812F(x, v) \ 17594 (BIT_CLEAR_RXVIQPKT_SEQ_8812F(x) | BIT_RXVIQPKT_SEQ_8812F(v)) 17595 17596 #define BIT_SHIFT_RXVOQPKT_SEQ_8812F 8 17597 #define BIT_MASK_RXVOQPKT_SEQ_8812F 0xf 17598 #define BIT_RXVOQPKT_SEQ_8812F(x) \ 17599 (((x) & BIT_MASK_RXVOQPKT_SEQ_8812F) << BIT_SHIFT_RXVOQPKT_SEQ_8812F) 17600 #define BITS_RXVOQPKT_SEQ_8812F \ 17601 (BIT_MASK_RXVOQPKT_SEQ_8812F << BIT_SHIFT_RXVOQPKT_SEQ_8812F) 17602 #define BIT_CLEAR_RXVOQPKT_SEQ_8812F(x) ((x) & (~BITS_RXVOQPKT_SEQ_8812F)) 17603 #define BIT_GET_RXVOQPKT_SEQ_8812F(x) \ 17604 (((x) >> BIT_SHIFT_RXVOQPKT_SEQ_8812F) & BIT_MASK_RXVOQPKT_SEQ_8812F) 17605 #define BIT_SET_RXVOQPKT_SEQ_8812F(x, v) \ 17606 (BIT_CLEAR_RXVOQPKT_SEQ_8812F(x) | BIT_RXVOQPKT_SEQ_8812F(v)) 17607 17608 #define BIT_RXBKQPKT_ERR_8812F BIT(7) 17609 #define BIT_RXBEQPKT_ERR_8812F BIT(6) 17610 #define BIT_RXVIQPKT_ERR_8812F BIT(5) 17611 #define BIT_RXVOQPKT_ERR_8812F BIT(4) 17612 #define BIT_RXDMA_MON_EN_8812F BIT(2) 17613 #define BIT_RXPKT_MON_RST_8812F BIT(1) 17614 #define BIT_RXPKT_MON_EN_8812F BIT(0) 17615 17616 /* 2 REG_STATE_MON_8812F */ 17617 17618 #define BIT_SHIFT_STATE_SEL_8812F 24 17619 #define BIT_MASK_STATE_SEL_8812F 0x1f 17620 #define BIT_STATE_SEL_8812F(x) \ 17621 (((x) & BIT_MASK_STATE_SEL_8812F) << BIT_SHIFT_STATE_SEL_8812F) 17622 #define BITS_STATE_SEL_8812F \ 17623 (BIT_MASK_STATE_SEL_8812F << BIT_SHIFT_STATE_SEL_8812F) 17624 #define BIT_CLEAR_STATE_SEL_8812F(x) ((x) & (~BITS_STATE_SEL_8812F)) 17625 #define BIT_GET_STATE_SEL_8812F(x) \ 17626 (((x) >> BIT_SHIFT_STATE_SEL_8812F) & BIT_MASK_STATE_SEL_8812F) 17627 #define BIT_SET_STATE_SEL_8812F(x, v) \ 17628 (BIT_CLEAR_STATE_SEL_8812F(x) | BIT_STATE_SEL_8812F(v)) 17629 17630 #define BIT_SHIFT_STATE_INFO_8812F 8 17631 #define BIT_MASK_STATE_INFO_8812F 0xff 17632 #define BIT_STATE_INFO_8812F(x) \ 17633 (((x) & BIT_MASK_STATE_INFO_8812F) << BIT_SHIFT_STATE_INFO_8812F) 17634 #define BITS_STATE_INFO_8812F \ 17635 (BIT_MASK_STATE_INFO_8812F << BIT_SHIFT_STATE_INFO_8812F) 17636 #define BIT_CLEAR_STATE_INFO_8812F(x) ((x) & (~BITS_STATE_INFO_8812F)) 17637 #define BIT_GET_STATE_INFO_8812F(x) \ 17638 (((x) >> BIT_SHIFT_STATE_INFO_8812F) & BIT_MASK_STATE_INFO_8812F) 17639 #define BIT_SET_STATE_INFO_8812F(x, v) \ 17640 (BIT_CLEAR_STATE_INFO_8812F(x) | BIT_STATE_INFO_8812F(v)) 17641 17642 #define BIT_UPD_NXT_STATE_8812F BIT(7) 17643 17644 #define BIT_SHIFT_CUR_STATE_8812F 0 17645 #define BIT_MASK_CUR_STATE_8812F 0x7f 17646 #define BIT_CUR_STATE_8812F(x) \ 17647 (((x) & BIT_MASK_CUR_STATE_8812F) << BIT_SHIFT_CUR_STATE_8812F) 17648 #define BITS_CUR_STATE_8812F \ 17649 (BIT_MASK_CUR_STATE_8812F << BIT_SHIFT_CUR_STATE_8812F) 17650 #define BIT_CLEAR_CUR_STATE_8812F(x) ((x) & (~BITS_CUR_STATE_8812F)) 17651 #define BIT_GET_CUR_STATE_8812F(x) \ 17652 (((x) >> BIT_SHIFT_CUR_STATE_8812F) & BIT_MASK_CUR_STATE_8812F) 17653 #define BIT_SET_CUR_STATE_8812F(x, v) \ 17654 (BIT_CLEAR_CUR_STATE_8812F(x) | BIT_CUR_STATE_8812F(v)) 17655 17656 /* 2 REG_ERROR_MON_8812F */ 17657 #define BIT_CSIRPT_LEN_BB_MORE_THAN_MAC_8812F BIT(23) 17658 #define BIT_CSI_CHKSUM_ERROR_8812F BIT(22) 17659 #define BIT_MACRX_ERR_4_8812F BIT(20) 17660 #define BIT_MACRX_ERR_3_8812F BIT(19) 17661 #define BIT_MACRX_ERR_2_8812F BIT(18) 17662 #define BIT_MACRX_ERR_1_8812F BIT(17) 17663 #define BIT_MACRX_ERR_0_8812F BIT(16) 17664 #define BIT_WMAC_PRETX_ERRHDL_EN_8812F BIT(15) 17665 #define BIT_MACTX_ERR_5_8812F BIT(5) 17666 #define BIT_MACTX_ERR_4_8812F BIT(4) 17667 #define BIT_MACTX_ERR_3_8812F BIT(3) 17668 #define BIT_MACTX_ERR_2_8812F BIT(2) 17669 #define BIT_MACTX_ERR_1_8812F BIT(1) 17670 #define BIT_MACTX_ERR_0_8812F BIT(0) 17671 17672 /* 2 REG_SEARCH_MACID_8812F */ 17673 #define BIT_EN_TXRPTBUF_CLK_8812F BIT(31) 17674 17675 #define BIT_SHIFT_INFO_INDEX_OFFSET_8812F 16 17676 #define BIT_MASK_INFO_INDEX_OFFSET_8812F 0x1fff 17677 #define BIT_INFO_INDEX_OFFSET_8812F(x) \ 17678 (((x) & BIT_MASK_INFO_INDEX_OFFSET_8812F) \ 17679 << BIT_SHIFT_INFO_INDEX_OFFSET_8812F) 17680 #define BITS_INFO_INDEX_OFFSET_8812F \ 17681 (BIT_MASK_INFO_INDEX_OFFSET_8812F << BIT_SHIFT_INFO_INDEX_OFFSET_8812F) 17682 #define BIT_CLEAR_INFO_INDEX_OFFSET_8812F(x) \ 17683 ((x) & (~BITS_INFO_INDEX_OFFSET_8812F)) 17684 #define BIT_GET_INFO_INDEX_OFFSET_8812F(x) \ 17685 (((x) >> BIT_SHIFT_INFO_INDEX_OFFSET_8812F) & \ 17686 BIT_MASK_INFO_INDEX_OFFSET_8812F) 17687 #define BIT_SET_INFO_INDEX_OFFSET_8812F(x, v) \ 17688 (BIT_CLEAR_INFO_INDEX_OFFSET_8812F(x) | BIT_INFO_INDEX_OFFSET_8812F(v)) 17689 17690 #define BIT_WMAC_SRCH_FIFOFULL_8812F BIT(15) 17691 #define BIT_DIS_INFOSRCH_8812F BIT(14) 17692 17693 #define BIT_SHIFT_INFO_ADDR_OFFSET_8812F 0 17694 #define BIT_MASK_INFO_ADDR_OFFSET_8812F 0x1fff 17695 #define BIT_INFO_ADDR_OFFSET_8812F(x) \ 17696 (((x) & BIT_MASK_INFO_ADDR_OFFSET_8812F) \ 17697 << BIT_SHIFT_INFO_ADDR_OFFSET_8812F) 17698 #define BITS_INFO_ADDR_OFFSET_8812F \ 17699 (BIT_MASK_INFO_ADDR_OFFSET_8812F << BIT_SHIFT_INFO_ADDR_OFFSET_8812F) 17700 #define BIT_CLEAR_INFO_ADDR_OFFSET_8812F(x) \ 17701 ((x) & (~BITS_INFO_ADDR_OFFSET_8812F)) 17702 #define BIT_GET_INFO_ADDR_OFFSET_8812F(x) \ 17703 (((x) >> BIT_SHIFT_INFO_ADDR_OFFSET_8812F) & \ 17704 BIT_MASK_INFO_ADDR_OFFSET_8812F) 17705 #define BIT_SET_INFO_ADDR_OFFSET_8812F(x, v) \ 17706 (BIT_CLEAR_INFO_ADDR_OFFSET_8812F(x) | BIT_INFO_ADDR_OFFSET_8812F(v)) 17707 17708 /* 2 REG_BT_COEX_TABLE_8812F (BT-COEXISTENCE CONTROL REGISTER) */ 17709 17710 #define BIT_SHIFT_COEX_TABLE_1_8812F 0 17711 #define BIT_MASK_COEX_TABLE_1_8812F 0xffffffffL 17712 #define BIT_COEX_TABLE_1_8812F(x) \ 17713 (((x) & BIT_MASK_COEX_TABLE_1_8812F) << BIT_SHIFT_COEX_TABLE_1_8812F) 17714 #define BITS_COEX_TABLE_1_8812F \ 17715 (BIT_MASK_COEX_TABLE_1_8812F << BIT_SHIFT_COEX_TABLE_1_8812F) 17716 #define BIT_CLEAR_COEX_TABLE_1_8812F(x) ((x) & (~BITS_COEX_TABLE_1_8812F)) 17717 #define BIT_GET_COEX_TABLE_1_8812F(x) \ 17718 (((x) >> BIT_SHIFT_COEX_TABLE_1_8812F) & BIT_MASK_COEX_TABLE_1_8812F) 17719 #define BIT_SET_COEX_TABLE_1_8812F(x, v) \ 17720 (BIT_CLEAR_COEX_TABLE_1_8812F(x) | BIT_COEX_TABLE_1_8812F(v)) 17721 17722 /* 2 REG_BT_COEX_TABLE2_8812F (BT-COEXISTENCE CONTROL REGISTER) */ 17723 17724 #define BIT_SHIFT_COEX_TABLE_2_8812F 0 17725 #define BIT_MASK_COEX_TABLE_2_8812F 0xffffffffL 17726 #define BIT_COEX_TABLE_2_8812F(x) \ 17727 (((x) & BIT_MASK_COEX_TABLE_2_8812F) << BIT_SHIFT_COEX_TABLE_2_8812F) 17728 #define BITS_COEX_TABLE_2_8812F \ 17729 (BIT_MASK_COEX_TABLE_2_8812F << BIT_SHIFT_COEX_TABLE_2_8812F) 17730 #define BIT_CLEAR_COEX_TABLE_2_8812F(x) ((x) & (~BITS_COEX_TABLE_2_8812F)) 17731 #define BIT_GET_COEX_TABLE_2_8812F(x) \ 17732 (((x) >> BIT_SHIFT_COEX_TABLE_2_8812F) & BIT_MASK_COEX_TABLE_2_8812F) 17733 #define BIT_SET_COEX_TABLE_2_8812F(x, v) \ 17734 (BIT_CLEAR_COEX_TABLE_2_8812F(x) | BIT_COEX_TABLE_2_8812F(v)) 17735 17736 /* 2 REG_BT_COEX_BREAK_TABLE_8812F (BT-COEXISTENCE CONTROL REGISTER) */ 17737 17738 #define BIT_SHIFT_BREAK_TABLE_2_8812F 16 17739 #define BIT_MASK_BREAK_TABLE_2_8812F 0xffff 17740 #define BIT_BREAK_TABLE_2_8812F(x) \ 17741 (((x) & BIT_MASK_BREAK_TABLE_2_8812F) << BIT_SHIFT_BREAK_TABLE_2_8812F) 17742 #define BITS_BREAK_TABLE_2_8812F \ 17743 (BIT_MASK_BREAK_TABLE_2_8812F << BIT_SHIFT_BREAK_TABLE_2_8812F) 17744 #define BIT_CLEAR_BREAK_TABLE_2_8812F(x) ((x) & (~BITS_BREAK_TABLE_2_8812F)) 17745 #define BIT_GET_BREAK_TABLE_2_8812F(x) \ 17746 (((x) >> BIT_SHIFT_BREAK_TABLE_2_8812F) & BIT_MASK_BREAK_TABLE_2_8812F) 17747 #define BIT_SET_BREAK_TABLE_2_8812F(x, v) \ 17748 (BIT_CLEAR_BREAK_TABLE_2_8812F(x) | BIT_BREAK_TABLE_2_8812F(v)) 17749 17750 #define BIT_SHIFT_BREAK_TABLE_1_8812F 0 17751 #define BIT_MASK_BREAK_TABLE_1_8812F 0xffff 17752 #define BIT_BREAK_TABLE_1_8812F(x) \ 17753 (((x) & BIT_MASK_BREAK_TABLE_1_8812F) << BIT_SHIFT_BREAK_TABLE_1_8812F) 17754 #define BITS_BREAK_TABLE_1_8812F \ 17755 (BIT_MASK_BREAK_TABLE_1_8812F << BIT_SHIFT_BREAK_TABLE_1_8812F) 17756 #define BIT_CLEAR_BREAK_TABLE_1_8812F(x) ((x) & (~BITS_BREAK_TABLE_1_8812F)) 17757 #define BIT_GET_BREAK_TABLE_1_8812F(x) \ 17758 (((x) >> BIT_SHIFT_BREAK_TABLE_1_8812F) & BIT_MASK_BREAK_TABLE_1_8812F) 17759 #define BIT_SET_BREAK_TABLE_1_8812F(x, v) \ 17760 (BIT_CLEAR_BREAK_TABLE_1_8812F(x) | BIT_BREAK_TABLE_1_8812F(v)) 17761 17762 /* 2 REG_BT_COEX_TABLE_H_8812F (BT-COEXISTENCE CONTROL REGISTER) */ 17763 #define BIT_PRI_MASK_RX_RESP_V1_8812F BIT(30) 17764 #define BIT_PRI_MASK_RXOFDM_V1_8812F BIT(29) 17765 #define BIT_PRI_MASK_RXCCK_V1_8812F BIT(28) 17766 17767 #define BIT_SHIFT_PRI_MASK_TXAC_8812F 21 17768 #define BIT_MASK_PRI_MASK_TXAC_8812F 0x7f 17769 #define BIT_PRI_MASK_TXAC_8812F(x) \ 17770 (((x) & BIT_MASK_PRI_MASK_TXAC_8812F) << BIT_SHIFT_PRI_MASK_TXAC_8812F) 17771 #define BITS_PRI_MASK_TXAC_8812F \ 17772 (BIT_MASK_PRI_MASK_TXAC_8812F << BIT_SHIFT_PRI_MASK_TXAC_8812F) 17773 #define BIT_CLEAR_PRI_MASK_TXAC_8812F(x) ((x) & (~BITS_PRI_MASK_TXAC_8812F)) 17774 #define BIT_GET_PRI_MASK_TXAC_8812F(x) \ 17775 (((x) >> BIT_SHIFT_PRI_MASK_TXAC_8812F) & BIT_MASK_PRI_MASK_TXAC_8812F) 17776 #define BIT_SET_PRI_MASK_TXAC_8812F(x, v) \ 17777 (BIT_CLEAR_PRI_MASK_TXAC_8812F(x) | BIT_PRI_MASK_TXAC_8812F(v)) 17778 17779 #define BIT_SHIFT_PRI_MASK_NAV_8812F 13 17780 #define BIT_MASK_PRI_MASK_NAV_8812F 0xff 17781 #define BIT_PRI_MASK_NAV_8812F(x) \ 17782 (((x) & BIT_MASK_PRI_MASK_NAV_8812F) << BIT_SHIFT_PRI_MASK_NAV_8812F) 17783 #define BITS_PRI_MASK_NAV_8812F \ 17784 (BIT_MASK_PRI_MASK_NAV_8812F << BIT_SHIFT_PRI_MASK_NAV_8812F) 17785 #define BIT_CLEAR_PRI_MASK_NAV_8812F(x) ((x) & (~BITS_PRI_MASK_NAV_8812F)) 17786 #define BIT_GET_PRI_MASK_NAV_8812F(x) \ 17787 (((x) >> BIT_SHIFT_PRI_MASK_NAV_8812F) & BIT_MASK_PRI_MASK_NAV_8812F) 17788 #define BIT_SET_PRI_MASK_NAV_8812F(x, v) \ 17789 (BIT_CLEAR_PRI_MASK_NAV_8812F(x) | BIT_PRI_MASK_NAV_8812F(v)) 17790 17791 #define BIT_PRI_MASK_CCK_V1_8812F BIT(12) 17792 #define BIT_PRI_MASK_OFDM_V1_8812F BIT(11) 17793 #define BIT_PRI_MASK_RTY_V1_8812F BIT(10) 17794 17795 #define BIT_SHIFT_PRI_MASK_NUM_8812F 6 17796 #define BIT_MASK_PRI_MASK_NUM_8812F 0xf 17797 #define BIT_PRI_MASK_NUM_8812F(x) \ 17798 (((x) & BIT_MASK_PRI_MASK_NUM_8812F) << BIT_SHIFT_PRI_MASK_NUM_8812F) 17799 #define BITS_PRI_MASK_NUM_8812F \ 17800 (BIT_MASK_PRI_MASK_NUM_8812F << BIT_SHIFT_PRI_MASK_NUM_8812F) 17801 #define BIT_CLEAR_PRI_MASK_NUM_8812F(x) ((x) & (~BITS_PRI_MASK_NUM_8812F)) 17802 #define BIT_GET_PRI_MASK_NUM_8812F(x) \ 17803 (((x) >> BIT_SHIFT_PRI_MASK_NUM_8812F) & BIT_MASK_PRI_MASK_NUM_8812F) 17804 #define BIT_SET_PRI_MASK_NUM_8812F(x, v) \ 17805 (BIT_CLEAR_PRI_MASK_NUM_8812F(x) | BIT_PRI_MASK_NUM_8812F(v)) 17806 17807 #define BIT_SHIFT_PRI_MASK_TYPE_8812F 2 17808 #define BIT_MASK_PRI_MASK_TYPE_8812F 0xf 17809 #define BIT_PRI_MASK_TYPE_8812F(x) \ 17810 (((x) & BIT_MASK_PRI_MASK_TYPE_8812F) << BIT_SHIFT_PRI_MASK_TYPE_8812F) 17811 #define BITS_PRI_MASK_TYPE_8812F \ 17812 (BIT_MASK_PRI_MASK_TYPE_8812F << BIT_SHIFT_PRI_MASK_TYPE_8812F) 17813 #define BIT_CLEAR_PRI_MASK_TYPE_8812F(x) ((x) & (~BITS_PRI_MASK_TYPE_8812F)) 17814 #define BIT_GET_PRI_MASK_TYPE_8812F(x) \ 17815 (((x) >> BIT_SHIFT_PRI_MASK_TYPE_8812F) & BIT_MASK_PRI_MASK_TYPE_8812F) 17816 #define BIT_SET_PRI_MASK_TYPE_8812F(x, v) \ 17817 (BIT_CLEAR_PRI_MASK_TYPE_8812F(x) | BIT_PRI_MASK_TYPE_8812F(v)) 17818 17819 #define BIT_OOB_V1_8812F BIT(1) 17820 #define BIT_ANT_SEL_V1_8812F BIT(0) 17821 17822 /* 2 REG_RXCMD_0_8812F */ 17823 #define BIT_RXCMD_EN_8812F BIT(31) 17824 17825 #define BIT_SHIFT_RXCMD_INFO_8812F 0 17826 #define BIT_MASK_RXCMD_INFO_8812F 0x7fffffffL 17827 #define BIT_RXCMD_INFO_8812F(x) \ 17828 (((x) & BIT_MASK_RXCMD_INFO_8812F) << BIT_SHIFT_RXCMD_INFO_8812F) 17829 #define BITS_RXCMD_INFO_8812F \ 17830 (BIT_MASK_RXCMD_INFO_8812F << BIT_SHIFT_RXCMD_INFO_8812F) 17831 #define BIT_CLEAR_RXCMD_INFO_8812F(x) ((x) & (~BITS_RXCMD_INFO_8812F)) 17832 #define BIT_GET_RXCMD_INFO_8812F(x) \ 17833 (((x) >> BIT_SHIFT_RXCMD_INFO_8812F) & BIT_MASK_RXCMD_INFO_8812F) 17834 #define BIT_SET_RXCMD_INFO_8812F(x, v) \ 17835 (BIT_CLEAR_RXCMD_INFO_8812F(x) | BIT_RXCMD_INFO_8812F(v)) 17836 17837 /* 2 REG_RXCMD_1_8812F */ 17838 17839 #define BIT_SHIFT_RXCMD_PRD_8812F 0 17840 #define BIT_MASK_RXCMD_PRD_8812F 0xffff 17841 #define BIT_RXCMD_PRD_8812F(x) \ 17842 (((x) & BIT_MASK_RXCMD_PRD_8812F) << BIT_SHIFT_RXCMD_PRD_8812F) 17843 #define BITS_RXCMD_PRD_8812F \ 17844 (BIT_MASK_RXCMD_PRD_8812F << BIT_SHIFT_RXCMD_PRD_8812F) 17845 #define BIT_CLEAR_RXCMD_PRD_8812F(x) ((x) & (~BITS_RXCMD_PRD_8812F)) 17846 #define BIT_GET_RXCMD_PRD_8812F(x) \ 17847 (((x) >> BIT_SHIFT_RXCMD_PRD_8812F) & BIT_MASK_RXCMD_PRD_8812F) 17848 #define BIT_SET_RXCMD_PRD_8812F(x, v) \ 17849 (BIT_CLEAR_RXCMD_PRD_8812F(x) | BIT_RXCMD_PRD_8812F(v)) 17850 17851 /* 2 REG_WMAC_RESP_TXINFO_8812F (RESPONSE TXINFO REGISTER) */ 17852 17853 #define BIT_SHIFT_WMAC_RESP_MFB_8812F 25 17854 #define BIT_MASK_WMAC_RESP_MFB_8812F 0x7f 17855 #define BIT_WMAC_RESP_MFB_8812F(x) \ 17856 (((x) & BIT_MASK_WMAC_RESP_MFB_8812F) << BIT_SHIFT_WMAC_RESP_MFB_8812F) 17857 #define BITS_WMAC_RESP_MFB_8812F \ 17858 (BIT_MASK_WMAC_RESP_MFB_8812F << BIT_SHIFT_WMAC_RESP_MFB_8812F) 17859 #define BIT_CLEAR_WMAC_RESP_MFB_8812F(x) ((x) & (~BITS_WMAC_RESP_MFB_8812F)) 17860 #define BIT_GET_WMAC_RESP_MFB_8812F(x) \ 17861 (((x) >> BIT_SHIFT_WMAC_RESP_MFB_8812F) & BIT_MASK_WMAC_RESP_MFB_8812F) 17862 #define BIT_SET_WMAC_RESP_MFB_8812F(x, v) \ 17863 (BIT_CLEAR_WMAC_RESP_MFB_8812F(x) | BIT_WMAC_RESP_MFB_8812F(v)) 17864 17865 #define BIT_SHIFT_WMAC_ANTINF_SEL_8812F 23 17866 #define BIT_MASK_WMAC_ANTINF_SEL_8812F 0x3 17867 #define BIT_WMAC_ANTINF_SEL_8812F(x) \ 17868 (((x) & BIT_MASK_WMAC_ANTINF_SEL_8812F) \ 17869 << BIT_SHIFT_WMAC_ANTINF_SEL_8812F) 17870 #define BITS_WMAC_ANTINF_SEL_8812F \ 17871 (BIT_MASK_WMAC_ANTINF_SEL_8812F << BIT_SHIFT_WMAC_ANTINF_SEL_8812F) 17872 #define BIT_CLEAR_WMAC_ANTINF_SEL_8812F(x) ((x) & (~BITS_WMAC_ANTINF_SEL_8812F)) 17873 #define BIT_GET_WMAC_ANTINF_SEL_8812F(x) \ 17874 (((x) >> BIT_SHIFT_WMAC_ANTINF_SEL_8812F) & \ 17875 BIT_MASK_WMAC_ANTINF_SEL_8812F) 17876 #define BIT_SET_WMAC_ANTINF_SEL_8812F(x, v) \ 17877 (BIT_CLEAR_WMAC_ANTINF_SEL_8812F(x) | BIT_WMAC_ANTINF_SEL_8812F(v)) 17878 17879 #define BIT_SHIFT_WMAC_ANTSEL_SEL_8812F 21 17880 #define BIT_MASK_WMAC_ANTSEL_SEL_8812F 0x3 17881 #define BIT_WMAC_ANTSEL_SEL_8812F(x) \ 17882 (((x) & BIT_MASK_WMAC_ANTSEL_SEL_8812F) \ 17883 << BIT_SHIFT_WMAC_ANTSEL_SEL_8812F) 17884 #define BITS_WMAC_ANTSEL_SEL_8812F \ 17885 (BIT_MASK_WMAC_ANTSEL_SEL_8812F << BIT_SHIFT_WMAC_ANTSEL_SEL_8812F) 17886 #define BIT_CLEAR_WMAC_ANTSEL_SEL_8812F(x) ((x) & (~BITS_WMAC_ANTSEL_SEL_8812F)) 17887 #define BIT_GET_WMAC_ANTSEL_SEL_8812F(x) \ 17888 (((x) >> BIT_SHIFT_WMAC_ANTSEL_SEL_8812F) & \ 17889 BIT_MASK_WMAC_ANTSEL_SEL_8812F) 17890 #define BIT_SET_WMAC_ANTSEL_SEL_8812F(x, v) \ 17891 (BIT_CLEAR_WMAC_ANTSEL_SEL_8812F(x) | BIT_WMAC_ANTSEL_SEL_8812F(v)) 17892 17893 #define BIT_SHIFT_WMAC_RESP_TXPOWER_OFFSET_TYPE_8812F 18 17894 #define BIT_MASK_WMAC_RESP_TXPOWER_OFFSET_TYPE_8812F 0x3 17895 #define BIT_WMAC_RESP_TXPOWER_OFFSET_TYPE_8812F(x) \ 17896 (((x) & BIT_MASK_WMAC_RESP_TXPOWER_OFFSET_TYPE_8812F) \ 17897 << BIT_SHIFT_WMAC_RESP_TXPOWER_OFFSET_TYPE_8812F) 17898 #define BITS_WMAC_RESP_TXPOWER_OFFSET_TYPE_8812F \ 17899 (BIT_MASK_WMAC_RESP_TXPOWER_OFFSET_TYPE_8812F \ 17900 << BIT_SHIFT_WMAC_RESP_TXPOWER_OFFSET_TYPE_8812F) 17901 #define BIT_CLEAR_WMAC_RESP_TXPOWER_OFFSET_TYPE_8812F(x) \ 17902 ((x) & (~BITS_WMAC_RESP_TXPOWER_OFFSET_TYPE_8812F)) 17903 #define BIT_GET_WMAC_RESP_TXPOWER_OFFSET_TYPE_8812F(x) \ 17904 (((x) >> BIT_SHIFT_WMAC_RESP_TXPOWER_OFFSET_TYPE_8812F) & \ 17905 BIT_MASK_WMAC_RESP_TXPOWER_OFFSET_TYPE_8812F) 17906 #define BIT_SET_WMAC_RESP_TXPOWER_OFFSET_TYPE_8812F(x, v) \ 17907 (BIT_CLEAR_WMAC_RESP_TXPOWER_OFFSET_TYPE_8812F(x) | \ 17908 BIT_WMAC_RESP_TXPOWER_OFFSET_TYPE_8812F(v)) 17909 17910 #define BIT_SHIFT_WMAC_RESP_TXANT_V1_8812F 6 17911 #define BIT_MASK_WMAC_RESP_TXANT_V1_8812F 0xfff 17912 #define BIT_WMAC_RESP_TXANT_V1_8812F(x) \ 17913 (((x) & BIT_MASK_WMAC_RESP_TXANT_V1_8812F) \ 17914 << BIT_SHIFT_WMAC_RESP_TXANT_V1_8812F) 17915 #define BITS_WMAC_RESP_TXANT_V1_8812F \ 17916 (BIT_MASK_WMAC_RESP_TXANT_V1_8812F \ 17917 << BIT_SHIFT_WMAC_RESP_TXANT_V1_8812F) 17918 #define BIT_CLEAR_WMAC_RESP_TXANT_V1_8812F(x) \ 17919 ((x) & (~BITS_WMAC_RESP_TXANT_V1_8812F)) 17920 #define BIT_GET_WMAC_RESP_TXANT_V1_8812F(x) \ 17921 (((x) >> BIT_SHIFT_WMAC_RESP_TXANT_V1_8812F) & \ 17922 BIT_MASK_WMAC_RESP_TXANT_V1_8812F) 17923 #define BIT_SET_WMAC_RESP_TXANT_V1_8812F(x, v) \ 17924 (BIT_CLEAR_WMAC_RESP_TXANT_V1_8812F(x) | \ 17925 BIT_WMAC_RESP_TXANT_V1_8812F(v)) 17926 17927 /* 2 REG_BBPSF_CTRL_8812F */ 17928 #define BIT_CTL_IDLE_CLR_CSI_RPT_8812F BIT(31) 17929 #define BIT_WMAC_USE_NDPARATE_8812F BIT(30) 17930 17931 #define BIT_SHIFT_WMAC_CSI_RATE_8812F 24 17932 #define BIT_MASK_WMAC_CSI_RATE_8812F 0x3f 17933 #define BIT_WMAC_CSI_RATE_8812F(x) \ 17934 (((x) & BIT_MASK_WMAC_CSI_RATE_8812F) << BIT_SHIFT_WMAC_CSI_RATE_8812F) 17935 #define BITS_WMAC_CSI_RATE_8812F \ 17936 (BIT_MASK_WMAC_CSI_RATE_8812F << BIT_SHIFT_WMAC_CSI_RATE_8812F) 17937 #define BIT_CLEAR_WMAC_CSI_RATE_8812F(x) ((x) & (~BITS_WMAC_CSI_RATE_8812F)) 17938 #define BIT_GET_WMAC_CSI_RATE_8812F(x) \ 17939 (((x) >> BIT_SHIFT_WMAC_CSI_RATE_8812F) & BIT_MASK_WMAC_CSI_RATE_8812F) 17940 #define BIT_SET_WMAC_CSI_RATE_8812F(x, v) \ 17941 (BIT_CLEAR_WMAC_CSI_RATE_8812F(x) | BIT_WMAC_CSI_RATE_8812F(v)) 17942 17943 #define BIT_SHIFT_WMAC_RESP_TXRATE_8812F 16 17944 #define BIT_MASK_WMAC_RESP_TXRATE_8812F 0xff 17945 #define BIT_WMAC_RESP_TXRATE_8812F(x) \ 17946 (((x) & BIT_MASK_WMAC_RESP_TXRATE_8812F) \ 17947 << BIT_SHIFT_WMAC_RESP_TXRATE_8812F) 17948 #define BITS_WMAC_RESP_TXRATE_8812F \ 17949 (BIT_MASK_WMAC_RESP_TXRATE_8812F << BIT_SHIFT_WMAC_RESP_TXRATE_8812F) 17950 #define BIT_CLEAR_WMAC_RESP_TXRATE_8812F(x) \ 17951 ((x) & (~BITS_WMAC_RESP_TXRATE_8812F)) 17952 #define BIT_GET_WMAC_RESP_TXRATE_8812F(x) \ 17953 (((x) >> BIT_SHIFT_WMAC_RESP_TXRATE_8812F) & \ 17954 BIT_MASK_WMAC_RESP_TXRATE_8812F) 17955 #define BIT_SET_WMAC_RESP_TXRATE_8812F(x, v) \ 17956 (BIT_CLEAR_WMAC_RESP_TXRATE_8812F(x) | BIT_WMAC_RESP_TXRATE_8812F(v)) 17957 17958 #define BIT_SHIFT_CSI_RSC_8812F 13 17959 #define BIT_MASK_CSI_RSC_8812F 0x3 17960 #define BIT_CSI_RSC_8812F(x) \ 17961 (((x) & BIT_MASK_CSI_RSC_8812F) << BIT_SHIFT_CSI_RSC_8812F) 17962 #define BITS_CSI_RSC_8812F (BIT_MASK_CSI_RSC_8812F << BIT_SHIFT_CSI_RSC_8812F) 17963 #define BIT_CLEAR_CSI_RSC_8812F(x) ((x) & (~BITS_CSI_RSC_8812F)) 17964 #define BIT_GET_CSI_RSC_8812F(x) \ 17965 (((x) >> BIT_SHIFT_CSI_RSC_8812F) & BIT_MASK_CSI_RSC_8812F) 17966 #define BIT_SET_CSI_RSC_8812F(x, v) \ 17967 (BIT_CLEAR_CSI_RSC_8812F(x) | BIT_CSI_RSC_8812F(v)) 17968 17969 #define BIT_CSI_GID_SEL_8812F BIT(12) 17970 #define BIT_NDPVLD_PROTECT_RDRDY_DIS_8812F BIT(9) 17971 #define BIT_RDCSI_EMPTY_APPZERO_8812F BIT(8) 17972 #define BIT_CSI_RATE_FB_EN_8812F BIT(7) 17973 #define BIT_RXFIFO_WRPTR_WO_CHKSUM_8812F BIT(6) 17974 17975 /* 2 REG_P2P_RX_BCN_NOA_8812F (P2P RX BEACON NOA REGISTER) */ 17976 #define BIT_NOA_PARSER_EN_8812F BIT(15) 17977 17978 #define BIT_SHIFT_BSSID_SEL_V1_8812F 12 17979 #define BIT_MASK_BSSID_SEL_V1_8812F 0x7 17980 #define BIT_BSSID_SEL_V1_8812F(x) \ 17981 (((x) & BIT_MASK_BSSID_SEL_V1_8812F) << BIT_SHIFT_BSSID_SEL_V1_8812F) 17982 #define BITS_BSSID_SEL_V1_8812F \ 17983 (BIT_MASK_BSSID_SEL_V1_8812F << BIT_SHIFT_BSSID_SEL_V1_8812F) 17984 #define BIT_CLEAR_BSSID_SEL_V1_8812F(x) ((x) & (~BITS_BSSID_SEL_V1_8812F)) 17985 #define BIT_GET_BSSID_SEL_V1_8812F(x) \ 17986 (((x) >> BIT_SHIFT_BSSID_SEL_V1_8812F) & BIT_MASK_BSSID_SEL_V1_8812F) 17987 #define BIT_SET_BSSID_SEL_V1_8812F(x, v) \ 17988 (BIT_CLEAR_BSSID_SEL_V1_8812F(x) | BIT_BSSID_SEL_V1_8812F(v)) 17989 17990 #define BIT_SHIFT_P2P_OUI_TYPE_8812F 0 17991 #define BIT_MASK_P2P_OUI_TYPE_8812F 0xff 17992 #define BIT_P2P_OUI_TYPE_8812F(x) \ 17993 (((x) & BIT_MASK_P2P_OUI_TYPE_8812F) << BIT_SHIFT_P2P_OUI_TYPE_8812F) 17994 #define BITS_P2P_OUI_TYPE_8812F \ 17995 (BIT_MASK_P2P_OUI_TYPE_8812F << BIT_SHIFT_P2P_OUI_TYPE_8812F) 17996 #define BIT_CLEAR_P2P_OUI_TYPE_8812F(x) ((x) & (~BITS_P2P_OUI_TYPE_8812F)) 17997 #define BIT_GET_P2P_OUI_TYPE_8812F(x) \ 17998 (((x) >> BIT_SHIFT_P2P_OUI_TYPE_8812F) & BIT_MASK_P2P_OUI_TYPE_8812F) 17999 #define BIT_SET_P2P_OUI_TYPE_8812F(x, v) \ 18000 (BIT_CLEAR_P2P_OUI_TYPE_8812F(x) | BIT_P2P_OUI_TYPE_8812F(v)) 18001 18002 /* 2 REG_RSVD_8812F */ 18003 18004 /* 2 REG_ASSOCIATED_BFMER0_INFO_8812F (ASSOCIATED BEAMFORMER0 INFO REGISTER) */ 18005 18006 #define BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R0_V1_8812F 0 18007 #define BIT_MASK_R_WMAC_SOUNDING_RXADD_R0_V1_8812F 0xffffffffL 18008 #define BIT_R_WMAC_SOUNDING_RXADD_R0_V1_8812F(x) \ 18009 (((x) & BIT_MASK_R_WMAC_SOUNDING_RXADD_R0_V1_8812F) \ 18010 << BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R0_V1_8812F) 18011 #define BITS_R_WMAC_SOUNDING_RXADD_R0_V1_8812F \ 18012 (BIT_MASK_R_WMAC_SOUNDING_RXADD_R0_V1_8812F \ 18013 << BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R0_V1_8812F) 18014 #define BIT_CLEAR_R_WMAC_SOUNDING_RXADD_R0_V1_8812F(x) \ 18015 ((x) & (~BITS_R_WMAC_SOUNDING_RXADD_R0_V1_8812F)) 18016 #define BIT_GET_R_WMAC_SOUNDING_RXADD_R0_V1_8812F(x) \ 18017 (((x) >> BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R0_V1_8812F) & \ 18018 BIT_MASK_R_WMAC_SOUNDING_RXADD_R0_V1_8812F) 18019 #define BIT_SET_R_WMAC_SOUNDING_RXADD_R0_V1_8812F(x, v) \ 18020 (BIT_CLEAR_R_WMAC_SOUNDING_RXADD_R0_V1_8812F(x) | \ 18021 BIT_R_WMAC_SOUNDING_RXADD_R0_V1_8812F(v)) 18022 18023 /* 2 REG_ASSOCIATED_BFMER0_INFO_H_8812F */ 18024 18025 #define BIT_SHIFT_R_WMAC_TXCSI_AID0_8812F 16 18026 #define BIT_MASK_R_WMAC_TXCSI_AID0_8812F 0x1ff 18027 #define BIT_R_WMAC_TXCSI_AID0_8812F(x) \ 18028 (((x) & BIT_MASK_R_WMAC_TXCSI_AID0_8812F) \ 18029 << BIT_SHIFT_R_WMAC_TXCSI_AID0_8812F) 18030 #define BITS_R_WMAC_TXCSI_AID0_8812F \ 18031 (BIT_MASK_R_WMAC_TXCSI_AID0_8812F << BIT_SHIFT_R_WMAC_TXCSI_AID0_8812F) 18032 #define BIT_CLEAR_R_WMAC_TXCSI_AID0_8812F(x) \ 18033 ((x) & (~BITS_R_WMAC_TXCSI_AID0_8812F)) 18034 #define BIT_GET_R_WMAC_TXCSI_AID0_8812F(x) \ 18035 (((x) >> BIT_SHIFT_R_WMAC_TXCSI_AID0_8812F) & \ 18036 BIT_MASK_R_WMAC_TXCSI_AID0_8812F) 18037 #define BIT_SET_R_WMAC_TXCSI_AID0_8812F(x, v) \ 18038 (BIT_CLEAR_R_WMAC_TXCSI_AID0_8812F(x) | BIT_R_WMAC_TXCSI_AID0_8812F(v)) 18039 18040 #define BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R0_H_V1_8812F 0 18041 #define BIT_MASK_R_WMAC_SOUNDING_RXADD_R0_H_V1_8812F 0xffff 18042 #define BIT_R_WMAC_SOUNDING_RXADD_R0_H_V1_8812F(x) \ 18043 (((x) & BIT_MASK_R_WMAC_SOUNDING_RXADD_R0_H_V1_8812F) \ 18044 << BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R0_H_V1_8812F) 18045 #define BITS_R_WMAC_SOUNDING_RXADD_R0_H_V1_8812F \ 18046 (BIT_MASK_R_WMAC_SOUNDING_RXADD_R0_H_V1_8812F \ 18047 << BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R0_H_V1_8812F) 18048 #define BIT_CLEAR_R_WMAC_SOUNDING_RXADD_R0_H_V1_8812F(x) \ 18049 ((x) & (~BITS_R_WMAC_SOUNDING_RXADD_R0_H_V1_8812F)) 18050 #define BIT_GET_R_WMAC_SOUNDING_RXADD_R0_H_V1_8812F(x) \ 18051 (((x) >> BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R0_H_V1_8812F) & \ 18052 BIT_MASK_R_WMAC_SOUNDING_RXADD_R0_H_V1_8812F) 18053 #define BIT_SET_R_WMAC_SOUNDING_RXADD_R0_H_V1_8812F(x, v) \ 18054 (BIT_CLEAR_R_WMAC_SOUNDING_RXADD_R0_H_V1_8812F(x) | \ 18055 BIT_R_WMAC_SOUNDING_RXADD_R0_H_V1_8812F(v)) 18056 18057 /* 2 REG_ASSOCIATED_BFMER1_INFO_8812F */ 18058 18059 #define BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R1_V1_8812F 0 18060 #define BIT_MASK_R_WMAC_SOUNDING_RXADD_R1_V1_8812F 0xffffffffL 18061 #define BIT_R_WMAC_SOUNDING_RXADD_R1_V1_8812F(x) \ 18062 (((x) & BIT_MASK_R_WMAC_SOUNDING_RXADD_R1_V1_8812F) \ 18063 << BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R1_V1_8812F) 18064 #define BITS_R_WMAC_SOUNDING_RXADD_R1_V1_8812F \ 18065 (BIT_MASK_R_WMAC_SOUNDING_RXADD_R1_V1_8812F \ 18066 << BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R1_V1_8812F) 18067 #define BIT_CLEAR_R_WMAC_SOUNDING_RXADD_R1_V1_8812F(x) \ 18068 ((x) & (~BITS_R_WMAC_SOUNDING_RXADD_R1_V1_8812F)) 18069 #define BIT_GET_R_WMAC_SOUNDING_RXADD_R1_V1_8812F(x) \ 18070 (((x) >> BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R1_V1_8812F) & \ 18071 BIT_MASK_R_WMAC_SOUNDING_RXADD_R1_V1_8812F) 18072 #define BIT_SET_R_WMAC_SOUNDING_RXADD_R1_V1_8812F(x, v) \ 18073 (BIT_CLEAR_R_WMAC_SOUNDING_RXADD_R1_V1_8812F(x) | \ 18074 BIT_R_WMAC_SOUNDING_RXADD_R1_V1_8812F(v)) 18075 18076 /* 2 REG_ASSOCIATED_BFMER1_INFO_H_8812F */ 18077 18078 #define BIT_SHIFT_R_WMAC_TXCSI_AID1_8812F 16 18079 #define BIT_MASK_R_WMAC_TXCSI_AID1_8812F 0x1ff 18080 #define BIT_R_WMAC_TXCSI_AID1_8812F(x) \ 18081 (((x) & BIT_MASK_R_WMAC_TXCSI_AID1_8812F) \ 18082 << BIT_SHIFT_R_WMAC_TXCSI_AID1_8812F) 18083 #define BITS_R_WMAC_TXCSI_AID1_8812F \ 18084 (BIT_MASK_R_WMAC_TXCSI_AID1_8812F << BIT_SHIFT_R_WMAC_TXCSI_AID1_8812F) 18085 #define BIT_CLEAR_R_WMAC_TXCSI_AID1_8812F(x) \ 18086 ((x) & (~BITS_R_WMAC_TXCSI_AID1_8812F)) 18087 #define BIT_GET_R_WMAC_TXCSI_AID1_8812F(x) \ 18088 (((x) >> BIT_SHIFT_R_WMAC_TXCSI_AID1_8812F) & \ 18089 BIT_MASK_R_WMAC_TXCSI_AID1_8812F) 18090 #define BIT_SET_R_WMAC_TXCSI_AID1_8812F(x, v) \ 18091 (BIT_CLEAR_R_WMAC_TXCSI_AID1_8812F(x) | BIT_R_WMAC_TXCSI_AID1_8812F(v)) 18092 18093 #define BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R1_H_V1_8812F 0 18094 #define BIT_MASK_R_WMAC_SOUNDING_RXADD_R1_H_V1_8812F 0xffff 18095 #define BIT_R_WMAC_SOUNDING_RXADD_R1_H_V1_8812F(x) \ 18096 (((x) & BIT_MASK_R_WMAC_SOUNDING_RXADD_R1_H_V1_8812F) \ 18097 << BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R1_H_V1_8812F) 18098 #define BITS_R_WMAC_SOUNDING_RXADD_R1_H_V1_8812F \ 18099 (BIT_MASK_R_WMAC_SOUNDING_RXADD_R1_H_V1_8812F \ 18100 << BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R1_H_V1_8812F) 18101 #define BIT_CLEAR_R_WMAC_SOUNDING_RXADD_R1_H_V1_8812F(x) \ 18102 ((x) & (~BITS_R_WMAC_SOUNDING_RXADD_R1_H_V1_8812F)) 18103 #define BIT_GET_R_WMAC_SOUNDING_RXADD_R1_H_V1_8812F(x) \ 18104 (((x) >> BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R1_H_V1_8812F) & \ 18105 BIT_MASK_R_WMAC_SOUNDING_RXADD_R1_H_V1_8812F) 18106 #define BIT_SET_R_WMAC_SOUNDING_RXADD_R1_H_V1_8812F(x, v) \ 18107 (BIT_CLEAR_R_WMAC_SOUNDING_RXADD_R1_H_V1_8812F(x) | \ 18108 BIT_R_WMAC_SOUNDING_RXADD_R1_H_V1_8812F(v)) 18109 18110 /* 2 REG_TX_CSI_RPT_PARAM_BW20_8812F (TX CSI REPORT PARAMETER REGISTER) */ 18111 18112 #define BIT_SHIFT_R_WMAC_BFINFO_20M_1_8812F 16 18113 #define BIT_MASK_R_WMAC_BFINFO_20M_1_8812F 0xfff 18114 #define BIT_R_WMAC_BFINFO_20M_1_8812F(x) \ 18115 (((x) & BIT_MASK_R_WMAC_BFINFO_20M_1_8812F) \ 18116 << BIT_SHIFT_R_WMAC_BFINFO_20M_1_8812F) 18117 #define BITS_R_WMAC_BFINFO_20M_1_8812F \ 18118 (BIT_MASK_R_WMAC_BFINFO_20M_1_8812F \ 18119 << BIT_SHIFT_R_WMAC_BFINFO_20M_1_8812F) 18120 #define BIT_CLEAR_R_WMAC_BFINFO_20M_1_8812F(x) \ 18121 ((x) & (~BITS_R_WMAC_BFINFO_20M_1_8812F)) 18122 #define BIT_GET_R_WMAC_BFINFO_20M_1_8812F(x) \ 18123 (((x) >> BIT_SHIFT_R_WMAC_BFINFO_20M_1_8812F) & \ 18124 BIT_MASK_R_WMAC_BFINFO_20M_1_8812F) 18125 #define BIT_SET_R_WMAC_BFINFO_20M_1_8812F(x, v) \ 18126 (BIT_CLEAR_R_WMAC_BFINFO_20M_1_8812F(x) | \ 18127 BIT_R_WMAC_BFINFO_20M_1_8812F(v)) 18128 18129 #define BIT_SHIFT_R_WMAC_BFINFO_20M_0_8812F 0 18130 #define BIT_MASK_R_WMAC_BFINFO_20M_0_8812F 0xfff 18131 #define BIT_R_WMAC_BFINFO_20M_0_8812F(x) \ 18132 (((x) & BIT_MASK_R_WMAC_BFINFO_20M_0_8812F) \ 18133 << BIT_SHIFT_R_WMAC_BFINFO_20M_0_8812F) 18134 #define BITS_R_WMAC_BFINFO_20M_0_8812F \ 18135 (BIT_MASK_R_WMAC_BFINFO_20M_0_8812F \ 18136 << BIT_SHIFT_R_WMAC_BFINFO_20M_0_8812F) 18137 #define BIT_CLEAR_R_WMAC_BFINFO_20M_0_8812F(x) \ 18138 ((x) & (~BITS_R_WMAC_BFINFO_20M_0_8812F)) 18139 #define BIT_GET_R_WMAC_BFINFO_20M_0_8812F(x) \ 18140 (((x) >> BIT_SHIFT_R_WMAC_BFINFO_20M_0_8812F) & \ 18141 BIT_MASK_R_WMAC_BFINFO_20M_0_8812F) 18142 #define BIT_SET_R_WMAC_BFINFO_20M_0_8812F(x, v) \ 18143 (BIT_CLEAR_R_WMAC_BFINFO_20M_0_8812F(x) | \ 18144 BIT_R_WMAC_BFINFO_20M_0_8812F(v)) 18145 18146 /* 2 REG_TX_CSI_RPT_PARAM_BW40_8812F (TX CSI REPORT PARAMETER_BW40 REGISTER) */ 18147 18148 #define BIT_SHIFT_WMAC_RESP_ANTD_8812F 12 18149 #define BIT_MASK_WMAC_RESP_ANTD_8812F 0xf 18150 #define BIT_WMAC_RESP_ANTD_8812F(x) \ 18151 (((x) & BIT_MASK_WMAC_RESP_ANTD_8812F) \ 18152 << BIT_SHIFT_WMAC_RESP_ANTD_8812F) 18153 #define BITS_WMAC_RESP_ANTD_8812F \ 18154 (BIT_MASK_WMAC_RESP_ANTD_8812F << BIT_SHIFT_WMAC_RESP_ANTD_8812F) 18155 #define BIT_CLEAR_WMAC_RESP_ANTD_8812F(x) ((x) & (~BITS_WMAC_RESP_ANTD_8812F)) 18156 #define BIT_GET_WMAC_RESP_ANTD_8812F(x) \ 18157 (((x) >> BIT_SHIFT_WMAC_RESP_ANTD_8812F) & \ 18158 BIT_MASK_WMAC_RESP_ANTD_8812F) 18159 #define BIT_SET_WMAC_RESP_ANTD_8812F(x, v) \ 18160 (BIT_CLEAR_WMAC_RESP_ANTD_8812F(x) | BIT_WMAC_RESP_ANTD_8812F(v)) 18161 18162 #define BIT_SHIFT_WMAC_RESP_ANTC_8812F 8 18163 #define BIT_MASK_WMAC_RESP_ANTC_8812F 0xf 18164 #define BIT_WMAC_RESP_ANTC_8812F(x) \ 18165 (((x) & BIT_MASK_WMAC_RESP_ANTC_8812F) \ 18166 << BIT_SHIFT_WMAC_RESP_ANTC_8812F) 18167 #define BITS_WMAC_RESP_ANTC_8812F \ 18168 (BIT_MASK_WMAC_RESP_ANTC_8812F << BIT_SHIFT_WMAC_RESP_ANTC_8812F) 18169 #define BIT_CLEAR_WMAC_RESP_ANTC_8812F(x) ((x) & (~BITS_WMAC_RESP_ANTC_8812F)) 18170 #define BIT_GET_WMAC_RESP_ANTC_8812F(x) \ 18171 (((x) >> BIT_SHIFT_WMAC_RESP_ANTC_8812F) & \ 18172 BIT_MASK_WMAC_RESP_ANTC_8812F) 18173 #define BIT_SET_WMAC_RESP_ANTC_8812F(x, v) \ 18174 (BIT_CLEAR_WMAC_RESP_ANTC_8812F(x) | BIT_WMAC_RESP_ANTC_8812F(v)) 18175 18176 #define BIT_SHIFT_WMAC_RESP_ANTB_8812F 4 18177 #define BIT_MASK_WMAC_RESP_ANTB_8812F 0xf 18178 #define BIT_WMAC_RESP_ANTB_8812F(x) \ 18179 (((x) & BIT_MASK_WMAC_RESP_ANTB_8812F) \ 18180 << BIT_SHIFT_WMAC_RESP_ANTB_8812F) 18181 #define BITS_WMAC_RESP_ANTB_8812F \ 18182 (BIT_MASK_WMAC_RESP_ANTB_8812F << BIT_SHIFT_WMAC_RESP_ANTB_8812F) 18183 #define BIT_CLEAR_WMAC_RESP_ANTB_8812F(x) ((x) & (~BITS_WMAC_RESP_ANTB_8812F)) 18184 #define BIT_GET_WMAC_RESP_ANTB_8812F(x) \ 18185 (((x) >> BIT_SHIFT_WMAC_RESP_ANTB_8812F) & \ 18186 BIT_MASK_WMAC_RESP_ANTB_8812F) 18187 #define BIT_SET_WMAC_RESP_ANTB_8812F(x, v) \ 18188 (BIT_CLEAR_WMAC_RESP_ANTB_8812F(x) | BIT_WMAC_RESP_ANTB_8812F(v)) 18189 18190 #define BIT_SHIFT_WMAC_RESP_ANTA_8812F 0 18191 #define BIT_MASK_WMAC_RESP_ANTA_8812F 0xf 18192 #define BIT_WMAC_RESP_ANTA_8812F(x) \ 18193 (((x) & BIT_MASK_WMAC_RESP_ANTA_8812F) \ 18194 << BIT_SHIFT_WMAC_RESP_ANTA_8812F) 18195 #define BITS_WMAC_RESP_ANTA_8812F \ 18196 (BIT_MASK_WMAC_RESP_ANTA_8812F << BIT_SHIFT_WMAC_RESP_ANTA_8812F) 18197 #define BIT_CLEAR_WMAC_RESP_ANTA_8812F(x) ((x) & (~BITS_WMAC_RESP_ANTA_8812F)) 18198 #define BIT_GET_WMAC_RESP_ANTA_8812F(x) \ 18199 (((x) >> BIT_SHIFT_WMAC_RESP_ANTA_8812F) & \ 18200 BIT_MASK_WMAC_RESP_ANTA_8812F) 18201 #define BIT_SET_WMAC_RESP_ANTA_8812F(x, v) \ 18202 (BIT_CLEAR_WMAC_RESP_ANTA_8812F(x) | BIT_WMAC_RESP_ANTA_8812F(v)) 18203 18204 /* 2 REG_CSI_PTR_8812F */ 18205 18206 #define BIT_SHIFT_CSI_RADDR_LATCH_V2_8812F 16 18207 #define BIT_MASK_CSI_RADDR_LATCH_V2_8812F 0xffff 18208 #define BIT_CSI_RADDR_LATCH_V2_8812F(x) \ 18209 (((x) & BIT_MASK_CSI_RADDR_LATCH_V2_8812F) \ 18210 << BIT_SHIFT_CSI_RADDR_LATCH_V2_8812F) 18211 #define BITS_CSI_RADDR_LATCH_V2_8812F \ 18212 (BIT_MASK_CSI_RADDR_LATCH_V2_8812F \ 18213 << BIT_SHIFT_CSI_RADDR_LATCH_V2_8812F) 18214 #define BIT_CLEAR_CSI_RADDR_LATCH_V2_8812F(x) \ 18215 ((x) & (~BITS_CSI_RADDR_LATCH_V2_8812F)) 18216 #define BIT_GET_CSI_RADDR_LATCH_V2_8812F(x) \ 18217 (((x) >> BIT_SHIFT_CSI_RADDR_LATCH_V2_8812F) & \ 18218 BIT_MASK_CSI_RADDR_LATCH_V2_8812F) 18219 #define BIT_SET_CSI_RADDR_LATCH_V2_8812F(x, v) \ 18220 (BIT_CLEAR_CSI_RADDR_LATCH_V2_8812F(x) | \ 18221 BIT_CSI_RADDR_LATCH_V2_8812F(v)) 18222 18223 #define BIT_SHIFT_CSI_WADDR_LATCH_V2_8812F 0 18224 #define BIT_MASK_CSI_WADDR_LATCH_V2_8812F 0xffff 18225 #define BIT_CSI_WADDR_LATCH_V2_8812F(x) \ 18226 (((x) & BIT_MASK_CSI_WADDR_LATCH_V2_8812F) \ 18227 << BIT_SHIFT_CSI_WADDR_LATCH_V2_8812F) 18228 #define BITS_CSI_WADDR_LATCH_V2_8812F \ 18229 (BIT_MASK_CSI_WADDR_LATCH_V2_8812F \ 18230 << BIT_SHIFT_CSI_WADDR_LATCH_V2_8812F) 18231 #define BIT_CLEAR_CSI_WADDR_LATCH_V2_8812F(x) \ 18232 ((x) & (~BITS_CSI_WADDR_LATCH_V2_8812F)) 18233 #define BIT_GET_CSI_WADDR_LATCH_V2_8812F(x) \ 18234 (((x) >> BIT_SHIFT_CSI_WADDR_LATCH_V2_8812F) & \ 18235 BIT_MASK_CSI_WADDR_LATCH_V2_8812F) 18236 #define BIT_SET_CSI_WADDR_LATCH_V2_8812F(x, v) \ 18237 (BIT_CLEAR_CSI_WADDR_LATCH_V2_8812F(x) | \ 18238 BIT_CSI_WADDR_LATCH_V2_8812F(v)) 18239 18240 /* 2 REG_BCN_PSR_RPT2_8812F (BEACON PARSER REPORT REGISTER2) */ 18241 18242 #define BIT_SHIFT_DTIM_CNT2_8812F 24 18243 #define BIT_MASK_DTIM_CNT2_8812F 0xff 18244 #define BIT_DTIM_CNT2_8812F(x) \ 18245 (((x) & BIT_MASK_DTIM_CNT2_8812F) << BIT_SHIFT_DTIM_CNT2_8812F) 18246 #define BITS_DTIM_CNT2_8812F \ 18247 (BIT_MASK_DTIM_CNT2_8812F << BIT_SHIFT_DTIM_CNT2_8812F) 18248 #define BIT_CLEAR_DTIM_CNT2_8812F(x) ((x) & (~BITS_DTIM_CNT2_8812F)) 18249 #define BIT_GET_DTIM_CNT2_8812F(x) \ 18250 (((x) >> BIT_SHIFT_DTIM_CNT2_8812F) & BIT_MASK_DTIM_CNT2_8812F) 18251 #define BIT_SET_DTIM_CNT2_8812F(x, v) \ 18252 (BIT_CLEAR_DTIM_CNT2_8812F(x) | BIT_DTIM_CNT2_8812F(v)) 18253 18254 #define BIT_SHIFT_DTIM_PERIOD2_8812F 16 18255 #define BIT_MASK_DTIM_PERIOD2_8812F 0xff 18256 #define BIT_DTIM_PERIOD2_8812F(x) \ 18257 (((x) & BIT_MASK_DTIM_PERIOD2_8812F) << BIT_SHIFT_DTIM_PERIOD2_8812F) 18258 #define BITS_DTIM_PERIOD2_8812F \ 18259 (BIT_MASK_DTIM_PERIOD2_8812F << BIT_SHIFT_DTIM_PERIOD2_8812F) 18260 #define BIT_CLEAR_DTIM_PERIOD2_8812F(x) ((x) & (~BITS_DTIM_PERIOD2_8812F)) 18261 #define BIT_GET_DTIM_PERIOD2_8812F(x) \ 18262 (((x) >> BIT_SHIFT_DTIM_PERIOD2_8812F) & BIT_MASK_DTIM_PERIOD2_8812F) 18263 #define BIT_SET_DTIM_PERIOD2_8812F(x, v) \ 18264 (BIT_CLEAR_DTIM_PERIOD2_8812F(x) | BIT_DTIM_PERIOD2_8812F(v)) 18265 18266 #define BIT_DTIM2_8812F BIT(15) 18267 #define BIT_TIM2_8812F BIT(14) 18268 #define BIT_RPT_VALID_8812F BIT(13) 18269 18270 #define BIT_SHIFT_PS_AID_2_8812F 0 18271 #define BIT_MASK_PS_AID_2_8812F 0x7ff 18272 #define BIT_PS_AID_2_8812F(x) \ 18273 (((x) & BIT_MASK_PS_AID_2_8812F) << BIT_SHIFT_PS_AID_2_8812F) 18274 #define BITS_PS_AID_2_8812F \ 18275 (BIT_MASK_PS_AID_2_8812F << BIT_SHIFT_PS_AID_2_8812F) 18276 #define BIT_CLEAR_PS_AID_2_8812F(x) ((x) & (~BITS_PS_AID_2_8812F)) 18277 #define BIT_GET_PS_AID_2_8812F(x) \ 18278 (((x) >> BIT_SHIFT_PS_AID_2_8812F) & BIT_MASK_PS_AID_2_8812F) 18279 #define BIT_SET_PS_AID_2_8812F(x, v) \ 18280 (BIT_CLEAR_PS_AID_2_8812F(x) | BIT_PS_AID_2_8812F(v)) 18281 18282 /* 2 REG_BCN_PSR_RPT3_8812F (BEACON PARSER REPORT REGISTER3) */ 18283 18284 #define BIT_SHIFT_DTIM_CNT3_8812F 24 18285 #define BIT_MASK_DTIM_CNT3_8812F 0xff 18286 #define BIT_DTIM_CNT3_8812F(x) \ 18287 (((x) & BIT_MASK_DTIM_CNT3_8812F) << BIT_SHIFT_DTIM_CNT3_8812F) 18288 #define BITS_DTIM_CNT3_8812F \ 18289 (BIT_MASK_DTIM_CNT3_8812F << BIT_SHIFT_DTIM_CNT3_8812F) 18290 #define BIT_CLEAR_DTIM_CNT3_8812F(x) ((x) & (~BITS_DTIM_CNT3_8812F)) 18291 #define BIT_GET_DTIM_CNT3_8812F(x) \ 18292 (((x) >> BIT_SHIFT_DTIM_CNT3_8812F) & BIT_MASK_DTIM_CNT3_8812F) 18293 #define BIT_SET_DTIM_CNT3_8812F(x, v) \ 18294 (BIT_CLEAR_DTIM_CNT3_8812F(x) | BIT_DTIM_CNT3_8812F(v)) 18295 18296 #define BIT_SHIFT_DTIM_PERIOD3_8812F 16 18297 #define BIT_MASK_DTIM_PERIOD3_8812F 0xff 18298 #define BIT_DTIM_PERIOD3_8812F(x) \ 18299 (((x) & BIT_MASK_DTIM_PERIOD3_8812F) << BIT_SHIFT_DTIM_PERIOD3_8812F) 18300 #define BITS_DTIM_PERIOD3_8812F \ 18301 (BIT_MASK_DTIM_PERIOD3_8812F << BIT_SHIFT_DTIM_PERIOD3_8812F) 18302 #define BIT_CLEAR_DTIM_PERIOD3_8812F(x) ((x) & (~BITS_DTIM_PERIOD3_8812F)) 18303 #define BIT_GET_DTIM_PERIOD3_8812F(x) \ 18304 (((x) >> BIT_SHIFT_DTIM_PERIOD3_8812F) & BIT_MASK_DTIM_PERIOD3_8812F) 18305 #define BIT_SET_DTIM_PERIOD3_8812F(x, v) \ 18306 (BIT_CLEAR_DTIM_PERIOD3_8812F(x) | BIT_DTIM_PERIOD3_8812F(v)) 18307 18308 #define BIT_DTIM3_8812F BIT(15) 18309 #define BIT_TIM3_8812F BIT(14) 18310 #define BIT_RPT_VALID_8812F BIT(13) 18311 18312 #define BIT_SHIFT_PS_AID_3_8812F 0 18313 #define BIT_MASK_PS_AID_3_8812F 0x7ff 18314 #define BIT_PS_AID_3_8812F(x) \ 18315 (((x) & BIT_MASK_PS_AID_3_8812F) << BIT_SHIFT_PS_AID_3_8812F) 18316 #define BITS_PS_AID_3_8812F \ 18317 (BIT_MASK_PS_AID_3_8812F << BIT_SHIFT_PS_AID_3_8812F) 18318 #define BIT_CLEAR_PS_AID_3_8812F(x) ((x) & (~BITS_PS_AID_3_8812F)) 18319 #define BIT_GET_PS_AID_3_8812F(x) \ 18320 (((x) >> BIT_SHIFT_PS_AID_3_8812F) & BIT_MASK_PS_AID_3_8812F) 18321 #define BIT_SET_PS_AID_3_8812F(x, v) \ 18322 (BIT_CLEAR_PS_AID_3_8812F(x) | BIT_PS_AID_3_8812F(v)) 18323 18324 /* 2 REG_BCN_PSR_RPT4_8812F (BEACON PARSER REPORT REGISTER4) */ 18325 18326 #define BIT_SHIFT_DTIM_CNT4_8812F 24 18327 #define BIT_MASK_DTIM_CNT4_8812F 0xff 18328 #define BIT_DTIM_CNT4_8812F(x) \ 18329 (((x) & BIT_MASK_DTIM_CNT4_8812F) << BIT_SHIFT_DTIM_CNT4_8812F) 18330 #define BITS_DTIM_CNT4_8812F \ 18331 (BIT_MASK_DTIM_CNT4_8812F << BIT_SHIFT_DTIM_CNT4_8812F) 18332 #define BIT_CLEAR_DTIM_CNT4_8812F(x) ((x) & (~BITS_DTIM_CNT4_8812F)) 18333 #define BIT_GET_DTIM_CNT4_8812F(x) \ 18334 (((x) >> BIT_SHIFT_DTIM_CNT4_8812F) & BIT_MASK_DTIM_CNT4_8812F) 18335 #define BIT_SET_DTIM_CNT4_8812F(x, v) \ 18336 (BIT_CLEAR_DTIM_CNT4_8812F(x) | BIT_DTIM_CNT4_8812F(v)) 18337 18338 #define BIT_SHIFT_DTIM_PERIOD4_8812F 16 18339 #define BIT_MASK_DTIM_PERIOD4_8812F 0xff 18340 #define BIT_DTIM_PERIOD4_8812F(x) \ 18341 (((x) & BIT_MASK_DTIM_PERIOD4_8812F) << BIT_SHIFT_DTIM_PERIOD4_8812F) 18342 #define BITS_DTIM_PERIOD4_8812F \ 18343 (BIT_MASK_DTIM_PERIOD4_8812F << BIT_SHIFT_DTIM_PERIOD4_8812F) 18344 #define BIT_CLEAR_DTIM_PERIOD4_8812F(x) ((x) & (~BITS_DTIM_PERIOD4_8812F)) 18345 #define BIT_GET_DTIM_PERIOD4_8812F(x) \ 18346 (((x) >> BIT_SHIFT_DTIM_PERIOD4_8812F) & BIT_MASK_DTIM_PERIOD4_8812F) 18347 #define BIT_SET_DTIM_PERIOD4_8812F(x, v) \ 18348 (BIT_CLEAR_DTIM_PERIOD4_8812F(x) | BIT_DTIM_PERIOD4_8812F(v)) 18349 18350 #define BIT_DTIM4_8812F BIT(15) 18351 #define BIT_TIM4_8812F BIT(14) 18352 #define BIT_RPT_VALID_8812F BIT(13) 18353 18354 #define BIT_SHIFT_PS_AID_4_8812F 0 18355 #define BIT_MASK_PS_AID_4_8812F 0x7ff 18356 #define BIT_PS_AID_4_8812F(x) \ 18357 (((x) & BIT_MASK_PS_AID_4_8812F) << BIT_SHIFT_PS_AID_4_8812F) 18358 #define BITS_PS_AID_4_8812F \ 18359 (BIT_MASK_PS_AID_4_8812F << BIT_SHIFT_PS_AID_4_8812F) 18360 #define BIT_CLEAR_PS_AID_4_8812F(x) ((x) & (~BITS_PS_AID_4_8812F)) 18361 #define BIT_GET_PS_AID_4_8812F(x) \ 18362 (((x) >> BIT_SHIFT_PS_AID_4_8812F) & BIT_MASK_PS_AID_4_8812F) 18363 #define BIT_SET_PS_AID_4_8812F(x, v) \ 18364 (BIT_CLEAR_PS_AID_4_8812F(x) | BIT_PS_AID_4_8812F(v)) 18365 18366 /* 2 REG_A1_ADDR_MASK_8812F (A1 ADDR MASK REGISTER) */ 18367 18368 #define BIT_SHIFT_A1_ADDR_MASK_8812F 0 18369 #define BIT_MASK_A1_ADDR_MASK_8812F 0xffffffffL 18370 #define BIT_A1_ADDR_MASK_8812F(x) \ 18371 (((x) & BIT_MASK_A1_ADDR_MASK_8812F) << BIT_SHIFT_A1_ADDR_MASK_8812F) 18372 #define BITS_A1_ADDR_MASK_8812F \ 18373 (BIT_MASK_A1_ADDR_MASK_8812F << BIT_SHIFT_A1_ADDR_MASK_8812F) 18374 #define BIT_CLEAR_A1_ADDR_MASK_8812F(x) ((x) & (~BITS_A1_ADDR_MASK_8812F)) 18375 #define BIT_GET_A1_ADDR_MASK_8812F(x) \ 18376 (((x) >> BIT_SHIFT_A1_ADDR_MASK_8812F) & BIT_MASK_A1_ADDR_MASK_8812F) 18377 #define BIT_SET_A1_ADDR_MASK_8812F(x, v) \ 18378 (BIT_CLEAR_A1_ADDR_MASK_8812F(x) | BIT_A1_ADDR_MASK_8812F(v)) 18379 18380 /* 2 REG_RXPSF_CTRL_8812F */ 18381 #define BIT_RXGCK_FIFOTHR_EN_8812F BIT(28) 18382 18383 #define BIT_SHIFT_RXGCK_VHT_FIFOTHR_8812F 26 18384 #define BIT_MASK_RXGCK_VHT_FIFOTHR_8812F 0x3 18385 #define BIT_RXGCK_VHT_FIFOTHR_8812F(x) \ 18386 (((x) & BIT_MASK_RXGCK_VHT_FIFOTHR_8812F) \ 18387 << BIT_SHIFT_RXGCK_VHT_FIFOTHR_8812F) 18388 #define BITS_RXGCK_VHT_FIFOTHR_8812F \ 18389 (BIT_MASK_RXGCK_VHT_FIFOTHR_8812F << BIT_SHIFT_RXGCK_VHT_FIFOTHR_8812F) 18390 #define BIT_CLEAR_RXGCK_VHT_FIFOTHR_8812F(x) \ 18391 ((x) & (~BITS_RXGCK_VHT_FIFOTHR_8812F)) 18392 #define BIT_GET_RXGCK_VHT_FIFOTHR_8812F(x) \ 18393 (((x) >> BIT_SHIFT_RXGCK_VHT_FIFOTHR_8812F) & \ 18394 BIT_MASK_RXGCK_VHT_FIFOTHR_8812F) 18395 #define BIT_SET_RXGCK_VHT_FIFOTHR_8812F(x, v) \ 18396 (BIT_CLEAR_RXGCK_VHT_FIFOTHR_8812F(x) | BIT_RXGCK_VHT_FIFOTHR_8812F(v)) 18397 18398 #define BIT_SHIFT_RXGCK_HT_FIFOTHR_8812F 24 18399 #define BIT_MASK_RXGCK_HT_FIFOTHR_8812F 0x3 18400 #define BIT_RXGCK_HT_FIFOTHR_8812F(x) \ 18401 (((x) & BIT_MASK_RXGCK_HT_FIFOTHR_8812F) \ 18402 << BIT_SHIFT_RXGCK_HT_FIFOTHR_8812F) 18403 #define BITS_RXGCK_HT_FIFOTHR_8812F \ 18404 (BIT_MASK_RXGCK_HT_FIFOTHR_8812F << BIT_SHIFT_RXGCK_HT_FIFOTHR_8812F) 18405 #define BIT_CLEAR_RXGCK_HT_FIFOTHR_8812F(x) \ 18406 ((x) & (~BITS_RXGCK_HT_FIFOTHR_8812F)) 18407 #define BIT_GET_RXGCK_HT_FIFOTHR_8812F(x) \ 18408 (((x) >> BIT_SHIFT_RXGCK_HT_FIFOTHR_8812F) & \ 18409 BIT_MASK_RXGCK_HT_FIFOTHR_8812F) 18410 #define BIT_SET_RXGCK_HT_FIFOTHR_8812F(x, v) \ 18411 (BIT_CLEAR_RXGCK_HT_FIFOTHR_8812F(x) | BIT_RXGCK_HT_FIFOTHR_8812F(v)) 18412 18413 #define BIT_SHIFT_RXGCK_OFDM_FIFOTHR_8812F 22 18414 #define BIT_MASK_RXGCK_OFDM_FIFOTHR_8812F 0x3 18415 #define BIT_RXGCK_OFDM_FIFOTHR_8812F(x) \ 18416 (((x) & BIT_MASK_RXGCK_OFDM_FIFOTHR_8812F) \ 18417 << BIT_SHIFT_RXGCK_OFDM_FIFOTHR_8812F) 18418 #define BITS_RXGCK_OFDM_FIFOTHR_8812F \ 18419 (BIT_MASK_RXGCK_OFDM_FIFOTHR_8812F \ 18420 << BIT_SHIFT_RXGCK_OFDM_FIFOTHR_8812F) 18421 #define BIT_CLEAR_RXGCK_OFDM_FIFOTHR_8812F(x) \ 18422 ((x) & (~BITS_RXGCK_OFDM_FIFOTHR_8812F)) 18423 #define BIT_GET_RXGCK_OFDM_FIFOTHR_8812F(x) \ 18424 (((x) >> BIT_SHIFT_RXGCK_OFDM_FIFOTHR_8812F) & \ 18425 BIT_MASK_RXGCK_OFDM_FIFOTHR_8812F) 18426 #define BIT_SET_RXGCK_OFDM_FIFOTHR_8812F(x, v) \ 18427 (BIT_CLEAR_RXGCK_OFDM_FIFOTHR_8812F(x) | \ 18428 BIT_RXGCK_OFDM_FIFOTHR_8812F(v)) 18429 18430 #define BIT_SHIFT_RXGCK_CCK_FIFOTHR_8812F 20 18431 #define BIT_MASK_RXGCK_CCK_FIFOTHR_8812F 0x3 18432 #define BIT_RXGCK_CCK_FIFOTHR_8812F(x) \ 18433 (((x) & BIT_MASK_RXGCK_CCK_FIFOTHR_8812F) \ 18434 << BIT_SHIFT_RXGCK_CCK_FIFOTHR_8812F) 18435 #define BITS_RXGCK_CCK_FIFOTHR_8812F \ 18436 (BIT_MASK_RXGCK_CCK_FIFOTHR_8812F << BIT_SHIFT_RXGCK_CCK_FIFOTHR_8812F) 18437 #define BIT_CLEAR_RXGCK_CCK_FIFOTHR_8812F(x) \ 18438 ((x) & (~BITS_RXGCK_CCK_FIFOTHR_8812F)) 18439 #define BIT_GET_RXGCK_CCK_FIFOTHR_8812F(x) \ 18440 (((x) >> BIT_SHIFT_RXGCK_CCK_FIFOTHR_8812F) & \ 18441 BIT_MASK_RXGCK_CCK_FIFOTHR_8812F) 18442 #define BIT_SET_RXGCK_CCK_FIFOTHR_8812F(x, v) \ 18443 (BIT_CLEAR_RXGCK_CCK_FIFOTHR_8812F(x) | BIT_RXGCK_CCK_FIFOTHR_8812F(v)) 18444 18445 #define BIT_SHIFT_RXGCK_ENTRY_DELAY_8812F 17 18446 #define BIT_MASK_RXGCK_ENTRY_DELAY_8812F 0x7 18447 #define BIT_RXGCK_ENTRY_DELAY_8812F(x) \ 18448 (((x) & BIT_MASK_RXGCK_ENTRY_DELAY_8812F) \ 18449 << BIT_SHIFT_RXGCK_ENTRY_DELAY_8812F) 18450 #define BITS_RXGCK_ENTRY_DELAY_8812F \ 18451 (BIT_MASK_RXGCK_ENTRY_DELAY_8812F << BIT_SHIFT_RXGCK_ENTRY_DELAY_8812F) 18452 #define BIT_CLEAR_RXGCK_ENTRY_DELAY_8812F(x) \ 18453 ((x) & (~BITS_RXGCK_ENTRY_DELAY_8812F)) 18454 #define BIT_GET_RXGCK_ENTRY_DELAY_8812F(x) \ 18455 (((x) >> BIT_SHIFT_RXGCK_ENTRY_DELAY_8812F) & \ 18456 BIT_MASK_RXGCK_ENTRY_DELAY_8812F) 18457 #define BIT_SET_RXGCK_ENTRY_DELAY_8812F(x, v) \ 18458 (BIT_CLEAR_RXGCK_ENTRY_DELAY_8812F(x) | BIT_RXGCK_ENTRY_DELAY_8812F(v)) 18459 18460 #define BIT_RXGCK_OFDMCCA_EN_8812F BIT(16) 18461 18462 #define BIT_SHIFT_RXPSF_PKTLENTHR_8812F 13 18463 #define BIT_MASK_RXPSF_PKTLENTHR_8812F 0x7 18464 #define BIT_RXPSF_PKTLENTHR_8812F(x) \ 18465 (((x) & BIT_MASK_RXPSF_PKTLENTHR_8812F) \ 18466 << BIT_SHIFT_RXPSF_PKTLENTHR_8812F) 18467 #define BITS_RXPSF_PKTLENTHR_8812F \ 18468 (BIT_MASK_RXPSF_PKTLENTHR_8812F << BIT_SHIFT_RXPSF_PKTLENTHR_8812F) 18469 #define BIT_CLEAR_RXPSF_PKTLENTHR_8812F(x) ((x) & (~BITS_RXPSF_PKTLENTHR_8812F)) 18470 #define BIT_GET_RXPSF_PKTLENTHR_8812F(x) \ 18471 (((x) >> BIT_SHIFT_RXPSF_PKTLENTHR_8812F) & \ 18472 BIT_MASK_RXPSF_PKTLENTHR_8812F) 18473 #define BIT_SET_RXPSF_PKTLENTHR_8812F(x, v) \ 18474 (BIT_CLEAR_RXPSF_PKTLENTHR_8812F(x) | BIT_RXPSF_PKTLENTHR_8812F(v)) 18475 18476 #define BIT_RXPSF_CTRLEN_8812F BIT(12) 18477 #define BIT_RXPSF_VHTCHKEN_8812F BIT(11) 18478 #define BIT_RXPSF_HTCHKEN_8812F BIT(10) 18479 #define BIT_RXPSF_OFDMCHKEN_8812F BIT(9) 18480 #define BIT_RXPSF_CCKCHKEN_8812F BIT(8) 18481 #define BIT_RXPSF_OFDMRST_8812F BIT(7) 18482 #define BIT_RXPSF_CCKRST_8812F BIT(6) 18483 #define BIT_RXPSF_MHCHKEN_8812F BIT(5) 18484 #define BIT_RXPSF_CONT_ERRCHKEN_8812F BIT(4) 18485 #define BIT_RXPSF_ALL_ERRCHKEN_8812F BIT(3) 18486 18487 #define BIT_SHIFT_RXPSF_ERRTHR_8812F 0 18488 #define BIT_MASK_RXPSF_ERRTHR_8812F 0x7 18489 #define BIT_RXPSF_ERRTHR_8812F(x) \ 18490 (((x) & BIT_MASK_RXPSF_ERRTHR_8812F) << BIT_SHIFT_RXPSF_ERRTHR_8812F) 18491 #define BITS_RXPSF_ERRTHR_8812F \ 18492 (BIT_MASK_RXPSF_ERRTHR_8812F << BIT_SHIFT_RXPSF_ERRTHR_8812F) 18493 #define BIT_CLEAR_RXPSF_ERRTHR_8812F(x) ((x) & (~BITS_RXPSF_ERRTHR_8812F)) 18494 #define BIT_GET_RXPSF_ERRTHR_8812F(x) \ 18495 (((x) >> BIT_SHIFT_RXPSF_ERRTHR_8812F) & BIT_MASK_RXPSF_ERRTHR_8812F) 18496 #define BIT_SET_RXPSF_ERRTHR_8812F(x, v) \ 18497 (BIT_CLEAR_RXPSF_ERRTHR_8812F(x) | BIT_RXPSF_ERRTHR_8812F(v)) 18498 18499 /* 2 REG_RXPSF_TYPE_CTRL_8812F */ 18500 #define BIT_RXPSF_DATA15EN_8812F BIT(31) 18501 #define BIT_RXPSF_DATA14EN_8812F BIT(30) 18502 #define BIT_RXPSF_DATA13EN_8812F BIT(29) 18503 #define BIT_RXPSF_DATA12EN_8812F BIT(28) 18504 #define BIT_RXPSF_DATA11EN_8812F BIT(27) 18505 #define BIT_RXPSF_DATA10EN_8812F BIT(26) 18506 #define BIT_RXPSF_DATA9EN_8812F BIT(25) 18507 #define BIT_RXPSF_DATA8EN_8812F BIT(24) 18508 #define BIT_RXPSF_DATA7EN_8812F BIT(23) 18509 #define BIT_RXPSF_DATA6EN_8812F BIT(22) 18510 #define BIT_RXPSF_DATA5EN_8812F BIT(21) 18511 #define BIT_RXPSF_DATA4EN_8812F BIT(20) 18512 #define BIT_RXPSF_DATA3EN_8812F BIT(19) 18513 #define BIT_RXPSF_DATA2EN_8812F BIT(18) 18514 #define BIT_RXPSF_DATA1EN_8812F BIT(17) 18515 #define BIT_RXPSF_DATA0EN_8812F BIT(16) 18516 #define BIT_RXPSF_MGT15EN_8812F BIT(15) 18517 #define BIT_RXPSF_MGT14EN_8812F BIT(14) 18518 #define BIT_RXPSF_MGT13EN_8812F BIT(13) 18519 #define BIT_RXPSF_MGT12EN_8812F BIT(12) 18520 #define BIT_RXPSF_MGT11EN_8812F BIT(11) 18521 #define BIT_RXPSF_MGT10EN_8812F BIT(10) 18522 #define BIT_RXPSF_MGT9EN_8812F BIT(9) 18523 #define BIT_RXPSF_MGT8EN_8812F BIT(8) 18524 #define BIT_RXPSF_MGT7EN_8812F BIT(7) 18525 #define BIT_RXPSF_MGT6EN_8812F BIT(6) 18526 #define BIT_RXPSF_MGT5EN_8812F BIT(5) 18527 #define BIT_RXPSF_MGT4EN_8812F BIT(4) 18528 #define BIT_RXPSF_MGT3EN_8812F BIT(3) 18529 #define BIT_RXPSF_MGT2EN_8812F BIT(2) 18530 #define BIT_RXPSF_MGT1EN_8812F BIT(1) 18531 #define BIT_RXPSF_MGT0EN_8812F BIT(0) 18532 18533 /* 2 REG_CAM_ACCESS_CTRL_8812F */ 18534 #define BIT_INDIRECT_ERR_8812F BIT(6) 18535 #define BIT_DIRECT_ERR_8812F BIT(5) 18536 #define BIT_DIR_ACCESS_EN_RX_BA_8812F BIT(4) 18537 #define BIT_DIR_ACCESS_EN_MBSSIDCAM_8812F BIT(3) 18538 #define BIT_DIR_ACCESS_EN_KEY_8812F BIT(2) 18539 #define BIT_DIR_ACCESS_EN_WOWLAN_8812F BIT(1) 18540 #define BIT_DIR_ACCESS_EN_FW_FILTER_8812F BIT(0) 18541 18542 /* 2 REG_HT_SND_REF_RATE_8812F */ 18543 18544 #define BIT_SHIFT_WMAC_HT_CSI_RATE_8812F 0 18545 #define BIT_MASK_WMAC_HT_CSI_RATE_8812F 0x3f 18546 #define BIT_WMAC_HT_CSI_RATE_8812F(x) \ 18547 (((x) & BIT_MASK_WMAC_HT_CSI_RATE_8812F) \ 18548 << BIT_SHIFT_WMAC_HT_CSI_RATE_8812F) 18549 #define BITS_WMAC_HT_CSI_RATE_8812F \ 18550 (BIT_MASK_WMAC_HT_CSI_RATE_8812F << BIT_SHIFT_WMAC_HT_CSI_RATE_8812F) 18551 #define BIT_CLEAR_WMAC_HT_CSI_RATE_8812F(x) \ 18552 ((x) & (~BITS_WMAC_HT_CSI_RATE_8812F)) 18553 #define BIT_GET_WMAC_HT_CSI_RATE_8812F(x) \ 18554 (((x) >> BIT_SHIFT_WMAC_HT_CSI_RATE_8812F) & \ 18555 BIT_MASK_WMAC_HT_CSI_RATE_8812F) 18556 #define BIT_SET_WMAC_HT_CSI_RATE_8812F(x, v) \ 18557 (BIT_CLEAR_WMAC_HT_CSI_RATE_8812F(x) | BIT_WMAC_HT_CSI_RATE_8812F(v)) 18558 18559 /* 2 REG_RSVD_8812F */ 18560 18561 /* 2 REG_MACID2_8812F (MAC ID2 REGISTER) */ 18562 18563 #define BIT_SHIFT_MACID2_V1_8812F 0 18564 #define BIT_MASK_MACID2_V1_8812F 0xffffffffL 18565 #define BIT_MACID2_V1_8812F(x) \ 18566 (((x) & BIT_MASK_MACID2_V1_8812F) << BIT_SHIFT_MACID2_V1_8812F) 18567 #define BITS_MACID2_V1_8812F \ 18568 (BIT_MASK_MACID2_V1_8812F << BIT_SHIFT_MACID2_V1_8812F) 18569 #define BIT_CLEAR_MACID2_V1_8812F(x) ((x) & (~BITS_MACID2_V1_8812F)) 18570 #define BIT_GET_MACID2_V1_8812F(x) \ 18571 (((x) >> BIT_SHIFT_MACID2_V1_8812F) & BIT_MASK_MACID2_V1_8812F) 18572 #define BIT_SET_MACID2_V1_8812F(x, v) \ 18573 (BIT_CLEAR_MACID2_V1_8812F(x) | BIT_MACID2_V1_8812F(v)) 18574 18575 /* 2 REG_MACID2_H_8812F (MAC ID2 REGISTER) */ 18576 18577 #define BIT_SHIFT_MACID2_H_V1_8812F 0 18578 #define BIT_MASK_MACID2_H_V1_8812F 0xffff 18579 #define BIT_MACID2_H_V1_8812F(x) \ 18580 (((x) & BIT_MASK_MACID2_H_V1_8812F) << BIT_SHIFT_MACID2_H_V1_8812F) 18581 #define BITS_MACID2_H_V1_8812F \ 18582 (BIT_MASK_MACID2_H_V1_8812F << BIT_SHIFT_MACID2_H_V1_8812F) 18583 #define BIT_CLEAR_MACID2_H_V1_8812F(x) ((x) & (~BITS_MACID2_H_V1_8812F)) 18584 #define BIT_GET_MACID2_H_V1_8812F(x) \ 18585 (((x) >> BIT_SHIFT_MACID2_H_V1_8812F) & BIT_MASK_MACID2_H_V1_8812F) 18586 #define BIT_SET_MACID2_H_V1_8812F(x, v) \ 18587 (BIT_CLEAR_MACID2_H_V1_8812F(x) | BIT_MACID2_H_V1_8812F(v)) 18588 18589 /* 2 REG_BSSID2_8812F (BSSID2 REGISTER) */ 18590 18591 #define BIT_SHIFT_BSSID2_V1_8812F 0 18592 #define BIT_MASK_BSSID2_V1_8812F 0xffffffffL 18593 #define BIT_BSSID2_V1_8812F(x) \ 18594 (((x) & BIT_MASK_BSSID2_V1_8812F) << BIT_SHIFT_BSSID2_V1_8812F) 18595 #define BITS_BSSID2_V1_8812F \ 18596 (BIT_MASK_BSSID2_V1_8812F << BIT_SHIFT_BSSID2_V1_8812F) 18597 #define BIT_CLEAR_BSSID2_V1_8812F(x) ((x) & (~BITS_BSSID2_V1_8812F)) 18598 #define BIT_GET_BSSID2_V1_8812F(x) \ 18599 (((x) >> BIT_SHIFT_BSSID2_V1_8812F) & BIT_MASK_BSSID2_V1_8812F) 18600 #define BIT_SET_BSSID2_V1_8812F(x, v) \ 18601 (BIT_CLEAR_BSSID2_V1_8812F(x) | BIT_BSSID2_V1_8812F(v)) 18602 18603 /* 2 REG_BSSID2_H_8812F (BSSID2 REGISTER) */ 18604 18605 #define BIT_SHIFT_BSSID2_H_V1_8812F 0 18606 #define BIT_MASK_BSSID2_H_V1_8812F 0xffff 18607 #define BIT_BSSID2_H_V1_8812F(x) \ 18608 (((x) & BIT_MASK_BSSID2_H_V1_8812F) << BIT_SHIFT_BSSID2_H_V1_8812F) 18609 #define BITS_BSSID2_H_V1_8812F \ 18610 (BIT_MASK_BSSID2_H_V1_8812F << BIT_SHIFT_BSSID2_H_V1_8812F) 18611 #define BIT_CLEAR_BSSID2_H_V1_8812F(x) ((x) & (~BITS_BSSID2_H_V1_8812F)) 18612 #define BIT_GET_BSSID2_H_V1_8812F(x) \ 18613 (((x) >> BIT_SHIFT_BSSID2_H_V1_8812F) & BIT_MASK_BSSID2_H_V1_8812F) 18614 #define BIT_SET_BSSID2_H_V1_8812F(x, v) \ 18615 (BIT_CLEAR_BSSID2_H_V1_8812F(x) | BIT_BSSID2_H_V1_8812F(v)) 18616 18617 /* 2 REG_MACID3_8812F (MAC ID3 REGISTER) */ 18618 18619 #define BIT_SHIFT_MACID3_V1_8812F 0 18620 #define BIT_MASK_MACID3_V1_8812F 0xffffffffL 18621 #define BIT_MACID3_V1_8812F(x) \ 18622 (((x) & BIT_MASK_MACID3_V1_8812F) << BIT_SHIFT_MACID3_V1_8812F) 18623 #define BITS_MACID3_V1_8812F \ 18624 (BIT_MASK_MACID3_V1_8812F << BIT_SHIFT_MACID3_V1_8812F) 18625 #define BIT_CLEAR_MACID3_V1_8812F(x) ((x) & (~BITS_MACID3_V1_8812F)) 18626 #define BIT_GET_MACID3_V1_8812F(x) \ 18627 (((x) >> BIT_SHIFT_MACID3_V1_8812F) & BIT_MASK_MACID3_V1_8812F) 18628 #define BIT_SET_MACID3_V1_8812F(x, v) \ 18629 (BIT_CLEAR_MACID3_V1_8812F(x) | BIT_MACID3_V1_8812F(v)) 18630 18631 /* 2 REG_MACID3_H_8812F (MAC ID3 REGISTER) */ 18632 18633 #define BIT_SHIFT_MACID3_H_V1_8812F 0 18634 #define BIT_MASK_MACID3_H_V1_8812F 0xffff 18635 #define BIT_MACID3_H_V1_8812F(x) \ 18636 (((x) & BIT_MASK_MACID3_H_V1_8812F) << BIT_SHIFT_MACID3_H_V1_8812F) 18637 #define BITS_MACID3_H_V1_8812F \ 18638 (BIT_MASK_MACID3_H_V1_8812F << BIT_SHIFT_MACID3_H_V1_8812F) 18639 #define BIT_CLEAR_MACID3_H_V1_8812F(x) ((x) & (~BITS_MACID3_H_V1_8812F)) 18640 #define BIT_GET_MACID3_H_V1_8812F(x) \ 18641 (((x) >> BIT_SHIFT_MACID3_H_V1_8812F) & BIT_MASK_MACID3_H_V1_8812F) 18642 #define BIT_SET_MACID3_H_V1_8812F(x, v) \ 18643 (BIT_CLEAR_MACID3_H_V1_8812F(x) | BIT_MACID3_H_V1_8812F(v)) 18644 18645 /* 2 REG_BSSID3_8812F (BSSID3 REGISTER) */ 18646 18647 #define BIT_SHIFT_BSSID3_V1_8812F 0 18648 #define BIT_MASK_BSSID3_V1_8812F 0xffffffffL 18649 #define BIT_BSSID3_V1_8812F(x) \ 18650 (((x) & BIT_MASK_BSSID3_V1_8812F) << BIT_SHIFT_BSSID3_V1_8812F) 18651 #define BITS_BSSID3_V1_8812F \ 18652 (BIT_MASK_BSSID3_V1_8812F << BIT_SHIFT_BSSID3_V1_8812F) 18653 #define BIT_CLEAR_BSSID3_V1_8812F(x) ((x) & (~BITS_BSSID3_V1_8812F)) 18654 #define BIT_GET_BSSID3_V1_8812F(x) \ 18655 (((x) >> BIT_SHIFT_BSSID3_V1_8812F) & BIT_MASK_BSSID3_V1_8812F) 18656 #define BIT_SET_BSSID3_V1_8812F(x, v) \ 18657 (BIT_CLEAR_BSSID3_V1_8812F(x) | BIT_BSSID3_V1_8812F(v)) 18658 18659 /* 2 REG_BSSID3_H_8812F (BSSID3 REGISTER) */ 18660 18661 #define BIT_SHIFT_BSSID3_H_V1_8812F 0 18662 #define BIT_MASK_BSSID3_H_V1_8812F 0xffff 18663 #define BIT_BSSID3_H_V1_8812F(x) \ 18664 (((x) & BIT_MASK_BSSID3_H_V1_8812F) << BIT_SHIFT_BSSID3_H_V1_8812F) 18665 #define BITS_BSSID3_H_V1_8812F \ 18666 (BIT_MASK_BSSID3_H_V1_8812F << BIT_SHIFT_BSSID3_H_V1_8812F) 18667 #define BIT_CLEAR_BSSID3_H_V1_8812F(x) ((x) & (~BITS_BSSID3_H_V1_8812F)) 18668 #define BIT_GET_BSSID3_H_V1_8812F(x) \ 18669 (((x) >> BIT_SHIFT_BSSID3_H_V1_8812F) & BIT_MASK_BSSID3_H_V1_8812F) 18670 #define BIT_SET_BSSID3_H_V1_8812F(x, v) \ 18671 (BIT_CLEAR_BSSID3_H_V1_8812F(x) | BIT_BSSID3_H_V1_8812F(v)) 18672 18673 /* 2 REG_MACID4_8812F (MAC ID4 REGISTER) */ 18674 18675 #define BIT_SHIFT_MACID4_V1_8812F 0 18676 #define BIT_MASK_MACID4_V1_8812F 0xffffffffL 18677 #define BIT_MACID4_V1_8812F(x) \ 18678 (((x) & BIT_MASK_MACID4_V1_8812F) << BIT_SHIFT_MACID4_V1_8812F) 18679 #define BITS_MACID4_V1_8812F \ 18680 (BIT_MASK_MACID4_V1_8812F << BIT_SHIFT_MACID4_V1_8812F) 18681 #define BIT_CLEAR_MACID4_V1_8812F(x) ((x) & (~BITS_MACID4_V1_8812F)) 18682 #define BIT_GET_MACID4_V1_8812F(x) \ 18683 (((x) >> BIT_SHIFT_MACID4_V1_8812F) & BIT_MASK_MACID4_V1_8812F) 18684 #define BIT_SET_MACID4_V1_8812F(x, v) \ 18685 (BIT_CLEAR_MACID4_V1_8812F(x) | BIT_MACID4_V1_8812F(v)) 18686 18687 /* 2 REG_MACID4_H_8812F (MAC ID4 REGISTER) */ 18688 18689 #define BIT_SHIFT_MACID4_H_V1_8812F 0 18690 #define BIT_MASK_MACID4_H_V1_8812F 0xffff 18691 #define BIT_MACID4_H_V1_8812F(x) \ 18692 (((x) & BIT_MASK_MACID4_H_V1_8812F) << BIT_SHIFT_MACID4_H_V1_8812F) 18693 #define BITS_MACID4_H_V1_8812F \ 18694 (BIT_MASK_MACID4_H_V1_8812F << BIT_SHIFT_MACID4_H_V1_8812F) 18695 #define BIT_CLEAR_MACID4_H_V1_8812F(x) ((x) & (~BITS_MACID4_H_V1_8812F)) 18696 #define BIT_GET_MACID4_H_V1_8812F(x) \ 18697 (((x) >> BIT_SHIFT_MACID4_H_V1_8812F) & BIT_MASK_MACID4_H_V1_8812F) 18698 #define BIT_SET_MACID4_H_V1_8812F(x, v) \ 18699 (BIT_CLEAR_MACID4_H_V1_8812F(x) | BIT_MACID4_H_V1_8812F(v)) 18700 18701 /* 2 REG_BSSID4_8812F (BSSID4 REGISTER) */ 18702 18703 #define BIT_SHIFT_BSSID4_V1_8812F 0 18704 #define BIT_MASK_BSSID4_V1_8812F 0xffffffffL 18705 #define BIT_BSSID4_V1_8812F(x) \ 18706 (((x) & BIT_MASK_BSSID4_V1_8812F) << BIT_SHIFT_BSSID4_V1_8812F) 18707 #define BITS_BSSID4_V1_8812F \ 18708 (BIT_MASK_BSSID4_V1_8812F << BIT_SHIFT_BSSID4_V1_8812F) 18709 #define BIT_CLEAR_BSSID4_V1_8812F(x) ((x) & (~BITS_BSSID4_V1_8812F)) 18710 #define BIT_GET_BSSID4_V1_8812F(x) \ 18711 (((x) >> BIT_SHIFT_BSSID4_V1_8812F) & BIT_MASK_BSSID4_V1_8812F) 18712 #define BIT_SET_BSSID4_V1_8812F(x, v) \ 18713 (BIT_CLEAR_BSSID4_V1_8812F(x) | BIT_BSSID4_V1_8812F(v)) 18714 18715 /* 2 REG_BSSID4_H_8812F (BSSID4 REGISTER) */ 18716 18717 #define BIT_SHIFT_BSSID4_H_V1_8812F 0 18718 #define BIT_MASK_BSSID4_H_V1_8812F 0xffff 18719 #define BIT_BSSID4_H_V1_8812F(x) \ 18720 (((x) & BIT_MASK_BSSID4_H_V1_8812F) << BIT_SHIFT_BSSID4_H_V1_8812F) 18721 #define BITS_BSSID4_H_V1_8812F \ 18722 (BIT_MASK_BSSID4_H_V1_8812F << BIT_SHIFT_BSSID4_H_V1_8812F) 18723 #define BIT_CLEAR_BSSID4_H_V1_8812F(x) ((x) & (~BITS_BSSID4_H_V1_8812F)) 18724 #define BIT_GET_BSSID4_H_V1_8812F(x) \ 18725 (((x) >> BIT_SHIFT_BSSID4_H_V1_8812F) & BIT_MASK_BSSID4_H_V1_8812F) 18726 #define BIT_SET_BSSID4_H_V1_8812F(x, v) \ 18727 (BIT_CLEAR_BSSID4_H_V1_8812F(x) | BIT_BSSID4_H_V1_8812F(v)) 18728 18729 /* 2 REG_NOA_REPORT_8812F */ 18730 18731 /* 2 REG_NOA_REPORT_1_8812F */ 18732 18733 /* 2 REG_NOA_REPORT_2_8812F */ 18734 18735 /* 2 REG_NOA_REPORT_3_8812F */ 18736 18737 /* 2 REG_PWRBIT_SETTING_8812F */ 18738 #define BIT_CLI3_WMAC_TCRPWRMGT_HWCTL_EN_8812F BIT(15) 18739 #define BIT_CLI3_WMAC_TCRPWRMGT_HWDATA_EN_8812F BIT(14) 18740 #define BIT_CLI3_WMAC_TCRPWRMGT_HWACT_EN_8812F BIT(13) 18741 #define BIT_CLI3_PWR_ST_V1_8812F BIT(12) 18742 #define BIT_CLI2_WMAC_TCRPWRMGT_HWCTL_EN_8812F BIT(11) 18743 #define BIT_CLI2_WMAC_TCRPWRMGT_HWDATA_EN_8812F BIT(10) 18744 #define BIT_CLI2_WMAC_TCRPWRMGT_HWACT_EN_8812F BIT(9) 18745 #define BIT_CLI2_PWR_ST_V1_8812F BIT(8) 18746 #define BIT_CLI1_WMAC_TCRPWRMGT_HWCTL_EN_8812F BIT(7) 18747 #define BIT_CLI1_WMAC_TCRPWRMGT_HWDATA_EN_8812F BIT(6) 18748 #define BIT_CLI1_WMAC_TCRPWRMGT_HWACT_EN_8812F BIT(5) 18749 #define BIT_CLI1_PWR_ST_V1_8812F BIT(4) 18750 #define BIT_CLI0_WMAC_TCRPWRMGT_HWCTL_EN_8812F BIT(3) 18751 #define BIT_CLI0_WMAC_TCRPWRMGT_HWDATA_EN_8812F BIT(2) 18752 #define BIT_CLI0_WMAC_TCRPWRMGT_HWACT_EN_8812F BIT(1) 18753 #define BIT_CLI0_PWR_ST_V1_8812F BIT(0) 18754 18755 /* 2 REG_GENERAL_OPTION_8812F */ 18756 #define BIT_WMAC_EXT_DBG_SEL_V1_8812F BIT(6) 18757 #define BIT_WMAC_FIX_FIRST_MPDU_WITH_PHYSTS_8812F BIT(5) 18758 #define BIT_RX_DMA_BYPASS_CHECK_DATABYPASS_CHECK_DATA_8812F BIT(4) 18759 #define BIT_RX_DMA_BYPASS_CHECK_MGTBIT_RX_DMA_BYPASS_CHECK_MGT_8812F BIT(3) 18760 #define BIT_TXSERV_FIELD_SEL_8812F BIT(2) 18761 #define BIT_RXVHT_LEN_SEL_8812F BIT(1) 18762 #define BIT_RXMIC_PROTECT_EN_8812F BIT(0) 18763 18764 /* 2 REG_RXAI_CTRL_8812F */ 18765 #define BIT_RXAI_INFO_RST_8812F BIT(7) 18766 #define BIT_RXAI_PRTCT_REL_8812F BIT(6) 18767 #define BIT_RXAI_PRTCT_VIO_8812F BIT(5) 18768 #define BIT_RXAI_PRTCT_SEL_8812F BIT(2) 18769 #define BIT_RXAI_AGG_CHKEN_8812F BIT(1) 18770 #define BIT_RXAI_ADDR_CHKEN_8812F BIT(0) 18771 18772 /* 2 REG_RSVD_8812F */ 18773 18774 /* 2 REG_RSVD_8812F */ 18775 18776 /* 2 REG_RSVD_8812F */ 18777 18778 /* 2 REG_CSI_RRSR_8812F */ 18779 #define BIT_CSI_LDPC_EN_8812F BIT(29) 18780 #define BIT_CSI_STBC_EN_8812F BIT(28) 18781 18782 #define BIT_SHIFT_CSI_RRSC_BITMAP_8812F 4 18783 #define BIT_MASK_CSI_RRSC_BITMAP_8812F 0xffffff 18784 #define BIT_CSI_RRSC_BITMAP_8812F(x) \ 18785 (((x) & BIT_MASK_CSI_RRSC_BITMAP_8812F) \ 18786 << BIT_SHIFT_CSI_RRSC_BITMAP_8812F) 18787 #define BITS_CSI_RRSC_BITMAP_8812F \ 18788 (BIT_MASK_CSI_RRSC_BITMAP_8812F << BIT_SHIFT_CSI_RRSC_BITMAP_8812F) 18789 #define BIT_CLEAR_CSI_RRSC_BITMAP_8812F(x) ((x) & (~BITS_CSI_RRSC_BITMAP_8812F)) 18790 #define BIT_GET_CSI_RRSC_BITMAP_8812F(x) \ 18791 (((x) >> BIT_SHIFT_CSI_RRSC_BITMAP_8812F) & \ 18792 BIT_MASK_CSI_RRSC_BITMAP_8812F) 18793 #define BIT_SET_CSI_RRSC_BITMAP_8812F(x, v) \ 18794 (BIT_CLEAR_CSI_RRSC_BITMAP_8812F(x) | BIT_CSI_RRSC_BITMAP_8812F(v)) 18795 18796 #define BIT_SHIFT_OFDM_LEN_TH_8812F 0 18797 #define BIT_MASK_OFDM_LEN_TH_8812F 0xf 18798 #define BIT_OFDM_LEN_TH_8812F(x) \ 18799 (((x) & BIT_MASK_OFDM_LEN_TH_8812F) << BIT_SHIFT_OFDM_LEN_TH_8812F) 18800 #define BITS_OFDM_LEN_TH_8812F \ 18801 (BIT_MASK_OFDM_LEN_TH_8812F << BIT_SHIFT_OFDM_LEN_TH_8812F) 18802 #define BIT_CLEAR_OFDM_LEN_TH_8812F(x) ((x) & (~BITS_OFDM_LEN_TH_8812F)) 18803 #define BIT_GET_OFDM_LEN_TH_8812F(x) \ 18804 (((x) >> BIT_SHIFT_OFDM_LEN_TH_8812F) & BIT_MASK_OFDM_LEN_TH_8812F) 18805 #define BIT_SET_OFDM_LEN_TH_8812F(x, v) \ 18806 (BIT_CLEAR_OFDM_LEN_TH_8812F(x) | BIT_OFDM_LEN_TH_8812F(v)) 18807 18808 /* 2 REG_MU_BF_OPTION_8812F */ 18809 #define BIT_WMAC_RESP_NONSTA1_DIS_8812F BIT(7) 18810 #define BIT_WMAC_TXMU_ACKPOLICY_EN_8812F BIT(6) 18811 18812 #define BIT_SHIFT_WMAC_TXMU_ACKPOLICY_8812F 4 18813 #define BIT_MASK_WMAC_TXMU_ACKPOLICY_8812F 0x3 18814 #define BIT_WMAC_TXMU_ACKPOLICY_8812F(x) \ 18815 (((x) & BIT_MASK_WMAC_TXMU_ACKPOLICY_8812F) \ 18816 << BIT_SHIFT_WMAC_TXMU_ACKPOLICY_8812F) 18817 #define BITS_WMAC_TXMU_ACKPOLICY_8812F \ 18818 (BIT_MASK_WMAC_TXMU_ACKPOLICY_8812F \ 18819 << BIT_SHIFT_WMAC_TXMU_ACKPOLICY_8812F) 18820 #define BIT_CLEAR_WMAC_TXMU_ACKPOLICY_8812F(x) \ 18821 ((x) & (~BITS_WMAC_TXMU_ACKPOLICY_8812F)) 18822 #define BIT_GET_WMAC_TXMU_ACKPOLICY_8812F(x) \ 18823 (((x) >> BIT_SHIFT_WMAC_TXMU_ACKPOLICY_8812F) & \ 18824 BIT_MASK_WMAC_TXMU_ACKPOLICY_8812F) 18825 #define BIT_SET_WMAC_TXMU_ACKPOLICY_8812F(x, v) \ 18826 (BIT_CLEAR_WMAC_TXMU_ACKPOLICY_8812F(x) | \ 18827 BIT_WMAC_TXMU_ACKPOLICY_8812F(v)) 18828 18829 #define BIT_SHIFT_WMAC_MU_BFEE_PORT_SEL_8812F 1 18830 #define BIT_MASK_WMAC_MU_BFEE_PORT_SEL_8812F 0x7 18831 #define BIT_WMAC_MU_BFEE_PORT_SEL_8812F(x) \ 18832 (((x) & BIT_MASK_WMAC_MU_BFEE_PORT_SEL_8812F) \ 18833 << BIT_SHIFT_WMAC_MU_BFEE_PORT_SEL_8812F) 18834 #define BITS_WMAC_MU_BFEE_PORT_SEL_8812F \ 18835 (BIT_MASK_WMAC_MU_BFEE_PORT_SEL_8812F \ 18836 << BIT_SHIFT_WMAC_MU_BFEE_PORT_SEL_8812F) 18837 #define BIT_CLEAR_WMAC_MU_BFEE_PORT_SEL_8812F(x) \ 18838 ((x) & (~BITS_WMAC_MU_BFEE_PORT_SEL_8812F)) 18839 #define BIT_GET_WMAC_MU_BFEE_PORT_SEL_8812F(x) \ 18840 (((x) >> BIT_SHIFT_WMAC_MU_BFEE_PORT_SEL_8812F) & \ 18841 BIT_MASK_WMAC_MU_BFEE_PORT_SEL_8812F) 18842 #define BIT_SET_WMAC_MU_BFEE_PORT_SEL_8812F(x, v) \ 18843 (BIT_CLEAR_WMAC_MU_BFEE_PORT_SEL_8812F(x) | \ 18844 BIT_WMAC_MU_BFEE_PORT_SEL_8812F(v)) 18845 18846 #define BIT_WMAC_MU_BFEE_DIS_8812F BIT(0) 18847 18848 /* 2 REG_WMAC_PAUSE_BB_CLR_TH_8812F */ 18849 18850 #define BIT_SHIFT_WMAC_PAUSE_BB_CLR_TH_8812F 0 18851 #define BIT_MASK_WMAC_PAUSE_BB_CLR_TH_8812F 0xff 18852 #define BIT_WMAC_PAUSE_BB_CLR_TH_8812F(x) \ 18853 (((x) & BIT_MASK_WMAC_PAUSE_BB_CLR_TH_8812F) \ 18854 << BIT_SHIFT_WMAC_PAUSE_BB_CLR_TH_8812F) 18855 #define BITS_WMAC_PAUSE_BB_CLR_TH_8812F \ 18856 (BIT_MASK_WMAC_PAUSE_BB_CLR_TH_8812F \ 18857 << BIT_SHIFT_WMAC_PAUSE_BB_CLR_TH_8812F) 18858 #define BIT_CLEAR_WMAC_PAUSE_BB_CLR_TH_8812F(x) \ 18859 ((x) & (~BITS_WMAC_PAUSE_BB_CLR_TH_8812F)) 18860 #define BIT_GET_WMAC_PAUSE_BB_CLR_TH_8812F(x) \ 18861 (((x) >> BIT_SHIFT_WMAC_PAUSE_BB_CLR_TH_8812F) & \ 18862 BIT_MASK_WMAC_PAUSE_BB_CLR_TH_8812F) 18863 #define BIT_SET_WMAC_PAUSE_BB_CLR_TH_8812F(x, v) \ 18864 (BIT_CLEAR_WMAC_PAUSE_BB_CLR_TH_8812F(x) | \ 18865 BIT_WMAC_PAUSE_BB_CLR_TH_8812F(v)) 18866 18867 /* 2 REG__WMAC_MULBK_BUF_8812F */ 18868 18869 #define BIT_SHIFT_WMAC_MULBK_PAGE_SIZE_8812F 0 18870 #define BIT_MASK_WMAC_MULBK_PAGE_SIZE_8812F 0xff 18871 #define BIT_WMAC_MULBK_PAGE_SIZE_8812F(x) \ 18872 (((x) & BIT_MASK_WMAC_MULBK_PAGE_SIZE_8812F) \ 18873 << BIT_SHIFT_WMAC_MULBK_PAGE_SIZE_8812F) 18874 #define BITS_WMAC_MULBK_PAGE_SIZE_8812F \ 18875 (BIT_MASK_WMAC_MULBK_PAGE_SIZE_8812F \ 18876 << BIT_SHIFT_WMAC_MULBK_PAGE_SIZE_8812F) 18877 #define BIT_CLEAR_WMAC_MULBK_PAGE_SIZE_8812F(x) \ 18878 ((x) & (~BITS_WMAC_MULBK_PAGE_SIZE_8812F)) 18879 #define BIT_GET_WMAC_MULBK_PAGE_SIZE_8812F(x) \ 18880 (((x) >> BIT_SHIFT_WMAC_MULBK_PAGE_SIZE_8812F) & \ 18881 BIT_MASK_WMAC_MULBK_PAGE_SIZE_8812F) 18882 #define BIT_SET_WMAC_MULBK_PAGE_SIZE_8812F(x, v) \ 18883 (BIT_CLEAR_WMAC_MULBK_PAGE_SIZE_8812F(x) | \ 18884 BIT_WMAC_MULBK_PAGE_SIZE_8812F(v)) 18885 18886 /* 2 REG_WMAC_MU_OPTION_8812F */ 18887 18888 /* 2 REG_WMAC_MU_BF_CTL_8812F */ 18889 #define BIT_WMAC_INVLD_BFPRT_CHK_8812F BIT(15) 18890 #define BIT_WMAC_RETXBFRPTSEQ_UPD_8812F BIT(14) 18891 18892 #define BIT_SHIFT_WMAC_MU_BFRPTSEG_SEL_8812F 12 18893 #define BIT_MASK_WMAC_MU_BFRPTSEG_SEL_8812F 0x3 18894 #define BIT_WMAC_MU_BFRPTSEG_SEL_8812F(x) \ 18895 (((x) & BIT_MASK_WMAC_MU_BFRPTSEG_SEL_8812F) \ 18896 << BIT_SHIFT_WMAC_MU_BFRPTSEG_SEL_8812F) 18897 #define BITS_WMAC_MU_BFRPTSEG_SEL_8812F \ 18898 (BIT_MASK_WMAC_MU_BFRPTSEG_SEL_8812F \ 18899 << BIT_SHIFT_WMAC_MU_BFRPTSEG_SEL_8812F) 18900 #define BIT_CLEAR_WMAC_MU_BFRPTSEG_SEL_8812F(x) \ 18901 ((x) & (~BITS_WMAC_MU_BFRPTSEG_SEL_8812F)) 18902 #define BIT_GET_WMAC_MU_BFRPTSEG_SEL_8812F(x) \ 18903 (((x) >> BIT_SHIFT_WMAC_MU_BFRPTSEG_SEL_8812F) & \ 18904 BIT_MASK_WMAC_MU_BFRPTSEG_SEL_8812F) 18905 #define BIT_SET_WMAC_MU_BFRPTSEG_SEL_8812F(x, v) \ 18906 (BIT_CLEAR_WMAC_MU_BFRPTSEG_SEL_8812F(x) | \ 18907 BIT_WMAC_MU_BFRPTSEG_SEL_8812F(v)) 18908 18909 #define BIT_SHIFT_WMAC_MU_BF_MYAID_8812F 0 18910 #define BIT_MASK_WMAC_MU_BF_MYAID_8812F 0xfff 18911 #define BIT_WMAC_MU_BF_MYAID_8812F(x) \ 18912 (((x) & BIT_MASK_WMAC_MU_BF_MYAID_8812F) \ 18913 << BIT_SHIFT_WMAC_MU_BF_MYAID_8812F) 18914 #define BITS_WMAC_MU_BF_MYAID_8812F \ 18915 (BIT_MASK_WMAC_MU_BF_MYAID_8812F << BIT_SHIFT_WMAC_MU_BF_MYAID_8812F) 18916 #define BIT_CLEAR_WMAC_MU_BF_MYAID_8812F(x) \ 18917 ((x) & (~BITS_WMAC_MU_BF_MYAID_8812F)) 18918 #define BIT_GET_WMAC_MU_BF_MYAID_8812F(x) \ 18919 (((x) >> BIT_SHIFT_WMAC_MU_BF_MYAID_8812F) & \ 18920 BIT_MASK_WMAC_MU_BF_MYAID_8812F) 18921 #define BIT_SET_WMAC_MU_BF_MYAID_8812F(x, v) \ 18922 (BIT_CLEAR_WMAC_MU_BF_MYAID_8812F(x) | BIT_WMAC_MU_BF_MYAID_8812F(v)) 18923 18924 /* 2 REG_WMAC_MU_BFRPT_PARA_8812F */ 18925 18926 #define BIT_SHIFT_BFRPT_PARA_USERID_SEL_V1_8812F 13 18927 #define BIT_MASK_BFRPT_PARA_USERID_SEL_V1_8812F 0x7 18928 #define BIT_BFRPT_PARA_USERID_SEL_V1_8812F(x) \ 18929 (((x) & BIT_MASK_BFRPT_PARA_USERID_SEL_V1_8812F) \ 18930 << BIT_SHIFT_BFRPT_PARA_USERID_SEL_V1_8812F) 18931 #define BITS_BFRPT_PARA_USERID_SEL_V1_8812F \ 18932 (BIT_MASK_BFRPT_PARA_USERID_SEL_V1_8812F \ 18933 << BIT_SHIFT_BFRPT_PARA_USERID_SEL_V1_8812F) 18934 #define BIT_CLEAR_BFRPT_PARA_USERID_SEL_V1_8812F(x) \ 18935 ((x) & (~BITS_BFRPT_PARA_USERID_SEL_V1_8812F)) 18936 #define BIT_GET_BFRPT_PARA_USERID_SEL_V1_8812F(x) \ 18937 (((x) >> BIT_SHIFT_BFRPT_PARA_USERID_SEL_V1_8812F) & \ 18938 BIT_MASK_BFRPT_PARA_USERID_SEL_V1_8812F) 18939 #define BIT_SET_BFRPT_PARA_USERID_SEL_V1_8812F(x, v) \ 18940 (BIT_CLEAR_BFRPT_PARA_USERID_SEL_V1_8812F(x) | \ 18941 BIT_BFRPT_PARA_USERID_SEL_V1_8812F(v)) 18942 18943 #define BIT_SHIFT_BFRPT_PARA_V1_8812F 0 18944 #define BIT_MASK_BFRPT_PARA_V1_8812F 0x1fff 18945 #define BIT_BFRPT_PARA_V1_8812F(x) \ 18946 (((x) & BIT_MASK_BFRPT_PARA_V1_8812F) << BIT_SHIFT_BFRPT_PARA_V1_8812F) 18947 #define BITS_BFRPT_PARA_V1_8812F \ 18948 (BIT_MASK_BFRPT_PARA_V1_8812F << BIT_SHIFT_BFRPT_PARA_V1_8812F) 18949 #define BIT_CLEAR_BFRPT_PARA_V1_8812F(x) ((x) & (~BITS_BFRPT_PARA_V1_8812F)) 18950 #define BIT_GET_BFRPT_PARA_V1_8812F(x) \ 18951 (((x) >> BIT_SHIFT_BFRPT_PARA_V1_8812F) & BIT_MASK_BFRPT_PARA_V1_8812F) 18952 #define BIT_SET_BFRPT_PARA_V1_8812F(x, v) \ 18953 (BIT_CLEAR_BFRPT_PARA_V1_8812F(x) | BIT_BFRPT_PARA_V1_8812F(v)) 18954 18955 /* 2 REG_WMAC_ASSOCIATED_MU_BFMEE2_8812F */ 18956 #define BIT_STATUS_BFEE2_8812F BIT(10) 18957 #define BIT_WMAC_MU_BFEE2_EN_8812F BIT(9) 18958 18959 #define BIT_SHIFT_WMAC_MU_BFEE2_AID_8812F 0 18960 #define BIT_MASK_WMAC_MU_BFEE2_AID_8812F 0x1ff 18961 #define BIT_WMAC_MU_BFEE2_AID_8812F(x) \ 18962 (((x) & BIT_MASK_WMAC_MU_BFEE2_AID_8812F) \ 18963 << BIT_SHIFT_WMAC_MU_BFEE2_AID_8812F) 18964 #define BITS_WMAC_MU_BFEE2_AID_8812F \ 18965 (BIT_MASK_WMAC_MU_BFEE2_AID_8812F << BIT_SHIFT_WMAC_MU_BFEE2_AID_8812F) 18966 #define BIT_CLEAR_WMAC_MU_BFEE2_AID_8812F(x) \ 18967 ((x) & (~BITS_WMAC_MU_BFEE2_AID_8812F)) 18968 #define BIT_GET_WMAC_MU_BFEE2_AID_8812F(x) \ 18969 (((x) >> BIT_SHIFT_WMAC_MU_BFEE2_AID_8812F) & \ 18970 BIT_MASK_WMAC_MU_BFEE2_AID_8812F) 18971 #define BIT_SET_WMAC_MU_BFEE2_AID_8812F(x, v) \ 18972 (BIT_CLEAR_WMAC_MU_BFEE2_AID_8812F(x) | BIT_WMAC_MU_BFEE2_AID_8812F(v)) 18973 18974 /* 2 REG_WMAC_ASSOCIATED_MU_BFMEE3_8812F */ 18975 #define BIT_STATUS_BFEE3_8812F BIT(10) 18976 #define BIT_WMAC_MU_BFEE3_EN_8812F BIT(9) 18977 18978 #define BIT_SHIFT_WMAC_MU_BFEE3_AID_8812F 0 18979 #define BIT_MASK_WMAC_MU_BFEE3_AID_8812F 0x1ff 18980 #define BIT_WMAC_MU_BFEE3_AID_8812F(x) \ 18981 (((x) & BIT_MASK_WMAC_MU_BFEE3_AID_8812F) \ 18982 << BIT_SHIFT_WMAC_MU_BFEE3_AID_8812F) 18983 #define BITS_WMAC_MU_BFEE3_AID_8812F \ 18984 (BIT_MASK_WMAC_MU_BFEE3_AID_8812F << BIT_SHIFT_WMAC_MU_BFEE3_AID_8812F) 18985 #define BIT_CLEAR_WMAC_MU_BFEE3_AID_8812F(x) \ 18986 ((x) & (~BITS_WMAC_MU_BFEE3_AID_8812F)) 18987 #define BIT_GET_WMAC_MU_BFEE3_AID_8812F(x) \ 18988 (((x) >> BIT_SHIFT_WMAC_MU_BFEE3_AID_8812F) & \ 18989 BIT_MASK_WMAC_MU_BFEE3_AID_8812F) 18990 #define BIT_SET_WMAC_MU_BFEE3_AID_8812F(x, v) \ 18991 (BIT_CLEAR_WMAC_MU_BFEE3_AID_8812F(x) | BIT_WMAC_MU_BFEE3_AID_8812F(v)) 18992 18993 /* 2 REG_WMAC_ASSOCIATED_MU_BFMEE4_8812F */ 18994 #define BIT_STATUS_BFEE4_8812F BIT(10) 18995 #define BIT_WMAC_MU_BFEE4_EN_8812F BIT(9) 18996 18997 #define BIT_SHIFT_WMAC_MU_BFEE4_AID_8812F 0 18998 #define BIT_MASK_WMAC_MU_BFEE4_AID_8812F 0x1ff 18999 #define BIT_WMAC_MU_BFEE4_AID_8812F(x) \ 19000 (((x) & BIT_MASK_WMAC_MU_BFEE4_AID_8812F) \ 19001 << BIT_SHIFT_WMAC_MU_BFEE4_AID_8812F) 19002 #define BITS_WMAC_MU_BFEE4_AID_8812F \ 19003 (BIT_MASK_WMAC_MU_BFEE4_AID_8812F << BIT_SHIFT_WMAC_MU_BFEE4_AID_8812F) 19004 #define BIT_CLEAR_WMAC_MU_BFEE4_AID_8812F(x) \ 19005 ((x) & (~BITS_WMAC_MU_BFEE4_AID_8812F)) 19006 #define BIT_GET_WMAC_MU_BFEE4_AID_8812F(x) \ 19007 (((x) >> BIT_SHIFT_WMAC_MU_BFEE4_AID_8812F) & \ 19008 BIT_MASK_WMAC_MU_BFEE4_AID_8812F) 19009 #define BIT_SET_WMAC_MU_BFEE4_AID_8812F(x, v) \ 19010 (BIT_CLEAR_WMAC_MU_BFEE4_AID_8812F(x) | BIT_WMAC_MU_BFEE4_AID_8812F(v)) 19011 19012 /* 2 REG_WMAC_ASSOCIATED_MU_BFMEE5_8812F */ 19013 #define BIT_BIT_STATUS_BFEE5_8812F BIT(10) 19014 #define BIT_WMAC_MU_BFEE5_EN_8812F BIT(9) 19015 19016 #define BIT_SHIFT_WMAC_MU_BFEE5_AID_8812F 0 19017 #define BIT_MASK_WMAC_MU_BFEE5_AID_8812F 0x1ff 19018 #define BIT_WMAC_MU_BFEE5_AID_8812F(x) \ 19019 (((x) & BIT_MASK_WMAC_MU_BFEE5_AID_8812F) \ 19020 << BIT_SHIFT_WMAC_MU_BFEE5_AID_8812F) 19021 #define BITS_WMAC_MU_BFEE5_AID_8812F \ 19022 (BIT_MASK_WMAC_MU_BFEE5_AID_8812F << BIT_SHIFT_WMAC_MU_BFEE5_AID_8812F) 19023 #define BIT_CLEAR_WMAC_MU_BFEE5_AID_8812F(x) \ 19024 ((x) & (~BITS_WMAC_MU_BFEE5_AID_8812F)) 19025 #define BIT_GET_WMAC_MU_BFEE5_AID_8812F(x) \ 19026 (((x) >> BIT_SHIFT_WMAC_MU_BFEE5_AID_8812F) & \ 19027 BIT_MASK_WMAC_MU_BFEE5_AID_8812F) 19028 #define BIT_SET_WMAC_MU_BFEE5_AID_8812F(x, v) \ 19029 (BIT_CLEAR_WMAC_MU_BFEE5_AID_8812F(x) | BIT_WMAC_MU_BFEE5_AID_8812F(v)) 19030 19031 /* 2 REG_WMAC_ASSOCIATED_MU_BFMEE6_8812F */ 19032 #define BIT_STATUS_BFEE6_8812F BIT(10) 19033 #define BIT_WMAC_MU_BFEE6_EN_8812F BIT(9) 19034 19035 #define BIT_SHIFT_WMAC_MU_BFEE6_AID_8812F 0 19036 #define BIT_MASK_WMAC_MU_BFEE6_AID_8812F 0x1ff 19037 #define BIT_WMAC_MU_BFEE6_AID_8812F(x) \ 19038 (((x) & BIT_MASK_WMAC_MU_BFEE6_AID_8812F) \ 19039 << BIT_SHIFT_WMAC_MU_BFEE6_AID_8812F) 19040 #define BITS_WMAC_MU_BFEE6_AID_8812F \ 19041 (BIT_MASK_WMAC_MU_BFEE6_AID_8812F << BIT_SHIFT_WMAC_MU_BFEE6_AID_8812F) 19042 #define BIT_CLEAR_WMAC_MU_BFEE6_AID_8812F(x) \ 19043 ((x) & (~BITS_WMAC_MU_BFEE6_AID_8812F)) 19044 #define BIT_GET_WMAC_MU_BFEE6_AID_8812F(x) \ 19045 (((x) >> BIT_SHIFT_WMAC_MU_BFEE6_AID_8812F) & \ 19046 BIT_MASK_WMAC_MU_BFEE6_AID_8812F) 19047 #define BIT_SET_WMAC_MU_BFEE6_AID_8812F(x, v) \ 19048 (BIT_CLEAR_WMAC_MU_BFEE6_AID_8812F(x) | BIT_WMAC_MU_BFEE6_AID_8812F(v)) 19049 19050 /* 2 REG_WMAC_ASSOCIATED_MU_BFMEE7_8812F */ 19051 #define BIT_STATUS_BFEE7_8812F BIT(10) 19052 #define BIT_WMAC_MU_BFEE7_EN_8812F BIT(9) 19053 19054 #define BIT_SHIFT_WMAC_MU_BFEE7_AID_8812F 0 19055 #define BIT_MASK_WMAC_MU_BFEE7_AID_8812F 0x1ff 19056 #define BIT_WMAC_MU_BFEE7_AID_8812F(x) \ 19057 (((x) & BIT_MASK_WMAC_MU_BFEE7_AID_8812F) \ 19058 << BIT_SHIFT_WMAC_MU_BFEE7_AID_8812F) 19059 #define BITS_WMAC_MU_BFEE7_AID_8812F \ 19060 (BIT_MASK_WMAC_MU_BFEE7_AID_8812F << BIT_SHIFT_WMAC_MU_BFEE7_AID_8812F) 19061 #define BIT_CLEAR_WMAC_MU_BFEE7_AID_8812F(x) \ 19062 ((x) & (~BITS_WMAC_MU_BFEE7_AID_8812F)) 19063 #define BIT_GET_WMAC_MU_BFEE7_AID_8812F(x) \ 19064 (((x) >> BIT_SHIFT_WMAC_MU_BFEE7_AID_8812F) & \ 19065 BIT_MASK_WMAC_MU_BFEE7_AID_8812F) 19066 #define BIT_SET_WMAC_MU_BFEE7_AID_8812F(x, v) \ 19067 (BIT_CLEAR_WMAC_MU_BFEE7_AID_8812F(x) | BIT_WMAC_MU_BFEE7_AID_8812F(v)) 19068 19069 /* 2 REG_WMAC_BB_STOP_RX_COUNTER_8812F */ 19070 #define BIT_RST_ALL_COUNTER_8812F BIT(31) 19071 19072 #define BIT_SHIFT_ABORT_RX_VBON_COUNTER_8812F 16 19073 #define BIT_MASK_ABORT_RX_VBON_COUNTER_8812F 0xff 19074 #define BIT_ABORT_RX_VBON_COUNTER_8812F(x) \ 19075 (((x) & BIT_MASK_ABORT_RX_VBON_COUNTER_8812F) \ 19076 << BIT_SHIFT_ABORT_RX_VBON_COUNTER_8812F) 19077 #define BITS_ABORT_RX_VBON_COUNTER_8812F \ 19078 (BIT_MASK_ABORT_RX_VBON_COUNTER_8812F \ 19079 << BIT_SHIFT_ABORT_RX_VBON_COUNTER_8812F) 19080 #define BIT_CLEAR_ABORT_RX_VBON_COUNTER_8812F(x) \ 19081 ((x) & (~BITS_ABORT_RX_VBON_COUNTER_8812F)) 19082 #define BIT_GET_ABORT_RX_VBON_COUNTER_8812F(x) \ 19083 (((x) >> BIT_SHIFT_ABORT_RX_VBON_COUNTER_8812F) & \ 19084 BIT_MASK_ABORT_RX_VBON_COUNTER_8812F) 19085 #define BIT_SET_ABORT_RX_VBON_COUNTER_8812F(x, v) \ 19086 (BIT_CLEAR_ABORT_RX_VBON_COUNTER_8812F(x) | \ 19087 BIT_ABORT_RX_VBON_COUNTER_8812F(v)) 19088 19089 #define BIT_SHIFT_ABORT_RX_RDRDY_COUNTER_8812F 8 19090 #define BIT_MASK_ABORT_RX_RDRDY_COUNTER_8812F 0xff 19091 #define BIT_ABORT_RX_RDRDY_COUNTER_8812F(x) \ 19092 (((x) & BIT_MASK_ABORT_RX_RDRDY_COUNTER_8812F) \ 19093 << BIT_SHIFT_ABORT_RX_RDRDY_COUNTER_8812F) 19094 #define BITS_ABORT_RX_RDRDY_COUNTER_8812F \ 19095 (BIT_MASK_ABORT_RX_RDRDY_COUNTER_8812F \ 19096 << BIT_SHIFT_ABORT_RX_RDRDY_COUNTER_8812F) 19097 #define BIT_CLEAR_ABORT_RX_RDRDY_COUNTER_8812F(x) \ 19098 ((x) & (~BITS_ABORT_RX_RDRDY_COUNTER_8812F)) 19099 #define BIT_GET_ABORT_RX_RDRDY_COUNTER_8812F(x) \ 19100 (((x) >> BIT_SHIFT_ABORT_RX_RDRDY_COUNTER_8812F) & \ 19101 BIT_MASK_ABORT_RX_RDRDY_COUNTER_8812F) 19102 #define BIT_SET_ABORT_RX_RDRDY_COUNTER_8812F(x, v) \ 19103 (BIT_CLEAR_ABORT_RX_RDRDY_COUNTER_8812F(x) | \ 19104 BIT_ABORT_RX_RDRDY_COUNTER_8812F(v)) 19105 19106 #define BIT_SHIFT_VBON_EARLY_FALLING_COUNTER_8812F 0 19107 #define BIT_MASK_VBON_EARLY_FALLING_COUNTER_8812F 0xff 19108 #define BIT_VBON_EARLY_FALLING_COUNTER_8812F(x) \ 19109 (((x) & BIT_MASK_VBON_EARLY_FALLING_COUNTER_8812F) \ 19110 << BIT_SHIFT_VBON_EARLY_FALLING_COUNTER_8812F) 19111 #define BITS_VBON_EARLY_FALLING_COUNTER_8812F \ 19112 (BIT_MASK_VBON_EARLY_FALLING_COUNTER_8812F \ 19113 << BIT_SHIFT_VBON_EARLY_FALLING_COUNTER_8812F) 19114 #define BIT_CLEAR_VBON_EARLY_FALLING_COUNTER_8812F(x) \ 19115 ((x) & (~BITS_VBON_EARLY_FALLING_COUNTER_8812F)) 19116 #define BIT_GET_VBON_EARLY_FALLING_COUNTER_8812F(x) \ 19117 (((x) >> BIT_SHIFT_VBON_EARLY_FALLING_COUNTER_8812F) & \ 19118 BIT_MASK_VBON_EARLY_FALLING_COUNTER_8812F) 19119 #define BIT_SET_VBON_EARLY_FALLING_COUNTER_8812F(x, v) \ 19120 (BIT_CLEAR_VBON_EARLY_FALLING_COUNTER_8812F(x) | \ 19121 BIT_VBON_EARLY_FALLING_COUNTER_8812F(v)) 19122 19123 /* 2 REG_WMAC_PLCP_MONITOR_8812F */ 19124 #define BIT_WMAC_PLCP_TRX_SEL_8812F BIT(31) 19125 19126 #define BIT_SHIFT_WMAC_PLCP_RDSIG_SEL_8812F 28 19127 #define BIT_MASK_WMAC_PLCP_RDSIG_SEL_8812F 0x7 19128 #define BIT_WMAC_PLCP_RDSIG_SEL_8812F(x) \ 19129 (((x) & BIT_MASK_WMAC_PLCP_RDSIG_SEL_8812F) \ 19130 << BIT_SHIFT_WMAC_PLCP_RDSIG_SEL_8812F) 19131 #define BITS_WMAC_PLCP_RDSIG_SEL_8812F \ 19132 (BIT_MASK_WMAC_PLCP_RDSIG_SEL_8812F \ 19133 << BIT_SHIFT_WMAC_PLCP_RDSIG_SEL_8812F) 19134 #define BIT_CLEAR_WMAC_PLCP_RDSIG_SEL_8812F(x) \ 19135 ((x) & (~BITS_WMAC_PLCP_RDSIG_SEL_8812F)) 19136 #define BIT_GET_WMAC_PLCP_RDSIG_SEL_8812F(x) \ 19137 (((x) >> BIT_SHIFT_WMAC_PLCP_RDSIG_SEL_8812F) & \ 19138 BIT_MASK_WMAC_PLCP_RDSIG_SEL_8812F) 19139 #define BIT_SET_WMAC_PLCP_RDSIG_SEL_8812F(x, v) \ 19140 (BIT_CLEAR_WMAC_PLCP_RDSIG_SEL_8812F(x) | \ 19141 BIT_WMAC_PLCP_RDSIG_SEL_8812F(v)) 19142 19143 #define BIT_SHIFT_WMAC_RATE_IDX_8812F 24 19144 #define BIT_MASK_WMAC_RATE_IDX_8812F 0xf 19145 #define BIT_WMAC_RATE_IDX_8812F(x) \ 19146 (((x) & BIT_MASK_WMAC_RATE_IDX_8812F) << BIT_SHIFT_WMAC_RATE_IDX_8812F) 19147 #define BITS_WMAC_RATE_IDX_8812F \ 19148 (BIT_MASK_WMAC_RATE_IDX_8812F << BIT_SHIFT_WMAC_RATE_IDX_8812F) 19149 #define BIT_CLEAR_WMAC_RATE_IDX_8812F(x) ((x) & (~BITS_WMAC_RATE_IDX_8812F)) 19150 #define BIT_GET_WMAC_RATE_IDX_8812F(x) \ 19151 (((x) >> BIT_SHIFT_WMAC_RATE_IDX_8812F) & BIT_MASK_WMAC_RATE_IDX_8812F) 19152 #define BIT_SET_WMAC_RATE_IDX_8812F(x, v) \ 19153 (BIT_CLEAR_WMAC_RATE_IDX_8812F(x) | BIT_WMAC_RATE_IDX_8812F(v)) 19154 19155 #define BIT_SHIFT_WMAC_PLCP_RDSIG_8812F 0 19156 #define BIT_MASK_WMAC_PLCP_RDSIG_8812F 0xffffff 19157 #define BIT_WMAC_PLCP_RDSIG_8812F(x) \ 19158 (((x) & BIT_MASK_WMAC_PLCP_RDSIG_8812F) \ 19159 << BIT_SHIFT_WMAC_PLCP_RDSIG_8812F) 19160 #define BITS_WMAC_PLCP_RDSIG_8812F \ 19161 (BIT_MASK_WMAC_PLCP_RDSIG_8812F << BIT_SHIFT_WMAC_PLCP_RDSIG_8812F) 19162 #define BIT_CLEAR_WMAC_PLCP_RDSIG_8812F(x) ((x) & (~BITS_WMAC_PLCP_RDSIG_8812F)) 19163 #define BIT_GET_WMAC_PLCP_RDSIG_8812F(x) \ 19164 (((x) >> BIT_SHIFT_WMAC_PLCP_RDSIG_8812F) & \ 19165 BIT_MASK_WMAC_PLCP_RDSIG_8812F) 19166 #define BIT_SET_WMAC_PLCP_RDSIG_8812F(x, v) \ 19167 (BIT_CLEAR_WMAC_PLCP_RDSIG_8812F(x) | BIT_WMAC_PLCP_RDSIG_8812F(v)) 19168 19169 /* 2 REG_WMAC_PLCP_MONITOR_MUTX_8812F */ 19170 #define BIT_WMAC_MUTX_IDX_8812F BIT(24) 19171 19172 #define BIT_SHIFT_WMAC_PLCP_RDSIG_8812F 0 19173 #define BIT_MASK_WMAC_PLCP_RDSIG_8812F 0xffffff 19174 #define BIT_WMAC_PLCP_RDSIG_8812F(x) \ 19175 (((x) & BIT_MASK_WMAC_PLCP_RDSIG_8812F) \ 19176 << BIT_SHIFT_WMAC_PLCP_RDSIG_8812F) 19177 #define BITS_WMAC_PLCP_RDSIG_8812F \ 19178 (BIT_MASK_WMAC_PLCP_RDSIG_8812F << BIT_SHIFT_WMAC_PLCP_RDSIG_8812F) 19179 #define BIT_CLEAR_WMAC_PLCP_RDSIG_8812F(x) ((x) & (~BITS_WMAC_PLCP_RDSIG_8812F)) 19180 #define BIT_GET_WMAC_PLCP_RDSIG_8812F(x) \ 19181 (((x) >> BIT_SHIFT_WMAC_PLCP_RDSIG_8812F) & \ 19182 BIT_MASK_WMAC_PLCP_RDSIG_8812F) 19183 #define BIT_SET_WMAC_PLCP_RDSIG_8812F(x, v) \ 19184 (BIT_CLEAR_WMAC_PLCP_RDSIG_8812F(x) | BIT_WMAC_PLCP_RDSIG_8812F(v)) 19185 19186 /* 2 REG_WMAC_CSIDMA_CFG_8812F */ 19187 19188 #define BIT_SHIFT_CSI_SEG_SIZE_8812F 16 19189 #define BIT_MASK_CSI_SEG_SIZE_8812F 0xfff 19190 #define BIT_CSI_SEG_SIZE_8812F(x) \ 19191 (((x) & BIT_MASK_CSI_SEG_SIZE_8812F) << BIT_SHIFT_CSI_SEG_SIZE_8812F) 19192 #define BITS_CSI_SEG_SIZE_8812F \ 19193 (BIT_MASK_CSI_SEG_SIZE_8812F << BIT_SHIFT_CSI_SEG_SIZE_8812F) 19194 #define BIT_CLEAR_CSI_SEG_SIZE_8812F(x) ((x) & (~BITS_CSI_SEG_SIZE_8812F)) 19195 #define BIT_GET_CSI_SEG_SIZE_8812F(x) \ 19196 (((x) >> BIT_SHIFT_CSI_SEG_SIZE_8812F) & BIT_MASK_CSI_SEG_SIZE_8812F) 19197 #define BIT_SET_CSI_SEG_SIZE_8812F(x, v) \ 19198 (BIT_CLEAR_CSI_SEG_SIZE_8812F(x) | BIT_CSI_SEG_SIZE_8812F(v)) 19199 19200 #define BIT_SHIFT_CSI_START_PAGE_8812F 0 19201 #define BIT_MASK_CSI_START_PAGE_8812F 0xfff 19202 #define BIT_CSI_START_PAGE_8812F(x) \ 19203 (((x) & BIT_MASK_CSI_START_PAGE_8812F) \ 19204 << BIT_SHIFT_CSI_START_PAGE_8812F) 19205 #define BITS_CSI_START_PAGE_8812F \ 19206 (BIT_MASK_CSI_START_PAGE_8812F << BIT_SHIFT_CSI_START_PAGE_8812F) 19207 #define BIT_CLEAR_CSI_START_PAGE_8812F(x) ((x) & (~BITS_CSI_START_PAGE_8812F)) 19208 #define BIT_GET_CSI_START_PAGE_8812F(x) \ 19209 (((x) >> BIT_SHIFT_CSI_START_PAGE_8812F) & \ 19210 BIT_MASK_CSI_START_PAGE_8812F) 19211 #define BIT_SET_CSI_START_PAGE_8812F(x, v) \ 19212 (BIT_CLEAR_CSI_START_PAGE_8812F(x) | BIT_CSI_START_PAGE_8812F(v)) 19213 19214 /* 2 REG_TRANSMIT_ADDRSS_0_8812F (TA0 REGISTER) */ 19215 19216 #define BIT_SHIFT_TA0_V1_8812F 0 19217 #define BIT_MASK_TA0_V1_8812F 0xffffffffL 19218 #define BIT_TA0_V1_8812F(x) \ 19219 (((x) & BIT_MASK_TA0_V1_8812F) << BIT_SHIFT_TA0_V1_8812F) 19220 #define BITS_TA0_V1_8812F (BIT_MASK_TA0_V1_8812F << BIT_SHIFT_TA0_V1_8812F) 19221 #define BIT_CLEAR_TA0_V1_8812F(x) ((x) & (~BITS_TA0_V1_8812F)) 19222 #define BIT_GET_TA0_V1_8812F(x) \ 19223 (((x) >> BIT_SHIFT_TA0_V1_8812F) & BIT_MASK_TA0_V1_8812F) 19224 #define BIT_SET_TA0_V1_8812F(x, v) \ 19225 (BIT_CLEAR_TA0_V1_8812F(x) | BIT_TA0_V1_8812F(v)) 19226 19227 /* 2 REG_TRANSMIT_ADDRSS_0_H_8812F (TA0 REGISTER) */ 19228 19229 #define BIT_SHIFT_TA0_H_V1_8812F 0 19230 #define BIT_MASK_TA0_H_V1_8812F 0xffff 19231 #define BIT_TA0_H_V1_8812F(x) \ 19232 (((x) & BIT_MASK_TA0_H_V1_8812F) << BIT_SHIFT_TA0_H_V1_8812F) 19233 #define BITS_TA0_H_V1_8812F \ 19234 (BIT_MASK_TA0_H_V1_8812F << BIT_SHIFT_TA0_H_V1_8812F) 19235 #define BIT_CLEAR_TA0_H_V1_8812F(x) ((x) & (~BITS_TA0_H_V1_8812F)) 19236 #define BIT_GET_TA0_H_V1_8812F(x) \ 19237 (((x) >> BIT_SHIFT_TA0_H_V1_8812F) & BIT_MASK_TA0_H_V1_8812F) 19238 #define BIT_SET_TA0_H_V1_8812F(x, v) \ 19239 (BIT_CLEAR_TA0_H_V1_8812F(x) | BIT_TA0_H_V1_8812F(v)) 19240 19241 /* 2 REG_TRANSMIT_ADDRSS_1_8812F (TA1 REGISTER) */ 19242 19243 #define BIT_SHIFT_TA1_V1_8812F 0 19244 #define BIT_MASK_TA1_V1_8812F 0xffffffffL 19245 #define BIT_TA1_V1_8812F(x) \ 19246 (((x) & BIT_MASK_TA1_V1_8812F) << BIT_SHIFT_TA1_V1_8812F) 19247 #define BITS_TA1_V1_8812F (BIT_MASK_TA1_V1_8812F << BIT_SHIFT_TA1_V1_8812F) 19248 #define BIT_CLEAR_TA1_V1_8812F(x) ((x) & (~BITS_TA1_V1_8812F)) 19249 #define BIT_GET_TA1_V1_8812F(x) \ 19250 (((x) >> BIT_SHIFT_TA1_V1_8812F) & BIT_MASK_TA1_V1_8812F) 19251 #define BIT_SET_TA1_V1_8812F(x, v) \ 19252 (BIT_CLEAR_TA1_V1_8812F(x) | BIT_TA1_V1_8812F(v)) 19253 19254 /* 2 REG_TRANSMIT_ADDRSS_1_H_8812F (TA1 REGISTER) */ 19255 19256 #define BIT_SHIFT_TA1_H_V1_8812F 0 19257 #define BIT_MASK_TA1_H_V1_8812F 0xffff 19258 #define BIT_TA1_H_V1_8812F(x) \ 19259 (((x) & BIT_MASK_TA1_H_V1_8812F) << BIT_SHIFT_TA1_H_V1_8812F) 19260 #define BITS_TA1_H_V1_8812F \ 19261 (BIT_MASK_TA1_H_V1_8812F << BIT_SHIFT_TA1_H_V1_8812F) 19262 #define BIT_CLEAR_TA1_H_V1_8812F(x) ((x) & (~BITS_TA1_H_V1_8812F)) 19263 #define BIT_GET_TA1_H_V1_8812F(x) \ 19264 (((x) >> BIT_SHIFT_TA1_H_V1_8812F) & BIT_MASK_TA1_H_V1_8812F) 19265 #define BIT_SET_TA1_H_V1_8812F(x, v) \ 19266 (BIT_CLEAR_TA1_H_V1_8812F(x) | BIT_TA1_H_V1_8812F(v)) 19267 19268 /* 2 REG_TRANSMIT_ADDRSS_2_8812F (TA2 REGISTER) */ 19269 19270 #define BIT_SHIFT_TA2_V1_8812F 0 19271 #define BIT_MASK_TA2_V1_8812F 0xffffffffL 19272 #define BIT_TA2_V1_8812F(x) \ 19273 (((x) & BIT_MASK_TA2_V1_8812F) << BIT_SHIFT_TA2_V1_8812F) 19274 #define BITS_TA2_V1_8812F (BIT_MASK_TA2_V1_8812F << BIT_SHIFT_TA2_V1_8812F) 19275 #define BIT_CLEAR_TA2_V1_8812F(x) ((x) & (~BITS_TA2_V1_8812F)) 19276 #define BIT_GET_TA2_V1_8812F(x) \ 19277 (((x) >> BIT_SHIFT_TA2_V1_8812F) & BIT_MASK_TA2_V1_8812F) 19278 #define BIT_SET_TA2_V1_8812F(x, v) \ 19279 (BIT_CLEAR_TA2_V1_8812F(x) | BIT_TA2_V1_8812F(v)) 19280 19281 /* 2 REG_TRANSMIT_ADDRSS_2_H_8812F (TA2 REGISTER) */ 19282 19283 #define BIT_SHIFT_TA2_H_V1_8812F 0 19284 #define BIT_MASK_TA2_H_V1_8812F 0xffff 19285 #define BIT_TA2_H_V1_8812F(x) \ 19286 (((x) & BIT_MASK_TA2_H_V1_8812F) << BIT_SHIFT_TA2_H_V1_8812F) 19287 #define BITS_TA2_H_V1_8812F \ 19288 (BIT_MASK_TA2_H_V1_8812F << BIT_SHIFT_TA2_H_V1_8812F) 19289 #define BIT_CLEAR_TA2_H_V1_8812F(x) ((x) & (~BITS_TA2_H_V1_8812F)) 19290 #define BIT_GET_TA2_H_V1_8812F(x) \ 19291 (((x) >> BIT_SHIFT_TA2_H_V1_8812F) & BIT_MASK_TA2_H_V1_8812F) 19292 #define BIT_SET_TA2_H_V1_8812F(x, v) \ 19293 (BIT_CLEAR_TA2_H_V1_8812F(x) | BIT_TA2_H_V1_8812F(v)) 19294 19295 /* 2 REG_TRANSMIT_ADDRSS_3_8812F (TA3 REGISTER) */ 19296 19297 #define BIT_SHIFT_TA2_V1_8812F 0 19298 #define BIT_MASK_TA2_V1_8812F 0xffffffffL 19299 #define BIT_TA2_V1_8812F(x) \ 19300 (((x) & BIT_MASK_TA2_V1_8812F) << BIT_SHIFT_TA2_V1_8812F) 19301 #define BITS_TA2_V1_8812F (BIT_MASK_TA2_V1_8812F << BIT_SHIFT_TA2_V1_8812F) 19302 #define BIT_CLEAR_TA2_V1_8812F(x) ((x) & (~BITS_TA2_V1_8812F)) 19303 #define BIT_GET_TA2_V1_8812F(x) \ 19304 (((x) >> BIT_SHIFT_TA2_V1_8812F) & BIT_MASK_TA2_V1_8812F) 19305 #define BIT_SET_TA2_V1_8812F(x, v) \ 19306 (BIT_CLEAR_TA2_V1_8812F(x) | BIT_TA2_V1_8812F(v)) 19307 19308 /* 2 REG_TRANSMIT_ADDRSS_3_H_8812F (TA3 REGISTER) */ 19309 19310 #define BIT_SHIFT_TA3_H_V1_8812F 0 19311 #define BIT_MASK_TA3_H_V1_8812F 0xffff 19312 #define BIT_TA3_H_V1_8812F(x) \ 19313 (((x) & BIT_MASK_TA3_H_V1_8812F) << BIT_SHIFT_TA3_H_V1_8812F) 19314 #define BITS_TA3_H_V1_8812F \ 19315 (BIT_MASK_TA3_H_V1_8812F << BIT_SHIFT_TA3_H_V1_8812F) 19316 #define BIT_CLEAR_TA3_H_V1_8812F(x) ((x) & (~BITS_TA3_H_V1_8812F)) 19317 #define BIT_GET_TA3_H_V1_8812F(x) \ 19318 (((x) >> BIT_SHIFT_TA3_H_V1_8812F) & BIT_MASK_TA3_H_V1_8812F) 19319 #define BIT_SET_TA3_H_V1_8812F(x, v) \ 19320 (BIT_CLEAR_TA3_H_V1_8812F(x) | BIT_TA3_H_V1_8812F(v)) 19321 19322 /* 2 REG_TRANSMIT_ADDRSS_4_8812F (TA4 REGISTER) */ 19323 19324 #define BIT_SHIFT_TA4_V1_8812F 0 19325 #define BIT_MASK_TA4_V1_8812F 0xffffffffL 19326 #define BIT_TA4_V1_8812F(x) \ 19327 (((x) & BIT_MASK_TA4_V1_8812F) << BIT_SHIFT_TA4_V1_8812F) 19328 #define BITS_TA4_V1_8812F (BIT_MASK_TA4_V1_8812F << BIT_SHIFT_TA4_V1_8812F) 19329 #define BIT_CLEAR_TA4_V1_8812F(x) ((x) & (~BITS_TA4_V1_8812F)) 19330 #define BIT_GET_TA4_V1_8812F(x) \ 19331 (((x) >> BIT_SHIFT_TA4_V1_8812F) & BIT_MASK_TA4_V1_8812F) 19332 #define BIT_SET_TA4_V1_8812F(x, v) \ 19333 (BIT_CLEAR_TA4_V1_8812F(x) | BIT_TA4_V1_8812F(v)) 19334 19335 /* 2 REG_TRANSMIT_ADDRSS_4_H_8812F (TA4 REGISTER) */ 19336 19337 #define BIT_SHIFT_TA4_H_V1_8812F 0 19338 #define BIT_MASK_TA4_H_V1_8812F 0xffff 19339 #define BIT_TA4_H_V1_8812F(x) \ 19340 (((x) & BIT_MASK_TA4_H_V1_8812F) << BIT_SHIFT_TA4_H_V1_8812F) 19341 #define BITS_TA4_H_V1_8812F \ 19342 (BIT_MASK_TA4_H_V1_8812F << BIT_SHIFT_TA4_H_V1_8812F) 19343 #define BIT_CLEAR_TA4_H_V1_8812F(x) ((x) & (~BITS_TA4_H_V1_8812F)) 19344 #define BIT_GET_TA4_H_V1_8812F(x) \ 19345 (((x) >> BIT_SHIFT_TA4_H_V1_8812F) & BIT_MASK_TA4_H_V1_8812F) 19346 #define BIT_SET_TA4_H_V1_8812F(x, v) \ 19347 (BIT_CLEAR_TA4_H_V1_8812F(x) | BIT_TA4_H_V1_8812F(v)) 19348 19349 /* 2 REG_RSVD_8812F */ 19350 19351 /* 2 REG_RSVD_8812F */ 19352 19353 /* 2 REG_SND_AID12_8812F */ 19354 19355 #define BIT_SHIFT_USERID_SEL_8812F 12 19356 #define BIT_MASK_USERID_SEL_8812F 0x7 19357 #define BIT_USERID_SEL_8812F(x) \ 19358 (((x) & BIT_MASK_USERID_SEL_8812F) << BIT_SHIFT_USERID_SEL_8812F) 19359 #define BITS_USERID_SEL_8812F \ 19360 (BIT_MASK_USERID_SEL_8812F << BIT_SHIFT_USERID_SEL_8812F) 19361 #define BIT_CLEAR_USERID_SEL_8812F(x) ((x) & (~BITS_USERID_SEL_8812F)) 19362 #define BIT_GET_USERID_SEL_8812F(x) \ 19363 (((x) >> BIT_SHIFT_USERID_SEL_8812F) & BIT_MASK_USERID_SEL_8812F) 19364 #define BIT_SET_USERID_SEL_8812F(x, v) \ 19365 (BIT_CLEAR_USERID_SEL_8812F(x) | BIT_USERID_SEL_8812F(v)) 19366 19367 #define BIT_SHIFT_USERID_AID12_8812F 0 19368 #define BIT_MASK_USERID_AID12_8812F 0xfff 19369 #define BIT_USERID_AID12_8812F(x) \ 19370 (((x) & BIT_MASK_USERID_AID12_8812F) << BIT_SHIFT_USERID_AID12_8812F) 19371 #define BITS_USERID_AID12_8812F \ 19372 (BIT_MASK_USERID_AID12_8812F << BIT_SHIFT_USERID_AID12_8812F) 19373 #define BIT_CLEAR_USERID_AID12_8812F(x) ((x) & (~BITS_USERID_AID12_8812F)) 19374 #define BIT_GET_USERID_AID12_8812F(x) \ 19375 (((x) >> BIT_SHIFT_USERID_AID12_8812F) & BIT_MASK_USERID_AID12_8812F) 19376 #define BIT_SET_USERID_AID12_8812F(x, v) \ 19377 (BIT_CLEAR_USERID_AID12_8812F(x) | BIT_USERID_AID12_8812F(v)) 19378 19379 /* 2 REG_SND_PKT_INFO_8812F */ 19380 #define BIT_SND_FROM_DS_8812F BIT(7) 19381 #define BIT_SND_TO_DS_8812F BIT(6) 19382 19383 #define BIT_SHIFT_SND_TOKEN_8812F 0 19384 #define BIT_MASK_SND_TOKEN_8812F 0x3f 19385 #define BIT_SND_TOKEN_8812F(x) \ 19386 (((x) & BIT_MASK_SND_TOKEN_8812F) << BIT_SHIFT_SND_TOKEN_8812F) 19387 #define BITS_SND_TOKEN_8812F \ 19388 (BIT_MASK_SND_TOKEN_8812F << BIT_SHIFT_SND_TOKEN_8812F) 19389 #define BIT_CLEAR_SND_TOKEN_8812F(x) ((x) & (~BITS_SND_TOKEN_8812F)) 19390 #define BIT_GET_SND_TOKEN_8812F(x) \ 19391 (((x) >> BIT_SHIFT_SND_TOKEN_8812F) & BIT_MASK_SND_TOKEN_8812F) 19392 #define BIT_SET_SND_TOKEN_8812F(x, v) \ 19393 (BIT_CLEAR_SND_TOKEN_8812F(x) | BIT_SND_TOKEN_8812F(v)) 19394 19395 /* 2 REG_RSVD_8812F */ 19396 19397 /* 2 REG_RSVD_8812F */ 19398 19399 /* 2 REG_RSVD_8812F */ 19400 19401 /* 2 REG_RSVD_8812F */ 19402 19403 /* 2 REG_RSVD_8812F */ 19404 19405 /* 2 REG_RSVD_8812F */ 19406 19407 /* 2 REG_RSVD_8812F */ 19408 19409 /* 2 REG_RSVD_8812F */ 19410 19411 /* 2 REG_RSVD_8812F */ 19412 19413 /* 2 REG_RSVD_8812F */ 19414 19415 /* 2 REG_RSVD_8812F */ 19416 19417 /* 2 REG_RSVD_8812F */ 19418 19419 /* 2 REG_NOT_VALID_8812F */ 19420 19421 /* 2 REG_MACID1_8812F */ 19422 19423 #define BIT_SHIFT_MACID1_0_8812F 0 19424 #define BIT_MASK_MACID1_0_8812F 0xffffffffL 19425 #define BIT_MACID1_0_8812F(x) \ 19426 (((x) & BIT_MASK_MACID1_0_8812F) << BIT_SHIFT_MACID1_0_8812F) 19427 #define BITS_MACID1_0_8812F \ 19428 (BIT_MASK_MACID1_0_8812F << BIT_SHIFT_MACID1_0_8812F) 19429 #define BIT_CLEAR_MACID1_0_8812F(x) ((x) & (~BITS_MACID1_0_8812F)) 19430 #define BIT_GET_MACID1_0_8812F(x) \ 19431 (((x) >> BIT_SHIFT_MACID1_0_8812F) & BIT_MASK_MACID1_0_8812F) 19432 #define BIT_SET_MACID1_0_8812F(x, v) \ 19433 (BIT_CLEAR_MACID1_0_8812F(x) | BIT_MACID1_0_8812F(v)) 19434 19435 /* 2 REG_MACID1_1_8812F */ 19436 19437 #define BIT_SHIFT_MACID1_1_8812F 0 19438 #define BIT_MASK_MACID1_1_8812F 0xffff 19439 #define BIT_MACID1_1_8812F(x) \ 19440 (((x) & BIT_MASK_MACID1_1_8812F) << BIT_SHIFT_MACID1_1_8812F) 19441 #define BITS_MACID1_1_8812F \ 19442 (BIT_MASK_MACID1_1_8812F << BIT_SHIFT_MACID1_1_8812F) 19443 #define BIT_CLEAR_MACID1_1_8812F(x) ((x) & (~BITS_MACID1_1_8812F)) 19444 #define BIT_GET_MACID1_1_8812F(x) \ 19445 (((x) >> BIT_SHIFT_MACID1_1_8812F) & BIT_MASK_MACID1_1_8812F) 19446 #define BIT_SET_MACID1_1_8812F(x, v) \ 19447 (BIT_CLEAR_MACID1_1_8812F(x) | BIT_MACID1_1_8812F(v)) 19448 19449 /* 2 REG_BSSID1_8812F */ 19450 19451 #define BIT_SHIFT_BSSID1_0_8812F 0 19452 #define BIT_MASK_BSSID1_0_8812F 0xffffffffL 19453 #define BIT_BSSID1_0_8812F(x) \ 19454 (((x) & BIT_MASK_BSSID1_0_8812F) << BIT_SHIFT_BSSID1_0_8812F) 19455 #define BITS_BSSID1_0_8812F \ 19456 (BIT_MASK_BSSID1_0_8812F << BIT_SHIFT_BSSID1_0_8812F) 19457 #define BIT_CLEAR_BSSID1_0_8812F(x) ((x) & (~BITS_BSSID1_0_8812F)) 19458 #define BIT_GET_BSSID1_0_8812F(x) \ 19459 (((x) >> BIT_SHIFT_BSSID1_0_8812F) & BIT_MASK_BSSID1_0_8812F) 19460 #define BIT_SET_BSSID1_0_8812F(x, v) \ 19461 (BIT_CLEAR_BSSID1_0_8812F(x) | BIT_BSSID1_0_8812F(v)) 19462 19463 /* 2 REG_BSSID1_1_8812F */ 19464 19465 #define BIT_SHIFT_BSSID1_1_8812F 0 19466 #define BIT_MASK_BSSID1_1_8812F 0xffff 19467 #define BIT_BSSID1_1_8812F(x) \ 19468 (((x) & BIT_MASK_BSSID1_1_8812F) << BIT_SHIFT_BSSID1_1_8812F) 19469 #define BITS_BSSID1_1_8812F \ 19470 (BIT_MASK_BSSID1_1_8812F << BIT_SHIFT_BSSID1_1_8812F) 19471 #define BIT_CLEAR_BSSID1_1_8812F(x) ((x) & (~BITS_BSSID1_1_8812F)) 19472 #define BIT_GET_BSSID1_1_8812F(x) \ 19473 (((x) >> BIT_SHIFT_BSSID1_1_8812F) & BIT_MASK_BSSID1_1_8812F) 19474 #define BIT_SET_BSSID1_1_8812F(x, v) \ 19475 (BIT_CLEAR_BSSID1_1_8812F(x) | BIT_BSSID1_1_8812F(v)) 19476 19477 /* 2 REG_BCN_PSR_RPT1_8812F */ 19478 19479 #define BIT_SHIFT_DTIM_CNT1_8812F 24 19480 #define BIT_MASK_DTIM_CNT1_8812F 0xff 19481 #define BIT_DTIM_CNT1_8812F(x) \ 19482 (((x) & BIT_MASK_DTIM_CNT1_8812F) << BIT_SHIFT_DTIM_CNT1_8812F) 19483 #define BITS_DTIM_CNT1_8812F \ 19484 (BIT_MASK_DTIM_CNT1_8812F << BIT_SHIFT_DTIM_CNT1_8812F) 19485 #define BIT_CLEAR_DTIM_CNT1_8812F(x) ((x) & (~BITS_DTIM_CNT1_8812F)) 19486 #define BIT_GET_DTIM_CNT1_8812F(x) \ 19487 (((x) >> BIT_SHIFT_DTIM_CNT1_8812F) & BIT_MASK_DTIM_CNT1_8812F) 19488 #define BIT_SET_DTIM_CNT1_8812F(x, v) \ 19489 (BIT_CLEAR_DTIM_CNT1_8812F(x) | BIT_DTIM_CNT1_8812F(v)) 19490 19491 #define BIT_SHIFT_DTIM_PERIOD1_8812F 16 19492 #define BIT_MASK_DTIM_PERIOD1_8812F 0xff 19493 #define BIT_DTIM_PERIOD1_8812F(x) \ 19494 (((x) & BIT_MASK_DTIM_PERIOD1_8812F) << BIT_SHIFT_DTIM_PERIOD1_8812F) 19495 #define BITS_DTIM_PERIOD1_8812F \ 19496 (BIT_MASK_DTIM_PERIOD1_8812F << BIT_SHIFT_DTIM_PERIOD1_8812F) 19497 #define BIT_CLEAR_DTIM_PERIOD1_8812F(x) ((x) & (~BITS_DTIM_PERIOD1_8812F)) 19498 #define BIT_GET_DTIM_PERIOD1_8812F(x) \ 19499 (((x) >> BIT_SHIFT_DTIM_PERIOD1_8812F) & BIT_MASK_DTIM_PERIOD1_8812F) 19500 #define BIT_SET_DTIM_PERIOD1_8812F(x, v) \ 19501 (BIT_CLEAR_DTIM_PERIOD1_8812F(x) | BIT_DTIM_PERIOD1_8812F(v)) 19502 19503 #define BIT_DTIM1_8812F BIT(15) 19504 #define BIT_TIM1_8812F BIT(14) 19505 #define BIT_BCN_VALID_V2_8812F BIT(13) 19506 19507 #define BIT_SHIFT_PS_AID_1_8812F 0 19508 #define BIT_MASK_PS_AID_1_8812F 0x7ff 19509 #define BIT_PS_AID_1_8812F(x) \ 19510 (((x) & BIT_MASK_PS_AID_1_8812F) << BIT_SHIFT_PS_AID_1_8812F) 19511 #define BITS_PS_AID_1_8812F \ 19512 (BIT_MASK_PS_AID_1_8812F << BIT_SHIFT_PS_AID_1_8812F) 19513 #define BIT_CLEAR_PS_AID_1_8812F(x) ((x) & (~BITS_PS_AID_1_8812F)) 19514 #define BIT_GET_PS_AID_1_8812F(x) \ 19515 (((x) >> BIT_SHIFT_PS_AID_1_8812F) & BIT_MASK_PS_AID_1_8812F) 19516 #define BIT_SET_PS_AID_1_8812F(x, v) \ 19517 (BIT_CLEAR_PS_AID_1_8812F(x) | BIT_PS_AID_1_8812F(v)) 19518 19519 /* 2 REG_ASSOCIATED_BFMEE_SEL_8812F */ 19520 #define BIT_TXUSER_ID1_8812F BIT(25) 19521 19522 #define BIT_SHIFT_AID1_8812F 16 19523 #define BIT_MASK_AID1_8812F 0x1ff 19524 #define BIT_AID1_8812F(x) (((x) & BIT_MASK_AID1_8812F) << BIT_SHIFT_AID1_8812F) 19525 #define BITS_AID1_8812F (BIT_MASK_AID1_8812F << BIT_SHIFT_AID1_8812F) 19526 #define BIT_CLEAR_AID1_8812F(x) ((x) & (~BITS_AID1_8812F)) 19527 #define BIT_GET_AID1_8812F(x) \ 19528 (((x) >> BIT_SHIFT_AID1_8812F) & BIT_MASK_AID1_8812F) 19529 #define BIT_SET_AID1_8812F(x, v) (BIT_CLEAR_AID1_8812F(x) | BIT_AID1_8812F(v)) 19530 19531 #define BIT_TXUSER_ID0_8812F BIT(9) 19532 19533 #define BIT_SHIFT_AID0_8812F 0 19534 #define BIT_MASK_AID0_8812F 0x1ff 19535 #define BIT_AID0_8812F(x) (((x) & BIT_MASK_AID0_8812F) << BIT_SHIFT_AID0_8812F) 19536 #define BITS_AID0_8812F (BIT_MASK_AID0_8812F << BIT_SHIFT_AID0_8812F) 19537 #define BIT_CLEAR_AID0_8812F(x) ((x) & (~BITS_AID0_8812F)) 19538 #define BIT_GET_AID0_8812F(x) \ 19539 (((x) >> BIT_SHIFT_AID0_8812F) & BIT_MASK_AID0_8812F) 19540 #define BIT_SET_AID0_8812F(x, v) (BIT_CLEAR_AID0_8812F(x) | BIT_AID0_8812F(v)) 19541 19542 /* 2 REG_SND_PTCL_CTRL_8812F */ 19543 19544 #define BIT_SHIFT_NDP_RX_STANDBY_TIMER_8812F 24 19545 #define BIT_MASK_NDP_RX_STANDBY_TIMER_8812F 0xff 19546 #define BIT_NDP_RX_STANDBY_TIMER_8812F(x) \ 19547 (((x) & BIT_MASK_NDP_RX_STANDBY_TIMER_8812F) \ 19548 << BIT_SHIFT_NDP_RX_STANDBY_TIMER_8812F) 19549 #define BITS_NDP_RX_STANDBY_TIMER_8812F \ 19550 (BIT_MASK_NDP_RX_STANDBY_TIMER_8812F \ 19551 << BIT_SHIFT_NDP_RX_STANDBY_TIMER_8812F) 19552 #define BIT_CLEAR_NDP_RX_STANDBY_TIMER_8812F(x) \ 19553 ((x) & (~BITS_NDP_RX_STANDBY_TIMER_8812F)) 19554 #define BIT_GET_NDP_RX_STANDBY_TIMER_8812F(x) \ 19555 (((x) >> BIT_SHIFT_NDP_RX_STANDBY_TIMER_8812F) & \ 19556 BIT_MASK_NDP_RX_STANDBY_TIMER_8812F) 19557 #define BIT_SET_NDP_RX_STANDBY_TIMER_8812F(x, v) \ 19558 (BIT_CLEAR_NDP_RX_STANDBY_TIMER_8812F(x) | \ 19559 BIT_NDP_RX_STANDBY_TIMER_8812F(v)) 19560 19561 #define BIT_R_WMAC_CHK_RPTPOLL_A2_DIS_8812F BIT(23) 19562 #define BIT_R_WMAC_CHK_UCNDPA_A2_DIS_8812F BIT(22) 19563 19564 #define BIT_SHIFT_CSI_RPT_OFFSET_HT_V1_8812F 16 19565 #define BIT_MASK_CSI_RPT_OFFSET_HT_V1_8812F 0x3f 19566 #define BIT_CSI_RPT_OFFSET_HT_V1_8812F(x) \ 19567 (((x) & BIT_MASK_CSI_RPT_OFFSET_HT_V1_8812F) \ 19568 << BIT_SHIFT_CSI_RPT_OFFSET_HT_V1_8812F) 19569 #define BITS_CSI_RPT_OFFSET_HT_V1_8812F \ 19570 (BIT_MASK_CSI_RPT_OFFSET_HT_V1_8812F \ 19571 << BIT_SHIFT_CSI_RPT_OFFSET_HT_V1_8812F) 19572 #define BIT_CLEAR_CSI_RPT_OFFSET_HT_V1_8812F(x) \ 19573 ((x) & (~BITS_CSI_RPT_OFFSET_HT_V1_8812F)) 19574 #define BIT_GET_CSI_RPT_OFFSET_HT_V1_8812F(x) \ 19575 (((x) >> BIT_SHIFT_CSI_RPT_OFFSET_HT_V1_8812F) & \ 19576 BIT_MASK_CSI_RPT_OFFSET_HT_V1_8812F) 19577 #define BIT_SET_CSI_RPT_OFFSET_HT_V1_8812F(x, v) \ 19578 (BIT_CLEAR_CSI_RPT_OFFSET_HT_V1_8812F(x) | \ 19579 BIT_CSI_RPT_OFFSET_HT_V1_8812F(v)) 19580 19581 #define BIT_R_WMAC_OFFSET_RPTPOLL_EN_8812F BIT(15) 19582 #define BIT_R_WMAC_CSI_CHKSUM_DIS_8812F BIT(14) 19583 19584 #define BIT_SHIFT_R_WMAC_VHT_CATEGORY_V1_8812F 8 19585 #define BIT_MASK_R_WMAC_VHT_CATEGORY_V1_8812F 0x3f 19586 #define BIT_R_WMAC_VHT_CATEGORY_V1_8812F(x) \ 19587 (((x) & BIT_MASK_R_WMAC_VHT_CATEGORY_V1_8812F) \ 19588 << BIT_SHIFT_R_WMAC_VHT_CATEGORY_V1_8812F) 19589 #define BITS_R_WMAC_VHT_CATEGORY_V1_8812F \ 19590 (BIT_MASK_R_WMAC_VHT_CATEGORY_V1_8812F \ 19591 << BIT_SHIFT_R_WMAC_VHT_CATEGORY_V1_8812F) 19592 #define BIT_CLEAR_R_WMAC_VHT_CATEGORY_V1_8812F(x) \ 19593 ((x) & (~BITS_R_WMAC_VHT_CATEGORY_V1_8812F)) 19594 #define BIT_GET_R_WMAC_VHT_CATEGORY_V1_8812F(x) \ 19595 (((x) >> BIT_SHIFT_R_WMAC_VHT_CATEGORY_V1_8812F) & \ 19596 BIT_MASK_R_WMAC_VHT_CATEGORY_V1_8812F) 19597 #define BIT_SET_R_WMAC_VHT_CATEGORY_V1_8812F(x, v) \ 19598 (BIT_CLEAR_R_WMAC_VHT_CATEGORY_V1_8812F(x) | \ 19599 BIT_R_WMAC_VHT_CATEGORY_V1_8812F(v)) 19600 19601 #define BIT_R_WMAC_USE_NSTS_8812F BIT(7) 19602 #define BIT_R_DISABLE_CHECK_VHTSIGB_CRC_8812F BIT(6) 19603 #define BIT_R_DISABLE_CHECK_VHTSIGA_CRC_8812F BIT(5) 19604 #define BIT_R_WMAC_BFPARAM_SEL_8812F BIT(4) 19605 #define BIT_R_WMAC_CSISEQ_SEL_8812F BIT(3) 19606 #define BIT_R_WMAC_CSI_WITHHTC_EN_8812F BIT(2) 19607 #define BIT_R_WMAC_HT_NDPA_EN_8812F BIT(1) 19608 #define BIT_R_WMAC_VHT_NDPA_EN_8812F BIT(0) 19609 19610 /* 2 REG_RX_CSI_RPT_INFO_8812F */ 19611 #define BIT_WRITE_ENABLE_8812F BIT(31) 19612 #define BIT_WMAC_CHECK_SOUNDING_SEQ_8812F BIT(30) 19613 19614 #define BIT_SHIFT_VHTHT_MIMO_CTRL_FIELD_8812F 1 19615 #define BIT_MASK_VHTHT_MIMO_CTRL_FIELD_8812F 0xffffff 19616 #define BIT_VHTHT_MIMO_CTRL_FIELD_8812F(x) \ 19617 (((x) & BIT_MASK_VHTHT_MIMO_CTRL_FIELD_8812F) \ 19618 << BIT_SHIFT_VHTHT_MIMO_CTRL_FIELD_8812F) 19619 #define BITS_VHTHT_MIMO_CTRL_FIELD_8812F \ 19620 (BIT_MASK_VHTHT_MIMO_CTRL_FIELD_8812F \ 19621 << BIT_SHIFT_VHTHT_MIMO_CTRL_FIELD_8812F) 19622 #define BIT_CLEAR_VHTHT_MIMO_CTRL_FIELD_8812F(x) \ 19623 ((x) & (~BITS_VHTHT_MIMO_CTRL_FIELD_8812F)) 19624 #define BIT_GET_VHTHT_MIMO_CTRL_FIELD_8812F(x) \ 19625 (((x) >> BIT_SHIFT_VHTHT_MIMO_CTRL_FIELD_8812F) & \ 19626 BIT_MASK_VHTHT_MIMO_CTRL_FIELD_8812F) 19627 #define BIT_SET_VHTHT_MIMO_CTRL_FIELD_8812F(x, v) \ 19628 (BIT_CLEAR_VHTHT_MIMO_CTRL_FIELD_8812F(x) | \ 19629 BIT_VHTHT_MIMO_CTRL_FIELD_8812F(v)) 19630 19631 #define BIT_CSI_INTERRUPT_STATUS_8812F BIT(0) 19632 19633 /* 2 REG_NS_ARP_CTRL_8812F */ 19634 #define BIT_R_WMAC_NSARP_RSPEN_8812F BIT(15) 19635 #define BIT_R_WMAC_NSARP_RARP_8812F BIT(9) 19636 #define BIT_R_WMAC_NSARP_RIPV6_8812F BIT(8) 19637 19638 #define BIT_SHIFT_R_WMAC_NSARP_MODEN_8812F 6 19639 #define BIT_MASK_R_WMAC_NSARP_MODEN_8812F 0x3 19640 #define BIT_R_WMAC_NSARP_MODEN_8812F(x) \ 19641 (((x) & BIT_MASK_R_WMAC_NSARP_MODEN_8812F) \ 19642 << BIT_SHIFT_R_WMAC_NSARP_MODEN_8812F) 19643 #define BITS_R_WMAC_NSARP_MODEN_8812F \ 19644 (BIT_MASK_R_WMAC_NSARP_MODEN_8812F \ 19645 << BIT_SHIFT_R_WMAC_NSARP_MODEN_8812F) 19646 #define BIT_CLEAR_R_WMAC_NSARP_MODEN_8812F(x) \ 19647 ((x) & (~BITS_R_WMAC_NSARP_MODEN_8812F)) 19648 #define BIT_GET_R_WMAC_NSARP_MODEN_8812F(x) \ 19649 (((x) >> BIT_SHIFT_R_WMAC_NSARP_MODEN_8812F) & \ 19650 BIT_MASK_R_WMAC_NSARP_MODEN_8812F) 19651 #define BIT_SET_R_WMAC_NSARP_MODEN_8812F(x, v) \ 19652 (BIT_CLEAR_R_WMAC_NSARP_MODEN_8812F(x) | \ 19653 BIT_R_WMAC_NSARP_MODEN_8812F(v)) 19654 19655 #define BIT_SHIFT_R_WMAC_NSARP_RSPFTP_8812F 4 19656 #define BIT_MASK_R_WMAC_NSARP_RSPFTP_8812F 0x3 19657 #define BIT_R_WMAC_NSARP_RSPFTP_8812F(x) \ 19658 (((x) & BIT_MASK_R_WMAC_NSARP_RSPFTP_8812F) \ 19659 << BIT_SHIFT_R_WMAC_NSARP_RSPFTP_8812F) 19660 #define BITS_R_WMAC_NSARP_RSPFTP_8812F \ 19661 (BIT_MASK_R_WMAC_NSARP_RSPFTP_8812F \ 19662 << BIT_SHIFT_R_WMAC_NSARP_RSPFTP_8812F) 19663 #define BIT_CLEAR_R_WMAC_NSARP_RSPFTP_8812F(x) \ 19664 ((x) & (~BITS_R_WMAC_NSARP_RSPFTP_8812F)) 19665 #define BIT_GET_R_WMAC_NSARP_RSPFTP_8812F(x) \ 19666 (((x) >> BIT_SHIFT_R_WMAC_NSARP_RSPFTP_8812F) & \ 19667 BIT_MASK_R_WMAC_NSARP_RSPFTP_8812F) 19668 #define BIT_SET_R_WMAC_NSARP_RSPFTP_8812F(x, v) \ 19669 (BIT_CLEAR_R_WMAC_NSARP_RSPFTP_8812F(x) | \ 19670 BIT_R_WMAC_NSARP_RSPFTP_8812F(v)) 19671 19672 #define BIT_SHIFT_R_WMAC_NSARP_RSPSEC_8812F 0 19673 #define BIT_MASK_R_WMAC_NSARP_RSPSEC_8812F 0xf 19674 #define BIT_R_WMAC_NSARP_RSPSEC_8812F(x) \ 19675 (((x) & BIT_MASK_R_WMAC_NSARP_RSPSEC_8812F) \ 19676 << BIT_SHIFT_R_WMAC_NSARP_RSPSEC_8812F) 19677 #define BITS_R_WMAC_NSARP_RSPSEC_8812F \ 19678 (BIT_MASK_R_WMAC_NSARP_RSPSEC_8812F \ 19679 << BIT_SHIFT_R_WMAC_NSARP_RSPSEC_8812F) 19680 #define BIT_CLEAR_R_WMAC_NSARP_RSPSEC_8812F(x) \ 19681 ((x) & (~BITS_R_WMAC_NSARP_RSPSEC_8812F)) 19682 #define BIT_GET_R_WMAC_NSARP_RSPSEC_8812F(x) \ 19683 (((x) >> BIT_SHIFT_R_WMAC_NSARP_RSPSEC_8812F) & \ 19684 BIT_MASK_R_WMAC_NSARP_RSPSEC_8812F) 19685 #define BIT_SET_R_WMAC_NSARP_RSPSEC_8812F(x, v) \ 19686 (BIT_CLEAR_R_WMAC_NSARP_RSPSEC_8812F(x) | \ 19687 BIT_R_WMAC_NSARP_RSPSEC_8812F(v)) 19688 19689 /* 2 REG_NS_ARP_INFO_8812F */ 19690 #define BIT_REQ_IS_MCNS_8812F BIT(23) 19691 #define BIT_REQ_IS_UCNS_8812F BIT(22) 19692 #define BIT_REQ_IS_USNS_8812F BIT(21) 19693 #define BIT_REQ_IS_ARP_8812F BIT(20) 19694 #define BIT_EXPRSP_MH_WITHQC_8812F BIT(19) 19695 19696 #define BIT_SHIFT_EXPRSP_SECTYPE_8812F 16 19697 #define BIT_MASK_EXPRSP_SECTYPE_8812F 0x7 19698 #define BIT_EXPRSP_SECTYPE_8812F(x) \ 19699 (((x) & BIT_MASK_EXPRSP_SECTYPE_8812F) \ 19700 << BIT_SHIFT_EXPRSP_SECTYPE_8812F) 19701 #define BITS_EXPRSP_SECTYPE_8812F \ 19702 (BIT_MASK_EXPRSP_SECTYPE_8812F << BIT_SHIFT_EXPRSP_SECTYPE_8812F) 19703 #define BIT_CLEAR_EXPRSP_SECTYPE_8812F(x) ((x) & (~BITS_EXPRSP_SECTYPE_8812F)) 19704 #define BIT_GET_EXPRSP_SECTYPE_8812F(x) \ 19705 (((x) >> BIT_SHIFT_EXPRSP_SECTYPE_8812F) & \ 19706 BIT_MASK_EXPRSP_SECTYPE_8812F) 19707 #define BIT_SET_EXPRSP_SECTYPE_8812F(x, v) \ 19708 (BIT_CLEAR_EXPRSP_SECTYPE_8812F(x) | BIT_EXPRSP_SECTYPE_8812F(v)) 19709 19710 #define BIT_SHIFT_EXPRSP_CHKSM_7_TO_0_8812F 8 19711 #define BIT_MASK_EXPRSP_CHKSM_7_TO_0_8812F 0xff 19712 #define BIT_EXPRSP_CHKSM_7_TO_0_8812F(x) \ 19713 (((x) & BIT_MASK_EXPRSP_CHKSM_7_TO_0_8812F) \ 19714 << BIT_SHIFT_EXPRSP_CHKSM_7_TO_0_8812F) 19715 #define BITS_EXPRSP_CHKSM_7_TO_0_8812F \ 19716 (BIT_MASK_EXPRSP_CHKSM_7_TO_0_8812F \ 19717 << BIT_SHIFT_EXPRSP_CHKSM_7_TO_0_8812F) 19718 #define BIT_CLEAR_EXPRSP_CHKSM_7_TO_0_8812F(x) \ 19719 ((x) & (~BITS_EXPRSP_CHKSM_7_TO_0_8812F)) 19720 #define BIT_GET_EXPRSP_CHKSM_7_TO_0_8812F(x) \ 19721 (((x) >> BIT_SHIFT_EXPRSP_CHKSM_7_TO_0_8812F) & \ 19722 BIT_MASK_EXPRSP_CHKSM_7_TO_0_8812F) 19723 #define BIT_SET_EXPRSP_CHKSM_7_TO_0_8812F(x, v) \ 19724 (BIT_CLEAR_EXPRSP_CHKSM_7_TO_0_8812F(x) | \ 19725 BIT_EXPRSP_CHKSM_7_TO_0_8812F(v)) 19726 19727 #define BIT_SHIFT_EXPRSP_CHKSM_15_TO_8_8812F 0 19728 #define BIT_MASK_EXPRSP_CHKSM_15_TO_8_8812F 0xff 19729 #define BIT_EXPRSP_CHKSM_15_TO_8_8812F(x) \ 19730 (((x) & BIT_MASK_EXPRSP_CHKSM_15_TO_8_8812F) \ 19731 << BIT_SHIFT_EXPRSP_CHKSM_15_TO_8_8812F) 19732 #define BITS_EXPRSP_CHKSM_15_TO_8_8812F \ 19733 (BIT_MASK_EXPRSP_CHKSM_15_TO_8_8812F \ 19734 << BIT_SHIFT_EXPRSP_CHKSM_15_TO_8_8812F) 19735 #define BIT_CLEAR_EXPRSP_CHKSM_15_TO_8_8812F(x) \ 19736 ((x) & (~BITS_EXPRSP_CHKSM_15_TO_8_8812F)) 19737 #define BIT_GET_EXPRSP_CHKSM_15_TO_8_8812F(x) \ 19738 (((x) >> BIT_SHIFT_EXPRSP_CHKSM_15_TO_8_8812F) & \ 19739 BIT_MASK_EXPRSP_CHKSM_15_TO_8_8812F) 19740 #define BIT_SET_EXPRSP_CHKSM_15_TO_8_8812F(x, v) \ 19741 (BIT_CLEAR_EXPRSP_CHKSM_15_TO_8_8812F(x) | \ 19742 BIT_EXPRSP_CHKSM_15_TO_8_8812F(v)) 19743 19744 /* 2 REG_BEAMFORMING_INFO_NSARP_V1_8812F */ 19745 19746 #define BIT_SHIFT_WMAC_ARPIP_8812F 0 19747 #define BIT_MASK_WMAC_ARPIP_8812F 0xffffffffL 19748 #define BIT_WMAC_ARPIP_8812F(x) \ 19749 (((x) & BIT_MASK_WMAC_ARPIP_8812F) << BIT_SHIFT_WMAC_ARPIP_8812F) 19750 #define BITS_WMAC_ARPIP_8812F \ 19751 (BIT_MASK_WMAC_ARPIP_8812F << BIT_SHIFT_WMAC_ARPIP_8812F) 19752 #define BIT_CLEAR_WMAC_ARPIP_8812F(x) ((x) & (~BITS_WMAC_ARPIP_8812F)) 19753 #define BIT_GET_WMAC_ARPIP_8812F(x) \ 19754 (((x) >> BIT_SHIFT_WMAC_ARPIP_8812F) & BIT_MASK_WMAC_ARPIP_8812F) 19755 #define BIT_SET_WMAC_ARPIP_8812F(x, v) \ 19756 (BIT_CLEAR_WMAC_ARPIP_8812F(x) | BIT_WMAC_ARPIP_8812F(v)) 19757 19758 /* 2 REG_BEAMFORMING_INFO_NSARP_8812F */ 19759 19760 #define BIT_SHIFT_UPD_BFMEE_USERID_8812F 13 19761 #define BIT_MASK_UPD_BFMEE_USERID_8812F 0x7 19762 #define BIT_UPD_BFMEE_USERID_8812F(x) \ 19763 (((x) & BIT_MASK_UPD_BFMEE_USERID_8812F) \ 19764 << BIT_SHIFT_UPD_BFMEE_USERID_8812F) 19765 #define BITS_UPD_BFMEE_USERID_8812F \ 19766 (BIT_MASK_UPD_BFMEE_USERID_8812F << BIT_SHIFT_UPD_BFMEE_USERID_8812F) 19767 #define BIT_CLEAR_UPD_BFMEE_USERID_8812F(x) \ 19768 ((x) & (~BITS_UPD_BFMEE_USERID_8812F)) 19769 #define BIT_GET_UPD_BFMEE_USERID_8812F(x) \ 19770 (((x) >> BIT_SHIFT_UPD_BFMEE_USERID_8812F) & \ 19771 BIT_MASK_UPD_BFMEE_USERID_8812F) 19772 #define BIT_SET_UPD_BFMEE_USERID_8812F(x, v) \ 19773 (BIT_CLEAR_UPD_BFMEE_USERID_8812F(x) | BIT_UPD_BFMEE_USERID_8812F(v)) 19774 19775 #define BIT_UPD_BFMEE_FBTP_8812F BIT(12) 19776 19777 #define BIT_SHIFT_UPD_BFMEE_BW_8812F 0 19778 #define BIT_MASK_UPD_BFMEE_BW_8812F 0xfff 19779 #define BIT_UPD_BFMEE_BW_8812F(x) \ 19780 (((x) & BIT_MASK_UPD_BFMEE_BW_8812F) << BIT_SHIFT_UPD_BFMEE_BW_8812F) 19781 #define BITS_UPD_BFMEE_BW_8812F \ 19782 (BIT_MASK_UPD_BFMEE_BW_8812F << BIT_SHIFT_UPD_BFMEE_BW_8812F) 19783 #define BIT_CLEAR_UPD_BFMEE_BW_8812F(x) ((x) & (~BITS_UPD_BFMEE_BW_8812F)) 19784 #define BIT_GET_UPD_BFMEE_BW_8812F(x) \ 19785 (((x) >> BIT_SHIFT_UPD_BFMEE_BW_8812F) & BIT_MASK_UPD_BFMEE_BW_8812F) 19786 #define BIT_SET_UPD_BFMEE_BW_8812F(x, v) \ 19787 (BIT_CLEAR_UPD_BFMEE_BW_8812F(x) | BIT_UPD_BFMEE_BW_8812F(v)) 19788 19789 #define BIT_SHIFT_UPD_BFMEE_CB_8812F 8 19790 #define BIT_MASK_UPD_BFMEE_CB_8812F 0x3 19791 #define BIT_UPD_BFMEE_CB_8812F(x) \ 19792 (((x) & BIT_MASK_UPD_BFMEE_CB_8812F) << BIT_SHIFT_UPD_BFMEE_CB_8812F) 19793 #define BITS_UPD_BFMEE_CB_8812F \ 19794 (BIT_MASK_UPD_BFMEE_CB_8812F << BIT_SHIFT_UPD_BFMEE_CB_8812F) 19795 #define BIT_CLEAR_UPD_BFMEE_CB_8812F(x) ((x) & (~BITS_UPD_BFMEE_CB_8812F)) 19796 #define BIT_GET_UPD_BFMEE_CB_8812F(x) \ 19797 (((x) >> BIT_SHIFT_UPD_BFMEE_CB_8812F) & BIT_MASK_UPD_BFMEE_CB_8812F) 19798 #define BIT_SET_UPD_BFMEE_CB_8812F(x, v) \ 19799 (BIT_CLEAR_UPD_BFMEE_CB_8812F(x) | BIT_UPD_BFMEE_CB_8812F(v)) 19800 19801 #define BIT_SHIFT_UPD_BFMEE_NG_8812F 6 19802 #define BIT_MASK_UPD_BFMEE_NG_8812F 0x3 19803 #define BIT_UPD_BFMEE_NG_8812F(x) \ 19804 (((x) & BIT_MASK_UPD_BFMEE_NG_8812F) << BIT_SHIFT_UPD_BFMEE_NG_8812F) 19805 #define BITS_UPD_BFMEE_NG_8812F \ 19806 (BIT_MASK_UPD_BFMEE_NG_8812F << BIT_SHIFT_UPD_BFMEE_NG_8812F) 19807 #define BIT_CLEAR_UPD_BFMEE_NG_8812F(x) ((x) & (~BITS_UPD_BFMEE_NG_8812F)) 19808 #define BIT_GET_UPD_BFMEE_NG_8812F(x) \ 19809 (((x) >> BIT_SHIFT_UPD_BFMEE_NG_8812F) & BIT_MASK_UPD_BFMEE_NG_8812F) 19810 #define BIT_SET_UPD_BFMEE_NG_8812F(x, v) \ 19811 (BIT_CLEAR_UPD_BFMEE_NG_8812F(x) | BIT_UPD_BFMEE_NG_8812F(v)) 19812 19813 #define BIT_SHIFT_UPD_BFMEE_NR_8812F 3 19814 #define BIT_MASK_UPD_BFMEE_NR_8812F 0x7 19815 #define BIT_UPD_BFMEE_NR_8812F(x) \ 19816 (((x) & BIT_MASK_UPD_BFMEE_NR_8812F) << BIT_SHIFT_UPD_BFMEE_NR_8812F) 19817 #define BITS_UPD_BFMEE_NR_8812F \ 19818 (BIT_MASK_UPD_BFMEE_NR_8812F << BIT_SHIFT_UPD_BFMEE_NR_8812F) 19819 #define BIT_CLEAR_UPD_BFMEE_NR_8812F(x) ((x) & (~BITS_UPD_BFMEE_NR_8812F)) 19820 #define BIT_GET_UPD_BFMEE_NR_8812F(x) \ 19821 (((x) >> BIT_SHIFT_UPD_BFMEE_NR_8812F) & BIT_MASK_UPD_BFMEE_NR_8812F) 19822 #define BIT_SET_UPD_BFMEE_NR_8812F(x, v) \ 19823 (BIT_CLEAR_UPD_BFMEE_NR_8812F(x) | BIT_UPD_BFMEE_NR_8812F(v)) 19824 19825 #define BIT_SHIFT_UPD_BFMEE_NC_8812F 0 19826 #define BIT_MASK_UPD_BFMEE_NC_8812F 0x7 19827 #define BIT_UPD_BFMEE_NC_8812F(x) \ 19828 (((x) & BIT_MASK_UPD_BFMEE_NC_8812F) << BIT_SHIFT_UPD_BFMEE_NC_8812F) 19829 #define BITS_UPD_BFMEE_NC_8812F \ 19830 (BIT_MASK_UPD_BFMEE_NC_8812F << BIT_SHIFT_UPD_BFMEE_NC_8812F) 19831 #define BIT_CLEAR_UPD_BFMEE_NC_8812F(x) ((x) & (~BITS_UPD_BFMEE_NC_8812F)) 19832 #define BIT_GET_UPD_BFMEE_NC_8812F(x) \ 19833 (((x) >> BIT_SHIFT_UPD_BFMEE_NC_8812F) & BIT_MASK_UPD_BFMEE_NC_8812F) 19834 #define BIT_SET_UPD_BFMEE_NC_8812F(x, v) \ 19835 (BIT_CLEAR_UPD_BFMEE_NC_8812F(x) | BIT_UPD_BFMEE_NC_8812F(v)) 19836 19837 /* 2 REG_IPV6_8812F */ 19838 19839 #define BIT_SHIFT_R_WMAC_IPV6_MYIPAD_0_8812F 0 19840 #define BIT_MASK_R_WMAC_IPV6_MYIPAD_0_8812F 0xffffffffL 19841 #define BIT_R_WMAC_IPV6_MYIPAD_0_8812F(x) \ 19842 (((x) & BIT_MASK_R_WMAC_IPV6_MYIPAD_0_8812F) \ 19843 << BIT_SHIFT_R_WMAC_IPV6_MYIPAD_0_8812F) 19844 #define BITS_R_WMAC_IPV6_MYIPAD_0_8812F \ 19845 (BIT_MASK_R_WMAC_IPV6_MYIPAD_0_8812F \ 19846 << BIT_SHIFT_R_WMAC_IPV6_MYIPAD_0_8812F) 19847 #define BIT_CLEAR_R_WMAC_IPV6_MYIPAD_0_8812F(x) \ 19848 ((x) & (~BITS_R_WMAC_IPV6_MYIPAD_0_8812F)) 19849 #define BIT_GET_R_WMAC_IPV6_MYIPAD_0_8812F(x) \ 19850 (((x) >> BIT_SHIFT_R_WMAC_IPV6_MYIPAD_0_8812F) & \ 19851 BIT_MASK_R_WMAC_IPV6_MYIPAD_0_8812F) 19852 #define BIT_SET_R_WMAC_IPV6_MYIPAD_0_8812F(x, v) \ 19853 (BIT_CLEAR_R_WMAC_IPV6_MYIPAD_0_8812F(x) | \ 19854 BIT_R_WMAC_IPV6_MYIPAD_0_8812F(v)) 19855 19856 /* 2 REG_IPV6_1_8812F */ 19857 19858 #define BIT_SHIFT_R_WMAC_IPV6_MYIPAD_1_8812F 0 19859 #define BIT_MASK_R_WMAC_IPV6_MYIPAD_1_8812F 0xffffffffL 19860 #define BIT_R_WMAC_IPV6_MYIPAD_1_8812F(x) \ 19861 (((x) & BIT_MASK_R_WMAC_IPV6_MYIPAD_1_8812F) \ 19862 << BIT_SHIFT_R_WMAC_IPV6_MYIPAD_1_8812F) 19863 #define BITS_R_WMAC_IPV6_MYIPAD_1_8812F \ 19864 (BIT_MASK_R_WMAC_IPV6_MYIPAD_1_8812F \ 19865 << BIT_SHIFT_R_WMAC_IPV6_MYIPAD_1_8812F) 19866 #define BIT_CLEAR_R_WMAC_IPV6_MYIPAD_1_8812F(x) \ 19867 ((x) & (~BITS_R_WMAC_IPV6_MYIPAD_1_8812F)) 19868 #define BIT_GET_R_WMAC_IPV6_MYIPAD_1_8812F(x) \ 19869 (((x) >> BIT_SHIFT_R_WMAC_IPV6_MYIPAD_1_8812F) & \ 19870 BIT_MASK_R_WMAC_IPV6_MYIPAD_1_8812F) 19871 #define BIT_SET_R_WMAC_IPV6_MYIPAD_1_8812F(x, v) \ 19872 (BIT_CLEAR_R_WMAC_IPV6_MYIPAD_1_8812F(x) | \ 19873 BIT_R_WMAC_IPV6_MYIPAD_1_8812F(v)) 19874 19875 /* 2 REG_IPV6_2_8812F */ 19876 19877 #define BIT_SHIFT_R_WMAC_IPV6_MYIPAD_2_8812F 0 19878 #define BIT_MASK_R_WMAC_IPV6_MYIPAD_2_8812F 0xffffffffL 19879 #define BIT_R_WMAC_IPV6_MYIPAD_2_8812F(x) \ 19880 (((x) & BIT_MASK_R_WMAC_IPV6_MYIPAD_2_8812F) \ 19881 << BIT_SHIFT_R_WMAC_IPV6_MYIPAD_2_8812F) 19882 #define BITS_R_WMAC_IPV6_MYIPAD_2_8812F \ 19883 (BIT_MASK_R_WMAC_IPV6_MYIPAD_2_8812F \ 19884 << BIT_SHIFT_R_WMAC_IPV6_MYIPAD_2_8812F) 19885 #define BIT_CLEAR_R_WMAC_IPV6_MYIPAD_2_8812F(x) \ 19886 ((x) & (~BITS_R_WMAC_IPV6_MYIPAD_2_8812F)) 19887 #define BIT_GET_R_WMAC_IPV6_MYIPAD_2_8812F(x) \ 19888 (((x) >> BIT_SHIFT_R_WMAC_IPV6_MYIPAD_2_8812F) & \ 19889 BIT_MASK_R_WMAC_IPV6_MYIPAD_2_8812F) 19890 #define BIT_SET_R_WMAC_IPV6_MYIPAD_2_8812F(x, v) \ 19891 (BIT_CLEAR_R_WMAC_IPV6_MYIPAD_2_8812F(x) | \ 19892 BIT_R_WMAC_IPV6_MYIPAD_2_8812F(v)) 19893 19894 /* 2 REG_IPV6_3_8812F */ 19895 19896 #define BIT_SHIFT_R_WMAC_IPV6_MYIPAD_3_8812F 0 19897 #define BIT_MASK_R_WMAC_IPV6_MYIPAD_3_8812F 0xffffffffL 19898 #define BIT_R_WMAC_IPV6_MYIPAD_3_8812F(x) \ 19899 (((x) & BIT_MASK_R_WMAC_IPV6_MYIPAD_3_8812F) \ 19900 << BIT_SHIFT_R_WMAC_IPV6_MYIPAD_3_8812F) 19901 #define BITS_R_WMAC_IPV6_MYIPAD_3_8812F \ 19902 (BIT_MASK_R_WMAC_IPV6_MYIPAD_3_8812F \ 19903 << BIT_SHIFT_R_WMAC_IPV6_MYIPAD_3_8812F) 19904 #define BIT_CLEAR_R_WMAC_IPV6_MYIPAD_3_8812F(x) \ 19905 ((x) & (~BITS_R_WMAC_IPV6_MYIPAD_3_8812F)) 19906 #define BIT_GET_R_WMAC_IPV6_MYIPAD_3_8812F(x) \ 19907 (((x) >> BIT_SHIFT_R_WMAC_IPV6_MYIPAD_3_8812F) & \ 19908 BIT_MASK_R_WMAC_IPV6_MYIPAD_3_8812F) 19909 #define BIT_SET_R_WMAC_IPV6_MYIPAD_3_8812F(x, v) \ 19910 (BIT_CLEAR_R_WMAC_IPV6_MYIPAD_3_8812F(x) | \ 19911 BIT_R_WMAC_IPV6_MYIPAD_3_8812F(v)) 19912 19913 /* 2 REG_WMAC_RTX_CTX_SUBTYPE_CFG_8812F */ 19914 19915 #define BIT_SHIFT_R_WMAC_CTX_SUBTYPE_8812F 4 19916 #define BIT_MASK_R_WMAC_CTX_SUBTYPE_8812F 0xf 19917 #define BIT_R_WMAC_CTX_SUBTYPE_8812F(x) \ 19918 (((x) & BIT_MASK_R_WMAC_CTX_SUBTYPE_8812F) \ 19919 << BIT_SHIFT_R_WMAC_CTX_SUBTYPE_8812F) 19920 #define BITS_R_WMAC_CTX_SUBTYPE_8812F \ 19921 (BIT_MASK_R_WMAC_CTX_SUBTYPE_8812F \ 19922 << BIT_SHIFT_R_WMAC_CTX_SUBTYPE_8812F) 19923 #define BIT_CLEAR_R_WMAC_CTX_SUBTYPE_8812F(x) \ 19924 ((x) & (~BITS_R_WMAC_CTX_SUBTYPE_8812F)) 19925 #define BIT_GET_R_WMAC_CTX_SUBTYPE_8812F(x) \ 19926 (((x) >> BIT_SHIFT_R_WMAC_CTX_SUBTYPE_8812F) & \ 19927 BIT_MASK_R_WMAC_CTX_SUBTYPE_8812F) 19928 #define BIT_SET_R_WMAC_CTX_SUBTYPE_8812F(x, v) \ 19929 (BIT_CLEAR_R_WMAC_CTX_SUBTYPE_8812F(x) | \ 19930 BIT_R_WMAC_CTX_SUBTYPE_8812F(v)) 19931 19932 #define BIT_SHIFT_R_WMAC_RTX_SUBTYPE_8812F 0 19933 #define BIT_MASK_R_WMAC_RTX_SUBTYPE_8812F 0xf 19934 #define BIT_R_WMAC_RTX_SUBTYPE_8812F(x) \ 19935 (((x) & BIT_MASK_R_WMAC_RTX_SUBTYPE_8812F) \ 19936 << BIT_SHIFT_R_WMAC_RTX_SUBTYPE_8812F) 19937 #define BITS_R_WMAC_RTX_SUBTYPE_8812F \ 19938 (BIT_MASK_R_WMAC_RTX_SUBTYPE_8812F \ 19939 << BIT_SHIFT_R_WMAC_RTX_SUBTYPE_8812F) 19940 #define BIT_CLEAR_R_WMAC_RTX_SUBTYPE_8812F(x) \ 19941 ((x) & (~BITS_R_WMAC_RTX_SUBTYPE_8812F)) 19942 #define BIT_GET_R_WMAC_RTX_SUBTYPE_8812F(x) \ 19943 (((x) >> BIT_SHIFT_R_WMAC_RTX_SUBTYPE_8812F) & \ 19944 BIT_MASK_R_WMAC_RTX_SUBTYPE_8812F) 19945 #define BIT_SET_R_WMAC_RTX_SUBTYPE_8812F(x, v) \ 19946 (BIT_CLEAR_R_WMAC_RTX_SUBTYPE_8812F(x) | \ 19947 BIT_R_WMAC_RTX_SUBTYPE_8812F(v)) 19948 19949 /* 2 REG_WMAC_SWAES_DIO_B63_B32_8812F */ 19950 19951 #define BIT_SHIFT_WMAC_SWAES_DIO_B63_B32_8812F 0 19952 #define BIT_MASK_WMAC_SWAES_DIO_B63_B32_8812F 0xffffffffL 19953 #define BIT_WMAC_SWAES_DIO_B63_B32_8812F(x) \ 19954 (((x) & BIT_MASK_WMAC_SWAES_DIO_B63_B32_8812F) \ 19955 << BIT_SHIFT_WMAC_SWAES_DIO_B63_B32_8812F) 19956 #define BITS_WMAC_SWAES_DIO_B63_B32_8812F \ 19957 (BIT_MASK_WMAC_SWAES_DIO_B63_B32_8812F \ 19958 << BIT_SHIFT_WMAC_SWAES_DIO_B63_B32_8812F) 19959 #define BIT_CLEAR_WMAC_SWAES_DIO_B63_B32_8812F(x) \ 19960 ((x) & (~BITS_WMAC_SWAES_DIO_B63_B32_8812F)) 19961 #define BIT_GET_WMAC_SWAES_DIO_B63_B32_8812F(x) \ 19962 (((x) >> BIT_SHIFT_WMAC_SWAES_DIO_B63_B32_8812F) & \ 19963 BIT_MASK_WMAC_SWAES_DIO_B63_B32_8812F) 19964 #define BIT_SET_WMAC_SWAES_DIO_B63_B32_8812F(x, v) \ 19965 (BIT_CLEAR_WMAC_SWAES_DIO_B63_B32_8812F(x) | \ 19966 BIT_WMAC_SWAES_DIO_B63_B32_8812F(v)) 19967 19968 /* 2 REG_WMAC_SWAES_DIO_B95_B64_8812F */ 19969 19970 #define BIT_SHIFT_WMAC_SWAES_DIO_B95_B64_8812F 0 19971 #define BIT_MASK_WMAC_SWAES_DIO_B95_B64_8812F 0xffffffffL 19972 #define BIT_WMAC_SWAES_DIO_B95_B64_8812F(x) \ 19973 (((x) & BIT_MASK_WMAC_SWAES_DIO_B95_B64_8812F) \ 19974 << BIT_SHIFT_WMAC_SWAES_DIO_B95_B64_8812F) 19975 #define BITS_WMAC_SWAES_DIO_B95_B64_8812F \ 19976 (BIT_MASK_WMAC_SWAES_DIO_B95_B64_8812F \ 19977 << BIT_SHIFT_WMAC_SWAES_DIO_B95_B64_8812F) 19978 #define BIT_CLEAR_WMAC_SWAES_DIO_B95_B64_8812F(x) \ 19979 ((x) & (~BITS_WMAC_SWAES_DIO_B95_B64_8812F)) 19980 #define BIT_GET_WMAC_SWAES_DIO_B95_B64_8812F(x) \ 19981 (((x) >> BIT_SHIFT_WMAC_SWAES_DIO_B95_B64_8812F) & \ 19982 BIT_MASK_WMAC_SWAES_DIO_B95_B64_8812F) 19983 #define BIT_SET_WMAC_SWAES_DIO_B95_B64_8812F(x, v) \ 19984 (BIT_CLEAR_WMAC_SWAES_DIO_B95_B64_8812F(x) | \ 19985 BIT_WMAC_SWAES_DIO_B95_B64_8812F(v)) 19986 19987 /* 2 REG_WMAC_SWAES_DIO_B127_B96_8812F */ 19988 19989 #define BIT_SHIFT_WMAC_SWAES_DIO_B127_B96_8812F 0 19990 #define BIT_MASK_WMAC_SWAES_DIO_B127_B96_8812F 0xffffffffL 19991 #define BIT_WMAC_SWAES_DIO_B127_B96_8812F(x) \ 19992 (((x) & BIT_MASK_WMAC_SWAES_DIO_B127_B96_8812F) \ 19993 << BIT_SHIFT_WMAC_SWAES_DIO_B127_B96_8812F) 19994 #define BITS_WMAC_SWAES_DIO_B127_B96_8812F \ 19995 (BIT_MASK_WMAC_SWAES_DIO_B127_B96_8812F \ 19996 << BIT_SHIFT_WMAC_SWAES_DIO_B127_B96_8812F) 19997 #define BIT_CLEAR_WMAC_SWAES_DIO_B127_B96_8812F(x) \ 19998 ((x) & (~BITS_WMAC_SWAES_DIO_B127_B96_8812F)) 19999 #define BIT_GET_WMAC_SWAES_DIO_B127_B96_8812F(x) \ 20000 (((x) >> BIT_SHIFT_WMAC_SWAES_DIO_B127_B96_8812F) & \ 20001 BIT_MASK_WMAC_SWAES_DIO_B127_B96_8812F) 20002 #define BIT_SET_WMAC_SWAES_DIO_B127_B96_8812F(x, v) \ 20003 (BIT_CLEAR_WMAC_SWAES_DIO_B127_B96_8812F(x) | \ 20004 BIT_WMAC_SWAES_DIO_B127_B96_8812F(v)) 20005 20006 /* 2 REG_WMAC_SWAES_CFG_8812F */ 20007 20008 /* 2 REG_BT_COEX_V2_8812F */ 20009 #define BIT_GNT_BT_POLARITY_8812F BIT(12) 20010 #define BIT_GNT_BT_BYPASS_PRIORITY_8812F BIT(8) 20011 20012 #define BIT_SHIFT_TIMER_8812F 0 20013 #define BIT_MASK_TIMER_8812F 0xff 20014 #define BIT_TIMER_8812F(x) \ 20015 (((x) & BIT_MASK_TIMER_8812F) << BIT_SHIFT_TIMER_8812F) 20016 #define BITS_TIMER_8812F (BIT_MASK_TIMER_8812F << BIT_SHIFT_TIMER_8812F) 20017 #define BIT_CLEAR_TIMER_8812F(x) ((x) & (~BITS_TIMER_8812F)) 20018 #define BIT_GET_TIMER_8812F(x) \ 20019 (((x) >> BIT_SHIFT_TIMER_8812F) & BIT_MASK_TIMER_8812F) 20020 #define BIT_SET_TIMER_8812F(x, v) \ 20021 (BIT_CLEAR_TIMER_8812F(x) | BIT_TIMER_8812F(v)) 20022 20023 /* 2 REG_BT_COEX_8812F */ 20024 #define BIT_R_GNT_BT_RFC_SW_8812F BIT(12) 20025 #define BIT_R_GNT_BT_RFC_SW_EN_8812F BIT(11) 20026 #define BIT_R_GNT_BT_BB_SW_8812F BIT(10) 20027 #define BIT_R_GNT_BT_BB_SW_EN_8812F BIT(9) 20028 #define BIT_R_BT_CNT_THREN_8812F BIT(8) 20029 20030 #define BIT_SHIFT_R_BT_CNT_THR_8812F 0 20031 #define BIT_MASK_R_BT_CNT_THR_8812F 0xff 20032 #define BIT_R_BT_CNT_THR_8812F(x) \ 20033 (((x) & BIT_MASK_R_BT_CNT_THR_8812F) << BIT_SHIFT_R_BT_CNT_THR_8812F) 20034 #define BITS_R_BT_CNT_THR_8812F \ 20035 (BIT_MASK_R_BT_CNT_THR_8812F << BIT_SHIFT_R_BT_CNT_THR_8812F) 20036 #define BIT_CLEAR_R_BT_CNT_THR_8812F(x) ((x) & (~BITS_R_BT_CNT_THR_8812F)) 20037 #define BIT_GET_R_BT_CNT_THR_8812F(x) \ 20038 (((x) >> BIT_SHIFT_R_BT_CNT_THR_8812F) & BIT_MASK_R_BT_CNT_THR_8812F) 20039 #define BIT_SET_R_BT_CNT_THR_8812F(x, v) \ 20040 (BIT_CLEAR_R_BT_CNT_THR_8812F(x) | BIT_R_BT_CNT_THR_8812F(v)) 20041 20042 /* 2 REG_WLAN_ACT_MASK_CTRL_8812F */ 20043 20044 #define BIT_SHIFT_RXMYRTS_NAV_V1_8812F 8 20045 #define BIT_MASK_RXMYRTS_NAV_V1_8812F 0xff 20046 #define BIT_RXMYRTS_NAV_V1_8812F(x) \ 20047 (((x) & BIT_MASK_RXMYRTS_NAV_V1_8812F) \ 20048 << BIT_SHIFT_RXMYRTS_NAV_V1_8812F) 20049 #define BITS_RXMYRTS_NAV_V1_8812F \ 20050 (BIT_MASK_RXMYRTS_NAV_V1_8812F << BIT_SHIFT_RXMYRTS_NAV_V1_8812F) 20051 #define BIT_CLEAR_RXMYRTS_NAV_V1_8812F(x) ((x) & (~BITS_RXMYRTS_NAV_V1_8812F)) 20052 #define BIT_GET_RXMYRTS_NAV_V1_8812F(x) \ 20053 (((x) >> BIT_SHIFT_RXMYRTS_NAV_V1_8812F) & \ 20054 BIT_MASK_RXMYRTS_NAV_V1_8812F) 20055 #define BIT_SET_RXMYRTS_NAV_V1_8812F(x, v) \ 20056 (BIT_CLEAR_RXMYRTS_NAV_V1_8812F(x) | BIT_RXMYRTS_NAV_V1_8812F(v)) 20057 20058 #define BIT_SHIFT_RTSRST_V1_8812F 0 20059 #define BIT_MASK_RTSRST_V1_8812F 0xff 20060 #define BIT_RTSRST_V1_8812F(x) \ 20061 (((x) & BIT_MASK_RTSRST_V1_8812F) << BIT_SHIFT_RTSRST_V1_8812F) 20062 #define BITS_RTSRST_V1_8812F \ 20063 (BIT_MASK_RTSRST_V1_8812F << BIT_SHIFT_RTSRST_V1_8812F) 20064 #define BIT_CLEAR_RTSRST_V1_8812F(x) ((x) & (~BITS_RTSRST_V1_8812F)) 20065 #define BIT_GET_RTSRST_V1_8812F(x) \ 20066 (((x) >> BIT_SHIFT_RTSRST_V1_8812F) & BIT_MASK_RTSRST_V1_8812F) 20067 #define BIT_SET_RTSRST_V1_8812F(x, v) \ 20068 (BIT_CLEAR_RTSRST_V1_8812F(x) | BIT_RTSRST_V1_8812F(v)) 20069 20070 /* 2 REG_WLAN_ACT_MASK_CTRL_1_8812F */ 20071 #define BIT_WLRX_TER_BY_CTL_1_8812F BIT(11) 20072 #define BIT_WLRX_TER_BY_AD_1_8812F BIT(10) 20073 #define BIT_ANT_DIVERSITY_SEL_1_8812F BIT(9) 20074 #define BIT_ANTSEL_FOR_BT_CTRL_EN_1_8812F BIT(8) 20075 #define BIT_WLACT_LOW_GNTWL_EN_1_8812F BIT(2) 20076 #define BIT_WLACT_HIGH_GNTBT_EN_1_8812F BIT(1) 20077 #define BIT_NAV_UPPER_1_V1_8812F BIT(0) 20078 20079 /* 2 REG_BT_COEX_ENHANCED_INTR_CTRL_8812F */ 20080 20081 #define BIT_SHIFT_BT_STAT_DELAY_8812F 12 20082 #define BIT_MASK_BT_STAT_DELAY_8812F 0xf 20083 #define BIT_BT_STAT_DELAY_8812F(x) \ 20084 (((x) & BIT_MASK_BT_STAT_DELAY_8812F) << BIT_SHIFT_BT_STAT_DELAY_8812F) 20085 #define BITS_BT_STAT_DELAY_8812F \ 20086 (BIT_MASK_BT_STAT_DELAY_8812F << BIT_SHIFT_BT_STAT_DELAY_8812F) 20087 #define BIT_CLEAR_BT_STAT_DELAY_8812F(x) ((x) & (~BITS_BT_STAT_DELAY_8812F)) 20088 #define BIT_GET_BT_STAT_DELAY_8812F(x) \ 20089 (((x) >> BIT_SHIFT_BT_STAT_DELAY_8812F) & BIT_MASK_BT_STAT_DELAY_8812F) 20090 #define BIT_SET_BT_STAT_DELAY_8812F(x, v) \ 20091 (BIT_CLEAR_BT_STAT_DELAY_8812F(x) | BIT_BT_STAT_DELAY_8812F(v)) 20092 20093 #define BIT_SHIFT_BT_TRX_INIT_DETECT_8812F 8 20094 #define BIT_MASK_BT_TRX_INIT_DETECT_8812F 0xf 20095 #define BIT_BT_TRX_INIT_DETECT_8812F(x) \ 20096 (((x) & BIT_MASK_BT_TRX_INIT_DETECT_8812F) \ 20097 << BIT_SHIFT_BT_TRX_INIT_DETECT_8812F) 20098 #define BITS_BT_TRX_INIT_DETECT_8812F \ 20099 (BIT_MASK_BT_TRX_INIT_DETECT_8812F \ 20100 << BIT_SHIFT_BT_TRX_INIT_DETECT_8812F) 20101 #define BIT_CLEAR_BT_TRX_INIT_DETECT_8812F(x) \ 20102 ((x) & (~BITS_BT_TRX_INIT_DETECT_8812F)) 20103 #define BIT_GET_BT_TRX_INIT_DETECT_8812F(x) \ 20104 (((x) >> BIT_SHIFT_BT_TRX_INIT_DETECT_8812F) & \ 20105 BIT_MASK_BT_TRX_INIT_DETECT_8812F) 20106 #define BIT_SET_BT_TRX_INIT_DETECT_8812F(x, v) \ 20107 (BIT_CLEAR_BT_TRX_INIT_DETECT_8812F(x) | \ 20108 BIT_BT_TRX_INIT_DETECT_8812F(v)) 20109 20110 #define BIT_SHIFT_BT_PRI_DETECT_TO_8812F 4 20111 #define BIT_MASK_BT_PRI_DETECT_TO_8812F 0xf 20112 #define BIT_BT_PRI_DETECT_TO_8812F(x) \ 20113 (((x) & BIT_MASK_BT_PRI_DETECT_TO_8812F) \ 20114 << BIT_SHIFT_BT_PRI_DETECT_TO_8812F) 20115 #define BITS_BT_PRI_DETECT_TO_8812F \ 20116 (BIT_MASK_BT_PRI_DETECT_TO_8812F << BIT_SHIFT_BT_PRI_DETECT_TO_8812F) 20117 #define BIT_CLEAR_BT_PRI_DETECT_TO_8812F(x) \ 20118 ((x) & (~BITS_BT_PRI_DETECT_TO_8812F)) 20119 #define BIT_GET_BT_PRI_DETECT_TO_8812F(x) \ 20120 (((x) >> BIT_SHIFT_BT_PRI_DETECT_TO_8812F) & \ 20121 BIT_MASK_BT_PRI_DETECT_TO_8812F) 20122 #define BIT_SET_BT_PRI_DETECT_TO_8812F(x, v) \ 20123 (BIT_CLEAR_BT_PRI_DETECT_TO_8812F(x) | BIT_BT_PRI_DETECT_TO_8812F(v)) 20124 20125 #define BIT_R_GRANTALL_WLMASK_8812F BIT(3) 20126 #define BIT_STATIS_BT_EN_8812F BIT(2) 20127 #define BIT_WL_ACT_MASK_ENABLE_8812F BIT(1) 20128 #define BIT_ENHANCED_BT_8812F BIT(0) 20129 20130 /* 2 REG_BT_ACT_STATISTICS_8812F */ 20131 20132 #define BIT_SHIFT_STATIS_BT_HI_RX_8812F 16 20133 #define BIT_MASK_STATIS_BT_HI_RX_8812F 0xffff 20134 #define BIT_STATIS_BT_HI_RX_8812F(x) \ 20135 (((x) & BIT_MASK_STATIS_BT_HI_RX_8812F) \ 20136 << BIT_SHIFT_STATIS_BT_HI_RX_8812F) 20137 #define BITS_STATIS_BT_HI_RX_8812F \ 20138 (BIT_MASK_STATIS_BT_HI_RX_8812F << BIT_SHIFT_STATIS_BT_HI_RX_8812F) 20139 #define BIT_CLEAR_STATIS_BT_HI_RX_8812F(x) ((x) & (~BITS_STATIS_BT_HI_RX_8812F)) 20140 #define BIT_GET_STATIS_BT_HI_RX_8812F(x) \ 20141 (((x) >> BIT_SHIFT_STATIS_BT_HI_RX_8812F) & \ 20142 BIT_MASK_STATIS_BT_HI_RX_8812F) 20143 #define BIT_SET_STATIS_BT_HI_RX_8812F(x, v) \ 20144 (BIT_CLEAR_STATIS_BT_HI_RX_8812F(x) | BIT_STATIS_BT_HI_RX_8812F(v)) 20145 20146 #define BIT_SHIFT_STATIS_BT_HI_TX_8812F 0 20147 #define BIT_MASK_STATIS_BT_HI_TX_8812F 0xffff 20148 #define BIT_STATIS_BT_HI_TX_8812F(x) \ 20149 (((x) & BIT_MASK_STATIS_BT_HI_TX_8812F) \ 20150 << BIT_SHIFT_STATIS_BT_HI_TX_8812F) 20151 #define BITS_STATIS_BT_HI_TX_8812F \ 20152 (BIT_MASK_STATIS_BT_HI_TX_8812F << BIT_SHIFT_STATIS_BT_HI_TX_8812F) 20153 #define BIT_CLEAR_STATIS_BT_HI_TX_8812F(x) ((x) & (~BITS_STATIS_BT_HI_TX_8812F)) 20154 #define BIT_GET_STATIS_BT_HI_TX_8812F(x) \ 20155 (((x) >> BIT_SHIFT_STATIS_BT_HI_TX_8812F) & \ 20156 BIT_MASK_STATIS_BT_HI_TX_8812F) 20157 #define BIT_SET_STATIS_BT_HI_TX_8812F(x, v) \ 20158 (BIT_CLEAR_STATIS_BT_HI_TX_8812F(x) | BIT_STATIS_BT_HI_TX_8812F(v)) 20159 20160 /* 2 REG_BT_ACT_STATISTICS_1_8812F */ 20161 20162 #define BIT_SHIFT_STATIS_BT_LO_RX_1_8812F 16 20163 #define BIT_MASK_STATIS_BT_LO_RX_1_8812F 0xffff 20164 #define BIT_STATIS_BT_LO_RX_1_8812F(x) \ 20165 (((x) & BIT_MASK_STATIS_BT_LO_RX_1_8812F) \ 20166 << BIT_SHIFT_STATIS_BT_LO_RX_1_8812F) 20167 #define BITS_STATIS_BT_LO_RX_1_8812F \ 20168 (BIT_MASK_STATIS_BT_LO_RX_1_8812F << BIT_SHIFT_STATIS_BT_LO_RX_1_8812F) 20169 #define BIT_CLEAR_STATIS_BT_LO_RX_1_8812F(x) \ 20170 ((x) & (~BITS_STATIS_BT_LO_RX_1_8812F)) 20171 #define BIT_GET_STATIS_BT_LO_RX_1_8812F(x) \ 20172 (((x) >> BIT_SHIFT_STATIS_BT_LO_RX_1_8812F) & \ 20173 BIT_MASK_STATIS_BT_LO_RX_1_8812F) 20174 #define BIT_SET_STATIS_BT_LO_RX_1_8812F(x, v) \ 20175 (BIT_CLEAR_STATIS_BT_LO_RX_1_8812F(x) | BIT_STATIS_BT_LO_RX_1_8812F(v)) 20176 20177 #define BIT_SHIFT_STATIS_BT_LO_TX_1_8812F 0 20178 #define BIT_MASK_STATIS_BT_LO_TX_1_8812F 0xffff 20179 #define BIT_STATIS_BT_LO_TX_1_8812F(x) \ 20180 (((x) & BIT_MASK_STATIS_BT_LO_TX_1_8812F) \ 20181 << BIT_SHIFT_STATIS_BT_LO_TX_1_8812F) 20182 #define BITS_STATIS_BT_LO_TX_1_8812F \ 20183 (BIT_MASK_STATIS_BT_LO_TX_1_8812F << BIT_SHIFT_STATIS_BT_LO_TX_1_8812F) 20184 #define BIT_CLEAR_STATIS_BT_LO_TX_1_8812F(x) \ 20185 ((x) & (~BITS_STATIS_BT_LO_TX_1_8812F)) 20186 #define BIT_GET_STATIS_BT_LO_TX_1_8812F(x) \ 20187 (((x) >> BIT_SHIFT_STATIS_BT_LO_TX_1_8812F) & \ 20188 BIT_MASK_STATIS_BT_LO_TX_1_8812F) 20189 #define BIT_SET_STATIS_BT_LO_TX_1_8812F(x, v) \ 20190 (BIT_CLEAR_STATIS_BT_LO_TX_1_8812F(x) | BIT_STATIS_BT_LO_TX_1_8812F(v)) 20191 20192 /* 2 REG_BT_STATISTICS_CONTROL_REGISTER_8812F */ 20193 20194 #define BIT_SHIFT_R_BT_CMD_RPT_8812F 16 20195 #define BIT_MASK_R_BT_CMD_RPT_8812F 0xffff 20196 #define BIT_R_BT_CMD_RPT_8812F(x) \ 20197 (((x) & BIT_MASK_R_BT_CMD_RPT_8812F) << BIT_SHIFT_R_BT_CMD_RPT_8812F) 20198 #define BITS_R_BT_CMD_RPT_8812F \ 20199 (BIT_MASK_R_BT_CMD_RPT_8812F << BIT_SHIFT_R_BT_CMD_RPT_8812F) 20200 #define BIT_CLEAR_R_BT_CMD_RPT_8812F(x) ((x) & (~BITS_R_BT_CMD_RPT_8812F)) 20201 #define BIT_GET_R_BT_CMD_RPT_8812F(x) \ 20202 (((x) >> BIT_SHIFT_R_BT_CMD_RPT_8812F) & BIT_MASK_R_BT_CMD_RPT_8812F) 20203 #define BIT_SET_R_BT_CMD_RPT_8812F(x, v) \ 20204 (BIT_CLEAR_R_BT_CMD_RPT_8812F(x) | BIT_R_BT_CMD_RPT_8812F(v)) 20205 20206 #define BIT_SHIFT_R_RPT_FROM_BT_8812F 8 20207 #define BIT_MASK_R_RPT_FROM_BT_8812F 0xff 20208 #define BIT_R_RPT_FROM_BT_8812F(x) \ 20209 (((x) & BIT_MASK_R_RPT_FROM_BT_8812F) << BIT_SHIFT_R_RPT_FROM_BT_8812F) 20210 #define BITS_R_RPT_FROM_BT_8812F \ 20211 (BIT_MASK_R_RPT_FROM_BT_8812F << BIT_SHIFT_R_RPT_FROM_BT_8812F) 20212 #define BIT_CLEAR_R_RPT_FROM_BT_8812F(x) ((x) & (~BITS_R_RPT_FROM_BT_8812F)) 20213 #define BIT_GET_R_RPT_FROM_BT_8812F(x) \ 20214 (((x) >> BIT_SHIFT_R_RPT_FROM_BT_8812F) & BIT_MASK_R_RPT_FROM_BT_8812F) 20215 #define BIT_SET_R_RPT_FROM_BT_8812F(x, v) \ 20216 (BIT_CLEAR_R_RPT_FROM_BT_8812F(x) | BIT_R_RPT_FROM_BT_8812F(v)) 20217 20218 #define BIT_SHIFT_BT_HID_ISR_SET_8812F 6 20219 #define BIT_MASK_BT_HID_ISR_SET_8812F 0x3 20220 #define BIT_BT_HID_ISR_SET_8812F(x) \ 20221 (((x) & BIT_MASK_BT_HID_ISR_SET_8812F) \ 20222 << BIT_SHIFT_BT_HID_ISR_SET_8812F) 20223 #define BITS_BT_HID_ISR_SET_8812F \ 20224 (BIT_MASK_BT_HID_ISR_SET_8812F << BIT_SHIFT_BT_HID_ISR_SET_8812F) 20225 #define BIT_CLEAR_BT_HID_ISR_SET_8812F(x) ((x) & (~BITS_BT_HID_ISR_SET_8812F)) 20226 #define BIT_GET_BT_HID_ISR_SET_8812F(x) \ 20227 (((x) >> BIT_SHIFT_BT_HID_ISR_SET_8812F) & \ 20228 BIT_MASK_BT_HID_ISR_SET_8812F) 20229 #define BIT_SET_BT_HID_ISR_SET_8812F(x, v) \ 20230 (BIT_CLEAR_BT_HID_ISR_SET_8812F(x) | BIT_BT_HID_ISR_SET_8812F(v)) 20231 20232 #define BIT_TDMA_BT_START_NOTIFY_8812F BIT(5) 20233 #define BIT_ENABLE_TDMA_FW_MODE_8812F BIT(4) 20234 #define BIT_ENABLE_PTA_TDMA_MODE_8812F BIT(3) 20235 #define BIT_ENABLE_COEXIST_TAB_IN_TDMA_8812F BIT(2) 20236 #define BIT_GPIO2_GPIO3_EXANGE_OR_NO_BT_CCA_8812F BIT(1) 20237 #define BIT_RTK_BT_ENABLE_8812F BIT(0) 20238 20239 /* 2 REG_BT_STATUS_REPORT_REGISTER_8812F */ 20240 20241 #define BIT_SHIFT_BT_PROFILE_8812F 24 20242 #define BIT_MASK_BT_PROFILE_8812F 0xff 20243 #define BIT_BT_PROFILE_8812F(x) \ 20244 (((x) & BIT_MASK_BT_PROFILE_8812F) << BIT_SHIFT_BT_PROFILE_8812F) 20245 #define BITS_BT_PROFILE_8812F \ 20246 (BIT_MASK_BT_PROFILE_8812F << BIT_SHIFT_BT_PROFILE_8812F) 20247 #define BIT_CLEAR_BT_PROFILE_8812F(x) ((x) & (~BITS_BT_PROFILE_8812F)) 20248 #define BIT_GET_BT_PROFILE_8812F(x) \ 20249 (((x) >> BIT_SHIFT_BT_PROFILE_8812F) & BIT_MASK_BT_PROFILE_8812F) 20250 #define BIT_SET_BT_PROFILE_8812F(x, v) \ 20251 (BIT_CLEAR_BT_PROFILE_8812F(x) | BIT_BT_PROFILE_8812F(v)) 20252 20253 #define BIT_SHIFT_BT_POWER_8812F 16 20254 #define BIT_MASK_BT_POWER_8812F 0xff 20255 #define BIT_BT_POWER_8812F(x) \ 20256 (((x) & BIT_MASK_BT_POWER_8812F) << BIT_SHIFT_BT_POWER_8812F) 20257 #define BITS_BT_POWER_8812F \ 20258 (BIT_MASK_BT_POWER_8812F << BIT_SHIFT_BT_POWER_8812F) 20259 #define BIT_CLEAR_BT_POWER_8812F(x) ((x) & (~BITS_BT_POWER_8812F)) 20260 #define BIT_GET_BT_POWER_8812F(x) \ 20261 (((x) >> BIT_SHIFT_BT_POWER_8812F) & BIT_MASK_BT_POWER_8812F) 20262 #define BIT_SET_BT_POWER_8812F(x, v) \ 20263 (BIT_CLEAR_BT_POWER_8812F(x) | BIT_BT_POWER_8812F(v)) 20264 20265 #define BIT_SHIFT_BT_PREDECT_STATUS_8812F 8 20266 #define BIT_MASK_BT_PREDECT_STATUS_8812F 0xff 20267 #define BIT_BT_PREDECT_STATUS_8812F(x) \ 20268 (((x) & BIT_MASK_BT_PREDECT_STATUS_8812F) \ 20269 << BIT_SHIFT_BT_PREDECT_STATUS_8812F) 20270 #define BITS_BT_PREDECT_STATUS_8812F \ 20271 (BIT_MASK_BT_PREDECT_STATUS_8812F << BIT_SHIFT_BT_PREDECT_STATUS_8812F) 20272 #define BIT_CLEAR_BT_PREDECT_STATUS_8812F(x) \ 20273 ((x) & (~BITS_BT_PREDECT_STATUS_8812F)) 20274 #define BIT_GET_BT_PREDECT_STATUS_8812F(x) \ 20275 (((x) >> BIT_SHIFT_BT_PREDECT_STATUS_8812F) & \ 20276 BIT_MASK_BT_PREDECT_STATUS_8812F) 20277 #define BIT_SET_BT_PREDECT_STATUS_8812F(x, v) \ 20278 (BIT_CLEAR_BT_PREDECT_STATUS_8812F(x) | BIT_BT_PREDECT_STATUS_8812F(v)) 20279 20280 #define BIT_SHIFT_BT_CMD_INFO_8812F 0 20281 #define BIT_MASK_BT_CMD_INFO_8812F 0xff 20282 #define BIT_BT_CMD_INFO_8812F(x) \ 20283 (((x) & BIT_MASK_BT_CMD_INFO_8812F) << BIT_SHIFT_BT_CMD_INFO_8812F) 20284 #define BITS_BT_CMD_INFO_8812F \ 20285 (BIT_MASK_BT_CMD_INFO_8812F << BIT_SHIFT_BT_CMD_INFO_8812F) 20286 #define BIT_CLEAR_BT_CMD_INFO_8812F(x) ((x) & (~BITS_BT_CMD_INFO_8812F)) 20287 #define BIT_GET_BT_CMD_INFO_8812F(x) \ 20288 (((x) >> BIT_SHIFT_BT_CMD_INFO_8812F) & BIT_MASK_BT_CMD_INFO_8812F) 20289 #define BIT_SET_BT_CMD_INFO_8812F(x, v) \ 20290 (BIT_CLEAR_BT_CMD_INFO_8812F(x) | BIT_BT_CMD_INFO_8812F(v)) 20291 20292 /* 2 REG_BT_INTERRUPT_CONTROL_REGISTER_8812F */ 20293 #define BIT_EN_MAC_NULL_PKT_NOTIFY_8812F BIT(31) 20294 #define BIT_EN_WLAN_RPT_AND_BT_QUERY_8812F BIT(30) 20295 #define BIT_EN_BT_STSTUS_RPT_8812F BIT(29) 20296 #define BIT_EN_BT_POWER_8812F BIT(28) 20297 #define BIT_EN_BT_CHANNEL_8812F BIT(27) 20298 #define BIT_EN_BT_SLOT_CHANGE_8812F BIT(26) 20299 #define BIT_EN_BT_PROFILE_OR_HID_8812F BIT(25) 20300 #define BIT_WLAN_RPT_NOTIFY_8812F BIT(24) 20301 20302 #define BIT_SHIFT_WLAN_RPT_DATA_8812F 16 20303 #define BIT_MASK_WLAN_RPT_DATA_8812F 0xff 20304 #define BIT_WLAN_RPT_DATA_8812F(x) \ 20305 (((x) & BIT_MASK_WLAN_RPT_DATA_8812F) << BIT_SHIFT_WLAN_RPT_DATA_8812F) 20306 #define BITS_WLAN_RPT_DATA_8812F \ 20307 (BIT_MASK_WLAN_RPT_DATA_8812F << BIT_SHIFT_WLAN_RPT_DATA_8812F) 20308 #define BIT_CLEAR_WLAN_RPT_DATA_8812F(x) ((x) & (~BITS_WLAN_RPT_DATA_8812F)) 20309 #define BIT_GET_WLAN_RPT_DATA_8812F(x) \ 20310 (((x) >> BIT_SHIFT_WLAN_RPT_DATA_8812F) & BIT_MASK_WLAN_RPT_DATA_8812F) 20311 #define BIT_SET_WLAN_RPT_DATA_8812F(x, v) \ 20312 (BIT_CLEAR_WLAN_RPT_DATA_8812F(x) | BIT_WLAN_RPT_DATA_8812F(v)) 20313 20314 #define BIT_SHIFT_CMD_ID_8812F 8 20315 #define BIT_MASK_CMD_ID_8812F 0xff 20316 #define BIT_CMD_ID_8812F(x) \ 20317 (((x) & BIT_MASK_CMD_ID_8812F) << BIT_SHIFT_CMD_ID_8812F) 20318 #define BITS_CMD_ID_8812F (BIT_MASK_CMD_ID_8812F << BIT_SHIFT_CMD_ID_8812F) 20319 #define BIT_CLEAR_CMD_ID_8812F(x) ((x) & (~BITS_CMD_ID_8812F)) 20320 #define BIT_GET_CMD_ID_8812F(x) \ 20321 (((x) >> BIT_SHIFT_CMD_ID_8812F) & BIT_MASK_CMD_ID_8812F) 20322 #define BIT_SET_CMD_ID_8812F(x, v) \ 20323 (BIT_CLEAR_CMD_ID_8812F(x) | BIT_CMD_ID_8812F(v)) 20324 20325 #define BIT_SHIFT_BT_DATA_8812F 0 20326 #define BIT_MASK_BT_DATA_8812F 0xff 20327 #define BIT_BT_DATA_8812F(x) \ 20328 (((x) & BIT_MASK_BT_DATA_8812F) << BIT_SHIFT_BT_DATA_8812F) 20329 #define BITS_BT_DATA_8812F (BIT_MASK_BT_DATA_8812F << BIT_SHIFT_BT_DATA_8812F) 20330 #define BIT_CLEAR_BT_DATA_8812F(x) ((x) & (~BITS_BT_DATA_8812F)) 20331 #define BIT_GET_BT_DATA_8812F(x) \ 20332 (((x) >> BIT_SHIFT_BT_DATA_8812F) & BIT_MASK_BT_DATA_8812F) 20333 #define BIT_SET_BT_DATA_8812F(x, v) \ 20334 (BIT_CLEAR_BT_DATA_8812F(x) | BIT_BT_DATA_8812F(v)) 20335 20336 /* 2 REG_WLAN_REPORT_TIME_OUT_CONTROL_REGISTER_8812F */ 20337 20338 #define BIT_SHIFT_WLAN_RPT_TO_8812F 0 20339 #define BIT_MASK_WLAN_RPT_TO_8812F 0xff 20340 #define BIT_WLAN_RPT_TO_8812F(x) \ 20341 (((x) & BIT_MASK_WLAN_RPT_TO_8812F) << BIT_SHIFT_WLAN_RPT_TO_8812F) 20342 #define BITS_WLAN_RPT_TO_8812F \ 20343 (BIT_MASK_WLAN_RPT_TO_8812F << BIT_SHIFT_WLAN_RPT_TO_8812F) 20344 #define BIT_CLEAR_WLAN_RPT_TO_8812F(x) ((x) & (~BITS_WLAN_RPT_TO_8812F)) 20345 #define BIT_GET_WLAN_RPT_TO_8812F(x) \ 20346 (((x) >> BIT_SHIFT_WLAN_RPT_TO_8812F) & BIT_MASK_WLAN_RPT_TO_8812F) 20347 #define BIT_SET_WLAN_RPT_TO_8812F(x, v) \ 20348 (BIT_CLEAR_WLAN_RPT_TO_8812F(x) | BIT_WLAN_RPT_TO_8812F(v)) 20349 20350 /* 2 REG_BT_ISOLATION_TABLE_REGISTER_REGISTER_8812F */ 20351 20352 #define BIT_SHIFT_ISOLATION_CHK_0_8812F 1 20353 #define BIT_MASK_ISOLATION_CHK_0_8812F 0x7fffff 20354 #define BIT_ISOLATION_CHK_0_8812F(x) \ 20355 (((x) & BIT_MASK_ISOLATION_CHK_0_8812F) \ 20356 << BIT_SHIFT_ISOLATION_CHK_0_8812F) 20357 #define BITS_ISOLATION_CHK_0_8812F \ 20358 (BIT_MASK_ISOLATION_CHK_0_8812F << BIT_SHIFT_ISOLATION_CHK_0_8812F) 20359 #define BIT_CLEAR_ISOLATION_CHK_0_8812F(x) ((x) & (~BITS_ISOLATION_CHK_0_8812F)) 20360 #define BIT_GET_ISOLATION_CHK_0_8812F(x) \ 20361 (((x) >> BIT_SHIFT_ISOLATION_CHK_0_8812F) & \ 20362 BIT_MASK_ISOLATION_CHK_0_8812F) 20363 #define BIT_SET_ISOLATION_CHK_0_8812F(x, v) \ 20364 (BIT_CLEAR_ISOLATION_CHK_0_8812F(x) | BIT_ISOLATION_CHK_0_8812F(v)) 20365 20366 #define BIT_ISOLATION_EN_8812F BIT(0) 20367 20368 /* 2 REG_BT_ISOLATION_TABLE_REGISTER_REGISTER_1_8812F */ 20369 20370 #define BIT_SHIFT_ISOLATION_CHK_1_8812F 0 20371 #define BIT_MASK_ISOLATION_CHK_1_8812F 0xffffffffL 20372 #define BIT_ISOLATION_CHK_1_8812F(x) \ 20373 (((x) & BIT_MASK_ISOLATION_CHK_1_8812F) \ 20374 << BIT_SHIFT_ISOLATION_CHK_1_8812F) 20375 #define BITS_ISOLATION_CHK_1_8812F \ 20376 (BIT_MASK_ISOLATION_CHK_1_8812F << BIT_SHIFT_ISOLATION_CHK_1_8812F) 20377 #define BIT_CLEAR_ISOLATION_CHK_1_8812F(x) ((x) & (~BITS_ISOLATION_CHK_1_8812F)) 20378 #define BIT_GET_ISOLATION_CHK_1_8812F(x) \ 20379 (((x) >> BIT_SHIFT_ISOLATION_CHK_1_8812F) & \ 20380 BIT_MASK_ISOLATION_CHK_1_8812F) 20381 #define BIT_SET_ISOLATION_CHK_1_8812F(x, v) \ 20382 (BIT_CLEAR_ISOLATION_CHK_1_8812F(x) | BIT_ISOLATION_CHK_1_8812F(v)) 20383 20384 /* 2 REG_BT_ISOLATION_TABLE_REGISTER_REGISTER_2_8812F */ 20385 20386 #define BIT_SHIFT_ISOLATION_CHK_2_8812F 0 20387 #define BIT_MASK_ISOLATION_CHK_2_8812F 0xffffff 20388 #define BIT_ISOLATION_CHK_2_8812F(x) \ 20389 (((x) & BIT_MASK_ISOLATION_CHK_2_8812F) \ 20390 << BIT_SHIFT_ISOLATION_CHK_2_8812F) 20391 #define BITS_ISOLATION_CHK_2_8812F \ 20392 (BIT_MASK_ISOLATION_CHK_2_8812F << BIT_SHIFT_ISOLATION_CHK_2_8812F) 20393 #define BIT_CLEAR_ISOLATION_CHK_2_8812F(x) ((x) & (~BITS_ISOLATION_CHK_2_8812F)) 20394 #define BIT_GET_ISOLATION_CHK_2_8812F(x) \ 20395 (((x) >> BIT_SHIFT_ISOLATION_CHK_2_8812F) & \ 20396 BIT_MASK_ISOLATION_CHK_2_8812F) 20397 #define BIT_SET_ISOLATION_CHK_2_8812F(x, v) \ 20398 (BIT_CLEAR_ISOLATION_CHK_2_8812F(x) | BIT_ISOLATION_CHK_2_8812F(v)) 20399 20400 /* 2 REG_BT_INTERRUPT_STATUS_REGISTER_8812F */ 20401 #define BIT_BT_HID_ISR_8812F BIT(7) 20402 #define BIT_BT_QUERY_ISR_8812F BIT(6) 20403 #define BIT_MAC_NULL_PKT_NOTIFY_ISR_8812F BIT(5) 20404 #define BIT_WLAN_RPT_ISR_8812F BIT(4) 20405 #define BIT_BT_POWER_ISR_8812F BIT(3) 20406 #define BIT_BT_CHANNEL_ISR_8812F BIT(2) 20407 #define BIT_BT_SLOT_CHANGE_ISR_8812F BIT(1) 20408 #define BIT_BT_PROFILE_ISR_8812F BIT(0) 20409 20410 /* 2 REG_BT_TDMA_TIME_REGISTER_8812F */ 20411 20412 #define BIT_SHIFT_BT_TIME_8812F 6 20413 #define BIT_MASK_BT_TIME_8812F 0x3ffffff 20414 #define BIT_BT_TIME_8812F(x) \ 20415 (((x) & BIT_MASK_BT_TIME_8812F) << BIT_SHIFT_BT_TIME_8812F) 20416 #define BITS_BT_TIME_8812F (BIT_MASK_BT_TIME_8812F << BIT_SHIFT_BT_TIME_8812F) 20417 #define BIT_CLEAR_BT_TIME_8812F(x) ((x) & (~BITS_BT_TIME_8812F)) 20418 #define BIT_GET_BT_TIME_8812F(x) \ 20419 (((x) >> BIT_SHIFT_BT_TIME_8812F) & BIT_MASK_BT_TIME_8812F) 20420 #define BIT_SET_BT_TIME_8812F(x, v) \ 20421 (BIT_CLEAR_BT_TIME_8812F(x) | BIT_BT_TIME_8812F(v)) 20422 20423 #define BIT_SHIFT_BT_RPT_SAMPLE_RATE_8812F 0 20424 #define BIT_MASK_BT_RPT_SAMPLE_RATE_8812F 0x3f 20425 #define BIT_BT_RPT_SAMPLE_RATE_8812F(x) \ 20426 (((x) & BIT_MASK_BT_RPT_SAMPLE_RATE_8812F) \ 20427 << BIT_SHIFT_BT_RPT_SAMPLE_RATE_8812F) 20428 #define BITS_BT_RPT_SAMPLE_RATE_8812F \ 20429 (BIT_MASK_BT_RPT_SAMPLE_RATE_8812F \ 20430 << BIT_SHIFT_BT_RPT_SAMPLE_RATE_8812F) 20431 #define BIT_CLEAR_BT_RPT_SAMPLE_RATE_8812F(x) \ 20432 ((x) & (~BITS_BT_RPT_SAMPLE_RATE_8812F)) 20433 #define BIT_GET_BT_RPT_SAMPLE_RATE_8812F(x) \ 20434 (((x) >> BIT_SHIFT_BT_RPT_SAMPLE_RATE_8812F) & \ 20435 BIT_MASK_BT_RPT_SAMPLE_RATE_8812F) 20436 #define BIT_SET_BT_RPT_SAMPLE_RATE_8812F(x, v) \ 20437 (BIT_CLEAR_BT_RPT_SAMPLE_RATE_8812F(x) | \ 20438 BIT_BT_RPT_SAMPLE_RATE_8812F(v)) 20439 20440 /* 2 REG_BT_ACT_REGISTER_8812F */ 20441 20442 #define BIT_SHIFT_BT_EISR_EN_8812F 16 20443 #define BIT_MASK_BT_EISR_EN_8812F 0xff 20444 #define BIT_BT_EISR_EN_8812F(x) \ 20445 (((x) & BIT_MASK_BT_EISR_EN_8812F) << BIT_SHIFT_BT_EISR_EN_8812F) 20446 #define BITS_BT_EISR_EN_8812F \ 20447 (BIT_MASK_BT_EISR_EN_8812F << BIT_SHIFT_BT_EISR_EN_8812F) 20448 #define BIT_CLEAR_BT_EISR_EN_8812F(x) ((x) & (~BITS_BT_EISR_EN_8812F)) 20449 #define BIT_GET_BT_EISR_EN_8812F(x) \ 20450 (((x) >> BIT_SHIFT_BT_EISR_EN_8812F) & BIT_MASK_BT_EISR_EN_8812F) 20451 #define BIT_SET_BT_EISR_EN_8812F(x, v) \ 20452 (BIT_CLEAR_BT_EISR_EN_8812F(x) | BIT_BT_EISR_EN_8812F(v)) 20453 20454 #define BIT_BT_ACT_FALLING_ISR_8812F BIT(10) 20455 #define BIT_BT_ACT_RISING_ISR_8812F BIT(9) 20456 #define BIT_TDMA_TO_ISR_8812F BIT(8) 20457 20458 #define BIT_SHIFT_BT_CH_V1_8812F 0 20459 #define BIT_MASK_BT_CH_V1_8812F 0x7f 20460 #define BIT_BT_CH_V1_8812F(x) \ 20461 (((x) & BIT_MASK_BT_CH_V1_8812F) << BIT_SHIFT_BT_CH_V1_8812F) 20462 #define BITS_BT_CH_V1_8812F \ 20463 (BIT_MASK_BT_CH_V1_8812F << BIT_SHIFT_BT_CH_V1_8812F) 20464 #define BIT_CLEAR_BT_CH_V1_8812F(x) ((x) & (~BITS_BT_CH_V1_8812F)) 20465 #define BIT_GET_BT_CH_V1_8812F(x) \ 20466 (((x) >> BIT_SHIFT_BT_CH_V1_8812F) & BIT_MASK_BT_CH_V1_8812F) 20467 #define BIT_SET_BT_CH_V1_8812F(x, v) \ 20468 (BIT_CLEAR_BT_CH_V1_8812F(x) | BIT_BT_CH_V1_8812F(v)) 20469 20470 /* 2 REG_OBFF_CTRL_BASIC_8812F */ 20471 #define BIT_OBFF_EN_V1_8812F BIT(31) 20472 20473 #define BIT_SHIFT_OBFF_STATE_V1_8812F 28 20474 #define BIT_MASK_OBFF_STATE_V1_8812F 0x3 20475 #define BIT_OBFF_STATE_V1_8812F(x) \ 20476 (((x) & BIT_MASK_OBFF_STATE_V1_8812F) << BIT_SHIFT_OBFF_STATE_V1_8812F) 20477 #define BITS_OBFF_STATE_V1_8812F \ 20478 (BIT_MASK_OBFF_STATE_V1_8812F << BIT_SHIFT_OBFF_STATE_V1_8812F) 20479 #define BIT_CLEAR_OBFF_STATE_V1_8812F(x) ((x) & (~BITS_OBFF_STATE_V1_8812F)) 20480 #define BIT_GET_OBFF_STATE_V1_8812F(x) \ 20481 (((x) >> BIT_SHIFT_OBFF_STATE_V1_8812F) & BIT_MASK_OBFF_STATE_V1_8812F) 20482 #define BIT_SET_OBFF_STATE_V1_8812F(x, v) \ 20483 (BIT_CLEAR_OBFF_STATE_V1_8812F(x) | BIT_OBFF_STATE_V1_8812F(v)) 20484 20485 #define BIT_OBFF_ACT_RXDMA_EN_8812F BIT(27) 20486 #define BIT_OBFF_BLOCK_INT_EN_8812F BIT(26) 20487 #define BIT_OBFF_AUTOACT_EN_8812F BIT(25) 20488 #define BIT_OBFF_AUTOIDLE_EN_8812F BIT(24) 20489 20490 #define BIT_SHIFT_WAKE_MAX_PLS_8812F 20 20491 #define BIT_MASK_WAKE_MAX_PLS_8812F 0x7 20492 #define BIT_WAKE_MAX_PLS_8812F(x) \ 20493 (((x) & BIT_MASK_WAKE_MAX_PLS_8812F) << BIT_SHIFT_WAKE_MAX_PLS_8812F) 20494 #define BITS_WAKE_MAX_PLS_8812F \ 20495 (BIT_MASK_WAKE_MAX_PLS_8812F << BIT_SHIFT_WAKE_MAX_PLS_8812F) 20496 #define BIT_CLEAR_WAKE_MAX_PLS_8812F(x) ((x) & (~BITS_WAKE_MAX_PLS_8812F)) 20497 #define BIT_GET_WAKE_MAX_PLS_8812F(x) \ 20498 (((x) >> BIT_SHIFT_WAKE_MAX_PLS_8812F) & BIT_MASK_WAKE_MAX_PLS_8812F) 20499 #define BIT_SET_WAKE_MAX_PLS_8812F(x, v) \ 20500 (BIT_CLEAR_WAKE_MAX_PLS_8812F(x) | BIT_WAKE_MAX_PLS_8812F(v)) 20501 20502 #define BIT_SHIFT_WAKE_MIN_PLS_8812F 16 20503 #define BIT_MASK_WAKE_MIN_PLS_8812F 0x7 20504 #define BIT_WAKE_MIN_PLS_8812F(x) \ 20505 (((x) & BIT_MASK_WAKE_MIN_PLS_8812F) << BIT_SHIFT_WAKE_MIN_PLS_8812F) 20506 #define BITS_WAKE_MIN_PLS_8812F \ 20507 (BIT_MASK_WAKE_MIN_PLS_8812F << BIT_SHIFT_WAKE_MIN_PLS_8812F) 20508 #define BIT_CLEAR_WAKE_MIN_PLS_8812F(x) ((x) & (~BITS_WAKE_MIN_PLS_8812F)) 20509 #define BIT_GET_WAKE_MIN_PLS_8812F(x) \ 20510 (((x) >> BIT_SHIFT_WAKE_MIN_PLS_8812F) & BIT_MASK_WAKE_MIN_PLS_8812F) 20511 #define BIT_SET_WAKE_MIN_PLS_8812F(x, v) \ 20512 (BIT_CLEAR_WAKE_MIN_PLS_8812F(x) | BIT_WAKE_MIN_PLS_8812F(v)) 20513 20514 #define BIT_SHIFT_WAKE_MAX_F2F_8812F 12 20515 #define BIT_MASK_WAKE_MAX_F2F_8812F 0x7 20516 #define BIT_WAKE_MAX_F2F_8812F(x) \ 20517 (((x) & BIT_MASK_WAKE_MAX_F2F_8812F) << BIT_SHIFT_WAKE_MAX_F2F_8812F) 20518 #define BITS_WAKE_MAX_F2F_8812F \ 20519 (BIT_MASK_WAKE_MAX_F2F_8812F << BIT_SHIFT_WAKE_MAX_F2F_8812F) 20520 #define BIT_CLEAR_WAKE_MAX_F2F_8812F(x) ((x) & (~BITS_WAKE_MAX_F2F_8812F)) 20521 #define BIT_GET_WAKE_MAX_F2F_8812F(x) \ 20522 (((x) >> BIT_SHIFT_WAKE_MAX_F2F_8812F) & BIT_MASK_WAKE_MAX_F2F_8812F) 20523 #define BIT_SET_WAKE_MAX_F2F_8812F(x, v) \ 20524 (BIT_CLEAR_WAKE_MAX_F2F_8812F(x) | BIT_WAKE_MAX_F2F_8812F(v)) 20525 20526 #define BIT_SHIFT_WAKE_MIN_F2F_8812F 8 20527 #define BIT_MASK_WAKE_MIN_F2F_8812F 0x7 20528 #define BIT_WAKE_MIN_F2F_8812F(x) \ 20529 (((x) & BIT_MASK_WAKE_MIN_F2F_8812F) << BIT_SHIFT_WAKE_MIN_F2F_8812F) 20530 #define BITS_WAKE_MIN_F2F_8812F \ 20531 (BIT_MASK_WAKE_MIN_F2F_8812F << BIT_SHIFT_WAKE_MIN_F2F_8812F) 20532 #define BIT_CLEAR_WAKE_MIN_F2F_8812F(x) ((x) & (~BITS_WAKE_MIN_F2F_8812F)) 20533 #define BIT_GET_WAKE_MIN_F2F_8812F(x) \ 20534 (((x) >> BIT_SHIFT_WAKE_MIN_F2F_8812F) & BIT_MASK_WAKE_MIN_F2F_8812F) 20535 #define BIT_SET_WAKE_MIN_F2F_8812F(x, v) \ 20536 (BIT_CLEAR_WAKE_MIN_F2F_8812F(x) | BIT_WAKE_MIN_F2F_8812F(v)) 20537 20538 #define BIT_APP_CPU_ACT_V1_8812F BIT(3) 20539 #define BIT_APP_OBFF_V1_8812F BIT(2) 20540 #define BIT_APP_IDLE_V1_8812F BIT(1) 20541 #define BIT_APP_INIT_V1_8812F BIT(0) 20542 20543 /* 2 REG_OBFF_CTRL2_TIMER_8812F */ 20544 20545 #define BIT_SHIFT_RX_HIGH_TIMER_IDX_8812F 24 20546 #define BIT_MASK_RX_HIGH_TIMER_IDX_8812F 0x7 20547 #define BIT_RX_HIGH_TIMER_IDX_8812F(x) \ 20548 (((x) & BIT_MASK_RX_HIGH_TIMER_IDX_8812F) \ 20549 << BIT_SHIFT_RX_HIGH_TIMER_IDX_8812F) 20550 #define BITS_RX_HIGH_TIMER_IDX_8812F \ 20551 (BIT_MASK_RX_HIGH_TIMER_IDX_8812F << BIT_SHIFT_RX_HIGH_TIMER_IDX_8812F) 20552 #define BIT_CLEAR_RX_HIGH_TIMER_IDX_8812F(x) \ 20553 ((x) & (~BITS_RX_HIGH_TIMER_IDX_8812F)) 20554 #define BIT_GET_RX_HIGH_TIMER_IDX_8812F(x) \ 20555 (((x) >> BIT_SHIFT_RX_HIGH_TIMER_IDX_8812F) & \ 20556 BIT_MASK_RX_HIGH_TIMER_IDX_8812F) 20557 #define BIT_SET_RX_HIGH_TIMER_IDX_8812F(x, v) \ 20558 (BIT_CLEAR_RX_HIGH_TIMER_IDX_8812F(x) | BIT_RX_HIGH_TIMER_IDX_8812F(v)) 20559 20560 #define BIT_SHIFT_RX_MED_TIMER_IDX_8812F 16 20561 #define BIT_MASK_RX_MED_TIMER_IDX_8812F 0x7 20562 #define BIT_RX_MED_TIMER_IDX_8812F(x) \ 20563 (((x) & BIT_MASK_RX_MED_TIMER_IDX_8812F) \ 20564 << BIT_SHIFT_RX_MED_TIMER_IDX_8812F) 20565 #define BITS_RX_MED_TIMER_IDX_8812F \ 20566 (BIT_MASK_RX_MED_TIMER_IDX_8812F << BIT_SHIFT_RX_MED_TIMER_IDX_8812F) 20567 #define BIT_CLEAR_RX_MED_TIMER_IDX_8812F(x) \ 20568 ((x) & (~BITS_RX_MED_TIMER_IDX_8812F)) 20569 #define BIT_GET_RX_MED_TIMER_IDX_8812F(x) \ 20570 (((x) >> BIT_SHIFT_RX_MED_TIMER_IDX_8812F) & \ 20571 BIT_MASK_RX_MED_TIMER_IDX_8812F) 20572 #define BIT_SET_RX_MED_TIMER_IDX_8812F(x, v) \ 20573 (BIT_CLEAR_RX_MED_TIMER_IDX_8812F(x) | BIT_RX_MED_TIMER_IDX_8812F(v)) 20574 20575 #define BIT_SHIFT_RX_LOW_TIMER_IDX_8812F 8 20576 #define BIT_MASK_RX_LOW_TIMER_IDX_8812F 0x7 20577 #define BIT_RX_LOW_TIMER_IDX_8812F(x) \ 20578 (((x) & BIT_MASK_RX_LOW_TIMER_IDX_8812F) \ 20579 << BIT_SHIFT_RX_LOW_TIMER_IDX_8812F) 20580 #define BITS_RX_LOW_TIMER_IDX_8812F \ 20581 (BIT_MASK_RX_LOW_TIMER_IDX_8812F << BIT_SHIFT_RX_LOW_TIMER_IDX_8812F) 20582 #define BIT_CLEAR_RX_LOW_TIMER_IDX_8812F(x) \ 20583 ((x) & (~BITS_RX_LOW_TIMER_IDX_8812F)) 20584 #define BIT_GET_RX_LOW_TIMER_IDX_8812F(x) \ 20585 (((x) >> BIT_SHIFT_RX_LOW_TIMER_IDX_8812F) & \ 20586 BIT_MASK_RX_LOW_TIMER_IDX_8812F) 20587 #define BIT_SET_RX_LOW_TIMER_IDX_8812F(x, v) \ 20588 (BIT_CLEAR_RX_LOW_TIMER_IDX_8812F(x) | BIT_RX_LOW_TIMER_IDX_8812F(v)) 20589 20590 #define BIT_SHIFT_OBFF_INT_TIMER_IDX_8812F 0 20591 #define BIT_MASK_OBFF_INT_TIMER_IDX_8812F 0x7 20592 #define BIT_OBFF_INT_TIMER_IDX_8812F(x) \ 20593 (((x) & BIT_MASK_OBFF_INT_TIMER_IDX_8812F) \ 20594 << BIT_SHIFT_OBFF_INT_TIMER_IDX_8812F) 20595 #define BITS_OBFF_INT_TIMER_IDX_8812F \ 20596 (BIT_MASK_OBFF_INT_TIMER_IDX_8812F \ 20597 << BIT_SHIFT_OBFF_INT_TIMER_IDX_8812F) 20598 #define BIT_CLEAR_OBFF_INT_TIMER_IDX_8812F(x) \ 20599 ((x) & (~BITS_OBFF_INT_TIMER_IDX_8812F)) 20600 #define BIT_GET_OBFF_INT_TIMER_IDX_8812F(x) \ 20601 (((x) >> BIT_SHIFT_OBFF_INT_TIMER_IDX_8812F) & \ 20602 BIT_MASK_OBFF_INT_TIMER_IDX_8812F) 20603 #define BIT_SET_OBFF_INT_TIMER_IDX_8812F(x, v) \ 20604 (BIT_CLEAR_OBFF_INT_TIMER_IDX_8812F(x) | \ 20605 BIT_OBFF_INT_TIMER_IDX_8812F(v)) 20606 20607 /* 2 REG_LTR_CTRL_BASIC_8812F */ 20608 #define BIT_LTR_EN_V1_8812F BIT(31) 20609 #define BIT_LTR_HW_EN_V1_8812F BIT(30) 20610 #define BIT_LRT_ACT_CTS_EN_8812F BIT(29) 20611 #define BIT_LTR_ACT_RXPKT_EN_8812F BIT(28) 20612 #define BIT_LTR_ACT_RXDMA_EN_8812F BIT(27) 20613 #define BIT_LTR_IDLE_NO_SNOOP_8812F BIT(26) 20614 #define BIT_SPDUP_MGTPKT_8812F BIT(25) 20615 #define BIT_RX_AGG_EN_8812F BIT(24) 20616 #define BIT_APP_LTR_ACT_8812F BIT(23) 20617 #define BIT_APP_LTR_IDLE_8812F BIT(22) 20618 20619 #define BIT_SHIFT_HIGH_RATE_TRIG_SEL_8812F 20 20620 #define BIT_MASK_HIGH_RATE_TRIG_SEL_8812F 0x3 20621 #define BIT_HIGH_RATE_TRIG_SEL_8812F(x) \ 20622 (((x) & BIT_MASK_HIGH_RATE_TRIG_SEL_8812F) \ 20623 << BIT_SHIFT_HIGH_RATE_TRIG_SEL_8812F) 20624 #define BITS_HIGH_RATE_TRIG_SEL_8812F \ 20625 (BIT_MASK_HIGH_RATE_TRIG_SEL_8812F \ 20626 << BIT_SHIFT_HIGH_RATE_TRIG_SEL_8812F) 20627 #define BIT_CLEAR_HIGH_RATE_TRIG_SEL_8812F(x) \ 20628 ((x) & (~BITS_HIGH_RATE_TRIG_SEL_8812F)) 20629 #define BIT_GET_HIGH_RATE_TRIG_SEL_8812F(x) \ 20630 (((x) >> BIT_SHIFT_HIGH_RATE_TRIG_SEL_8812F) & \ 20631 BIT_MASK_HIGH_RATE_TRIG_SEL_8812F) 20632 #define BIT_SET_HIGH_RATE_TRIG_SEL_8812F(x, v) \ 20633 (BIT_CLEAR_HIGH_RATE_TRIG_SEL_8812F(x) | \ 20634 BIT_HIGH_RATE_TRIG_SEL_8812F(v)) 20635 20636 #define BIT_SHIFT_MED_RATE_TRIG_SEL_8812F 18 20637 #define BIT_MASK_MED_RATE_TRIG_SEL_8812F 0x3 20638 #define BIT_MED_RATE_TRIG_SEL_8812F(x) \ 20639 (((x) & BIT_MASK_MED_RATE_TRIG_SEL_8812F) \ 20640 << BIT_SHIFT_MED_RATE_TRIG_SEL_8812F) 20641 #define BITS_MED_RATE_TRIG_SEL_8812F \ 20642 (BIT_MASK_MED_RATE_TRIG_SEL_8812F << BIT_SHIFT_MED_RATE_TRIG_SEL_8812F) 20643 #define BIT_CLEAR_MED_RATE_TRIG_SEL_8812F(x) \ 20644 ((x) & (~BITS_MED_RATE_TRIG_SEL_8812F)) 20645 #define BIT_GET_MED_RATE_TRIG_SEL_8812F(x) \ 20646 (((x) >> BIT_SHIFT_MED_RATE_TRIG_SEL_8812F) & \ 20647 BIT_MASK_MED_RATE_TRIG_SEL_8812F) 20648 #define BIT_SET_MED_RATE_TRIG_SEL_8812F(x, v) \ 20649 (BIT_CLEAR_MED_RATE_TRIG_SEL_8812F(x) | BIT_MED_RATE_TRIG_SEL_8812F(v)) 20650 20651 #define BIT_SHIFT_LOW_RATE_TRIG_SEL_8812F 16 20652 #define BIT_MASK_LOW_RATE_TRIG_SEL_8812F 0x3 20653 #define BIT_LOW_RATE_TRIG_SEL_8812F(x) \ 20654 (((x) & BIT_MASK_LOW_RATE_TRIG_SEL_8812F) \ 20655 << BIT_SHIFT_LOW_RATE_TRIG_SEL_8812F) 20656 #define BITS_LOW_RATE_TRIG_SEL_8812F \ 20657 (BIT_MASK_LOW_RATE_TRIG_SEL_8812F << BIT_SHIFT_LOW_RATE_TRIG_SEL_8812F) 20658 #define BIT_CLEAR_LOW_RATE_TRIG_SEL_8812F(x) \ 20659 ((x) & (~BITS_LOW_RATE_TRIG_SEL_8812F)) 20660 #define BIT_GET_LOW_RATE_TRIG_SEL_8812F(x) \ 20661 (((x) >> BIT_SHIFT_LOW_RATE_TRIG_SEL_8812F) & \ 20662 BIT_MASK_LOW_RATE_TRIG_SEL_8812F) 20663 #define BIT_SET_LOW_RATE_TRIG_SEL_8812F(x, v) \ 20664 (BIT_CLEAR_LOW_RATE_TRIG_SEL_8812F(x) | BIT_LOW_RATE_TRIG_SEL_8812F(v)) 20665 20666 #define BIT_SHIFT_HIGH_RATE_BD_IDX_8812F 8 20667 #define BIT_MASK_HIGH_RATE_BD_IDX_8812F 0x7f 20668 #define BIT_HIGH_RATE_BD_IDX_8812F(x) \ 20669 (((x) & BIT_MASK_HIGH_RATE_BD_IDX_8812F) \ 20670 << BIT_SHIFT_HIGH_RATE_BD_IDX_8812F) 20671 #define BITS_HIGH_RATE_BD_IDX_8812F \ 20672 (BIT_MASK_HIGH_RATE_BD_IDX_8812F << BIT_SHIFT_HIGH_RATE_BD_IDX_8812F) 20673 #define BIT_CLEAR_HIGH_RATE_BD_IDX_8812F(x) \ 20674 ((x) & (~BITS_HIGH_RATE_BD_IDX_8812F)) 20675 #define BIT_GET_HIGH_RATE_BD_IDX_8812F(x) \ 20676 (((x) >> BIT_SHIFT_HIGH_RATE_BD_IDX_8812F) & \ 20677 BIT_MASK_HIGH_RATE_BD_IDX_8812F) 20678 #define BIT_SET_HIGH_RATE_BD_IDX_8812F(x, v) \ 20679 (BIT_CLEAR_HIGH_RATE_BD_IDX_8812F(x) | BIT_HIGH_RATE_BD_IDX_8812F(v)) 20680 20681 #define BIT_SHIFT_LOW_RATE_BD_IDX_8812F 0 20682 #define BIT_MASK_LOW_RATE_BD_IDX_8812F 0x7f 20683 #define BIT_LOW_RATE_BD_IDX_8812F(x) \ 20684 (((x) & BIT_MASK_LOW_RATE_BD_IDX_8812F) \ 20685 << BIT_SHIFT_LOW_RATE_BD_IDX_8812F) 20686 #define BITS_LOW_RATE_BD_IDX_8812F \ 20687 (BIT_MASK_LOW_RATE_BD_IDX_8812F << BIT_SHIFT_LOW_RATE_BD_IDX_8812F) 20688 #define BIT_CLEAR_LOW_RATE_BD_IDX_8812F(x) ((x) & (~BITS_LOW_RATE_BD_IDX_8812F)) 20689 #define BIT_GET_LOW_RATE_BD_IDX_8812F(x) \ 20690 (((x) >> BIT_SHIFT_LOW_RATE_BD_IDX_8812F) & \ 20691 BIT_MASK_LOW_RATE_BD_IDX_8812F) 20692 #define BIT_SET_LOW_RATE_BD_IDX_8812F(x, v) \ 20693 (BIT_CLEAR_LOW_RATE_BD_IDX_8812F(x) | BIT_LOW_RATE_BD_IDX_8812F(v)) 20694 20695 /* 2 REG_LTR_CTRL2_TIMER_THRESHOLD_8812F */ 20696 20697 #define BIT_SHIFT_RX_EMPTY_TIMER_IDX_8812F 24 20698 #define BIT_MASK_RX_EMPTY_TIMER_IDX_8812F 0x7 20699 #define BIT_RX_EMPTY_TIMER_IDX_8812F(x) \ 20700 (((x) & BIT_MASK_RX_EMPTY_TIMER_IDX_8812F) \ 20701 << BIT_SHIFT_RX_EMPTY_TIMER_IDX_8812F) 20702 #define BITS_RX_EMPTY_TIMER_IDX_8812F \ 20703 (BIT_MASK_RX_EMPTY_TIMER_IDX_8812F \ 20704 << BIT_SHIFT_RX_EMPTY_TIMER_IDX_8812F) 20705 #define BIT_CLEAR_RX_EMPTY_TIMER_IDX_8812F(x) \ 20706 ((x) & (~BITS_RX_EMPTY_TIMER_IDX_8812F)) 20707 #define BIT_GET_RX_EMPTY_TIMER_IDX_8812F(x) \ 20708 (((x) >> BIT_SHIFT_RX_EMPTY_TIMER_IDX_8812F) & \ 20709 BIT_MASK_RX_EMPTY_TIMER_IDX_8812F) 20710 #define BIT_SET_RX_EMPTY_TIMER_IDX_8812F(x, v) \ 20711 (BIT_CLEAR_RX_EMPTY_TIMER_IDX_8812F(x) | \ 20712 BIT_RX_EMPTY_TIMER_IDX_8812F(v)) 20713 20714 #define BIT_SHIFT_RX_AFULL_TH_IDX_8812F 20 20715 #define BIT_MASK_RX_AFULL_TH_IDX_8812F 0x7 20716 #define BIT_RX_AFULL_TH_IDX_8812F(x) \ 20717 (((x) & BIT_MASK_RX_AFULL_TH_IDX_8812F) \ 20718 << BIT_SHIFT_RX_AFULL_TH_IDX_8812F) 20719 #define BITS_RX_AFULL_TH_IDX_8812F \ 20720 (BIT_MASK_RX_AFULL_TH_IDX_8812F << BIT_SHIFT_RX_AFULL_TH_IDX_8812F) 20721 #define BIT_CLEAR_RX_AFULL_TH_IDX_8812F(x) ((x) & (~BITS_RX_AFULL_TH_IDX_8812F)) 20722 #define BIT_GET_RX_AFULL_TH_IDX_8812F(x) \ 20723 (((x) >> BIT_SHIFT_RX_AFULL_TH_IDX_8812F) & \ 20724 BIT_MASK_RX_AFULL_TH_IDX_8812F) 20725 #define BIT_SET_RX_AFULL_TH_IDX_8812F(x, v) \ 20726 (BIT_CLEAR_RX_AFULL_TH_IDX_8812F(x) | BIT_RX_AFULL_TH_IDX_8812F(v)) 20727 20728 #define BIT_SHIFT_RX_HIGH_TH_IDX_8812F 16 20729 #define BIT_MASK_RX_HIGH_TH_IDX_8812F 0x7 20730 #define BIT_RX_HIGH_TH_IDX_8812F(x) \ 20731 (((x) & BIT_MASK_RX_HIGH_TH_IDX_8812F) \ 20732 << BIT_SHIFT_RX_HIGH_TH_IDX_8812F) 20733 #define BITS_RX_HIGH_TH_IDX_8812F \ 20734 (BIT_MASK_RX_HIGH_TH_IDX_8812F << BIT_SHIFT_RX_HIGH_TH_IDX_8812F) 20735 #define BIT_CLEAR_RX_HIGH_TH_IDX_8812F(x) ((x) & (~BITS_RX_HIGH_TH_IDX_8812F)) 20736 #define BIT_GET_RX_HIGH_TH_IDX_8812F(x) \ 20737 (((x) >> BIT_SHIFT_RX_HIGH_TH_IDX_8812F) & \ 20738 BIT_MASK_RX_HIGH_TH_IDX_8812F) 20739 #define BIT_SET_RX_HIGH_TH_IDX_8812F(x, v) \ 20740 (BIT_CLEAR_RX_HIGH_TH_IDX_8812F(x) | BIT_RX_HIGH_TH_IDX_8812F(v)) 20741 20742 #define BIT_SHIFT_RX_MED_TH_IDX_8812F 12 20743 #define BIT_MASK_RX_MED_TH_IDX_8812F 0x7 20744 #define BIT_RX_MED_TH_IDX_8812F(x) \ 20745 (((x) & BIT_MASK_RX_MED_TH_IDX_8812F) << BIT_SHIFT_RX_MED_TH_IDX_8812F) 20746 #define BITS_RX_MED_TH_IDX_8812F \ 20747 (BIT_MASK_RX_MED_TH_IDX_8812F << BIT_SHIFT_RX_MED_TH_IDX_8812F) 20748 #define BIT_CLEAR_RX_MED_TH_IDX_8812F(x) ((x) & (~BITS_RX_MED_TH_IDX_8812F)) 20749 #define BIT_GET_RX_MED_TH_IDX_8812F(x) \ 20750 (((x) >> BIT_SHIFT_RX_MED_TH_IDX_8812F) & BIT_MASK_RX_MED_TH_IDX_8812F) 20751 #define BIT_SET_RX_MED_TH_IDX_8812F(x, v) \ 20752 (BIT_CLEAR_RX_MED_TH_IDX_8812F(x) | BIT_RX_MED_TH_IDX_8812F(v)) 20753 20754 #define BIT_SHIFT_RX_LOW_TH_IDX_8812F 8 20755 #define BIT_MASK_RX_LOW_TH_IDX_8812F 0x7 20756 #define BIT_RX_LOW_TH_IDX_8812F(x) \ 20757 (((x) & BIT_MASK_RX_LOW_TH_IDX_8812F) << BIT_SHIFT_RX_LOW_TH_IDX_8812F) 20758 #define BITS_RX_LOW_TH_IDX_8812F \ 20759 (BIT_MASK_RX_LOW_TH_IDX_8812F << BIT_SHIFT_RX_LOW_TH_IDX_8812F) 20760 #define BIT_CLEAR_RX_LOW_TH_IDX_8812F(x) ((x) & (~BITS_RX_LOW_TH_IDX_8812F)) 20761 #define BIT_GET_RX_LOW_TH_IDX_8812F(x) \ 20762 (((x) >> BIT_SHIFT_RX_LOW_TH_IDX_8812F) & BIT_MASK_RX_LOW_TH_IDX_8812F) 20763 #define BIT_SET_RX_LOW_TH_IDX_8812F(x, v) \ 20764 (BIT_CLEAR_RX_LOW_TH_IDX_8812F(x) | BIT_RX_LOW_TH_IDX_8812F(v)) 20765 20766 #define BIT_SHIFT_LTR_SPACE_IDX_8812F 4 20767 #define BIT_MASK_LTR_SPACE_IDX_8812F 0x3 20768 #define BIT_LTR_SPACE_IDX_8812F(x) \ 20769 (((x) & BIT_MASK_LTR_SPACE_IDX_8812F) << BIT_SHIFT_LTR_SPACE_IDX_8812F) 20770 #define BITS_LTR_SPACE_IDX_8812F \ 20771 (BIT_MASK_LTR_SPACE_IDX_8812F << BIT_SHIFT_LTR_SPACE_IDX_8812F) 20772 #define BIT_CLEAR_LTR_SPACE_IDX_8812F(x) ((x) & (~BITS_LTR_SPACE_IDX_8812F)) 20773 #define BIT_GET_LTR_SPACE_IDX_8812F(x) \ 20774 (((x) >> BIT_SHIFT_LTR_SPACE_IDX_8812F) & BIT_MASK_LTR_SPACE_IDX_8812F) 20775 #define BIT_SET_LTR_SPACE_IDX_8812F(x, v) \ 20776 (BIT_CLEAR_LTR_SPACE_IDX_8812F(x) | BIT_LTR_SPACE_IDX_8812F(v)) 20777 20778 #define BIT_SHIFT_LTR_IDLE_TIMER_IDX_8812F 0 20779 #define BIT_MASK_LTR_IDLE_TIMER_IDX_8812F 0x7 20780 #define BIT_LTR_IDLE_TIMER_IDX_8812F(x) \ 20781 (((x) & BIT_MASK_LTR_IDLE_TIMER_IDX_8812F) \ 20782 << BIT_SHIFT_LTR_IDLE_TIMER_IDX_8812F) 20783 #define BITS_LTR_IDLE_TIMER_IDX_8812F \ 20784 (BIT_MASK_LTR_IDLE_TIMER_IDX_8812F \ 20785 << BIT_SHIFT_LTR_IDLE_TIMER_IDX_8812F) 20786 #define BIT_CLEAR_LTR_IDLE_TIMER_IDX_8812F(x) \ 20787 ((x) & (~BITS_LTR_IDLE_TIMER_IDX_8812F)) 20788 #define BIT_GET_LTR_IDLE_TIMER_IDX_8812F(x) \ 20789 (((x) >> BIT_SHIFT_LTR_IDLE_TIMER_IDX_8812F) & \ 20790 BIT_MASK_LTR_IDLE_TIMER_IDX_8812F) 20791 #define BIT_SET_LTR_IDLE_TIMER_IDX_8812F(x, v) \ 20792 (BIT_CLEAR_LTR_IDLE_TIMER_IDX_8812F(x) | \ 20793 BIT_LTR_IDLE_TIMER_IDX_8812F(v)) 20794 20795 /* 2 REG_LTR_IDLE_LATENCY_V1_8812F */ 20796 20797 #define BIT_SHIFT_LTR_IDLE_L_8812F 0 20798 #define BIT_MASK_LTR_IDLE_L_8812F 0xffffffffL 20799 #define BIT_LTR_IDLE_L_8812F(x) \ 20800 (((x) & BIT_MASK_LTR_IDLE_L_8812F) << BIT_SHIFT_LTR_IDLE_L_8812F) 20801 #define BITS_LTR_IDLE_L_8812F \ 20802 (BIT_MASK_LTR_IDLE_L_8812F << BIT_SHIFT_LTR_IDLE_L_8812F) 20803 #define BIT_CLEAR_LTR_IDLE_L_8812F(x) ((x) & (~BITS_LTR_IDLE_L_8812F)) 20804 #define BIT_GET_LTR_IDLE_L_8812F(x) \ 20805 (((x) >> BIT_SHIFT_LTR_IDLE_L_8812F) & BIT_MASK_LTR_IDLE_L_8812F) 20806 #define BIT_SET_LTR_IDLE_L_8812F(x, v) \ 20807 (BIT_CLEAR_LTR_IDLE_L_8812F(x) | BIT_LTR_IDLE_L_8812F(v)) 20808 20809 /* 2 REG_LTR_ACTIVE_LATENCY_V1_8812F */ 20810 20811 #define BIT_SHIFT_LTR_ACT_L_8812F 0 20812 #define BIT_MASK_LTR_ACT_L_8812F 0xffffffffL 20813 #define BIT_LTR_ACT_L_8812F(x) \ 20814 (((x) & BIT_MASK_LTR_ACT_L_8812F) << BIT_SHIFT_LTR_ACT_L_8812F) 20815 #define BITS_LTR_ACT_L_8812F \ 20816 (BIT_MASK_LTR_ACT_L_8812F << BIT_SHIFT_LTR_ACT_L_8812F) 20817 #define BIT_CLEAR_LTR_ACT_L_8812F(x) ((x) & (~BITS_LTR_ACT_L_8812F)) 20818 #define BIT_GET_LTR_ACT_L_8812F(x) \ 20819 (((x) >> BIT_SHIFT_LTR_ACT_L_8812F) & BIT_MASK_LTR_ACT_L_8812F) 20820 #define BIT_SET_LTR_ACT_L_8812F(x, v) \ 20821 (BIT_CLEAR_LTR_ACT_L_8812F(x) | BIT_LTR_ACT_L_8812F(v)) 20822 20823 /* 2 REG_ANTENNA_TRAINING_CONTROL_REGISTER_8812F */ 20824 20825 #define BIT_SHIFT_TRAIN_STA_ADDR_0_8812F 0 20826 #define BIT_MASK_TRAIN_STA_ADDR_0_8812F 0xffffffffL 20827 #define BIT_TRAIN_STA_ADDR_0_8812F(x) \ 20828 (((x) & BIT_MASK_TRAIN_STA_ADDR_0_8812F) \ 20829 << BIT_SHIFT_TRAIN_STA_ADDR_0_8812F) 20830 #define BITS_TRAIN_STA_ADDR_0_8812F \ 20831 (BIT_MASK_TRAIN_STA_ADDR_0_8812F << BIT_SHIFT_TRAIN_STA_ADDR_0_8812F) 20832 #define BIT_CLEAR_TRAIN_STA_ADDR_0_8812F(x) \ 20833 ((x) & (~BITS_TRAIN_STA_ADDR_0_8812F)) 20834 #define BIT_GET_TRAIN_STA_ADDR_0_8812F(x) \ 20835 (((x) >> BIT_SHIFT_TRAIN_STA_ADDR_0_8812F) & \ 20836 BIT_MASK_TRAIN_STA_ADDR_0_8812F) 20837 #define BIT_SET_TRAIN_STA_ADDR_0_8812F(x, v) \ 20838 (BIT_CLEAR_TRAIN_STA_ADDR_0_8812F(x) | BIT_TRAIN_STA_ADDR_0_8812F(v)) 20839 20840 /* 2 REG_ANTENNA_TRAINING_CONTROL_REGISTER_1_8812F */ 20841 #define BIT_ANTTRN_SWITCH_8812F BIT(19) 20842 #define BIT_APPEND_MACID_IN_RESP_EN_1_8812F BIT(18) 20843 #define BIT_ADDR2_MATCH_EN_1_8812F BIT(17) 20844 #define BIT_ANTTRN_EN_1_8812F BIT(16) 20845 20846 #define BIT_SHIFT_TRAIN_STA_ADDR_1_8812F 0 20847 #define BIT_MASK_TRAIN_STA_ADDR_1_8812F 0xffff 20848 #define BIT_TRAIN_STA_ADDR_1_8812F(x) \ 20849 (((x) & BIT_MASK_TRAIN_STA_ADDR_1_8812F) \ 20850 << BIT_SHIFT_TRAIN_STA_ADDR_1_8812F) 20851 #define BITS_TRAIN_STA_ADDR_1_8812F \ 20852 (BIT_MASK_TRAIN_STA_ADDR_1_8812F << BIT_SHIFT_TRAIN_STA_ADDR_1_8812F) 20853 #define BIT_CLEAR_TRAIN_STA_ADDR_1_8812F(x) \ 20854 ((x) & (~BITS_TRAIN_STA_ADDR_1_8812F)) 20855 #define BIT_GET_TRAIN_STA_ADDR_1_8812F(x) \ 20856 (((x) >> BIT_SHIFT_TRAIN_STA_ADDR_1_8812F) & \ 20857 BIT_MASK_TRAIN_STA_ADDR_1_8812F) 20858 #define BIT_SET_TRAIN_STA_ADDR_1_8812F(x, v) \ 20859 (BIT_CLEAR_TRAIN_STA_ADDR_1_8812F(x) | BIT_TRAIN_STA_ADDR_1_8812F(v)) 20860 20861 /* 2 REG_WMAC_PKTCNT_RWD_8812F */ 20862 20863 #define BIT_SHIFT_PKTCNT_BSSIDMAP_8812F 4 20864 #define BIT_MASK_PKTCNT_BSSIDMAP_8812F 0xf 20865 #define BIT_PKTCNT_BSSIDMAP_8812F(x) \ 20866 (((x) & BIT_MASK_PKTCNT_BSSIDMAP_8812F) \ 20867 << BIT_SHIFT_PKTCNT_BSSIDMAP_8812F) 20868 #define BITS_PKTCNT_BSSIDMAP_8812F \ 20869 (BIT_MASK_PKTCNT_BSSIDMAP_8812F << BIT_SHIFT_PKTCNT_BSSIDMAP_8812F) 20870 #define BIT_CLEAR_PKTCNT_BSSIDMAP_8812F(x) ((x) & (~BITS_PKTCNT_BSSIDMAP_8812F)) 20871 #define BIT_GET_PKTCNT_BSSIDMAP_8812F(x) \ 20872 (((x) >> BIT_SHIFT_PKTCNT_BSSIDMAP_8812F) & \ 20873 BIT_MASK_PKTCNT_BSSIDMAP_8812F) 20874 #define BIT_SET_PKTCNT_BSSIDMAP_8812F(x, v) \ 20875 (BIT_CLEAR_PKTCNT_BSSIDMAP_8812F(x) | BIT_PKTCNT_BSSIDMAP_8812F(v)) 20876 20877 #define BIT_PKTCNT_CNTRST_8812F BIT(1) 20878 #define BIT_PKTCNT_CNTEN_8812F BIT(0) 20879 20880 /* 2 REG_WMAC_PKTCNT_CTRL_8812F */ 20881 #define BIT_WMAC_PKTCNT_TRST_8812F BIT(9) 20882 #define BIT_WMAC_PKTCNT_FEN_8812F BIT(8) 20883 20884 #define BIT_SHIFT_WMAC_PKTCNT_CFGAD_8812F 0 20885 #define BIT_MASK_WMAC_PKTCNT_CFGAD_8812F 0xff 20886 #define BIT_WMAC_PKTCNT_CFGAD_8812F(x) \ 20887 (((x) & BIT_MASK_WMAC_PKTCNT_CFGAD_8812F) \ 20888 << BIT_SHIFT_WMAC_PKTCNT_CFGAD_8812F) 20889 #define BITS_WMAC_PKTCNT_CFGAD_8812F \ 20890 (BIT_MASK_WMAC_PKTCNT_CFGAD_8812F << BIT_SHIFT_WMAC_PKTCNT_CFGAD_8812F) 20891 #define BIT_CLEAR_WMAC_PKTCNT_CFGAD_8812F(x) \ 20892 ((x) & (~BITS_WMAC_PKTCNT_CFGAD_8812F)) 20893 #define BIT_GET_WMAC_PKTCNT_CFGAD_8812F(x) \ 20894 (((x) >> BIT_SHIFT_WMAC_PKTCNT_CFGAD_8812F) & \ 20895 BIT_MASK_WMAC_PKTCNT_CFGAD_8812F) 20896 #define BIT_SET_WMAC_PKTCNT_CFGAD_8812F(x, v) \ 20897 (BIT_CLEAR_WMAC_PKTCNT_CFGAD_8812F(x) | BIT_WMAC_PKTCNT_CFGAD_8812F(v)) 20898 20899 /* 2 REG_IQ_DUMP_8812F */ 20900 20901 #define BIT_SHIFT_DUMP_OK_ADDR_8812F 16 20902 #define BIT_MASK_DUMP_OK_ADDR_8812F 0xffff 20903 #define BIT_DUMP_OK_ADDR_8812F(x) \ 20904 (((x) & BIT_MASK_DUMP_OK_ADDR_8812F) << BIT_SHIFT_DUMP_OK_ADDR_8812F) 20905 #define BITS_DUMP_OK_ADDR_8812F \ 20906 (BIT_MASK_DUMP_OK_ADDR_8812F << BIT_SHIFT_DUMP_OK_ADDR_8812F) 20907 #define BIT_CLEAR_DUMP_OK_ADDR_8812F(x) ((x) & (~BITS_DUMP_OK_ADDR_8812F)) 20908 #define BIT_GET_DUMP_OK_ADDR_8812F(x) \ 20909 (((x) >> BIT_SHIFT_DUMP_OK_ADDR_8812F) & BIT_MASK_DUMP_OK_ADDR_8812F) 20910 #define BIT_SET_DUMP_OK_ADDR_8812F(x, v) \ 20911 (BIT_CLEAR_DUMP_OK_ADDR_8812F(x) | BIT_DUMP_OK_ADDR_8812F(v)) 20912 20913 #define BIT_MACDBG_TRIG_IQDUMP_8812F BIT(15) 20914 20915 #define BIT_SHIFT_R_TRIG_TIME_SEL_8812F 8 20916 #define BIT_MASK_R_TRIG_TIME_SEL_8812F 0x7f 20917 #define BIT_R_TRIG_TIME_SEL_8812F(x) \ 20918 (((x) & BIT_MASK_R_TRIG_TIME_SEL_8812F) \ 20919 << BIT_SHIFT_R_TRIG_TIME_SEL_8812F) 20920 #define BITS_R_TRIG_TIME_SEL_8812F \ 20921 (BIT_MASK_R_TRIG_TIME_SEL_8812F << BIT_SHIFT_R_TRIG_TIME_SEL_8812F) 20922 #define BIT_CLEAR_R_TRIG_TIME_SEL_8812F(x) ((x) & (~BITS_R_TRIG_TIME_SEL_8812F)) 20923 #define BIT_GET_R_TRIG_TIME_SEL_8812F(x) \ 20924 (((x) >> BIT_SHIFT_R_TRIG_TIME_SEL_8812F) & \ 20925 BIT_MASK_R_TRIG_TIME_SEL_8812F) 20926 #define BIT_SET_R_TRIG_TIME_SEL_8812F(x, v) \ 20927 (BIT_CLEAR_R_TRIG_TIME_SEL_8812F(x) | BIT_R_TRIG_TIME_SEL_8812F(v)) 20928 20929 #define BIT_SHIFT_R_MAC_TRIG_SEL_8812F 6 20930 #define BIT_MASK_R_MAC_TRIG_SEL_8812F 0x3 20931 #define BIT_R_MAC_TRIG_SEL_8812F(x) \ 20932 (((x) & BIT_MASK_R_MAC_TRIG_SEL_8812F) \ 20933 << BIT_SHIFT_R_MAC_TRIG_SEL_8812F) 20934 #define BITS_R_MAC_TRIG_SEL_8812F \ 20935 (BIT_MASK_R_MAC_TRIG_SEL_8812F << BIT_SHIFT_R_MAC_TRIG_SEL_8812F) 20936 #define BIT_CLEAR_R_MAC_TRIG_SEL_8812F(x) ((x) & (~BITS_R_MAC_TRIG_SEL_8812F)) 20937 #define BIT_GET_R_MAC_TRIG_SEL_8812F(x) \ 20938 (((x) >> BIT_SHIFT_R_MAC_TRIG_SEL_8812F) & \ 20939 BIT_MASK_R_MAC_TRIG_SEL_8812F) 20940 #define BIT_SET_R_MAC_TRIG_SEL_8812F(x, v) \ 20941 (BIT_CLEAR_R_MAC_TRIG_SEL_8812F(x) | BIT_R_MAC_TRIG_SEL_8812F(v)) 20942 20943 #define BIT_MAC_TRIG_REG_8812F BIT(5) 20944 20945 #define BIT_SHIFT_R_LEVEL_PULSE_SEL_8812F 3 20946 #define BIT_MASK_R_LEVEL_PULSE_SEL_8812F 0x3 20947 #define BIT_R_LEVEL_PULSE_SEL_8812F(x) \ 20948 (((x) & BIT_MASK_R_LEVEL_PULSE_SEL_8812F) \ 20949 << BIT_SHIFT_R_LEVEL_PULSE_SEL_8812F) 20950 #define BITS_R_LEVEL_PULSE_SEL_8812F \ 20951 (BIT_MASK_R_LEVEL_PULSE_SEL_8812F << BIT_SHIFT_R_LEVEL_PULSE_SEL_8812F) 20952 #define BIT_CLEAR_R_LEVEL_PULSE_SEL_8812F(x) \ 20953 ((x) & (~BITS_R_LEVEL_PULSE_SEL_8812F)) 20954 #define BIT_GET_R_LEVEL_PULSE_SEL_8812F(x) \ 20955 (((x) >> BIT_SHIFT_R_LEVEL_PULSE_SEL_8812F) & \ 20956 BIT_MASK_R_LEVEL_PULSE_SEL_8812F) 20957 #define BIT_SET_R_LEVEL_PULSE_SEL_8812F(x, v) \ 20958 (BIT_CLEAR_R_LEVEL_PULSE_SEL_8812F(x) | BIT_R_LEVEL_PULSE_SEL_8812F(v)) 20959 20960 #define BIT_EN_LA_MAC_8812F BIT(2) 20961 #define BIT_R_EN_IQDUMP_8812F BIT(1) 20962 #define BIT_R_IQDATA_DUMP_8812F BIT(0) 20963 20964 /* 2 REG_IQ_DUMP_1_8812F */ 20965 20966 #define BIT_SHIFT_R_WMAC_MASK_LA_MAC_1_8812F 0 20967 #define BIT_MASK_R_WMAC_MASK_LA_MAC_1_8812F 0xffffffffL 20968 #define BIT_R_WMAC_MASK_LA_MAC_1_8812F(x) \ 20969 (((x) & BIT_MASK_R_WMAC_MASK_LA_MAC_1_8812F) \ 20970 << BIT_SHIFT_R_WMAC_MASK_LA_MAC_1_8812F) 20971 #define BITS_R_WMAC_MASK_LA_MAC_1_8812F \ 20972 (BIT_MASK_R_WMAC_MASK_LA_MAC_1_8812F \ 20973 << BIT_SHIFT_R_WMAC_MASK_LA_MAC_1_8812F) 20974 #define BIT_CLEAR_R_WMAC_MASK_LA_MAC_1_8812F(x) \ 20975 ((x) & (~BITS_R_WMAC_MASK_LA_MAC_1_8812F)) 20976 #define BIT_GET_R_WMAC_MASK_LA_MAC_1_8812F(x) \ 20977 (((x) >> BIT_SHIFT_R_WMAC_MASK_LA_MAC_1_8812F) & \ 20978 BIT_MASK_R_WMAC_MASK_LA_MAC_1_8812F) 20979 #define BIT_SET_R_WMAC_MASK_LA_MAC_1_8812F(x, v) \ 20980 (BIT_CLEAR_R_WMAC_MASK_LA_MAC_1_8812F(x) | \ 20981 BIT_R_WMAC_MASK_LA_MAC_1_8812F(v)) 20982 20983 /* 2 REG_IQ_DUMP_2_8812F */ 20984 20985 #define BIT_SHIFT_R_WMAC_MATCH_REF_MAC_2_8812F 0 20986 #define BIT_MASK_R_WMAC_MATCH_REF_MAC_2_8812F 0xffffffffL 20987 #define BIT_R_WMAC_MATCH_REF_MAC_2_8812F(x) \ 20988 (((x) & BIT_MASK_R_WMAC_MATCH_REF_MAC_2_8812F) \ 20989 << BIT_SHIFT_R_WMAC_MATCH_REF_MAC_2_8812F) 20990 #define BITS_R_WMAC_MATCH_REF_MAC_2_8812F \ 20991 (BIT_MASK_R_WMAC_MATCH_REF_MAC_2_8812F \ 20992 << BIT_SHIFT_R_WMAC_MATCH_REF_MAC_2_8812F) 20993 #define BIT_CLEAR_R_WMAC_MATCH_REF_MAC_2_8812F(x) \ 20994 ((x) & (~BITS_R_WMAC_MATCH_REF_MAC_2_8812F)) 20995 #define BIT_GET_R_WMAC_MATCH_REF_MAC_2_8812F(x) \ 20996 (((x) >> BIT_SHIFT_R_WMAC_MATCH_REF_MAC_2_8812F) & \ 20997 BIT_MASK_R_WMAC_MATCH_REF_MAC_2_8812F) 20998 #define BIT_SET_R_WMAC_MATCH_REF_MAC_2_8812F(x, v) \ 20999 (BIT_CLEAR_R_WMAC_MATCH_REF_MAC_2_8812F(x) | \ 21000 BIT_R_WMAC_MATCH_REF_MAC_2_8812F(v)) 21001 21002 /* 2 REG_WMAC_FTM_CTL_8812F */ 21003 #define BIT_RXFTM_TXACK_SC_8812F BIT(6) 21004 #define BIT_RXFTM_TXACK_BW_8812F BIT(5) 21005 #define BIT_RXFTM_EN_8812F BIT(3) 21006 #define BIT_RXFTMREQ_BYDRV_8812F BIT(2) 21007 #define BIT_RXFTMREQ_EN_8812F BIT(1) 21008 #define BIT_FTM_EN_8812F BIT(0) 21009 21010 /* 2 REG_WMAC_IQ_MDPK_FUNC_8812F */ 21011 21012 /* 2 REG_WMAC_OPTION_FUNCTION_8812F */ 21013 21014 #define BIT_SHIFT_R_OFDM_LEN_V1_8812F 16 21015 #define BIT_MASK_R_OFDM_LEN_V1_8812F 0xffff 21016 #define BIT_R_OFDM_LEN_V1_8812F(x) \ 21017 (((x) & BIT_MASK_R_OFDM_LEN_V1_8812F) << BIT_SHIFT_R_OFDM_LEN_V1_8812F) 21018 #define BITS_R_OFDM_LEN_V1_8812F \ 21019 (BIT_MASK_R_OFDM_LEN_V1_8812F << BIT_SHIFT_R_OFDM_LEN_V1_8812F) 21020 #define BIT_CLEAR_R_OFDM_LEN_V1_8812F(x) ((x) & (~BITS_R_OFDM_LEN_V1_8812F)) 21021 #define BIT_GET_R_OFDM_LEN_V1_8812F(x) \ 21022 (((x) >> BIT_SHIFT_R_OFDM_LEN_V1_8812F) & BIT_MASK_R_OFDM_LEN_V1_8812F) 21023 #define BIT_SET_R_OFDM_LEN_V1_8812F(x, v) \ 21024 (BIT_CLEAR_R_OFDM_LEN_V1_8812F(x) | BIT_R_OFDM_LEN_V1_8812F(v)) 21025 21026 #define BIT_SHIFT_R_CCK_LEN_8812F 0 21027 #define BIT_MASK_R_CCK_LEN_8812F 0xffff 21028 #define BIT_R_CCK_LEN_8812F(x) \ 21029 (((x) & BIT_MASK_R_CCK_LEN_8812F) << BIT_SHIFT_R_CCK_LEN_8812F) 21030 #define BITS_R_CCK_LEN_8812F \ 21031 (BIT_MASK_R_CCK_LEN_8812F << BIT_SHIFT_R_CCK_LEN_8812F) 21032 #define BIT_CLEAR_R_CCK_LEN_8812F(x) ((x) & (~BITS_R_CCK_LEN_8812F)) 21033 #define BIT_GET_R_CCK_LEN_8812F(x) \ 21034 (((x) >> BIT_SHIFT_R_CCK_LEN_8812F) & BIT_MASK_R_CCK_LEN_8812F) 21035 #define BIT_SET_R_CCK_LEN_8812F(x, v) \ 21036 (BIT_CLEAR_R_CCK_LEN_8812F(x) | BIT_R_CCK_LEN_8812F(v)) 21037 21038 /* 2 REG_WMAC_OPTION_FUNCTION_1_8812F */ 21039 21040 #define BIT_SHIFT_R_WMAC_RXFIFO_FULL_TH_1_8812F 24 21041 #define BIT_MASK_R_WMAC_RXFIFO_FULL_TH_1_8812F 0xff 21042 #define BIT_R_WMAC_RXFIFO_FULL_TH_1_8812F(x) \ 21043 (((x) & BIT_MASK_R_WMAC_RXFIFO_FULL_TH_1_8812F) \ 21044 << BIT_SHIFT_R_WMAC_RXFIFO_FULL_TH_1_8812F) 21045 #define BITS_R_WMAC_RXFIFO_FULL_TH_1_8812F \ 21046 (BIT_MASK_R_WMAC_RXFIFO_FULL_TH_1_8812F \ 21047 << BIT_SHIFT_R_WMAC_RXFIFO_FULL_TH_1_8812F) 21048 #define BIT_CLEAR_R_WMAC_RXFIFO_FULL_TH_1_8812F(x) \ 21049 ((x) & (~BITS_R_WMAC_RXFIFO_FULL_TH_1_8812F)) 21050 #define BIT_GET_R_WMAC_RXFIFO_FULL_TH_1_8812F(x) \ 21051 (((x) >> BIT_SHIFT_R_WMAC_RXFIFO_FULL_TH_1_8812F) & \ 21052 BIT_MASK_R_WMAC_RXFIFO_FULL_TH_1_8812F) 21053 #define BIT_SET_R_WMAC_RXFIFO_FULL_TH_1_8812F(x, v) \ 21054 (BIT_CLEAR_R_WMAC_RXFIFO_FULL_TH_1_8812F(x) | \ 21055 BIT_R_WMAC_RXFIFO_FULL_TH_1_8812F(v)) 21056 21057 #define BIT_R_WMAC_RX_SYNCFIFO_SYNC_1_8812F BIT(23) 21058 #define BIT_R_WMAC_RXRST_DLY_1_8812F BIT(22) 21059 #define BIT_R_WMAC_SRCH_TXRPT_REF_DROP_1_8812F BIT(21) 21060 #define BIT_R_WMAC_SRCH_TXRPT_UA1_1_8812F BIT(20) 21061 #define BIT_R_WMAC_SRCH_TXRPT_TYPE_1_8812F BIT(19) 21062 #define BIT_R_WMAC_NDP_RST_1_8812F BIT(18) 21063 #define BIT_R_WMAC_POWINT_EN_1_8812F BIT(17) 21064 #define BIT_R_WMAC_SRCH_TXRPT_PERPKT_1_8812F BIT(16) 21065 #define BIT_R_WMAC_SRCH_TXRPT_MID_1_8812F BIT(15) 21066 #define BIT_R_WMAC_PFIN_TOEN_1_8812F BIT(14) 21067 #define BIT_R_WMAC_FIL_SECERR_1_8812F BIT(13) 21068 #define BIT_R_WMAC_FIL_CTLPKTLEN_1_8812F BIT(12) 21069 #define BIT_R_WMAC_FIL_FCTYPE_1_8812F BIT(11) 21070 #define BIT_R_WMAC_FIL_FCPROVER_1_8812F BIT(10) 21071 #define BIT_R_WMAC_PHYSTS_SNIF_1_8812F BIT(9) 21072 #define BIT_R_WMAC_PHYSTS_PLCP_1_8812F BIT(8) 21073 #define BIT_R_MAC_TCR_VBONF_RD_1_8812F BIT(7) 21074 #define BIT_R_WMAC_TCR_MPAR_NDP_1_8812F BIT(6) 21075 #define BIT_R_WMAC_NDP_FILTER_1_8812F BIT(5) 21076 #define BIT_R_WMAC_RXLEN_SEL_1_8812F BIT(4) 21077 #define BIT_R_WMAC_RXLEN_SEL1_1_8812F BIT(3) 21078 #define BIT_R_OFDM_FILTER_1_8812F BIT(2) 21079 #define BIT_R_WMAC_CHK_OFDM_LEN_1_8812F BIT(1) 21080 #define BIT_R_WMAC_CHK_CCK_LEN_1_8812F BIT(0) 21081 21082 /* 2 REG_WMAC_OPTION_FUNCTION_2_8812F */ 21083 21084 #define BIT_SHIFT_R_WMAC_RX_FIL_LEN_2_8812F 0 21085 #define BIT_MASK_R_WMAC_RX_FIL_LEN_2_8812F 0xffff 21086 #define BIT_R_WMAC_RX_FIL_LEN_2_8812F(x) \ 21087 (((x) & BIT_MASK_R_WMAC_RX_FIL_LEN_2_8812F) \ 21088 << BIT_SHIFT_R_WMAC_RX_FIL_LEN_2_8812F) 21089 #define BITS_R_WMAC_RX_FIL_LEN_2_8812F \ 21090 (BIT_MASK_R_WMAC_RX_FIL_LEN_2_8812F \ 21091 << BIT_SHIFT_R_WMAC_RX_FIL_LEN_2_8812F) 21092 #define BIT_CLEAR_R_WMAC_RX_FIL_LEN_2_8812F(x) \ 21093 ((x) & (~BITS_R_WMAC_RX_FIL_LEN_2_8812F)) 21094 #define BIT_GET_R_WMAC_RX_FIL_LEN_2_8812F(x) \ 21095 (((x) >> BIT_SHIFT_R_WMAC_RX_FIL_LEN_2_8812F) & \ 21096 BIT_MASK_R_WMAC_RX_FIL_LEN_2_8812F) 21097 #define BIT_SET_R_WMAC_RX_FIL_LEN_2_8812F(x, v) \ 21098 (BIT_CLEAR_R_WMAC_RX_FIL_LEN_2_8812F(x) | \ 21099 BIT_R_WMAC_RX_FIL_LEN_2_8812F(v)) 21100 21101 /* 2 REG_RX_FILTER_FUNCTION_8812F */ 21102 #define BIT_RXHANG_EN_8812F BIT(15) 21103 #define BIT_R_WMAC_MHRDDY_LATCH_8812F BIT(14) 21104 #define BIT_R_WMAC_MHRDDY_CLR_8812F BIT(13) 21105 #define BIT_R_RXPKTCTL_FSM_BASED_MPDURDY1_8812F BIT(12) 21106 #define BIT_WMAC_DIS_VHT_PLCP_CHK_MU_8812F BIT(11) 21107 #define BIT_R_CHK_DELIMIT_LEN_8812F BIT(10) 21108 #define BIT_R_REAPTER_ADDR_MATCH_8812F BIT(9) 21109 #define BIT_R_RXPKTCTL_FSM_BASED_MPDURDY_8812F BIT(8) 21110 #define BIT_R_LATCH_MACHRDY_8812F BIT(7) 21111 #define BIT_R_WMAC_RXFIL_REND_8812F BIT(6) 21112 #define BIT_R_WMAC_MPDURDY_CLR_8812F BIT(5) 21113 #define BIT_R_WMAC_CLRRXSEC_8812F BIT(4) 21114 #define BIT_R_WMAC_RXFIL_RDEL_8812F BIT(3) 21115 #define BIT_R_WMAC_RXFIL_FCSE_8812F BIT(2) 21116 #define BIT_R_WMAC_RXFIL_MESH_DEL_8812F BIT(1) 21117 #define BIT_R_WMAC_RXFIL_MASKM_8812F BIT(0) 21118 21119 /* 2 REG_NDP_SIG_8812F */ 21120 21121 #define BIT_SHIFT_R_WMAC_TXNDP_SIGB_8812F 0 21122 #define BIT_MASK_R_WMAC_TXNDP_SIGB_8812F 0x1fffff 21123 #define BIT_R_WMAC_TXNDP_SIGB_8812F(x) \ 21124 (((x) & BIT_MASK_R_WMAC_TXNDP_SIGB_8812F) \ 21125 << BIT_SHIFT_R_WMAC_TXNDP_SIGB_8812F) 21126 #define BITS_R_WMAC_TXNDP_SIGB_8812F \ 21127 (BIT_MASK_R_WMAC_TXNDP_SIGB_8812F << BIT_SHIFT_R_WMAC_TXNDP_SIGB_8812F) 21128 #define BIT_CLEAR_R_WMAC_TXNDP_SIGB_8812F(x) \ 21129 ((x) & (~BITS_R_WMAC_TXNDP_SIGB_8812F)) 21130 #define BIT_GET_R_WMAC_TXNDP_SIGB_8812F(x) \ 21131 (((x) >> BIT_SHIFT_R_WMAC_TXNDP_SIGB_8812F) & \ 21132 BIT_MASK_R_WMAC_TXNDP_SIGB_8812F) 21133 #define BIT_SET_R_WMAC_TXNDP_SIGB_8812F(x, v) \ 21134 (BIT_CLEAR_R_WMAC_TXNDP_SIGB_8812F(x) | BIT_R_WMAC_TXNDP_SIGB_8812F(v)) 21135 21136 /* 2 REG_TXCMD_INFO_FOR_RSP_PKT_8812F */ 21137 21138 #define BIT_SHIFT_R_MAC_DBG_SHIFT_8812F 8 21139 #define BIT_MASK_R_MAC_DBG_SHIFT_8812F 0x7 21140 #define BIT_R_MAC_DBG_SHIFT_8812F(x) \ 21141 (((x) & BIT_MASK_R_MAC_DBG_SHIFT_8812F) \ 21142 << BIT_SHIFT_R_MAC_DBG_SHIFT_8812F) 21143 #define BITS_R_MAC_DBG_SHIFT_8812F \ 21144 (BIT_MASK_R_MAC_DBG_SHIFT_8812F << BIT_SHIFT_R_MAC_DBG_SHIFT_8812F) 21145 #define BIT_CLEAR_R_MAC_DBG_SHIFT_8812F(x) ((x) & (~BITS_R_MAC_DBG_SHIFT_8812F)) 21146 #define BIT_GET_R_MAC_DBG_SHIFT_8812F(x) \ 21147 (((x) >> BIT_SHIFT_R_MAC_DBG_SHIFT_8812F) & \ 21148 BIT_MASK_R_MAC_DBG_SHIFT_8812F) 21149 #define BIT_SET_R_MAC_DBG_SHIFT_8812F(x, v) \ 21150 (BIT_CLEAR_R_MAC_DBG_SHIFT_8812F(x) | BIT_R_MAC_DBG_SHIFT_8812F(v)) 21151 21152 #define BIT_SHIFT_R_MAC_DBG_SEL_8812F 0 21153 #define BIT_MASK_R_MAC_DBG_SEL_8812F 0x3 21154 #define BIT_R_MAC_DBG_SEL_8812F(x) \ 21155 (((x) & BIT_MASK_R_MAC_DBG_SEL_8812F) << BIT_SHIFT_R_MAC_DBG_SEL_8812F) 21156 #define BITS_R_MAC_DBG_SEL_8812F \ 21157 (BIT_MASK_R_MAC_DBG_SEL_8812F << BIT_SHIFT_R_MAC_DBG_SEL_8812F) 21158 #define BIT_CLEAR_R_MAC_DBG_SEL_8812F(x) ((x) & (~BITS_R_MAC_DBG_SEL_8812F)) 21159 #define BIT_GET_R_MAC_DBG_SEL_8812F(x) \ 21160 (((x) >> BIT_SHIFT_R_MAC_DBG_SEL_8812F) & BIT_MASK_R_MAC_DBG_SEL_8812F) 21161 #define BIT_SET_R_MAC_DBG_SEL_8812F(x, v) \ 21162 (BIT_CLEAR_R_MAC_DBG_SEL_8812F(x) | BIT_R_MAC_DBG_SEL_8812F(v)) 21163 21164 /* 2 REG_TXCMD_INFO_FOR_RSP_PKT_1_8812F */ 21165 21166 #define BIT_SHIFT_R_MAC_DEBUG_1_8812F 0 21167 #define BIT_MASK_R_MAC_DEBUG_1_8812F 0xffffffffL 21168 #define BIT_R_MAC_DEBUG_1_8812F(x) \ 21169 (((x) & BIT_MASK_R_MAC_DEBUG_1_8812F) << BIT_SHIFT_R_MAC_DEBUG_1_8812F) 21170 #define BITS_R_MAC_DEBUG_1_8812F \ 21171 (BIT_MASK_R_MAC_DEBUG_1_8812F << BIT_SHIFT_R_MAC_DEBUG_1_8812F) 21172 #define BIT_CLEAR_R_MAC_DEBUG_1_8812F(x) ((x) & (~BITS_R_MAC_DEBUG_1_8812F)) 21173 #define BIT_GET_R_MAC_DEBUG_1_8812F(x) \ 21174 (((x) >> BIT_SHIFT_R_MAC_DEBUG_1_8812F) & BIT_MASK_R_MAC_DEBUG_1_8812F) 21175 #define BIT_SET_R_MAC_DEBUG_1_8812F(x, v) \ 21176 (BIT_CLEAR_R_MAC_DEBUG_1_8812F(x) | BIT_R_MAC_DEBUG_1_8812F(v)) 21177 21178 /* 2 REG_WSEC_OPTION_8812F */ 21179 #define BIT_RXDEC_BM_MGNT_8812F BIT(22) 21180 #define BIT_TXENC_BM_MGNT_8812F BIT(21) 21181 #define BIT_RXDEC_UNI_MGNT_8812F BIT(20) 21182 #define BIT_TXENC_UNI_MGNT_8812F BIT(19) 21183 #define BIT_WMAC_SEC_MASKIV_8812F BIT(18) 21184 21185 #define BIT_SHIFT_WMAC_SEC_PN_SEL_8812F 16 21186 #define BIT_MASK_WMAC_SEC_PN_SEL_8812F 0x3 21187 #define BIT_WMAC_SEC_PN_SEL_8812F(x) \ 21188 (((x) & BIT_MASK_WMAC_SEC_PN_SEL_8812F) \ 21189 << BIT_SHIFT_WMAC_SEC_PN_SEL_8812F) 21190 #define BITS_WMAC_SEC_PN_SEL_8812F \ 21191 (BIT_MASK_WMAC_SEC_PN_SEL_8812F << BIT_SHIFT_WMAC_SEC_PN_SEL_8812F) 21192 #define BIT_CLEAR_WMAC_SEC_PN_SEL_8812F(x) ((x) & (~BITS_WMAC_SEC_PN_SEL_8812F)) 21193 #define BIT_GET_WMAC_SEC_PN_SEL_8812F(x) \ 21194 (((x) >> BIT_SHIFT_WMAC_SEC_PN_SEL_8812F) & \ 21195 BIT_MASK_WMAC_SEC_PN_SEL_8812F) 21196 #define BIT_SET_WMAC_SEC_PN_SEL_8812F(x, v) \ 21197 (BIT_CLEAR_WMAC_SEC_PN_SEL_8812F(x) | BIT_WMAC_SEC_PN_SEL_8812F(v)) 21198 21199 #define BIT_SHIFT_BT_TIME_CNT_8812F 0 21200 #define BIT_MASK_BT_TIME_CNT_8812F 0xff 21201 #define BIT_BT_TIME_CNT_8812F(x) \ 21202 (((x) & BIT_MASK_BT_TIME_CNT_8812F) << BIT_SHIFT_BT_TIME_CNT_8812F) 21203 #define BITS_BT_TIME_CNT_8812F \ 21204 (BIT_MASK_BT_TIME_CNT_8812F << BIT_SHIFT_BT_TIME_CNT_8812F) 21205 #define BIT_CLEAR_BT_TIME_CNT_8812F(x) ((x) & (~BITS_BT_TIME_CNT_8812F)) 21206 #define BIT_GET_BT_TIME_CNT_8812F(x) \ 21207 (((x) >> BIT_SHIFT_BT_TIME_CNT_8812F) & BIT_MASK_BT_TIME_CNT_8812F) 21208 #define BIT_SET_BT_TIME_CNT_8812F(x, v) \ 21209 (BIT_CLEAR_BT_TIME_CNT_8812F(x) | BIT_BT_TIME_CNT_8812F(v)) 21210 21211 /* 2 REG_RTS_ADDRESS_0_8812F */ 21212 21213 /* 2 REG_RTS_ADDRESS_0_1_8812F */ 21214 21215 /* 2 REG_RTS_ADDRESS_1_8812F */ 21216 21217 /* 2 REG_RTS_ADDRESS_1_1_8812F */ 21218 21219 /* 2 REG_WL2LTECOEX_INDIRECT_ACCESS_CTRL_V1_8812F */ 21220 #define BIT_LTECOEX_ACCESS_START_V1_8812F BIT(31) 21221 #define BIT_LTECOEX_WRITE_MODE_V1_8812F BIT(30) 21222 #define BIT_LTECOEX_READY_BIT_V1_8812F BIT(29) 21223 21224 #define BIT_SHIFT_WRITE_BYTE_EN_V1_8812F 16 21225 #define BIT_MASK_WRITE_BYTE_EN_V1_8812F 0xf 21226 #define BIT_WRITE_BYTE_EN_V1_8812F(x) \ 21227 (((x) & BIT_MASK_WRITE_BYTE_EN_V1_8812F) \ 21228 << BIT_SHIFT_WRITE_BYTE_EN_V1_8812F) 21229 #define BITS_WRITE_BYTE_EN_V1_8812F \ 21230 (BIT_MASK_WRITE_BYTE_EN_V1_8812F << BIT_SHIFT_WRITE_BYTE_EN_V1_8812F) 21231 #define BIT_CLEAR_WRITE_BYTE_EN_V1_8812F(x) \ 21232 ((x) & (~BITS_WRITE_BYTE_EN_V1_8812F)) 21233 #define BIT_GET_WRITE_BYTE_EN_V1_8812F(x) \ 21234 (((x) >> BIT_SHIFT_WRITE_BYTE_EN_V1_8812F) & \ 21235 BIT_MASK_WRITE_BYTE_EN_V1_8812F) 21236 #define BIT_SET_WRITE_BYTE_EN_V1_8812F(x, v) \ 21237 (BIT_CLEAR_WRITE_BYTE_EN_V1_8812F(x) | BIT_WRITE_BYTE_EN_V1_8812F(v)) 21238 21239 #define BIT_SHIFT_LTECOEX_REG_ADDR_V1_8812F 0 21240 #define BIT_MASK_LTECOEX_REG_ADDR_V1_8812F 0xffff 21241 #define BIT_LTECOEX_REG_ADDR_V1_8812F(x) \ 21242 (((x) & BIT_MASK_LTECOEX_REG_ADDR_V1_8812F) \ 21243 << BIT_SHIFT_LTECOEX_REG_ADDR_V1_8812F) 21244 #define BITS_LTECOEX_REG_ADDR_V1_8812F \ 21245 (BIT_MASK_LTECOEX_REG_ADDR_V1_8812F \ 21246 << BIT_SHIFT_LTECOEX_REG_ADDR_V1_8812F) 21247 #define BIT_CLEAR_LTECOEX_REG_ADDR_V1_8812F(x) \ 21248 ((x) & (~BITS_LTECOEX_REG_ADDR_V1_8812F)) 21249 #define BIT_GET_LTECOEX_REG_ADDR_V1_8812F(x) \ 21250 (((x) >> BIT_SHIFT_LTECOEX_REG_ADDR_V1_8812F) & \ 21251 BIT_MASK_LTECOEX_REG_ADDR_V1_8812F) 21252 #define BIT_SET_LTECOEX_REG_ADDR_V1_8812F(x, v) \ 21253 (BIT_CLEAR_LTECOEX_REG_ADDR_V1_8812F(x) | \ 21254 BIT_LTECOEX_REG_ADDR_V1_8812F(v)) 21255 21256 /* 2 REG_WL2LTECOEX_INDIRECT_ACCESS_WRITE_DATA_V1_8812F */ 21257 21258 #define BIT_SHIFT_LTECOEX_W_DATA_V1_8812F 0 21259 #define BIT_MASK_LTECOEX_W_DATA_V1_8812F 0xffffffffL 21260 #define BIT_LTECOEX_W_DATA_V1_8812F(x) \ 21261 (((x) & BIT_MASK_LTECOEX_W_DATA_V1_8812F) \ 21262 << BIT_SHIFT_LTECOEX_W_DATA_V1_8812F) 21263 #define BITS_LTECOEX_W_DATA_V1_8812F \ 21264 (BIT_MASK_LTECOEX_W_DATA_V1_8812F << BIT_SHIFT_LTECOEX_W_DATA_V1_8812F) 21265 #define BIT_CLEAR_LTECOEX_W_DATA_V1_8812F(x) \ 21266 ((x) & (~BITS_LTECOEX_W_DATA_V1_8812F)) 21267 #define BIT_GET_LTECOEX_W_DATA_V1_8812F(x) \ 21268 (((x) >> BIT_SHIFT_LTECOEX_W_DATA_V1_8812F) & \ 21269 BIT_MASK_LTECOEX_W_DATA_V1_8812F) 21270 #define BIT_SET_LTECOEX_W_DATA_V1_8812F(x, v) \ 21271 (BIT_CLEAR_LTECOEX_W_DATA_V1_8812F(x) | BIT_LTECOEX_W_DATA_V1_8812F(v)) 21272 21273 /* 2 REG_WL2LTECOEX_INDIRECT_ACCESS_READ_DATA_V1_8812F */ 21274 21275 #define BIT_SHIFT_LTECOEX_R_DATA_V1_8812F 0 21276 #define BIT_MASK_LTECOEX_R_DATA_V1_8812F 0xffffffffL 21277 #define BIT_LTECOEX_R_DATA_V1_8812F(x) \ 21278 (((x) & BIT_MASK_LTECOEX_R_DATA_V1_8812F) \ 21279 << BIT_SHIFT_LTECOEX_R_DATA_V1_8812F) 21280 #define BITS_LTECOEX_R_DATA_V1_8812F \ 21281 (BIT_MASK_LTECOEX_R_DATA_V1_8812F << BIT_SHIFT_LTECOEX_R_DATA_V1_8812F) 21282 #define BIT_CLEAR_LTECOEX_R_DATA_V1_8812F(x) \ 21283 ((x) & (~BITS_LTECOEX_R_DATA_V1_8812F)) 21284 #define BIT_GET_LTECOEX_R_DATA_V1_8812F(x) \ 21285 (((x) >> BIT_SHIFT_LTECOEX_R_DATA_V1_8812F) & \ 21286 BIT_MASK_LTECOEX_R_DATA_V1_8812F) 21287 #define BIT_SET_LTECOEX_R_DATA_V1_8812F(x, v) \ 21288 (BIT_CLEAR_LTECOEX_R_DATA_V1_8812F(x) | BIT_LTECOEX_R_DATA_V1_8812F(v)) 21289 21290 /* 2 REG_NOT_VALID_8812F */ 21291 21292 /* 2 REG_NOT_VALID_8812F */ 21293 21294 /* 2 REG_NOT_VALID_8812F */ 21295 21296 /* 2 REG_NOT_VALID_8812F */ 21297 21298 /* 2 REG_NOT_VALID_8812F */ 21299 21300 /* 2 REG_NOT_VALID_8812F */ 21301 21302 /* 2 REG_NOT_VALID_8812F */ 21303 21304 /* 2 REG_NOT_VALID_8812F */ 21305 21306 /* 2 REG_NOT_VALID_8812F */ 21307 21308 /* 2 REG_NOT_VALID_8812F */ 21309 21310 /* 2 REG_NOT_VALID_8812F */ 21311 21312 /* 2 REG_NOT_VALID_8812F */ 21313 21314 /* 2 REG_NOT_VALID_8812F */ 21315 21316 /* 2 REG_NOT_VALID_8812F */ 21317 21318 /* 2 REG_NOT_VALID_8812F */ 21319 21320 /* 2 REG_NOT_VALID_8812F */ 21321 21322 /* 2 REG_NOT_VALID_8812F */ 21323 21324 /* 2 REG_NOT_VALID_8812F */ 21325 21326 /* 2 REG_NOT_VALID_8812F */ 21327 21328 /* 2 REG_NOT_VALID_8812F */ 21329 21330 /* 2 REG_NOT_VALID_8812F */ 21331 21332 /* 2 REG_NOT_VALID_8812F */ 21333 21334 /* 2 REG_NOT_VALID_8812F */ 21335 21336 /* 2 REG_NOT_VALID_8812F */ 21337 21338 /* 2 REG_NOT_VALID_8812F */ 21339 21340 /* 2 REG_NOT_VALID_8812F */ 21341 21342 /* 2 REG_NOT_VALID_8812F */ 21343 21344 /* 2 REG_NOT_VALID_8812F */ 21345 21346 /* 2 REG_NOT_VALID_8812F */ 21347 21348 /* 2 REG_NOT_VALID_8812F */ 21349 21350 /* 2 REG_NOT_VALID_8812F */ 21351 21352 /* 2 REG_NOT_VALID_8812F */ 21353 21354 /* 2 REG_NOT_VALID_8812F */ 21355 21356 /* 2 REG_NOT_VALID_8812F */ 21357 21358 /* 2 REG_NOT_VALID_8812F */ 21359 21360 /* 2 REG_NOT_VALID_8812F */ 21361 21362 /* 2 REG_NOT_VALID_8812F */ 21363 21364 /* 2 REG_NOT_VALID_8812F */ 21365 21366 /* 2 REG_NOT_VALID_8812F */ 21367 21368 /* 2 REG_NOT_VALID_8812F */ 21369 21370 /* 2 REG_NOT_VALID_8812F */ 21371 21372 /* 2 REG_NOT_VALID_8812F */ 21373 21374 /* 2 REG_NOT_VALID_8812F */ 21375 21376 /* 2 REG_NOT_VALID_8812F */ 21377 21378 /* 2 REG_NOT_VALID_8812F */ 21379 21380 /* 2 REG_NOT_VALID_8812F */ 21381 21382 /* 2 REG_NOT_VALID_8812F */ 21383 21384 /* 2 REG_NOT_VALID_8812F */ 21385 21386 /* 2 REG_NOT_VALID_8812F */ 21387 21388 /* 2 REG_NOT_VALID_8812F */ 21389 21390 /* 2 REG_NOT_VALID_8812F */ 21391 21392 /* 2 REG_NOT_VALID_8812F */ 21393 21394 /* 2 REG_NOT_VALID_8812F */ 21395 21396 /* 2 REG_NOT_VALID_8812F */ 21397 21398 /* 2 REG_NOT_VALID_8812F */ 21399 21400 /* 2 REG_NOT_VALID_8812F */ 21401 21402 /* 2 REG_NOT_VALID_8812F */ 21403 21404 /* 2 REG_NOT_VALID_8812F */ 21405 21406 /* 2 REG_NOT_VALID_8812F */ 21407 21408 /* 2 REG_NOT_VALID_8812F */ 21409 21410 /* 2 REG_NOT_VALID_8812F */ 21411 21412 /* 2 REG_SDIO_TX_CTRL_8812F */ 21413 21414 #define BIT_SHIFT_SDIO_INT_TIMEOUT_8812F 16 21415 #define BIT_MASK_SDIO_INT_TIMEOUT_8812F 0xffff 21416 #define BIT_SDIO_INT_TIMEOUT_8812F(x) \ 21417 (((x) & BIT_MASK_SDIO_INT_TIMEOUT_8812F) \ 21418 << BIT_SHIFT_SDIO_INT_TIMEOUT_8812F) 21419 #define BITS_SDIO_INT_TIMEOUT_8812F \ 21420 (BIT_MASK_SDIO_INT_TIMEOUT_8812F << BIT_SHIFT_SDIO_INT_TIMEOUT_8812F) 21421 #define BIT_CLEAR_SDIO_INT_TIMEOUT_8812F(x) \ 21422 ((x) & (~BITS_SDIO_INT_TIMEOUT_8812F)) 21423 #define BIT_GET_SDIO_INT_TIMEOUT_8812F(x) \ 21424 (((x) >> BIT_SHIFT_SDIO_INT_TIMEOUT_8812F) & \ 21425 BIT_MASK_SDIO_INT_TIMEOUT_8812F) 21426 #define BIT_SET_SDIO_INT_TIMEOUT_8812F(x, v) \ 21427 (BIT_CLEAR_SDIO_INT_TIMEOUT_8812F(x) | BIT_SDIO_INT_TIMEOUT_8812F(v)) 21428 21429 #define BIT_IO_ERR_STATUS_8812F BIT(15) 21430 #define BIT_CMD53_W_MIX_8812F BIT(14) 21431 #define BIT_CMD53_TX_FORMAT_8812F BIT(13) 21432 #define BIT_CMD53_R_TIMEOUT_MASK_8812F BIT(12) 21433 21434 #define BIT_SHIFT_CMD53_R_TIMEOUT_UNIT_8812F 10 21435 #define BIT_MASK_CMD53_R_TIMEOUT_UNIT_8812F 0x3 21436 #define BIT_CMD53_R_TIMEOUT_UNIT_8812F(x) \ 21437 (((x) & BIT_MASK_CMD53_R_TIMEOUT_UNIT_8812F) \ 21438 << BIT_SHIFT_CMD53_R_TIMEOUT_UNIT_8812F) 21439 #define BITS_CMD53_R_TIMEOUT_UNIT_8812F \ 21440 (BIT_MASK_CMD53_R_TIMEOUT_UNIT_8812F \ 21441 << BIT_SHIFT_CMD53_R_TIMEOUT_UNIT_8812F) 21442 #define BIT_CLEAR_CMD53_R_TIMEOUT_UNIT_8812F(x) \ 21443 ((x) & (~BITS_CMD53_R_TIMEOUT_UNIT_8812F)) 21444 #define BIT_GET_CMD53_R_TIMEOUT_UNIT_8812F(x) \ 21445 (((x) >> BIT_SHIFT_CMD53_R_TIMEOUT_UNIT_8812F) & \ 21446 BIT_MASK_CMD53_R_TIMEOUT_UNIT_8812F) 21447 #define BIT_SET_CMD53_R_TIMEOUT_UNIT_8812F(x, v) \ 21448 (BIT_CLEAR_CMD53_R_TIMEOUT_UNIT_8812F(x) | \ 21449 BIT_CMD53_R_TIMEOUT_UNIT_8812F(v)) 21450 21451 #define BIT_REPLY_ERRCRC_IN_DATA_8812F BIT(9) 21452 #define BIT_EN_CMD53_OVERLAP_8812F BIT(8) 21453 #define BIT_REPLY_ERR_IN_R5_8812F BIT(7) 21454 #define BIT_R18A_EN_8812F BIT(6) 21455 #define BIT_SDIO_CMD_FORCE_VLD_8812F BIT(5) 21456 #define BIT_INIT_CMD_EN_8812F BIT(4) 21457 #define BIT_RXINT_READ_MASK_DIS_8812F BIT(3) 21458 #define BIT_EN_RXDMA_MASK_INT_8812F BIT(2) 21459 #define BIT_EN_MASK_TIMER_8812F BIT(1) 21460 #define BIT_CMD_ERR_STOP_INT_EN_8812F BIT(0) 21461 21462 /* 2 REG_SDIO_CMD11_VOL_SWITCH_8812F */ 21463 21464 #define BIT_SHIFT_CMD11_SEQ_END_DELAY_8812F 4 21465 #define BIT_MASK_CMD11_SEQ_END_DELAY_8812F 0xf 21466 #define BIT_CMD11_SEQ_END_DELAY_8812F(x) \ 21467 (((x) & BIT_MASK_CMD11_SEQ_END_DELAY_8812F) \ 21468 << BIT_SHIFT_CMD11_SEQ_END_DELAY_8812F) 21469 #define BITS_CMD11_SEQ_END_DELAY_8812F \ 21470 (BIT_MASK_CMD11_SEQ_END_DELAY_8812F \ 21471 << BIT_SHIFT_CMD11_SEQ_END_DELAY_8812F) 21472 #define BIT_CLEAR_CMD11_SEQ_END_DELAY_8812F(x) \ 21473 ((x) & (~BITS_CMD11_SEQ_END_DELAY_8812F)) 21474 #define BIT_GET_CMD11_SEQ_END_DELAY_8812F(x) \ 21475 (((x) >> BIT_SHIFT_CMD11_SEQ_END_DELAY_8812F) & \ 21476 BIT_MASK_CMD11_SEQ_END_DELAY_8812F) 21477 #define BIT_SET_CMD11_SEQ_END_DELAY_8812F(x, v) \ 21478 (BIT_CLEAR_CMD11_SEQ_END_DELAY_8812F(x) | \ 21479 BIT_CMD11_SEQ_END_DELAY_8812F(v)) 21480 21481 #define BIT_SHIFT_CMD11_SEQ_SAMPLE_INTERVAL_8812F 1 21482 #define BIT_MASK_CMD11_SEQ_SAMPLE_INTERVAL_8812F 0x7 21483 #define BIT_CMD11_SEQ_SAMPLE_INTERVAL_8812F(x) \ 21484 (((x) & BIT_MASK_CMD11_SEQ_SAMPLE_INTERVAL_8812F) \ 21485 << BIT_SHIFT_CMD11_SEQ_SAMPLE_INTERVAL_8812F) 21486 #define BITS_CMD11_SEQ_SAMPLE_INTERVAL_8812F \ 21487 (BIT_MASK_CMD11_SEQ_SAMPLE_INTERVAL_8812F \ 21488 << BIT_SHIFT_CMD11_SEQ_SAMPLE_INTERVAL_8812F) 21489 #define BIT_CLEAR_CMD11_SEQ_SAMPLE_INTERVAL_8812F(x) \ 21490 ((x) & (~BITS_CMD11_SEQ_SAMPLE_INTERVAL_8812F)) 21491 #define BIT_GET_CMD11_SEQ_SAMPLE_INTERVAL_8812F(x) \ 21492 (((x) >> BIT_SHIFT_CMD11_SEQ_SAMPLE_INTERVAL_8812F) & \ 21493 BIT_MASK_CMD11_SEQ_SAMPLE_INTERVAL_8812F) 21494 #define BIT_SET_CMD11_SEQ_SAMPLE_INTERVAL_8812F(x, v) \ 21495 (BIT_CLEAR_CMD11_SEQ_SAMPLE_INTERVAL_8812F(x) | \ 21496 BIT_CMD11_SEQ_SAMPLE_INTERVAL_8812F(v)) 21497 21498 #define BIT_CMD11_SEQ_EN_8812F BIT(0) 21499 21500 /* 2 REG_SDIO_CTRL_8812F */ 21501 #define BIT_SIG_OUT_PH_8812F BIT(0) 21502 21503 /* 2 REG_SDIO_DRIVING_8812F */ 21504 21505 #define BIT_SHIFT_SDIO_DRV_TYPE_D_8812F 12 21506 #define BIT_MASK_SDIO_DRV_TYPE_D_8812F 0xf 21507 #define BIT_SDIO_DRV_TYPE_D_8812F(x) \ 21508 (((x) & BIT_MASK_SDIO_DRV_TYPE_D_8812F) \ 21509 << BIT_SHIFT_SDIO_DRV_TYPE_D_8812F) 21510 #define BITS_SDIO_DRV_TYPE_D_8812F \ 21511 (BIT_MASK_SDIO_DRV_TYPE_D_8812F << BIT_SHIFT_SDIO_DRV_TYPE_D_8812F) 21512 #define BIT_CLEAR_SDIO_DRV_TYPE_D_8812F(x) ((x) & (~BITS_SDIO_DRV_TYPE_D_8812F)) 21513 #define BIT_GET_SDIO_DRV_TYPE_D_8812F(x) \ 21514 (((x) >> BIT_SHIFT_SDIO_DRV_TYPE_D_8812F) & \ 21515 BIT_MASK_SDIO_DRV_TYPE_D_8812F) 21516 #define BIT_SET_SDIO_DRV_TYPE_D_8812F(x, v) \ 21517 (BIT_CLEAR_SDIO_DRV_TYPE_D_8812F(x) | BIT_SDIO_DRV_TYPE_D_8812F(v)) 21518 21519 #define BIT_SHIFT_SDIO_DRV_TYPE_C_8812F 8 21520 #define BIT_MASK_SDIO_DRV_TYPE_C_8812F 0xf 21521 #define BIT_SDIO_DRV_TYPE_C_8812F(x) \ 21522 (((x) & BIT_MASK_SDIO_DRV_TYPE_C_8812F) \ 21523 << BIT_SHIFT_SDIO_DRV_TYPE_C_8812F) 21524 #define BITS_SDIO_DRV_TYPE_C_8812F \ 21525 (BIT_MASK_SDIO_DRV_TYPE_C_8812F << BIT_SHIFT_SDIO_DRV_TYPE_C_8812F) 21526 #define BIT_CLEAR_SDIO_DRV_TYPE_C_8812F(x) ((x) & (~BITS_SDIO_DRV_TYPE_C_8812F)) 21527 #define BIT_GET_SDIO_DRV_TYPE_C_8812F(x) \ 21528 (((x) >> BIT_SHIFT_SDIO_DRV_TYPE_C_8812F) & \ 21529 BIT_MASK_SDIO_DRV_TYPE_C_8812F) 21530 #define BIT_SET_SDIO_DRV_TYPE_C_8812F(x, v) \ 21531 (BIT_CLEAR_SDIO_DRV_TYPE_C_8812F(x) | BIT_SDIO_DRV_TYPE_C_8812F(v)) 21532 21533 #define BIT_SHIFT_SDIO_DRV_TYPE_B_8812F 4 21534 #define BIT_MASK_SDIO_DRV_TYPE_B_8812F 0xf 21535 #define BIT_SDIO_DRV_TYPE_B_8812F(x) \ 21536 (((x) & BIT_MASK_SDIO_DRV_TYPE_B_8812F) \ 21537 << BIT_SHIFT_SDIO_DRV_TYPE_B_8812F) 21538 #define BITS_SDIO_DRV_TYPE_B_8812F \ 21539 (BIT_MASK_SDIO_DRV_TYPE_B_8812F << BIT_SHIFT_SDIO_DRV_TYPE_B_8812F) 21540 #define BIT_CLEAR_SDIO_DRV_TYPE_B_8812F(x) ((x) & (~BITS_SDIO_DRV_TYPE_B_8812F)) 21541 #define BIT_GET_SDIO_DRV_TYPE_B_8812F(x) \ 21542 (((x) >> BIT_SHIFT_SDIO_DRV_TYPE_B_8812F) & \ 21543 BIT_MASK_SDIO_DRV_TYPE_B_8812F) 21544 #define BIT_SET_SDIO_DRV_TYPE_B_8812F(x, v) \ 21545 (BIT_CLEAR_SDIO_DRV_TYPE_B_8812F(x) | BIT_SDIO_DRV_TYPE_B_8812F(v)) 21546 21547 #define BIT_SHIFT_SDIO_DRV_TYPE_A_8812F 0 21548 #define BIT_MASK_SDIO_DRV_TYPE_A_8812F 0xf 21549 #define BIT_SDIO_DRV_TYPE_A_8812F(x) \ 21550 (((x) & BIT_MASK_SDIO_DRV_TYPE_A_8812F) \ 21551 << BIT_SHIFT_SDIO_DRV_TYPE_A_8812F) 21552 #define BITS_SDIO_DRV_TYPE_A_8812F \ 21553 (BIT_MASK_SDIO_DRV_TYPE_A_8812F << BIT_SHIFT_SDIO_DRV_TYPE_A_8812F) 21554 #define BIT_CLEAR_SDIO_DRV_TYPE_A_8812F(x) ((x) & (~BITS_SDIO_DRV_TYPE_A_8812F)) 21555 #define BIT_GET_SDIO_DRV_TYPE_A_8812F(x) \ 21556 (((x) >> BIT_SHIFT_SDIO_DRV_TYPE_A_8812F) & \ 21557 BIT_MASK_SDIO_DRV_TYPE_A_8812F) 21558 #define BIT_SET_SDIO_DRV_TYPE_A_8812F(x, v) \ 21559 (BIT_CLEAR_SDIO_DRV_TYPE_A_8812F(x) | BIT_SDIO_DRV_TYPE_A_8812F(v)) 21560 21561 /* 2 REG_SDIO_MONITOR_8812F */ 21562 21563 #define BIT_SHIFT_SDIO_INT_START_8812F 0 21564 #define BIT_MASK_SDIO_INT_START_8812F 0xffffffffL 21565 #define BIT_SDIO_INT_START_8812F(x) \ 21566 (((x) & BIT_MASK_SDIO_INT_START_8812F) \ 21567 << BIT_SHIFT_SDIO_INT_START_8812F) 21568 #define BITS_SDIO_INT_START_8812F \ 21569 (BIT_MASK_SDIO_INT_START_8812F << BIT_SHIFT_SDIO_INT_START_8812F) 21570 #define BIT_CLEAR_SDIO_INT_START_8812F(x) ((x) & (~BITS_SDIO_INT_START_8812F)) 21571 #define BIT_GET_SDIO_INT_START_8812F(x) \ 21572 (((x) >> BIT_SHIFT_SDIO_INT_START_8812F) & \ 21573 BIT_MASK_SDIO_INT_START_8812F) 21574 #define BIT_SET_SDIO_INT_START_8812F(x, v) \ 21575 (BIT_CLEAR_SDIO_INT_START_8812F(x) | BIT_SDIO_INT_START_8812F(v)) 21576 21577 /* 2 REG_SDIO_MONITOR_2_8812F */ 21578 #define BIT_CMD53_WT_EN_8812F BIT(23) 21579 21580 #define BIT_SHIFT_SDIO_CLK_MONITOR_8812F 21 21581 #define BIT_MASK_SDIO_CLK_MONITOR_8812F 0x3 21582 #define BIT_SDIO_CLK_MONITOR_8812F(x) \ 21583 (((x) & BIT_MASK_SDIO_CLK_MONITOR_8812F) \ 21584 << BIT_SHIFT_SDIO_CLK_MONITOR_8812F) 21585 #define BITS_SDIO_CLK_MONITOR_8812F \ 21586 (BIT_MASK_SDIO_CLK_MONITOR_8812F << BIT_SHIFT_SDIO_CLK_MONITOR_8812F) 21587 #define BIT_CLEAR_SDIO_CLK_MONITOR_8812F(x) \ 21588 ((x) & (~BITS_SDIO_CLK_MONITOR_8812F)) 21589 #define BIT_GET_SDIO_CLK_MONITOR_8812F(x) \ 21590 (((x) >> BIT_SHIFT_SDIO_CLK_MONITOR_8812F) & \ 21591 BIT_MASK_SDIO_CLK_MONITOR_8812F) 21592 #define BIT_SET_SDIO_CLK_MONITOR_8812F(x, v) \ 21593 (BIT_CLEAR_SDIO_CLK_MONITOR_8812F(x) | BIT_SDIO_CLK_MONITOR_8812F(v)) 21594 21595 #define BIT_SHIFT_SDIO_CLK_CNT_8812F 0 21596 #define BIT_MASK_SDIO_CLK_CNT_8812F 0x1fffff 21597 #define BIT_SDIO_CLK_CNT_8812F(x) \ 21598 (((x) & BIT_MASK_SDIO_CLK_CNT_8812F) << BIT_SHIFT_SDIO_CLK_CNT_8812F) 21599 #define BITS_SDIO_CLK_CNT_8812F \ 21600 (BIT_MASK_SDIO_CLK_CNT_8812F << BIT_SHIFT_SDIO_CLK_CNT_8812F) 21601 #define BIT_CLEAR_SDIO_CLK_CNT_8812F(x) ((x) & (~BITS_SDIO_CLK_CNT_8812F)) 21602 #define BIT_GET_SDIO_CLK_CNT_8812F(x) \ 21603 (((x) >> BIT_SHIFT_SDIO_CLK_CNT_8812F) & BIT_MASK_SDIO_CLK_CNT_8812F) 21604 #define BIT_SET_SDIO_CLK_CNT_8812F(x, v) \ 21605 (BIT_CLEAR_SDIO_CLK_CNT_8812F(x) | BIT_SDIO_CLK_CNT_8812F(v)) 21606 21607 /* 2 REG_SDIO_CTRL_2_8812F */ 21608 #define BIT_SDIO_CLK_SMT_V1_8812F BIT(1) 21609 #define BIT_SDIO_DATA_SMT_8812F BIT(0) 21610 21611 /* 2 REG_SDIO_HIMR_8812F */ 21612 #define BIT_SDIO_CRCERR_MSK_8812F BIT(31) 21613 #define BIT_SDIO_HSISR3_IND_MSK_8812F BIT(30) 21614 #define BIT_SDIO_HSISR2_IND_MSK_8812F BIT(29) 21615 #define BIT_SDIO_HEISR_IND_MSK_8812F BIT(28) 21616 #define BIT_SDIO_CTWEND_MSK_8812F BIT(27) 21617 #define BIT_SDIO_ATIMEND_E_MSK_8812F BIT(26) 21618 #define BIT_SDIIO_ATIMEND_MSK_8812F BIT(25) 21619 #define BIT_SDIO_OCPINT_MSK_8812F BIT(24) 21620 #define BIT_SDIO_PSTIMEOUT_MSK_8812F BIT(23) 21621 #define BIT_SDIO_GTINT4_MSK_8812F BIT(22) 21622 #define BIT_SDIO_GTINT3_MSK_8812F BIT(21) 21623 #define BIT_SDIO_HSISR_IND_MSK_8812F BIT(20) 21624 #define BIT_SDIO_CPWM2_MSK_8812F BIT(19) 21625 #define BIT_SDIO_CPWM1_MSK_8812F BIT(18) 21626 #define BIT_SDIO_C2HCMD_INT_MSK_8812F BIT(17) 21627 #define BIT_SDIO_BCNERLY_INT_MSK_8812F BIT(16) 21628 #define BIT_SDIO_TXBCNERR_MSK_8812F BIT(7) 21629 #define BIT_SDIO_TXBCNOK_MSK_8812F BIT(6) 21630 #define BIT_SDIO_RXFOVW_MSK_8812F BIT(5) 21631 #define BIT_SDIO_TXFOVW_MSK_8812F BIT(4) 21632 #define BIT_SDIO_RXERR_MSK_8812F BIT(3) 21633 #define BIT_SDIO_TXERR_MSK_8812F BIT(2) 21634 #define BIT_SDIO_AVAL_MSK_8812F BIT(1) 21635 #define BIT_RX_REQUEST_MSK_8812F BIT(0) 21636 21637 /* 2 REG_SDIO_HISR_8812F */ 21638 #define BIT_SDIO_CRCERR_8812F BIT(31) 21639 #define BIT_SDIO_HSISR3_IND_8812F BIT(30) 21640 #define BIT_SDIO_HSISR2_IND_8812F BIT(29) 21641 #define BIT_SDIO_HEISR_IND_8812F BIT(28) 21642 #define BIT_SDIO_CTWEND_8812F BIT(27) 21643 #define BIT_SDIO_ATIMEND_E_8812F BIT(26) 21644 #define BIT_SDIO_ATIMEND_8812F BIT(25) 21645 #define BIT_SDIO_OCPINT_8812F BIT(24) 21646 #define BIT_SDIO_PSTIMEOUT_8812F BIT(23) 21647 #define BIT_SDIO_GTINT4_8812F BIT(22) 21648 #define BIT_SDIO_GTINT3_8812F BIT(21) 21649 #define BIT_SDIO_HSISR_IND_8812F BIT(20) 21650 #define BIT_SDIO_CPWM2_8812F BIT(19) 21651 #define BIT_SDIO_CPWM1_8812F BIT(18) 21652 #define BIT_SDIO_C2HCMD_INT_8812F BIT(17) 21653 #define BIT_SDIO_BCNERLY_INT_8812F BIT(16) 21654 #define BIT_SDIO_TXBCNERR_8812F BIT(7) 21655 #define BIT_SDIO_TXBCNOK_8812F BIT(6) 21656 #define BIT_SDIO_RXFOVW_8812F BIT(5) 21657 #define BIT_SDIO_TXFOVW_8812F BIT(4) 21658 #define BIT_SDIO_RXERR_8812F BIT(3) 21659 #define BIT_SDIO_TXERR_8812F BIT(2) 21660 #define BIT_SDIO_AVAL_8812F BIT(1) 21661 #define BIT_RX_REQUEST_8812F BIT(0) 21662 21663 /* 2 REG_SDIO_RX_REQ_LEN_8812F */ 21664 21665 #define BIT_SHIFT_RX_REQ_LEN_V1_8812F 0 21666 #define BIT_MASK_RX_REQ_LEN_V1_8812F 0x3ffff 21667 #define BIT_RX_REQ_LEN_V1_8812F(x) \ 21668 (((x) & BIT_MASK_RX_REQ_LEN_V1_8812F) << BIT_SHIFT_RX_REQ_LEN_V1_8812F) 21669 #define BITS_RX_REQ_LEN_V1_8812F \ 21670 (BIT_MASK_RX_REQ_LEN_V1_8812F << BIT_SHIFT_RX_REQ_LEN_V1_8812F) 21671 #define BIT_CLEAR_RX_REQ_LEN_V1_8812F(x) ((x) & (~BITS_RX_REQ_LEN_V1_8812F)) 21672 #define BIT_GET_RX_REQ_LEN_V1_8812F(x) \ 21673 (((x) >> BIT_SHIFT_RX_REQ_LEN_V1_8812F) & BIT_MASK_RX_REQ_LEN_V1_8812F) 21674 #define BIT_SET_RX_REQ_LEN_V1_8812F(x, v) \ 21675 (BIT_CLEAR_RX_REQ_LEN_V1_8812F(x) | BIT_RX_REQ_LEN_V1_8812F(v)) 21676 21677 /* 2 REG_SDIO_FREE_TXPG_SEQ_V1_8812F */ 21678 21679 #define BIT_SHIFT_FREE_TXPG_SEQ_8812F 0 21680 #define BIT_MASK_FREE_TXPG_SEQ_8812F 0xff 21681 #define BIT_FREE_TXPG_SEQ_8812F(x) \ 21682 (((x) & BIT_MASK_FREE_TXPG_SEQ_8812F) << BIT_SHIFT_FREE_TXPG_SEQ_8812F) 21683 #define BITS_FREE_TXPG_SEQ_8812F \ 21684 (BIT_MASK_FREE_TXPG_SEQ_8812F << BIT_SHIFT_FREE_TXPG_SEQ_8812F) 21685 #define BIT_CLEAR_FREE_TXPG_SEQ_8812F(x) ((x) & (~BITS_FREE_TXPG_SEQ_8812F)) 21686 #define BIT_GET_FREE_TXPG_SEQ_8812F(x) \ 21687 (((x) >> BIT_SHIFT_FREE_TXPG_SEQ_8812F) & BIT_MASK_FREE_TXPG_SEQ_8812F) 21688 #define BIT_SET_FREE_TXPG_SEQ_8812F(x, v) \ 21689 (BIT_CLEAR_FREE_TXPG_SEQ_8812F(x) | BIT_FREE_TXPG_SEQ_8812F(v)) 21690 21691 /* 2 REG_SDIO_FREE_TXPG_8812F */ 21692 21693 #define BIT_SHIFT_MID_FREEPG_V1_8812F 16 21694 #define BIT_MASK_MID_FREEPG_V1_8812F 0xfff 21695 #define BIT_MID_FREEPG_V1_8812F(x) \ 21696 (((x) & BIT_MASK_MID_FREEPG_V1_8812F) << BIT_SHIFT_MID_FREEPG_V1_8812F) 21697 #define BITS_MID_FREEPG_V1_8812F \ 21698 (BIT_MASK_MID_FREEPG_V1_8812F << BIT_SHIFT_MID_FREEPG_V1_8812F) 21699 #define BIT_CLEAR_MID_FREEPG_V1_8812F(x) ((x) & (~BITS_MID_FREEPG_V1_8812F)) 21700 #define BIT_GET_MID_FREEPG_V1_8812F(x) \ 21701 (((x) >> BIT_SHIFT_MID_FREEPG_V1_8812F) & BIT_MASK_MID_FREEPG_V1_8812F) 21702 #define BIT_SET_MID_FREEPG_V1_8812F(x, v) \ 21703 (BIT_CLEAR_MID_FREEPG_V1_8812F(x) | BIT_MID_FREEPG_V1_8812F(v)) 21704 21705 #define BIT_SHIFT_HIQ_FREEPG_V1_8812F 0 21706 #define BIT_MASK_HIQ_FREEPG_V1_8812F 0xfff 21707 #define BIT_HIQ_FREEPG_V1_8812F(x) \ 21708 (((x) & BIT_MASK_HIQ_FREEPG_V1_8812F) << BIT_SHIFT_HIQ_FREEPG_V1_8812F) 21709 #define BITS_HIQ_FREEPG_V1_8812F \ 21710 (BIT_MASK_HIQ_FREEPG_V1_8812F << BIT_SHIFT_HIQ_FREEPG_V1_8812F) 21711 #define BIT_CLEAR_HIQ_FREEPG_V1_8812F(x) ((x) & (~BITS_HIQ_FREEPG_V1_8812F)) 21712 #define BIT_GET_HIQ_FREEPG_V1_8812F(x) \ 21713 (((x) >> BIT_SHIFT_HIQ_FREEPG_V1_8812F) & BIT_MASK_HIQ_FREEPG_V1_8812F) 21714 #define BIT_SET_HIQ_FREEPG_V1_8812F(x, v) \ 21715 (BIT_CLEAR_HIQ_FREEPG_V1_8812F(x) | BIT_HIQ_FREEPG_V1_8812F(v)) 21716 21717 /* 2 REG_SDIO_FREE_TXPG2_8812F */ 21718 21719 #define BIT_SHIFT_PUB_FREEPG_V1_8812F 16 21720 #define BIT_MASK_PUB_FREEPG_V1_8812F 0xfff 21721 #define BIT_PUB_FREEPG_V1_8812F(x) \ 21722 (((x) & BIT_MASK_PUB_FREEPG_V1_8812F) << BIT_SHIFT_PUB_FREEPG_V1_8812F) 21723 #define BITS_PUB_FREEPG_V1_8812F \ 21724 (BIT_MASK_PUB_FREEPG_V1_8812F << BIT_SHIFT_PUB_FREEPG_V1_8812F) 21725 #define BIT_CLEAR_PUB_FREEPG_V1_8812F(x) ((x) & (~BITS_PUB_FREEPG_V1_8812F)) 21726 #define BIT_GET_PUB_FREEPG_V1_8812F(x) \ 21727 (((x) >> BIT_SHIFT_PUB_FREEPG_V1_8812F) & BIT_MASK_PUB_FREEPG_V1_8812F) 21728 #define BIT_SET_PUB_FREEPG_V1_8812F(x, v) \ 21729 (BIT_CLEAR_PUB_FREEPG_V1_8812F(x) | BIT_PUB_FREEPG_V1_8812F(v)) 21730 21731 #define BIT_SHIFT_LOW_FREEPG_V1_8812F 0 21732 #define BIT_MASK_LOW_FREEPG_V1_8812F 0xfff 21733 #define BIT_LOW_FREEPG_V1_8812F(x) \ 21734 (((x) & BIT_MASK_LOW_FREEPG_V1_8812F) << BIT_SHIFT_LOW_FREEPG_V1_8812F) 21735 #define BITS_LOW_FREEPG_V1_8812F \ 21736 (BIT_MASK_LOW_FREEPG_V1_8812F << BIT_SHIFT_LOW_FREEPG_V1_8812F) 21737 #define BIT_CLEAR_LOW_FREEPG_V1_8812F(x) ((x) & (~BITS_LOW_FREEPG_V1_8812F)) 21738 #define BIT_GET_LOW_FREEPG_V1_8812F(x) \ 21739 (((x) >> BIT_SHIFT_LOW_FREEPG_V1_8812F) & BIT_MASK_LOW_FREEPG_V1_8812F) 21740 #define BIT_SET_LOW_FREEPG_V1_8812F(x, v) \ 21741 (BIT_CLEAR_LOW_FREEPG_V1_8812F(x) | BIT_LOW_FREEPG_V1_8812F(v)) 21742 21743 /* 2 REG_SDIO_OQT_FREE_TXPG_V1_8812F */ 21744 21745 #define BIT_SHIFT_NOAC_OQT_FREEPG_V1_8812F 24 21746 #define BIT_MASK_NOAC_OQT_FREEPG_V1_8812F 0xff 21747 #define BIT_NOAC_OQT_FREEPG_V1_8812F(x) \ 21748 (((x) & BIT_MASK_NOAC_OQT_FREEPG_V1_8812F) \ 21749 << BIT_SHIFT_NOAC_OQT_FREEPG_V1_8812F) 21750 #define BITS_NOAC_OQT_FREEPG_V1_8812F \ 21751 (BIT_MASK_NOAC_OQT_FREEPG_V1_8812F \ 21752 << BIT_SHIFT_NOAC_OQT_FREEPG_V1_8812F) 21753 #define BIT_CLEAR_NOAC_OQT_FREEPG_V1_8812F(x) \ 21754 ((x) & (~BITS_NOAC_OQT_FREEPG_V1_8812F)) 21755 #define BIT_GET_NOAC_OQT_FREEPG_V1_8812F(x) \ 21756 (((x) >> BIT_SHIFT_NOAC_OQT_FREEPG_V1_8812F) & \ 21757 BIT_MASK_NOAC_OQT_FREEPG_V1_8812F) 21758 #define BIT_SET_NOAC_OQT_FREEPG_V1_8812F(x, v) \ 21759 (BIT_CLEAR_NOAC_OQT_FREEPG_V1_8812F(x) | \ 21760 BIT_NOAC_OQT_FREEPG_V1_8812F(v)) 21761 21762 #define BIT_SHIFT_AC_OQT_FREEPG_V1_8812F 16 21763 #define BIT_MASK_AC_OQT_FREEPG_V1_8812F 0xff 21764 #define BIT_AC_OQT_FREEPG_V1_8812F(x) \ 21765 (((x) & BIT_MASK_AC_OQT_FREEPG_V1_8812F) \ 21766 << BIT_SHIFT_AC_OQT_FREEPG_V1_8812F) 21767 #define BITS_AC_OQT_FREEPG_V1_8812F \ 21768 (BIT_MASK_AC_OQT_FREEPG_V1_8812F << BIT_SHIFT_AC_OQT_FREEPG_V1_8812F) 21769 #define BIT_CLEAR_AC_OQT_FREEPG_V1_8812F(x) \ 21770 ((x) & (~BITS_AC_OQT_FREEPG_V1_8812F)) 21771 #define BIT_GET_AC_OQT_FREEPG_V1_8812F(x) \ 21772 (((x) >> BIT_SHIFT_AC_OQT_FREEPG_V1_8812F) & \ 21773 BIT_MASK_AC_OQT_FREEPG_V1_8812F) 21774 #define BIT_SET_AC_OQT_FREEPG_V1_8812F(x, v) \ 21775 (BIT_CLEAR_AC_OQT_FREEPG_V1_8812F(x) | BIT_AC_OQT_FREEPG_V1_8812F(v)) 21776 21777 #define BIT_SHIFT_EXQ_FREEPG_V1_8812F 0 21778 #define BIT_MASK_EXQ_FREEPG_V1_8812F 0xfff 21779 #define BIT_EXQ_FREEPG_V1_8812F(x) \ 21780 (((x) & BIT_MASK_EXQ_FREEPG_V1_8812F) << BIT_SHIFT_EXQ_FREEPG_V1_8812F) 21781 #define BITS_EXQ_FREEPG_V1_8812F \ 21782 (BIT_MASK_EXQ_FREEPG_V1_8812F << BIT_SHIFT_EXQ_FREEPG_V1_8812F) 21783 #define BIT_CLEAR_EXQ_FREEPG_V1_8812F(x) ((x) & (~BITS_EXQ_FREEPG_V1_8812F)) 21784 #define BIT_GET_EXQ_FREEPG_V1_8812F(x) \ 21785 (((x) >> BIT_SHIFT_EXQ_FREEPG_V1_8812F) & BIT_MASK_EXQ_FREEPG_V1_8812F) 21786 #define BIT_SET_EXQ_FREEPG_V1_8812F(x, v) \ 21787 (BIT_CLEAR_EXQ_FREEPG_V1_8812F(x) | BIT_EXQ_FREEPG_V1_8812F(v)) 21788 21789 /* 2 REG_SDIO_TXPKT_EMPTY_8812F */ 21790 #define BIT_SDIO_BCNQ_EMPTY_8812F BIT(11) 21791 #define BIT_SDIO_HQQ_EMPTY_8812F BIT(10) 21792 #define BIT_SDIO_MQQ_EMPTY_8812F BIT(9) 21793 #define BIT_SDIO_MGQ_CPU_EMPTY_8812F BIT(8) 21794 #define BIT_SDIO_AC7Q_EMPTY_8812F BIT(7) 21795 #define BIT_SDIO_AC6Q_EMPTY_8812F BIT(6) 21796 #define BIT_SDIO_AC5Q_EMPTY_8812F BIT(5) 21797 #define BIT_SDIO_AC4Q_EMPTY_8812F BIT(4) 21798 #define BIT_SDIO_AC3Q_EMPTY_8812F BIT(3) 21799 #define BIT_SDIO_AC2Q_EMPTY_8812F BIT(2) 21800 #define BIT_SDIO_AC1Q_EMPTY_8812F BIT(1) 21801 #define BIT_SDIO_AC0Q_EMPTY_8812F BIT(0) 21802 21803 /* 2 REG_SDIO_HTSFR_INFO_8812F */ 21804 21805 #define BIT_SHIFT_HTSFR1_8812F 16 21806 #define BIT_MASK_HTSFR1_8812F 0xffff 21807 #define BIT_HTSFR1_8812F(x) \ 21808 (((x) & BIT_MASK_HTSFR1_8812F) << BIT_SHIFT_HTSFR1_8812F) 21809 #define BITS_HTSFR1_8812F (BIT_MASK_HTSFR1_8812F << BIT_SHIFT_HTSFR1_8812F) 21810 #define BIT_CLEAR_HTSFR1_8812F(x) ((x) & (~BITS_HTSFR1_8812F)) 21811 #define BIT_GET_HTSFR1_8812F(x) \ 21812 (((x) >> BIT_SHIFT_HTSFR1_8812F) & BIT_MASK_HTSFR1_8812F) 21813 #define BIT_SET_HTSFR1_8812F(x, v) \ 21814 (BIT_CLEAR_HTSFR1_8812F(x) | BIT_HTSFR1_8812F(v)) 21815 21816 #define BIT_SHIFT_HTSFR0_8812F 0 21817 #define BIT_MASK_HTSFR0_8812F 0xffff 21818 #define BIT_HTSFR0_8812F(x) \ 21819 (((x) & BIT_MASK_HTSFR0_8812F) << BIT_SHIFT_HTSFR0_8812F) 21820 #define BITS_HTSFR0_8812F (BIT_MASK_HTSFR0_8812F << BIT_SHIFT_HTSFR0_8812F) 21821 #define BIT_CLEAR_HTSFR0_8812F(x) ((x) & (~BITS_HTSFR0_8812F)) 21822 #define BIT_GET_HTSFR0_8812F(x) \ 21823 (((x) >> BIT_SHIFT_HTSFR0_8812F) & BIT_MASK_HTSFR0_8812F) 21824 #define BIT_SET_HTSFR0_8812F(x, v) \ 21825 (BIT_CLEAR_HTSFR0_8812F(x) | BIT_HTSFR0_8812F(v)) 21826 21827 /* 2 REG_SDIO_HCPWM1_V2_8812F */ 21828 #define BIT_TOGGLE_8812F BIT(7) 21829 #define BIT_CUR_PS_8812F BIT(0) 21830 21831 /* 2 REG_SDIO_HCPWM2_V2_8812F */ 21832 21833 /* 2 REG_SDIO_INDIRECT_REG_CFG_8812F */ 21834 #define BIT_INDIRECT_REG_RDY_8812F BIT(20) 21835 #define BIT_INDIRECT_REG_R_8812F BIT(19) 21836 #define BIT_INDIRECT_REG_W_8812F BIT(18) 21837 21838 #define BIT_SHIFT_INDIRECT_REG_SIZE_8812F 16 21839 #define BIT_MASK_INDIRECT_REG_SIZE_8812F 0x3 21840 #define BIT_INDIRECT_REG_SIZE_8812F(x) \ 21841 (((x) & BIT_MASK_INDIRECT_REG_SIZE_8812F) \ 21842 << BIT_SHIFT_INDIRECT_REG_SIZE_8812F) 21843 #define BITS_INDIRECT_REG_SIZE_8812F \ 21844 (BIT_MASK_INDIRECT_REG_SIZE_8812F << BIT_SHIFT_INDIRECT_REG_SIZE_8812F) 21845 #define BIT_CLEAR_INDIRECT_REG_SIZE_8812F(x) \ 21846 ((x) & (~BITS_INDIRECT_REG_SIZE_8812F)) 21847 #define BIT_GET_INDIRECT_REG_SIZE_8812F(x) \ 21848 (((x) >> BIT_SHIFT_INDIRECT_REG_SIZE_8812F) & \ 21849 BIT_MASK_INDIRECT_REG_SIZE_8812F) 21850 #define BIT_SET_INDIRECT_REG_SIZE_8812F(x, v) \ 21851 (BIT_CLEAR_INDIRECT_REG_SIZE_8812F(x) | BIT_INDIRECT_REG_SIZE_8812F(v)) 21852 21853 #define BIT_SHIFT_INDIRECT_REG_ADDR_8812F 0 21854 #define BIT_MASK_INDIRECT_REG_ADDR_8812F 0xffff 21855 #define BIT_INDIRECT_REG_ADDR_8812F(x) \ 21856 (((x) & BIT_MASK_INDIRECT_REG_ADDR_8812F) \ 21857 << BIT_SHIFT_INDIRECT_REG_ADDR_8812F) 21858 #define BITS_INDIRECT_REG_ADDR_8812F \ 21859 (BIT_MASK_INDIRECT_REG_ADDR_8812F << BIT_SHIFT_INDIRECT_REG_ADDR_8812F) 21860 #define BIT_CLEAR_INDIRECT_REG_ADDR_8812F(x) \ 21861 ((x) & (~BITS_INDIRECT_REG_ADDR_8812F)) 21862 #define BIT_GET_INDIRECT_REG_ADDR_8812F(x) \ 21863 (((x) >> BIT_SHIFT_INDIRECT_REG_ADDR_8812F) & \ 21864 BIT_MASK_INDIRECT_REG_ADDR_8812F) 21865 #define BIT_SET_INDIRECT_REG_ADDR_8812F(x, v) \ 21866 (BIT_CLEAR_INDIRECT_REG_ADDR_8812F(x) | BIT_INDIRECT_REG_ADDR_8812F(v)) 21867 21868 /* 2 REG_SDIO_INDIRECT_REG_DATA_8812F */ 21869 21870 #define BIT_SHIFT_INDIRECT_REG_DATA_8812F 0 21871 #define BIT_MASK_INDIRECT_REG_DATA_8812F 0xffffffffL 21872 #define BIT_INDIRECT_REG_DATA_8812F(x) \ 21873 (((x) & BIT_MASK_INDIRECT_REG_DATA_8812F) \ 21874 << BIT_SHIFT_INDIRECT_REG_DATA_8812F) 21875 #define BITS_INDIRECT_REG_DATA_8812F \ 21876 (BIT_MASK_INDIRECT_REG_DATA_8812F << BIT_SHIFT_INDIRECT_REG_DATA_8812F) 21877 #define BIT_CLEAR_INDIRECT_REG_DATA_8812F(x) \ 21878 ((x) & (~BITS_INDIRECT_REG_DATA_8812F)) 21879 #define BIT_GET_INDIRECT_REG_DATA_8812F(x) \ 21880 (((x) >> BIT_SHIFT_INDIRECT_REG_DATA_8812F) & \ 21881 BIT_MASK_INDIRECT_REG_DATA_8812F) 21882 #define BIT_SET_INDIRECT_REG_DATA_8812F(x, v) \ 21883 (BIT_CLEAR_INDIRECT_REG_DATA_8812F(x) | BIT_INDIRECT_REG_DATA_8812F(v)) 21884 21885 /* 2 REG_SDIO_H2C_8812F */ 21886 21887 #define BIT_SHIFT_SDIO_H2C_MSG_8812F 0 21888 #define BIT_MASK_SDIO_H2C_MSG_8812F 0xffffffffL 21889 #define BIT_SDIO_H2C_MSG_8812F(x) \ 21890 (((x) & BIT_MASK_SDIO_H2C_MSG_8812F) << BIT_SHIFT_SDIO_H2C_MSG_8812F) 21891 #define BITS_SDIO_H2C_MSG_8812F \ 21892 (BIT_MASK_SDIO_H2C_MSG_8812F << BIT_SHIFT_SDIO_H2C_MSG_8812F) 21893 #define BIT_CLEAR_SDIO_H2C_MSG_8812F(x) ((x) & (~BITS_SDIO_H2C_MSG_8812F)) 21894 #define BIT_GET_SDIO_H2C_MSG_8812F(x) \ 21895 (((x) >> BIT_SHIFT_SDIO_H2C_MSG_8812F) & BIT_MASK_SDIO_H2C_MSG_8812F) 21896 #define BIT_SET_SDIO_H2C_MSG_8812F(x, v) \ 21897 (BIT_CLEAR_SDIO_H2C_MSG_8812F(x) | BIT_SDIO_H2C_MSG_8812F(v)) 21898 21899 /* 2 REG_SDIO_C2H_8812F */ 21900 21901 #define BIT_SHIFT_SDIO_C2H_MSG_8812F 0 21902 #define BIT_MASK_SDIO_C2H_MSG_8812F 0xffffffffL 21903 #define BIT_SDIO_C2H_MSG_8812F(x) \ 21904 (((x) & BIT_MASK_SDIO_C2H_MSG_8812F) << BIT_SHIFT_SDIO_C2H_MSG_8812F) 21905 #define BITS_SDIO_C2H_MSG_8812F \ 21906 (BIT_MASK_SDIO_C2H_MSG_8812F << BIT_SHIFT_SDIO_C2H_MSG_8812F) 21907 #define BIT_CLEAR_SDIO_C2H_MSG_8812F(x) ((x) & (~BITS_SDIO_C2H_MSG_8812F)) 21908 #define BIT_GET_SDIO_C2H_MSG_8812F(x) \ 21909 (((x) >> BIT_SHIFT_SDIO_C2H_MSG_8812F) & BIT_MASK_SDIO_C2H_MSG_8812F) 21910 #define BIT_SET_SDIO_C2H_MSG_8812F(x, v) \ 21911 (BIT_CLEAR_SDIO_C2H_MSG_8812F(x) | BIT_SDIO_C2H_MSG_8812F(v)) 21912 21913 /* 2 REG_SDIO_HRPWM1_8812F */ 21914 #define BIT_TOGGLE_8812F BIT(7) 21915 #define BIT_ACK_8812F BIT(6) 21916 #define BIT_REQ_PS_8812F BIT(0) 21917 21918 /* 2 REG_SDIO_HRPWM2_8812F */ 21919 21920 /* 2 REG_SDIO_HPS_CLKR_8812F */ 21921 21922 /* 2 REG_SDIO_BUS_CTRL_8812F */ 21923 #define BIT_INT_MASK_DIS_8812F BIT(4) 21924 #define BIT_PAD_CLK_XHGE_EN_8812F BIT(3) 21925 #define BIT_INTER_CLK_EN_8812F BIT(2) 21926 #define BIT_EN_RPT_TXCRC_8812F BIT(1) 21927 #define BIT_DIS_RXDMA_STS_8812F BIT(0) 21928 21929 /* 2 REG_SDIO_HSUS_CTRL_8812F */ 21930 #define BIT_SPI_PHASE_8812F BIT(5) 21931 #define BIT_INTR_CTRL_8812F BIT(4) 21932 #define BIT_SDIO_VOLTAGE_8812F BIT(3) 21933 #define BIT_BYPASS_INIT_8812F BIT(2) 21934 #define BIT_HCI_RESUME_RDY_8812F BIT(1) 21935 #define BIT_HCI_SUS_REQ_8812F BIT(0) 21936 21937 /* 2 REG_SDIO_RESPONSE_TIMER_8812F */ 21938 21939 #define BIT_SHIFT_CMDIN_2RESP_TIMER_8812F 0 21940 #define BIT_MASK_CMDIN_2RESP_TIMER_8812F 0xffff 21941 #define BIT_CMDIN_2RESP_TIMER_8812F(x) \ 21942 (((x) & BIT_MASK_CMDIN_2RESP_TIMER_8812F) \ 21943 << BIT_SHIFT_CMDIN_2RESP_TIMER_8812F) 21944 #define BITS_CMDIN_2RESP_TIMER_8812F \ 21945 (BIT_MASK_CMDIN_2RESP_TIMER_8812F << BIT_SHIFT_CMDIN_2RESP_TIMER_8812F) 21946 #define BIT_CLEAR_CMDIN_2RESP_TIMER_8812F(x) \ 21947 ((x) & (~BITS_CMDIN_2RESP_TIMER_8812F)) 21948 #define BIT_GET_CMDIN_2RESP_TIMER_8812F(x) \ 21949 (((x) >> BIT_SHIFT_CMDIN_2RESP_TIMER_8812F) & \ 21950 BIT_MASK_CMDIN_2RESP_TIMER_8812F) 21951 #define BIT_SET_CMDIN_2RESP_TIMER_8812F(x, v) \ 21952 (BIT_CLEAR_CMDIN_2RESP_TIMER_8812F(x) | BIT_CMDIN_2RESP_TIMER_8812F(v)) 21953 21954 /* 2 REG_SDIO_CMD_CRC_8812F */ 21955 21956 #define BIT_SHIFT_SDIO_CMD_CRC_V1_8812F 0 21957 #define BIT_MASK_SDIO_CMD_CRC_V1_8812F 0xff 21958 #define BIT_SDIO_CMD_CRC_V1_8812F(x) \ 21959 (((x) & BIT_MASK_SDIO_CMD_CRC_V1_8812F) \ 21960 << BIT_SHIFT_SDIO_CMD_CRC_V1_8812F) 21961 #define BITS_SDIO_CMD_CRC_V1_8812F \ 21962 (BIT_MASK_SDIO_CMD_CRC_V1_8812F << BIT_SHIFT_SDIO_CMD_CRC_V1_8812F) 21963 #define BIT_CLEAR_SDIO_CMD_CRC_V1_8812F(x) ((x) & (~BITS_SDIO_CMD_CRC_V1_8812F)) 21964 #define BIT_GET_SDIO_CMD_CRC_V1_8812F(x) \ 21965 (((x) >> BIT_SHIFT_SDIO_CMD_CRC_V1_8812F) & \ 21966 BIT_MASK_SDIO_CMD_CRC_V1_8812F) 21967 #define BIT_SET_SDIO_CMD_CRC_V1_8812F(x, v) \ 21968 (BIT_CLEAR_SDIO_CMD_CRC_V1_8812F(x) | BIT_SDIO_CMD_CRC_V1_8812F(v)) 21969 21970 /* 2 REG_SDIO_HSISR_8812F */ 21971 #define BIT_DRV_WLAN_INT_CLR_8812F BIT(1) 21972 #define BIT_DRV_WLAN_INT_8812F BIT(0) 21973 21974 /* 2 REG_SDIO_HSIMR_8812F */ 21975 #define BIT_HISR_MASK_8812F BIT(0) 21976 21977 /* 2 REG_SDIO_DIOERR_RPT_8812F */ 21978 #define BIT_SDIO_PAGE_ERR_8812F BIT(0) 21979 21980 /* 2 REG_SDIO_CMD_ERRCNT_8812F */ 21981 21982 #define BIT_SHIFT_CMD_CRC_ERR_CNT_8812F 0 21983 #define BIT_MASK_CMD_CRC_ERR_CNT_8812F 0xff 21984 #define BIT_CMD_CRC_ERR_CNT_8812F(x) \ 21985 (((x) & BIT_MASK_CMD_CRC_ERR_CNT_8812F) \ 21986 << BIT_SHIFT_CMD_CRC_ERR_CNT_8812F) 21987 #define BITS_CMD_CRC_ERR_CNT_8812F \ 21988 (BIT_MASK_CMD_CRC_ERR_CNT_8812F << BIT_SHIFT_CMD_CRC_ERR_CNT_8812F) 21989 #define BIT_CLEAR_CMD_CRC_ERR_CNT_8812F(x) ((x) & (~BITS_CMD_CRC_ERR_CNT_8812F)) 21990 #define BIT_GET_CMD_CRC_ERR_CNT_8812F(x) \ 21991 (((x) >> BIT_SHIFT_CMD_CRC_ERR_CNT_8812F) & \ 21992 BIT_MASK_CMD_CRC_ERR_CNT_8812F) 21993 #define BIT_SET_CMD_CRC_ERR_CNT_8812F(x, v) \ 21994 (BIT_CLEAR_CMD_CRC_ERR_CNT_8812F(x) | BIT_CMD_CRC_ERR_CNT_8812F(v)) 21995 21996 /* 2 REG_SDIO_DATA_ERRCNT_8812F */ 21997 21998 #define BIT_SHIFT_DATA_CRC_ERR_CNT_8812F 0 21999 #define BIT_MASK_DATA_CRC_ERR_CNT_8812F 0xff 22000 #define BIT_DATA_CRC_ERR_CNT_8812F(x) \ 22001 (((x) & BIT_MASK_DATA_CRC_ERR_CNT_8812F) \ 22002 << BIT_SHIFT_DATA_CRC_ERR_CNT_8812F) 22003 #define BITS_DATA_CRC_ERR_CNT_8812F \ 22004 (BIT_MASK_DATA_CRC_ERR_CNT_8812F << BIT_SHIFT_DATA_CRC_ERR_CNT_8812F) 22005 #define BIT_CLEAR_DATA_CRC_ERR_CNT_8812F(x) \ 22006 ((x) & (~BITS_DATA_CRC_ERR_CNT_8812F)) 22007 #define BIT_GET_DATA_CRC_ERR_CNT_8812F(x) \ 22008 (((x) >> BIT_SHIFT_DATA_CRC_ERR_CNT_8812F) & \ 22009 BIT_MASK_DATA_CRC_ERR_CNT_8812F) 22010 #define BIT_SET_DATA_CRC_ERR_CNT_8812F(x, v) \ 22011 (BIT_CLEAR_DATA_CRC_ERR_CNT_8812F(x) | BIT_DATA_CRC_ERR_CNT_8812F(v)) 22012 22013 /* 2 REG_SDIO_CMD_ERR_CONTENT_8812F */ 22014 22015 #define BIT_SHIFT_SDIO_CMD_ERR_CONTENT_8812F 0 22016 #define BIT_MASK_SDIO_CMD_ERR_CONTENT_8812F 0xffffffffffL 22017 #define BIT_SDIO_CMD_ERR_CONTENT_8812F(x) \ 22018 (((x) & BIT_MASK_SDIO_CMD_ERR_CONTENT_8812F) \ 22019 << BIT_SHIFT_SDIO_CMD_ERR_CONTENT_8812F) 22020 #define BITS_SDIO_CMD_ERR_CONTENT_8812F \ 22021 (BIT_MASK_SDIO_CMD_ERR_CONTENT_8812F \ 22022 << BIT_SHIFT_SDIO_CMD_ERR_CONTENT_8812F) 22023 #define BIT_CLEAR_SDIO_CMD_ERR_CONTENT_8812F(x) \ 22024 ((x) & (~BITS_SDIO_CMD_ERR_CONTENT_8812F)) 22025 #define BIT_GET_SDIO_CMD_ERR_CONTENT_8812F(x) \ 22026 (((x) >> BIT_SHIFT_SDIO_CMD_ERR_CONTENT_8812F) & \ 22027 BIT_MASK_SDIO_CMD_ERR_CONTENT_8812F) 22028 #define BIT_SET_SDIO_CMD_ERR_CONTENT_8812F(x, v) \ 22029 (BIT_CLEAR_SDIO_CMD_ERR_CONTENT_8812F(x) | \ 22030 BIT_SDIO_CMD_ERR_CONTENT_8812F(v)) 22031 22032 /* 2 REG_SDIO_CRC_ERR_IDX_8812F */ 22033 #define BIT_D3_CRC_ERR_8812F BIT(4) 22034 #define BIT_D2_CRC_ERR_8812F BIT(3) 22035 #define BIT_D1_CRC_ERR_8812F BIT(2) 22036 #define BIT_D0_CRC_ERR_8812F BIT(1) 22037 #define BIT_CMD_CRC_ERR_8812F BIT(0) 22038 22039 /* 2 REG_SDIO_DATA_CRC_8812F */ 22040 22041 #define BIT_SHIFT_SDIO_DATA_CRC_8812F 0 22042 #define BIT_MASK_SDIO_DATA_CRC_8812F 0xffff 22043 #define BIT_SDIO_DATA_CRC_8812F(x) \ 22044 (((x) & BIT_MASK_SDIO_DATA_CRC_8812F) << BIT_SHIFT_SDIO_DATA_CRC_8812F) 22045 #define BITS_SDIO_DATA_CRC_8812F \ 22046 (BIT_MASK_SDIO_DATA_CRC_8812F << BIT_SHIFT_SDIO_DATA_CRC_8812F) 22047 #define BIT_CLEAR_SDIO_DATA_CRC_8812F(x) ((x) & (~BITS_SDIO_DATA_CRC_8812F)) 22048 #define BIT_GET_SDIO_DATA_CRC_8812F(x) \ 22049 (((x) >> BIT_SHIFT_SDIO_DATA_CRC_8812F) & BIT_MASK_SDIO_DATA_CRC_8812F) 22050 #define BIT_SET_SDIO_DATA_CRC_8812F(x, v) \ 22051 (BIT_CLEAR_SDIO_DATA_CRC_8812F(x) | BIT_SDIO_DATA_CRC_8812F(v)) 22052 22053 /* 2 REG_SDIO_TRANS_FIFO_STATUS_8812F */ 22054 #define BIT_TRANS_FIFO_UNDERFLOW_8812F BIT(1) 22055 #define BIT_TRANS_FIFO_OVERFLOW_8812F BIT(0) 22056 22057 #endif 22058