1*4882a593Smuzhiyun /****************************************************************************** 2*4882a593Smuzhiyun * 3*4882a593Smuzhiyun * Copyright(c) 2007 - 2017 Realtek Corporation. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify it 6*4882a593Smuzhiyun * under the terms of version 2 of the GNU General Public License as 7*4882a593Smuzhiyun * published by the Free Software Foundation. 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * This program is distributed in the hope that it will be useful, but WITHOUT 10*4882a593Smuzhiyun * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11*4882a593Smuzhiyun * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12*4882a593Smuzhiyun * more details. 13*4882a593Smuzhiyun * 14*4882a593Smuzhiyun *****************************************************************************/ 15*4882a593Smuzhiyun #ifndef __HAL_DM_H__ 16*4882a593Smuzhiyun #define __HAL_DM_H__ 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun #define adapter_to_phydm(adapter) (&(GET_HAL_DATA(adapter)->odmpriv)) 19*4882a593Smuzhiyun #define dvobj_to_phydm(dvobj) adapter_to_phydm(dvobj_get_primary_adapter(dvobj)) 20*4882a593Smuzhiyun #ifdef CONFIG_TDMADIG 21*4882a593Smuzhiyun void rtw_phydm_tdmadig(_adapter *adapter, u8 state); 22*4882a593Smuzhiyun #endif 23*4882a593Smuzhiyun void rtw_phydm_priv_init(_adapter *adapter); 24*4882a593Smuzhiyun void Init_ODM_ComInfo(_adapter *adapter); 25*4882a593Smuzhiyun void rtw_phydm_init(_adapter *adapter); 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun void rtw_hal_turbo_edca(_adapter *adapter); 28*4882a593Smuzhiyun u8 rtw_phydm_is_iqk_in_progress(_adapter *adapter); 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun void GetHalODMVar( 31*4882a593Smuzhiyun PADAPTER Adapter, 32*4882a593Smuzhiyun HAL_ODM_VARIABLE eVariable, 33*4882a593Smuzhiyun void *pValue1, 34*4882a593Smuzhiyun void *pValue2); 35*4882a593Smuzhiyun void SetHalODMVar( 36*4882a593Smuzhiyun PADAPTER Adapter, 37*4882a593Smuzhiyun HAL_ODM_VARIABLE eVariable, 38*4882a593Smuzhiyun void *pValue1, 39*4882a593Smuzhiyun BOOLEAN bSet); 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun void rtw_phydm_ra_registed(_adapter *adapter, struct sta_info *psta); 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun #ifdef CONFIG_DYNAMIC_SOML 44*4882a593Smuzhiyun void rtw_dyn_soml_byte_update(_adapter *adapter, u8 data_rate, u32 size); 45*4882a593Smuzhiyun void rtw_dyn_soml_para_set(_adapter *adapter, u8 train_num, u8 intvl, 46*4882a593Smuzhiyun u8 period, u8 delay); 47*4882a593Smuzhiyun void rtw_dyn_soml_config(_adapter *adapter); 48*4882a593Smuzhiyun #endif 49*4882a593Smuzhiyun void rtw_phydm_set_rrsr(_adapter *adapter, u32 rrsr_value, bool write_rrsr); 50*4882a593Smuzhiyun void rtw_phydm_dyn_rrsr_en(_adapter *adapter, bool en_rrsr); 51*4882a593Smuzhiyun void rtw_phydm_update_ap_vendor_ie(_adapter *adapter); 52*4882a593Smuzhiyun void rtw_phydm_watchdog(_adapter *adapter, bool in_lps); 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun void rtw_hal_update_iqk_fw_offload_cap(_adapter *adapter); 55*4882a593Smuzhiyun void dump_sta_info(void *sel, struct sta_info *psta); 56*4882a593Smuzhiyun void dump_sta_traffic(void *sel, _adapter *adapter, struct sta_info *psta); 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun void rtw_hal_phydm_cal_trigger(_adapter *adapter); 59*4882a593Smuzhiyun #ifdef CONFIG_DBG_RF_CAL 60*4882a593Smuzhiyun void rtw_hal_iqk_test(_adapter *adapter, bool recovery, bool clear, bool segment); 61*4882a593Smuzhiyun void rtw_hal_lck_test(_adapter *adapter); 62*4882a593Smuzhiyun #endif 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun s8 rtw_dm_get_min_rssi(_adapter *adapter); 65*4882a593Smuzhiyun s8 rtw_phydm_get_min_rssi(_adapter *adapter); 66*4882a593Smuzhiyun u8 rtw_phydm_get_cur_igi(_adapter *adapter); 67*4882a593Smuzhiyun bool rtw_phydm_get_edcca_flag(_adapter *adapter); 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun #ifdef CONFIG_LPS_LCLK_WD_TIMER 71*4882a593Smuzhiyun extern void phydm_rssi_monitor_check(void *p_dm_void); 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun void rtw_phydm_wd_lps_lclk_hdl(_adapter *adapter); 74*4882a593Smuzhiyun void rtw_phydm_watchdog_in_lps_lclk(_adapter *adapter); 75*4882a593Smuzhiyun #endif 76*4882a593Smuzhiyun #ifdef CONFIG_TDMADIG 77*4882a593Smuzhiyun enum rtw_tdmadig_state{ 78*4882a593Smuzhiyun TDMADIG_INIT, 79*4882a593Smuzhiyun TDMADIG_NON_INIT, 80*4882a593Smuzhiyun }; 81*4882a593Smuzhiyun #endif 82*4882a593Smuzhiyun enum phy_cnt { 83*4882a593Smuzhiyun FA_OFDM, 84*4882a593Smuzhiyun FA_CCK, 85*4882a593Smuzhiyun FA_TOTAL, 86*4882a593Smuzhiyun CCA_OFDM, 87*4882a593Smuzhiyun CCA_CCK, 88*4882a593Smuzhiyun CCA_ALL, 89*4882a593Smuzhiyun CRC32_OK_VHT, 90*4882a593Smuzhiyun CRC32_OK_HT, 91*4882a593Smuzhiyun CRC32_OK_LEGACY, 92*4882a593Smuzhiyun CRC32_OK_CCK, 93*4882a593Smuzhiyun CRC32_ERROR_VHT, 94*4882a593Smuzhiyun CRC32_ERROR_HT, 95*4882a593Smuzhiyun CRC32_ERROR_LEGACY, 96*4882a593Smuzhiyun CRC32_ERROR_CCK, 97*4882a593Smuzhiyun }; 98*4882a593Smuzhiyun u32 rtw_phydm_get_phy_cnt(_adapter *adapter, enum phy_cnt cnt); 99*4882a593Smuzhiyun #if ((RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) || (RTL8814B_SUPPORT == 1) || (RTL8822C_SUPPORT == 1) \ 100*4882a593Smuzhiyun || (RTL8723F_SUPPORT == 1)) 101*4882a593Smuzhiyun void rtw_phydm_iqk_trigger(_adapter *adapter); 102*4882a593Smuzhiyun #endif 103*4882a593Smuzhiyun void rtw_phydm_read_efuse(_adapter *adapter); 104*4882a593Smuzhiyun bool rtw_phydm_set_crystal_cap(_adapter *adapter, u8 crystal_cap); 105*4882a593Smuzhiyun 106*4882a593Smuzhiyun #ifdef CONFIG_SUPPORT_DYNAMIC_TXPWR 107*4882a593Smuzhiyun void rtw_phydm_set_dyntxpwr(_adapter *adapter, u8 *desc, u8 mac_id); 108*4882a593Smuzhiyun #endif 109*4882a593Smuzhiyun 110*4882a593Smuzhiyun #ifdef CONFIG_LPS_PG 111*4882a593Smuzhiyun void rtw_phydm_lps_pg_hdl(_adapter *adapter, struct sta_info *sta, bool in_lpspg); 112*4882a593Smuzhiyun #endif 113*4882a593Smuzhiyun #ifdef CONFIG_LPS_PWR_TRACKING 114*4882a593Smuzhiyun void rtw_phydm_pwr_tracking_directly(_adapter *adapter); 115*4882a593Smuzhiyun #endif 116*4882a593Smuzhiyun 117*4882a593Smuzhiyun #ifdef CONFIG_CTRL_TXSS_BY_TP 118*4882a593Smuzhiyun void rtw_phydm_trx_cfg(_adapter *adapter, bool tx_1ss); 119*4882a593Smuzhiyun #endif 120*4882a593Smuzhiyun u8 rtw_hal_runtime_trx_path_decision(_adapter *adapter); 121*4882a593Smuzhiyun bool rtw_phydm_rfe_ctrl_gpio(_adapter *adapter, u8 gpio_num); 122*4882a593Smuzhiyun #endif /* __HAL_DM_H__ */ 123