1 /****************************************************************************** 2 * 3 * Copyright(c) 2016 - 2017 Realtek Corporation. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 *****************************************************************************/ 15 #ifndef __HALBTC_OUT_SRC_H__ 16 #define __HALBTC_OUT_SRC_H__ 17 18 enum { 19 BTC_CCK_1, 20 BTC_CCK_2, 21 BTC_CCK_5_5, 22 BTC_CCK_11, 23 BTC_OFDM_6, 24 BTC_OFDM_9, 25 BTC_OFDM_12, 26 BTC_OFDM_18, 27 BTC_OFDM_24, 28 BTC_OFDM_36, 29 BTC_OFDM_48, 30 BTC_OFDM_54, 31 BTC_MCS_0, 32 BTC_MCS_1, 33 BTC_MCS_2, 34 BTC_MCS_3, 35 BTC_MCS_4, 36 BTC_MCS_5, 37 BTC_MCS_6, 38 BTC_MCS_7, 39 BTC_MCS_8, 40 BTC_MCS_9, 41 BTC_MCS_10, 42 BTC_MCS_11, 43 BTC_MCS_12, 44 BTC_MCS_13, 45 BTC_MCS_14, 46 BTC_MCS_15, 47 BTC_MCS_16, 48 BTC_MCS_17, 49 BTC_MCS_18, 50 BTC_MCS_19, 51 BTC_MCS_20, 52 BTC_MCS_21, 53 BTC_MCS_22, 54 BTC_MCS_23, 55 BTC_MCS_24, 56 BTC_MCS_25, 57 BTC_MCS_26, 58 BTC_MCS_27, 59 BTC_MCS_28, 60 BTC_MCS_29, 61 BTC_MCS_30, 62 BTC_MCS_31, 63 BTC_VHT_1SS_MCS_0, 64 BTC_VHT_1SS_MCS_1, 65 BTC_VHT_1SS_MCS_2, 66 BTC_VHT_1SS_MCS_3, 67 BTC_VHT_1SS_MCS_4, 68 BTC_VHT_1SS_MCS_5, 69 BTC_VHT_1SS_MCS_6, 70 BTC_VHT_1SS_MCS_7, 71 BTC_VHT_1SS_MCS_8, 72 BTC_VHT_1SS_MCS_9, 73 BTC_VHT_2SS_MCS_0, 74 BTC_VHT_2SS_MCS_1, 75 BTC_VHT_2SS_MCS_2, 76 BTC_VHT_2SS_MCS_3, 77 BTC_VHT_2SS_MCS_4, 78 BTC_VHT_2SS_MCS_5, 79 BTC_VHT_2SS_MCS_6, 80 BTC_VHT_2SS_MCS_7, 81 BTC_VHT_2SS_MCS_8, 82 BTC_VHT_2SS_MCS_9, 83 BTC_VHT_3SS_MCS_0, 84 BTC_VHT_3SS_MCS_1, 85 BTC_VHT_3SS_MCS_2, 86 BTC_VHT_3SS_MCS_3, 87 BTC_VHT_3SS_MCS_4, 88 BTC_VHT_3SS_MCS_5, 89 BTC_VHT_3SS_MCS_6, 90 BTC_VHT_3SS_MCS_7, 91 BTC_VHT_3SS_MCS_8, 92 BTC_VHT_3SS_MCS_9, 93 BTC_VHT_4SS_MCS_0, 94 BTC_VHT_4SS_MCS_1, 95 BTC_VHT_4SS_MCS_2, 96 BTC_VHT_4SS_MCS_3, 97 BTC_VHT_4SS_MCS_4, 98 BTC_VHT_4SS_MCS_5, 99 BTC_VHT_4SS_MCS_6, 100 BTC_VHT_4SS_MCS_7, 101 BTC_VHT_4SS_MCS_8, 102 BTC_VHT_4SS_MCS_9, 103 BTC_MCS_32, 104 BTC_UNKNOWN, 105 BTC_PKT_MGNT, 106 BTC_PKT_CTRL, 107 BTC_PKT_UNKNOWN, 108 BTC_PKT_NOT_FOR_ME, 109 BTC_RATE_MAX 110 }; 111 112 enum { 113 BTC_MULTIPORT_SCC, 114 BTC_MULTIPORT_MCC_DUAL_CHANNEL, 115 BTC_MULTIPORT_MCC_DUAL_BAND, 116 BTC_MULTIPORT_MAX 117 }; 118 119 #define BTC_COEX_8822B_COMMON_CODE 0 120 #define BTC_COEX_OFFLOAD 0 121 #define BTC_TMP_BUF_SHORT 20 122 123 extern u1Byte gl_btc_trace_buf[]; 124 #define BTC_SPRINTF rsprintf 125 #define BTC_TRACE(_MSG_)\ 126 do {\ 127 if (GLBtcDbgType[COMP_COEX] & BIT(DBG_LOUD)) {\ 128 RTW_INFO("%s", _MSG_);\ 129 } \ 130 } while (0) 131 #define BT_PrintData(adapter, _MSG_, len, data) RTW_DBG_DUMP((_MSG_), data, len) 132 133 134 #define NORMAL_EXEC FALSE 135 #define FORCE_EXEC TRUE 136 137 #define NM_EXCU FALSE 138 #define FC_EXCU TRUE 139 140 #define BTC_RF_OFF 0x0 141 #define BTC_RF_ON 0x1 142 143 #define BTC_RF_A 0x0 144 #define BTC_RF_B 0x1 145 #define BTC_RF_C 0x2 146 #define BTC_RF_D 0x3 147 148 #define BTC_SMSP SINGLEMAC_SINGLEPHY 149 #define BTC_DMDP DUALMAC_DUALPHY 150 #define BTC_DMSP DUALMAC_SINGLEPHY 151 #define BTC_MP_UNKNOWN 0xff 152 153 #define BT_COEX_ANT_TYPE_PG 0 154 #define BT_COEX_ANT_TYPE_ANTDIV 1 155 #define BT_COEX_ANT_TYPE_DETECTED 2 156 157 #define BTC_MIMO_PS_STATIC 0 /* 1ss */ 158 #define BTC_MIMO_PS_DYNAMIC 1 /* 2ss */ 159 160 #define BTC_RATE_DISABLE 0 161 #define BTC_RATE_ENABLE 1 162 163 /* single Antenna definition */ 164 #define BTC_ANT_PATH_WIFI 0 165 #define BTC_ANT_PATH_BT 1 166 #define BTC_ANT_PATH_PTA 2 167 #define BTC_ANT_PATH_WIFI5G 3 168 #define BTC_ANT_PATH_AUTO 4 169 /* dual Antenna definition */ 170 #define BTC_ANT_WIFI_AT_MAIN 0 171 #define BTC_ANT_WIFI_AT_AUX 1 172 #define BTC_ANT_WIFI_AT_DIVERSITY 2 173 /* coupler Antenna definition */ 174 #define BTC_ANT_WIFI_AT_CPL_MAIN 0 175 #define BTC_ANT_WIFI_AT_CPL_AUX 1 176 177 /* for common code request */ 178 #define REG_LTE_IDR_COEX_CTRL 0x0038 179 #define REG_SYS_SDIO_CTRL 0x0070 180 #define REG_SYS_SDIO_CTRL3 0x0073 181 /* #define REG_RETRY_LIMIT 0x042a */ 182 /* #define REG_DARFRC 0x0430 */ 183 #define REG_DARFRCH 0x0434 184 #define REG_CCK_CHECK 0x0454 185 #define REG_AMPDU_MAX_TIME_V1 0x0455 186 #define REG_TX_HANG_CTRL 0x045E 187 #define REG_LIFETIME_EN 0x0426 188 #define REG_BT_COEX_TABLE0 0x06C0 189 #define REG_BT_COEX_TABLE1 0x06C4 190 #define REG_BT_COEX_BRK_TABLE 0x06C8 191 #define REG_BT_COEX_TABLE_H 0x06CC 192 #define REG_BT_ACT_STATISTICS 0x0770 193 #define REG_BT_ACT_STATISTICS_1 0x0774 194 #define REG_BT_STAT_CTRL 0x0778 195 196 #define BIT_EN_GNT_BT_AWAKE BIT(3) 197 #define BIT_EN_BCN_FUNCTION BIT(3) 198 #define BIT_EN_BCN_PKT_REL BIT(6) 199 #define BIT_FEN_BB_GLB_RST BIT(1) 200 #define BIT_FEN_BB_RSTB BIT(0) 201 202 #define TDMA_4SLOT BIT(8) 203 204 /* for 2T2R -> 2T1R coex MIMO-PS mechanism tranlation */ 205 #define BTC_2GTDD_MAX_TRY 3 /* the max retry count for 1R->2R */ 206 #define BTC_2GFDD_MAX_STAY 300 /* the max stay time at 1R if 2R try-able (unit: 2s) */ 207 208 typedef enum _BTC_POWERSAVE_TYPE { 209 BTC_PS_WIFI_NATIVE = 0, /* wifi original power save behavior */ 210 BTC_PS_LPS_ON = 1, 211 BTC_PS_LPS_OFF = 2, 212 BTC_PS_MAX 213 } BTC_POWERSAVE_TYPE, *PBTC_POWERSAVE_TYPE; 214 215 typedef enum _BTC_BT_REG_TYPE { 216 BTC_BT_REG_RF = 0, 217 BTC_BT_REG_MODEM = 1, 218 BTC_BT_REG_BLUEWIZE = 2, 219 BTC_BT_REG_VENDOR = 3, 220 BTC_BT_REG_LE = 4, 221 BTC_BT_REG_MAX 222 } BTC_BT_REG_TYPE, *PBTC_BT_REG_TYPE; 223 224 typedef enum _BTC_CHIP_INTERFACE { 225 BTC_INTF_UNKNOWN = 0, 226 BTC_INTF_PCI = 1, 227 BTC_INTF_USB = 2, 228 BTC_INTF_SDIO = 3, 229 BTC_INTF_MAX 230 } BTC_CHIP_INTERFACE, *PBTC_CHIP_INTERFACE; 231 232 typedef enum _BTC_CHIP_TYPE { 233 BTC_CHIP_UNDEF = 0, 234 BTC_CHIP_CSR_BC4 = 1, 235 BTC_CHIP_CSR_BC8 = 2, 236 BTC_CHIP_RTL8723A = 3, 237 BTC_CHIP_RTL8821 = 4, 238 BTC_CHIP_RTL8723B = 5, 239 BTC_CHIP_RTL8822B = 6, 240 BTC_CHIP_RTL8822C = 7, 241 BTC_CHIP_RTL8821C = 8, 242 BTC_CHIP_RTL8821A = 9, 243 BTC_CHIP_RTL8723D = 10, 244 BTC_CHIP_RTL8703B = 11, 245 BTC_CHIP_RTL8725A = 12, 246 BTC_CHIP_RTL8723F = 13, 247 BTC_CHIP_MAX 248 } BTC_CHIP_TYPE, *PBTC_CHIP_TYPE; 249 250 /* following is for wifi link status */ 251 #define WIFI_STA_CONNECTED BIT0 252 #define WIFI_AP_CONNECTED BIT1 253 #define WIFI_HS_CONNECTED BIT2 254 #define WIFI_P2P_GO_CONNECTED BIT3 255 #define WIFI_P2P_GC_CONNECTED BIT4 256 257 /* following is for command line utility */ 258 #define CL_SPRINTF rsprintf 259 #define CL_PRINTF DCMD_Printf 260 #define CL_STRNCAT(dst, dst_size, src, src_size) rstrncat(dst, src, src_size) 261 262 static const char *const glbt_info_src[] = { 263 "BT Info[wifi fw]", 264 "BT Info[bt rsp]", 265 "BT Info[bt auto report]", 266 }; 267 268 #define BTC_INFO_FTP BIT(7) 269 #define BTC_INFO_A2DP BIT(6) 270 #define BTC_INFO_HID BIT(5) 271 #define BTC_INFO_SCO_BUSY BIT(4) 272 #define BTC_INFO_ACL_BUSY BIT(3) 273 #define BTC_INFO_INQ_PAGE BIT(2) 274 #define BTC_INFO_SCO_ESCO BIT(1) 275 #define BTC_INFO_CONNECTION BIT(0) 276 277 #define BTC_BTINFO_LENGTH_MAX 10 278 279 enum btc_gnt_setup_state { 280 BTC_GNT_SET_SW_LOW = 0x0, 281 BTC_GNT_SET_SW_HIGH = 0x1, 282 BTC_GNT_SET_HW_PTA = 0x2, 283 BTC_GNT_SET_MAX 284 }; 285 286 enum btc_gnt_setup_state_2 { 287 BTC_GNT_HW_PTA = 0x0, 288 BTC_GNT_SW_LOW = 0x1, 289 BTC_GNT_SW_HIGH = 0x3, 290 BTC_GNT_MAX 291 }; 292 293 enum btc_path_ctrl_owner { 294 BTC_OWNER_BT = 0x0, 295 BTC_OWNER_WL = 0x1, 296 BTC_OWNER_MAX 297 }; 298 299 enum btc_gnt_ctrl_type { 300 BTC_GNT_CTRL_BY_PTA = 0x0, 301 BTC_GNT_CTRL_BY_SW = 0x1, 302 BTC_GNT_CTRL_MAX 303 }; 304 305 enum btc_gnt_ctrl_block { 306 BTC_GNT_BLOCK_RFC_BB = 0x0, 307 BTC_GNT_BLOCK_RFC = 0x1, 308 BTC_GNT_BLOCK_BB = 0x2, 309 BTC_GNT_BLOCK_MAX 310 }; 311 312 enum btc_lte_coex_table_type { 313 BTC_CTT_WL_VS_LTE = 0x0, 314 BTC_CTT_BT_VS_LTE = 0x1, 315 BTC_CTT_MAX 316 }; 317 318 enum btc_lte_break_table_type { 319 BTC_LBTT_WL_BREAK_LTE = 0x0, 320 BTC_LBTT_BT_BREAK_LTE = 0x1, 321 BTC_LBTT_LTE_BREAK_WL = 0x2, 322 BTC_LBTT_LTE_BREAK_BT = 0x3, 323 BTC_LBTT_MAX 324 }; 325 326 enum btc_btinfo_src { 327 BTC_BTINFO_SRC_WL_FW = 0x0, 328 BTC_BTINFO_SRC_BT_RSP = 0x1, 329 BTC_BTINFO_SRC_BT_ACT = 0x2, 330 BTC_BTINFO_SRC_BT_IQK = 0x3, 331 BTC_BTINFO_SRC_BT_SCBD = 0x4, 332 BTC_BTINFO_SRC_H2C60 = 0x5, 333 BTC_BTINFO_SRC_BT_PSD = 0x6, 334 BTC_BTINFO_SRC_BT_SLOT1 = 0x7, 335 BTC_BTINFO_SRC_BT_SLOT2 = 0x8, 336 BTC_BTINFO_SRC_MAX 337 }; 338 339 enum btc_bt_profile { 340 BTC_BTPROFILE_NONE = 0, 341 BTC_BTPROFILE_HFP = BIT(0), 342 BTC_BTPROFILE_HID = BIT(1), 343 BTC_BTPROFILE_A2DP = BIT(2), 344 BTC_BTPROFILE_PAN = BIT(3), 345 BTC_BTPROFILE_MAX = 0xf 346 }; 347 348 static const char *const bt_profile_string[] = { 349 "None", 350 "HFP", 351 "HID", 352 "HID + HFP", 353 "A2DP", 354 "A2DP + HFP", 355 "A2DP + HID", 356 "PAN + HID + HFP", 357 "PAN", 358 "PAN + HFP", 359 "PAN + HID", 360 "PAN + HID + HFP", 361 "PAN + A2DP", 362 "PAN + A2DP + HFP", 363 "PAN + A2DP + HID", 364 "PAN + A2DP + HID + HFP" 365 }; 366 367 enum btc_bt_status { 368 BTC_BTSTATUS_NCON_IDLE = 0x0, 369 BTC_BTSTATUS_CON_IDLE = 0x1, 370 BTC_BTSTATUS_INQ_PAGE = 0x2, 371 BTC_BTSTATUS_ACL_BUSY = 0x3, 372 BTC_BTSTATUS_SCO_BUSY = 0x4, 373 BTC_BTSTATUS_ACL_SCO_BUSY = 0x5, 374 BTC_BTSTATUS_MAX 375 }; 376 377 static const char *const bt_status_string[] = { 378 "BT Non-Connected-idle", 379 "BT Connected-idle", 380 "BT Inq-page", 381 "BT ACL-busy", 382 "BT SCO-busy", 383 "BT ACL-SCO-busy", 384 "BT Non-Defined-state" 385 }; 386 387 enum btc_coex_algo { 388 BTC_COEX_NOPROFILE = 0x0, 389 BTC_COEX_HFP = 0x1, 390 BTC_COEX_HID = 0x2, 391 BTC_COEX_A2DP = 0x3, 392 BTC_COEX_PAN = 0x4, 393 BTC_COEX_A2DP_HID = 0x5, 394 BTC_COEX_A2DP_PAN = 0x6, 395 BTC_COEX_PAN_HID = 0x7, 396 BTC_COEX_A2DP_PAN_HID = 0x8, 397 BTC_COEX_MAX 398 }; 399 400 static const char *const coex_algo_string[] = { 401 "No Profile", 402 "HFP", 403 "HID", 404 "A2DP", 405 "PAN", 406 "A2DP + HID", 407 "A2DP + PAN", 408 "PAN + HID", 409 "A2DP + PAN + HID" 410 }; 411 412 enum btc_ext_ant_switch_type { 413 BTC_SWITCH_NONE = 0x0, 414 BTC_SWITCH_SPDT = 0x1, 415 BTC_SWITCH_SP3T = 0x2, 416 BTC_SWITCH_DPDT = 0x3, 417 BTC_SWITCH_ANTMAX 418 }; 419 420 enum btc_ext_ant_switch_ctrl_type { 421 BTC_SWITCH_CTRL_BY_BBSW = 0x0, 422 BTC_SWITCH_CTRL_BY_PTA = 0x1, 423 BTC_SWITCH_CTRL_BY_ANTDIV = 0x2, 424 BTC_SWITCH_CTRL_BY_MAC = 0x3, 425 BTC_SWITCH_CTRL_BY_BT = 0x4, 426 BTC_SWITCH_CTRL_BY_FW = 0x5, 427 BTC_SWITCH_CTRL_MAX 428 }; 429 430 enum btc_ext_ant_switch_pos_type { 431 BTC_SWITCH_TO_BT = 0x0, 432 BTC_SWITCH_TO_WLG = 0x1, 433 BTC_SWITCH_TO_WLA = 0x2, 434 BTC_SWITCH_TO_NOCARE = 0x3, 435 BTC_SWITCH_TO_WLG_BT = 0x4, 436 BTC_SWITCH_TO_MAX 437 }; 438 439 enum btx_set_ant_phase { 440 BTC_ANT_INIT = 0x0, 441 BTC_ANT_WONLY = 0x1, 442 BTC_ANT_WOFF = 0x2, 443 BTC_ANT_2G = 0x3, 444 BTC_ANT_5G = 0x4, 445 BTC_ANT_BTMP = 0x5, 446 BTC_ANT_POWERON = 0x6, 447 BTC_ANT_2G_WL = 0x7, 448 BTC_ANT_2G_BT = 0x8, 449 BTC_ANT_MCC = 0x9, 450 BTC_ANT_2G_WLBT = 0xa, 451 BTC_ANT_2G_FREERUN = 0xb, 452 BTC_ANT_MAX 453 }; 454 455 /*ADD SCOREBOARD TO FIX BT LPS 32K ISSUE WHILE WL BUSY*/ 456 enum btc_wl2bt_scoreboard { 457 BTC_SCBD_ACTIVE = BIT(0), 458 BTC_SCBD_ON = BIT(1), 459 BTC_SCBD_SCAN = BIT(2), 460 BTC_SCBD_UNDERTEST = BIT(3), 461 BTC_SCBD_RXGAIN = BIT(4), 462 BTC_SCBD_WLBUSY = BIT(7), 463 BTC_SCBD_EXTFEM = BIT(8), 464 BTC_SCBD_TDMA = BIT(9), 465 BTC_SCBD_FIX2M = BIT(10), 466 BTC_SCBD_MAILBOX_DBG = BIT(14), 467 BTC_SCBD_ALL = 0xffff, 468 BTC_SCBD_ALL_32BIT = 0xffffffff 469 }; 470 471 enum btc_bt2wl_scoreboard { 472 BTC_SCBD_BT_ONOFF = BIT(1), 473 BTC_SCBD_BT_LPS = BIT(7) 474 }; 475 enum btc_scoreboard_bit_num { 476 BTC_SCBD_16_BIT = BIT(0), 477 BTC_SCBD_32_BIT = BIT(1) 478 }; 479 480 enum btc_runreason { 481 BTC_RSN_2GSCANSTART = 0x0, 482 BTC_RSN_5GSCANSTART = 0x1, 483 BTC_RSN_SCANFINISH = 0x2, 484 BTC_RSN_2GSWITCHBAND = 0x3, 485 BTC_RSN_5GSWITCHBAND = 0x4, 486 BTC_RSN_2GCONSTART = 0x5, 487 BTC_RSN_5GCONSTART = 0x6, 488 BTC_RSN_2GCONFINISH = 0x7, 489 BTC_RSN_5GCONFINISH = 0x8, 490 BTC_RSN_2GMEDIA = 0x9, 491 BTC_RSN_5GMEDIA = 0xa, 492 BTC_RSN_MEDIADISCON = 0xb, 493 BTC_RSN_2GSPECIALPKT = 0xc, 494 BTC_RSN_5GSPECIALPKT = 0xd, 495 BTC_RSN_BTINFO = 0xe, 496 BTC_RSN_PERIODICAL = 0xf, 497 BTC_RSN_PNP = 0x10, 498 BTC_RSN_LPS = 0x11, 499 BTC_RSN_TIMERUP = 0x12, 500 BTC_RSN_WLSTATUS = 0x13, 501 BTC_RSN_BTCNT = 0x14, 502 BTC_RSN_RFK = 0x15, 503 BTC_RSN_MAX 504 }; 505 506 static const char *const run_reason_string[] = { 507 "2G_SCAN_START", 508 "5G_SCAN_START", 509 "SCAN_FINISH", 510 "2G_SWITCH_BAND", 511 "5G_SWITCH_BAND", 512 "2G_CONNECT_START", 513 "5G_CONNECT_START", 514 "2G_CONNECT_FINISH", 515 "5G_CONNECT_FINISH", 516 "2G_MEDIA_STATUS", 517 "5G_MEDIA_STATUS", 518 "MEDIA_DISCONNECT", 519 "2G_SPECIALPKT", 520 "5G_SPECIALPKT", 521 "BTINFO", 522 "PERIODICAL", 523 "PNPNotify", 524 "LPSNotify", 525 "TimerUp", 526 "WL_STATUS_CHANGE", 527 "BT_CNT_CHANGE", 528 "WL_RFK", 529 "Reason Max" 530 }; 531 532 enum btc_wl_link_mode { 533 BTC_WLINK_2G1PORT = 0x0, 534 BTC_WLINK_2GMPORT = 0x1, 535 BTC_WLINK_25GMPORT = 0x2, 536 BTC_WLINK_5G = 0x3, 537 BTC_WLINK_2GGO = 0x4, 538 BTC_WLINK_2GGC = 0x5, 539 BTC_WLINK_BTMR = 0x6, 540 BTC_WLINK_2GFREE = 0x7, 541 BTC_WLINK_MAX 542 }; 543 544 static const char *const coex_mode_string[] = { 545 "2G-SP", 546 "2G-MP", 547 "25G-MP", 548 "5G", 549 "2G-P2P-GO", 550 "2G-P2P-GC", 551 "BT-MR", 552 "2G1RFREE", 553 "unknow" 554 }; 555 556 enum btc_bt_state_cnt { 557 BTC_CNT_BT_RETRY = 0x0, 558 BTC_CNT_BT_REINIT = 0x1, 559 BTC_CNT_BT_POPEVENT = 0x2, 560 BTC_CNT_BT_SETUPLINK = 0x3, 561 BTC_CNT_BT_IGNWLANACT = 0x4, 562 BTC_CNT_BT_INQ = 0x5, 563 BTC_CNT_BT_PAGE = 0x6, 564 BTC_CNT_BT_ROLESWITCH = 0x7, 565 BTC_CNT_BT_AFHUPDATE = 0x8, 566 BTC_CNT_BT_DISABLE = 0x9, 567 BTC_CNT_BT_INFOUPDATE = 0xa, 568 BTC_CNT_BT_IQK = 0xb, 569 BTC_CNT_BT_IQKFAIL = 0xc, 570 BTC_CNT_BT_TRX = 0xd, 571 BTC_CNT_BT_MAX 572 }; 573 574 enum btc_wl_state_cnt { 575 BTC_CNT_WL_SCANAP = 0x0, 576 BTC_CNT_WL_ARP = 0x1, 577 BTC_CNT_WL_GNTERR = 0x2, 578 BTC_CNT_WL_PSFAIL = 0x3, 579 BTC_CNT_WL_COEXRUN = 0x4, 580 BTC_CNT_WL_COEXINFO1 = 0x5, 581 BTC_CNT_WL_COEXINFO2 = 0x6, 582 BTC_CNT_WL_AUTOSLOT_HANG = 0x7, 583 BTC_CNT_WL_NOISY0 = 0x8, 584 BTC_CNT_WL_NOISY1 = 0x9, 585 BTC_CNT_WL_NOISY2 = 0xa, 586 BTC_CNT_WL_ACTIVEPORT = 0xb, 587 BTC_CNT_WL_LEAKAP_NORX = 0xc, 588 BTC_CNT_WL_FW_NOTIFY = 0xd, 589 BTC_CNT_WL_2G_TDDTRY = 0xe, 590 BTC_CNT_WL_2G_FDDSTAY = 0xf, 591 BTC_CNT_WL_MAX 592 }; 593 594 enum btc_wl_crc_cnt { 595 BTC_WLCRC_11BOK = 0x0, 596 BTC_WLCRC_11GOK = 0x1, 597 BTC_WLCRC_11NOK = 0x2, 598 BTC_WLCRC_11VHTOK = 0x3, 599 BTC_WLCRC_11BERR = 0x4, 600 BTC_WLCRC_11GERR = 0x5, 601 BTC_WLCRC_11NERR = 0x6, 602 BTC_WLCRC_11VHTERR = 0x7, 603 BTC_WLCRC_MAX 604 }; 605 606 enum btc_timer_cnt { 607 BTC_TIMER_WL_STAYBUSY = 0x0, 608 BTC_TIMER_WL_COEXFREEZE = 0x1, 609 BTC_TIMER_WL_SPECPKT = 0x2, 610 BTC_TIMER_WL_CONNPKT = 0x3, 611 BTC_TIMER_WL_PNPWAKEUP = 0x4, 612 BTC_TIMER_WL_CCKLOCK = 0x5, 613 BTC_TIMER_WL_FWDBG = 0x6, 614 BTC_TIMER_BT_RELINK = 0x7, 615 BTC_TIMER_BT_REENABLE = 0x8, 616 BTC_TIMER_BT_MULTILINK = 0x9, 617 BTC_TIMER_BT_INQPAGE = 0xa, 618 BTC_TIMER_BT_A2DP_ACT = 0xb, 619 BTC_TIMER_MAX 620 }; 621 622 enum btc_wl_status_change { 623 BTC_WLSTATUS_CHANGE_TOIDLE = 0x0, 624 BTC_WLSTATUS_CHANGE_TOBUSY = 0x1, 625 BTC_WLSTATUS_CHANGE_RSSI = 0x2, 626 BTC_WLSTATUS_CHANGE_LINKINFO = 0x3, 627 BTC_WLSTATUS_CHANGE_DIR = 0x4, 628 BTC_WLSTATUS_CHANGE_NOISY = 0x5, 629 BTC_WLSTATUS_CHANGE_BTCNT = 0x6, 630 BTC_WLSTATUS_CHANGE_LOCKTRY = 0x7, 631 BTC_WLSTATUS_CHANGE_MAX 632 }; 633 634 enum btc_commom_chip_setup { 635 BTC_CSETUP_INIT_HW = 0x0, 636 BTC_CSETUP_ANT_SWITCH = 0x1, 637 BTC_CSETUP_GNT_FIX = 0x2, 638 BTC_CSETUP_GNT_DEBUG = 0x3, 639 BTC_CSETUP_RFE_TYPE = 0x4, 640 BTC_CSETUP_COEXINFO_HW = 0x5, 641 BTC_CSETUP_WL_TX_POWER = 0x6, 642 BTC_CSETUP_WL_RX_GAIN = 0x7, 643 BTC_CSETUP_WLAN_ACT_IPS = 0x8, 644 BTC_CSETUP_BT_CTRL_ACT = 0x9, 645 BTC_CSETUP_MAX 646 }; 647 648 enum btc_indirect_reg_type { 649 BTC_INDIRECT_1700 = 0x0, 650 BTC_INDIRECT_7C0 = 0x1, 651 BTC_INDIRECT_MAX 652 }; 653 654 enum btc_pstdma_type { 655 BTC_PSTDMA_FORCE_LPSOFF = 0x0, 656 BTC_PSTDMA_FORCE_LPSON = 0x1, 657 BTC_PSTDMA_MAX 658 }; 659 660 enum btc_btrssi_type { 661 BTC_BTRSSI_RATIO = 0x0, 662 BTC_BTRSSI_DBM = 0x1, 663 BTC_BTRSSI_MAX 664 }; 665 666 enum btc_wl_priority_mask { 667 BTC_WLPRI_RX_RSP = 2, 668 BTC_WLPRI_TX_RSP = 3, 669 BTC_WLPRI_TX_BEACON = 4, 670 BTC_WLPRI_TX_OFDM = 11, 671 BTC_WLPRI_TX_CCK = 12, 672 BTC_WLPRI_TX_BEACONQ = 27, 673 BTC_WLPRI_RX_CCK = 28, 674 BTC_WLPRI_RX_OFDM = 29, 675 BTC_WLPRI_MAX 676 }; 677 678 enum btc_ext_chip_id{ 679 BTC_EXT_CHIP_NONE, 680 BTC_EXT_CHIP_RF4CE, 681 BTC_EXT_CHIP_MAX 682 }; 683 684 enum btc_ext_chip_mode{ 685 BTC_EXTMODE_NORMAL, 686 BTC_EXTMODE_VOICE, 687 BTC_EXTMODE_MAX 688 }; 689 690 enum btc_wl_rfk_type { 691 BTC_PWR_TRK = 0, 692 BTC_IQK = 1, 693 BTC_LCK = 2, 694 BTC_DPK = 3, 695 BTC_TXGAPK = 4, 696 BTC_RFK_TYPE_MAX 697 }; 698 699 enum btc_wl_rfk_state { 700 BTC_RFK_START = 0, 701 BTC_RFK_END = 1, 702 BTC_RFK_STATE_MAX 703 }; 704 705 struct btc_board_info { 706 /* The following is some board information */ 707 u8 bt_chip_type; 708 u8 pg_ant_num; /* pg ant number */ 709 u8 btdm_ant_num; /* ant number for btdm */ 710 u8 btdm_ant_num_by_ant_det; /* ant number for btdm after antenna detection */ 711 u8 btdm_ant_pos; /* Bryant Add to indicate Antenna Position for (pg_ant_num = 2) && (btdm_ant_num =1) (DPDT+1Ant case) */ 712 u8 single_ant_path; /* current used for 8723b only, 1=>s0, 0=>s1 */ 713 boolean tfbga_package; /* for Antenna detect threshold */ 714 boolean btdm_ant_det_finish; 715 boolean btdm_ant_det_already_init_phydm; 716 u8 ant_type; 717 u8 rfe_type; 718 u8 ant_div_cfg; 719 boolean btdm_ant_det_complete_fail; 720 u8 ant_det_result; 721 boolean ant_det_result_five_complete; 722 u32 antdetval; 723 u8 customerID; 724 u8 customer_id; 725 u8 ant_distance; /* WL-BT antenna space for non-shared antenna */ 726 u8 ext_chip_id; 727 }; 728 729 struct btc_coex_dm { 730 boolean cur_ignore_wlan_act; 731 boolean cur_ps_tdma_on; 732 boolean cur_low_penalty_ra; 733 boolean cur_wl_rx_low_gain_en; 734 735 u8 bt_rssi_state[4]; 736 u8 wl_rssi_state[4]; 737 u8 cur_ps_tdma; 738 u8 ps_tdma_para[5]; 739 u8 fw_tdma_para[5]; 740 u8 cur_lps; 741 u8 cur_rpwm; 742 u8 cur_bt_pwr_lvl; 743 u8 cur_bt_lna_lvl; 744 u8 cur_wl_pwr_lvl; 745 u8 cur_algorithm; 746 u8 bt_status; 747 u8 wl_chnl_info[3]; 748 u8 cur_toggle_para[6]; 749 u8 bt_slot_length1[10]; 750 u8 bt_slot_length2[10]; 751 u32 cur_ant_pos_type; 752 u32 cur_switch_status; 753 u32 setting_tdma; 754 }; 755 756 struct btc_coex_sta { 757 boolean coex_freeze; 758 boolean coex_freerun; 759 boolean rf4ce_en; 760 boolean force_freerun; 761 boolean force_tdd; 762 763 boolean bt_disabled; 764 boolean bt_disabled_pre; 765 boolean bt_link_exist; 766 boolean bt_whck_test; 767 boolean bt_inq_page; 768 boolean bt_inq_page_pre; 769 boolean bt_inq_page_remain; 770 boolean bt_inq; 771 boolean bt_page; 772 boolean bt_ble_voice; 773 boolean bt_ble_exist; 774 boolean bt_hfp_exist; 775 boolean bt_a2dp_exist; 776 boolean bt_hid_exist; 777 boolean bt_pan_exist; // PAN or OPP 778 boolean bt_opp_exist; //OPP only 779 boolean bt_msft_mr_exist; 780 boolean bt_acl_busy; 781 boolean bt_fix_2M; 782 boolean bt_setup_link; 783 boolean bt_multi_link; 784 boolean bt_multi_link_pre; 785 boolean bt_multi_link_remain; 786 boolean bt_a2dp_sink; 787 boolean bt_reenable; 788 boolean bt_ble_scan_en; 789 boolean bt_slave; 790 boolean bt_a2dp_active; 791 boolean bt_a2dp_active_pre; 792 boolean bt_a2dp_active_remain; 793 boolean bt_slave_latency; 794 boolean bt_init_scan; 795 boolean bt_418_hid_exist; 796 boolean bt_ble_hid_exist; 797 boolean bt_mesh; 798 boolean bt_ctr_ok; 799 800 boolean wl_under_lps; 801 boolean wl_under_ips; 802 boolean wl_under_4way; 803 boolean wl_hi_pri_task1; 804 boolean wl_hi_pri_task2; 805 boolean wl_cck_lock; 806 boolean wl_cck_lock_pre; 807 boolean wl_cck_lock_ever; 808 boolean wl_force_lps_ctrl; 809 boolean wl_busy_pre; 810 boolean wl_gl_busy; 811 boolean wl_gl_busy_pre; 812 boolean wl_linkscan_proc; 813 boolean wl_mimo_ps; 814 boolean wl_cck_dead_lock_ap; 815 boolean wl_tx_limit_en; 816 boolean wl_ampdu_limit_en; 817 boolean wl_rxagg_limit_en; 818 boolean wl_connecting; 819 boolean wl_pnp_wakeup; 820 boolean wl_slot_toggle; 821 boolean wl_slot_toggle_change; /* if toggle to no-toggle */ 822 boolean wl_leak_ap; /* !is_no_wl_5ms_extend */ 823 boolean wl_blacklist_ap; 824 boolean wl_rfk; 825 826 u8 coex_table_type; 827 u8 coex_run_reason; 828 u8 tdma_byte4_modify_pre; 829 u8 kt_ver; 830 u8 gnt_workaround_state; 831 u8 tdma_timer_base; 832 u8 bt_rssi; 833 u8 bt_profile_num; 834 u8 bt_profile_num_pre; 835 u8 bt_info_c2h[BTC_BTINFO_SRC_MAX][BTC_BTINFO_LENGTH_MAX]; 836 u8 bt_info_lb2; 837 u8 bt_info_lb3; 838 u8 bt_info_hb0; 839 u8 bt_info_hb1; 840 u8 bt_info_hb2; 841 u8 bt_info_hb3; 842 u8 bt_ble_scan_type; 843 u8 bt_afh_map[10]; 844 u8 bt_a2dp_vendor_id; 845 u8 bt_hid_pair_num; 846 u8 bt_hid_slot; 847 u8 bt_a2dp_bitpool; 848 u8 bt_iqk_state; 849 u8 bt_sut_pwr_lvl[4]; 850 u8 bt_golden_rx_shift[4]; 851 u8 bt_ext_autoslot_thres; 852 u8 ext_chip_mode; 853 854 u8 wl_pnp_state_pre; 855 u8 wl_noisy_level; 856 u8 wl_fw_dbg_info[10]; 857 u8 wl_fw_dbg_info_pre[10]; 858 u8 wl_rx_rate; 859 u8 wl_tx_rate; 860 u8 wl_rts_rx_rate; 861 u8 wl_center_ch; 862 u8 wl_tx_macid; 863 u8 wl_tx_retry_ratio; 864 u8 wl_coex_mode; 865 u8 wl_iot_peer; 866 u8 wl_ra_thres; 867 u8 wl_ampdulen; 868 u8 wl_rxagg_size; 869 u8 wl_toggle_para[6]; 870 u8 wl_toggle_interval; 871 872 u16 score_board_BW; 873 u32 score_board_WB; 874 u16 bt_reg_vendor_ac; 875 u16 bt_reg_vendor_ae; 876 u32 bt_reg_vendor_dac; 877 u16 bt_reg_modem_a; 878 u16 bt_reg_rf_2; 879 u16 bt_reg_rf_9; 880 u16 wl_txlimit; 881 882 u32 score_board_BW_32bit; 883 u32 score_board_WB_32bit; 884 u32 hi_pri_tx; 885 u32 hi_pri_rx; 886 u32 lo_pri_tx; 887 u32 lo_pri_rx; 888 u32 bt_supported_feature; 889 u32 bt_supported_version; 890 u32 bt_ble_scan_para[3]; 891 u32 bt_a2dp_device_name; 892 u32 bt_a2dp_flush_time; 893 u32 wl_arfb1; 894 u32 wl_arfb2; 895 u32 wl_traffic_dir; 896 u32 wl_bw; 897 u32 cnt_bt_info_c2h[BTC_BTINFO_SRC_MAX]; 898 u32 cnt_bt[BTC_CNT_BT_MAX]; 899 u32 cnt_wl[BTC_CNT_WL_MAX]; 900 u32 cnt_timer[BTC_TIMER_MAX]; 901 }; 902 903 struct btc_rfe_type { 904 boolean ant_switch_exist; 905 boolean ant_switch_diversity; /* If diversity on */ 906 boolean ant_switch_with_bt; /* If WL_2G/BT use ext-switch at shared-ant */ 907 u8 rfe_module_type; 908 u8 ant_switch_type; 909 u8 ant_switch_polarity; 910 911 boolean band_switch_exist; 912 u8 band_switch_type; /* 0:DPDT, 1:SPDT */ 913 u8 band_switch_polarity; 914 915 /* If TRUE: WLG at BTG, If FALSE: WLG at WLAG */ 916 boolean wlg_at_btg; 917 }; 918 919 920 struct btc_wifi_link_info_ext { 921 boolean is_all_under_5g; 922 boolean is_mcc_25g; 923 boolean is_p2p_connected; 924 boolean is_ap_mode; 925 boolean is_scan; 926 boolean is_link; 927 boolean is_roam; 928 boolean is_4way; 929 boolean is_32k; 930 boolean is_connected; 931 u8 num_of_active_port; 932 u32 port_connect_status; 933 u32 traffic_dir; 934 u32 wifi_bw; 935 }; 936 937 struct btc_coex_table_para { 938 u32 bt; //0x6c0 939 u32 wl; //0x6c4 940 }; 941 942 struct btc_tdma_para { 943 u8 para[5]; 944 }; 945 946 struct btc_reg_byte_modify { 947 u32 addr; 948 u8 bitmask; 949 u8 val; 950 }; 951 952 struct btc_5g_afh_map { 953 u32 wl_5g_ch; 954 u8 bt_skip_ch; 955 u8 bt_skip_span; 956 }; 957 958 struct btc_rf_para { 959 u8 wl_pwr_dec_lvl; 960 u8 bt_pwr_dec_lvl; 961 boolean wl_low_gain_en; 962 u8 bt_lna_lvl; 963 }; 964 965 typedef enum _BTC_DBG_OPCODE { 966 BTC_DBG_SET_COEX_NORMAL = 0x0, 967 BTC_DBG_SET_COEX_WIFI_ONLY = 0x1, 968 BTC_DBG_SET_COEX_BT_ONLY = 0x2, 969 BTC_DBG_SET_COEX_DEC_BT_PWR = 0x3, 970 BTC_DBG_SET_COEX_BT_AFH_MAP = 0x4, 971 BTC_DBG_SET_COEX_BT_IGNORE_WLAN_ACT = 0x5, 972 BTC_DBG_SET_COEX_MANUAL_CTRL = 0x6, 973 BTC_DBG_MAX 974 } BTC_DBG_OPCODE, *PBTC_DBG_OPCODE; 975 976 typedef enum _BTC_RSSI_STATE { 977 BTC_RSSI_STATE_HIGH = 0x0, 978 BTC_RSSI_STATE_MEDIUM = 0x1, 979 BTC_RSSI_STATE_LOW = 0x2, 980 BTC_RSSI_STATE_STAY_HIGH = 0x3, 981 BTC_RSSI_STATE_STAY_MEDIUM = 0x4, 982 BTC_RSSI_STATE_STAY_LOW = 0x5, 983 BTC_RSSI_MAX 984 } BTC_RSSI_STATE, *PBTC_RSSI_STATE; 985 #define BTC_RSSI_HIGH(_rssi_) ((_rssi_ == BTC_RSSI_STATE_HIGH || _rssi_ == BTC_RSSI_STATE_STAY_HIGH) ? TRUE:FALSE) 986 #define BTC_RSSI_MEDIUM(_rssi_) ((_rssi_ == BTC_RSSI_STATE_MEDIUM || _rssi_ == BTC_RSSI_STATE_STAY_MEDIUM) ? TRUE:FALSE) 987 #define BTC_RSSI_LOW(_rssi_) ((_rssi_ == BTC_RSSI_STATE_LOW || _rssi_ == BTC_RSSI_STATE_STAY_LOW) ? TRUE:FALSE) 988 989 typedef enum _BTC_WIFI_ROLE { 990 BTC_ROLE_STATION = 0x0, 991 BTC_ROLE_AP = 0x1, 992 BTC_ROLE_IBSS = 0x2, 993 BTC_ROLE_HS_MODE = 0x3, 994 BTC_ROLE_MAX 995 } BTC_WIFI_ROLE, *PBTC_WIFI_ROLE; 996 997 typedef enum _BTC_WIRELESS_FREQ { 998 BTC_FREQ_2_4G = 0x0, 999 BTC_FREQ_5G = 0x1, 1000 BTC_FREQ_25G = 0x2, 1001 BTC_FREQ_MAX 1002 } BTC_WIRELESS_FREQ, *PBTC_WIRELESS_FREQ; 1003 1004 typedef enum _BTC_WIFI_BW_MODE { 1005 BTC_WIFI_BW_LEGACY = 0x0, 1006 BTC_WIFI_BW_HT20 = 0x1, 1007 BTC_WIFI_BW_HT40 = 0x2, 1008 BTC_WIFI_BW_HT80 = 0x3, 1009 BTC_WIFI_BW_HT160 = 0x4, 1010 BTC_WIFI_BW_MAX 1011 } BTC_WIFI_BW_MODE, *PBTC_WIFI_BW_MODE; 1012 1013 typedef enum _BTC_WIFI_TRAFFIC_DIR { 1014 BTC_WIFI_TRAFFIC_TX = 0x0, 1015 BTC_WIFI_TRAFFIC_RX = 0x1, 1016 BTC_WIFI_TRAFFIC_MAX 1017 } BTC_WIFI_TRAFFIC_DIR, *PBTC_WIFI_TRAFFIC_DIR; 1018 1019 typedef enum _BTC_WIFI_PNP { 1020 BTC_WIFI_PNP_WAKE_UP = 0x0, 1021 BTC_WIFI_PNP_SLEEP = 0x1, 1022 BTC_WIFI_PNP_SLEEP_KEEP_ANT = 0x2, 1023 BTC_WIFI_PNP_WOWLAN = 0x3, 1024 BTC_WIFI_PNP_MAX 1025 } BTC_WIFI_PNP, *PBTC_WIFI_PNP; 1026 1027 typedef enum _BTC_IOT_PEER { 1028 BTC_IOT_PEER_UNKNOWN = 0, 1029 BTC_IOT_PEER_REALTEK = 1, 1030 BTC_IOT_PEER_REALTEK_92SE = 2, 1031 BTC_IOT_PEER_BROADCOM = 3, 1032 BTC_IOT_PEER_RALINK = 4, 1033 BTC_IOT_PEER_ATHEROS = 5, 1034 BTC_IOT_PEER_CISCO = 6, 1035 BTC_IOT_PEER_MERU = 7, 1036 BTC_IOT_PEER_MARVELL = 8, 1037 BTC_IOT_PEER_REALTEK_SOFTAP = 9, /* peer is RealTek SOFT_AP, by Bohn, 2009.12.17 */ 1038 BTC_IOT_PEER_SELF_SOFTAP = 10, /* Self is SoftAP */ 1039 BTC_IOT_PEER_AIRGO = 11, 1040 BTC_IOT_PEER_INTEL = 12, 1041 BTC_IOT_PEER_RTK_APCLIENT = 13, 1042 BTC_IOT_PEER_REALTEK_81XX = 14, 1043 BTC_IOT_PEER_REALTEK_WOW = 15, 1044 BTC_IOT_PEER_REALTEK_JAGUAR_BCUTAP = 16, 1045 BTC_IOT_PEER_REALTEK_JAGUAR_CCUTAP = 17, 1046 BTC_IOT_PEER_MAX, 1047 } BTC_IOT_PEER, *PBTC_IOT_PEER; 1048 1049 /* for 8723b-d cut large current issue */ 1050 typedef enum _BTC_WIFI_COEX_STATE { 1051 BTC_WIFI_STAT_INIT, 1052 BTC_WIFI_STAT_IQK, 1053 BTC_WIFI_STAT_NORMAL_OFF, 1054 BTC_WIFI_STAT_MP_OFF, 1055 BTC_WIFI_STAT_NORMAL, 1056 BTC_WIFI_STAT_ANT_DIV, 1057 BTC_WIFI_STAT_MAX 1058 } BTC_WIFI_COEX_STATE, *PBTC_WIFI_COEX_STATE; 1059 1060 typedef enum _BTC_ANT_TYPE { 1061 BTC_ANT_TYPE_0, 1062 BTC_ANT_TYPE_1, 1063 BTC_ANT_TYPE_2, 1064 BTC_ANT_TYPE_3, 1065 BTC_ANT_TYPE_4, 1066 BTC_ANT_TYPE_MAX 1067 } BTC_ANT_TYPE, *PBTC_ANT_TYPE; 1068 1069 typedef enum _BTC_VENDOR { 1070 BTC_VENDOR_LENOVO, 1071 BTC_VENDOR_ASUS, 1072 BTC_VENDOR_OTHER 1073 } BTC_VENDOR, *PBTC_VENDOR; 1074 1075 1076 /* defined for BFP_BTC_GET */ 1077 typedef enum _BTC_GET_TYPE { 1078 /* type BOOLEAN */ 1079 BTC_GET_BL_HS_OPERATION, 1080 BTC_GET_BL_HS_CONNECTING, 1081 BTC_GET_BL_WIFI_FW_READY, 1082 BTC_GET_BL_WIFI_CONNECTED, 1083 BTC_GET_BL_WIFI_DUAL_BAND_CONNECTED, 1084 BTC_GET_BL_WIFI_LINK_INFO, 1085 BTC_GET_BL_WIFI_BUSY, 1086 BTC_GET_BL_WIFI_SCAN, 1087 BTC_GET_BL_WIFI_LINK, 1088 BTC_GET_BL_WIFI_ROAM, 1089 BTC_GET_BL_WIFI_4_WAY_PROGRESS, 1090 BTC_GET_BL_WIFI_UNDER_5G, 1091 BTC_GET_BL_WIFI_AP_MODE_ENABLE, 1092 BTC_GET_BL_WIFI_ENABLE_ENCRYPTION, 1093 BTC_GET_BL_WIFI_UNDER_B_MODE, 1094 BTC_GET_BL_EXT_SWITCH, 1095 BTC_GET_BL_WIFI_IS_IN_MP_MODE, 1096 BTC_GET_BL_IS_ASUS_8723B, 1097 BTC_GET_BL_RF4CE_CONNECTED, 1098 BTC_GET_BL_WIFI_LW_PWR_STATE, 1099 1100 /* type s4Byte */ 1101 BTC_GET_S4_WIFI_RSSI, 1102 BTC_GET_S4_HS_RSSI, 1103 1104 /* type u4Byte */ 1105 BTC_GET_U4_WIFI_BW, 1106 BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, 1107 BTC_GET_U4_WIFI_TRAFFIC_DIR, 1108 BTC_GET_U4_WIFI_FW_VER, 1109 BTC_GET_U4_WIFI_PHY_VER, 1110 BTC_GET_U4_WIFI_LINK_STATUS, 1111 BTC_GET_U4_BT_PATCH_VER, 1112 BTC_GET_U4_VENDOR, 1113 BTC_GET_U4_SUPPORTED_VERSION, 1114 BTC_GET_U4_SUPPORTED_FEATURE, 1115 BTC_GET_U4_BT_DEVICE_INFO, 1116 BTC_GET_U4_BT_FORBIDDEN_SLOT_VAL, 1117 BTC_GET_U4_BT_A2DP_FLUSH_VAL, 1118 BTC_GET_U4_WIFI_IQK_TOTAL, 1119 BTC_GET_U4_WIFI_IQK_OK, 1120 BTC_GET_U4_WIFI_IQK_FAIL, 1121 1122 /* type u1Byte */ 1123 BTC_GET_U1_WIFI_DOT11_CHNL, 1124 BTC_GET_U1_WIFI_CENTRAL_CHNL, 1125 BTC_GET_U1_WIFI_HS_CHNL, 1126 BTC_GET_U1_WIFI_P2P_CHNL, 1127 BTC_GET_U1_MAC_PHY_MODE, 1128 BTC_GET_U1_AP_NUM, 1129 BTC_GET_U1_ANT_TYPE, 1130 BTC_GET_U1_IOT_PEER, 1131 BTC_GET_BL_WIFI_BSSID, 1132 1133 /* type u2Byte */ 1134 BTC_GET_U2_BEACON_PERIOD, 1135 1136 /*===== for 1Ant ======*/ 1137 BTC_GET_U1_LPS_MODE, 1138 1139 BTC_GET_MAX 1140 } BTC_GET_TYPE, *PBTC_GET_TYPE; 1141 1142 /* defined for BFP_BTC_SET */ 1143 typedef enum _BTC_SET_TYPE { 1144 /* type BOOLEAN */ 1145 BTC_SET_BL_BT_DISABLE, 1146 BTC_SET_BL_BT_ENABLE_DISABLE_CHANGE, 1147 BTC_SET_BL_BT_TRAFFIC_BUSY, 1148 BTC_SET_BL_BT_LIMITED_DIG, 1149 BTC_SET_BL_FORCE_TO_ROAM, 1150 BTC_SET_BL_TO_REJ_AP_AGG_PKT, 1151 BTC_SET_BL_BT_CTRL_AGG_SIZE, 1152 BTC_SET_BL_INC_SCAN_DEV_NUM, 1153 BTC_SET_BL_BT_TX_RX_MASK, 1154 BTC_SET_BL_MIRACAST_PLUS_BT, 1155 BTC_SET_BL_BT_LNA_CONSTRAIN_LEVEL, 1156 BTC_SET_BL_BT_GOLDEN_RX_RANGE, 1157 1158 /* type u1Byte */ 1159 BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON, 1160 BTC_SET_U1_AGG_BUF_SIZE, 1161 1162 /* type trigger some action */ 1163 BTC_SET_ACT_GET_BT_RSSI, 1164 BTC_SET_ACT_AGGREGATE_CTRL, 1165 BTC_SET_ACT_ANTPOSREGRISTRY_CTRL, 1166 1167 // for mimo ps mode setting 1168 BTC_SET_MIMO_PS_MODE, 1169 /*===== for 1Ant ======*/ 1170 /* type BOOLEAN */ 1171 1172 /* type u1Byte */ 1173 BTC_SET_U1_RSSI_ADJ_VAL_FOR_1ANT_COEX_TYPE, 1174 BTC_SET_U1_LPS_VAL, 1175 BTC_SET_U1_RPWM_VAL, 1176 /* type trigger some action */ 1177 BTC_SET_ACT_LEAVE_LPS, 1178 BTC_SET_ACT_ENTER_LPS, 1179 BTC_SET_ACT_NORMAL_LPS, 1180 BTC_SET_ACT_PRE_NORMAL_LPS, 1181 BTC_SET_ACT_POST_NORMAL_LPS, 1182 BTC_SET_ACT_DISABLE_LOW_POWER, 1183 BTC_SET_ACT_UPDATE_RAMASK, 1184 BTC_SET_ACT_SEND_MIMO_PS, 1185 /* BT Coex related */ 1186 BTC_SET_ACT_CTRL_BT_INFO, 1187 BTC_SET_ACT_CTRL_BT_COEX, 1188 BTC_SET_ACT_CTRL_8723B_ANT, 1189 BTC_SET_RESET_COEX_VAR, 1190 /*=================*/ 1191 BTC_SET_MAX 1192 } BTC_SET_TYPE, *PBTC_SET_TYPE; 1193 1194 typedef enum _BTC_DBG_DISP_TYPE { 1195 BTC_DBG_DISP_COEX_STATISTICS = 0x0, 1196 BTC_DBG_DISP_BT_LINK_INFO = 0x1, 1197 BTC_DBG_DISP_WIFI_STATUS = 0x2, 1198 BTC_DBG_DISP_MAX 1199 } BTC_DBG_DISP_TYPE, *PBTC_DBG_DISP_TYPE; 1200 1201 typedef enum _BTC_NOTIFY_TYPE_IPS { 1202 BTC_IPS_LEAVE = 0x0, 1203 BTC_IPS_ENTER = 0x1, 1204 BTC_IPS_MAX 1205 } BTC_NOTIFY_TYPE_IPS, *PBTC_NOTIFY_TYPE_IPS; 1206 typedef enum _BTC_NOTIFY_TYPE_LPS { 1207 BTC_LPS_DISABLE = 0x0, 1208 BTC_LPS_ENABLE = 0x1, 1209 BTC_LPS_MAX 1210 } BTC_NOTIFY_TYPE_LPS, *PBTC_NOTIFY_TYPE_LPS; 1211 typedef enum _BTC_NOTIFY_TYPE_SCAN { 1212 BTC_SCAN_FINISH = 0x0, 1213 BTC_SCAN_START = 0x1, 1214 BTC_SCAN_START_2G = 0x2, 1215 BTC_SCAN_START_5G = 0x3, 1216 BTC_SCAN_MAX 1217 } BTC_NOTIFY_TYPE_SCAN, *PBTC_NOTIFY_TYPE_SCAN; 1218 typedef enum _BTC_NOTIFY_TYPE_SWITCHBAND { 1219 BTC_NOT_SWITCH = 0x0, 1220 BTC_SWITCH_TO_24G = 0x1, 1221 BTC_SWITCH_TO_5G = 0x2, 1222 BTC_SWITCH_TO_24G_NOFORSCAN = 0x3, 1223 BTC_SWITCH_MAX 1224 } BTC_NOTIFY_TYPE_SWITCHBAND, *PBTC_NOTIFY_TYPE_SWITCHBAND; 1225 typedef enum _BTC_NOTIFY_TYPE_ASSOCIATE { 1226 BTC_ASSOCIATE_FINISH = 0x0, 1227 BTC_ASSOCIATE_START = 0x1, 1228 BTC_ASSOCIATE_5G_FINISH = 0x2, 1229 BTC_ASSOCIATE_5G_START = 0x3, 1230 BTC_ASSOCIATE_MAX 1231 } BTC_NOTIFY_TYPE_ASSOCIATE, *PBTC_NOTIFY_TYPE_ASSOCIATE; 1232 typedef enum _BTC_NOTIFY_TYPE_MEDIA_STATUS { 1233 BTC_MEDIA_DISCONNECT = 0x0, 1234 BTC_MEDIA_CONNECT = 0x1, 1235 BTC_MEDIA_CONNECT_5G = 0x02, 1236 BTC_MEDIA_MAX 1237 } BTC_NOTIFY_TYPE_MEDIA_STATUS, *PBTC_NOTIFY_TYPE_MEDIA_STATUS; 1238 typedef enum _BTC_NOTIFY_TYPE_SPECIFIC_PACKET { 1239 BTC_PACKET_UNKNOWN = 0x0, 1240 BTC_PACKET_DHCP = 0x1, 1241 BTC_PACKET_ARP = 0x2, 1242 BTC_PACKET_EAPOL = 0x3, 1243 BTC_PACKET_MAX 1244 } BTC_NOTIFY_TYPE_SPECIFIC_PACKET, *PBTC_NOTIFY_TYPE_SPECIFIC_PACKET; 1245 typedef enum _BTC_NOTIFY_TYPE_STACK_OPERATION { 1246 BTC_STACK_OP_NONE = 0x0, 1247 BTC_STACK_OP_INQ_PAGE_PAIR_START = 0x1, 1248 BTC_STACK_OP_INQ_PAGE_PAIR_FINISH = 0x2, 1249 BTC_STACK_OP_MAX 1250 } BTC_NOTIFY_TYPE_STACK_OPERATION, *PBTC_NOTIFY_TYPE_STACK_OPERATION; 1251 1252 typedef enum _BTC_LINK_CHANGE_TYPE{ 1253 BTC_LINK_CHANGE_TYPE_NONE = 0x0, 1254 BTC_LINK_CHANGE_TYPE_ECSA_START = 0x1, 1255 BTC_LINK_CHANGE_TYPE_ECSA_DONE = 0x2, 1256 BTC_LINK_CHANGE_TYPE_MAX 1257 }BTC_LINK_CHANGE_TYPE,*PBTC_LINK_CHANGE_TYPE; 1258 1259 /* Bryant Add */ 1260 typedef enum _BTC_ANTENNA_POS { 1261 BTC_ANTENNA_AT_MAIN_PORT = 0x1, 1262 BTC_ANTENNA_AT_AUX_PORT = 0x2, 1263 } BTC_ANTENNA_POS, *PBTC_ANTENNA_POS; 1264 1265 /* Bryant Add */ 1266 typedef enum _BTC_BT_OFFON { 1267 BTC_BT_OFF = 0x0, 1268 BTC_BT_ON = 0x1, 1269 } BTC_BTOFFON, *PBTC_BT_OFFON; 1270 1271 #define BTC_5G_BAND 0x80 1272 1273 /*================================================== 1274 For following block is for coex offload 1275 ==================================================*/ 1276 typedef struct _COL_H2C { 1277 u1Byte opcode; 1278 u1Byte opcode_ver:4; 1279 u1Byte req_num:4; 1280 u1Byte buf[1]; 1281 } COL_H2C, *PCOL_H2C; 1282 1283 #define COL_C2H_ACK_HDR_LEN 3 1284 typedef struct _COL_C2H_ACK { 1285 u1Byte status; 1286 u1Byte opcode_ver:4; 1287 u1Byte req_num:4; 1288 u1Byte ret_len; 1289 u1Byte buf[1]; 1290 } COL_C2H_ACK, *PCOL_C2H_ACK; 1291 1292 #define COL_C2H_IND_HDR_LEN 3 1293 typedef struct _COL_C2H_IND { 1294 u1Byte type; 1295 u1Byte version; 1296 u1Byte length; 1297 u1Byte data[1]; 1298 } COL_C2H_IND, *PCOL_C2H_IND; 1299 1300 /*============================================ 1301 NOTE: for debug message, the following define should match 1302 the strings in coexH2cResultString. 1303 ============================================*/ 1304 typedef enum _COL_H2C_STATUS { 1305 /* c2h status */ 1306 COL_STATUS_C2H_OK = 0x00, /* Wifi received H2C request and check content ok. */ 1307 COL_STATUS_C2H_UNKNOWN = 0x01, /* Not handled routine */ 1308 COL_STATUS_C2H_UNKNOWN_OPCODE = 0x02, /* Invalid OP code, It means that wifi firmware received an undefiend OP code. */ 1309 COL_STATUS_C2H_OPCODE_VER_MISMATCH = 0x03, /* Wifi firmware and wifi driver mismatch, need to update wifi driver or wifi or. */ 1310 COL_STATUS_C2H_PARAMETER_ERROR = 0x04, /* Error paraneter.(ex: parameters = NULL but it should have values) */ 1311 COL_STATUS_C2H_PARAMETER_OUT_OF_RANGE = 0x05, /* Wifi firmware needs to check the parameters from H2C request and return the status.(ex: ch = 500, it's wrong) */ 1312 /* other COL status start from here */ 1313 COL_STATUS_C2H_REQ_NUM_MISMATCH , /* c2h req_num mismatch, means this c2h is not we expected. */ 1314 COL_STATUS_H2C_HALMAC_FAIL , /* HALMAC return fail. */ 1315 COL_STATUS_H2C_TIMTOUT , /* not received the c2h response from fw */ 1316 COL_STATUS_INVALID_C2H_LEN , /* invalid coex offload c2h ack length, must >= 3 */ 1317 COL_STATUS_COEX_DATA_OVERFLOW , /* coex returned length over the c2h ack length. */ 1318 COL_STATUS_MAX 1319 } COL_H2C_STATUS, *PCOL_H2C_STATUS; 1320 1321 #define COL_MAX_H2C_REQ_NUM 16 1322 1323 #define COL_H2C_BUF_LEN 20 1324 typedef enum _COL_OPCODE { 1325 COL_OP_WIFI_STATUS_NOTIFY = 0x0, 1326 COL_OP_WIFI_PROGRESS_NOTIFY = 0x1, 1327 COL_OP_WIFI_INFO_NOTIFY = 0x2, 1328 COL_OP_WIFI_POWER_STATE_NOTIFY = 0x3, 1329 COL_OP_SET_CONTROL = 0x4, 1330 COL_OP_GET_CONTROL = 0x5, 1331 COL_OP_WIFI_OPCODE_MAX 1332 } COL_OPCODE, *PCOL_OPCODE; 1333 1334 typedef enum _COL_IND_TYPE { 1335 COL_IND_BT_INFO = 0x0, 1336 COL_IND_PSTDMA = 0x1, 1337 COL_IND_LIMITED_TX_RX = 0x2, 1338 COL_IND_COEX_TABLE = 0x3, 1339 COL_IND_REQ = 0x4, 1340 COL_IND_MAX 1341 } COL_IND_TYPE, *PCOL_IND_TYPE; 1342 1343 typedef struct _COL_SINGLE_H2C_RECORD { 1344 u1Byte h2c_buf[COL_H2C_BUF_LEN]; /* the latest sent h2c buffer */ 1345 u4Byte h2c_len; 1346 u1Byte c2h_ack_buf[COL_H2C_BUF_LEN]; /* the latest received c2h buffer */ 1347 u4Byte c2h_ack_len; 1348 u4Byte count; /* the total number of the sent h2c command */ 1349 u4Byte status[COL_STATUS_MAX]; /* the c2h status for the sent h2c command */ 1350 } COL_SINGLE_H2C_RECORD, *PCOL_SINGLE_H2C_RECORD; 1351 1352 typedef struct _COL_SINGLE_C2H_IND_RECORD { 1353 u1Byte ind_buf[COL_H2C_BUF_LEN]; /* the latest received c2h indication buffer */ 1354 u4Byte ind_len; 1355 u4Byte count; /* the total number of the rcvd c2h indication */ 1356 u4Byte status[COL_STATUS_MAX]; /* the c2h indication verified status */ 1357 } COL_SINGLE_C2H_IND_RECORD, *PCOL_SINGLE_C2H_IND_RECORD; 1358 1359 typedef struct _BTC_OFFLOAD { 1360 /* H2C command related */ 1361 u1Byte h2c_req_num; 1362 u4Byte cnt_h2c_sent; 1363 COL_SINGLE_H2C_RECORD h2c_record[COL_OP_WIFI_OPCODE_MAX]; 1364 1365 /* C2H Ack related */ 1366 u4Byte cnt_c2h_ack; 1367 u4Byte status[COL_STATUS_MAX]; 1368 struct completion c2h_event[COL_MAX_H2C_REQ_NUM]; /* for req_num = 1~COL_MAX_H2C_REQ_NUM */ 1369 u1Byte c2h_ack_buf[COL_MAX_H2C_REQ_NUM][COL_H2C_BUF_LEN]; 1370 u1Byte c2h_ack_len[COL_MAX_H2C_REQ_NUM]; 1371 1372 /* C2H Indication related */ 1373 u4Byte cnt_c2h_ind; 1374 COL_SINGLE_C2H_IND_RECORD c2h_ind_record[COL_IND_MAX]; 1375 u4Byte c2h_ind_status[COL_STATUS_MAX]; 1376 u1Byte c2h_ind_buf[COL_H2C_BUF_LEN]; 1377 u1Byte c2h_ind_len; 1378 } BTC_OFFLOAD, *PBTC_OFFLOAD; 1379 extern BTC_OFFLOAD gl_coex_offload; 1380 /*==================================================*/ 1381 1382 /* BTC_LINK_MODE same as WIFI_LINK_MODE */ 1383 typedef enum _BTC_LINK_MODE{ 1384 BTC_LINK_NONE=0, 1385 BTC_LINK_ONLY_GO, 1386 BTC_LINK_ONLY_GC, 1387 BTC_LINK_ONLY_STA, 1388 BTC_LINK_ONLY_AP, 1389 BTC_LINK_2G_MCC_GO_STA, 1390 BTC_LINK_5G_MCC_GO_STA, 1391 BTC_LINK_25G_MCC_GO_STA, 1392 BTC_LINK_2G_MCC_GC_STA, 1393 BTC_LINK_5G_MCC_GC_STA, 1394 BTC_LINK_25G_MCC_GC_STA, 1395 BTC_LINK_2G_SCC_GO_STA, 1396 BTC_LINK_5G_SCC_GO_STA, 1397 BTC_LINK_2G_SCC_GC_STA, 1398 BTC_LINK_5G_SCC_GC_STA, 1399 BTC_LINK_MAX=30 1400 }BTC_LINK_MODE, *PBTC_LINK_MODE; 1401 1402 1403 struct btc_wifi_link_info { 1404 BTC_LINK_MODE link_mode; /* LinkMode */ 1405 u1Byte sta_center_channel; /* StaCenterChannel */ 1406 u1Byte p2p_center_channel; /* P2PCenterChannel */ 1407 BOOLEAN bany_client_join_go; 1408 BOOLEAN benable_noa; 1409 BOOLEAN bhotspot; 1410 }; 1411 1412 #if 0 1413 typedef enum _BTC_MULTI_PORT_TDMA_MODE { 1414 BTC_MULTI_PORT_TDMA_MODE_NONE=0, 1415 BTC_MULTI_PORT_TDMA_MODE_2G_SCC_GO, 1416 BTC_MULTI_PORT_TDMA_MODE_2G_P2P_GO, 1417 BTC_MULTI_PORT_TDMA_MODE_2G_HOTSPOT_GO 1418 } BTC_MULTI_PORT_TDMA_MODE, *PBTC_MULTI_PORT_TDMA_MODE; 1419 1420 typedef struct btc_multi_port_tdma_info { 1421 BTC_MULTI_PORT_TDMA_MODE btc_multi_port_tdma_mode; 1422 u1Byte start_time_from_bcn; 1423 u1Byte bt_time; 1424 } BTC_MULTI_PORT_TDMA_INFO, *PBTC_MULTI_PORT_TDMA_INFO; 1425 #endif 1426 1427 typedef enum _btc_concurrent_mode { 1428 btc_concurrent_mode_none = 0, 1429 btc_concurrent_mode_2g_go_miracast, 1430 btc_concurrent_mode_2g_go_hotspot, 1431 btc_concurrent_mode_2g_scc_go_miracast_sta, 1432 btc_concurrent_mode_2g_scc_go_hotspot_sta, 1433 btc_concurrent_mode_2g_gc, 1434 } btc_concurrent_mode, *pbtc_concurrent_mode; 1435 1436 struct btc_concurrent_setting { 1437 btc_concurrent_mode btc_concurrent_mode; 1438 u1Byte start_time_from_bcn; 1439 u1Byte bt_time; 1440 }; 1441 1442 typedef u1Byte 1443 (*BFP_BTC_R1)( 1444 IN PVOID pBtcContext, 1445 IN u4Byte RegAddr 1446 ); 1447 typedef u2Byte 1448 (*BFP_BTC_R2)( 1449 IN PVOID pBtcContext, 1450 IN u4Byte RegAddr 1451 ); 1452 typedef u4Byte 1453 (*BFP_BTC_R4)( 1454 IN PVOID pBtcContext, 1455 IN u4Byte RegAddr 1456 ); 1457 typedef VOID 1458 (*BFP_BTC_W1)( 1459 IN PVOID pBtcContext, 1460 IN u4Byte RegAddr, 1461 IN u1Byte Data 1462 ); 1463 typedef VOID 1464 (*BFP_BTC_W1_BIT_MASK)( 1465 IN PVOID pBtcContext, 1466 IN u4Byte regAddr, 1467 IN u1Byte bitMask, 1468 IN u1Byte data1b 1469 ); 1470 typedef VOID 1471 (*BFP_BTC_W2)( 1472 IN PVOID pBtcContext, 1473 IN u4Byte RegAddr, 1474 IN u2Byte Data 1475 ); 1476 typedef VOID 1477 (*BFP_BTC_W4)( 1478 IN PVOID pBtcContext, 1479 IN u4Byte RegAddr, 1480 IN u4Byte Data 1481 ); 1482 typedef VOID 1483 (*BFP_BTC_LOCAL_REG_W1)( 1484 IN PVOID pBtcContext, 1485 IN u4Byte RegAddr, 1486 IN u1Byte Data 1487 ); 1488 typedef u4Byte 1489 (*BFP_BTC_R_LINDIRECT)( 1490 IN PVOID pBtcContext, 1491 IN u2Byte reg_addr 1492 ); 1493 typedef u2Byte 1494 (*BFP_BTC_R_SCBD)( 1495 IN PVOID pBtcContext, 1496 IN pu2Byte score_board_val 1497 ); 1498 typedef u4Byte 1499 (*BFP_BTC_R_SCBD_32BIT)( 1500 IN PVOID pBtcContext, 1501 IN pu4Byte score_board_val 1502 ); 1503 typedef VOID 1504 (*BFP_BTC_W_SCBD)( 1505 IN PVOID pBtcContext, 1506 IN u2Byte bitpos, 1507 IN BOOLEAN state 1508 ); 1509 typedef VOID 1510 (*BFP_BTC_W_SCBD_32BIT)( 1511 IN PVOID pBtcContext, 1512 IN u4Byte bitpos, 1513 IN BOOLEAN state 1514 ); 1515 typedef VOID 1516 (*BFP_BTC_W_LINDIRECT)( 1517 IN PVOID pBtcContext, 1518 IN u2Byte reg_addr, 1519 IN u4Byte bit_mask, 1520 IN u4Byte reg_value 1521 ); 1522 typedef VOID 1523 (*BFP_BTC_SET_BB_REG)( 1524 IN PVOID pBtcContext, 1525 IN u4Byte RegAddr, 1526 IN u4Byte BitMask, 1527 IN u4Byte Data 1528 ); 1529 typedef u4Byte 1530 (*BFP_BTC_GET_BB_REG)( 1531 IN PVOID pBtcContext, 1532 IN u4Byte RegAddr, 1533 IN u4Byte BitMask 1534 ); 1535 typedef VOID 1536 (*BFP_BTC_SET_RF_REG)( 1537 IN PVOID pBtcContext, 1538 IN enum rf_path eRFPath, 1539 IN u4Byte RegAddr, 1540 IN u4Byte BitMask, 1541 IN u4Byte Data 1542 ); 1543 typedef u4Byte 1544 (*BFP_BTC_GET_RF_REG)( 1545 IN PVOID pBtcContext, 1546 IN enum rf_path eRFPath, 1547 IN u4Byte RegAddr, 1548 IN u4Byte BitMask 1549 ); 1550 typedef VOID 1551 (*BFP_BTC_FILL_H2C)( 1552 IN PVOID pBtcContext, 1553 IN u1Byte elementId, 1554 IN u4Byte cmdLen, 1555 IN pu1Byte pCmdBuffer 1556 ); 1557 1558 typedef BOOLEAN 1559 (*BFP_BTC_GET)( 1560 IN PVOID pBtCoexist, 1561 IN u1Byte getType, 1562 OUT PVOID pOutBuf 1563 ); 1564 1565 typedef BOOLEAN 1566 (*BFP_BTC_SET)( 1567 IN PVOID pBtCoexist, 1568 IN u1Byte setType, 1569 OUT PVOID pInBuf 1570 ); 1571 typedef u2Byte 1572 (*BFP_BTC_SET_BT_REG)( 1573 IN PVOID pBtcContext, 1574 IN u1Byte regType, 1575 IN u4Byte offset, 1576 IN u4Byte value 1577 ); 1578 typedef BOOLEAN 1579 (*BFP_BTC_SET_BT_ANT_DETECTION)( 1580 IN PVOID pBtcContext, 1581 IN u1Byte txTime, 1582 IN u1Byte btChnl 1583 ); 1584 1585 typedef BOOLEAN 1586 (*BFP_BTC_SET_BT_TRX_MASK)( 1587 IN PVOID pBtcContext, 1588 IN u1Byte bt_trx_mask 1589 ); 1590 1591 typedef u4Byte 1592 (*BFP_BTC_GET_BT_REG)( 1593 IN PVOID pBtcContext, 1594 IN u1Byte regType, 1595 IN u4Byte offset 1596 ); 1597 typedef VOID 1598 (*BFP_BTC_DISP_DBG_MSG)( 1599 IN PVOID pBtCoexist, 1600 IN u1Byte dispType 1601 ); 1602 1603 typedef COL_H2C_STATUS 1604 (*BFP_BTC_COEX_H2C_PROCESS)( 1605 IN PVOID pBtCoexist, 1606 IN u1Byte opcode, 1607 IN u1Byte opcode_ver, 1608 IN pu1Byte ph2c_par, 1609 IN u1Byte h2c_par_len 1610 ); 1611 1612 typedef u4Byte 1613 (*BFP_BTC_GET_BT_COEX_SUPPORTED_FEATURE)( 1614 IN PVOID pBtcContext 1615 ); 1616 1617 typedef u4Byte 1618 (*BFP_BTC_GET_BT_COEX_SUPPORTED_VERSION)( 1619 IN PVOID pBtcContext 1620 ); 1621 1622 typedef u4Byte 1623 (*BFP_BTC_GET_PHYDM_VERSION)( 1624 IN PVOID pBtcContext 1625 ); 1626 1627 typedef u1Byte 1628 (*BFP_BTC_SET_TIMER) ( 1629 IN PVOID pBtcContext, 1630 IN u4Byte type, 1631 IN u4Byte val 1632 ); 1633 1634 typedef u4Byte 1635 (*BFP_BTC_SET_ATOMIC) ( 1636 IN PVOID pBtcContext, 1637 IN pu4Byte target, 1638 IN u4Byte val 1639 ); 1640 1641 1642 typedef VOID 1643 (*BTC_PHYDM_MODIFY_RA_PCR_THRESHLOD)( 1644 IN PVOID pDM_Odm, 1645 IN u1Byte RA_offset_direction, 1646 IN u1Byte RA_threshold_offset 1647 ); 1648 1649 typedef u4Byte 1650 (*BTC_PHYDM_CMNINFOQUERY)( 1651 IN PVOID pDM_Odm, 1652 IN u1Byte info_type 1653 ); 1654 1655 typedef VOID 1656 (*BTC_REDUCE_WL_TX_POWER)( 1657 IN PVOID pDM_Odm, 1658 IN s1Byte tx_power 1659 ); 1660 1661 typedef VOID 1662 (*BTC_PHYDM_MODIFY_ANTDIV_HWSW)( 1663 IN PVOID pDM_Odm, 1664 IN u1Byte type 1665 ); 1666 1667 typedef u1Byte 1668 (*BFP_BTC_GET_ANT_DET_VAL_FROM_BT)( 1669 1670 IN PVOID pBtcContext 1671 ); 1672 1673 typedef u1Byte 1674 (*BFP_BTC_GET_BLE_SCAN_TYPE_FROM_BT)( 1675 IN PVOID pBtcContext 1676 ); 1677 1678 typedef u4Byte 1679 (*BFP_BTC_GET_BLE_SCAN_PARA_FROM_BT)( 1680 IN PVOID pBtcContext, 1681 IN u1Byte scanType 1682 ); 1683 1684 typedef BOOLEAN 1685 (*BFP_BTC_GET_BT_AFH_MAP_FROM_BT)( 1686 IN PVOID pBtcContext, 1687 IN u1Byte mapType, 1688 OUT pu1Byte afhMap 1689 ); 1690 1691 struct btc_bt_info { 1692 boolean bt_disabled; 1693 boolean bt_enable_disable_change; 1694 u8 rssi_adjust_for_agc_table_on; 1695 u8 rssi_adjust_for_1ant_coex_type; 1696 boolean pre_bt_ctrl_agg_buf_size; 1697 boolean bt_ctrl_agg_buf_size; 1698 boolean pre_reject_agg_pkt; 1699 boolean reject_agg_pkt; 1700 boolean increase_scan_dev_num; 1701 boolean bt_tx_rx_mask; 1702 u8 pre_agg_buf_size; 1703 u8 agg_buf_size; 1704 boolean bt_busy; 1705 boolean limited_dig; 1706 u16 bt_hci_ver; 1707 u32 bt_real_fw_ver; 1708 u32 get_bt_fw_ver_cnt; 1709 u32 bt_get_fw_ver; 1710 boolean miracast_plus_bt; 1711 1712 boolean bt_disable_low_pwr; 1713 1714 boolean bt_ctrl_lps; 1715 boolean bt_lps_on; 1716 boolean force_to_roam; /* for 1Ant solution */ 1717 u8 lps_val; 1718 u8 rpwm_val; 1719 u32 ra_mask; 1720 }; 1721 1722 struct btc_stack_info { 1723 boolean profile_notified; 1724 u16 hci_version; /* stack hci version */ 1725 u8 num_of_link; 1726 boolean bt_link_exist; 1727 boolean sco_exist; 1728 boolean acl_exist; 1729 boolean a2dp_exist; 1730 boolean hid_exist; 1731 u8 num_of_hid; 1732 boolean pan_exist; 1733 boolean unknown_acl_exist; 1734 s8 min_bt_rssi; 1735 }; 1736 1737 struct btc_bt_link_info { 1738 boolean bt_link_exist; 1739 boolean bt_hi_pri_link_exist; 1740 boolean sco_exist; 1741 boolean sco_only; 1742 boolean a2dp_exist; 1743 boolean a2dp_only; 1744 boolean hid_exist; 1745 boolean hid_only; 1746 boolean pan_exist; 1747 boolean pan_only; 1748 boolean slave_role; 1749 boolean acl_busy; 1750 }; 1751 1752 #ifdef CONFIG_RF4CE_COEXIST 1753 struct btc_rf4ce_info { 1754 u8 link_state; 1755 }; 1756 #endif 1757 1758 struct btc_statistics { 1759 u32 cnt_bind; 1760 u32 cnt_power_on; 1761 u32 cnt_pre_load_firmware; 1762 u32 cnt_init_hw_config; 1763 u32 cnt_init_coex_dm; 1764 u32 cnt_ips_notify; 1765 u32 cnt_lps_notify; 1766 u32 cnt_scan_notify; 1767 u32 cnt_connect_notify; 1768 u32 cnt_media_status_notify; 1769 u32 cnt_specific_packet_notify; 1770 u32 cnt_bt_info_notify; 1771 u32 cnt_rf_status_notify; 1772 u32 cnt_periodical; 1773 u32 cnt_coex_dm_switch; 1774 u32 cnt_stack_operation_notify; 1775 u32 cnt_dbg_ctrl; 1776 u32 cnt_rate_id_notify; 1777 u32 cnt_halt_notify; 1778 u32 cnt_pnp_notify; 1779 }; 1780 1781 struct btc_coexist { 1782 BOOLEAN bBinded; /*make sure only one adapter can bind the data context*/ 1783 PVOID Adapter; /*default adapter*/ 1784 struct btc_board_info board_info; 1785 struct btc_bt_info bt_info; /*some bt info referenced by non-bt module*/ 1786 struct btc_stack_info stack_info; 1787 struct btc_bt_link_info bt_link_info; 1788 struct btc_wifi_link_info wifi_link_info; 1789 struct btc_wifi_link_info_ext wifi_link_info_ext; 1790 struct btc_coex_dm coex_dm; 1791 struct btc_coex_sta coex_sta; 1792 struct btc_rfe_type rfe_type; 1793 const struct btc_chip_para *chip_para; 1794 u8 wifi_black_bssid[6]; 1795 u8 wifi_bssid[6]; 1796 1797 #ifdef CONFIG_RF4CE_COEXIST 1798 struct btc_rf4ce_info rf4ce_info; 1799 #endif 1800 BTC_CHIP_INTERFACE chip_interface; 1801 PVOID odm_priv; 1802 1803 BOOLEAN initilized; 1804 BOOLEAN stop_coex_dm; 1805 BOOLEAN manual_control; 1806 BOOLEAN bdontenterLPS; 1807 pu1Byte cli_buf; 1808 struct btc_statistics statistics; 1809 u1Byte pwrModeVal[10]; 1810 BOOLEAN dbg_mode; 1811 BOOLEAN auto_report; 1812 u8 chip_type; 1813 BOOLEAN wl_rf_state_off; 1814 1815 /* function pointers */ 1816 /* io related */ 1817 BFP_BTC_R1 btc_read_1byte; 1818 BFP_BTC_W1 btc_write_1byte; 1819 BFP_BTC_W1_BIT_MASK btc_write_1byte_bitmask; 1820 BFP_BTC_R2 btc_read_2byte; 1821 BFP_BTC_W2 btc_write_2byte; 1822 BFP_BTC_R4 btc_read_4byte; 1823 BFP_BTC_W4 btc_write_4byte; 1824 BFP_BTC_LOCAL_REG_W1 btc_write_local_reg_1byte; 1825 BFP_BTC_R_LINDIRECT btc_read_linderct; 1826 BFP_BTC_W_LINDIRECT btc_write_linderct; 1827 BFP_BTC_R_SCBD btc_read_scbd; 1828 BFP_BTC_R_SCBD_32BIT btc_read_scbd_32bit; 1829 BFP_BTC_W_SCBD btc_write_scbd; 1830 BFP_BTC_W_SCBD_32BIT btc_write_scbd_32bit; 1831 1832 /* read/write bb related */ 1833 BFP_BTC_SET_BB_REG btc_set_bb_reg; 1834 BFP_BTC_GET_BB_REG btc_get_bb_reg; 1835 1836 /* read/write rf related */ 1837 BFP_BTC_SET_RF_REG btc_set_rf_reg; 1838 BFP_BTC_GET_RF_REG btc_get_rf_reg; 1839 1840 /* fill h2c related */ 1841 BFP_BTC_FILL_H2C btc_fill_h2c; 1842 /* other */ 1843 BFP_BTC_DISP_DBG_MSG btc_disp_dbg_msg; 1844 /* normal get/set related */ 1845 BFP_BTC_GET btc_get; 1846 BFP_BTC_SET btc_set; 1847 1848 BFP_BTC_GET_BT_REG btc_get_bt_reg; 1849 BFP_BTC_SET_BT_REG btc_set_bt_reg; 1850 1851 BFP_BTC_SET_BT_ANT_DETECTION btc_set_bt_ant_detection; 1852 1853 BFP_BTC_COEX_H2C_PROCESS btc_coex_h2c_process; 1854 BFP_BTC_SET_BT_TRX_MASK btc_set_bt_trx_mask; 1855 BFP_BTC_GET_BT_COEX_SUPPORTED_FEATURE btc_get_bt_coex_supported_feature; 1856 BFP_BTC_GET_BT_COEX_SUPPORTED_VERSION btc_get_bt_coex_supported_version; 1857 BFP_BTC_GET_PHYDM_VERSION btc_get_bt_phydm_version; 1858 BFP_BTC_SET_TIMER btc_set_timer; 1859 BFP_BTC_SET_ATOMIC btc_set_atomic; 1860 BTC_PHYDM_MODIFY_RA_PCR_THRESHLOD btc_phydm_modify_RA_PCR_threshold; 1861 BTC_PHYDM_CMNINFOQUERY btc_phydm_query_PHY_counter; 1862 BTC_REDUCE_WL_TX_POWER btc_reduce_wl_tx_power; 1863 BTC_PHYDM_MODIFY_ANTDIV_HWSW btc_phydm_modify_antdiv_hwsw; 1864 BFP_BTC_GET_ANT_DET_VAL_FROM_BT btc_get_ant_det_val_from_bt; 1865 BFP_BTC_GET_BLE_SCAN_TYPE_FROM_BT btc_get_ble_scan_type_from_bt; 1866 BFP_BTC_GET_BLE_SCAN_PARA_FROM_BT btc_get_ble_scan_para_from_bt; 1867 BFP_BTC_GET_BT_AFH_MAP_FROM_BT btc_get_bt_afh_map_from_bt; 1868 1869 union { 1870 #ifdef CONFIG_RTL8822B 1871 struct coex_dm_8822b_1ant coex_dm_8822b_1ant; 1872 struct coex_dm_8822b_2ant coex_dm_8822b_2ant; 1873 #endif /* 8822B */ 1874 #ifdef CONFIG_RTL8821C 1875 struct coex_dm_8821c_1ant coex_dm_8821c_1ant; 1876 struct coex_dm_8821c_2ant coex_dm_8821c_2ant; 1877 #endif /* 8821C */ 1878 #ifdef CONFIG_RTL8723D 1879 struct coex_dm_8723d_1ant coex_dm_8723d_1ant; 1880 struct coex_dm_8723d_2ant coex_dm_8723d_2ant; 1881 #endif /* 8723D */ 1882 }; 1883 1884 union { 1885 #ifdef CONFIG_RTL8822B 1886 struct coex_sta_8822b_1ant coex_sta_8822b_1ant; 1887 struct coex_sta_8822b_2ant coex_sta_8822b_2ant; 1888 #endif /* 8822B */ 1889 #ifdef CONFIG_RTL8821C 1890 struct coex_sta_8821c_1ant coex_sta_8821c_1ant; 1891 struct coex_sta_8821c_2ant coex_sta_8821c_2ant; 1892 #endif /* 8821C */ 1893 #ifdef CONFIG_RTL8723D 1894 struct coex_sta_8723d_1ant coex_sta_8723d_1ant; 1895 struct coex_sta_8723d_2ant coex_sta_8723d_2ant; 1896 #endif /* 8723D */ 1897 }; 1898 1899 union { 1900 #ifdef CONFIG_RTL8822B 1901 struct rfe_type_8822b_1ant rfe_type_8822b_1ant; 1902 struct rfe_type_8822b_2ant rfe_type_8822b_2ant; 1903 #endif /* 8822B */ 1904 #ifdef CONFIG_RTL8821C 1905 struct rfe_type_8821c_1ant rfe_type_8821c_1ant; 1906 struct rfe_type_8821c_2ant rfe_type_8821c_2ant; 1907 #endif /* 8821C */ 1908 }; 1909 1910 union { 1911 #ifdef CONFIG_RTL8822B 1912 struct wifi_link_info_8822b_1ant wifi_link_info_8822b_1ant; 1913 struct wifi_link_info_8822b_2ant wifi_link_info_8822b_2ant; 1914 #endif /* 8822B */ 1915 #ifdef CONFIG_RTL8821C 1916 struct wifi_link_info_8821c_1ant wifi_link_info_8821c_1ant; 1917 struct wifi_link_info_8821c_2ant wifi_link_info_8821c_2ant; 1918 #endif /* 8821C */ 1919 }; 1920 1921 }; 1922 typedef struct btc_coexist *PBTC_COEXIST; 1923 1924 extern struct btc_coexist GLBtCoexist; 1925 1926 typedef void 1927 (*BFP_BTC_CHIP_SETUP)( 1928 IN PBTC_COEXIST pBtCoexist, 1929 IN u1Byte setType 1930 ); 1931 1932 struct btc_chip_para { 1933 const char *chip_name; 1934 u32 para_ver_date; 1935 u32 para_ver; 1936 u32 bt_desired_ver; 1937 u32 wl_desired_ver; 1938 boolean scbd_support; 1939 u32 scbd_reg; 1940 u8 scbd_bit_num; 1941 boolean mailbox_support; 1942 boolean lte_indirect_access; 1943 boolean new_scbd10_def; /* TRUE: 1:fix 2M(8822c) */ 1944 u8 indirect_type; /* 0:17xx, 1:7cx */ 1945 u8 pstdma_type; /* 0: LPSoff, 1:LPSon */ 1946 u8 bt_rssi_type; 1947 u8 ant_isolation; 1948 u8 rssi_tolerance; 1949 u8 rx_path_num; 1950 u8 wl_rssi_step_num; 1951 const u8 *wl_rssi_step; 1952 u8 bt_rssi_step_num; 1953 const u8 *bt_rssi_step; 1954 u8 table_sant_num; 1955 const struct btc_coex_table_para *table_sant; 1956 u8 table_nsant_num; 1957 const struct btc_coex_table_para *table_nsant; 1958 u8 tdma_sant_num; 1959 const struct btc_tdma_para *tdma_sant; 1960 u8 tdma_nsant_num; 1961 const struct btc_tdma_para *tdma_nsant; 1962 u8 wl_rf_para_tx_num; 1963 const struct btc_rf_para *wl_rf_para_tx; 1964 const struct btc_rf_para *wl_rf_para_rx; 1965 u8 bt_afh_span_bw20; 1966 u8 bt_afh_span_bw40; 1967 u8 afh_5g_num; 1968 const struct btc_5g_afh_map *afh_5g; 1969 BFP_BTC_CHIP_SETUP chip_setup; 1970 }; 1971 1972 BOOLEAN 1973 EXhalbtcoutsrc_InitlizeVariables( 1974 IN PVOID Adapter 1975 ); 1976 VOID 1977 EXhalbtcoutsrc_PowerOnSetting( 1978 IN PBTC_COEXIST pBtCoexist 1979 ); 1980 VOID 1981 EXhalbtcoutsrc_PreLoadFirmware( 1982 IN PBTC_COEXIST pBtCoexist 1983 ); 1984 VOID 1985 EXhalbtcoutsrc_InitHwConfig( 1986 IN PBTC_COEXIST pBtCoexist, 1987 IN BOOLEAN bWifiOnly 1988 ); 1989 VOID 1990 EXhalbtcoutsrc_InitCoexDm( 1991 IN PBTC_COEXIST pBtCoexist 1992 ); 1993 VOID 1994 EXhalbtcoutsrc_IpsNotify( 1995 IN PBTC_COEXIST pBtCoexist, 1996 IN u1Byte type 1997 ); 1998 VOID 1999 EXhalbtcoutsrc_LpsNotify( 2000 IN PBTC_COEXIST pBtCoexist, 2001 IN u1Byte type 2002 ); 2003 VOID 2004 EXhalbtcoutsrc_ScanNotify( 2005 IN PBTC_COEXIST pBtCoexist, 2006 IN u1Byte type 2007 ); 2008 VOID 2009 EXhalbtcoutsrc_SetAntennaPathNotify( 2010 IN PBTC_COEXIST pBtCoexist, 2011 IN u1Byte type 2012 ); 2013 VOID 2014 EXhalbtcoutsrc_ConnectNotify( 2015 IN PBTC_COEXIST pBtCoexist, 2016 IN u1Byte action 2017 ); 2018 VOID 2019 EXhalbtcoutsrc_MediaStatusNotify( 2020 IN PBTC_COEXIST pBtCoexist, 2021 IN RT_MEDIA_STATUS mediaStatus 2022 ); 2023 VOID 2024 EXhalbtcoutsrc_SpecificPacketNotify( 2025 IN PBTC_COEXIST pBtCoexist, 2026 IN u1Byte pktType 2027 ); 2028 VOID 2029 EXhalbtcoutsrc_BtInfoNotify( 2030 IN PBTC_COEXIST pBtCoexist, 2031 IN pu1Byte tmpBuf, 2032 IN u1Byte length 2033 ); 2034 VOID 2035 EXhalbtcoutsrc_RfStatusNotify( 2036 IN PBTC_COEXIST pBtCoexist, 2037 IN u1Byte type 2038 ); 2039 u4Byte 2040 EXhalbtcoutsrc_CoexTimerCheck( 2041 IN PBTC_COEXIST pBtCoexist 2042 ); 2043 u4Byte 2044 EXhalbtcoutsrc_WLStatusCheck( 2045 IN PBTC_COEXIST pBtCoexist 2046 ); 2047 VOID 2048 EXhalbtcoutsrc_WlFwDbgInfoNotify( 2049 IN PBTC_COEXIST pBtCoexist, 2050 IN pu1Byte tmpBuf, 2051 IN u1Byte length 2052 ); 2053 VOID 2054 EXhalbtcoutsrc_rx_rate_change_notify( 2055 IN PBTC_COEXIST pBtCoexist, 2056 IN BOOLEAN is_data_frame, 2057 IN u1Byte btc_rate_id 2058 ); 2059 VOID 2060 EXhalbtcoutsrc_StackOperationNotify( 2061 IN PBTC_COEXIST pBtCoexist, 2062 IN u1Byte type 2063 ); 2064 VOID 2065 EXhalbtcoutsrc_HaltNotify( 2066 IN PBTC_COEXIST pBtCoexist 2067 ); 2068 VOID 2069 EXhalbtcoutsrc_PnpNotify( 2070 IN PBTC_COEXIST pBtCoexist, 2071 IN u1Byte pnpState 2072 ); 2073 VOID 2074 EXhalbtcoutsrc_TimerNotify( 2075 IN PBTC_COEXIST pBtCoexist, 2076 IN u4Byte timer_type 2077 ); 2078 VOID 2079 EXhalbtcoutsrc_WLStatusChangeNotify( 2080 IN PBTC_COEXIST pBtCoexist, 2081 IN u4Byte change_type 2082 ); 2083 VOID 2084 EXhalbtcoutsrc_WL_RFK_Notify( 2085 IN PBTC_COEXIST pBtCoexist, 2086 IN u1Byte path, 2087 IN u1Byte type, 2088 IN u1Byte state 2089 ); 2090 VOID 2091 EXhalbtcoutsrc_CoexDmSwitch( 2092 IN PBTC_COEXIST pBtCoexist 2093 ); 2094 VOID 2095 EXhalbtcoutsrc_Periodical( 2096 IN PBTC_COEXIST pBtCoexist 2097 ); 2098 VOID 2099 EXhalbtcoutsrc_DbgControl( 2100 IN PBTC_COEXIST pBtCoexist, 2101 IN u1Byte opCode, 2102 IN u1Byte opLen, 2103 IN pu1Byte pData 2104 ); 2105 VOID 2106 EXhalbtcoutsrc_AntennaDetection( 2107 IN PBTC_COEXIST pBtCoexist, 2108 IN u4Byte centFreq, 2109 IN u4Byte offset, 2110 IN u4Byte span, 2111 IN u4Byte seconds 2112 ); 2113 VOID 2114 EXhalbtcoutsrc_StackUpdateProfileInfo( 2115 VOID 2116 ); 2117 VOID 2118 EXhalbtcoutsrc_SetHciVersion( 2119 IN u2Byte hciVersion 2120 ); 2121 VOID 2122 EXhalbtcoutsrc_SetBtPatchVersion( 2123 IN u2Byte btHciVersion, 2124 IN u2Byte btPatchVersion 2125 ); 2126 VOID 2127 EXhalbtcoutsrc_UpdateMinBtRssi( 2128 IN s1Byte btRssi 2129 ); 2130 #if 0 2131 VOID 2132 EXhalbtcoutsrc_SetBtExist( 2133 IN BOOLEAN bBtExist 2134 ); 2135 #endif 2136 VOID 2137 EXhalbtcoutsrc_SetChipType( 2138 IN u1Byte chipType 2139 ); 2140 VOID 2141 EXhalbtcoutsrc_SetAntNum( 2142 IN u1Byte type, 2143 IN u1Byte antNum 2144 ); 2145 VOID 2146 EXhalbtcoutsrc_SetSingleAntPath( 2147 IN u1Byte singleAntPath 2148 ); 2149 VOID 2150 EXhalbtcoutsrc_DisplayBtCoexInfo( 2151 IN PBTC_COEXIST pBtCoexist 2152 ); 2153 VOID 2154 EXhalbtcoutsrc_DisplayAntDetection( 2155 IN PBTC_COEXIST pBtCoexist 2156 ); 2157 2158 #define MASKBYTE0 0xff 2159 #define MASKBYTE1 0xff00 2160 #define MASKBYTE2 0xff0000 2161 #define MASKBYTE3 0xff000000 2162 #define MASKHWORD 0xffff0000 2163 #define MASKLWORD 0x0000ffff 2164 #define MASKDWORD 0xffffffff 2165 #define MASK12BITS 0xfff 2166 #define MASKH4BITS 0xf0000000 2167 #define MASKOFDM_D 0xffc00000 2168 #define MASKCCK 0x3f3f3f3f 2169 2170 #endif 2171