1*4882a593Smuzhiyun /****************************************************************************** 2*4882a593Smuzhiyun * 3*4882a593Smuzhiyun * Copyright(c) 2007 - 2017 Realtek Corporation. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify it 6*4882a593Smuzhiyun * under the terms of version 2 of the GNU General Public License as 7*4882a593Smuzhiyun * published by the Free Software Foundation. 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * This program is distributed in the hope that it will be useful, but WITHOUT 10*4882a593Smuzhiyun * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11*4882a593Smuzhiyun * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12*4882a593Smuzhiyun * more details. 13*4882a593Smuzhiyun * 14*4882a593Smuzhiyun *****************************************************************************/ 15*4882a593Smuzhiyun #ifndef __RTL8814A_XMIT_H__ 16*4882a593Smuzhiyun #define __RTL8814A_XMIT_H__ 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun typedef struct txdescriptor_8814 { 19*4882a593Smuzhiyun /* Offset 0 */ 20*4882a593Smuzhiyun u32 pktlen:16; 21*4882a593Smuzhiyun u32 offset:8; 22*4882a593Smuzhiyun u32 bmc:1; 23*4882a593Smuzhiyun u32 htc:1; 24*4882a593Smuzhiyun u32 ls:1; 25*4882a593Smuzhiyun } TXDESC_8814, *PTXDESC_8814; 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun #define OFFSET_SZ 0 29*4882a593Smuzhiyun #define OFFSET_SHT 16 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun #ifdef CONFIG_SDIO_HCI 34*4882a593Smuzhiyun #define SET_TX_DESC_SDIO_TXSEQ_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 16, 8, __Value) 35*4882a593Smuzhiyun #endif /* CONFIG_SDIO_HCI */ 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun /* ----------------------------------------------------------------- 38*4882a593Smuzhiyun * RTL8814A TX BUFFER DESC 39*4882a593Smuzhiyun * ----------------------------------------------------------------- 40*4882a593Smuzhiyun * 41*4882a593Smuzhiyun - Each TXBD has 4 segment. 42*4882a593Smuzhiyun -- For 32 bit, each segment is 8 bytes. 43*4882a593Smuzhiyun -- For 64 bit, each segment is 16 bytes. 44*4882a593Smuzhiyun */ 45*4882a593Smuzhiyun #if 0 46*4882a593Smuzhiyun #if 1 /* 32 bit */ 47*4882a593Smuzhiyun #define SET_TX_EXTBUFF_DESC_LEN_8814A(__pTxDesc, __Value, __Set) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Set*8), 0, 16, __Value) 48*4882a593Smuzhiyun #define SET_TX_EXTBUFF_DESC_ADDR_LOW_8814A(__pTxDesc, __Value, __Set) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Set*8)+4, 0, 32, __Value) 49*4882a593Smuzhiyun #else /* 64 bit */ 50*4882a593Smuzhiyun #define SET_TX_EXTBUFF_DESC_LEN_8814A(__pTxDesc, __Value, __Set) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Set*16), 0, 16, __Value) 51*4882a593Smuzhiyun #define SET_TX_EXTBUFF_DESC_ADDR_LOW_8814A(__pTxDesc, __Value, __Set) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Set*16)+4, 0, 32, __Value) 52*4882a593Smuzhiyun #endif 53*4882a593Smuzhiyun #define SET_TX_EXTBUFF_DESC_ADDR_HIGH_8814A(__pTxDesc, __Value, __Set) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Set*16)+8, 0, 32, __Value) 54*4882a593Smuzhiyun #endif 55*4882a593Smuzhiyun /*c2h-DWORD 2*/ 56*4882a593Smuzhiyun #define GET_RX_STATUS_DESC_RPT_SEL_8814A(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+8, 28, 1) 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun /* ********************************************************* 59*4882a593Smuzhiyun * for Txfilldescroptor8814Ae, fill the desc content. */ 60*4882a593Smuzhiyun #if 1 /* 32 bit */ 61*4882a593Smuzhiyun #define SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*8), 0, 16, __Valeu) 62*4882a593Smuzhiyun #define SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*8), 31, 1, __Valeu) 63*4882a593Smuzhiyun #define SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*8)+4, 0, 32, __Valeu) 64*4882a593Smuzhiyun #else /* 64 bit */ 65*4882a593Smuzhiyun #define SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16), 0, 16, __Valeu) 66*4882a593Smuzhiyun #define SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16), 31, 1, __Valeu) 67*4882a593Smuzhiyun #define SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16)+4, 0, 32, __Valeu) 68*4882a593Smuzhiyun #endif 69*4882a593Smuzhiyun #define SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16)+8, 0, 32, __Valeu) 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun /* ********************************************************* */ 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun /* TX buffer 74*4882a593Smuzhiyun * ************* 75*4882a593Smuzhiyun * Dword 0 */ 76*4882a593Smuzhiyun #define SET_TX_BUFF_DESC_LEN_0_8814A(__pTxDesc, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 16, __Valeu) 77*4882a593Smuzhiyun #define SET_TX_BUFF_DESC_PSB_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 15, __Value) 78*4882a593Smuzhiyun #define SET_TX_BUFF_DESC_OWN_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value) 79*4882a593Smuzhiyun #define GET_TX_BUFF_DESC_OWN_8814A(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc, 31, 1) 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun /* Dword 1 */ 82*4882a593Smuzhiyun #define SET_TX_BUFF_DESC_ADDR_LOW_0_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 32, __Value) 83*4882a593Smuzhiyun #define GET_TX_BUFF_DESC_ADDR_LOW_0_8814A(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+4, 0, 32) 84*4882a593Smuzhiyun /* Dword 2 */ 85*4882a593Smuzhiyun #define SET_TX_BUFF_DESC_ADDR_HIGH_0_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 0, 32, __Value) 86*4882a593Smuzhiyun #define GET_TX_BUFF_DESC_ADDR_HIGH_0_8814A(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+8, 0, 32) 87*4882a593Smuzhiyun /* Dword 3 */ /* RESERVED 0 */ 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun #if 0 /* 64 bit */ 90*4882a593Smuzhiyun /* Dword 4 */ 91*4882a593Smuzhiyun #define SET_TX_BUFF_DESC_LEN_1_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 0, 16, __Value) 92*4882a593Smuzhiyun #define SET_TX_BUFF_DESC_AMSDU_1_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 31, 1, __Value) 93*4882a593Smuzhiyun /* Dword 5 */ 94*4882a593Smuzhiyun #define SET_TX_BUFF_DESC_ADDR_LOW_1_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 0, 32, __Value) 95*4882a593Smuzhiyun /* Dword 6 */ 96*4882a593Smuzhiyun #define SET_TX_BUFF_DESC_ADDR_HIGH_1_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 0, 32, __Value) 97*4882a593Smuzhiyun /* Dword 7 */ /* RESERVED 0 */ 98*4882a593Smuzhiyun /* Dword 8 */ 99*4882a593Smuzhiyun #define SET_TX_BUFF_DESC_LEN_2_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 0, 16, __Value) 100*4882a593Smuzhiyun #define SET_TX_BUFF_DESC_AMSDU_2_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 31, 1, __Value) 101*4882a593Smuzhiyun /* Dword 9 */ 102*4882a593Smuzhiyun #define SET_TX_BUFF_DESC_ADDR_LOW_2_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 0, 32, __Value) 103*4882a593Smuzhiyun /* Dword 10 */ 104*4882a593Smuzhiyun #define SET_TX_BUFF_DESC_ADDR_HIGH_2_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+40, 0, 32, __Value) 105*4882a593Smuzhiyun /* Dword 11 */ /* RESERVED 0 */ 106*4882a593Smuzhiyun /* Dword 12 */ 107*4882a593Smuzhiyun #define SET_TX_BUFF_DESC_LEN_3_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+48, 0, 16, __Value) 108*4882a593Smuzhiyun #define SET_TX_BUFF_DESC_AMSDU_3_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+48, 31, 1, __Value) 109*4882a593Smuzhiyun /* Dword 13 */ 110*4882a593Smuzhiyun #define SET_TX_BUFF_DESC_ADDR_LOW_3_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+52, 0, 32, __Value) 111*4882a593Smuzhiyun /* Dword 14 */ 112*4882a593Smuzhiyun #define SET_TX_BUFF_DESC_ADDR_HIGH_3_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+56, 0, 32, __Value) 113*4882a593Smuzhiyun /* Dword 15 */ /* RESERVED 0 */ 114*4882a593Smuzhiyun #endif 115*4882a593Smuzhiyun 116*4882a593Smuzhiyun /* *****Desc content 117*4882a593Smuzhiyun * TX Info 118*4882a593Smuzhiyun * ************* 119*4882a593Smuzhiyun * Dword 0 */ 120*4882a593Smuzhiyun #define SET_TX_DESC_PKT_SIZE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 16, __Value) 121*4882a593Smuzhiyun #define GET_TX_DESC_PKT_SIZE_8814A(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc, 0, 16) 122*4882a593Smuzhiyun #define SET_TX_DESC_OFFSET_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 8, __Value) 123*4882a593Smuzhiyun #define GET_TX_DESC_OFFSET_8814A(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc, 16, 8) 124*4882a593Smuzhiyun #define SET_TX_DESC_BMC_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 24, 1, __Value) 125*4882a593Smuzhiyun #define SET_TX_DESC_HTC_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 25, 1, __Value) 126*4882a593Smuzhiyun #define SET_TX_DESC_LAST_SEG_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 26, 1, __Value) 127*4882a593Smuzhiyun #define SET_TX_DESC_LINIP_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 28, 1, __Value) 128*4882a593Smuzhiyun #define SET_TX_DESC_AMSDU_PAD_EN_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 27, 1, __Value) 129*4882a593Smuzhiyun #define SET_TX_DESC_NO_ACM_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 29, 1, __Value) 130*4882a593Smuzhiyun #define SET_TX_DESC_GF_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 30, 1, __Value) 131*4882a593Smuzhiyun #define SET_TX_DESC_DISQSELSEQ_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value) 132*4882a593Smuzhiyun 133*4882a593Smuzhiyun /* Dword 1 */ 134*4882a593Smuzhiyun #define SET_TX_DESC_MACID_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 7, __Value) 135*4882a593Smuzhiyun #define SET_TX_DESC_QUEUE_SEL_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 8, 5, __Value) 136*4882a593Smuzhiyun #define SET_TX_DESC_RDG_NAV_EXT_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 13, 1, __Value) 137*4882a593Smuzhiyun #define SET_TX_DESC_LSIG_TXOP_EN_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 14, 1, __Value) 138*4882a593Smuzhiyun #define SET_TX_DESC_PIFS_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 15, 1, __Value) 139*4882a593Smuzhiyun #define SET_TX_DESC_RATE_ID_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 16, 5, __Value) 140*4882a593Smuzhiyun #define SET_TX_DESC_EN_DESC_ID_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 21, 1, __Value) 141*4882a593Smuzhiyun #define SET_TX_DESC_SEC_TYPE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 22, 2, __Value) 142*4882a593Smuzhiyun #define SET_TX_DESC_PKT_OFFSET_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 24, 5, __Value) 143*4882a593Smuzhiyun #define SET_TX_DESC_MORE_DATA_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 29, 1, __Value) 144*4882a593Smuzhiyun #define SET_TX_DESC_TXOP_PS_CAP_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 30, 1, __Value) 145*4882a593Smuzhiyun #define SET_TX_DESC_TXOP_PS_MODE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 31, 1, __Value) 146*4882a593Smuzhiyun 147*4882a593Smuzhiyun 148*4882a593Smuzhiyun /* Dword 2 */ 149*4882a593Smuzhiyun #define SET_TX_DESC_PAID_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 0, 9, __Value) 150*4882a593Smuzhiyun #define SET_TX_DESC_CCA_RTS_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 10, 2, __Value) 151*4882a593Smuzhiyun #define SET_TX_DESC_AGG_ENABLE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 12, 1, __Value) 152*4882a593Smuzhiyun #define SET_TX_DESC_RDG_ENABLE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 13, 1, __Value) 153*4882a593Smuzhiyun #define SET_TX_DESC_NULL_0_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 14, 1, __Value) 154*4882a593Smuzhiyun #define SET_TX_DESC_NULL_1_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 15, 1, __Value) 155*4882a593Smuzhiyun #define SET_TX_DESC_BK_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 16, 1, __Value) 156*4882a593Smuzhiyun #define SET_TX_DESC_MORE_FRAG_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 17, 1, __Value) 157*4882a593Smuzhiyun #define GET_TX_DESC_MORE_FRAG_8814A(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+8, 17, 1) 158*4882a593Smuzhiyun #define SET_TX_DESC_RAW_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 18, 1, __Value) 159*4882a593Smuzhiyun #define SET_TX_DESC_SPE_RPT_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 19, 1, __Value) 160*4882a593Smuzhiyun #define SET_TX_DESC_AMPDU_DENSITY_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 20, 3, __Value) 161*4882a593Smuzhiyun #define SET_TX_DESC_BT_NULL_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 23, 1, __Value) 162*4882a593Smuzhiyun #define SET_TX_DESC_GID_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 6, __Value) 163*4882a593Smuzhiyun #define SET_TX_DESC_HW_AES_IV_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 31, 1, __Value) 164*4882a593Smuzhiyun 165*4882a593Smuzhiyun 166*4882a593Smuzhiyun /* Dword 3 */ 167*4882a593Smuzhiyun #define SET_TX_DESC_WHEADER_LEN_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 0, 5, __Value) 168*4882a593Smuzhiyun #define SET_TX_DESC_EARLY_RATE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 5, 1, __Value) 169*4882a593Smuzhiyun #define SET_TX_DESC_HW_SSN_SEL_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 6, 2, __Value) 170*4882a593Smuzhiyun #define SET_TX_DESC_USE_RATE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 8, 1, __Value) 171*4882a593Smuzhiyun #define SET_TX_DESC_DISABLE_RTS_FB_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 9, 1, __Value) 172*4882a593Smuzhiyun #define SET_TX_DESC_DISABLE_FB_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 10, 1, __Value) 173*4882a593Smuzhiyun #define SET_TX_DESC_CTS2SELF_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 11, 1, __Value) 174*4882a593Smuzhiyun #define SET_TX_DESC_RTS_ENABLE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 12, 1, __Value) 175*4882a593Smuzhiyun #define SET_TX_DESC_HW_RTS_ENABLE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 13, 1, __Value) 176*4882a593Smuzhiyun #define SET_TX_DESC_CHECK_EN_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 14, 1, __Value) 177*4882a593Smuzhiyun #define SET_TX_DESC_NAV_USE_HDR_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 15, 1, __Value) 178*4882a593Smuzhiyun #define SET_TX_DESC_USE_MAX_LEN_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 16, 1, __Value) 179*4882a593Smuzhiyun #define SET_TX_DESC_MAX_AGG_NUM_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 17, 5, __Value) 180*4882a593Smuzhiyun #define SET_TX_DESC_NDPA_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 22, 2, __Value) 181*4882a593Smuzhiyun #define SET_TX_DESC_AMPDU_MAX_TIME_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 24, 8, __Value) 182*4882a593Smuzhiyun 183*4882a593Smuzhiyun /* Dword 4 */ 184*4882a593Smuzhiyun #define SET_TX_DESC_TX_RATE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 0, 7, __Value) 185*4882a593Smuzhiyun #define SET_TX_DESC_TRY_RATE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 7, 1, __Value) 186*4882a593Smuzhiyun #define SET_TX_DESC_DATA_RATE_FB_LIMIT_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 8, 5, __Value) 187*4882a593Smuzhiyun #define SET_TX_DESC_RTS_RATE_FB_LIMIT_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 13, 4, __Value) 188*4882a593Smuzhiyun #define SET_TX_DESC_RETRY_LIMIT_ENABLE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 17, 1, __Value) 189*4882a593Smuzhiyun #define SET_TX_DESC_DATA_RETRY_LIMIT_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 18, 6, __Value) 190*4882a593Smuzhiyun #define SET_TX_DESC_RTS_RATE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 24, 5, __Value) 191*4882a593Smuzhiyun #define SET_TX_DESC_PCTS_ENABLE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 29, 1, __Value) 192*4882a593Smuzhiyun #define SET_TX_DESC_PCTS_MASK_IDX_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 30, 2, __Value) 193*4882a593Smuzhiyun 194*4882a593Smuzhiyun 195*4882a593Smuzhiyun /* Dword 5 */ 196*4882a593Smuzhiyun #define SET_TX_DESC_DATA_SC_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 0, 4, __Value) 197*4882a593Smuzhiyun #define SET_TX_DESC_DATA_SHORT_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 4, 1, __Value) 198*4882a593Smuzhiyun #define SET_TX_DESC_DATA_BW_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 5, 2, __Value) 199*4882a593Smuzhiyun #define SET_TX_DESC_DATA_LDPC_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 7, 1, __Value) 200*4882a593Smuzhiyun #define SET_TX_DESC_DATA_STBC_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 8, 2, __Value) 201*4882a593Smuzhiyun #define SET_TX_DESC_CTROL_STBC_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 10, 2, __Value) 202*4882a593Smuzhiyun #define SET_TX_DESC_RTS_SHORT_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 12, 1, __Value) 203*4882a593Smuzhiyun #define SET_TX_DESC_RTS_SC_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 13, 4, __Value) 204*4882a593Smuzhiyun #define SET_TX_DESC_SIGNALING_TA_PKT_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 17, 1, __Value) 205*4882a593Smuzhiyun #define SET_TX_DESC_PORT_ID_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 21, 3, __Value)/* 20130415 KaiYuan add for 8814 */ 206*4882a593Smuzhiyun #define SET_TX_DESC_TX_ANT_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 24, 4, __Value) 207*4882a593Smuzhiyun #define SET_TX_DESC_TX_POWER_OFFSET_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 28, 3, __Value) 208*4882a593Smuzhiyun 209*4882a593Smuzhiyun /* Dword 6 */ 210*4882a593Smuzhiyun #define SET_TX_DESC_SW_DEFINE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 0, 12, __Value) 211*4882a593Smuzhiyun #define SET_TX_DESC_MBSSID_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 12, 4, __Value) 212*4882a593Smuzhiyun #define SET_TX_DESC_ANTSEL_A_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 16, 3, __Value) 213*4882a593Smuzhiyun #define SET_TX_DESC_ANTSEL_B_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 19, 3, __Value) 214*4882a593Smuzhiyun #define SET_TX_DESC_ANT_MAPA_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 22, 2, __Value) 215*4882a593Smuzhiyun #define SET_TX_DESC_ANT_MAPB_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 24, 2, __Value) 216*4882a593Smuzhiyun #define SET_TX_DESC_ANT_MAPC_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 26, 2, __Value) 217*4882a593Smuzhiyun #define SET_TX_DESC_ANT_MAPD_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 28, 2, __Value) 218*4882a593Smuzhiyun 219*4882a593Smuzhiyun 220*4882a593Smuzhiyun /* Dword 7 */ 221*4882a593Smuzhiyun #ifdef CONFIG_PCI_HCI 222*4882a593Smuzhiyun #define SET_TX_DESC_TX_BUFFER_SIZE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) 223*4882a593Smuzhiyun #endif 224*4882a593Smuzhiyun #if defined(CONFIG_SDIO_HCI)|| defined(CONFIG_USB_HCI) 225*4882a593Smuzhiyun #define SET_TX_DESC_TX_DESC_CHECKSUM_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) 226*4882a593Smuzhiyun #endif 227*4882a593Smuzhiyun #define SET_TX_DESC_NTX_MAP_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 20, 4, __Value) 228*4882a593Smuzhiyun #define SET_TX_DESC_USB_TXAGG_NUM_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 24, 8, __Value) 229*4882a593Smuzhiyun 230*4882a593Smuzhiyun 231*4882a593Smuzhiyun /* Dword 8 */ 232*4882a593Smuzhiyun #define SET_TX_DESC_RTS_RC_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 0, 6, __Value) 233*4882a593Smuzhiyun #define SET_TX_DESC_BAR_RTY_TH_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 6, 2, __Value) 234*4882a593Smuzhiyun #define SET_TX_DESC_DATA_RC_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 8, 6, __Value) 235*4882a593Smuzhiyun #define SET_TX_DESC_EN_HWEXSEQ_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 14, 1, __Value) 236*4882a593Smuzhiyun #define SET_TX_DESC_HWSEQ_EN_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 15, 1, __Value) 237*4882a593Smuzhiyun #if defined(CONFIG_PCI_HCI)|| defined(CONFIG_USB_HCI) 238*4882a593Smuzhiyun #define SET_TX_DESC_NEXT_HEAD_PAGE_L_8814A(__pTxDesc, __Value)(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 16, 8, __Value) 239*4882a593Smuzhiyun #endif 240*4882a593Smuzhiyun #ifdef CONFIG_SDIO_HCI 241*4882a593Smuzhiyun #define SET_TX_DESC_SDIO_SEQ_8814A(__pTxDesc, __Value)(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 16, 8, __Value) /* 20130415 KaiYuan add for 8814AS */ 242*4882a593Smuzhiyun #endif 243*4882a593Smuzhiyun #define SET_TX_DESC_TAIL_PAGE_L_8814A(__pTxDesc, __Value)(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 24, 8, __Value) 244*4882a593Smuzhiyun 245*4882a593Smuzhiyun /* Dword 9 */ 246*4882a593Smuzhiyun #define SET_TX_DESC_PADDING_LENGTH_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 0, 11, __Value) 247*4882a593Smuzhiyun #define SET_TX_DESC_TXBF_PATH_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 11, 1, __Value) 248*4882a593Smuzhiyun #define SET_TX_DESC_SEQ_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 12, 12, __Value) 249*4882a593Smuzhiyun #define SET_TX_DESC_NEXT_HEAD_PAGE_H_8814A(__pTxDesc, __Value)(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 24, 4, __Value) 250*4882a593Smuzhiyun #define SET_TX_DESC_TAIL_PAGE_H_8814A(__pTxDesc, __Value)(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 28, 4, __Value) 251*4882a593Smuzhiyun 252*4882a593Smuzhiyun 253*4882a593Smuzhiyun 254*4882a593Smuzhiyun #define SET_EARLYMODE_PKTNUM_8814A(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 4, __Value) 255*4882a593Smuzhiyun #define SET_EARLYMODE_LEN0_8814A(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 15, __Value) 256*4882a593Smuzhiyun #define SET_EARLYMODE_LEN1_1_8814A(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 19, 13, __Value) 257*4882a593Smuzhiyun #define SET_EARLYMODE_LEN1_2_8814A(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 2, __Value) 258*4882a593Smuzhiyun #define SET_EARLYMODE_LEN2_8814A(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 2, 15, __Value) 259*4882a593Smuzhiyun #define SET_EARLYMODE_LEN3_8814A(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 17, 15, __Value) 260*4882a593Smuzhiyun 261*4882a593Smuzhiyun 262*4882a593Smuzhiyun void rtl8814a_cal_txdesc_chksum(u8 *ptxdesc); 263*4882a593Smuzhiyun void rtl8814a_fill_fake_txdesc(PADAPTER padapter, u8 *pDesc, u32 BufferLen, u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame); 264*4882a593Smuzhiyun void rtl8814a_fill_txdesc_sectype(struct pkt_attrib *pattrib, u8 *ptxdesc); 265*4882a593Smuzhiyun void rtl8814a_fill_txdesc_vcs(PADAPTER padapter, struct pkt_attrib *pattrib, u8 *ptxdesc); 266*4882a593Smuzhiyun void rtl8814a_fill_txdesc_phy(PADAPTER padapter, struct pkt_attrib *pattrib, u8 *ptxdesc); 267*4882a593Smuzhiyun void fill_txdesc_force_bmc_camid(struct pkt_attrib *pattrib, u8 *ptxdesc); 268*4882a593Smuzhiyun void fill_txdesc_bmc_tx_rate(struct pkt_attrib *pattrib, u8 *ptxdesc); 269*4882a593Smuzhiyun 270*4882a593Smuzhiyun #ifdef CONFIG_USB_HCI 271*4882a593Smuzhiyun s32 rtl8814au_init_xmit_priv(PADAPTER padapter); 272*4882a593Smuzhiyun void rtl8814au_free_xmit_priv(PADAPTER padapter); 273*4882a593Smuzhiyun s32 rtl8814au_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); 274*4882a593Smuzhiyun s32 rtl8814au_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); 275*4882a593Smuzhiyun #ifdef CONFIG_RTW_MGMT_QUEUE 276*4882a593Smuzhiyun s32 rtl8814au_hal_mgmt_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); 277*4882a593Smuzhiyun #endif 278*4882a593Smuzhiyun s32 rtl8814au_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); 279*4882a593Smuzhiyun s32 rtl8814au_xmit_buf_handler(PADAPTER padapter); 280*4882a593Smuzhiyun void rtl8814au_xmit_tasklet(void *priv); 281*4882a593Smuzhiyun s32 rtl8814au_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); 282*4882a593Smuzhiyun #endif /* CONFIG_USB_HCI */ 283*4882a593Smuzhiyun 284*4882a593Smuzhiyun #ifdef CONFIG_PCI_HCI 285*4882a593Smuzhiyun s32 rtl8814ae_init_xmit_priv(PADAPTER padapter); 286*4882a593Smuzhiyun void rtl8814ae_free_xmit_priv(PADAPTER padapter); 287*4882a593Smuzhiyun struct xmit_buf *rtl8814ae_dequeue_xmitbuf(struct rtw_tx_ring *ring); 288*4882a593Smuzhiyun void rtl8814ae_xmitframe_resume(_adapter *padapter); 289*4882a593Smuzhiyun s32 rtl8814ae_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); 290*4882a593Smuzhiyun s32 rtl8814ae_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); 291*4882a593Smuzhiyun #ifdef CONFIG_RTW_MGMT_QUEUE 292*4882a593Smuzhiyun s32 rtl8814ae_hal_mgmt_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); 293*4882a593Smuzhiyun #endif 294*4882a593Smuzhiyun s32 rtl8814ae_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); 295*4882a593Smuzhiyun void rtl8814ae_xmit_tasklet(void *priv); 296*4882a593Smuzhiyun #ifdef CONFIG_XMIT_THREAD_MODE 297*4882a593Smuzhiyun s32 rtl8814ae_xmit_buf_handler(_adapter *padapter); 298*4882a593Smuzhiyun #endif 299*4882a593Smuzhiyun #endif 300*4882a593Smuzhiyun 301*4882a593Smuzhiyun void _dbg_dump_tx_info(_adapter *padapter, int frame_tag, u8 *ptxdesc); 302*4882a593Smuzhiyun u8 303*4882a593Smuzhiyun SCMapping_8814( 304*4882a593Smuzhiyun PADAPTER Adapter, 305*4882a593Smuzhiyun struct pkt_attrib *pattrib 306*4882a593Smuzhiyun ); 307*4882a593Smuzhiyun 308*4882a593Smuzhiyun u8 309*4882a593Smuzhiyun BWMapping_8814( 310*4882a593Smuzhiyun PADAPTER Adapter, 311*4882a593Smuzhiyun struct pkt_attrib *pattrib 312*4882a593Smuzhiyun ); 313*4882a593Smuzhiyun 314*4882a593Smuzhiyun 315*4882a593Smuzhiyun #endif /* __RTL8814_XMIT_H__ */ 316