1*4882a593Smuzhiyun /****************************************************************************** 2*4882a593Smuzhiyun * 3*4882a593Smuzhiyun * Copyright(c) 2007 - 2017 Realtek Corporation. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify it 6*4882a593Smuzhiyun * under the terms of version 2 of the GNU General Public License as 7*4882a593Smuzhiyun * published by the Free Software Foundation. 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * This program is distributed in the hope that it will be useful, but WITHOUT 10*4882a593Smuzhiyun * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11*4882a593Smuzhiyun * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12*4882a593Smuzhiyun * more details. 13*4882a593Smuzhiyun * 14*4882a593Smuzhiyun *****************************************************************************/ 15*4882a593Smuzhiyun #ifndef __RTL8188E_HAL_H__ 16*4882a593Smuzhiyun #define __RTL8188E_HAL_H__ 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun /* #include "hal_com.h" */ 19*4882a593Smuzhiyun #include "hal_data.h" 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun /* include HAL Related header after HAL Related compiling flags */ 22*4882a593Smuzhiyun #include "rtl8188e_spec.h" 23*4882a593Smuzhiyun #include "Hal8188EPhyReg.h" 24*4882a593Smuzhiyun #include "Hal8188EPhyCfg.h" 25*4882a593Smuzhiyun #include "rtl8188e_rf.h" 26*4882a593Smuzhiyun #include "rtl8188e_dm.h" 27*4882a593Smuzhiyun #include "rtl8188e_recv.h" 28*4882a593Smuzhiyun #include "rtl8188e_xmit.h" 29*4882a593Smuzhiyun #include "rtl8188e_cmd.h" 30*4882a593Smuzhiyun #include "rtl8188e_led.h" 31*4882a593Smuzhiyun #include "Hal8188EPwrSeq.h" 32*4882a593Smuzhiyun #ifdef DBG_CONFIG_ERROR_DETECT 33*4882a593Smuzhiyun #include "rtl8188e_sreset.h" 34*4882a593Smuzhiyun #endif 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun /* --------------------------------------------------------------------- */ 37*4882a593Smuzhiyun /* RTL8188E Power Configuration CMDs for USB/SDIO/PCIE interfaces */ 38*4882a593Smuzhiyun /* --------------------------------------------------------------------- */ 39*4882a593Smuzhiyun #define Rtl8188E_NIC_PWR_ON_FLOW rtl8188E_power_on_flow 40*4882a593Smuzhiyun #define Rtl8188E_NIC_RF_OFF_FLOW rtl8188E_radio_off_flow 41*4882a593Smuzhiyun #define Rtl8188E_NIC_DISABLE_FLOW rtl8188E_card_disable_flow 42*4882a593Smuzhiyun #define Rtl8188E_NIC_ENABLE_FLOW rtl8188E_card_enable_flow 43*4882a593Smuzhiyun #define Rtl8188E_NIC_SUSPEND_FLOW rtl8188E_suspend_flow 44*4882a593Smuzhiyun #define Rtl8188E_NIC_RESUME_FLOW rtl8188E_resume_flow 45*4882a593Smuzhiyun #define Rtl8188E_NIC_PDN_FLOW rtl8188E_hwpdn_flow 46*4882a593Smuzhiyun #define Rtl8188E_NIC_LPS_ENTER_FLOW rtl8188E_enter_lps_flow 47*4882a593Smuzhiyun #define Rtl8188E_NIC_LPS_LEAVE_FLOW rtl8188E_leave_lps_flow 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun #if 1 /* download firmware related data structure */ 51*4882a593Smuzhiyun #define MAX_FW_8188E_SIZE 0x8000 /* 32768, 32k / 16384, 16k */ 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun #define FW_8188E_SIZE 0x4000 /* 16384, 16k */ 54*4882a593Smuzhiyun #define FW_8188E_SIZE_2 0x8000 /* 32768, 32k */ 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun #define FW_8188E_START_ADDRESS 0x1000 57*4882a593Smuzhiyun #define FW_8188E_END_ADDRESS 0x1FFF /* 0x5FFF */ 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun #define IS_FW_HEADER_EXIST_88E(_pFwHdr) ((le16_to_cpu(_pFwHdr->Signature) & 0xFFF0) == 0x88E0) 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun typedef struct _RT_FIRMWARE_8188E { 63*4882a593Smuzhiyun FIRMWARE_SOURCE eFWSource; 64*4882a593Smuzhiyun #ifdef CONFIG_EMBEDDED_FWIMG 65*4882a593Smuzhiyun u8 *szFwBuffer; 66*4882a593Smuzhiyun #else 67*4882a593Smuzhiyun u8 szFwBuffer[MAX_FW_8188E_SIZE]; 68*4882a593Smuzhiyun #endif 69*4882a593Smuzhiyun u32 ulFwLength; 70*4882a593Smuzhiyun } RT_FIRMWARE_8188E, *PRT_FIRMWARE_8188E; 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun /* 73*4882a593Smuzhiyun * This structure must be cared byte-ordering 74*4882a593Smuzhiyun * */ 75*4882a593Smuzhiyun 76*4882a593Smuzhiyun typedef struct _RT_8188E_FIRMWARE_HDR { 77*4882a593Smuzhiyun /* 8-byte alinment required */ 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun /* --- LONG WORD 0 ---- */ 80*4882a593Smuzhiyun u16 Signature; /* 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut */ 81*4882a593Smuzhiyun u8 Category; /* AP/NIC and USB/PCI */ 82*4882a593Smuzhiyun u8 Function; /* Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions */ 83*4882a593Smuzhiyun u16 Version; /* FW Version */ 84*4882a593Smuzhiyun u8 Subversion; /* FW Subversion, default 0x00 */ 85*4882a593Smuzhiyun u16 Rsvd1; 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun /* --- LONG WORD 1 ---- */ 89*4882a593Smuzhiyun u8 Month; /* Release time Month field */ 90*4882a593Smuzhiyun u8 Date; /* Release time Date field */ 91*4882a593Smuzhiyun u8 Hour; /* Release time Hour field */ 92*4882a593Smuzhiyun u8 Minute; /* Release time Minute field */ 93*4882a593Smuzhiyun u16 RamCodeSize; /* The size of RAM code */ 94*4882a593Smuzhiyun u8 Foundry; 95*4882a593Smuzhiyun u8 Rsvd2; 96*4882a593Smuzhiyun 97*4882a593Smuzhiyun /* --- LONG WORD 2 ---- */ 98*4882a593Smuzhiyun u32 SvnIdx; /* The SVN entry index */ 99*4882a593Smuzhiyun u32 Rsvd3; 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun /* --- LONG WORD 3 ---- */ 102*4882a593Smuzhiyun u32 Rsvd4; 103*4882a593Smuzhiyun u32 Rsvd5; 104*4882a593Smuzhiyun } RT_8188E_FIRMWARE_HDR, *PRT_8188E_FIRMWARE_HDR; 105*4882a593Smuzhiyun #endif /* download firmware related data structure */ 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun #define DRIVER_EARLY_INT_TIME_8188E 0x05 109*4882a593Smuzhiyun #define BCN_DMA_ATIME_INT_TIME_8188E 0x02 110*4882a593Smuzhiyun 111*4882a593Smuzhiyun 112*4882a593Smuzhiyun /* #define MAX_RX_DMA_BUFFER_SIZE_88E 0x2400 */ /* 9k for 88E nornal chip , */ /* MaxRxBuff=10k-max(TxReportSize(64*8), WOLPattern(16*24)) */ 113*4882a593Smuzhiyun #ifdef CONFIG_USB_HCI 114*4882a593Smuzhiyun #define RX_DMA_SIZE_88E(__Adapter) 0x2800 115*4882a593Smuzhiyun #else 116*4882a593Smuzhiyun #define RX_DMA_SIZE_88E(__Adapter) ((!IS_VENDOR_8188E_I_CUT_SERIES(__Adapter))?0x2800:0x4000) 117*4882a593Smuzhiyun #endif 118*4882a593Smuzhiyun 119*4882a593Smuzhiyun #ifdef CONFIG_WOWLAN 120*4882a593Smuzhiyun #define RESV_FMWF (WKFMCAM_SIZE * MAX_WKFM_CAM_NUM) /* 16 entries, for each is 24 bytes*/ 121*4882a593Smuzhiyun #else 122*4882a593Smuzhiyun #define RESV_FMWF 0 123*4882a593Smuzhiyun #endif 124*4882a593Smuzhiyun 125*4882a593Smuzhiyun #define RX_DMA_RESERVD_FW_FEATURE 0x200 /* for tx report (64*8) */ 126*4882a593Smuzhiyun 127*4882a593Smuzhiyun #define MAX_RX_DMA_BUFFER_SIZE_88E(__Adapter) (RX_DMA_SIZE_88E(__Adapter)-RX_DMA_RESERVD_FW_FEATURE) 128*4882a593Smuzhiyun 129*4882a593Smuzhiyun #define MAX_TX_REPORT_BUFFER_SIZE 0x0400 /* 1k */ 130*4882a593Smuzhiyun 131*4882a593Smuzhiyun #define PAGE_SIZE_TX_88E PAGE_SIZE_128 132*4882a593Smuzhiyun /* Note: We will divide number of page equally for each queue other than public queue! 133*4882a593Smuzhiyun * 22k = 22528 bytes = 176 pages (@page = 128 bytes) 134*4882a593Smuzhiyun * BCN rsvd_page_num = MAX_BEACON_LEN / PAGE_SIZE_TX_88E 135*4882a593Smuzhiyun * 1 ps-poll / 1 null-data /1 prob_rsp /1 QOS null-data = 4 pages */ 136*4882a593Smuzhiyun 137*4882a593Smuzhiyun #define BCNQ_PAGE_NUM_88E (MAX_BEACON_LEN / PAGE_SIZE_TX_88E + 4) /*0x09*/ 138*4882a593Smuzhiyun 139*4882a593Smuzhiyun /* For WoWLan , more reserved page */ 140*4882a593Smuzhiyun #ifdef CONFIG_WOWLAN 141*4882a593Smuzhiyun #ifdef CONFIG_WOW_KEEP_ALIVE_PATTERN 142*4882a593Smuzhiyun #define WOWLAN_KEEP_ALIVE_PAGE 0x02 /*for keep alive packet*/ 143*4882a593Smuzhiyun #else 144*4882a593Smuzhiyun #define WOWLAN_KEEP_ALIVE_PAGE 0x00 145*4882a593Smuzhiyun #endif /*CONFIG_WOW_KEEP_ALIVE_PATTERN*/ 146*4882a593Smuzhiyun /* 1 ArpRsp + 2 NbrAdv + 2 NDPInfo + 1 RCI + 1 AOAC = 7 pages */ 147*4882a593Smuzhiyun #define WOWLAN_PAGE_NUM_88E (0x07+ WOWLAN_KEEP_ALIVE_PAGE) 148*4882a593Smuzhiyun #else 149*4882a593Smuzhiyun #define WOWLAN_PAGE_NUM_88E 0x00 150*4882a593Smuzhiyun #endif 151*4882a593Smuzhiyun 152*4882a593Smuzhiyun /* Note: 153*4882a593Smuzhiyun Tx FIFO Size : previous CUT:22K /I_CUT after:32KB 154*4882a593Smuzhiyun Tx page Size : 128B 155*4882a593Smuzhiyun Total page numbers : 176(0xB0) / 256(0x100) 156*4882a593Smuzhiyun */ 157*4882a593Smuzhiyun #ifdef CONFIG_USB_HCI 158*4882a593Smuzhiyun #define TOTAL_PAGE_NUMBER_88E(_Adapter) (0xB0 - 1) 159*4882a593Smuzhiyun #else 160*4882a593Smuzhiyun #define TOTAL_PAGE_NUMBER_88E(_Adapter) ((IS_VENDOR_8188E_I_CUT_SERIES(_Adapter)?0x100:0xB0) - 1)/* must reserved 1 page for dma issue */ 161*4882a593Smuzhiyun #endif 162*4882a593Smuzhiyun #define TX_TOTAL_PAGE_NUMBER_88E(_Adapter) (TOTAL_PAGE_NUMBER_88E(_Adapter) - BCNQ_PAGE_NUM_88E - WOWLAN_PAGE_NUM_88E) 163*4882a593Smuzhiyun #define TX_PAGE_BOUNDARY_88E(_Adapter) (TX_TOTAL_PAGE_NUMBER_88E(_Adapter) + 1) /* beacon header start address */ 164*4882a593Smuzhiyun 165*4882a593Smuzhiyun #define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_88E(_Adapter) TX_TOTAL_PAGE_NUMBER_88E(_Adapter) 166*4882a593Smuzhiyun #define WMM_NORMAL_TX_PAGE_BOUNDARY_88E(_Adapter) (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_88E(_Adapter) + 1) 167*4882a593Smuzhiyun 168*4882a593Smuzhiyun /* For Normal Chip Setting 169*4882a593Smuzhiyun * (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_8723B */ 170*4882a593Smuzhiyun #define NORMAL_PAGE_NUM_HPQ_88E 0x0 171*4882a593Smuzhiyun #define NORMAL_PAGE_NUM_LPQ_88E 0x09 172*4882a593Smuzhiyun #define NORMAL_PAGE_NUM_NPQ_88E 0x0 173*4882a593Smuzhiyun 174*4882a593Smuzhiyun /* Note: For Normal Chip Setting, modify later */ 175*4882a593Smuzhiyun #define WMM_NORMAL_PAGE_NUM_HPQ_88E 0x29 176*4882a593Smuzhiyun #define WMM_NORMAL_PAGE_NUM_LPQ_88E 0x1C 177*4882a593Smuzhiyun #define WMM_NORMAL_PAGE_NUM_NPQ_88E 0x1C 178*4882a593Smuzhiyun 179*4882a593Smuzhiyun 180*4882a593Smuzhiyun /* ------------------------------------------------------------------------- 181*4882a593Smuzhiyun * Chip specific 182*4882a593Smuzhiyun * ------------------------------------------------------------------------- */ 183*4882a593Smuzhiyun #define CHIP_BONDING_IDENTIFIER(_value) (((_value)>>22) & 0x3) 184*4882a593Smuzhiyun #define CHIP_BONDING_92C_1T2R 0x1 185*4882a593Smuzhiyun #define CHIP_BONDING_88C_USB_MCARD 0x2 186*4882a593Smuzhiyun #define CHIP_BONDING_88C_USB_HP 0x1 187*4882a593Smuzhiyun 188*4882a593Smuzhiyun /* ------------------------------------------------------------------------- 189*4882a593Smuzhiyun * Channel Plan 190*4882a593Smuzhiyun * ------------------------------------------------------------------------- */ 191*4882a593Smuzhiyun 192*4882a593Smuzhiyun 193*4882a593Smuzhiyun #define EFUSE_REAL_CONTENT_LEN 512 194*4882a593Smuzhiyun #define EFUSE_MAP_LEN 128 195*4882a593Smuzhiyun #define EFUSE_MAX_SECTION 16 196*4882a593Smuzhiyun #define EFUSE_IC_ID_OFFSET 506 /* For some inferiority IC purpose. added by Roger, 2009.09.02. */ 197*4882a593Smuzhiyun #define AVAILABLE_EFUSE_ADDR(addr) (addr < EFUSE_REAL_CONTENT_LEN) 198*4882a593Smuzhiyun /* 199*4882a593Smuzhiyun * <Roger_Notes> 200*4882a593Smuzhiyun * To prevent out of boundary programming case, 201*4882a593Smuzhiyun * leave 1byte and program full section 202*4882a593Smuzhiyun * 9bytes + 1byt + 5bytes and pre 1byte. 203*4882a593Smuzhiyun * For worst case: 204*4882a593Smuzhiyun * | 1byte|----8bytes----|1byte|--5bytes--| 205*4882a593Smuzhiyun * | | Reserved(14bytes) | 206*4882a593Smuzhiyun * */ 207*4882a593Smuzhiyun #define EFUSE_OOB_PROTECT_BYTES 15 /* PG data exclude header, dummy 6 bytes frome CP test and reserved 1byte. */ 208*4882a593Smuzhiyun 209*4882a593Smuzhiyun #define EFUSE_REAL_CONTENT_LEN_88E 256 210*4882a593Smuzhiyun #define EFUSE_MAP_LEN_88E 512 211*4882a593Smuzhiyun #define EFUSE_MAX_SECTION_88E 64 212*4882a593Smuzhiyun #define EFUSE_MAX_WORD_UNIT_88E 4 213*4882a593Smuzhiyun #define EFUSE_IC_ID_OFFSET_88E 506 /* For some inferiority IC purpose. added by Roger, 2009.09.02. */ 214*4882a593Smuzhiyun #define AVAILABLE_EFUSE_ADDR_88E(addr) (addr < EFUSE_REAL_CONTENT_LEN_88E) 215*4882a593Smuzhiyun /* <Roger_Notes> To prevent out of boundary programming case, leave 1byte and program full section 216*4882a593Smuzhiyun * 9bytes + 1byt + 5bytes and pre 1byte. 217*4882a593Smuzhiyun * For worst case: 218*4882a593Smuzhiyun * | 2byte|----8bytes----|1byte|--7bytes--| */ /* 92D */ 219*4882a593Smuzhiyun #define EFUSE_OOB_PROTECT_BYTES_88E 18 /* PG data exclude header, dummy 7 bytes frome CP test and reserved 1byte. */ 220*4882a593Smuzhiyun #define EFUSE_PROTECT_BYTES_BANK_88E 16 221*4882a593Smuzhiyun 222*4882a593Smuzhiyun 223*4882a593Smuzhiyun /* ******************************************************** 224*4882a593Smuzhiyun * EFUSE for BT definition 225*4882a593Smuzhiyun * ******************************************************** */ 226*4882a593Smuzhiyun #define EFUSE_BT_REAL_CONTENT_LEN 1536 /* 512*3 */ 227*4882a593Smuzhiyun #define EFUSE_BT_MAP_LEN 1024 /* 1k bytes */ 228*4882a593Smuzhiyun #define EFUSE_BT_MAX_SECTION 128 /* 1024/8 */ 229*4882a593Smuzhiyun 230*4882a593Smuzhiyun #define EFUSE_PROTECT_BYTES_BANK 16 231*4882a593Smuzhiyun 232*4882a593Smuzhiyun #define INCLUDE_MULTI_FUNC_BT(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT) 233*4882a593Smuzhiyun #define INCLUDE_MULTI_FUNC_GPS(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS) 234*4882a593Smuzhiyun 235*4882a593Smuzhiyun /* #define IS_MULTI_FUNC_CHIP(_Adapter) (((((PHAL_DATA_TYPE)(_Adapter->HalData))->MultiFunc) & (RT_MULTI_FUNC_BT|RT_MULTI_FUNC_GPS)) ? _TRUE : _FALSE) */ 236*4882a593Smuzhiyun 237*4882a593Smuzhiyun /* #define RT_IS_FUNC_DISABLED(__pAdapter, __FuncBits) ( (__pAdapter)->DisabledFunctions & (__FuncBits) ) */ 238*4882a593Smuzhiyun 239*4882a593Smuzhiyun #ifdef CONFIG_PCI_HCI 240*4882a593Smuzhiyun /* according to the define in the rtw_xmit.h, rtw_recv.h */ 241*4882a593Smuzhiyun #define TX_DESC_NUM_8188EE TXDESC_NUM /* 128 */ 242*4882a593Smuzhiyun #ifdef CONFIG_CONCURRENT_MODE 243*4882a593Smuzhiyun /*#define BE_QUEUE_TX_DESC_NUM_8188EE (TXDESC_NUM<<1)*/ /* 256 */ 244*4882a593Smuzhiyun #define BE_QUEUE_TX_DESC_NUM_8188EE ((TXDESC_NUM<<1)+(TXDESC_NUM>>1)) /* 320 */ 245*4882a593Smuzhiyun /*#define BE_QUEUE_TX_DESC_NUM_8188EE ((TXDESC_NUM<<1)+TXDESC_NUM)*/ /* 384 */ 246*4882a593Smuzhiyun #else 247*4882a593Smuzhiyun #define BE_QUEUE_TX_DESC_NUM_8188EE TXDESC_NUM /* 128 */ 248*4882a593Smuzhiyun /*#define BE_QUEUE_TX_DESC_NUM_8188EE (TXDESC_NUM+(TXDESC_NUM>>1)) */ /* 192 */ 249*4882a593Smuzhiyun #endif 250*4882a593Smuzhiyun 251*4882a593Smuzhiyun void InterruptRecognized8188EE(PADAPTER Adapter, PRT_ISR_CONTENT pIsrContent); 252*4882a593Smuzhiyun void UpdateInterruptMask8188EE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1); 253*4882a593Smuzhiyun #endif /* CONFIG_PCI_HCI */ 254*4882a593Smuzhiyun 255*4882a593Smuzhiyun /* rtl8188e_hal_init.c */ 256*4882a593Smuzhiyun 257*4882a593Smuzhiyun s32 rtl8188e_FirmwareDownload(PADAPTER padapter, BOOLEAN bUsedWoWLANFw); 258*4882a593Smuzhiyun void _8051Reset88E(PADAPTER padapter); 259*4882a593Smuzhiyun void rtl8188e_InitializeFirmwareVars(PADAPTER padapter); 260*4882a593Smuzhiyun 261*4882a593Smuzhiyun 262*4882a593Smuzhiyun s32 InitLLTTable(PADAPTER padapter, u8 txpktbuf_bndy); 263*4882a593Smuzhiyun 264*4882a593Smuzhiyun /* EFuse */ 265*4882a593Smuzhiyun u8 GetEEPROMSize8188E(PADAPTER padapter); 266*4882a593Smuzhiyun void Hal_InitPGData88E(PADAPTER padapter); 267*4882a593Smuzhiyun void Hal_EfuseParseIDCode88E(PADAPTER padapter, u8 *hwinfo); 268*4882a593Smuzhiyun void Hal_ReadTxPowerInfo88E(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); 269*4882a593Smuzhiyun 270*4882a593Smuzhiyun void Hal_EfuseParseEEPROMVer88E(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); 271*4882a593Smuzhiyun void rtl8188e_EfuseParseChnlPlan(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); 272*4882a593Smuzhiyun void Hal_EfuseParseCustomerID88E(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); 273*4882a593Smuzhiyun void Hal_ReadAntennaDiversity88E(PADAPTER pAdapter, u8 *PROMContent, BOOLEAN AutoLoadFail); 274*4882a593Smuzhiyun void Hal_ReadThermalMeter_88E(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); 275*4882a593Smuzhiyun void Hal_EfuseParseXtal_8188E(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); 276*4882a593Smuzhiyun void Hal_EfuseParseBoardType88E(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); 277*4882a593Smuzhiyun void Hal_ReadPowerSavingMode88E(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); 278*4882a593Smuzhiyun void Hal_ReadPAType_8188E(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); 279*4882a593Smuzhiyun void Hal_ReadAmplifierType_8188E(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); 280*4882a593Smuzhiyun void Hal_ReadRFEType_8188E(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); 281*4882a593Smuzhiyun 282*4882a593Smuzhiyun BOOLEAN HalDetectPwrDownMode88E(PADAPTER Adapter); 283*4882a593Smuzhiyun 284*4882a593Smuzhiyun #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) 285*4882a593Smuzhiyun void Hal_DetectWoWMode(PADAPTER pAdapter); 286*4882a593Smuzhiyun #endif /* CONFIG_WOWLAN */ 287*4882a593Smuzhiyun 288*4882a593Smuzhiyun 289*4882a593Smuzhiyun #ifdef CONFIG_RF_POWER_TRIM 290*4882a593Smuzhiyun void Hal_ReadRFGainOffset(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); 291*4882a593Smuzhiyun #endif /*CONFIG_RF_POWER_TRIM*/ 292*4882a593Smuzhiyun 293*4882a593Smuzhiyun 294*4882a593Smuzhiyun void InitBeaconParameters_8188e(_adapter *adapter); 295*4882a593Smuzhiyun void SetBeaconRelatedRegisters8188E(PADAPTER padapter); 296*4882a593Smuzhiyun 297*4882a593Smuzhiyun void rtl8188e_set_hal_ops(struct hal_ops *pHalFunc); 298*4882a593Smuzhiyun void init_hal_spec_8188e(_adapter *adapter); 299*4882a593Smuzhiyun 300*4882a593Smuzhiyun void rtl8188e_start_thread(_adapter *padapter); 301*4882a593Smuzhiyun void rtl8188e_stop_thread(_adapter *padapter); 302*4882a593Smuzhiyun 303*4882a593Smuzhiyun void rtw_IOL_cmd_tx_pkt_buf_dump(ADAPTER *Adapter, int data_len); 304*4882a593Smuzhiyun #ifdef CONFIG_IOL_EFUSE_PATCH 305*4882a593Smuzhiyun s32 rtl8188e_iol_efuse_patch(PADAPTER padapter); 306*4882a593Smuzhiyun #endif/* CONFIG_IOL_EFUSE_PATCH */ 307*4882a593Smuzhiyun void _InitTransferPageSize(PADAPTER padapter); 308*4882a593Smuzhiyun 309*4882a593Smuzhiyun u8 SetHwReg8188E(PADAPTER padapter, u8 variable, u8 *val); 310*4882a593Smuzhiyun void GetHwReg8188E(PADAPTER padapter, u8 variable, u8 *val); 311*4882a593Smuzhiyun 312*4882a593Smuzhiyun u8 313*4882a593Smuzhiyun GetHalDefVar8188E( 314*4882a593Smuzhiyun PADAPTER Adapter, 315*4882a593Smuzhiyun HAL_DEF_VARIABLE eVariable, 316*4882a593Smuzhiyun void *pValue 317*4882a593Smuzhiyun ); 318*4882a593Smuzhiyun #ifdef CONFIG_GPIO_API 319*4882a593Smuzhiyun int rtl8188e_GpioFuncCheck(PADAPTER adapter, u8 gpio_num); 320*4882a593Smuzhiyun #endif 321*4882a593Smuzhiyun #endif /* __RTL8188E_HAL_H__ */ 322