1*4882a593Smuzhiyun /****************************************************************************** 2*4882a593Smuzhiyun * 3*4882a593Smuzhiyun * Copyright(c) 2007 - 2017 Realtek Corporation. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify it 6*4882a593Smuzhiyun * under the terms of version 2 of the GNU General Public License as 7*4882a593Smuzhiyun * published by the Free Software Foundation. 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * This program is distributed in the hope that it will be useful, but WITHOUT 10*4882a593Smuzhiyun * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11*4882a593Smuzhiyun * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12*4882a593Smuzhiyun * more details. 13*4882a593Smuzhiyun * 14*4882a593Smuzhiyun *****************************************************************************/ 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun #ifndef __HAL_PG_H__ 17*4882a593Smuzhiyun #define __HAL_PG_H__ 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun #define PPG_BB_GAIN_2G_TX_OFFSET_MASK 0x0F 20*4882a593Smuzhiyun #define PPG_BB_GAIN_2G_TXB_OFFSET_MASK 0xF0 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun #define PPG_BB_GAIN_5G_TX_OFFSET_MASK 0x1F 23*4882a593Smuzhiyun #define PPG_THERMAL_OFFSET_MASK 0x1F 24*4882a593Smuzhiyun #define KFREE_BB_GAIN_2G_TX_OFFSET(_ppg_v) (((_ppg_v) == PPG_BB_GAIN_2G_TX_OFFSET_MASK) ? 0 : (((_ppg_v) & 0x01) ? ((_ppg_v) >> 1) : (-((_ppg_v) >> 1)))) 25*4882a593Smuzhiyun #define KFREE_BB_GAIN_2G_TXB_OFFSET(_ppg_v) (((_ppg_v) == PPG_BB_GAIN_2G_TXB_OFFSET_MASK) ? 0 : (((_ppg_v) & 0x10) ? ((_ppg_v) >> 5) : (-((_ppg_v) >> 5)))) 26*4882a593Smuzhiyun #define KFREE_BB_GAIN_5G_TX_OFFSET(_ppg_v) (((_ppg_v) == PPG_BB_GAIN_5G_TX_OFFSET_MASK) ? 0 : (((_ppg_v) & 0x01) ? ((_ppg_v) >> 1) : (-((_ppg_v) >> 1)))) 27*4882a593Smuzhiyun #define KFREE_THERMAL_OFFSET(_ppg_v) (((_ppg_v) == PPG_THERMAL_OFFSET_MASK) ? 0 : (((_ppg_v) & 0x01) ? ((_ppg_v) >> 1) : (-((_ppg_v) >> 1)))) 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun /* **************************************************** 30*4882a593Smuzhiyun * EEPROM/Efuse PG Offset for 88EE/88EU/88ES 31*4882a593Smuzhiyun * **************************************************** */ 32*4882a593Smuzhiyun #define EEPROM_ChannelPlan_88E 0xB8 33*4882a593Smuzhiyun #define EEPROM_XTAL_88E 0xB9 34*4882a593Smuzhiyun #define EEPROM_THERMAL_METER_88E 0xBA 35*4882a593Smuzhiyun #define EEPROM_IQK_LCK_88E 0xBB 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun #define EEPROM_RF_BOARD_OPTION_88E 0xC1 38*4882a593Smuzhiyun #define EEPROM_RF_FEATURE_OPTION_88E 0xC2 39*4882a593Smuzhiyun #define EEPROM_RF_BT_SETTING_88E 0xC3 40*4882a593Smuzhiyun #define EEPROM_VERSION_88E 0xC4 41*4882a593Smuzhiyun #define EEPROM_CustomID_88E 0xC5 42*4882a593Smuzhiyun #define EEPROM_RF_ANTENNA_OPT_88E 0xC9 43*4882a593Smuzhiyun #define EEPROM_COUNTRY_CODE_88E 0xCB 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun /* RTL88EE */ 46*4882a593Smuzhiyun #define EEPROM_MAC_ADDR_88EE 0xD0 47*4882a593Smuzhiyun #define EEPROM_VID_88EE 0xD6 48*4882a593Smuzhiyun #define EEPROM_DID_88EE 0xD8 49*4882a593Smuzhiyun #define EEPROM_SVID_88EE 0xDA 50*4882a593Smuzhiyun #define EEPROM_SMID_88EE 0xDC 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun /* RTL88EU */ 53*4882a593Smuzhiyun #define EEPROM_MAC_ADDR_88EU 0xD7 54*4882a593Smuzhiyun #define EEPROM_VID_88EU 0xD0 55*4882a593Smuzhiyun #define EEPROM_PID_88EU 0xD2 56*4882a593Smuzhiyun #define EEPROM_USB_OPTIONAL_FUNCTION0 0xD4 /* 8188EU, 8192EU, 8812AU is the same */ 57*4882a593Smuzhiyun #define EEPROM_USB_OPTIONAL_FUNCTION0_8811AU 0x104 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun /* RTL88ES */ 60*4882a593Smuzhiyun #define EEPROM_MAC_ADDR_88ES 0x11A 61*4882a593Smuzhiyun /* **************************************************** 62*4882a593Smuzhiyun * EEPROM/Efuse PG Offset for 8192EE/8192EU/8192ES 63*4882a593Smuzhiyun * **************************************************** */ 64*4882a593Smuzhiyun #define GET_PG_KFREE_ON_8192E(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC1, 4, 1) 65*4882a593Smuzhiyun #define GET_PG_KFREE_THERMAL_K_ON_8192E(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 5, 1) 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun #define PPG_BB_GAIN_2G_TXA_OFFSET_8192E 0x1F6 68*4882a593Smuzhiyun #define PPG_THERMAL_OFFSET_8192E 0x1F5 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun #define EEPROM_ChannelPlan_8192E 0xB8 71*4882a593Smuzhiyun #define EEPROM_XTAL_8192E 0xB9 72*4882a593Smuzhiyun #define EEPROM_THERMAL_METER_8192E 0xBA 73*4882a593Smuzhiyun #define EEPROM_IQK_LCK_8192E 0xBB 74*4882a593Smuzhiyun #define EEPROM_2G_5G_PA_TYPE_8192E 0xBC 75*4882a593Smuzhiyun #define EEPROM_2G_LNA_TYPE_GAIN_SEL_8192E 0xBD 76*4882a593Smuzhiyun #define EEPROM_5G_LNA_TYPE_GAIN_SEL_8192E 0xBF 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun #define EEPROM_RF_BOARD_OPTION_8192E 0xC1 79*4882a593Smuzhiyun #define EEPROM_RF_FEATURE_OPTION_8192E 0xC2 80*4882a593Smuzhiyun #define EEPROM_RF_BT_SETTING_8192E 0xC3 81*4882a593Smuzhiyun #define EEPROM_VERSION_8192E 0xC4 82*4882a593Smuzhiyun #define EEPROM_CustomID_8192E 0xC5 83*4882a593Smuzhiyun #define EEPROM_TX_BBSWING_2G_8192E 0xC6 84*4882a593Smuzhiyun #define EEPROM_TX_BBSWING_5G_8192E 0xC7 85*4882a593Smuzhiyun #define EEPROM_TX_PWR_CALIBRATE_RATE_8192E 0xC8 86*4882a593Smuzhiyun #define EEPROM_RF_ANTENNA_OPT_8192E 0xC9 87*4882a593Smuzhiyun #define EEPROM_RFE_OPTION_8192E 0xCA 88*4882a593Smuzhiyun #define EEPROM_RFE_OPTION_8188E 0xCA 89*4882a593Smuzhiyun #define EEPROM_COUNTRY_CODE_8192E 0xCB 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun /* RTL8192EE */ 92*4882a593Smuzhiyun #define EEPROM_MAC_ADDR_8192EE 0xD0 93*4882a593Smuzhiyun #define EEPROM_VID_8192EE 0xD6 94*4882a593Smuzhiyun #define EEPROM_DID_8192EE 0xD8 95*4882a593Smuzhiyun #define EEPROM_SVID_8192EE 0xDA 96*4882a593Smuzhiyun #define EEPROM_SMID_8192EE 0xDC 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun /* RTL8192EU */ 99*4882a593Smuzhiyun #define EEPROM_MAC_ADDR_8192EU 0xD7 100*4882a593Smuzhiyun #define EEPROM_VID_8192EU 0xD0 101*4882a593Smuzhiyun #define EEPROM_PID_8192EU 0xD2 102*4882a593Smuzhiyun #define EEPROM_PA_TYPE_8192EU 0xBC 103*4882a593Smuzhiyun #define EEPROM_LNA_TYPE_2G_8192EU 0xBD 104*4882a593Smuzhiyun #define EEPROM_LNA_TYPE_5G_8192EU 0xBF 105*4882a593Smuzhiyun 106*4882a593Smuzhiyun /* RTL8192ES */ 107*4882a593Smuzhiyun #define EEPROM_MAC_ADDR_8192ES 0x11A 108*4882a593Smuzhiyun /* **************************************************** 109*4882a593Smuzhiyun * EEPROM/Efuse PG Offset for 8812AE/8812AU/8812AS 110*4882a593Smuzhiyun * *****************************************************/ 111*4882a593Smuzhiyun #define EEPROM_USB_MODE_8812 0x08 112*4882a593Smuzhiyun 113*4882a593Smuzhiyun #define EEPROM_ChannelPlan_8812 0xB8 114*4882a593Smuzhiyun #define EEPROM_XTAL_8812 0xB9 115*4882a593Smuzhiyun #define EEPROM_THERMAL_METER_8812 0xBA 116*4882a593Smuzhiyun #define EEPROM_IQK_LCK_8812 0xBB 117*4882a593Smuzhiyun #define EEPROM_2G_5G_PA_TYPE_8812 0xBC 118*4882a593Smuzhiyun #define EEPROM_2G_LNA_TYPE_GAIN_SEL_8812 0xBD 119*4882a593Smuzhiyun #define EEPROM_5G_LNA_TYPE_GAIN_SEL_8812 0xBF 120*4882a593Smuzhiyun 121*4882a593Smuzhiyun #define EEPROM_RF_BOARD_OPTION_8812 0xC1 122*4882a593Smuzhiyun #define EEPROM_RF_FEATURE_OPTION_8812 0xC2 123*4882a593Smuzhiyun #define EEPROM_RF_BT_SETTING_8812 0xC3 124*4882a593Smuzhiyun #define EEPROM_VERSION_8812 0xC4 125*4882a593Smuzhiyun #define EEPROM_CustomID_8812 0xC5 126*4882a593Smuzhiyun #define EEPROM_TX_BBSWING_2G_8812 0xC6 127*4882a593Smuzhiyun #define EEPROM_TX_BBSWING_5G_8812 0xC7 128*4882a593Smuzhiyun #define EEPROM_TX_PWR_CALIBRATE_RATE_8812 0xC8 129*4882a593Smuzhiyun #define EEPROM_RF_ANTENNA_OPT_8812 0xC9 130*4882a593Smuzhiyun #define EEPROM_RFE_OPTION_8812 0xCA 131*4882a593Smuzhiyun #define EEPROM_COUNTRY_CODE_8812 0xCB 132*4882a593Smuzhiyun 133*4882a593Smuzhiyun /* RTL8812AE */ 134*4882a593Smuzhiyun #define EEPROM_MAC_ADDR_8812AE 0xD0 135*4882a593Smuzhiyun #define EEPROM_VID_8812AE 0xD6 136*4882a593Smuzhiyun #define EEPROM_DID_8812AE 0xD8 137*4882a593Smuzhiyun #define EEPROM_SVID_8812AE 0xDA 138*4882a593Smuzhiyun #define EEPROM_SMID_8812AE 0xDC 139*4882a593Smuzhiyun 140*4882a593Smuzhiyun /* RTL8812AU */ 141*4882a593Smuzhiyun #define EEPROM_MAC_ADDR_8812AU 0xD7 142*4882a593Smuzhiyun #define EEPROM_VID_8812AU 0xD0 143*4882a593Smuzhiyun #define EEPROM_PID_8812AU 0xD2 144*4882a593Smuzhiyun #define EEPROM_PA_TYPE_8812AU 0xBC 145*4882a593Smuzhiyun #define EEPROM_LNA_TYPE_2G_8812AU 0xBD 146*4882a593Smuzhiyun #define EEPROM_LNA_TYPE_5G_8812AU 0xBF 147*4882a593Smuzhiyun 148*4882a593Smuzhiyun /* RTL8814AU */ 149*4882a593Smuzhiyun #define EEPROM_MAC_ADDR_8814AU 0xD8 150*4882a593Smuzhiyun #define EEPROM_VID_8814AU 0xD0 151*4882a593Smuzhiyun #define EEPROM_PID_8814AU 0xD2 152*4882a593Smuzhiyun #define EEPROM_PA_TYPE_8814AU 0xBC 153*4882a593Smuzhiyun #define EEPROM_LNA_TYPE_2G_8814AU 0xBD 154*4882a593Smuzhiyun #define EEPROM_LNA_TYPE_5G_8814AU 0xBF 155*4882a593Smuzhiyun 156*4882a593Smuzhiyun /* RTL8814AE */ 157*4882a593Smuzhiyun #define EEPROM_MAC_ADDR_8814AE 0xD0 158*4882a593Smuzhiyun #define EEPROM_VID_8814AE 0xD6 159*4882a593Smuzhiyun #define EEPROM_DID_8814AE 0xD8 160*4882a593Smuzhiyun #define EEPROM_SVID_8814AE 0xDA 161*4882a593Smuzhiyun #define EEPROM_SMID_8814AE 0xDC 162*4882a593Smuzhiyun 163*4882a593Smuzhiyun /* **************************************************** 164*4882a593Smuzhiyun * EEPROM/Efuse PG Offset for 8814AU 165*4882a593Smuzhiyun * **************************************************** */ 166*4882a593Smuzhiyun #define GET_PG_KFREE_ON_8814A(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 4, 1) 167*4882a593Smuzhiyun #define GET_PG_KFREE_THERMAL_K_ON_8814A(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 5, 1) 168*4882a593Smuzhiyun #define GET_PG_TX_POWER_TRACKING_MODE_8814A(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 6, 2) 169*4882a593Smuzhiyun 170*4882a593Smuzhiyun #define KFREE_GAIN_DATA_LENGTH_8814A 22 171*4882a593Smuzhiyun 172*4882a593Smuzhiyun #define PPG_BB_GAIN_2G_TXBA_OFFSET_8814A 0x3EE 173*4882a593Smuzhiyun 174*4882a593Smuzhiyun #define PPG_THERMAL_OFFSET_8814A 0x3EF 175*4882a593Smuzhiyun 176*4882a593Smuzhiyun #define EEPROM_USB_MODE_8814A 0x0E 177*4882a593Smuzhiyun #define EEPROM_ChannelPlan_8814 0xB8 178*4882a593Smuzhiyun #define EEPROM_XTAL_8814 0xB9 179*4882a593Smuzhiyun #define EEPROM_THERMAL_METER_8814 0xBA 180*4882a593Smuzhiyun #define EEPROM_IQK_LCK_8814 0xBB 181*4882a593Smuzhiyun 182*4882a593Smuzhiyun 183*4882a593Smuzhiyun #define EEPROM_PA_TYPE_8814 0xBC 184*4882a593Smuzhiyun #define EEPROM_LNA_TYPE_AB_2G_8814 0xBD 185*4882a593Smuzhiyun #define EEPROM_LNA_TYPE_CD_2G_8814 0xBE 186*4882a593Smuzhiyun #define EEPROM_LNA_TYPE_AB_5G_8814 0xBF 187*4882a593Smuzhiyun #define EEPROM_LNA_TYPE_CD_5G_8814 0xC0 188*4882a593Smuzhiyun #define EEPROM_RF_BOARD_OPTION_8814 0xC1 189*4882a593Smuzhiyun #define EEPROM_RF_BT_SETTING_8814 0xC3 190*4882a593Smuzhiyun #define EEPROM_VERSION_8814 0xC4 191*4882a593Smuzhiyun #define EEPROM_CustomID_8814 0xC5 192*4882a593Smuzhiyun #define EEPROM_TX_BBSWING_2G_8814 0xC6 193*4882a593Smuzhiyun #define EEPROM_TX_BBSWING_5G_8814 0xC7 194*4882a593Smuzhiyun #define EEPROM_TRX_ANTENNA_OPTION_8814 0xC9 195*4882a593Smuzhiyun #define EEPROM_RFE_OPTION_8814 0xCA 196*4882a593Smuzhiyun #define EEPROM_COUNTRY_CODE_8814 0xCB 197*4882a593Smuzhiyun 198*4882a593Smuzhiyun /*Extra Info for 8814A Initial Gain Fine Tune suggested by Willis, JIRA: MP123*/ 199*4882a593Smuzhiyun #define EEPROM_IG_OFFSET_4_AB_2G_8814A 0x120 200*4882a593Smuzhiyun #define EEPROM_IG_OFFSET_4_CD_2G_8814A 0x121 201*4882a593Smuzhiyun #define EEPROM_IG_OFFSET_4_AB_5GL_8814A 0x122 202*4882a593Smuzhiyun #define EEPROM_IG_OFFSET_4_CD_5GL_8814A 0x123 203*4882a593Smuzhiyun #define EEPROM_IG_OFFSET_4_AB_5GM_8814A 0x124 204*4882a593Smuzhiyun #define EEPROM_IG_OFFSET_4_CD_5GM_8814A 0x125 205*4882a593Smuzhiyun #define EEPROM_IG_OFFSET_4_AB_5GH_8814A 0x126 206*4882a593Smuzhiyun #define EEPROM_IG_OFFSET_4_CD_5GH_8814A 0x127 207*4882a593Smuzhiyun 208*4882a593Smuzhiyun /* **************************************************** 209*4882a593Smuzhiyun * EEPROM/Efuse PG Offset for 8821AE/8821AU/8821AS 210*4882a593Smuzhiyun * **************************************************** */ 211*4882a593Smuzhiyun 212*4882a593Smuzhiyun #define GET_PG_KFREE_ON_8821A(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 4, 1) 213*4882a593Smuzhiyun #define GET_PG_KFREE_THERMAL_K_ON_8821A(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 5, 1) 214*4882a593Smuzhiyun 215*4882a593Smuzhiyun #define PPG_BB_GAIN_2G_TXA_OFFSET_8821A 0x1F6 216*4882a593Smuzhiyun #define PPG_THERMAL_OFFSET_8821A 0x1F5 217*4882a593Smuzhiyun #define PPG_BB_GAIN_5GLB1_TXA_OFFSET_8821A 0x1F4 218*4882a593Smuzhiyun #define PPG_BB_GAIN_5GLB2_TXA_OFFSET_8821A 0x1F3 219*4882a593Smuzhiyun #define PPG_BB_GAIN_5GMB1_TXA_OFFSET_8821A 0x1F2 220*4882a593Smuzhiyun #define PPG_BB_GAIN_5GMB2_TXA_OFFSET_8821A 0x1F1 221*4882a593Smuzhiyun #define PPG_BB_GAIN_5GHB_TXA_OFFSET_8821A 0x1F0 222*4882a593Smuzhiyun 223*4882a593Smuzhiyun #define EEPROM_ChannelPlan_8821 0xB8 224*4882a593Smuzhiyun #define EEPROM_XTAL_8821 0xB9 225*4882a593Smuzhiyun #define EEPROM_THERMAL_METER_8821 0xBA 226*4882a593Smuzhiyun #define EEPROM_IQK_LCK_8821 0xBB 227*4882a593Smuzhiyun 228*4882a593Smuzhiyun 229*4882a593Smuzhiyun #define EEPROM_RF_BOARD_OPTION_8821 0xC1 230*4882a593Smuzhiyun #define EEPROM_RF_FEATURE_OPTION_8821 0xC2 231*4882a593Smuzhiyun #define EEPROM_RF_BT_SETTING_8821 0xC3 232*4882a593Smuzhiyun #define EEPROM_VERSION_8821 0xC4 233*4882a593Smuzhiyun #define EEPROM_CustomID_8821 0xC5 234*4882a593Smuzhiyun #define EEPROM_RF_ANTENNA_OPT_8821 0xC9 235*4882a593Smuzhiyun 236*4882a593Smuzhiyun /* RTL8821AE */ 237*4882a593Smuzhiyun #define EEPROM_MAC_ADDR_8821AE 0xD0 238*4882a593Smuzhiyun #define EEPROM_VID_8821AE 0xD6 239*4882a593Smuzhiyun #define EEPROM_DID_8821AE 0xD8 240*4882a593Smuzhiyun #define EEPROM_SVID_8821AE 0xDA 241*4882a593Smuzhiyun #define EEPROM_SMID_8821AE 0xDC 242*4882a593Smuzhiyun 243*4882a593Smuzhiyun /* RTL8821AU */ 244*4882a593Smuzhiyun #define EEPROM_PA_TYPE_8821AU 0xBC 245*4882a593Smuzhiyun #define EEPROM_LNA_TYPE_8821AU 0xBF 246*4882a593Smuzhiyun 247*4882a593Smuzhiyun /* RTL8821AS */ 248*4882a593Smuzhiyun #define EEPROM_MAC_ADDR_8821AS 0x11A 249*4882a593Smuzhiyun 250*4882a593Smuzhiyun /* RTL8821AU */ 251*4882a593Smuzhiyun #define EEPROM_MAC_ADDR_8821AU 0x107 252*4882a593Smuzhiyun #define EEPROM_VID_8821AU 0x100 253*4882a593Smuzhiyun #define EEPROM_PID_8821AU 0x102 254*4882a593Smuzhiyun 255*4882a593Smuzhiyun 256*4882a593Smuzhiyun /* **************************************************** 257*4882a593Smuzhiyun * EEPROM/Efuse PG Offset for 8192 SE/SU 258*4882a593Smuzhiyun * **************************************************** */ 259*4882a593Smuzhiyun #define EEPROM_VID_92SE 0x0A 260*4882a593Smuzhiyun #define EEPROM_DID_92SE 0x0C 261*4882a593Smuzhiyun #define EEPROM_SVID_92SE 0x0E 262*4882a593Smuzhiyun #define EEPROM_SMID_92SE 0x10 263*4882a593Smuzhiyun 264*4882a593Smuzhiyun #define EEPROM_MAC_ADDR_92S 0x12 265*4882a593Smuzhiyun 266*4882a593Smuzhiyun #define EEPROM_TSSI_A_92SE 0x74 267*4882a593Smuzhiyun #define EEPROM_TSSI_B_92SE 0x75 268*4882a593Smuzhiyun 269*4882a593Smuzhiyun #define EEPROM_Version_92SE 0x7C 270*4882a593Smuzhiyun 271*4882a593Smuzhiyun 272*4882a593Smuzhiyun #define EEPROM_VID_92SU 0x08 273*4882a593Smuzhiyun #define EEPROM_PID_92SU 0x0A 274*4882a593Smuzhiyun 275*4882a593Smuzhiyun #define EEPROM_Version_92SU 0x50 276*4882a593Smuzhiyun #define EEPROM_TSSI_A_92SU 0x6b 277*4882a593Smuzhiyun #define EEPROM_TSSI_B_92SU 0x6c 278*4882a593Smuzhiyun 279*4882a593Smuzhiyun /* ==================================================== 280*4882a593Smuzhiyun EEPROM/Efuse PG Offset for 8188FE/8188FU/8188FS 281*4882a593Smuzhiyun ==================================================== 282*4882a593Smuzhiyun */ 283*4882a593Smuzhiyun 284*4882a593Smuzhiyun #define GET_PG_KFREE_ON_8188F(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC1, 4, 1) 285*4882a593Smuzhiyun #define GET_PG_KFREE_THERMAL_K_ON_8188F(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 5, 1) 286*4882a593Smuzhiyun 287*4882a593Smuzhiyun #define PPG_BB_GAIN_2G_TXA_OFFSET_8188F 0xEE 288*4882a593Smuzhiyun #define PPG_THERMAL_OFFSET_8188F 0xEF 289*4882a593Smuzhiyun 290*4882a593Smuzhiyun #define EEPROM_ChannelPlan_8188F 0xB8 291*4882a593Smuzhiyun #define EEPROM_XTAL_8188F 0xB9 292*4882a593Smuzhiyun #define EEPROM_THERMAL_METER_8188F 0xBA 293*4882a593Smuzhiyun #define EEPROM_IQK_LCK_8188F 0xBB 294*4882a593Smuzhiyun #define EEPROM_2G_5G_PA_TYPE_8188F 0xBC 295*4882a593Smuzhiyun #define EEPROM_2G_LNA_TYPE_GAIN_SEL_8188F 0xBD 296*4882a593Smuzhiyun #define EEPROM_5G_LNA_TYPE_GAIN_SEL_8188F 0xBF 297*4882a593Smuzhiyun 298*4882a593Smuzhiyun #define EEPROM_RF_BOARD_OPTION_8188F 0xC1 299*4882a593Smuzhiyun #define EEPROM_FEATURE_OPTION_8188F 0xC2 300*4882a593Smuzhiyun #define EEPROM_RF_BT_SETTING_8188F 0xC3 301*4882a593Smuzhiyun #define EEPROM_VERSION_8188F 0xC4 302*4882a593Smuzhiyun #define EEPROM_CustomID_8188F 0xC5 303*4882a593Smuzhiyun #define EEPROM_TX_BBSWING_2G_8188F 0xC6 304*4882a593Smuzhiyun #define EEPROM_TX_PWR_CALIBRATE_RATE_8188F 0xC8 305*4882a593Smuzhiyun #define EEPROM_RF_ANTENNA_OPT_8188F 0xC9 306*4882a593Smuzhiyun #define EEPROM_RFE_OPTION_8188F 0xCA 307*4882a593Smuzhiyun #define EEPROM_COUNTRY_CODE_8188F 0xCB 308*4882a593Smuzhiyun #define EEPROM_CUSTOMER_ID_8188F 0x7F 309*4882a593Smuzhiyun #define EEPROM_SUBCUSTOMER_ID_8188F 0x59 310*4882a593Smuzhiyun 311*4882a593Smuzhiyun /* RTL8188FU */ 312*4882a593Smuzhiyun #define EEPROM_MAC_ADDR_8188FU 0xD7 313*4882a593Smuzhiyun #define EEPROM_VID_8188FU 0xD0 314*4882a593Smuzhiyun #define EEPROM_PID_8188FU 0xD2 315*4882a593Smuzhiyun #define EEPROM_PA_TYPE_8188FU 0xBC 316*4882a593Smuzhiyun #define EEPROM_LNA_TYPE_2G_8188FU 0xBD 317*4882a593Smuzhiyun #define EEPROM_USB_OPTIONAL_FUNCTION0_8188FU 0xD4 318*4882a593Smuzhiyun 319*4882a593Smuzhiyun /* RTL8188FS */ 320*4882a593Smuzhiyun #define EEPROM_MAC_ADDR_8188FS 0x11A 321*4882a593Smuzhiyun #define EEPROM_Voltage_ADDR_8188F 0x8 322*4882a593Smuzhiyun 323*4882a593Smuzhiyun /* ==================================================== 324*4882a593Smuzhiyun EEPROM/Efuse PG Offset for 8188GTV/8188GTVS 325*4882a593Smuzhiyun ==================================================== 326*4882a593Smuzhiyun */ 327*4882a593Smuzhiyun 328*4882a593Smuzhiyun #define GET_PG_KFREE_ON_8188GTV(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC1, 4, 1) 329*4882a593Smuzhiyun #define GET_PG_KFREE_THERMAL_K_ON_8188GTV(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 5, 1) 330*4882a593Smuzhiyun 331*4882a593Smuzhiyun #define PPG_BB_GAIN_2G_TXA_OFFSET_8188GTV 0xEE 332*4882a593Smuzhiyun #define PPG_THERMAL_OFFSET_8188GTV 0xEF 333*4882a593Smuzhiyun 334*4882a593Smuzhiyun #define EEPROM_ChannelPlan_8188GTV 0xB8 335*4882a593Smuzhiyun #define EEPROM_XTAL_8188GTV 0xB9 336*4882a593Smuzhiyun #define EEPROM_THERMAL_METER_8188GTV 0xBA 337*4882a593Smuzhiyun #define EEPROM_IQK_LCK_8188GTV 0xBB 338*4882a593Smuzhiyun #define EEPROM_2G_5G_PA_TYPE_8188GTV 0xBC 339*4882a593Smuzhiyun #define EEPROM_2G_LNA_TYPE_GAIN_SEL_8188GTV 0xBD 340*4882a593Smuzhiyun #define EEPROM_5G_LNA_TYPE_GAIN_SEL_8188GTV 0xBF 341*4882a593Smuzhiyun 342*4882a593Smuzhiyun #define EEPROM_RF_BOARD_OPTION_8188GTV 0xC1 343*4882a593Smuzhiyun #define EEPROM_FEATURE_OPTION_8188GTV 0xC2 344*4882a593Smuzhiyun #define EEPROM_RF_BT_SETTING_8188GTV 0xC3 345*4882a593Smuzhiyun #define EEPROM_VERSION_8188GTV 0xC4 346*4882a593Smuzhiyun #define EEPROM_CustomID_8188GTV 0xC5 347*4882a593Smuzhiyun #define EEPROM_TX_BBSWING_2G_8188GTV 0xC6 348*4882a593Smuzhiyun #define EEPROM_TX_PWR_CALIBRATE_RATE_8188GTV 0xC8 349*4882a593Smuzhiyun #define EEPROM_RF_ANTENNA_OPT_8188GTV 0xC9 350*4882a593Smuzhiyun #define EEPROM_RFE_OPTION_8188GTV 0xCA 351*4882a593Smuzhiyun #define EEPROM_COUNTRY_CODE_8188GTV 0xCB 352*4882a593Smuzhiyun #define EEPROM_CUSTOMER_ID_8188GTV 0x7F 353*4882a593Smuzhiyun #define EEPROM_SUBCUSTOMER_ID_8188GTV 0x59 354*4882a593Smuzhiyun 355*4882a593Smuzhiyun /* RTL8188GTVU */ 356*4882a593Smuzhiyun #define EEPROM_MAC_ADDR_8188GTVU 0xD7 357*4882a593Smuzhiyun #define EEPROM_VID_8188GTVU 0xD0 358*4882a593Smuzhiyun #define EEPROM_PID_8188GTVU 0xD2 359*4882a593Smuzhiyun #define EEPROM_PA_TYPE_8188GTVU 0xBC 360*4882a593Smuzhiyun #define EEPROM_LNA_TYPE_2G_8188GTVU 0xBD 361*4882a593Smuzhiyun #define EEPROM_USB_OPTIONAL_FUNCTION0_8188GTVU 0xD4 362*4882a593Smuzhiyun 363*4882a593Smuzhiyun /* RTL8188GTVS */ 364*4882a593Smuzhiyun #define EEPROM_MAC_ADDR_8188GTVS 0x11A 365*4882a593Smuzhiyun #define EEPROM_Voltage_ADDR_8188GTV 0x8 366*4882a593Smuzhiyun 367*4882a593Smuzhiyun /* **************************************************** 368*4882a593Smuzhiyun * EEPROM/Efuse PG Offset for 8723BE/8723BU/8723BS 369*4882a593Smuzhiyun * *****************************************************/ 370*4882a593Smuzhiyun #define EEPROM_ChannelPlan_8723B 0xB8 371*4882a593Smuzhiyun #define EEPROM_XTAL_8723B 0xB9 372*4882a593Smuzhiyun #define EEPROM_THERMAL_METER_8723B 0xBA 373*4882a593Smuzhiyun #define EEPROM_IQK_LCK_8723B 0xBB 374*4882a593Smuzhiyun #define EEPROM_2G_5G_PA_TYPE_8723B 0xBC 375*4882a593Smuzhiyun #define EEPROM_2G_LNA_TYPE_GAIN_SEL_8723B 0xBD 376*4882a593Smuzhiyun #define EEPROM_5G_LNA_TYPE_GAIN_SEL_8723B 0xBF 377*4882a593Smuzhiyun 378*4882a593Smuzhiyun #define EEPROM_RF_BOARD_OPTION_8723B 0xC1 379*4882a593Smuzhiyun #define EEPROM_FEATURE_OPTION_8723B 0xC2 380*4882a593Smuzhiyun #define EEPROM_RF_BT_SETTING_8723B 0xC3 381*4882a593Smuzhiyun #define EEPROM_VERSION_8723B 0xC4 382*4882a593Smuzhiyun #define EEPROM_CustomID_8723B 0xC5 383*4882a593Smuzhiyun #define EEPROM_TX_BBSWING_2G_8723B 0xC6 384*4882a593Smuzhiyun #define EEPROM_TX_PWR_CALIBRATE_RATE_8723B 0xC8 385*4882a593Smuzhiyun #define EEPROM_RF_ANTENNA_OPT_8723B 0xC9 386*4882a593Smuzhiyun #define EEPROM_RFE_OPTION_8723B 0xCA 387*4882a593Smuzhiyun #define EEPROM_COUNTRY_CODE_8723B 0xCB 388*4882a593Smuzhiyun 389*4882a593Smuzhiyun /* RTL8723BE */ 390*4882a593Smuzhiyun #define EEPROM_MAC_ADDR_8723BE 0xD0 391*4882a593Smuzhiyun #define EEPROM_VID_8723BE 0xD6 392*4882a593Smuzhiyun #define EEPROM_DID_8723BE 0xD8 393*4882a593Smuzhiyun #define EEPROM_SVID_8723BE 0xDA 394*4882a593Smuzhiyun #define EEPROM_SMID_8723BE 0xDC 395*4882a593Smuzhiyun 396*4882a593Smuzhiyun /* RTL8723BU */ 397*4882a593Smuzhiyun #define EEPROM_MAC_ADDR_8723BU 0x107 398*4882a593Smuzhiyun #define EEPROM_VID_8723BU 0x100 399*4882a593Smuzhiyun #define EEPROM_PID_8723BU 0x102 400*4882a593Smuzhiyun #define EEPROM_PA_TYPE_8723BU 0xBC 401*4882a593Smuzhiyun #define EEPROM_LNA_TYPE_2G_8723BU 0xBD 402*4882a593Smuzhiyun 403*4882a593Smuzhiyun 404*4882a593Smuzhiyun /* RTL8723BS */ 405*4882a593Smuzhiyun #define EEPROM_MAC_ADDR_8723BS 0x11A 406*4882a593Smuzhiyun #define EEPROM_Voltage_ADDR_8723B 0x8 407*4882a593Smuzhiyun 408*4882a593Smuzhiyun /* **************************************************** 409*4882a593Smuzhiyun * EEPROM/Efuse PG Offset for 8703B 410*4882a593Smuzhiyun * **************************************************** */ 411*4882a593Smuzhiyun #define GET_PG_KFREE_ON_8703B(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC1, 4, 1) 412*4882a593Smuzhiyun #define GET_PG_KFREE_THERMAL_K_ON_8703B(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 5, 1) 413*4882a593Smuzhiyun 414*4882a593Smuzhiyun #define PPG_BB_GAIN_2G_TXA_OFFSET_8703B 0xEE 415*4882a593Smuzhiyun #define PPG_THERMAL_OFFSET_8703B 0xEF 416*4882a593Smuzhiyun 417*4882a593Smuzhiyun #define EEPROM_ChannelPlan_8703B 0xB8 418*4882a593Smuzhiyun #define EEPROM_XTAL_8703B 0xB9 419*4882a593Smuzhiyun #define EEPROM_THERMAL_METER_8703B 0xBA 420*4882a593Smuzhiyun #define EEPROM_IQK_LCK_8703B 0xBB 421*4882a593Smuzhiyun #define EEPROM_2G_5G_PA_TYPE_8703B 0xBC 422*4882a593Smuzhiyun #define EEPROM_2G_LNA_TYPE_GAIN_SEL_8703B 0xBD 423*4882a593Smuzhiyun #define EEPROM_5G_LNA_TYPE_GAIN_SEL_8703B 0xBF 424*4882a593Smuzhiyun 425*4882a593Smuzhiyun #define EEPROM_RF_BOARD_OPTION_8703B 0xC1 426*4882a593Smuzhiyun #define EEPROM_FEATURE_OPTION_8703B 0xC2 427*4882a593Smuzhiyun #define EEPROM_RF_BT_SETTING_8703B 0xC3 428*4882a593Smuzhiyun #define EEPROM_VERSION_8703B 0xC4 429*4882a593Smuzhiyun #define EEPROM_CustomID_8703B 0xC5 430*4882a593Smuzhiyun #define EEPROM_TX_BBSWING_2G_8703B 0xC6 431*4882a593Smuzhiyun #define EEPROM_TX_PWR_CALIBRATE_RATE_8703B 0xC8 432*4882a593Smuzhiyun #define EEPROM_RF_ANTENNA_OPT_8703B 0xC9 433*4882a593Smuzhiyun #define EEPROM_RFE_OPTION_8703B 0xCA 434*4882a593Smuzhiyun #define EEPROM_COUNTRY_CODE_8703B 0xCB 435*4882a593Smuzhiyun 436*4882a593Smuzhiyun /* RTL8703BU */ 437*4882a593Smuzhiyun #define EEPROM_MAC_ADDR_8703BU 0x107 438*4882a593Smuzhiyun #define EEPROM_VID_8703BU 0x100 439*4882a593Smuzhiyun #define EEPROM_PID_8703BU 0x102 440*4882a593Smuzhiyun #define EEPROM_USB_OPTIONAL_FUNCTION0_8703BU 0x104 441*4882a593Smuzhiyun #define EEPROM_PA_TYPE_8703BU 0xBC 442*4882a593Smuzhiyun #define EEPROM_LNA_TYPE_2G_8703BU 0xBD 443*4882a593Smuzhiyun 444*4882a593Smuzhiyun /* RTL8703BS */ 445*4882a593Smuzhiyun #define EEPROM_MAC_ADDR_8703BS 0x11A 446*4882a593Smuzhiyun #define EEPROM_Voltage_ADDR_8703B 0x8 447*4882a593Smuzhiyun 448*4882a593Smuzhiyun /* 449*4882a593Smuzhiyun * ==================================================== 450*4882a593Smuzhiyun * EEPROM/Efuse PG Offset for 8822B 451*4882a593Smuzhiyun * ==================================================== 452*4882a593Smuzhiyun */ 453*4882a593Smuzhiyun #define EEPROM_ChannelPlan_8822B 0xB8 454*4882a593Smuzhiyun #define EEPROM_XTAL_8822B 0xB9 455*4882a593Smuzhiyun #define EEPROM_THERMAL_METER_8822B 0xBA 456*4882a593Smuzhiyun #define EEPROM_IQK_LCK_8822B 0xBB 457*4882a593Smuzhiyun #define EEPROM_2G_5G_PA_TYPE_8822B 0xBC 458*4882a593Smuzhiyun /* PATH A & PATH B */ 459*4882a593Smuzhiyun #define EEPROM_2G_LNA_TYPE_GAIN_SEL_AB_8822B 0xBD 460*4882a593Smuzhiyun /* PATH C & PATH D */ 461*4882a593Smuzhiyun #define EEPROM_2G_LNA_TYPE_GAIN_SEL_CD_8822B 0xBE 462*4882a593Smuzhiyun /* PATH A & PATH B */ 463*4882a593Smuzhiyun #define EEPROM_5G_LNA_TYPE_GAIN_SEL_AB_8822B 0xBF 464*4882a593Smuzhiyun /* PATH C & PATH D */ 465*4882a593Smuzhiyun #define EEPROM_5G_LNA_TYPE_GAIN_SEL_CD_8822B 0xC0 466*4882a593Smuzhiyun 467*4882a593Smuzhiyun #define EEPROM_RF_BOARD_OPTION_8822B 0xC1 468*4882a593Smuzhiyun #define EEPROM_FEATURE_OPTION_8822B 0xC2 469*4882a593Smuzhiyun #define EEPROM_RF_BT_SETTING_8822B 0xC3 470*4882a593Smuzhiyun #define EEPROM_VERSION_8822B 0xC4 471*4882a593Smuzhiyun #define EEPROM_CustomID_8822B 0xC5 472*4882a593Smuzhiyun #define EEPROM_TX_BBSWING_2G_8822B 0xC6 473*4882a593Smuzhiyun #define EEPROM_TX_PWR_CALIBRATE_RATE_8822B 0xC8 474*4882a593Smuzhiyun #define EEPROM_RF_ANTENNA_OPT_8822B 0xC9 475*4882a593Smuzhiyun #define EEPROM_RFE_OPTION_8822B 0xCA 476*4882a593Smuzhiyun #define EEPROM_COUNTRY_CODE_8822B 0xCB 477*4882a593Smuzhiyun 478*4882a593Smuzhiyun /* RTL8822BU */ 479*4882a593Smuzhiyun #define EEPROM_MAC_ADDR_8822BU 0x107 480*4882a593Smuzhiyun #define EEPROM_VID_8822BU 0x100 481*4882a593Smuzhiyun #define EEPROM_PID_8822BU 0x102 482*4882a593Smuzhiyun #define EEPROM_USB_OPTIONAL_FUNCTION0_8822BU 0x104 483*4882a593Smuzhiyun #define EEPROM_USB_MODE_8822BU 0x06 484*4882a593Smuzhiyun 485*4882a593Smuzhiyun /* RTL8822BS */ 486*4882a593Smuzhiyun #define EEPROM_MAC_ADDR_8822BS 0x11A 487*4882a593Smuzhiyun 488*4882a593Smuzhiyun /* RTL8822BE */ 489*4882a593Smuzhiyun #define EEPROM_MAC_ADDR_8822BE 0xD0 490*4882a593Smuzhiyun /* 491*4882a593Smuzhiyun * ==================================================== 492*4882a593Smuzhiyun * EEPROM/Efuse PG Offset for 8821C 493*4882a593Smuzhiyun * ==================================================== 494*4882a593Smuzhiyun */ 495*4882a593Smuzhiyun #define EEPROM_CHANNEL_PLAN_8821C 0xB8 496*4882a593Smuzhiyun #define EEPROM_XTAL_8821C 0xB9 497*4882a593Smuzhiyun #define EEPROM_THERMAL_METER_8821C 0xBA 498*4882a593Smuzhiyun #define EEPROM_IQK_LCK_8821C 0xBB 499*4882a593Smuzhiyun #define EEPROM_2G_5G_PA_TYPE_8821C 0xBC 500*4882a593Smuzhiyun /* PATH A & PATH B */ 501*4882a593Smuzhiyun #define EEPROM_2G_LNA_TYPE_GAIN_SEL_AB_8821C 0xBD 502*4882a593Smuzhiyun /* PATH C & PATH D */ 503*4882a593Smuzhiyun #define EEPROM_2G_LNA_TYPE_GAIN_SEL_CD_8821C 0xBE 504*4882a593Smuzhiyun /* PATH A & PATH B */ 505*4882a593Smuzhiyun #define EEPROM_5G_LNA_TYPE_GAIN_SEL_AB_8821C 0xBF 506*4882a593Smuzhiyun /* PATH C & PATH D */ 507*4882a593Smuzhiyun #define EEPROM_5G_LNA_TYPE_GAIN_SEL_CD_8821C 0xC0 508*4882a593Smuzhiyun 509*4882a593Smuzhiyun #define EEPROM_RF_BOARD_OPTION_8821C 0xC1 510*4882a593Smuzhiyun #define EEPROM_FEATURE_OPTION_8821C 0xC2 511*4882a593Smuzhiyun #define EEPROM_RF_BT_SETTING_8821C 0xC3 512*4882a593Smuzhiyun #define EEPROM_VERSION_8821C 0xC4 513*4882a593Smuzhiyun #define EEPROM_CUSTOMER_ID_8821C 0xC5 514*4882a593Smuzhiyun #define EEPROM_TX_BBSWING_2G_8821C 0xC6 515*4882a593Smuzhiyun #define EEPROM_TX_BBSWING_5G_8821C 0xC7 516*4882a593Smuzhiyun #define EEPROM_TX_PWR_CALIBRATE_RATE_8821C 0xC8 517*4882a593Smuzhiyun #define EEPROM_RF_ANTENNA_OPT_8821C 0xC9 518*4882a593Smuzhiyun #define EEPROM_RFE_OPTION_8821C 0xCA 519*4882a593Smuzhiyun #define EEPROM_COUNTRY_CODE_8821C 0xCB 520*4882a593Smuzhiyun 521*4882a593Smuzhiyun /* RTL8821CU */ 522*4882a593Smuzhiyun #define EEPROM_MAC_ADDR_8821CU 0x107 523*4882a593Smuzhiyun #define EEPROM_VID_8821CU 0x100 524*4882a593Smuzhiyun #define EEPROM_PID_8821CU 0x102 525*4882a593Smuzhiyun #define EEPROM_USB_OPTIONAL_FUNCTION0_8821CU 0x104 526*4882a593Smuzhiyun #define EEPROM_USB_MODE_8821CU 0x06 527*4882a593Smuzhiyun 528*4882a593Smuzhiyun /* RTL8821CS */ 529*4882a593Smuzhiyun #define EEPROM_MAC_ADDR_8821CS 0x11A 530*4882a593Smuzhiyun 531*4882a593Smuzhiyun /* RTL8821CE */ 532*4882a593Smuzhiyun #define EEPROM_MAC_ADDR_8821CE 0xD0 533*4882a593Smuzhiyun /* **************************************************** 534*4882a593Smuzhiyun * EEPROM/Efuse PG Offset for 8723D 535*4882a593Smuzhiyun * **************************************************** */ 536*4882a593Smuzhiyun #define GET_PG_KFREE_ON_8723D(_pg_m) \ 537*4882a593Smuzhiyun LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC1, 4, 1) 538*4882a593Smuzhiyun #define GET_PG_KFREE_THERMAL_K_ON_8723D(_pg_m) \ 539*4882a593Smuzhiyun LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 5, 1) 540*4882a593Smuzhiyun 541*4882a593Smuzhiyun #define PPG_8723D_S1 0 542*4882a593Smuzhiyun #define PPG_8723D_S0 1 543*4882a593Smuzhiyun 544*4882a593Smuzhiyun #define PPG_BB_GAIN_2G_TXA_OFFSET_8723D 0xEE 545*4882a593Smuzhiyun #define PPG_BB_GAIN_2G_TX_OFFSET_8723D 0x1EE 546*4882a593Smuzhiyun #define PPG_THERMAL_OFFSET_8723D 0xEF 547*4882a593Smuzhiyun 548*4882a593Smuzhiyun #define EEPROM_ChannelPlan_8723D 0xB8 549*4882a593Smuzhiyun #define EEPROM_XTAL_8723D 0xB9 550*4882a593Smuzhiyun #define EEPROM_THERMAL_METER_8723D 0xBA 551*4882a593Smuzhiyun #define EEPROM_IQK_LCK_8723D 0xBB 552*4882a593Smuzhiyun #define EEPROM_2G_5G_PA_TYPE_8723D 0xBC 553*4882a593Smuzhiyun #define EEPROM_2G_LNA_TYPE_GAIN_SEL_8723D 0xBD 554*4882a593Smuzhiyun #define EEPROM_5G_LNA_TYPE_GAIN_SEL_8723D 0xBF 555*4882a593Smuzhiyun 556*4882a593Smuzhiyun #define EEPROM_RF_BOARD_OPTION_8723D 0xC1 557*4882a593Smuzhiyun #define EEPROM_FEATURE_OPTION_8723D 0xC2 558*4882a593Smuzhiyun #define EEPROM_RF_BT_SETTING_8723D 0xC3 559*4882a593Smuzhiyun #define EEPROM_VERSION_8723D 0xC4 560*4882a593Smuzhiyun #define EEPROM_CustomID_8723D 0xC5 561*4882a593Smuzhiyun #define EEPROM_TX_BBSWING_2G_8723D 0xC6 562*4882a593Smuzhiyun #define EEPROM_TX_PWR_CALIBRATE_RATE_8723D 0xC8 563*4882a593Smuzhiyun #define EEPROM_RF_ANTENNA_OPT_8723D 0xC9 564*4882a593Smuzhiyun #define EEPROM_RFE_OPTION_8723D 0xCA 565*4882a593Smuzhiyun #define EEPROM_COUNTRY_CODE_8723D 0xCB 566*4882a593Smuzhiyun 567*4882a593Smuzhiyun /* RTL8723DE */ 568*4882a593Smuzhiyun #define EEPROM_MAC_ADDR_8723DE 0xD0 569*4882a593Smuzhiyun #define EEPROM_VID_8723DE 0xD6 570*4882a593Smuzhiyun #define EEPROM_DID_8723DE 0xD8 571*4882a593Smuzhiyun #define EEPROM_SVID_8723DE 0xDA 572*4882a593Smuzhiyun #define EEPROM_SMID_8723DE 0xDC 573*4882a593Smuzhiyun 574*4882a593Smuzhiyun /* RTL8723DU */ 575*4882a593Smuzhiyun #define EEPROM_MAC_ADDR_8723DU 0x107 576*4882a593Smuzhiyun #define EEPROM_VID_8723DU 0x100 577*4882a593Smuzhiyun #define EEPROM_PID_8723DU 0x102 578*4882a593Smuzhiyun #define EEPROM_USB_OPTIONAL_FUNCTION0_8723DU 0x104 579*4882a593Smuzhiyun 580*4882a593Smuzhiyun /* RTL8723BS */ 581*4882a593Smuzhiyun #define EEPROM_MAC_ADDR_8723DS 0x11A 582*4882a593Smuzhiyun #define EEPROM_Voltage_ADDR_8723D 0x8 583*4882a593Smuzhiyun 584*4882a593Smuzhiyun /* 585*4882a593Smuzhiyun * ==================================================== 586*4882a593Smuzhiyun * EEPROM/Efuse PG Offset for 8822C 587*4882a593Smuzhiyun * ==================================================== 588*4882a593Smuzhiyun */ 589*4882a593Smuzhiyun #define EEPROM_TX_PWR_INX_8822C 0x10 590*4882a593Smuzhiyun #define EEPROM_ChannelPlan_8822C 0xB8 591*4882a593Smuzhiyun #define EEPROM_XTAL_B9_8822C 0xB9 592*4882a593Smuzhiyun #define EEPROM_IQK_LCK_8822C 0xBB 593*4882a593Smuzhiyun #define EEPROM_2G_5G_PA_TYPE_8822C 0xBC 594*4882a593Smuzhiyun /* PATH A & PATH B */ 595*4882a593Smuzhiyun #define EEPROM_2G_LNA_TYPE_GAIN_SEL_AB_8822C 0xBD 596*4882a593Smuzhiyun /* PATH C & PATH D */ 597*4882a593Smuzhiyun #define EEPROM_2G_LNA_TYPE_GAIN_SEL_CD_8822C 0xBE 598*4882a593Smuzhiyun /* PATH A & PATH B */ 599*4882a593Smuzhiyun #define EEPROM_5G_LNA_TYPE_GAIN_SEL_AB_8822C 0xBF 600*4882a593Smuzhiyun /* PATH C & PATH D */ 601*4882a593Smuzhiyun #define EEPROM_5G_LNA_TYPE_GAIN_SEL_CD_8822C 0xC0 602*4882a593Smuzhiyun 603*4882a593Smuzhiyun #define EEPROM_RF_BOARD_OPTION_8822C 0xC1 604*4882a593Smuzhiyun #define EEPROM_FEATURE_OPTION_8822C 0xC2 605*4882a593Smuzhiyun #define EEPROM_RF_BT_SETTING_8822C 0xC3 606*4882a593Smuzhiyun #define EEPROM_VERSION_8822C 0xC4 607*4882a593Smuzhiyun #define EEPROM_CustomID_8822C 0xC5 608*4882a593Smuzhiyun #define EEPROM_TX_BBSWING_2G_8822C 0xC6 609*4882a593Smuzhiyun #define EEPROM_TX_PWR_CALIBRATE_RATE_8822C 0xC8 610*4882a593Smuzhiyun #define EEPROM_RF_ANTENNA_OPT_8822C 0xC9 611*4882a593Smuzhiyun #define EEPROM_RFE_OPTION_8822C 0xCA 612*4882a593Smuzhiyun #define EEPROM_COUNTRY_CODE_8822C 0xCB 613*4882a593Smuzhiyun #define EEPROM_THERMAL_METER_A_8822C 0xD0 614*4882a593Smuzhiyun #define EEPROM_THERMAL_METER_B_8822C 0xD1 615*4882a593Smuzhiyun 616*4882a593Smuzhiyun #define EEPROM_XTAL_110_8822C 0x110 617*4882a593Smuzhiyun #define EEPROM_XTAL_111_8822C 0x111 618*4882a593Smuzhiyun 619*4882a593Smuzhiyun /* RTL8822CU */ 620*4882a593Smuzhiyun #define EEPROM_MAC_ADDR_8822CU 0x157 621*4882a593Smuzhiyun #define EEPROM_VID_8822CU 0x100 622*4882a593Smuzhiyun #define EEPROM_PID_8822CU 0x102 623*4882a593Smuzhiyun #define EEPROM_USB_OPTIONAL_FUNCTION0_8822CU 0x104 624*4882a593Smuzhiyun #define EEPROM_USB_MODE_8822CU 0x06 625*4882a593Smuzhiyun 626*4882a593Smuzhiyun /* RTL8822CS */ 627*4882a593Smuzhiyun #define EEPROM_MAC_ADDR_8822CS 0x16A 628*4882a593Smuzhiyun 629*4882a593Smuzhiyun /* RTL8822CE */ 630*4882a593Smuzhiyun #define EEPROM_MAC_ADDR_8822CE 0x120 631*4882a593Smuzhiyun 632*4882a593Smuzhiyun /* **************************************************** 633*4882a593Smuzhiyun * EEPROM/Efuse PG Offset for 8192F 634*4882a593Smuzhiyun * **************************************************** */ 635*4882a593Smuzhiyun #define EEPROM_ChannelPlan_8192F 0xB8 636*4882a593Smuzhiyun #define EEPROM_XTAL_8192F 0xB9 637*4882a593Smuzhiyun #define EEPROM_THERMAL_METER_8192F 0xBA 638*4882a593Smuzhiyun #define EEPROM_IQK_LCK_8192F 0xBB 639*4882a593Smuzhiyun #define EEPROM_2G_5G_PA_TYPE_8192F 0xBC 640*4882a593Smuzhiyun #define EEPROM_2G_LNA_TYPE_GAIN_SEL_8192F 0xBD 641*4882a593Smuzhiyun #define EEPROM_5G_LNA_TYPE_GAIN_SEL_8192F 0xBF 642*4882a593Smuzhiyun 643*4882a593Smuzhiyun #define EEPROM_RF_BOARD_OPTION_8192F 0xC1 644*4882a593Smuzhiyun #define EEPROM_FEATURE_OPTION_8192F 0xC2 645*4882a593Smuzhiyun #define EEPROM_RF_BT_SETTING_8192F 0xC3 646*4882a593Smuzhiyun #define EEPROM_VERSION_8192F 0xC4 647*4882a593Smuzhiyun #define EEPROM_CustomID_8192F 0xC5 648*4882a593Smuzhiyun #define EEPROM_TX_BBSWING_2G_8192F 0xC6 649*4882a593Smuzhiyun #define EEPROM_TX_BBSWING_5G_8192F 0xC7 650*4882a593Smuzhiyun #define EEPROM_TX_PWR_CALIBRATE_RATE_8192F 0xC8 651*4882a593Smuzhiyun #define EEPROM_RF_ANTENNA_OPT_8192F 0xC9 652*4882a593Smuzhiyun #define EEPROM_RFE_OPTION_8192F 0xCA 653*4882a593Smuzhiyun #define EEPROM_COUNTRY_CODE_8192F 0xCB 654*4882a593Smuzhiyun /*RTL8192FS*/ 655*4882a593Smuzhiyun #define EEPROM_MAC_ADDR_8192FS 0x11A 656*4882a593Smuzhiyun #define EEPROM_Voltage_ADDR_8192F 0x8 657*4882a593Smuzhiyun /* RTL8192FU */ 658*4882a593Smuzhiyun #define EEPROM_MAC_ADDR_8192FU 0x107 659*4882a593Smuzhiyun #define EEPROM_VID_8192FU 0x100 660*4882a593Smuzhiyun #define EEPROM_PID_8192FU 0x102 661*4882a593Smuzhiyun #define EEPROM_USB_OPTIONAL_FUNCTION0_8192FU 0x104 662*4882a593Smuzhiyun /* RTL8192FE */ 663*4882a593Smuzhiyun #define EEPROM_MAC_ADDR_8192FE 0xD0 664*4882a593Smuzhiyun #define EEPROM_VID_8192FE 0xD6 665*4882a593Smuzhiyun #define EEPROM_DID_8192FE 0xD8 666*4882a593Smuzhiyun #define EEPROM_SVID_8192FE 0xDA 667*4882a593Smuzhiyun #define EEPROM_SMID_8192FE 0xDC 668*4882a593Smuzhiyun 669*4882a593Smuzhiyun /* **************************************************** 670*4882a593Smuzhiyun * EEPROM/Efuse PG Offset for 8710B 671*4882a593Smuzhiyun * **************************************************** */ 672*4882a593Smuzhiyun #define RTL_EEPROM_ID_8710B 0x8195 673*4882a593Smuzhiyun #define EEPROM_Default_ThermalMeter_8710B 0x1A 674*4882a593Smuzhiyun 675*4882a593Smuzhiyun #define EEPROM_CHANNEL_PLAN_8710B 0xC8 676*4882a593Smuzhiyun #define EEPROM_XTAL_8710B 0xC9 677*4882a593Smuzhiyun #define EEPROM_THERMAL_METER_8710B 0xCA 678*4882a593Smuzhiyun #define EEPROM_IQK_LCK_8710B 0xCB 679*4882a593Smuzhiyun #define EEPROM_2G_5G_PA_TYPE_8710B 0xCC 680*4882a593Smuzhiyun #define EEPROM_2G_LNA_TYPE_GAIN_SEL_8710B 0xCD 681*4882a593Smuzhiyun #define EEPROM_5G_LNA_TYPE_GAIN_SEL_8710B 0xCF 682*4882a593Smuzhiyun #define EEPROM_TX_KFREE_8710B 0xEE //Physical Efuse Address 683*4882a593Smuzhiyun #define EEPROM_THERMAL_8710B 0xEF //Physical Efuse Address 684*4882a593Smuzhiyun #define EEPROM_PACKAGE_TYPE_8710B 0xF8 //Physical Efuse Address 685*4882a593Smuzhiyun 686*4882a593Smuzhiyun #define EEPROM_RF_BOARD_OPTION_8710B 0x131 687*4882a593Smuzhiyun #define EEPROM_RF_FEATURE_OPTION_8710B 0x132 688*4882a593Smuzhiyun #define EEPROM_RF_BT_SETTING_8710B 0x133 689*4882a593Smuzhiyun #define EEPROM_VERSION_8710B 0x134 690*4882a593Smuzhiyun #define EEPROM_CUSTOM_ID_8710B 0x135 691*4882a593Smuzhiyun #define EEPROM_TX_BBSWING_2G_8710B 0x136 692*4882a593Smuzhiyun #define EEPROM_TX_BBSWING_5G_8710B 0x137 693*4882a593Smuzhiyun #define EEPROM_TX_PWR_CALIBRATE_RATE_8710B 0x138 694*4882a593Smuzhiyun #define EEPROM_RF_ANTENNA_OPT_8710B 0x139 695*4882a593Smuzhiyun #define EEPROM_RFE_OPTION_8710B 0x13A 696*4882a593Smuzhiyun #define EEPROM_COUNTRY_CODE_8710B 0x13B 697*4882a593Smuzhiyun #define EEPROM_COUNTRY_CODE_2_8710B 0x13C 698*4882a593Smuzhiyun 699*4882a593Smuzhiyun #define EEPROM_MAC_ADDR_8710B 0x11A 700*4882a593Smuzhiyun #define EEPROM_VID_8710BU 0x1C0 701*4882a593Smuzhiyun #define EEPROM_PID_8710BU 0x1C2 702*4882a593Smuzhiyun 703*4882a593Smuzhiyun /* **************************************************** 704*4882a593Smuzhiyun * EEPROM/Efuse PG Offset for 8814B 705*4882a593Smuzhiyun * **************************************************** */ 706*4882a593Smuzhiyun 707*4882a593Smuzhiyun #define EEPROM_USB_MODE_8814BU 0x06 708*4882a593Smuzhiyun /* 0x10 ~ 0x63 = TX power area. */ 709*4882a593Smuzhiyun #define EEPROM_TX_PWR_INX_8814B 0x10 710*4882a593Smuzhiyun #define EEPROM_ChannelPlan_8814B 0xB8 711*4882a593Smuzhiyun #define EEPROM_XTAL_8814B 0xB9 712*4882a593Smuzhiyun #define EEPROM_IQK_LCK_8814B 0xBB 713*4882a593Smuzhiyun 714*4882a593Smuzhiyun #define EEPROM_RF_BOARD_OPTION_8814B 0xC1 715*4882a593Smuzhiyun #define EEPROM_RF_FEATURE_OPTION_8814B 0xC2 716*4882a593Smuzhiyun #define EEPROM_RF_BT_SETTING_8814B 0xC3 717*4882a593Smuzhiyun #define EEPROM_VERSION_8814B 0xC4 718*4882a593Smuzhiyun #define EEPROM_CustomID_8814B 0xC5 719*4882a593Smuzhiyun #define EEPROM_TX_BBSWING_2G_8814B 0xC6 720*4882a593Smuzhiyun #define EEPROM_TX_BBSWING_5G_8814B 0xC7 721*4882a593Smuzhiyun #define EEPROM_TX_PWR_CALIBRATE_RATE_8814B 0xC8 722*4882a593Smuzhiyun #define EEPROM_RF_ANTENNA_OPT_8814B 0xC9 723*4882a593Smuzhiyun #define EEPROM_RFE_OPTION_8814B 0xCA 724*4882a593Smuzhiyun #define EEPROM_COUNTRY_CODE_8814B 0xCB 725*4882a593Smuzhiyun 726*4882a593Smuzhiyun #define EEPROM_THERMAL_METER_A_8814B 0xD0 727*4882a593Smuzhiyun #define EEPROM_THERMAL_METER_B_8814B 0xD1 728*4882a593Smuzhiyun #define EEPROM_THERMAL_METER_C_8814B 0xD2 729*4882a593Smuzhiyun #define EEPROM_THERMAL_METER_D_8814B 0xD3 730*4882a593Smuzhiyun 731*4882a593Smuzhiyun #define EEPROM_MAC_ADDR_8814BE 0x120 732*4882a593Smuzhiyun #define EEPROM_VID_8814B 0x126 733*4882a593Smuzhiyun #define EEPROM_DID_8814B 0x128 734*4882a593Smuzhiyun #define EEPROM_SVID_8814B 0x12A 735*4882a593Smuzhiyun #define EEPROM_SMID_8814B 0x12C 736*4882a593Smuzhiyun 737*4882a593Smuzhiyun /* RTL8814BU */ 738*4882a593Smuzhiyun #define EEPROM_MAC_ADDR_8814BU 0x157 739*4882a593Smuzhiyun #define EEPROM_VID_8814BU 0x150 740*4882a593Smuzhiyun #define EEPROM_PID_8814BU 0x152 741*4882a593Smuzhiyun #define EEPROM_USB_OPTIONAL_FUNCTION0_8814BU 0x154 742*4882a593Smuzhiyun 743*4882a593Smuzhiyun /* 744*4882a593Smuzhiyun * ==================================================== 745*4882a593Smuzhiyun * EEPROM/Efuse PG Offset for 8723F 746*4882a593Smuzhiyun * ==================================================== 747*4882a593Smuzhiyun */ 748*4882a593Smuzhiyun #define EEPROM_TX_PWR_INX_8723F 0x10 749*4882a593Smuzhiyun #define EEPROM_ChannelPlan_8723F 0xB8 750*4882a593Smuzhiyun #define EEPROM_XTAL_B9_8723F 0xB9 751*4882a593Smuzhiyun #define EEPROM_THERMAL_METER_8723F 0xBA 752*4882a593Smuzhiyun #define EEPROM_IQK_LCK_8723F 0xBB 753*4882a593Smuzhiyun #define EEPROM_2G_5G_PA_TYPE_8723F 0xBC 754*4882a593Smuzhiyun /* PATH A & PATH B */ 755*4882a593Smuzhiyun #define EEPROM_2G_LNA_TYPE_GAIN_SEL_AB_8723F 0xBD 756*4882a593Smuzhiyun /* PATH C & PATH D */ 757*4882a593Smuzhiyun #define EEPROM_2G_LNA_TYPE_GAIN_SEL_CD_8723F 0xBE 758*4882a593Smuzhiyun /* PATH A & PATH B */ 759*4882a593Smuzhiyun #define EEPROM_5G_LNA_TYPE_GAIN_SEL_AB_8723F 0xBF 760*4882a593Smuzhiyun /* PATH C & PATH D */ 761*4882a593Smuzhiyun #define EEPROM_5G_LNA_TYPE_GAIN_SEL_CD_8723F 0xC0 762*4882a593Smuzhiyun 763*4882a593Smuzhiyun #define EEPROM_RF_BOARD_OPTION_8723F 0xC1 764*4882a593Smuzhiyun #define EEPROM_FEATURE_OPTION_8723F 0xC2 765*4882a593Smuzhiyun #define EEPROM_RF_BT_SETTING_8723F 0xC3 766*4882a593Smuzhiyun #define EEPROM_VERSION_8723F 0xC4 767*4882a593Smuzhiyun #define EEPROM_CustomID_8723F 0xC5 768*4882a593Smuzhiyun #define EEPROM_TX_BBSWING_2G_8723F 0xC6 769*4882a593Smuzhiyun #define EEPROM_TX_PWR_CALIBRATE_RATE_8723F 0xC8 770*4882a593Smuzhiyun #define EEPROM_RF_ANTENNA_OPT_8723F 0xC9 771*4882a593Smuzhiyun #define EEPROM_RFE_OPTION_8723F 0xCA 772*4882a593Smuzhiyun #define EEPROM_COUNTRY_CODE_8723F 0xCB 773*4882a593Smuzhiyun 774*4882a593Smuzhiyun /* RTL8723FU */ 775*4882a593Smuzhiyun #define EEPROM_MAC_ADDR_8723FU 0x108 776*4882a593Smuzhiyun #define EEPROM_VID_8723FU 0x100 777*4882a593Smuzhiyun #define EEPROM_PID_8723FU 0x102 778*4882a593Smuzhiyun #define EEPROM_USB_OPTIONAL_FUNCTION0_8723FU 0x104 779*4882a593Smuzhiyun #define EEPROM_USB_MODE_8723FU 0x03 780*4882a593Smuzhiyun 781*4882a593Smuzhiyun /* RTL8723FS */ 782*4882a593Smuzhiyun #define EEPROM_MAC_ADDR_8723FS 0x11A 783*4882a593Smuzhiyun 784*4882a593Smuzhiyun /* **************************************************** 785*4882a593Smuzhiyun * EEPROM/Efuse Value Type 786*4882a593Smuzhiyun * **************************************************** */ 787*4882a593Smuzhiyun #define EETYPE_TX_PWR 0x0 788*4882a593Smuzhiyun #define EETYPE_MAX_RFE_8192F 0x31 789*4882a593Smuzhiyun /* **************************************************** 790*4882a593Smuzhiyun * EEPROM/Efuse Default Value 791*4882a593Smuzhiyun * **************************************************** */ 792*4882a593Smuzhiyun #define EEPROM_CID_DEFAULT 0x0 793*4882a593Smuzhiyun #define EEPROM_CID_DEFAULT_EXT 0xFF /* Reserved for Realtek */ 794*4882a593Smuzhiyun #define EEPROM_CID_TOSHIBA 0x4 795*4882a593Smuzhiyun #define EEPROM_CID_CCX 0x10 796*4882a593Smuzhiyun #define EEPROM_CID_QMI 0x0D 797*4882a593Smuzhiyun #define EEPROM_CID_WHQL 0xFE 798*4882a593Smuzhiyun 799*4882a593Smuzhiyun #define EEPROM_CHANNEL_PLAN_FCC 0x0 800*4882a593Smuzhiyun #define EEPROM_CHANNEL_PLAN_IC 0x1 801*4882a593Smuzhiyun #define EEPROM_CHANNEL_PLAN_ETSI 0x2 802*4882a593Smuzhiyun #define EEPROM_CHANNEL_PLAN_SPAIN 0x3 803*4882a593Smuzhiyun #define EEPROM_CHANNEL_PLAN_FRANCE 0x4 804*4882a593Smuzhiyun #define EEPROM_CHANNEL_PLAN_MKK 0x5 805*4882a593Smuzhiyun #define EEPROM_CHANNEL_PLAN_MKK1 0x6 806*4882a593Smuzhiyun #define EEPROM_CHANNEL_PLAN_ISRAEL 0x7 807*4882a593Smuzhiyun #define EEPROM_CHANNEL_PLAN_TELEC 0x8 808*4882a593Smuzhiyun #define EEPROM_CHANNEL_PLAN_GLOBAL_DOMAIN 0x9 809*4882a593Smuzhiyun #define EEPROM_CHANNEL_PLAN_WORLD_WIDE_13 0xA 810*4882a593Smuzhiyun #define EEPROM_CHANNEL_PLAN_NCC_TAIWAN 0xB 811*4882a593Smuzhiyun #define EEPROM_CHANNEL_PLAN_CHIAN 0XC 812*4882a593Smuzhiyun #define EEPROM_CHANNEL_PLAN_SINGAPORE_INDIA_MEXICO 0XD 813*4882a593Smuzhiyun #define EEPROM_CHANNEL_PLAN_KOREA 0xE 814*4882a593Smuzhiyun #define EEPROM_CHANNEL_PLAN_TURKEY 0xF 815*4882a593Smuzhiyun #define EEPROM_CHANNEL_PLAN_JAPAN 0x10 816*4882a593Smuzhiyun #define EEPROM_CHANNEL_PLAN_FCC_NO_DFS 0x11 817*4882a593Smuzhiyun #define EEPROM_CHANNEL_PLAN_JAPAN_NO_DFS 0x12 818*4882a593Smuzhiyun #define EEPROM_CHANNEL_PLAN_WORLD_WIDE_5G 0x13 819*4882a593Smuzhiyun #define EEPROM_CHANNEL_PLAN_TAIWAN_NO_DFS 0x14 820*4882a593Smuzhiyun 821*4882a593Smuzhiyun #define EEPROM_USB_OPTIONAL1 0xE 822*4882a593Smuzhiyun #define EEPROM_CHANNEL_PLAN_BY_HW_MASK 0x80 823*4882a593Smuzhiyun 824*4882a593Smuzhiyun #define RTL_EEPROM_ID 0x8129 825*4882a593Smuzhiyun #define EEPROM_Default_TSSI 0x0 826*4882a593Smuzhiyun #define EEPROM_Default_BoardType 0x02 827*4882a593Smuzhiyun #define EEPROM_Default_ThermalMeter 0x12 828*4882a593Smuzhiyun #define EEPROM_Default_ThermalMeter_92SU 0x7 829*4882a593Smuzhiyun #define EEPROM_Default_ThermalMeter_88E 0x18 830*4882a593Smuzhiyun #define EEPROM_Default_ThermalMeter_8812 0x18 831*4882a593Smuzhiyun #define EEPROM_Default_ThermalMeter_8192E 0x1A 832*4882a593Smuzhiyun #define EEPROM_Default_ThermalMeter_8723B 0x18 833*4882a593Smuzhiyun #define EEPROM_Default_ThermalMeter_8703B 0x18 834*4882a593Smuzhiyun #define EEPROM_Default_ThermalMeter_8723D 0x18 835*4882a593Smuzhiyun #define EEPROM_Default_ThermalMeter_8188F 0x18 836*4882a593Smuzhiyun #define EEPROM_Default_ThermalMeter_8188GTV 0x18 837*4882a593Smuzhiyun #define EEPROM_Default_ThermalMeter_8814A 0x18 838*4882a593Smuzhiyun #define EEPROM_Default_ThermalMeter_8192F 0x1A 839*4882a593Smuzhiyun #define EEPROM_Default_ThermalMeter_8814B 0x20 840*4882a593Smuzhiyun 841*4882a593Smuzhiyun #define EEPROM_Default_CrystalCap 0x0 842*4882a593Smuzhiyun #define EEPROM_Default_CrystalCap_8723A 0x20 843*4882a593Smuzhiyun #define EEPROM_Default_CrystalCap_88E 0x20 844*4882a593Smuzhiyun #define EEPROM_Default_CrystalCap_8812 0x20 845*4882a593Smuzhiyun #define EEPROM_Default_CrystalCap_8814 0x20 846*4882a593Smuzhiyun #define EEPROM_Default_CrystalCap_8192E 0x20 847*4882a593Smuzhiyun #define EEPROM_Default_CrystalCap_8723B 0x20 848*4882a593Smuzhiyun #define EEPROM_Default_CrystalCap_8703B 0x20 849*4882a593Smuzhiyun #define EEPROM_Default_CrystalCap_8723D 0x20 850*4882a593Smuzhiyun #define EEPROM_Default_CrystalCap_8723F 0x3F 851*4882a593Smuzhiyun #define EEPROM_Default_CrystalCap_8188F 0x20 852*4882a593Smuzhiyun #define EEPROM_Default_CrystalCap_8188GTV 0x20 853*4882a593Smuzhiyun #define EEPROM_Default_CrystalCap_8192F 0x20 854*4882a593Smuzhiyun #define EEPROM_Default_CrystalCap_B9_8822C 0x3F 855*4882a593Smuzhiyun #define EEPROM_Default_CrystalCap_110_8822C 0x40 856*4882a593Smuzhiyun #define EEPROM_Default_CrystalCap_111_8822C 0x40 857*4882a593Smuzhiyun #define EEPROM_Default_CrystalCap_8814B 0x40 858*4882a593Smuzhiyun #define EEPROM_Default_CrystalFreq 0x0 859*4882a593Smuzhiyun #define EEPROM_Default_TxPowerLevel_92C 0x22 860*4882a593Smuzhiyun #define EEPROM_Default_TxPowerLevel_2G 0x2C 861*4882a593Smuzhiyun #define EEPROM_Default_TxPowerLevel_5G 0x22 862*4882a593Smuzhiyun #define EEPROM_Default_TxPowerLevel 0x22 863*4882a593Smuzhiyun #define EEPROM_Default_HT40_2SDiff 0x0 864*4882a593Smuzhiyun #define EEPROM_Default_HT20_Diff 2 865*4882a593Smuzhiyun #define EEPROM_Default_LegacyHTTxPowerDiff 0x3 866*4882a593Smuzhiyun #define EEPROM_Default_LegacyHTTxPowerDiff_92C 0x3 867*4882a593Smuzhiyun #define EEPROM_Default_LegacyHTTxPowerDiff_92D 0x4 868*4882a593Smuzhiyun #define EEPROM_Default_HT40_PwrMaxOffset 0 869*4882a593Smuzhiyun #define EEPROM_Default_HT20_PwrMaxOffset 0 870*4882a593Smuzhiyun 871*4882a593Smuzhiyun #define EEPROM_Default_PID 0x1234 872*4882a593Smuzhiyun #define EEPROM_Default_VID 0x5678 873*4882a593Smuzhiyun #define EEPROM_Default_CustomerID 0xAB 874*4882a593Smuzhiyun #define EEPROM_Default_CustomerID_8188E 0x00 875*4882a593Smuzhiyun #define EEPROM_Default_SubCustomerID 0xCD 876*4882a593Smuzhiyun #define EEPROM_Default_Version 0 877*4882a593Smuzhiyun 878*4882a593Smuzhiyun #define EEPROM_Default_externalPA_C9 0x00 879*4882a593Smuzhiyun #define EEPROM_Default_externalPA_CC 0xFF 880*4882a593Smuzhiyun #define EEPROM_Default_internalPA_SP3T_C9 0xAA 881*4882a593Smuzhiyun #define EEPROM_Default_internalPA_SP3T_CC 0xAF 882*4882a593Smuzhiyun #define EEPROM_Default_internalPA_SPDT_C9 0xAA 883*4882a593Smuzhiyun #ifdef CONFIG_PCI_HCI 884*4882a593Smuzhiyun #define EEPROM_Default_internalPA_SPDT_CC 0xA0 885*4882a593Smuzhiyun #else 886*4882a593Smuzhiyun #define EEPROM_Default_internalPA_SPDT_CC 0xFA 887*4882a593Smuzhiyun #endif 888*4882a593Smuzhiyun #define EEPROM_Default_PAType 0 889*4882a593Smuzhiyun #define EEPROM_Default_LNAType 0 890*4882a593Smuzhiyun 891*4882a593Smuzhiyun /* New EFUSE default value */ 892*4882a593Smuzhiyun #define EEPROM_DEFAULT_CHANNEL_PLAN 0x7F 893*4882a593Smuzhiyun #define EEPROM_DEFAULT_BOARD_OPTION 0x00 894*4882a593Smuzhiyun #define EEPROM_DEFAULT_RFE_OPTION_8192E 0xFF 895*4882a593Smuzhiyun #define EEPROM_DEFAULT_RFE_OPTION_8188E 0xFF 896*4882a593Smuzhiyun #define EEPROM_DEFAULT_RFE_OPTION 0x04 897*4882a593Smuzhiyun #define EEPROM_DEFAULT_FEATURE_OPTION 0x00 898*4882a593Smuzhiyun #define EEPROM_DEFAULT_BT_OPTION 0x10 899*4882a593Smuzhiyun 900*4882a593Smuzhiyun 901*4882a593Smuzhiyun #define EEPROM_DEFAULT_TX_CALIBRATE_RATE 0x00 902*4882a593Smuzhiyun 903*4882a593Smuzhiyun /* PCIe related */ 904*4882a593Smuzhiyun #define EEPROM_PCIE_DEV_CAP_01 0xE0 /* Express device capability in PCIe configuration space, i.e., map to offset 0x74 */ 905*4882a593Smuzhiyun #define EEPROM_PCIE_DEV_CAP_02 0xE1 /* Express device capability in PCIe configuration space, i.e., map to offset 0x75 */ 906*4882a593Smuzhiyun 907*4882a593Smuzhiyun 908*4882a593Smuzhiyun /* 909*4882a593Smuzhiyun * For VHT series TX power by rate table. 910*4882a593Smuzhiyun * VHT TX power by rate off setArray = 911*4882a593Smuzhiyun * Band:-2G&5G = 0 / 1 912*4882a593Smuzhiyun * RF: at most 4*4 = ABCD=0/1/2/3 913*4882a593Smuzhiyun * CCK=0 OFDM=1/2 HT-MCS 0-15=3/4/56 VHT=7/8/9/10/11 914*4882a593Smuzhiyun * */ 915*4882a593Smuzhiyun #define TX_PWR_BY_RATE_NUM_BAND 2 916*4882a593Smuzhiyun #define TX_PWR_BY_RATE_NUM_RF 4 917*4882a593Smuzhiyun #define TX_PWR_BY_RATE_NUM_RATE 84 918*4882a593Smuzhiyun 919*4882a593Smuzhiyun #define TXPWR_LMT_MAX_RF 4 920*4882a593Smuzhiyun 921*4882a593Smuzhiyun /* ---------------------------------------------------------------------------- 922*4882a593Smuzhiyun * EEPROM/EFUSE data structure definition. 923*4882a593Smuzhiyun * ---------------------------------------------------------------------------- */ 924*4882a593Smuzhiyun 925*4882a593Smuzhiyun /* For 88E new structure */ 926*4882a593Smuzhiyun 927*4882a593Smuzhiyun /* 928*4882a593Smuzhiyun 2.4G: 929*4882a593Smuzhiyun { 930*4882a593Smuzhiyun {1,2}, 931*4882a593Smuzhiyun {3,4,5}, 932*4882a593Smuzhiyun {6,7,8}, 933*4882a593Smuzhiyun {9,10,11}, 934*4882a593Smuzhiyun {12,13}, 935*4882a593Smuzhiyun {14} 936*4882a593Smuzhiyun } 937*4882a593Smuzhiyun 938*4882a593Smuzhiyun 5G: 939*4882a593Smuzhiyun { 940*4882a593Smuzhiyun {36,38,40}, 941*4882a593Smuzhiyun {44,46,48}, 942*4882a593Smuzhiyun {52,54,56}, 943*4882a593Smuzhiyun {60,62,64}, 944*4882a593Smuzhiyun {100,102,104}, 945*4882a593Smuzhiyun {108,110,112}, 946*4882a593Smuzhiyun {116,118,120}, 947*4882a593Smuzhiyun {124,126,128}, 948*4882a593Smuzhiyun {132,134,136}, 949*4882a593Smuzhiyun {140,142,144}, 950*4882a593Smuzhiyun {149,151,153}, 951*4882a593Smuzhiyun {157,159,161}, 952*4882a593Smuzhiyun {173,175,177}, 953*4882a593Smuzhiyun } 954*4882a593Smuzhiyun */ 955*4882a593Smuzhiyun #define MAX_RF_PATH 4 956*4882a593Smuzhiyun #define RF_PATH_MAX MAX_RF_PATH 957*4882a593Smuzhiyun #define MAX_CHNL_GROUP_24G 6 958*4882a593Smuzhiyun #define MAX_CHNL_GROUP_5G 14 959*4882a593Smuzhiyun 960*4882a593Smuzhiyun /* It must always set to 4, otherwise read efuse table sequence will be wrong. */ 961*4882a593Smuzhiyun #define MAX_TX_COUNT 4 962*4882a593Smuzhiyun 963*4882a593Smuzhiyun typedef enum _BT_Ant_NUM { 964*4882a593Smuzhiyun Ant_x2 = 0, 965*4882a593Smuzhiyun Ant_x1 = 1 966*4882a593Smuzhiyun } BT_Ant_NUM, *PBT_Ant_NUM; 967*4882a593Smuzhiyun 968*4882a593Smuzhiyun typedef enum _BT_CoType { 969*4882a593Smuzhiyun BT_2WIRE = 0, 970*4882a593Smuzhiyun BT_ISSC_3WIRE = 1, 971*4882a593Smuzhiyun BT_ACCEL = 2, 972*4882a593Smuzhiyun BT_CSR_BC4 = 3, 973*4882a593Smuzhiyun BT_CSR_BC8 = 4, 974*4882a593Smuzhiyun BT_RTL8756 = 5, 975*4882a593Smuzhiyun BT_RTL8723A = 6, 976*4882a593Smuzhiyun BT_RTL8821 = 7, 977*4882a593Smuzhiyun BT_RTL8723B = 8, 978*4882a593Smuzhiyun BT_RTL8192E = 9, 979*4882a593Smuzhiyun BT_RTL8814A = 10, 980*4882a593Smuzhiyun BT_RTL8812A = 11, 981*4882a593Smuzhiyun BT_RTL8703B = 12, 982*4882a593Smuzhiyun BT_RTL8822B = 13, 983*4882a593Smuzhiyun BT_RTL8723D = 14, 984*4882a593Smuzhiyun BT_RTL8821C = 15, 985*4882a593Smuzhiyun BT_RTL8192F = 16, 986*4882a593Smuzhiyun BT_RTL8822C = 17, 987*4882a593Smuzhiyun BT_RTL8814B = 18, 988*4882a593Smuzhiyun BT_RTL8723F = 19, 989*4882a593Smuzhiyun } BT_CoType, *PBT_CoType; 990*4882a593Smuzhiyun 991*4882a593Smuzhiyun typedef enum _BT_RadioShared { 992*4882a593Smuzhiyun BT_Radio_Shared = 0, 993*4882a593Smuzhiyun BT_Radio_Individual = 1, 994*4882a593Smuzhiyun } BT_RadioShared, *PBT_RadioShared; 995*4882a593Smuzhiyun 996*4882a593Smuzhiyun 997*4882a593Smuzhiyun #endif 998