1*4882a593Smuzhiyun /****************************************************************************** 2*4882a593Smuzhiyun * 3*4882a593Smuzhiyun * Copyright(c) 2007 - 2019 Realtek Corporation. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify it 6*4882a593Smuzhiyun * under the terms of version 2 of the GNU General Public License as 7*4882a593Smuzhiyun * published by the Free Software Foundation. 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * This program is distributed in the hope that it will be useful, but WITHOUT 10*4882a593Smuzhiyun * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11*4882a593Smuzhiyun * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12*4882a593Smuzhiyun * more details. 13*4882a593Smuzhiyun * 14*4882a593Smuzhiyun *****************************************************************************/ 15*4882a593Smuzhiyun #ifndef __HAL_IC_CFG_H__ 16*4882a593Smuzhiyun #define __HAL_IC_CFG_H__ 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun #define RTL8188E_SUPPORT 0 19*4882a593Smuzhiyun #define RTL8812A_SUPPORT 0 20*4882a593Smuzhiyun #define RTL8821A_SUPPORT 0 21*4882a593Smuzhiyun #define RTL8723B_SUPPORT 0 22*4882a593Smuzhiyun #define RTL8723D_SUPPORT 0 23*4882a593Smuzhiyun #define RTL8723F_SUPPORT 0 24*4882a593Smuzhiyun #define RTL8192E_SUPPORT 0 25*4882a593Smuzhiyun #define RTL8192F_SUPPORT 0 26*4882a593Smuzhiyun #define RTL8814A_SUPPORT 0 27*4882a593Smuzhiyun #define RTL8195A_SUPPORT 0 28*4882a593Smuzhiyun #define RTL8197F_SUPPORT 0 29*4882a593Smuzhiyun #define RTL8703B_SUPPORT 0 30*4882a593Smuzhiyun #define RTL8188F_SUPPORT 0 31*4882a593Smuzhiyun #define RTL8822B_SUPPORT 0 32*4882a593Smuzhiyun #define RTL8821B_SUPPORT 0 33*4882a593Smuzhiyun #define RTL8821C_SUPPORT 0 34*4882a593Smuzhiyun #define RTL8710B_SUPPORT 0 35*4882a593Smuzhiyun #define RTL8814B_SUPPORT 0 36*4882a593Smuzhiyun #define RTL8824B_SUPPORT 0 37*4882a593Smuzhiyun #define RTL8198F_SUPPORT 0 38*4882a593Smuzhiyun #define RTL8195B_SUPPORT 0 39*4882a593Smuzhiyun #define RTL8822C_SUPPORT 0 40*4882a593Smuzhiyun #define RTL8721D_SUPPORT 0 41*4882a593Smuzhiyun #define RTL8812F_SUPPORT 0 42*4882a593Smuzhiyun #define RTL8197G_SUPPORT 0 43*4882a593Smuzhiyun #define RTL8710C_SUPPORT 0 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun /*#if (RTL8188E_SUPPORT==1)*/ 47*4882a593Smuzhiyun #define RATE_ADAPTIVE_SUPPORT 0 48*4882a593Smuzhiyun #define POWER_TRAINING_ACTIVE 0 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun #ifdef CONFIG_MULTIDRV 51*4882a593Smuzhiyun #endif 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun #ifdef CONFIG_RTL8188E 54*4882a593Smuzhiyun #undef RTL8188E_SUPPORT 55*4882a593Smuzhiyun #undef RATE_ADAPTIVE_SUPPORT 56*4882a593Smuzhiyun #undef POWER_TRAINING_ACTIVE 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun #define RTL8188E_SUPPORT 1 59*4882a593Smuzhiyun #define RATE_ADAPTIVE_SUPPORT 1 60*4882a593Smuzhiyun #define POWER_TRAINING_ACTIVE 1 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun #ifndef CONFIG_TXPWR_PG_WITH_PWR_IDX 63*4882a593Smuzhiyun #define CONFIG_TXPWR_PG_WITH_PWR_IDX 64*4882a593Smuzhiyun #endif 65*4882a593Smuzhiyun #endif 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun #ifdef CONFIG_RTL8812A 68*4882a593Smuzhiyun #undef RTL8812A_SUPPORT 69*4882a593Smuzhiyun #define RTL8812A_SUPPORT 1 70*4882a593Smuzhiyun #ifndef CONFIG_FW_C2H_PKT 71*4882a593Smuzhiyun #define CONFIG_FW_C2H_PKT 72*4882a593Smuzhiyun #endif 73*4882a593Smuzhiyun #ifdef CONFIG_BEAMFORMING 74*4882a593Smuzhiyun #define CONFIG_BEAMFORMER_FW_NDPA 75*4882a593Smuzhiyun #define BEAMFORMING_SUPPORT 1 /*for phydm beamforming*/ 76*4882a593Smuzhiyun #define SUPPORT_MU_BF 0 77*4882a593Smuzhiyun #endif /*CONFIG_BEAMFORMING*/ 78*4882a593Smuzhiyun #define CONFIG_RTS_FULL_BW 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun #ifndef CONFIG_TXPWR_PG_WITH_PWR_IDX 81*4882a593Smuzhiyun #define CONFIG_TXPWR_PG_WITH_PWR_IDX 82*4882a593Smuzhiyun #endif 83*4882a593Smuzhiyun #endif 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun #ifdef CONFIG_RTL8821A 86*4882a593Smuzhiyun #undef RTL8821A_SUPPORT 87*4882a593Smuzhiyun #define RTL8821A_SUPPORT 1 88*4882a593Smuzhiyun #ifndef CONFIG_FW_C2H_PKT 89*4882a593Smuzhiyun #define CONFIG_FW_C2H_PKT 90*4882a593Smuzhiyun #endif 91*4882a593Smuzhiyun #ifdef CONFIG_BEAMFORMING 92*4882a593Smuzhiyun #define CONFIG_BEAMFORMER_FW_NDPA 93*4882a593Smuzhiyun #define BEAMFORMING_SUPPORT 1 /*for phydm beamforming*/ 94*4882a593Smuzhiyun #define SUPPORT_MU_BF 0 95*4882a593Smuzhiyun #endif 96*4882a593Smuzhiyun #define CONFIG_RTS_FULL_BW 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun #ifndef CONFIG_TXPWR_PG_WITH_PWR_IDX 99*4882a593Smuzhiyun #define CONFIG_TXPWR_PG_WITH_PWR_IDX 100*4882a593Smuzhiyun #endif 101*4882a593Smuzhiyun #endif 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun #ifdef CONFIG_RTL8192E 104*4882a593Smuzhiyun #undef RTL8192E_SUPPORT 105*4882a593Smuzhiyun #define RTL8192E_SUPPORT 1 106*4882a593Smuzhiyun #ifndef CONFIG_FW_C2H_PKT 107*4882a593Smuzhiyun #define CONFIG_FW_C2H_PKT 108*4882a593Smuzhiyun #endif 109*4882a593Smuzhiyun #define CONFIG_RTS_FULL_BW 110*4882a593Smuzhiyun 111*4882a593Smuzhiyun #ifndef CONFIG_TXPWR_PG_WITH_PWR_IDX 112*4882a593Smuzhiyun #define CONFIG_TXPWR_PG_WITH_PWR_IDX 113*4882a593Smuzhiyun #endif 114*4882a593Smuzhiyun #endif 115*4882a593Smuzhiyun 116*4882a593Smuzhiyun #ifdef CONFIG_RTL8192F 117*4882a593Smuzhiyun #undef RTL8192F_SUPPORT 118*4882a593Smuzhiyun #define RTL8192F_SUPPORT 1 119*4882a593Smuzhiyun #ifndef CONFIG_FW_C2H_PKT 120*4882a593Smuzhiyun #define CONFIG_FW_C2H_PKT 121*4882a593Smuzhiyun #endif 122*4882a593Smuzhiyun #ifndef CONFIG_RTW_MAC_HIDDEN_RPT 123*4882a593Smuzhiyun #define CONFIG_RTW_MAC_HIDDEN_RPT 124*4882a593Smuzhiyun #endif 125*4882a593Smuzhiyun /*#define CONFIG_AMPDU_PRETX_CD*/ 126*4882a593Smuzhiyun /*#define DBG_LA_MODE*/ 127*4882a593Smuzhiyun #ifdef CONFIG_P2P_PS 128*4882a593Smuzhiyun #define CONFIG_P2P_PS_NOA_USE_MACID_SLEEP 129*4882a593Smuzhiyun #endif 130*4882a593Smuzhiyun #define CONFIG_RTS_FULL_BW 131*4882a593Smuzhiyun /* #define CONFIG_NARROWBAND_SUPPORTING */ 132*4882a593Smuzhiyun #ifdef CONFIG_NARROWBAND_SUPPORTING 133*4882a593Smuzhiyun #define CONFIG_NB_VALUE RTW_NB_CONFIG_NONE /*RTW_NB_CONFIG_WIDTH_10 or RTW_NB_CONFIG_WIDTH_5 */ 134*4882a593Smuzhiyun #endif 135*4882a593Smuzhiyun #ifdef CONFIG_WOWLAN 136*4882a593Smuzhiyun #define CONFIG_WOW_PATTERN_IN_TXFIFO 137*4882a593Smuzhiyun #endif 138*4882a593Smuzhiyun 139*4882a593Smuzhiyun #ifndef CONFIG_TXPWR_PG_WITH_PWR_IDX 140*4882a593Smuzhiyun #define CONFIG_TXPWR_PG_WITH_PWR_IDX 141*4882a593Smuzhiyun #endif 142*4882a593Smuzhiyun #define CONFIG_STOP_RESUME_BCN_BY_TXPAUSE /*to fixed no bcn issue*/ 143*4882a593Smuzhiyun #define CONFIG_TSF_SYNC 144*4882a593Smuzhiyun #endif 145*4882a593Smuzhiyun 146*4882a593Smuzhiyun #ifdef CONFIG_RTL8723B 147*4882a593Smuzhiyun #undef RTL8723B_SUPPORT 148*4882a593Smuzhiyun #define RTL8723B_SUPPORT 1 149*4882a593Smuzhiyun #ifndef CONFIG_FW_C2H_PKT 150*4882a593Smuzhiyun #define CONFIG_FW_C2H_PKT 151*4882a593Smuzhiyun #endif 152*4882a593Smuzhiyun #define CONFIG_RTS_FULL_BW 153*4882a593Smuzhiyun 154*4882a593Smuzhiyun #ifndef CONFIG_TXPWR_PG_WITH_PWR_IDX 155*4882a593Smuzhiyun #define CONFIG_TXPWR_PG_WITH_PWR_IDX 156*4882a593Smuzhiyun #endif 157*4882a593Smuzhiyun #endif 158*4882a593Smuzhiyun 159*4882a593Smuzhiyun #ifdef CONFIG_RTL8723D 160*4882a593Smuzhiyun #undef RTL8723D_SUPPORT 161*4882a593Smuzhiyun #define RTL8723D_SUPPORT 1 162*4882a593Smuzhiyun #ifndef CONFIG_FW_C2H_PKT 163*4882a593Smuzhiyun #define CONFIG_FW_C2H_PKT 164*4882a593Smuzhiyun #endif 165*4882a593Smuzhiyun #ifndef CONFIG_RTW_MAC_HIDDEN_RPT 166*4882a593Smuzhiyun #define CONFIG_RTW_MAC_HIDDEN_RPT 167*4882a593Smuzhiyun #endif 168*4882a593Smuzhiyun #ifndef CONFIG_RTW_CUSTOMER_STR 169*4882a593Smuzhiyun #define CONFIG_RTW_CUSTOMER_STR 170*4882a593Smuzhiyun #endif 171*4882a593Smuzhiyun #define CONFIG_RTS_FULL_BW 172*4882a593Smuzhiyun 173*4882a593Smuzhiyun #ifndef CONFIG_TXPWR_PG_WITH_PWR_IDX 174*4882a593Smuzhiyun #define CONFIG_TXPWR_PG_WITH_PWR_IDX 175*4882a593Smuzhiyun #endif 176*4882a593Smuzhiyun #endif 177*4882a593Smuzhiyun 178*4882a593Smuzhiyun #ifdef CONFIG_RTL8814A 179*4882a593Smuzhiyun #undef RTL8814A_SUPPORT 180*4882a593Smuzhiyun #define RTL8814A_SUPPORT 1 181*4882a593Smuzhiyun #ifndef CONFIG_FW_C2H_PKT 182*4882a593Smuzhiyun #define CONFIG_FW_C2H_PKT 183*4882a593Smuzhiyun #endif 184*4882a593Smuzhiyun #define CONFIG_FW_CORRECT_BCN 185*4882a593Smuzhiyun #ifdef CONFIG_BEAMFORMING 186*4882a593Smuzhiyun #define BEAMFORMING_SUPPORT 1 /*for phydm beamforming*/ 187*4882a593Smuzhiyun #define SUPPORT_MU_BF 0 188*4882a593Smuzhiyun #endif 189*4882a593Smuzhiyun #define CONFIG_RTS_FULL_BW 190*4882a593Smuzhiyun 191*4882a593Smuzhiyun #ifndef CONFIG_TXPWR_PG_WITH_PWR_IDX 192*4882a593Smuzhiyun #define CONFIG_TXPWR_PG_WITH_PWR_IDX 193*4882a593Smuzhiyun #endif 194*4882a593Smuzhiyun #endif 195*4882a593Smuzhiyun 196*4882a593Smuzhiyun #ifdef CONFIG_RTL8703B 197*4882a593Smuzhiyun #undef RTL8703B_SUPPORT 198*4882a593Smuzhiyun #define RTL8703B_SUPPORT 1 199*4882a593Smuzhiyun #ifndef CONFIG_FW_C2H_PKT 200*4882a593Smuzhiyun #define CONFIG_FW_C2H_PKT 201*4882a593Smuzhiyun #endif 202*4882a593Smuzhiyun #ifndef CONFIG_RTW_MAC_HIDDEN_RPT 203*4882a593Smuzhiyun #define CONFIG_RTW_MAC_HIDDEN_RPT 204*4882a593Smuzhiyun #endif 205*4882a593Smuzhiyun #define CONFIG_RTS_FULL_BW 206*4882a593Smuzhiyun 207*4882a593Smuzhiyun #ifndef CONFIG_TXPWR_PG_WITH_PWR_IDX 208*4882a593Smuzhiyun #define CONFIG_TXPWR_PG_WITH_PWR_IDX 209*4882a593Smuzhiyun #endif 210*4882a593Smuzhiyun #endif 211*4882a593Smuzhiyun 212*4882a593Smuzhiyun #ifdef CONFIG_RTL8188F 213*4882a593Smuzhiyun #undef RTL8188F_SUPPORT 214*4882a593Smuzhiyun #define RTL8188F_SUPPORT 1 215*4882a593Smuzhiyun #ifndef CONFIG_FW_C2H_PKT 216*4882a593Smuzhiyun #define CONFIG_FW_C2H_PKT 217*4882a593Smuzhiyun #endif 218*4882a593Smuzhiyun #ifndef CONFIG_RTW_MAC_HIDDEN_RPT 219*4882a593Smuzhiyun #define CONFIG_RTW_MAC_HIDDEN_RPT 220*4882a593Smuzhiyun #endif 221*4882a593Smuzhiyun #ifndef CONFIG_RTW_CUSTOMER_STR 222*4882a593Smuzhiyun #define CONFIG_RTW_CUSTOMER_STR 223*4882a593Smuzhiyun #endif 224*4882a593Smuzhiyun #define CONFIG_RTS_FULL_BW 225*4882a593Smuzhiyun 226*4882a593Smuzhiyun #ifndef CONFIG_TXPWR_PG_WITH_PWR_IDX 227*4882a593Smuzhiyun #define CONFIG_TXPWR_PG_WITH_PWR_IDX 228*4882a593Smuzhiyun #endif 229*4882a593Smuzhiyun #endif 230*4882a593Smuzhiyun 231*4882a593Smuzhiyun #ifdef CONFIG_RTL8188GTV 232*4882a593Smuzhiyun #undef RTL8188F_SUPPORT 233*4882a593Smuzhiyun #define RTL8188F_SUPPORT 1 234*4882a593Smuzhiyun #ifndef CONFIG_FW_C2H_PKT 235*4882a593Smuzhiyun #define CONFIG_FW_C2H_PKT 236*4882a593Smuzhiyun #endif 237*4882a593Smuzhiyun #ifndef CONFIG_RTW_MAC_HIDDEN_RPT 238*4882a593Smuzhiyun #define CONFIG_RTW_MAC_HIDDEN_RPT 239*4882a593Smuzhiyun #endif 240*4882a593Smuzhiyun #ifndef CONFIG_RTW_CUSTOMER_STR 241*4882a593Smuzhiyun #define CONFIG_RTW_CUSTOMER_STR 242*4882a593Smuzhiyun #endif 243*4882a593Smuzhiyun #define CONFIG_RTS_FULL_BW 244*4882a593Smuzhiyun 245*4882a593Smuzhiyun #ifndef CONFIG_TXPWR_PG_WITH_PWR_IDX 246*4882a593Smuzhiyun #define CONFIG_TXPWR_PG_WITH_PWR_IDX 247*4882a593Smuzhiyun #endif 248*4882a593Smuzhiyun 249*4882a593Smuzhiyun #if defined(CONFIG_USB_HCI) && !defined(CONFIG_FW_OFFLOAD_SET_TXPWR_IDX) 250*4882a593Smuzhiyun #define CONFIG_FW_OFFLOAD_SET_TXPWR_IDX 251*4882a593Smuzhiyun #endif 252*4882a593Smuzhiyun #endif 253*4882a593Smuzhiyun 254*4882a593Smuzhiyun #ifdef CONFIG_RTL8822B 255*4882a593Smuzhiyun #undef RTL8822B_SUPPORT 256*4882a593Smuzhiyun #define RTL8822B_SUPPORT 1 257*4882a593Smuzhiyun #ifndef CONFIG_FW_C2H_PKT 258*4882a593Smuzhiyun #define CONFIG_FW_C2H_PKT 259*4882a593Smuzhiyun #endif /* CONFIG_FW_C2H_PKT */ 260*4882a593Smuzhiyun #define RTW_TX_PA_BIAS /* Adjust TX PA Bias from eFuse */ 261*4882a593Smuzhiyun #define RTW_AMPDU_AGG_RETRY_AND_NEW 262*4882a593Smuzhiyun 263*4882a593Smuzhiyun #ifdef CONFIG_WOWLAN 264*4882a593Smuzhiyun #define CONFIG_GTK_OL 265*4882a593Smuzhiyun /*#define CONFIG_ARP_KEEP_ALIVE*/ 266*4882a593Smuzhiyun 267*4882a593Smuzhiyun #ifdef CONFIG_GPIO_WAKEUP 268*4882a593Smuzhiyun #ifndef WAKEUP_GPIO_IDX 269*4882a593Smuzhiyun #define WAKEUP_GPIO_IDX 6 /* WIFI Chip Side */ 270*4882a593Smuzhiyun #endif /* !WAKEUP_GPIO_IDX */ 271*4882a593Smuzhiyun #endif /* CONFIG_GPIO_WAKEUP */ 272*4882a593Smuzhiyun #endif /* CONFIG_WOWLAN */ 273*4882a593Smuzhiyun 274*4882a593Smuzhiyun #ifdef CONFIG_CONCURRENT_MODE 275*4882a593Smuzhiyun #define CONFIG_AP_PORT_SWAP 276*4882a593Smuzhiyun #define CONFIG_FW_MULTI_PORT_SUPPORT 277*4882a593Smuzhiyun #endif /* CONFIG_CONCURRENT_MODE */ 278*4882a593Smuzhiyun 279*4882a593Smuzhiyun /* 280*4882a593Smuzhiyun * Beamforming related definition 281*4882a593Smuzhiyun */ 282*4882a593Smuzhiyun /* Only support new beamforming mechanism */ 283*4882a593Smuzhiyun #ifdef CONFIG_BEAMFORMING 284*4882a593Smuzhiyun #define RTW_BEAMFORMING_VERSION_2 285*4882a593Smuzhiyun #endif /* CONFIG_BEAMFORMING */ 286*4882a593Smuzhiyun 287*4882a593Smuzhiyun #ifndef CONFIG_RTW_MAC_HIDDEN_RPT 288*4882a593Smuzhiyun #define CONFIG_RTW_MAC_HIDDEN_RPT 289*4882a593Smuzhiyun #endif /* CONFIG_RTW_MAC_HIDDEN_RPT */ 290*4882a593Smuzhiyun 291*4882a593Smuzhiyun #ifndef DBG_RX_DFRAME_RAW_DATA 292*4882a593Smuzhiyun #define DBG_RX_DFRAME_RAW_DATA 293*4882a593Smuzhiyun #endif /* DBG_RX_DFRAME_RAW_DATA */ 294*4882a593Smuzhiyun 295*4882a593Smuzhiyun #ifndef RTW_IQK_FW_OFFLOAD 296*4882a593Smuzhiyun #define RTW_IQK_FW_OFFLOAD 297*4882a593Smuzhiyun #endif /* RTW_IQK_FW_OFFLOAD */ 298*4882a593Smuzhiyun 299*4882a593Smuzhiyun /* Checksum offload feature */ 300*4882a593Smuzhiyun /*#define CONFIG_TCP_CSUM_OFFLOAD_TX*/ 301*4882a593Smuzhiyun #if defined(CONFIG_TCP_CSUM_OFFLOAD_TX) && !defined(CONFIG_RTW_NETIF_SG) 302*4882a593Smuzhiyun #define CONFIG_RTW_NETIF_SG 303*4882a593Smuzhiyun #endif 304*4882a593Smuzhiyun #define CONFIG_TCP_CSUM_OFFLOAD_RX 305*4882a593Smuzhiyun 306*4882a593Smuzhiyun #define CONFIG_ADVANCE_OTA 307*4882a593Smuzhiyun 308*4882a593Smuzhiyun #ifdef CONFIG_MCC_MODE 309*4882a593Smuzhiyun #define CONFIG_MCC_MODE_V2 310*4882a593Smuzhiyun #define CONFIG_MCC_PHYDM_OFFLOAD 311*4882a593Smuzhiyun #endif /* CONFIG_MCC_MODE */ 312*4882a593Smuzhiyun 313*4882a593Smuzhiyun #if defined(CONFIG_TDLS) && defined(CONFIG_TDLS_CH_SW) 314*4882a593Smuzhiyun #define CONFIG_TDLS_CH_SW_V2 315*4882a593Smuzhiyun #endif 316*4882a593Smuzhiyun 317*4882a593Smuzhiyun #ifndef RTW_CHANNEL_SWITCH_OFFLOAD 318*4882a593Smuzhiyun #ifdef CONFIG_TDLS_CH_SW_V2 319*4882a593Smuzhiyun #define RTW_CHANNEL_SWITCH_OFFLOAD 320*4882a593Smuzhiyun #endif 321*4882a593Smuzhiyun #endif /* RTW_CHANNEL_SWITCH_OFFLOAD */ 322*4882a593Smuzhiyun 323*4882a593Smuzhiyun #if defined(CONFIG_RTW_MESH) && !defined(RTW_PER_CMD_SUPPORT_FW) 324*4882a593Smuzhiyun /* Supported since fw v22.1 */ 325*4882a593Smuzhiyun #define RTW_PER_CMD_SUPPORT_FW 326*4882a593Smuzhiyun #endif /* RTW_PER_CMD_SUPPORT_FW */ 327*4882a593Smuzhiyun #define CONFIG_SUPPORT_FIFO_DUMP 328*4882a593Smuzhiyun #define CONFIG_HW_P0_TSF_SYNC 329*4882a593Smuzhiyun #define CONFIG_BCN_RECV_TIME 330*4882a593Smuzhiyun #ifdef CONFIG_P2P_PS 331*4882a593Smuzhiyun #define CONFIG_P2P_PS_NOA_USE_MACID_SLEEP 332*4882a593Smuzhiyun #endif 333*4882a593Smuzhiyun #define CONFIG_RTS_FULL_BW 334*4882a593Smuzhiyun 335*4882a593Smuzhiyun #ifdef CONFIG_LPS 336*4882a593Smuzhiyun #define CONFIG_LPS_ACK /* Supported after FW v30 & v27.9 */ 337*4882a593Smuzhiyun #endif 338*4882a593Smuzhiyun 339*4882a593Smuzhiyun #ifndef CONFIG_TXPWR_PG_WITH_PWR_IDX 340*4882a593Smuzhiyun #define CONFIG_TXPWR_PG_WITH_PWR_IDX 341*4882a593Smuzhiyun #endif 342*4882a593Smuzhiyun #endif /* CONFIG_RTL8822B */ 343*4882a593Smuzhiyun 344*4882a593Smuzhiyun #ifdef CONFIG_RTL8822C 345*4882a593Smuzhiyun #undef RTL8822C_SUPPORT 346*4882a593Smuzhiyun #define RTL8822C_SUPPORT 1 347*4882a593Smuzhiyun /*#define DBG_LA_MODE*/ 348*4882a593Smuzhiyun #ifndef CONFIG_FW_C2H_PKT 349*4882a593Smuzhiyun #define CONFIG_FW_C2H_PKT 350*4882a593Smuzhiyun #endif /* CONFIG_FW_C2H_PKT */ 351*4882a593Smuzhiyun #define RTW_TX_PA_BIAS /* Adjust TX PA Bias from eFuse */ 352*4882a593Smuzhiyun 353*4882a593Smuzhiyun #ifdef CONFIG_WOWLAN 354*4882a593Smuzhiyun #define CONFIG_GTK_OL 355*4882a593Smuzhiyun /*#define CONFIG_ARP_KEEP_ALIVE*/ 356*4882a593Smuzhiyun 357*4882a593Smuzhiyun #ifdef CONFIG_GPIO_WAKEUP 358*4882a593Smuzhiyun #ifndef WAKEUP_GPIO_IDX 359*4882a593Smuzhiyun #define WAKEUP_GPIO_IDX 6 /* WIFI Chip Side */ 360*4882a593Smuzhiyun #endif /* !WAKEUP_GPIO_IDX */ 361*4882a593Smuzhiyun #endif /* CONFIG_GPIO_WAKEUP */ 362*4882a593Smuzhiyun #endif /* CONFIG_WOWLAN */ 363*4882a593Smuzhiyun 364*4882a593Smuzhiyun #ifdef CONFIG_CONCURRENT_MODE 365*4882a593Smuzhiyun #define CONFIG_AP_PORT_SWAP 366*4882a593Smuzhiyun #define CONFIG_FW_MULTI_PORT_SUPPORT 367*4882a593Smuzhiyun #endif /* CONFIG_CONCURRENT_MODE */ 368*4882a593Smuzhiyun 369*4882a593Smuzhiyun /* 370*4882a593Smuzhiyun * Beamforming related definition 371*4882a593Smuzhiyun */ 372*4882a593Smuzhiyun /* Only support new beamforming mechanism */ 373*4882a593Smuzhiyun #ifdef CONFIG_BEAMFORMING 374*4882a593Smuzhiyun #define RTW_BEAMFORMING_VERSION_2 375*4882a593Smuzhiyun #endif /* CONFIG_BEAMFORMING */ 376*4882a593Smuzhiyun 377*4882a593Smuzhiyun #ifdef CONFIG_NO_FW 378*4882a593Smuzhiyun #ifdef CONFIG_RTW_MAC_HIDDEN_RPT 379*4882a593Smuzhiyun #undef CONFIG_RTW_MAC_HIDDEN_RPT 380*4882a593Smuzhiyun #endif 381*4882a593Smuzhiyun #else 382*4882a593Smuzhiyun #ifndef CONFIG_RTW_MAC_HIDDEN_RPT 383*4882a593Smuzhiyun #define CONFIG_RTW_MAC_HIDDEN_RPT 384*4882a593Smuzhiyun #endif 385*4882a593Smuzhiyun #endif 386*4882a593Smuzhiyun 387*4882a593Smuzhiyun #ifndef DBG_RX_DFRAME_RAW_DATA 388*4882a593Smuzhiyun #define DBG_RX_DFRAME_RAW_DATA 389*4882a593Smuzhiyun #endif /* DBG_RX_DFRAME_RAW_DATA */ 390*4882a593Smuzhiyun 391*4882a593Smuzhiyun #ifndef RTW_IQK_FW_OFFLOAD 392*4882a593Smuzhiyun /* #define RTW_IQK_FW_OFFLOAD */ 393*4882a593Smuzhiyun #endif /* RTW_IQK_FW_OFFLOAD */ 394*4882a593Smuzhiyun #define CONFIG_ADVANCE_OTA 395*4882a593Smuzhiyun 396*4882a593Smuzhiyun #ifdef CONFIG_MCC_MODE 397*4882a593Smuzhiyun #define CONFIG_MCC_MODE_V2 398*4882a593Smuzhiyun #define CONFIG_MCC_PHYDM_OFFLOAD 399*4882a593Smuzhiyun #endif /* CONFIG_MCC_MODE */ 400*4882a593Smuzhiyun 401*4882a593Smuzhiyun #if defined(CONFIG_TDLS) && defined(CONFIG_TDLS_CH_SW) 402*4882a593Smuzhiyun #define CONFIG_TDLS_CH_SW_V2 403*4882a593Smuzhiyun #endif 404*4882a593Smuzhiyun 405*4882a593Smuzhiyun #ifndef RTW_CHANNEL_SWITCH_OFFLOAD 406*4882a593Smuzhiyun #ifdef CONFIG_TDLS_CH_SW_V2 407*4882a593Smuzhiyun #define RTW_CHANNEL_SWITCH_OFFLOAD 408*4882a593Smuzhiyun #endif 409*4882a593Smuzhiyun #endif /* RTW_CHANNEL_SWITCH_OFFLOAD */ 410*4882a593Smuzhiyun 411*4882a593Smuzhiyun #if defined(CONFIG_RTW_MESH) && !defined(RTW_PER_CMD_SUPPORT_FW) 412*4882a593Smuzhiyun /* Supported since fw v22.1 */ 413*4882a593Smuzhiyun #define RTW_PER_CMD_SUPPORT_FW 414*4882a593Smuzhiyun #endif /* RTW_PER_CMD_SUPPORT_FW */ 415*4882a593Smuzhiyun #define CONFIG_SUPPORT_FIFO_DUMP 416*4882a593Smuzhiyun #define CONFIG_HW_P0_TSF_SYNC 417*4882a593Smuzhiyun #define CONFIG_BCN_RECV_TIME 418*4882a593Smuzhiyun 419*4882a593Smuzhiyun /*#define CONFIG_TCP_CSUM_OFFLOAD_TX*/ 420*4882a593Smuzhiyun #if defined(CONFIG_TCP_CSUM_OFFLOAD_TX) && !defined(CONFIG_RTW_NETIF_SG) 421*4882a593Smuzhiyun #define CONFIG_RTW_NETIF_SG 422*4882a593Smuzhiyun #endif 423*4882a593Smuzhiyun #define CONFIG_TCP_CSUM_OFFLOAD_RX 424*4882a593Smuzhiyun 425*4882a593Smuzhiyun #ifdef CONFIG_P2P_PS 426*4882a593Smuzhiyun #define CONFIG_P2P_PS_NOA_USE_MACID_SLEEP 427*4882a593Smuzhiyun #endif 428*4882a593Smuzhiyun #define CONFIG_RTS_FULL_BW 429*4882a593Smuzhiyun 430*4882a593Smuzhiyun #ifdef CONFIG_LPS 431*4882a593Smuzhiyun #define CONFIG_LPS_ACK /* Supported after FW v07 */ 432*4882a593Smuzhiyun #define CONFIG_LPS_1T1R /* Supported after FW v07 */ 433*4882a593Smuzhiyun #endif 434*4882a593Smuzhiyun 435*4882a593Smuzhiyun #define CONFIG_BT_EFUSE_MASK 436*4882a593Smuzhiyun 437*4882a593Smuzhiyun #ifndef CONFIG_TXPWR_PG_WITH_PWR_IDX 438*4882a593Smuzhiyun #define CONFIG_TXPWR_PG_WITH_PWR_IDX 439*4882a593Smuzhiyun #endif 440*4882a593Smuzhiyun #ifndef CONFIG_TXPWR_PG_WITH_TSSI_OFFSET 441*4882a593Smuzhiyun #define CONFIG_TXPWR_PG_WITH_TSSI_OFFSET 442*4882a593Smuzhiyun #endif 443*4882a593Smuzhiyun 444*4882a593Smuzhiyun #define CONFIG_RTL8822C_XCAP_NEW_POLICY 445*4882a593Smuzhiyun 446*4882a593Smuzhiyun #define CONFIG_SUPPORT_DYNAMIC_TXPWR 447*4882a593Smuzhiyun #endif /* CONFIG_RTL8822C */ 448*4882a593Smuzhiyun 449*4882a593Smuzhiyun #ifdef CONFIG_RTL8821C 450*4882a593Smuzhiyun #undef RTL8821C_SUPPORT 451*4882a593Smuzhiyun #define RTL8821C_SUPPORT 1 452*4882a593Smuzhiyun #ifndef CONFIG_FW_C2H_PKT 453*4882a593Smuzhiyun #define CONFIG_FW_C2H_PKT 454*4882a593Smuzhiyun #endif 455*4882a593Smuzhiyun #ifdef CONFIG_NO_FW 456*4882a593Smuzhiyun #ifdef CONFIG_RTW_MAC_HIDDEN_RPT 457*4882a593Smuzhiyun #undef CONFIG_RTW_MAC_HIDDEN_RPT 458*4882a593Smuzhiyun #endif 459*4882a593Smuzhiyun #else 460*4882a593Smuzhiyun #ifndef CONFIG_RTW_MAC_HIDDEN_RPT 461*4882a593Smuzhiyun #define CONFIG_RTW_MAC_HIDDEN_RPT 462*4882a593Smuzhiyun #endif 463*4882a593Smuzhiyun #endif 464*4882a593Smuzhiyun #define LOAD_FW_HEADER_FROM_DRIVER 465*4882a593Smuzhiyun #define CONFIG_PHY_CAPABILITY_QUERY 466*4882a593Smuzhiyun #ifdef CONFIG_CONCURRENT_MODE 467*4882a593Smuzhiyun #define CONFIG_AP_PORT_SWAP 468*4882a593Smuzhiyun #define CONFIG_FW_MULTI_PORT_SUPPORT 469*4882a593Smuzhiyun #endif 470*4882a593Smuzhiyun #define CONFIG_SUPPORT_FIFO_DUMP 471*4882a593Smuzhiyun #ifndef RTW_IQK_FW_OFFLOAD 472*4882a593Smuzhiyun #define RTW_IQK_FW_OFFLOAD 473*4882a593Smuzhiyun #endif /* RTW_IQK_FW_OFFLOAD */ 474*4882a593Smuzhiyun /*#define CONFIG_AMPDU_PRETX_CD*/ 475*4882a593Smuzhiyun /*#define DBG_PRE_TX_HANG*/ 476*4882a593Smuzhiyun 477*4882a593Smuzhiyun /* Beamforming related definition */ 478*4882a593Smuzhiyun /* Only support new beamforming mechanism */ 479*4882a593Smuzhiyun #ifdef CONFIG_BEAMFORMING 480*4882a593Smuzhiyun #define RTW_BEAMFORMING_VERSION_2 481*4882a593Smuzhiyun #endif /* CONFIG_BEAMFORMING */ 482*4882a593Smuzhiyun #define CONFIG_HW_P0_TSF_SYNC 483*4882a593Smuzhiyun #define CONFIG_BCN_RECV_TIME 484*4882a593Smuzhiyun #ifdef CONFIG_P2P_PS 485*4882a593Smuzhiyun #define CONFIG_P2P_PS_NOA_USE_MACID_SLEEP 486*4882a593Smuzhiyun #endif 487*4882a593Smuzhiyun #define CONFIG_RTS_FULL_BW 488*4882a593Smuzhiyun 489*4882a593Smuzhiyun #ifdef CONFIG_LPS 490*4882a593Smuzhiyun /* #define CONFIG_LPS_ACK */ /* Supported after FW v25 */ 491*4882a593Smuzhiyun #endif 492*4882a593Smuzhiyun 493*4882a593Smuzhiyun #ifndef CONFIG_TXPWR_PG_WITH_PWR_IDX 494*4882a593Smuzhiyun #define CONFIG_TXPWR_PG_WITH_PWR_IDX 495*4882a593Smuzhiyun #endif 496*4882a593Smuzhiyun 497*4882a593Smuzhiyun #define CONFIG_BT_EFUSE_MASK 498*4882a593Smuzhiyun #endif /*CONFIG_RTL8821C*/ 499*4882a593Smuzhiyun 500*4882a593Smuzhiyun #ifdef CONFIG_RTL8710B 501*4882a593Smuzhiyun #undef RTL8710B_SUPPORT 502*4882a593Smuzhiyun #define RTL8710B_SUPPORT 1 503*4882a593Smuzhiyun #ifndef CONFIG_FW_C2H_PKT 504*4882a593Smuzhiyun #define CONFIG_FW_C2H_PKT 505*4882a593Smuzhiyun #endif 506*4882a593Smuzhiyun #define CONFIG_RTS_FULL_BW 507*4882a593Smuzhiyun 508*4882a593Smuzhiyun #ifndef CONFIG_TXPWR_PG_WITH_PWR_IDX 509*4882a593Smuzhiyun #define CONFIG_TXPWR_PG_WITH_PWR_IDX 510*4882a593Smuzhiyun #endif 511*4882a593Smuzhiyun #endif 512*4882a593Smuzhiyun 513*4882a593Smuzhiyun #ifdef CONFIG_RTL8814B 514*4882a593Smuzhiyun #undef RTL8814B_SUPPORT 515*4882a593Smuzhiyun #define RTL8814B_SUPPORT 1 516*4882a593Smuzhiyun #ifndef CONFIG_FW_C2H_PKT 517*4882a593Smuzhiyun #define CONFIG_FW_C2H_PKT 518*4882a593Smuzhiyun #endif /* CONFIG_FW_C2H_PKT */ 519*4882a593Smuzhiyun #define RTW_TX_PA_BIAS /* Adjust TX PA Bias from eFuse */ 520*4882a593Smuzhiyun #define RTW_AMPDU_AGG_RETRY_AND_NEW 521*4882a593Smuzhiyun 522*4882a593Smuzhiyun #ifdef CONFIG_WOWLAN 523*4882a593Smuzhiyun #define CONFIG_GTK_OL 524*4882a593Smuzhiyun /*#define CONFIG_ARP_KEEP_ALIVE*/ 525*4882a593Smuzhiyun 526*4882a593Smuzhiyun #ifdef CONFIG_GPIO_WAKEUP 527*4882a593Smuzhiyun #ifndef WAKEUP_GPIO_IDX 528*4882a593Smuzhiyun #define WAKEUP_GPIO_IDX 6 /* WIFI Chip Side */ 529*4882a593Smuzhiyun #endif /* !WAKEUP_GPIO_IDX */ 530*4882a593Smuzhiyun #endif /* CONFIG_GPIO_WAKEUP */ 531*4882a593Smuzhiyun #endif /* CONFIG_WOWLAN */ 532*4882a593Smuzhiyun 533*4882a593Smuzhiyun #ifdef CONFIG_CONCURRENT_MODE 534*4882a593Smuzhiyun /*#define CONFIG_AP_PORT_SWAP*/ 535*4882a593Smuzhiyun #define CONFIG_FW_MULTI_PORT_SUPPORT 536*4882a593Smuzhiyun #endif /* CONFIG_CONCURRENT_MODE */ 537*4882a593Smuzhiyun 538*4882a593Smuzhiyun /* 539*4882a593Smuzhiyun * Beamforming related definition 540*4882a593Smuzhiyun */ 541*4882a593Smuzhiyun /* Only support new beamforming mechanism */ 542*4882a593Smuzhiyun #ifdef CONFIG_BEAMFORMING 543*4882a593Smuzhiyun #define RTW_BEAMFORMING_VERSION_2 544*4882a593Smuzhiyun #endif /* CONFIG_BEAMFORMING */ 545*4882a593Smuzhiyun 546*4882a593Smuzhiyun #ifndef DBG_RX_DFRAME_RAW_DATA 547*4882a593Smuzhiyun #define DBG_RX_DFRAME_RAW_DATA 548*4882a593Smuzhiyun #endif /* DBG_RX_DFRAME_RAW_DATA */ 549*4882a593Smuzhiyun 550*4882a593Smuzhiyun #ifndef RTW_IQK_FW_OFFLOAD 551*4882a593Smuzhiyun #define RTW_IQK_FW_OFFLOAD 552*4882a593Smuzhiyun #endif /* RTW_IQK_FW_OFFLOAD */ 553*4882a593Smuzhiyun 554*4882a593Smuzhiyun /* Checksum offload feature */ 555*4882a593Smuzhiyun /*#define CONFIG_TCP_CSUM_OFFLOAD_TX*/ /* not ready */ 556*4882a593Smuzhiyun #define CONFIG_TCP_CSUM_OFFLOAD_RX 557*4882a593Smuzhiyun 558*4882a593Smuzhiyun #define CONFIG_ADVANCE_OTA 559*4882a593Smuzhiyun 560*4882a593Smuzhiyun #ifdef CONFIG_MCC_MODE 561*4882a593Smuzhiyun #define CONFIG_MCC_MODE_V2 562*4882a593Smuzhiyun #define CONFIG_MCC_PHYDM_OFFLOAD 563*4882a593Smuzhiyun #endif /* CONFIG_MCC_MODE */ 564*4882a593Smuzhiyun 565*4882a593Smuzhiyun #if defined(CONFIG_TDLS) && defined(CONFIG_TDLS_CH_SW) 566*4882a593Smuzhiyun #define CONFIG_TDLS_CH_SW_V2 567*4882a593Smuzhiyun #endif 568*4882a593Smuzhiyun 569*4882a593Smuzhiyun #ifndef RTW_CHANNEL_SWITCH_OFFLOAD 570*4882a593Smuzhiyun #ifdef CONFIG_TDLS_CH_SW_V2 571*4882a593Smuzhiyun #define RTW_CHANNEL_SWITCH_OFFLOAD 572*4882a593Smuzhiyun #endif 573*4882a593Smuzhiyun #endif /* RTW_CHANNEL_SWITCH_OFFLOAD */ 574*4882a593Smuzhiyun 575*4882a593Smuzhiyun #if defined(CONFIG_RTW_MESH) && !defined(RTW_PER_CMD_SUPPORT_FW) 576*4882a593Smuzhiyun /* Supported since fw v22.1 */ 577*4882a593Smuzhiyun #define RTW_PER_CMD_SUPPORT_FW 578*4882a593Smuzhiyun #endif /* RTW_PER_CMD_SUPPORT_FW */ 579*4882a593Smuzhiyun #define CONFIG_SUPPORT_FIFO_DUMP 580*4882a593Smuzhiyun #define CONFIG_HW_P0_TSF_SYNC 581*4882a593Smuzhiyun #define CONFIG_BCN_RECV_TIME 582*4882a593Smuzhiyun #ifdef CONFIG_P2P_PS 583*4882a593Smuzhiyun #define CONFIG_P2P_PS_NOA_USE_MACID_SLEEP 584*4882a593Smuzhiyun #endif 585*4882a593Smuzhiyun #define CONFIG_RTS_FULL_BW 586*4882a593Smuzhiyun 587*4882a593Smuzhiyun #define CONFIG_PROTSEL_PORT 588*4882a593Smuzhiyun #define CONFIG_PROTSEL_ATIMDTIM 589*4882a593Smuzhiyun #define CONFIG_PROTSEL_MACSLEEP 590*4882a593Smuzhiyun 591*4882a593Smuzhiyun #define CONFIG_HAS_HW_VAR_BCN_CTRL_ADDR 592*4882a593Smuzhiyun #define CONFIG_HAS_HW_VAR_BCN_FUNC 593*4882a593Smuzhiyun #define CONFIG_HAS_HW_VAR_MLME_DISCONNECT 594*4882a593Smuzhiyun #define CONFIG_HAS_HW_VAR_MLME_JOIN 595*4882a593Smuzhiyun #define CONFIG_HAS_HW_VAR_CORRECT_TSF 596*4882a593Smuzhiyun #define CONFIG_HAS_TX_BEACON_PAUSE 597*4882a593Smuzhiyun 598*4882a593Smuzhiyun #define CONFIG_RTW_TX_NPATH_EN /* 8814B is always 4TX */ 599*4882a593Smuzhiyun 600*4882a593Smuzhiyun #ifdef CONFIG_LPS 601*4882a593Smuzhiyun #define CONFIG_LPS_ACK /* Supported after FW v04 */ 602*4882a593Smuzhiyun #endif 603*4882a593Smuzhiyun 604*4882a593Smuzhiyun #ifndef CONFIG_TXPWR_PG_WITH_PWR_IDX 605*4882a593Smuzhiyun #define CONFIG_TXPWR_PG_WITH_PWR_IDX 606*4882a593Smuzhiyun #endif 607*4882a593Smuzhiyun #ifndef CONFIG_TXPWR_PG_WITH_TSSI_OFFSET 608*4882a593Smuzhiyun #define CONFIG_TXPWR_PG_WITH_TSSI_OFFSET 609*4882a593Smuzhiyun #endif 610*4882a593Smuzhiyun #endif /* CONFIG_RTL8814B */ 611*4882a593Smuzhiyun #ifdef CONFIG_RTL8723F 612*4882a593Smuzhiyun #undef RTL8723F_SUPPORT 613*4882a593Smuzhiyun #define RTL8723F_SUPPORT 1 614*4882a593Smuzhiyun 615*4882a593Smuzhiyun /* Use HALMAC architecture, necessary for 8723F */ 616*4882a593Smuzhiyun #define RTW_HALMAC 617*4882a593Smuzhiyun 618*4882a593Smuzhiyun /*#define DBG_LA_MODE*/ 619*4882a593Smuzhiyun 620*4882a593Smuzhiyun #ifndef CONFIG_FW_C2H_PKT 621*4882a593Smuzhiyun #define CONFIG_FW_C2H_PKT 622*4882a593Smuzhiyun #endif /* CONFIG_FW_C2H_PKT */ 623*4882a593Smuzhiyun 624*4882a593Smuzhiyun #define RTW_TX_PA_BIAS /* Adjust TX PA Bias from eFuse */ 625*4882a593Smuzhiyun 626*4882a593Smuzhiyun #ifdef CONFIG_WOWLAN 627*4882a593Smuzhiyun #define CONFIG_WOW_PATTERN_IN_TXFIFO 628*4882a593Smuzhiyun #endif 629*4882a593Smuzhiyun 630*4882a593Smuzhiyun #ifdef CONFIG_WOWLAN 631*4882a593Smuzhiyun #define CONFIG_GTK_OL 632*4882a593Smuzhiyun /*#define CONFIG_ARP_KEEP_ALIVE*/ 633*4882a593Smuzhiyun 634*4882a593Smuzhiyun #ifdef CONFIG_GPIO_WAKEUP 635*4882a593Smuzhiyun #ifndef WAKEUP_GPIO_IDX 636*4882a593Smuzhiyun #define WAKEUP_GPIO_IDX 12 /* WIFI Chip Side */ 637*4882a593Smuzhiyun #endif /* !WAKEUP_GPIO_IDX */ 638*4882a593Smuzhiyun #endif /* CONFIG_GPIO_WAKEUP */ 639*4882a593Smuzhiyun #endif /* CONFIG_WOWLAN */ 640*4882a593Smuzhiyun 641*4882a593Smuzhiyun #ifdef CONFIG_CONCURRENT_MODE 642*4882a593Smuzhiyun #define CONFIG_AP_PORT_SWAP 643*4882a593Smuzhiyun #define CONFIG_FW_MULTI_PORT_SUPPORT 644*4882a593Smuzhiyun #endif /* CONFIG_CONCURRENT_MODE */ 645*4882a593Smuzhiyun 646*4882a593Smuzhiyun #ifdef CONFIG_NO_FW 647*4882a593Smuzhiyun #ifdef CONFIG_RTW_MAC_HIDDEN_RPT 648*4882a593Smuzhiyun #undef CONFIG_RTW_MAC_HIDDEN_RPT 649*4882a593Smuzhiyun #endif 650*4882a593Smuzhiyun #else 651*4882a593Smuzhiyun #ifndef CONFIG_RTW_MAC_HIDDEN_RPT 652*4882a593Smuzhiyun #define CONFIG_RTW_MAC_HIDDEN_RPT 653*4882a593Smuzhiyun #endif 654*4882a593Smuzhiyun #endif 655*4882a593Smuzhiyun 656*4882a593Smuzhiyun #ifndef DBG_RX_DFRAME_RAW_DATA 657*4882a593Smuzhiyun #define DBG_RX_DFRAME_RAW_DATA 658*4882a593Smuzhiyun #endif /* DBG_RX_DFRAME_RAW_DATA */ 659*4882a593Smuzhiyun 660*4882a593Smuzhiyun /*#define RTW_IQK_FW_OFFLOAD*/ 661*4882a593Smuzhiyun #define CONFIG_ADVANCE_OTA 662*4882a593Smuzhiyun 663*4882a593Smuzhiyun #ifdef CONFIG_MCC_MODE 664*4882a593Smuzhiyun #define CONFIG_MCC_MODE_V2 665*4882a593Smuzhiyun #define CONFIG_MCC_PHYDM_OFFLOAD 666*4882a593Smuzhiyun #endif /* CONFIG_MCC_MODE */ 667*4882a593Smuzhiyun 668*4882a593Smuzhiyun #if defined(CONFIG_TDLS) && defined(CONFIG_TDLS_CH_SW) 669*4882a593Smuzhiyun #define CONFIG_TDLS_CH_SW_V2 670*4882a593Smuzhiyun #endif 671*4882a593Smuzhiyun 672*4882a593Smuzhiyun #ifndef RTW_CHANNEL_SWITCH_OFFLOAD 673*4882a593Smuzhiyun #ifdef CONFIG_TDLS_CH_SW_V2 674*4882a593Smuzhiyun #define RTW_CHANNEL_SWITCH_OFFLOAD 675*4882a593Smuzhiyun #endif 676*4882a593Smuzhiyun #endif /* RTW_CHANNEL_SWITCH_OFFLOAD */ 677*4882a593Smuzhiyun 678*4882a593Smuzhiyun #if defined(CONFIG_RTW_MESH) && !defined(RTW_PER_CMD_SUPPORT_FW) 679*4882a593Smuzhiyun /* Supported since fw v22.1 */ 680*4882a593Smuzhiyun #define RTW_PER_CMD_SUPPORT_FW 681*4882a593Smuzhiyun #endif /* RTW_PER_CMD_SUPPORT_FW */ 682*4882a593Smuzhiyun #define CONFIG_SUPPORT_FIFO_DUMP 683*4882a593Smuzhiyun #define CONFIG_HW_P0_TSF_SYNC 684*4882a593Smuzhiyun #define CONFIG_BCN_RECV_TIME 685*4882a593Smuzhiyun 686*4882a593Smuzhiyun /*#define CONFIG_TCP_CSUM_OFFLOAD_TX*/ 687*4882a593Smuzhiyun #if defined(CONFIG_TCP_CSUM_OFFLOAD_TX) && !defined(CONFIG_RTW_NETIF_SG) 688*4882a593Smuzhiyun #define CONFIG_RTW_NETIF_SG 689*4882a593Smuzhiyun #endif 690*4882a593Smuzhiyun #define CONFIG_TCP_CSUM_OFFLOAD_RX 691*4882a593Smuzhiyun 692*4882a593Smuzhiyun #ifdef CONFIG_P2P_PS 693*4882a593Smuzhiyun #define CONFIG_P2P_PS_NOA_USE_MACID_SLEEP 694*4882a593Smuzhiyun #endif 695*4882a593Smuzhiyun 696*4882a593Smuzhiyun #define CONFIG_RTS_FULL_BW 697*4882a593Smuzhiyun 698*4882a593Smuzhiyun #ifdef CONFIG_LPS 699*4882a593Smuzhiyun #define CONFIG_LPS_ACK 700*4882a593Smuzhiyun #endif 701*4882a593Smuzhiyun 702*4882a593Smuzhiyun #ifndef CONFIG_TXPWR_PG_WITH_PWR_IDX 703*4882a593Smuzhiyun #define CONFIG_TXPWR_PG_WITH_PWR_IDX 704*4882a593Smuzhiyun #endif 705*4882a593Smuzhiyun #ifndef CONFIG_TXPWR_PG_WITH_TSSI_OFFSET 706*4882a593Smuzhiyun #define CONFIG_TXPWR_PG_WITH_TSSI_OFFSET 707*4882a593Smuzhiyun #endif 708*4882a593Smuzhiyun 709*4882a593Smuzhiyun #define CONFIG_BT_EFUSE_MASK 710*4882a593Smuzhiyun 711*4882a593Smuzhiyun #define CONFIG_WRITE_BCN_LEN_TO_FW 712*4882a593Smuzhiyun #endif /* CONFIG_RTL8723F */ 713*4882a593Smuzhiyun #endif /*__HAL_IC_CFG_H__*/ 714