1*4882a593Smuzhiyun /****************************************************************************** 2*4882a593Smuzhiyun * 3*4882a593Smuzhiyun * Copyright(c) 2007 - 2017 Realtek Corporation. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify it 6*4882a593Smuzhiyun * under the terms of version 2 of the GNU General Public License as 7*4882a593Smuzhiyun * published by the Free Software Foundation. 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * This program is distributed in the hope that it will be useful, but WITHOUT 10*4882a593Smuzhiyun * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11*4882a593Smuzhiyun * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12*4882a593Smuzhiyun * more details. 13*4882a593Smuzhiyun * 14*4882a593Smuzhiyun *****************************************************************************/ 15*4882a593Smuzhiyun #ifndef __COMMON_H2C_H__ 16*4882a593Smuzhiyun #define __COMMON_H2C_H__ 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun /* --------------------------------------------------------------------------------------------------------- 19*4882a593Smuzhiyun * ---------------------------------- H2C CMD DEFINITION ------------------------------------------------ 20*4882a593Smuzhiyun * --------------------------------------------------------------------------------------------------------- 21*4882a593Smuzhiyun * 88e, 8723b, 8812, 8821, 92e use the same FW code base */ 22*4882a593Smuzhiyun enum h2c_cmd { 23*4882a593Smuzhiyun /* Common Class: 000 */ 24*4882a593Smuzhiyun H2C_RSVD_PAGE = 0x00, 25*4882a593Smuzhiyun H2C_MEDIA_STATUS_RPT = 0x01, 26*4882a593Smuzhiyun H2C_SCAN_ENABLE = 0x02, 27*4882a593Smuzhiyun H2C_KEEP_ALIVE = 0x03, 28*4882a593Smuzhiyun H2C_DISCON_DECISION = 0x04, 29*4882a593Smuzhiyun H2C_PSD_OFFLOAD = 0x05, 30*4882a593Smuzhiyun H2C_CUSTOMER_STR_REQ = 0x06, 31*4882a593Smuzhiyun H2C_TXPWR_IDX_OFFLOAD = 0x07, 32*4882a593Smuzhiyun H2C_AP_OFFLOAD = 0x08, 33*4882a593Smuzhiyun H2C_BCN_RSVDPAGE = 0x09, 34*4882a593Smuzhiyun H2C_PROBERSP_RSVDPAGE = 0x0A, 35*4882a593Smuzhiyun H2C_FCS_RSVDPAGE = 0x10, 36*4882a593Smuzhiyun H2C_FCS_INFO = 0x11, 37*4882a593Smuzhiyun H2C_AP_WOW_GPIO_CTRL = 0x13, 38*4882a593Smuzhiyun #ifdef CONFIG_MCC_MODE 39*4882a593Smuzhiyun H2C_MCC_RQT_TSF = 0x15, 40*4882a593Smuzhiyun H2C_MCC_MACID_BITMAP = 0x16, 41*4882a593Smuzhiyun H2C_MCC_LOCATION = 0x10, 42*4882a593Smuzhiyun H2C_MCC_CTRL_V2 = 0x17, 43*4882a593Smuzhiyun H2C_MCC_CTRL = 0x18, 44*4882a593Smuzhiyun H2C_MCC_TIME_SETTING = 0x19, 45*4882a593Smuzhiyun H2C_MCC_IQK_PARAM = 0x1A, 46*4882a593Smuzhiyun #endif /* CONFIG_MCC_MODE */ 47*4882a593Smuzhiyun H2C_CHNL_SWITCH_OPER_OFFLOAD = 0x1C, 48*4882a593Smuzhiyun H2C_SINGLE_CHANNELSWITCH_V2 = 0x1D, 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun /* PoweSave Class: 001 */ 51*4882a593Smuzhiyun H2C_SET_PWR_MODE = 0x20, 52*4882a593Smuzhiyun H2C_PS_TUNING_PARA = 0x21, 53*4882a593Smuzhiyun H2C_PS_TUNING_PARA2 = 0x22, 54*4882a593Smuzhiyun H2C_P2P_LPS_PARAM = 0x23, 55*4882a593Smuzhiyun H2C_P2P_PS_OFFLOAD = 0x24, 56*4882a593Smuzhiyun H2C_PS_SCAN_ENABLE = 0x25, 57*4882a593Smuzhiyun H2C_SAP_PS_ = 0x26, 58*4882a593Smuzhiyun H2C_INACTIVE_PS_ = 0x27, /* Inactive_PS */ 59*4882a593Smuzhiyun H2C_FWLPS_IN_IPS_ = 0x28, 60*4882a593Smuzhiyun #ifdef CONFIG_LPS_POFF 61*4882a593Smuzhiyun H2C_LPS_POFF_CTRL = 0x29, 62*4882a593Smuzhiyun H2C_LPS_POFF_PARAM = 0x2A, 63*4882a593Smuzhiyun #endif 64*4882a593Smuzhiyun #ifdef CONFIG_LPS_PG 65*4882a593Smuzhiyun H2C_LPS_PG_INFO = 0x2B, 66*4882a593Smuzhiyun #endif 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun #ifdef CONFIG_FW_MULTI_PORT_SUPPORT 69*4882a593Smuzhiyun H2C_DEFAULT_PORT_ID = 0x2C, 70*4882a593Smuzhiyun #endif 71*4882a593Smuzhiyun /* Dynamic Mechanism Class: 010 */ 72*4882a593Smuzhiyun H2C_MACID_CFG = 0x40, 73*4882a593Smuzhiyun H2C_TXBF = 0x41, 74*4882a593Smuzhiyun H2C_RSSI_SETTING = 0x42, 75*4882a593Smuzhiyun H2C_AP_REQ_TXRPT = 0x43, 76*4882a593Smuzhiyun H2C_INIT_RATE_COLLECT = 0x44, 77*4882a593Smuzhiyun H2C_IQ_CALIBRATION = 0x45, 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun H2C_RA_MASK_3SS = 0x46,/* for 8814A */ 80*4882a593Smuzhiyun H2C_RA_PARA_ADJUST = 0x47,/* CONFIG_RA_DBG_CMD */ 81*4882a593Smuzhiyun H2C_DYNAMIC_TX_PATH = 0x48,/* for 8814A */ 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun H2C_FW_TRACE_EN = 0x49, 84*4882a593Smuzhiyun #ifdef RTW_PER_CMD_SUPPORT_FW 85*4882a593Smuzhiyun H2C_REQ_PER_RPT = 0x4e, 86*4882a593Smuzhiyun #endif 87*4882a593Smuzhiyun /* BT Class: 011 */ 88*4882a593Smuzhiyun H2C_B_TYPE_TDMA = 0x60, 89*4882a593Smuzhiyun H2C_BT_INFO = 0x61, 90*4882a593Smuzhiyun H2C_FORCE_BT_TXPWR = 0x62, 91*4882a593Smuzhiyun H2C_BT_IGNORE_WLANACT = 0x63, 92*4882a593Smuzhiyun H2C_DAC_SWING_VALUE = 0x64, 93*4882a593Smuzhiyun H2C_ANT_SEL_RSV = 0x65, 94*4882a593Smuzhiyun H2C_WL_OPMODE = 0x66, 95*4882a593Smuzhiyun H2C_BT_MP_OPER = 0x67, 96*4882a593Smuzhiyun H2C_BT_CONTROL = 0x68, 97*4882a593Smuzhiyun H2C_BT_WIFI_CTRL = 0x69, 98*4882a593Smuzhiyun H2C_BT_FW_PATCH = 0x6A, 99*4882a593Smuzhiyun #if defined(CONFIG_BT_COEXIST) && defined(CONFIG_FW_MULTI_PORT_SUPPORT) 100*4882a593Smuzhiyun H2C_BTC_WL_PORT_ID = 0x71, 101*4882a593Smuzhiyun #endif 102*4882a593Smuzhiyun /* WOWLAN Class: 100 */ 103*4882a593Smuzhiyun H2C_WOWLAN = 0x80, 104*4882a593Smuzhiyun H2C_REMOTE_WAKE_CTRL = 0x81, 105*4882a593Smuzhiyun H2C_AOAC_GLOBAL_INFO = 0x82, 106*4882a593Smuzhiyun H2C_AOAC_RSVD_PAGE = 0x83, 107*4882a593Smuzhiyun H2C_AOAC_RSVD_PAGE2 = 0x84, 108*4882a593Smuzhiyun H2C_D0_SCAN_OFFLOAD_CTRL = 0x85, 109*4882a593Smuzhiyun H2C_D0_SCAN_OFFLOAD_INFO = 0x86, 110*4882a593Smuzhiyun H2C_CHNL_SWITCH_OFFLOAD = 0x87, 111*4882a593Smuzhiyun H2C_AOAC_RSVDPAGE3 = 0x88, 112*4882a593Smuzhiyun H2C_GPIO_CUSTOM = 0x89, 113*4882a593Smuzhiyun H2C_P2P_OFFLOAD_RSVD_PAGE = 0x8A, 114*4882a593Smuzhiyun H2C_P2P_OFFLOAD = 0x8B, 115*4882a593Smuzhiyun H2C_WAR_OFFLOAD = 0x8D, 116*4882a593Smuzhiyun H2C_WAROFLD_RSVDPAGE1 = 0x8E, 117*4882a593Smuzhiyun #ifdef CONFIG_WOW_KEEP_ALIVE_PATTERN 118*4882a593Smuzhiyun H2C_UDP_KEEPALIVE = 0x90, 119*4882a593Smuzhiyun #endif /*CONFIG_WOW_KEEP_ALIVE_PATTERN*/ 120*4882a593Smuzhiyun #ifdef CONFIG_FW_HANDLE_TXBCN 121*4882a593Smuzhiyun H2C_FW_BCN_OFFLOAD = 0xBA, 122*4882a593Smuzhiyun #endif 123*4882a593Smuzhiyun #ifdef CONFIG_SUPPORT_DYNAMIC_TXPWR 124*4882a593Smuzhiyun H2C_FW_CRC5_SEARCH = 0xBB, 125*4882a593Smuzhiyun #endif 126*4882a593Smuzhiyun H2C_RESET_TSF = 0xC0, 127*4882a593Smuzhiyun #ifdef CONFIG_FW_CORRECT_BCN 128*4882a593Smuzhiyun H2C_BCNHWSEQ = 0xC5, 129*4882a593Smuzhiyun #endif 130*4882a593Smuzhiyun H2C_CUSTOMER_STR_W1 = 0xC6, 131*4882a593Smuzhiyun H2C_CUSTOMER_STR_W2 = 0xC7, 132*4882a593Smuzhiyun H2C_CUSTOMER_STR_W3 = 0xC8, 133*4882a593Smuzhiyun H2C_BT_UNKNOWN_DEVICE_WA = 0xD1, 134*4882a593Smuzhiyun #ifdef DBG_FW_DEBUG_MSG_PKT 135*4882a593Smuzhiyun H2C_FW_DBG_MSG_PKT = 0xE1, 136*4882a593Smuzhiyun #endif /*DBG_FW_DEBUG_MSG_PKT*/ 137*4882a593Smuzhiyun H2C_MAXID, 138*4882a593Smuzhiyun }; 139*4882a593Smuzhiyun 140*4882a593Smuzhiyun #define H2C_INACTIVE_PS_LEN 4 141*4882a593Smuzhiyun #define H2C_RSVDPAGE_LOC_LEN 5 142*4882a593Smuzhiyun #ifdef CONFIG_FW_MULTI_PORT_SUPPORT 143*4882a593Smuzhiyun #define H2C_DEFAULT_PORT_ID_LEN 2 144*4882a593Smuzhiyun #define H2C_MEDIA_STATUS_RPT_LEN 4 145*4882a593Smuzhiyun #else 146*4882a593Smuzhiyun #define H2C_MEDIA_STATUS_RPT_LEN 3 147*4882a593Smuzhiyun #endif 148*4882a593Smuzhiyun #define H2C_GPIO_CUSTOM_LEN 3 149*4882a593Smuzhiyun #define H2C_KEEP_ALIVE_CTRL_LEN 2 150*4882a593Smuzhiyun #ifdef CONFIG_WOW_KEEP_ALIVE_PATTERN 151*4882a593Smuzhiyun #define H2C_KEEP_ALIVE_PATTERN_LEN 7 152*4882a593Smuzhiyun #endif /*CONFIG_WOW_KEEP_ALIVE_PATTERN*/ 153*4882a593Smuzhiyun #define H2C_DISCON_DECISION_LEN 3 154*4882a593Smuzhiyun #define H2C_AP_OFFLOAD_LEN 3 155*4882a593Smuzhiyun #define H2C_AP_WOW_GPIO_CTRL_LEN 4 156*4882a593Smuzhiyun #define H2C_AP_PS_LEN 2 157*4882a593Smuzhiyun #define H2C_PWRMODE_LEN 7 158*4882a593Smuzhiyun #define H2C_PSTUNEPARAM_LEN 4 159*4882a593Smuzhiyun #define H2C_MACID_CFG_LEN 7 160*4882a593Smuzhiyun #define H2C_BTMP_OPER_LEN 5 161*4882a593Smuzhiyun #define H2C_WOWLAN_LEN 7 162*4882a593Smuzhiyun #define H2C_REMOTE_WAKE_CTRL_LEN 3 163*4882a593Smuzhiyun #define H2C_AOAC_GLOBAL_INFO_LEN 2 164*4882a593Smuzhiyun #define H2C_AOAC_RSVDPAGE_LOC_LEN 7 165*4882a593Smuzhiyun #define H2C_SCAN_OFFLOAD_CTRL_LEN 4 166*4882a593Smuzhiyun #define H2C_BT_FW_PATCH_LEN 6 167*4882a593Smuzhiyun #define H2C_RSSI_SETTING_LEN 4 168*4882a593Smuzhiyun #define H2C_AP_REQ_TXRPT_LEN 3 169*4882a593Smuzhiyun #define H2C_FORCE_BT_TXPWR_LEN 3 170*4882a593Smuzhiyun #define H2C_BCN_RSVDPAGE_LEN 5 171*4882a593Smuzhiyun #define H2C_PROBERSP_RSVDPAGE_LEN 5 172*4882a593Smuzhiyun #define H2C_P2PRSVDPAGE_LOC_LEN 5 173*4882a593Smuzhiyun #define H2C_P2P_OFFLOAD_LEN 3 174*4882a593Smuzhiyun #ifdef CONFIG_MCC_MODE 175*4882a593Smuzhiyun #define H2C_MCC_CTRL_LEN 7 176*4882a593Smuzhiyun #ifdef CONFIG_MCC_MODE_V2 177*4882a593Smuzhiyun #define H2C_MCC_LOCATION_LEN 7 178*4882a593Smuzhiyun #else 179*4882a593Smuzhiyun #define H2C_MCC_LOCATION_LEN 3 180*4882a593Smuzhiyun #endif 181*4882a593Smuzhiyun #define H2C_MCC_MACID_BITMAP_LEN 6 182*4882a593Smuzhiyun #define H2C_MCC_RQT_TSF_LEN 1 183*4882a593Smuzhiyun #define H2C_MCC_TIME_SETTING_LEN 6 184*4882a593Smuzhiyun #define H2C_MCC_IQK_PARAM_LEN 7 185*4882a593Smuzhiyun #endif /* CONFIG_MCC_MODE */ 186*4882a593Smuzhiyun #ifdef CONFIG_LPS_PG 187*4882a593Smuzhiyun #ifdef CONFIG_RTL8822C 188*4882a593Smuzhiyun #define H2C_LPS_PG_INFO_LEN 4 189*4882a593Smuzhiyun #else 190*4882a593Smuzhiyun #define H2C_LPS_PG_INFO_LEN 2 191*4882a593Smuzhiyun #endif 192*4882a593Smuzhiyun #define H2C_LPSPG_LEN 16 193*4882a593Smuzhiyun #endif 194*4882a593Smuzhiyun #ifdef CONFIG_LPS_POFF 195*4882a593Smuzhiyun #define H2C_LPS_POFF_CTRL_LEN 1 196*4882a593Smuzhiyun #define H2C_LPS_POFF_PARAM_LEN 5 197*4882a593Smuzhiyun #endif 198*4882a593Smuzhiyun 199*4882a593Smuzhiyun #if defined(CONFIG_BT_COEXIST) && defined(CONFIG_FW_MULTI_PORT_SUPPORT) 200*4882a593Smuzhiyun #define H2C_BTC_WL_PORT_ID_LEN 1 201*4882a593Smuzhiyun #endif 202*4882a593Smuzhiyun 203*4882a593Smuzhiyun #ifdef DBG_FW_DEBUG_MSG_PKT 204*4882a593Smuzhiyun #define H2C_FW_DBG_MSG_PKT_LEN 2 205*4882a593Smuzhiyun #endif /*DBG_FW_DEBUG_MSG_PKT*/ 206*4882a593Smuzhiyun 207*4882a593Smuzhiyun #define H2C_SINGLE_CHANNELSWITCH_V2_LEN 3 208*4882a593Smuzhiyun #define H2C_BT_UNKNOWN_DEVICE_WA_LEN 1 209*4882a593Smuzhiyun 210*4882a593Smuzhiyun #ifdef CONFIG_SUPPORT_DYNAMIC_TXPWR 211*4882a593Smuzhiyun #define H2C_FW_CRC5_SEARCH_LEN 7 212*4882a593Smuzhiyun #endif 213*4882a593Smuzhiyun 214*4882a593Smuzhiyun #ifdef CONFIG_WAR_OFFLOAD 215*4882a593Smuzhiyun #define H2C_WAR_OFFLOAD_LEN 3 216*4882a593Smuzhiyun #define H2C_WAROFLD_RSVDPAGE1_LEN 6 217*4882a593Smuzhiyun #endif /* CONFIG_WAR_OFFLOAD */ 218*4882a593Smuzhiyun 219*4882a593Smuzhiyun 220*4882a593Smuzhiyun #define eq_mac_addr(a, b) (((a)[0] == (b)[0] && (a)[1] == (b)[1] && (a)[2] == (b)[2] && (a)[3] == (b)[3] && (a)[4] == (b)[4] && (a)[5] == (b)[5]) ? 1 : 0) 221*4882a593Smuzhiyun #define cp_mac_addr(des, src) ((des)[0] = (src)[0], (des)[1] = (src)[1], (des)[2] = (src)[2], (des)[3] = (src)[3], (des)[4] = (src)[4], (des)[5] = (src)[5]) 222*4882a593Smuzhiyun #define cpIpAddr(des, src) ((des)[0] = (src)[0], (des)[1] = (src)[1], (des)[2] = (src)[2], (des)[3] = (src)[3]) 223*4882a593Smuzhiyun #define cpIpv6Addr(des, src) ((des)[0] = (src)[0], (des)[1] = (src)[1], (des)[2] = (src)[2], (des)[3] = (src)[3], (des)[4] = (src)[4], (des)[5] = (src)[5], (des)[6] = (src)[6], (des)[7] = (src)[7], (des)[8] = (src)[8], (des)[9] = (src)[9], (des)[10] = (src)[10], (des)[11] = (src)[11], (des)[12] = (src)[12], (des)[13] = (src)[13], (des)[14] = (src)[14], (des)[15] = (src)[15]) 224*4882a593Smuzhiyun 225*4882a593Smuzhiyun 226*4882a593Smuzhiyun #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) 227*4882a593Smuzhiyun #define FW_WOWLAN_FUN_EN BIT(0) 228*4882a593Smuzhiyun #define FW_WOWLAN_PATTERN_MATCH BIT(1) 229*4882a593Smuzhiyun #define FW_WOWLAN_MAGIC_PKT BIT(2) 230*4882a593Smuzhiyun #define FW_WOWLAN_UNICAST BIT(3) 231*4882a593Smuzhiyun #define FW_WOWLAN_ALL_PKT_DROP BIT(4) 232*4882a593Smuzhiyun #define FW_WOWLAN_GPIO_ACTIVE BIT(5) 233*4882a593Smuzhiyun #define FW_WOWLAN_REKEY_WAKEUP BIT(6) 234*4882a593Smuzhiyun #define FW_WOWLAN_DEAUTH_WAKEUP BIT(7) 235*4882a593Smuzhiyun 236*4882a593Smuzhiyun #define FW_WOWLAN_GPIO_WAKEUP_EN BIT(0) 237*4882a593Smuzhiyun #define FW_FW_PARSE_MAGIC_PKT BIT(1) 238*4882a593Smuzhiyun 239*4882a593Smuzhiyun #define FW_REMOTE_WAKE_CTRL_EN BIT(0) 240*4882a593Smuzhiyun #define FW_REALWOWLAN_EN BIT(5) 241*4882a593Smuzhiyun 242*4882a593Smuzhiyun #define FW_WOWLAN_KEEP_ALIVE_EN BIT(0) 243*4882a593Smuzhiyun #define FW_ADOPT_USER BIT(1) 244*4882a593Smuzhiyun #define FW_WOWLAN_KEEP_ALIVE_PKT_TYPE BIT(2) 245*4882a593Smuzhiyun 246*4882a593Smuzhiyun #define FW_REMOTE_WAKE_CTRL_EN BIT(0) 247*4882a593Smuzhiyun #define FW_ARP_EN BIT(1) 248*4882a593Smuzhiyun #define FW_REALWOWLAN_EN BIT(5) 249*4882a593Smuzhiyun #define FW_WOW_FW_UNICAST_EN BIT(7) 250*4882a593Smuzhiyun 251*4882a593Smuzhiyun #define FW_IPS_DISABLE_BBRF BIT(0) 252*4882a593Smuzhiyun #define FW_IPS_WRC BIT(1) 253*4882a593Smuzhiyun 254*4882a593Smuzhiyun #endif /* CONFIG_WOWLAN */ 255*4882a593Smuzhiyun 256*4882a593Smuzhiyun /* _RSVDPAGE_LOC_CMD_0x00 */ 257*4882a593Smuzhiyun #define SET_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) 258*4882a593Smuzhiyun #define SET_H2CCMD_RSVDPAGE_LOC_PSPOLL(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) 259*4882a593Smuzhiyun #define SET_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) 260*4882a593Smuzhiyun #define SET_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) 261*4882a593Smuzhiyun #define SET_H2CCMD_RSVDPAGE_LOC_BT_QOS_NULL_DATA(__pH2CCmd, __Value)SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) 262*4882a593Smuzhiyun 263*4882a593Smuzhiyun /* _MEDIA_STATUS_RPT_PARM_CMD_0x01 */ 264*4882a593Smuzhiyun #define SET_H2CCMD_MSRRPT_PARM_OPMODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(((u8 *)(__pH2CCmd)), 0, 1, (__Value)) 265*4882a593Smuzhiyun #define SET_H2CCMD_MSRRPT_PARM_MACID_IND(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(((u8 *)(__pH2CCmd)), 1, 1, (__Value)) 266*4882a593Smuzhiyun #define SET_H2CCMD_MSRRPT_PARM_MIRACAST(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(((u8 *)(__pH2CCmd)), 2, 1, (__Value)) 267*4882a593Smuzhiyun #define SET_H2CCMD_MSRRPT_PARM_MIRACAST_SINK(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(((u8 *)(__pH2CCmd)), 3, 1, (__Value)) 268*4882a593Smuzhiyun #define SET_H2CCMD_MSRRPT_PARM_ROLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(((u8 *)(__pH2CCmd)), 4, 4, (__Value)) 269*4882a593Smuzhiyun #define SET_H2CCMD_MSRRPT_PARM_MACID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(((u8 *)(__pH2CCmd)) + 1, 0, 8, (__Value)) 270*4882a593Smuzhiyun #define SET_H2CCMD_MSRRPT_PARM_MACID_END(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(((u8 *)(__pH2CCmd)) + 2, 0, 8, (__Value)) 271*4882a593Smuzhiyun #define SET_H2CCMD_MSRRPT_PARM_PORT_NUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(((u8 *)(__pH2CCmd)) + 3, 0, 3, (__Value)) 272*4882a593Smuzhiyun 273*4882a593Smuzhiyun #define GET_H2CCMD_MSRRPT_PARM_OPMODE(__pH2CCmd) LE_BITS_TO_1BYTE(((u8 *)(__pH2CCmd)), 0, 1) 274*4882a593Smuzhiyun #define GET_H2CCMD_MSRRPT_PARM_MIRACAST(__pH2CCmd) LE_BITS_TO_1BYTE(((u8 *)(__pH2CCmd)), 2, 1) 275*4882a593Smuzhiyun #define GET_H2CCMD_MSRRPT_PARM_MIRACAST_SINK(__pH2CCmd) LE_BITS_TO_1BYTE(((u8 *)(__pH2CCmd)), 3, 1) 276*4882a593Smuzhiyun #define GET_H2CCMD_MSRRPT_PARM_ROLE(__pH2CCmd) LE_BITS_TO_1BYTE(((u8 *)(__pH2CCmd)), 4, 4) 277*4882a593Smuzhiyun 278*4882a593Smuzhiyun #ifdef CONFIG_WAR_OFFLOAD 279*4882a593Smuzhiyun #define SET_IPHDR_VERSION(__pHeader, __Value) WriteLE1Byte(((u8 *)(__pHeader)) + 0, __Value) 280*4882a593Smuzhiyun #define SET_IPHDR_DSCP(__pHeader, __Value) WriteLE1Byte(((u8 *)(__pHeader)) + 1, __Value) 281*4882a593Smuzhiyun #define SET_IPHDR_TOTAL_LEN(__pHeader, __Value) WriteLE2Byte(((u8 *)(__pHeader)) + 2, __Value) 282*4882a593Smuzhiyun #define SET_IPHDR_IDENTIFIER(__pHeader, __Value) WriteLE2Byte(((u8 *)(__pHeader)) + 4, __Value) 283*4882a593Smuzhiyun #define SET_IPHDR_FLAGS(__pHeader, __Value) WriteLE1Byte(((u8 *)(__pHeader)) + 6, __Value) 284*4882a593Smuzhiyun #define SET_IPHDR_FRAG_OFFSET(__pHeader, __Value) WriteLE1Byte(((u8 *)(__pHeader)) + 7, __Value) 285*4882a593Smuzhiyun #define SET_IPHDR_TTL(__pHeader, __Value) WriteLE1Byte(((u8 *)(__pHeader)) + 8, __Value) 286*4882a593Smuzhiyun #define SET_IPHDR_PROTOCOL(__pHeader, __Value) WriteLE1Byte(((u8 *)(__pHeader)) + 9, __Value) 287*4882a593Smuzhiyun #define SET_IPHDR_HDR_CHECKSUM(__pHeader, __Value) WriteLE2Byte(((u8 *)(__pHeader)) + 10, __Value) 288*4882a593Smuzhiyun #define SET_IPHDR_SRC_IP_ADDR(__pHeader, __Value) cpIpAddr(((u8 *)(__pHeader))+12, (u8 *)(__Value)) 289*4882a593Smuzhiyun #define SET_IPHDR_DST_IP_ADDR(__pHeader, __Value) cpIpAddr(((u8 *)(__pHeader))+16, (u8 *)(__Value)) 290*4882a593Smuzhiyun #define SET_UDP_SRC_PORT(__pHeader, __Value) WriteLE2Byte(((u8 *)(__pHeader)) + 0, __Value) 291*4882a593Smuzhiyun #define SET_UDP_DST_PORT(__pHeader, __Value) WriteLE2Byte(((u8 *)(__pHeader)) + 2, __Value) 292*4882a593Smuzhiyun #define SET_UDP_LEN(__pHeader, __Value) WriteLE2Byte(((u8 *)(__pHeader)) + 4, __Value) 293*4882a593Smuzhiyun #define SET_UDP_CHECKSUM(__pHeader, __Value) WriteLE2Byte(((u8 *)(__pHeader)) + 6, __Value) 294*4882a593Smuzhiyun 295*4882a593Smuzhiyun #define SET_MDNS_HDR_FLAG(__pHeader, __Value) WriteLE1Byte(((u8 *)(__pHeader)) + 2, __Value) 296*4882a593Smuzhiyun 297*4882a593Smuzhiyun #endif /* CONFIG_WAR_OFFLOAD */ 298*4882a593Smuzhiyun 299*4882a593Smuzhiyun #ifdef CONFIG_OFFLOAD_MDNS_V6 300*4882a593Smuzhiyun #define SET_IPHDRV6_VERSION(__pHeader, __Value) SET_BITS_TO_LE_1BYTE(__pHeader, 4, 4, __Value) 301*4882a593Smuzhiyun #define SET_IPHDRV6_TRAFFIC_CLASS(__pHeader, __Value) SET_BITS_TO_LE_2BYTE(__pHeader, 4, 8, __Value) 302*4882a593Smuzhiyun #define SET_IPHDRV6_FLOW_LABEL(__pHeader, __Value) SET_BITS_TO_LE_4BYTE(__pHeader, 12, 20, __Value) 303*4882a593Smuzhiyun #define SET_IPHDRV6_PAYLOAD_LENGTH(__pHeader, __Value) SET_BITS_TO_LE_2BYTE(((u8 *)(__pHeader)) + 4, 0, 16, __Value) 304*4882a593Smuzhiyun #define SET_IPHDRV6_NEXT_HEADER(__pHeader, __Value) SET_BITS_TO_LE_1BYTE((__pHeader) + 6, 0, 8, __Value) 305*4882a593Smuzhiyun #define SET_IPHDRV6_HOP_LIMIT(__pHeader, __Value) SET_BITS_TO_LE_1BYTE((__pHeader) + 7, 0, 8, __Value) 306*4882a593Smuzhiyun #define SET_IPHDRV6_SRC_IP_ADDR(__pHeader, __Value) cpIpv6Addr((u8 *)(__pHeader) + 8, (u8 *)(__Value)) 307*4882a593Smuzhiyun #define SET_IPHDRV6_DST_IP_ADDR(__pHeader, __Value) cpIpv6Addr((u8 *)(__pHeader) + 24, (u8 *)(__Value)) 308*4882a593Smuzhiyun #endif 309*4882a593Smuzhiyun 310*4882a593Smuzhiyun 311*4882a593Smuzhiyun 312*4882a593Smuzhiyun #define H2C_MSR_ROLE_RSVD 0 313*4882a593Smuzhiyun #define H2C_MSR_ROLE_STA 1 314*4882a593Smuzhiyun #define H2C_MSR_ROLE_AP 2 315*4882a593Smuzhiyun #define H2C_MSR_ROLE_GC 3 316*4882a593Smuzhiyun #define H2C_MSR_ROLE_GO 4 317*4882a593Smuzhiyun #define H2C_MSR_ROLE_TDLS 5 318*4882a593Smuzhiyun #define H2C_MSR_ROLE_ADHOC 6 319*4882a593Smuzhiyun #define H2C_MSR_ROLE_MESH 7 320*4882a593Smuzhiyun #define H2C_MSR_ROLE_MAX 8 321*4882a593Smuzhiyun 322*4882a593Smuzhiyun extern const char *const _h2c_msr_role_str[]; 323*4882a593Smuzhiyun #define h2c_msr_role_str(role) (((role) >= H2C_MSR_ROLE_MAX) ? _h2c_msr_role_str[H2C_MSR_ROLE_MAX] : _h2c_msr_role_str[(role)]) 324*4882a593Smuzhiyun 325*4882a593Smuzhiyun #define H2C_MSR_FMT "%s %s%s" 326*4882a593Smuzhiyun #define H2C_MSR_ARG(h2c_msr) \ 327*4882a593Smuzhiyun GET_H2CCMD_MSRRPT_PARM_OPMODE((h2c_msr)) ? " C" : "", \ 328*4882a593Smuzhiyun h2c_msr_role_str(GET_H2CCMD_MSRRPT_PARM_ROLE((h2c_msr))), \ 329*4882a593Smuzhiyun GET_H2CCMD_MSRRPT_PARM_MIRACAST((h2c_msr)) ? (GET_H2CCMD_MSRRPT_PARM_MIRACAST_SINK((h2c_msr)) ? " MSINK" : " MSRC") : "" 330*4882a593Smuzhiyun 331*4882a593Smuzhiyun s32 rtw_hal_set_FwMediaStatusRpt_cmd(_adapter *adapter, bool opmode, bool miracast, bool miracast_sink, u8 role, u8 macid, bool macid_ind, u8 macid_end); 332*4882a593Smuzhiyun s32 rtw_hal_set_FwMediaStatusRpt_single_cmd(_adapter *adapter, bool opmode, bool miracast, bool miracast_sink, u8 role, u8 macid); 333*4882a593Smuzhiyun s32 rtw_hal_set_FwMediaStatusRpt_range_cmd(_adapter *adapter, bool opmode, bool miracast, bool miracast_sink, u8 role, u8 macid, u8 macid_end); 334*4882a593Smuzhiyun 335*4882a593Smuzhiyun /* _KEEP_ALIVE_CMD_0x03 */ 336*4882a593Smuzhiyun #define SET_H2CCMD_KEEPALIVE_PARM_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) 337*4882a593Smuzhiyun #define SET_H2CCMD_KEEPALIVE_PARM_ADOPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) 338*4882a593Smuzhiyun #define SET_H2CCMD_KEEPALIVE_PARM_PKT_TYPE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value) 339*4882a593Smuzhiyun #define SET_H2CCMD_KEEPALIVE_PARM_PORT_NUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 3, 3, __Value) 340*4882a593Smuzhiyun #define SET_H2CCMD_KEEPALIVE_PARM_CHECK_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) 341*4882a593Smuzhiyun 342*4882a593Smuzhiyun /* _DISCONNECT_DECISION_CMD_0x04 */ 343*4882a593Smuzhiyun #define SET_H2CCMD_DISCONDECISION_PARM_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) 344*4882a593Smuzhiyun #define SET_H2CCMD_DISCONDECISION_PARM_ADOPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) 345*4882a593Smuzhiyun #define SET_H2CCMD_DISCONDECISION_PARM_TRY_BCN_FAIL_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value) 346*4882a593Smuzhiyun #define SET_H2CCMD_DISCONDECISION_PARM_DISCONNECT_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 3, 1, __Value) 347*4882a593Smuzhiyun #define SET_H2CCMD_DISCONDECISION_PORT_NUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 3, __Value) 348*4882a593Smuzhiyun #define SET_H2CCMD_DISCONDECISION_PARM_CHECK_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) 349*4882a593Smuzhiyun #define SET_H2CCMD_DISCONDECISION_PARM_TRY_PKT_NUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 8, __Value) 350*4882a593Smuzhiyun #define SET_H2CCMD_DISCONDECISION_PARM_TRY_OK_BCN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) 351*4882a593Smuzhiyun 352*4882a593Smuzhiyun /*UDP_KEEP_ALIVE 0x90*/ 353*4882a593Smuzhiyun #ifdef CONFIG_WOW_KEEP_ALIVE_PATTERN 354*4882a593Smuzhiyun /*data 0*/ 355*4882a593Smuzhiyun #define SET_H2CCMD_UDP_KEEP_ALIVE_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value); 356*4882a593Smuzhiyun #define SET_H2CCMD_UDP_KEEP_ALIVE_PACKET_LOC(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 7, __Value); 357*4882a593Smuzhiyun /*data 1*/ 358*4882a593Smuzhiyun #define SET_H2CCMD_UDP_KEEP_ALIVE_ACK_PATTERN_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 7, 1, __Value); 359*4882a593Smuzhiyun #define SET_H2CCMD_UDP_KEEP_ALIVE_ACK_PATTERN_idx(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 7, __Value); 360*4882a593Smuzhiyun /*data 2*/ 361*4882a593Smuzhiyun #define SET_H2CCMD_UDP_KEEP_ALIVE_WAKE_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 7, 1, __Value); 362*4882a593Smuzhiyun #define SET_H2CCMD_UDP_KEEP_ALIVE_WAKE_PATTERN_idx(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 7, __Value); 363*4882a593Smuzhiyun /*data3*/ 364*4882a593Smuzhiyun #define SET_H2CCMD_UDP_KEEP_ALIVE_PERIOD_LOW_BIT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value); 365*4882a593Smuzhiyun /*data4*/ 366*4882a593Smuzhiyun #define SET_H2CCMD_UDP_KEEP_ALIVE_PERIOD_HI_BIT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+4, 0, 8, __Value); 367*4882a593Smuzhiyun /*data5*/ 368*4882a593Smuzhiyun #define SET_H2CCMD_UDP_KEEP_ALIVE_RETRY_INTERVAL(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+5, 0, 8, __Value); 369*4882a593Smuzhiyun /*data6*/ 370*4882a593Smuzhiyun #define SET_H2CCMD_UDP_KEEP_ALIVE_RETRY_LIMIT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+6, 0, 8, __Value); 371*4882a593Smuzhiyun #endif /*CONFIG_WOW_KEEP_ALIVE_PATTERN*/ 372*4882a593Smuzhiyun #ifdef CONFIG_RTW_CUSTOMER_STR 373*4882a593Smuzhiyun #define RTW_CUSTOMER_STR_LEN 16 374*4882a593Smuzhiyun #define RTW_CUSTOMER_STR_FMT "%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x" 375*4882a593Smuzhiyun #define RTW_CUSTOMER_STR_ARG(x) ((u8 *)(x))[0], ((u8 *)(x))[1], ((u8 *)(x))[2], ((u8 *)(x))[3], ((u8 *)(x))[4], ((u8 *)(x))[5], \ 376*4882a593Smuzhiyun ((u8 *)(x))[6], ((u8 *)(x))[7], ((u8 *)(x))[8], ((u8 *)(x))[9], ((u8 *)(x))[10], ((u8 *)(x))[11], \ 377*4882a593Smuzhiyun ((u8 *)(x))[12], ((u8 *)(x))[13], ((u8 *)(x))[14], ((u8 *)(x))[15] 378*4882a593Smuzhiyun 379*4882a593Smuzhiyun /* H2C_CUSTOMER_STR_REQ 0x06 */ 380*4882a593Smuzhiyun #define H2C_CUSTOMER_STR_REQ_LEN 1 381*4882a593Smuzhiyun #define SET_H2CCMD_CUSTOMER_STR_REQ_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(((u8 *)(__pH2CCmd)), 0, 1, (__Value)) 382*4882a593Smuzhiyun s32 rtw_hal_h2c_customer_str_req(_adapter *adapter); 383*4882a593Smuzhiyun s32 rtw_hal_customer_str_read(_adapter *adapter, u8 *cs); 384*4882a593Smuzhiyun 385*4882a593Smuzhiyun /* H2C_CUSTOMER_STR_W1 0xC6 */ 386*4882a593Smuzhiyun #define H2C_CUSTOMER_STR_W1_LEN 7 387*4882a593Smuzhiyun #define SET_H2CCMD_CUSTOMER_STR_W1_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(((u8 *)(__pH2CCmd)), 0, 1, (__Value)) 388*4882a593Smuzhiyun #define H2CCMD_CUSTOMER_STR_W1_BYTE0(__pH2CCmd) (((u8 *)(__pH2CCmd)) + 1) 389*4882a593Smuzhiyun 390*4882a593Smuzhiyun /* H2C_CUSTOMER_STR_W2 0xC7 */ 391*4882a593Smuzhiyun #define H2C_CUSTOMER_STR_W2_LEN 7 392*4882a593Smuzhiyun #define SET_H2CCMD_CUSTOMER_STR_W2_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(((u8 *)(__pH2CCmd)), 0, 1, (__Value)) 393*4882a593Smuzhiyun #define H2CCMD_CUSTOMER_STR_W2_BYTE6(__pH2CCmd) (((u8 *)(__pH2CCmd)) + 1) 394*4882a593Smuzhiyun 395*4882a593Smuzhiyun /* H2C_CUSTOMER_STR_W3 0xC8 */ 396*4882a593Smuzhiyun #define H2C_CUSTOMER_STR_W3_LEN 5 397*4882a593Smuzhiyun #define SET_H2CCMD_CUSTOMER_STR_W3_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(((u8 *)(__pH2CCmd)), 0, 1, (__Value)) 398*4882a593Smuzhiyun #define H2CCMD_CUSTOMER_STR_W3_BYTE12(__pH2CCmd) (((u8 *)(__pH2CCmd)) + 1) 399*4882a593Smuzhiyun s32 rtw_hal_h2c_customer_str_write(_adapter *adapter, const u8 *cs); 400*4882a593Smuzhiyun s32 rtw_hal_customer_str_write(_adapter *adapter, const u8 *cs); 401*4882a593Smuzhiyun #endif /* CONFIG_RTW_CUSTOMER_STR */ 402*4882a593Smuzhiyun 403*4882a593Smuzhiyun #ifdef CONFIG_FW_OFFLOAD_SET_TXPWR_IDX 404*4882a593Smuzhiyun #define H2C_TXPWR_IDX_OFFLOAD_LEN 4 405*4882a593Smuzhiyun #define SET_H2CCMD_TXPWR_IDX_CCK(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) 406*4882a593Smuzhiyun #define SET_H2CCMD_TXPWR_IDX_OFDM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd + 1, 0, 8, __Value) 407*4882a593Smuzhiyun #define SET_H2CCMD_TXPWR_IDX_HT1SS(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd + 2, 0, 8, __Value) 408*4882a593Smuzhiyun #define SET_H2CCMD_TXPWR_IDX_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd + 3, 0, 1, __Value) 409*4882a593Smuzhiyun #endif 410*4882a593Smuzhiyun 411*4882a593Smuzhiyun /* _AP_Offload 0x08 */ 412*4882a593Smuzhiyun #define SET_H2CCMD_AP_WOWLAN_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) 413*4882a593Smuzhiyun /* _BCN_RsvdPage 0x09 */ 414*4882a593Smuzhiyun #define SET_H2CCMD_AP_WOWLAN_RSVDPAGE_LOC_BCN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) 415*4882a593Smuzhiyun /* _Probersp_RsvdPage 0x0a */ 416*4882a593Smuzhiyun #define SET_H2CCMD_AP_WOWLAN_RSVDPAGE_LOC_ProbeRsp(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) 417*4882a593Smuzhiyun /* _Probersp_RsvdPage 0x13 */ 418*4882a593Smuzhiyun 419*4882a593Smuzhiyun #define SET_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) 420*4882a593Smuzhiyun #define SET_H2CCMD_PWRMODE_PARM_RLBM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 4, __Value) 421*4882a593Smuzhiyun #define SET_H2CCMD_PWRMODE_PARM_SMART_PS(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 4, 4, __Value) 422*4882a593Smuzhiyun #define SET_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) 423*4882a593Smuzhiyun #define SET_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) 424*4882a593Smuzhiyun #define SET_H2CCMD_PWRMODE_PARM_BCN_EARLY_C2H_RPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 2, 1, __Value) 425*4882a593Smuzhiyun #define SET_H2CCMD_PWRMODE_PARM_PWR_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) 426*4882a593Smuzhiyun 427*4882a593Smuzhiyun #define GET_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd) LE_BITS_TO_1BYTE(__pH2CCmd, 0, 8) 428*4882a593Smuzhiyun /* _PWR_MOD_CMD_0x20 */ 429*4882a593Smuzhiyun 430*4882a593Smuzhiyun #define SET_H2CCMD_AP_WOW_GPIO_CTRL_INDEX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 4, __Value) 431*4882a593Smuzhiyun #define SET_H2CCMD_AP_WOW_GPIO_CTRL_C2H_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 1, __Value) 432*4882a593Smuzhiyun #define SET_H2CCMD_AP_WOW_GPIO_CTRL_PLUS(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 5, 1, __Value) 433*4882a593Smuzhiyun #define SET_H2CCMD_AP_WOW_GPIO_CTRL_HIGH_ACTIVE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 6, 1, __Value) 434*4882a593Smuzhiyun #define SET_H2CCMD_AP_WOW_GPIO_CTRL_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 7, 1, __Value) 435*4882a593Smuzhiyun #define SET_H2CCMD_AP_WOW_GPIO_CTRL_DURATION(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) 436*4882a593Smuzhiyun #define SET_H2CCMD_AP_WOW_GPIO_CTRL_C2H_DURATION(__pH2CCmd, __Value)SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) 437*4882a593Smuzhiyun /* _AP_PS 0x26 */ 438*4882a593Smuzhiyun #define SET_H2CCMD_AP_WOW_PS_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) 439*4882a593Smuzhiyun #define SET_H2CCMD_AP_WOW_PS_32K_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) 440*4882a593Smuzhiyun #define SET_H2CCMD_AP_WOW_PS_RF(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value) 441*4882a593Smuzhiyun #define SET_H2CCMD_AP_WOW_PS_DURATION(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) 442*4882a593Smuzhiyun 443*4882a593Smuzhiyun /* INACTIVE_PS 0x27, duration unit is TBTT */ 444*4882a593Smuzhiyun #define SET_H2CCMD_INACTIVE_PS_EN(__pH2CCmd, __Value) \ 445*4882a593Smuzhiyun SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) 446*4882a593Smuzhiyun #define SET_H2CCMD_INACTIVE_IGNORE_PS(__pH2CCmd, __Value) \ 447*4882a593Smuzhiyun SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) 448*4882a593Smuzhiyun #define SET_H2CCMD_INACTIVE_PERIOD_SCAN_EN(__pH2CCmd, __Value) \ 449*4882a593Smuzhiyun SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value) 450*4882a593Smuzhiyun #define SET_H2CCMD_INACTIVE_DISBBRF(__pH2CCmd, __Value) \ 451*4882a593Smuzhiyun SET_BITS_TO_LE_1BYTE(__pH2CCmd, 3, 1, __Value) 452*4882a593Smuzhiyun #define SET_H2CCMD_INACTIVE_PORT_NUM(__pH2CCmd, __Value) \ 453*4882a593Smuzhiyun SET_BITS_TO_LE_1BYTE(__pH2CCmd, 5, 3, __Value) 454*4882a593Smuzhiyun #define SET_H2CCMD_INACTIVE_PS_FREQ(__pH2CCmd, __Value) \ 455*4882a593Smuzhiyun SET_BITS_TO_LE_1BYTE(__pH2CCmd + 1, 0, 8, __Value) 456*4882a593Smuzhiyun #define SET_H2CCMD_INACTIVE_PS_DURATION(__pH2CCmd, __Value) \ 457*4882a593Smuzhiyun SET_BITS_TO_LE_1BYTE(__pH2CCmd + 2, 0, 8, __Value) 458*4882a593Smuzhiyun #define SET_H2CCMD_INACTIVE_PS_PERIOD_SCAN_TIME(__pH2CCmd, __Value) \ 459*4882a593Smuzhiyun SET_BITS_TO_LE_1BYTE(__pH2CCmd + 3, 0, 8, __Value) 460*4882a593Smuzhiyun 461*4882a593Smuzhiyun #ifdef CONFIG_LPS_POFF 462*4882a593Smuzhiyun /*PARTIAL OFF Control 0x29*/ 463*4882a593Smuzhiyun #define SET_H2CCMD_LPS_POFF_CTRL_EN(__pH2CCmd, __Value) \ 464*4882a593Smuzhiyun SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) 465*4882a593Smuzhiyun /*PARTIAL OFF PARAM 0x2A*/ 466*4882a593Smuzhiyun #define SET_H2CCMD_LPS_POFF_PARAM_RDVLD(__pH2CCmd, __Value) \ 467*4882a593Smuzhiyun SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) 468*4882a593Smuzhiyun #define SET_H2CCMD_LPS_POFF_PARAM_WRVLD(__pH2CCmd, __Value) \ 469*4882a593Smuzhiyun SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) 470*4882a593Smuzhiyun #define SET_H2CCMD_LPS_POFF_PARAM_STARTADDL(__pH2CCmd, __Value) \ 471*4882a593Smuzhiyun SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) 472*4882a593Smuzhiyun #define SET_H2CCMD_LPS_POFF_PARAM_STARTADDH(__pH2CCmd, __Value) \ 473*4882a593Smuzhiyun SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 8, __Value) 474*4882a593Smuzhiyun #define SET_H2CCMD_LPS_POFF_PARAM_ENDADDL(__pH2CCmd, __Value) \ 475*4882a593Smuzhiyun SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) 476*4882a593Smuzhiyun #define SET_H2CCMD_LPS_POFF_PARAM_ENDADDH(__pH2CCmd, __Value) \ 477*4882a593Smuzhiyun SET_BITS_TO_LE_1BYTE(__pH2CCmd+4, 0, 8, __Value) 478*4882a593Smuzhiyun #endif 479*4882a593Smuzhiyun 480*4882a593Smuzhiyun #ifdef CONFIG_FW_MULTI_PORT_SUPPORT 481*4882a593Smuzhiyun /* DEFAULT PORT ID 0x2C*/ 482*4882a593Smuzhiyun #define SET_H2CCMD_DFTPID_PORT_ID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(((u8 *)(__pH2CCmd)), 0, 8, (__Value)) 483*4882a593Smuzhiyun #define SET_H2CCMD_DFTPID_MAC_ID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(((u8 *)(__pH2CCmd)) + 1, 0, 8, (__Value)) 484*4882a593Smuzhiyun #endif 485*4882a593Smuzhiyun 486*4882a593Smuzhiyun #ifdef CONFIG_MCC_MODE 487*4882a593Smuzhiyun /* MCC LOC CMD 0x10 */ 488*4882a593Smuzhiyun #define SET_H2CCMD_MCC_RSVDPAGE_LOC(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) 489*4882a593Smuzhiyun #define SET_H2CCMD_MCC_PWRIDX_OFFLOAD_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd) + 3, 0, 1, __Value) 490*4882a593Smuzhiyun #define SET_H2CCMD_MCC_PWRIDX_OFFLOAD_RFNUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd) + 3, 4, 4, __Value) 491*4882a593Smuzhiyun #define SET_H2CCMD_MCC_PWRIDX_RSVDPAGE_LOC(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd) + 4, 0, 8, __Value) 492*4882a593Smuzhiyun 493*4882a593Smuzhiyun /* MCC RQT TSF 0x15 */ 494*4882a593Smuzhiyun #define SET_H2CCMD_MCC_RQT_TSFX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 4, __Value) 495*4882a593Smuzhiyun #define SET_H2CCMD_MCC_RQT_TSFY(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 4, __Value) 496*4882a593Smuzhiyun 497*4882a593Smuzhiyun /* MCC MAC ID CMD 0x16 */ 498*4882a593Smuzhiyun #define SET_H2CCMD_MCC_MACID_BITMAP_L(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) 499*4882a593Smuzhiyun #define SET_H2CCMD_MCC_MACID_BITMAP_H(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) 500*4882a593Smuzhiyun 501*4882a593Smuzhiyun /* NEW MCC CTRL CMD 0x17 */ 502*4882a593Smuzhiyun #define SET_H2CCMD_MCC_CTRL_V2_ORDER(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 4, __Value) 503*4882a593Smuzhiyun #define SET_H2CCMD_MCC_CTRL_V2_TOTALNUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 4, __Value) 504*4882a593Smuzhiyun #define SET_H2CCMD_MCC_CTRL_V2_CENTRAL_CH(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) 505*4882a593Smuzhiyun #define SET_H2CCMD_MCC_CTRL_V2_PRIMARY_CH(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 4, __Value) 506*4882a593Smuzhiyun #define SET_H2CCMD_MCC_CTRL_V2_BW(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 4, 4, __Value) 507*4882a593Smuzhiyun #define SET_H2CCMD_MCC_CTRL_V2_DURATION(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) 508*4882a593Smuzhiyun #define SET_H2CCMD_MCC_CTRL_V2_ROLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 3, __Value) 509*4882a593Smuzhiyun #define SET_H2CCMD_MCC_CTRL_V2_INCURCH(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 3, 1, __Value) 510*4882a593Smuzhiyun #define SET_H2CCMD_MCC_CTRL_V2_DIS_SW_RETRY(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 4, 1, __Value) 511*4882a593Smuzhiyun #define SET_H2CCMD_MCC_CTRL_V2_DISTXNULL(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 5, 1, __Value) 512*4882a593Smuzhiyun #define SET_H2CCMD_MCC_CTRL_V2_C2HRPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 6, 2, __Value) 513*4882a593Smuzhiyun #define SET_H2CCMD_MCC_CTRL_V2_TSFX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 4, __Value) 514*4882a593Smuzhiyun #define SET_H2CCMD_MCC_CTRL_V2_NULL_EARLY(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 4, 4, __Value) 515*4882a593Smuzhiyun #define SET_H2CCMD_MCC_CTRL_V2_UPDATE_PARM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+6, 7, 1, __Value) 516*4882a593Smuzhiyun 517*4882a593Smuzhiyun 518*4882a593Smuzhiyun /* MCC CTRL CMD 0x18 */ 519*4882a593Smuzhiyun #define SET_H2CCMD_MCC_CTRL_ORDER(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 4, __Value) 520*4882a593Smuzhiyun #define SET_H2CCMD_MCC_CTRL_TOTALNUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 4, __Value) 521*4882a593Smuzhiyun #define SET_H2CCMD_MCC_CTRL_CHIDX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) 522*4882a593Smuzhiyun #define SET_H2CCMD_MCC_CTRL_BW(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 2, __Value) 523*4882a593Smuzhiyun #define SET_H2CCMD_MCC_CTRL_BW40SC(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 2, 3, __Value) 524*4882a593Smuzhiyun #define SET_H2CCMD_MCC_CTRL_BW80SC(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 5, 3, __Value) 525*4882a593Smuzhiyun #define SET_H2CCMD_MCC_CTRL_DURATION(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) 526*4882a593Smuzhiyun #define SET_H2CCMD_MCC_CTRL_ROLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 3, __Value) 527*4882a593Smuzhiyun #define SET_H2CCMD_MCC_CTRL_INCURCH(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 3, 1, __Value) 528*4882a593Smuzhiyun #define SET_H2CCMD_MCC_CTRL_RSVD0(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 4, 4, __Value) 529*4882a593Smuzhiyun #define SET_H2CCMD_MCC_CTRL_RSVD1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 8, __Value) 530*4882a593Smuzhiyun #define SET_H2CCMD_MCC_CTRL_RFETYPE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+6, 0, 4, __Value) 531*4882a593Smuzhiyun #define SET_H2CCMD_MCC_CTRL_DISTXNULL(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+6, 4, 1, __Value) 532*4882a593Smuzhiyun #define SET_H2CCMD_MCC_CTRL_C2HRPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+6, 5, 2, __Value) 533*4882a593Smuzhiyun #define SET_H2CCMD_MCC_CTRL_CHSCAN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+6, 7, 1, __Value) 534*4882a593Smuzhiyun 535*4882a593Smuzhiyun /* MCC Time CMD 0x19 */ 536*4882a593Smuzhiyun #define SET_H2CCMD_MCC_TIME_SETTING_FW_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) 537*4882a593Smuzhiyun #define SET_H2CCMD_MCC_TIME_SETTING_TSF_SYNC_OFFSET(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 7, __Value) 538*4882a593Smuzhiyun #define SET_H2CCMD_MCC_TIME_SETTING_START_TIME(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) 539*4882a593Smuzhiyun #define SET_H2CCMD_MCC_TIME_SETTING_INTERVAL(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) 540*4882a593Smuzhiyun #define SET_H2CCMD_MCC_TIME_SETTING_EARLY_SWITCH_RPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) 541*4882a593Smuzhiyun #define SET_H2CCMD_MCC_TIME_SETTING_ORDER_BASE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 4, __Value) 542*4882a593Smuzhiyun #define SET_H2CCMD_MCC_TIME_SETTING_ORDER_SYNC(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 4, 4, __Value) 543*4882a593Smuzhiyun #define SET_H2CCMD_MCC_TIME_SETTING_UPDATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 1, __Value) 544*4882a593Smuzhiyun #define SET_H2CCMD_MCC_TIME_SETTING_ORDER0_DURATION(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 1, 7, __Value) 545*4882a593Smuzhiyun 546*4882a593Smuzhiyun /* MCC IQK CMD 0x1A */ 547*4882a593Smuzhiyun #define SET_H2CCMD_MCC_IQK_READY(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) 548*4882a593Smuzhiyun #define SET_H2CCMD_MCC_IQK_ORDER(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 4, __Value) 549*4882a593Smuzhiyun #define SET_H2CCMD_MCC_IQK_PATH(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 5, 2, __Value) 550*4882a593Smuzhiyun #define SET_H2CCMD_MCC_IQK_RX_L(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) 551*4882a593Smuzhiyun #define SET_H2CCMD_MCC_IQK_RX_M1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 2, __Value) 552*4882a593Smuzhiyun #define SET_H2CCMD_MCC_IQK_RX_M2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 2, 6, __Value) 553*4882a593Smuzhiyun #define SET_H2CCMD_MCC_IQK_RX_H(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 4, __Value) 554*4882a593Smuzhiyun #define SET_H2CCMD_MCC_IQK_TX_L(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) 555*4882a593Smuzhiyun #define SET_H2CCMD_MCC_IQK_TX_M1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 3, __Value) 556*4882a593Smuzhiyun #define SET_H2CCMD_MCC_IQK_TX_M2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 3, 5, __Value) 557*4882a593Smuzhiyun #define SET_H2CCMD_MCC_IQK_TX_H(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+6, 0, 6, __Value) 558*4882a593Smuzhiyun #endif /* CONFIG_MCC_MODE */ 559*4882a593Smuzhiyun 560*4882a593Smuzhiyun /* CHNL SWITCH OPER OFFLOAD 0x1C */ 561*4882a593Smuzhiyun #define SET_H2CCMD_CH_SW_OPER_OFFLOAD_CH_NUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) 562*4882a593Smuzhiyun #define SET_H2CCMD_CH_SW_OPER_OFFLOAD_BW_MODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd) + 1, 0, 2, __Value) 563*4882a593Smuzhiyun #define SET_H2CCMD_CH_SW_OPER_OFFLOAD_BW_40M_SC(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd) + 1, 2, 3, __Value) 564*4882a593Smuzhiyun #define SET_H2CCMD_CH_SW_OPER_OFFLOAD_BW_80M_SC(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd) + 1, 5, 3, __Value) 565*4882a593Smuzhiyun #define SET_H2CCMD_CH_SW_OPER_OFFLOAD_RFE_TYPE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd) + 2, 0, 4, __Value) 566*4882a593Smuzhiyun 567*4882a593Smuzhiyun /* H2C_SINGLE_CHANNELSWITCH_V2 = 0x1D */ 568*4882a593Smuzhiyun #define SET_H2CCMD_SINGLE_CH_SWITCH_V2_CENTRAL_CH_NUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) 569*4882a593Smuzhiyun #define SET_H2CCMD_SINGLE_CH_SWITCH_V2_PRIMARY_CH_IDX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd) + 1, 0, 4, __Value) 570*4882a593Smuzhiyun #define SET_H2CCMD_SINGLE_CH_SWITCH_V2_BW(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd) + 1, 4, 4, __Value) 571*4882a593Smuzhiyun #define SET_H2CCMD_SINGLE_CH_SWITCH_V2_PWR_IDX_UPDATE_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd) + 2, 0, 1, __Value) 572*4882a593Smuzhiyun #define SET_H2CCMD_SINGLE_CH_SWITCH_V2_IQK_UPDATE_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd) + 2, 1, 1, __Value) 573*4882a593Smuzhiyun #define SET_H2CCMD_SINGLE_CH_SWITCH_V2_CH_IDX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd) + 2, 4, 4, __Value) 574*4882a593Smuzhiyun 575*4882a593Smuzhiyun #if defined(CONFIG_BT_COEXIST) && defined(CONFIG_FW_MULTI_PORT_SUPPORT) 576*4882a593Smuzhiyun #define SET_H2CCMD_BTC_WL_PORT_ID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 4, __Value) 577*4882a593Smuzhiyun #endif 578*4882a593Smuzhiyun 579*4882a593Smuzhiyun /* _WoWLAN PARAM_CMD_0x80 */ 580*4882a593Smuzhiyun #define SET_H2CCMD_WOWLAN_FUNC_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) 581*4882a593Smuzhiyun #define SET_H2CCMD_WOWLAN_PATTERN_MATCH_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) 582*4882a593Smuzhiyun #define SET_H2CCMD_WOWLAN_MAGIC_PKT_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value) 583*4882a593Smuzhiyun #define SET_H2CCMD_WOWLAN_UNICAST_PKT_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 3, 1, __Value) 584*4882a593Smuzhiyun #define SET_H2CCMD_WOWLAN_ALL_PKT_DROP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 1, __Value) 585*4882a593Smuzhiyun #define SET_H2CCMD_WOWLAN_GPIO_ACTIVE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 5, 1, __Value) 586*4882a593Smuzhiyun #define SET_H2CCMD_WOWLAN_REKEY_WAKE_UP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 6, 1, __Value) 587*4882a593Smuzhiyun #define SET_H2CCMD_WOWLAN_DISCONNECT_WAKE_UP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 7, 1, __Value) 588*4882a593Smuzhiyun #define SET_H2CCMD_WOWLAN_GPIONUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 7, __Value) 589*4882a593Smuzhiyun #define SET_H2CCMD_WOWLAN_DATAPIN_WAKE_UP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 7, 1, __Value) 590*4882a593Smuzhiyun #define SET_H2CCMD_WOWLAN_GPIO_DURATION(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) 591*4882a593Smuzhiyun #define SET_H2CCMD_WOWLAN_GPIO_PULSE_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 1, __Value) 592*4882a593Smuzhiyun #define SET_H2CCMD_WOWLAN_GPIO_PULSE_COUNT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 1, 7, __Value) 593*4882a593Smuzhiyun #define SET_H2CCMD_WOWLAN_DISABLE_UPHY(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 1, __Value) 594*4882a593Smuzhiyun #define SET_H2CCMD_WOWLAN_HST2DEV_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 1, 1, __Value) 595*4882a593Smuzhiyun #define SET_H2CCMD_WOWLAN_GPIO_DURATION_MS(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 2, 1, __Value) 596*4882a593Smuzhiyun #define SET_H2CCMD_WOWLAN_CHANGE_UNIT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 2, 1, __Value) 597*4882a593Smuzhiyun #define SET_H2CCMD_WOWLAN_UNIT_FOR_UPHY_DISABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 3, 1, __Value) 598*4882a593Smuzhiyun #define SET_H2CCMD_WOWLAN_TAKE_PDN_UPHY_DIS_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 4, 1, __Value) 599*4882a593Smuzhiyun #define SET_H2CCMD_WOWLAN_GPIO_INPUT_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 5, 1, __Value) 600*4882a593Smuzhiyun #define SET_H2CCMD_WOWLAN_DEV2HST_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 7, 1, __Value) 601*4882a593Smuzhiyun #define SET_H2CCMD_WOWLAN_TIME_FOR_UPHY_DISABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 8, __Value) 602*4882a593Smuzhiyun #define SET_H2CCMD_WOWLAN_RISE_HST2DEV(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+6, 2, 1, __Value) 603*4882a593Smuzhiyun 604*4882a593Smuzhiyun /* _REMOTE_WAKEUP_CMD_0x81 */ 605*4882a593Smuzhiyun #define SET_H2CCMD_REMOTE_WAKECTRL_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) 606*4882a593Smuzhiyun #define SET_H2CCMD_REMOTE_WAKE_CTRL_ARP_OFFLOAD_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) 607*4882a593Smuzhiyun #define SET_H2CCMD_REMOTE_WAKE_CTRL_NDP_OFFLOAD_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value) 608*4882a593Smuzhiyun #define SET_H2CCMD_REMOTE_WAKE_CTRL_GTK_OFFLOAD_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 3, 1, __Value) 609*4882a593Smuzhiyun #define SET_H2CCMD_REMOTE_WAKE_CTRL_NLO_OFFLOAD_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 1, __Value) 610*4882a593Smuzhiyun #define SET_H2CCMD_REMOTE_WAKE_CTRL_FW_UNICAST_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 7, 1, __Value) 611*4882a593Smuzhiyun #define SET_H2CCMD_REMOTE_WAKE_CTRL_P2P_OFFLAD_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 1, __Value) 612*4882a593Smuzhiyun #define SET_H2CCMD_REMOTE_WAKE_CTRL_NBNS_FILTER_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 2, 1, __Value) 613*4882a593Smuzhiyun #define SET_H2CCMD_REMOTE_WAKE_CTRL_TKIP_OFFLOAD_EN(__pH2CCmd, __Value) \ 614*4882a593Smuzhiyun SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 3, 1, __Value) 615*4882a593Smuzhiyun 616*4882a593Smuzhiyun #define SET_H2CCMD_REMOTE_WAKE_CTRL_ARP_ACTION(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 1, __Value) 617*4882a593Smuzhiyun #define SET_H2CCMD_REMOTE_WAKE_CTRL_FW_PARSING_UNTIL_WAKEUP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 4, 1, __Value) 618*4882a593Smuzhiyun 619*4882a593Smuzhiyun /* AOAC_GLOBAL_INFO_0x82 */ 620*4882a593Smuzhiyun #define SET_H2CCMD_AOAC_GLOBAL_INFO_PAIRWISE_ENC_ALG(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) 621*4882a593Smuzhiyun #define SET_H2CCMD_AOAC_GLOBAL_INFO_GROUP_ENC_ALG(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) 622*4882a593Smuzhiyun 623*4882a593Smuzhiyun /* AOAC_RSVDPAGE_LOC_0x83 */ 624*4882a593Smuzhiyun #define SET_H2CCMD_AOAC_RSVDPAGE_LOC_REMOTE_WAKE_CTRL_INFO(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd), 0, 8, __Value) 625*4882a593Smuzhiyun #define SET_H2CCMD_AOAC_RSVDPAGE_LOC_ARP_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) 626*4882a593Smuzhiyun #define SET_H2CCMD_AOAC_RSVDPAGE_LOC_NEIGHBOR_ADV(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) 627*4882a593Smuzhiyun #define SET_H2CCMD_AOAC_RSVDPAGE_LOC_GTK_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) 628*4882a593Smuzhiyun #define SET_H2CCMD_AOAC_RSVDPAGE_LOC_GTK_INFO(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) 629*4882a593Smuzhiyun #ifdef CONFIG_GTK_OL 630*4882a593Smuzhiyun #define SET_H2CCMD_AOAC_RSVDPAGE_LOC_GTK_EXT_MEM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 8, __Value) 631*4882a593Smuzhiyun #endif /* CONFIG_GTK_OL */ 632*4882a593Smuzhiyun #define SET_H2CCMD_AOAC_RSVDPAGE_LOC_NDP_INFO(__pH2CCmd, __Value) \ 633*4882a593Smuzhiyun SET_BITS_TO_LE_1BYTE((__pH2CCmd)+6, 0, 8, __Value) 634*4882a593Smuzhiyun 635*4882a593Smuzhiyun /* AOAC_RSVDPAGE_2_0x84 */ 636*4882a593Smuzhiyun 637*4882a593Smuzhiyun /* AOAC_RSVDPAGE_3_0x88 */ 638*4882a593Smuzhiyun #ifdef CONFIG_PNO_SUPPORT 639*4882a593Smuzhiyun #define SET_H2CCMD_AOAC_RSVDPAGE_LOC_NLO_INFO(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd), 0, 8, __Value) 640*4882a593Smuzhiyun #endif 641*4882a593Smuzhiyun #define SET_H2CCMD_AOAC_RSVDPAGE_LOC_AOAC_REPORT(__pH2CCmd, __Value) \ 642*4882a593Smuzhiyun SET_BITS_TO_LE_1BYTE((__pH2CCmd) + 1, 0, 8, __Value) 643*4882a593Smuzhiyun 644*4882a593Smuzhiyun #ifdef CONFIG_PNO_SUPPORT 645*4882a593Smuzhiyun /* D0_Scan_Offload_Info_0x86 */ 646*4882a593Smuzhiyun #define SET_H2CCMD_AOAC_NLO_FUN_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd), 3, 1, __Value) 647*4882a593Smuzhiyun #define SET_H2CCMD_AOAC_NLO_IPS_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd), 4, 1, __Value) 648*4882a593Smuzhiyun #define SET_H2CCMD_AOAC_RSVDPAGE_LOC_PROBE_PACKET(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) 649*4882a593Smuzhiyun #define SET_H2CCMD_AOAC_RSVDPAGE_LOC_SCAN_INFO(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) 650*4882a593Smuzhiyun #define SET_H2CCMD_AOAC_RSVDPAGE_LOC_SSID_INFO(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) 651*4882a593Smuzhiyun #endif /* CONFIG_PNO_SUPPORT */ 652*4882a593Smuzhiyun 653*4882a593Smuzhiyun /* _GPIO_CUSTOM_CMD_0x89 */ 654*4882a593Smuzhiyun #define SET_H2CCMD_CUSTOMERID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) 655*4882a593Smuzhiyun #define SET_H2CCMD_SPECIAL_WAKE_REASON(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) 656*4882a593Smuzhiyun #define SET_H2CCMD_CUSTOM_WAKE_REASON(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 1, __Value) 657*4882a593Smuzhiyun 658*4882a593Smuzhiyun #ifdef CONFIG_P2P_WOWLAN 659*4882a593Smuzhiyun /* P2P_RsvdPage_0x8a */ 660*4882a593Smuzhiyun #define SET_H2CCMD_RSVDPAGE_LOC_P2P_BCN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) 661*4882a593Smuzhiyun #define SET_H2CCMD_RSVDPAGE_LOC_P2P_PROBE_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) 662*4882a593Smuzhiyun #define SET_H2CCMD_RSVDPAGE_LOC_P2P_NEGO_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) 663*4882a593Smuzhiyun #define SET_H2CCMD_RSVDPAGE_LOC_P2P_INVITE_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) 664*4882a593Smuzhiyun #define SET_H2CCMD_RSVDPAGE_LOC_P2P_PD_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) 665*4882a593Smuzhiyun #endif /* CONFIG_P2P_WOWLAN */ 666*4882a593Smuzhiyun 667*4882a593Smuzhiyun #ifdef CONFIG_LPS_PG 668*4882a593Smuzhiyun #define SET_H2CCMD_LPSPG_SEC_CAM_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value)/*SecurityCAM_En*/ 669*4882a593Smuzhiyun #define SET_H2CCMD_LPSPG_MBID_CAM_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value)/*BSSIDCAM_En*/ 670*4882a593Smuzhiyun #define SET_H2CCMD_LPSPG_PMC_CAM_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value)/*PatternMatchCAM_En*/ 671*4882a593Smuzhiyun #define SET_H2CCMD_LPSPG_MACID_SEARCH_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 3, 1, __Value)/*MACIDSearch_En*/ 672*4882a593Smuzhiyun #define SET_H2CCMD_LPSPG_TXSC_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 1, __Value)/*TXSC_En*/ 673*4882a593Smuzhiyun #define SET_H2CCMD_LPSPG_MU_RATE_TB_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 5, 1, __Value)/*MURateTable_En*/ 674*4882a593Smuzhiyun #define SET_H2CCMD_LPSPG_LOC(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value)/*Loc_LPS_PG*/ 675*4882a593Smuzhiyun #define SET_H2CCMD_LPSPG_DPK_INFO_LOC(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value)/*Loc_LPS_PG_DPK_info*/ 676*4882a593Smuzhiyun #define SET_H2CCMD_LPSPG_IQK_INFO_LOC(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd) + 3, 0, 8, __Value)/*Loc_IQK_result*/ 677*4882a593Smuzhiyun #endif 678*4882a593Smuzhiyun 679*4882a593Smuzhiyun #if defined(CONFIG_RTL8822C) && defined(CONFIG_SUPPORT_DYNAMIC_TXPWR) 680*4882a593Smuzhiyun #define SET_H2CCMD_FW_CRC5_SEARCH_EN(cmd, v) \ 681*4882a593Smuzhiyun SET_BITS_TO_LE_1BYTE((cmd), 0, 1, (v)); 682*4882a593Smuzhiyun #define SET_H2CCMD_FW_CRC5_SEARCH_MACID(cmd, v) \ 683*4882a593Smuzhiyun SET_BITS_TO_LE_1BYTE((cmd), 1, 7, (v)); 684*4882a593Smuzhiyun #define SET_H2CCMD_FW_CRC5_SEARCH_MAC(cmd, mac) \ 685*4882a593Smuzhiyun do { \ 686*4882a593Smuzhiyun int __offset = 0; \ 687*4882a593Smuzhiyun for (__offset = 0; __offset < ETH_ALEN; __offset++) \ 688*4882a593Smuzhiyun SET_BITS_TO_LE_1BYTE((u8 *)(cmd + __offset), 0, 8, *((u8 *)(mac + __offset))); \ 689*4882a593Smuzhiyun } while(0) 690*4882a593Smuzhiyun #endif 691*4882a593Smuzhiyun 692*4882a593Smuzhiyun #ifdef CONFIG_WAR_OFFLOAD 693*4882a593Smuzhiyun /* WarOffload_Info_0x8D */ 694*4882a593Smuzhiyun #define SET_H2CCMD_WAR_CFG_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) 695*4882a593Smuzhiyun #define SET_H2CCMD_WAR_CFG_ARP_RSP_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) 696*4882a593Smuzhiyun #define SET_H2CCMD_WAR_CFG_MDNSV4_RSP_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 2, 1, __Value) 697*4882a593Smuzhiyun #define SET_H2CCMD_WAR_CFG_MDNSV6_RSP_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 3, 1, __Value) 698*4882a593Smuzhiyun #define SET_H2CCMD_WAR_CFG_MDNSV4_WAKE_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 6, 1, __Value) 699*4882a593Smuzhiyun #define SET_H2CCMD_WAR_CFG_MDNSV6_WAKE_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 7, 1, __Value) 700*4882a593Smuzhiyun 701*4882a593Smuzhiyun /* H2C_WAROFLD_RSVDPAGE1 */ 702*4882a593Smuzhiyun #define SET_H2CCMD_WAROFLD_RSVDPAGE1_LOC_PARM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd), 0, 8, __Value) 703*4882a593Smuzhiyun #endif /* CONFIG_WAR_OFFLOAD */ 704*4882a593Smuzhiyun 705*4882a593Smuzhiyun 706*4882a593Smuzhiyun /* BT_UNKNOWN_DEVICE_WA_0xD1 */ 707*4882a593Smuzhiyun #define SET_H2CCMD_BT_UNKNOWN_DEVICE_WA_HANG_CHK_EN(__pH2CCmd, __Value) \ 708*4882a593Smuzhiyun SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) 709*4882a593Smuzhiyun #define SET_H2CCMD_BT_UNKNOWN_DEVICE_WA_FORCE_IB_EN(__pH2CCmd, __Value) \ 710*4882a593Smuzhiyun SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) 711*4882a593Smuzhiyun #define SET_H2CCMD_BT_UNKNOWN_DEVICE_WA_HWID_CHK_EN(__pH2CCmd, __Value) \ 712*4882a593Smuzhiyun SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value) 713*4882a593Smuzhiyun #define SET_H2CCMD_BT_UNKNOWN_DEVICE_WA_ONE_TIME_CHK(__pH2CCmd, __Value) \ 714*4882a593Smuzhiyun SET_BITS_TO_LE_1BYTE(__pH2CCmd, 3, 1, __Value) 715*4882a593Smuzhiyun 716*4882a593Smuzhiyun #ifdef DBG_FW_DEBUG_MSG_PKT 717*4882a593Smuzhiyun #define SET_H2CCMD_FW_DBG_MSG_PKT_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value)/*sniffer_dbg_en*/ 718*4882a593Smuzhiyun #define SET_H2CCMD_RSVDPAGE_LOC_FW_DBG_MSG_PKT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) /*loc_debug_packet*/ 719*4882a593Smuzhiyun #endif /*DBG_FW_DEBUG_MSG_PKT*/ 720*4882a593Smuzhiyun 721*4882a593Smuzhiyun #ifdef DBG_RSVD_PAGE_CFG 722*4882a593Smuzhiyun #define RSVD_PAGE_CFG(ops, v1, v2, v3) \ 723*4882a593Smuzhiyun RTW_INFO("=== [RSVD][%s]-NeedPage:%d, TotalPageNum:%d TotalPacketLen:%d ===\n", \ 724*4882a593Smuzhiyun ops, v1, v2, v3) 725*4882a593Smuzhiyun #else 726*4882a593Smuzhiyun #define RSVD_PAGE_CFG(ops, v1, v2, v3) do {} while (0) 727*4882a593Smuzhiyun #endif 728*4882a593Smuzhiyun 729*4882a593Smuzhiyun /* --------------------------------------------------------------------------------------------------------- 730*4882a593Smuzhiyun * ------------------------------------------- Structure -------------------------------------------------- 731*4882a593Smuzhiyun * --------------------------------------------------------------------------------------------------------- */ 732*4882a593Smuzhiyun typedef struct _RSVDPAGE_LOC { 733*4882a593Smuzhiyun u8 LocProbeRsp; 734*4882a593Smuzhiyun u8 LocPsPoll; 735*4882a593Smuzhiyun u8 LocNullData; 736*4882a593Smuzhiyun u8 LocQosNull; 737*4882a593Smuzhiyun u8 LocBTQosNull; 738*4882a593Smuzhiyun #ifdef CONFIG_WOWLAN 739*4882a593Smuzhiyun u8 LocRemoteCtrlInfo; 740*4882a593Smuzhiyun u8 LocArpRsp; 741*4882a593Smuzhiyun u8 LocNbrAdv; 742*4882a593Smuzhiyun u8 LocGTKRsp; 743*4882a593Smuzhiyun u8 LocGTKInfo; 744*4882a593Smuzhiyun u8 LocProbeReq; 745*4882a593Smuzhiyun u8 LocNetList; 746*4882a593Smuzhiyun #ifdef CONFIG_GTK_OL 747*4882a593Smuzhiyun u8 LocGTKEXTMEM; 748*4882a593Smuzhiyun #endif /* CONFIG_GTK_OL */ 749*4882a593Smuzhiyun u8 LocNDPInfo; 750*4882a593Smuzhiyun u8 LocAOACReport; 751*4882a593Smuzhiyun #ifdef CONFIG_PNO_SUPPORT 752*4882a593Smuzhiyun u8 LocPNOInfo; 753*4882a593Smuzhiyun u8 LocScanInfo; 754*4882a593Smuzhiyun u8 LocSSIDInfo; 755*4882a593Smuzhiyun u8 LocProbePacket; 756*4882a593Smuzhiyun #endif /* CONFIG_PNO_SUPPORT */ 757*4882a593Smuzhiyun #ifdef CONFIG_WOW_KEEP_ALIVE_PATTERN 758*4882a593Smuzhiyun u8 LocKeepAlive; 759*4882a593Smuzhiyun #endif /*CONFIG_WOW_KEEP_ALIVE_PATTERN*/ 760*4882a593Smuzhiyun #ifdef CONFIG_WAR_OFFLOAD 761*4882a593Smuzhiyun u8 LocIpParm; 762*4882a593Smuzhiyun #if defined(CONFIG_OFFLOAD_MDNS_V4) || defined(CONFIG_OFFLOAD_MDNS_V6) 763*4882a593Smuzhiyun u8 LocMdnsPara; 764*4882a593Smuzhiyun u8 LocMdnsv4; 765*4882a593Smuzhiyun u8 LocMdnsv6; 766*4882a593Smuzhiyun #endif /* defined(CONFIG_OFFLOAD_MDNS_V4) || defined(CONFIG_OFFLOAD_MDNS_V6) */ 767*4882a593Smuzhiyun #endif /* CONFIG_WAR_OFFLOAD */ 768*4882a593Smuzhiyun 769*4882a593Smuzhiyun #endif /* CONFIG_WOWLAN */ 770*4882a593Smuzhiyun u8 LocApOffloadBCN; 771*4882a593Smuzhiyun #ifdef CONFIG_P2P_WOWLAN 772*4882a593Smuzhiyun u8 LocP2PBeacon; 773*4882a593Smuzhiyun u8 LocP2PProbeRsp; 774*4882a593Smuzhiyun u8 LocNegoRsp; 775*4882a593Smuzhiyun u8 LocInviteRsp; 776*4882a593Smuzhiyun u8 LocPDRsp; 777*4882a593Smuzhiyun #endif /* CONFIG_P2P_WOWLAN */ 778*4882a593Smuzhiyun #ifdef DBG_FW_DEBUG_MSG_PKT 779*4882a593Smuzhiyun u8 loc_fw_dbg_msg_pkt; 780*4882a593Smuzhiyun #endif /*DBG_FW_DEBUG_MSG_PKT*/ 781*4882a593Smuzhiyun } RSVDPAGE_LOC, *PRSVDPAGE_LOC; 782*4882a593Smuzhiyun 783*4882a593Smuzhiyun struct rsvd_page_cache_t { 784*4882a593Smuzhiyun char *name; 785*4882a593Smuzhiyun u8 loc; 786*4882a593Smuzhiyun u8 page_num; 787*4882a593Smuzhiyun u8 *data; 788*4882a593Smuzhiyun u32 size; 789*4882a593Smuzhiyun }; 790*4882a593Smuzhiyun 791*4882a593Smuzhiyun bool rsvd_page_cache_update_all(struct rsvd_page_cache_t *cache, u8 loc 792*4882a593Smuzhiyun , u8 txdesc_len, u32 page_size, u8 *info, u32 info_len); 793*4882a593Smuzhiyun bool rsvd_page_cache_update_data(struct rsvd_page_cache_t *cache, u8 *info 794*4882a593Smuzhiyun , u32 info_len); 795*4882a593Smuzhiyun void rsvd_page_cache_free_data(struct rsvd_page_cache_t *cache); 796*4882a593Smuzhiyun void rsvd_page_cache_free(struct rsvd_page_cache_t *cache); 797*4882a593Smuzhiyun 798*4882a593Smuzhiyun #endif 799*4882a593Smuzhiyun #ifdef CONFIG_WOWLAN 800*4882a593Smuzhiyun void dump_TX_FIFO(PADAPTER padapter, u8 page_num, u16 page_size); 801*4882a593Smuzhiyun #endif 802*4882a593Smuzhiyun u8 rtw_hal_set_fw_media_status_cmd(_adapter *adapter, u8 mstatus, u8 macid); 803*4882a593Smuzhiyun #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) 804*4882a593Smuzhiyun /* WOW command function */ 805*4882a593Smuzhiyun void rtw_hal_set_fw_wow_related_cmd(_adapter *padapter, u8 enable); 806*4882a593Smuzhiyun #ifdef CONFIG_P2P_WOWLAN 807*4882a593Smuzhiyun /* H2C 0x8A */ 808*4882a593Smuzhiyun u8 rtw_hal_set_FwP2PRsvdPage_cmd(_adapter *adapter, PRSVDPAGE_LOC rsvdpageloc); 809*4882a593Smuzhiyun /* H2C 0x8B */ 810*4882a593Smuzhiyun u8 rtw_hal_set_p2p_wowlan_offload_cmd(_adapter *adapter); 811*4882a593Smuzhiyun #endif /* CONFIG_P2P_WOWLAN */ 812*4882a593Smuzhiyun #endif 813*4882a593Smuzhiyun 814*4882a593Smuzhiyun #ifdef RTW_PER_CMD_SUPPORT_FW 815*4882a593Smuzhiyun u8 rtw_hal_set_req_per_rpt_cmd(_adapter *adapter, u8 group_macid, 816*4882a593Smuzhiyun u8 rpt_type, u32 macid_bitmap); 817*4882a593Smuzhiyun #endif 818