1*4882a593Smuzhiyun /****************************************************************************** 2*4882a593Smuzhiyun * 3*4882a593Smuzhiyun * Copyright(c) 2007 - 2017 Realtek Corporation. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify it 6*4882a593Smuzhiyun * under the terms of version 2 of the GNU General Public License as 7*4882a593Smuzhiyun * published by the Free Software Foundation. 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * This program is distributed in the hope that it will be useful, but WITHOUT 10*4882a593Smuzhiyun * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11*4882a593Smuzhiyun * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12*4882a593Smuzhiyun * more details. 13*4882a593Smuzhiyun * 14*4882a593Smuzhiyun *****************************************************************************/ 15*4882a593Smuzhiyun #ifndef __INC_HAL8710BPHYCFG_H__ 16*4882a593Smuzhiyun #define __INC_HAL8710BPHYCFG_H__ 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun /*--------------------------Define Parameters-------------------------------*/ 19*4882a593Smuzhiyun #define LOOP_LIMIT 5 20*4882a593Smuzhiyun #define MAX_STALL_TIME 50 /* us */ 21*4882a593Smuzhiyun #define AntennaDiversityValue 0x80 /* (Adapter->bSoftwareAntennaDiversity ? 0x00 : 0x80) */ 22*4882a593Smuzhiyun #define MAX_TXPWR_IDX_NMODE_92S 63 23*4882a593Smuzhiyun #define Reset_Cnt_Limit 3 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun #ifdef CONFIG_PCI_HCI 26*4882a593Smuzhiyun #define MAX_AGGR_NUM 0x0B 27*4882a593Smuzhiyun #else 28*4882a593Smuzhiyun #define MAX_AGGR_NUM 0x07 29*4882a593Smuzhiyun #endif /* CONFIG_PCI_HCI */ 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun /*--------------------------Define Parameters End-------------------------------*/ 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun /*------------------------------Define structure----------------------------*/ 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun /*------------------------------Define structure End----------------------------*/ 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun /*--------------------------Exported Function prototype---------------------*/ 40*4882a593Smuzhiyun u32 41*4882a593Smuzhiyun PHY_QueryBBReg_8710B( 42*4882a593Smuzhiyun PADAPTER Adapter, 43*4882a593Smuzhiyun u32 RegAddr, 44*4882a593Smuzhiyun u32 BitMask 45*4882a593Smuzhiyun ); 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun void 48*4882a593Smuzhiyun PHY_SetBBReg_8710B( 49*4882a593Smuzhiyun PADAPTER Adapter, 50*4882a593Smuzhiyun u32 RegAddr, 51*4882a593Smuzhiyun u32 BitMask, 52*4882a593Smuzhiyun u32 Data 53*4882a593Smuzhiyun ); 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun u32 56*4882a593Smuzhiyun PHY_QueryRFReg_8710B( 57*4882a593Smuzhiyun PADAPTER Adapter, 58*4882a593Smuzhiyun enum rf_path eRFPath, 59*4882a593Smuzhiyun u32 RegAddr, 60*4882a593Smuzhiyun u32 BitMask 61*4882a593Smuzhiyun ); 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun void 64*4882a593Smuzhiyun PHY_SetRFReg_8710B( 65*4882a593Smuzhiyun PADAPTER Adapter, 66*4882a593Smuzhiyun enum rf_path eRFPath, 67*4882a593Smuzhiyun u32 RegAddr, 68*4882a593Smuzhiyun u32 BitMask, 69*4882a593Smuzhiyun u32 Data 70*4882a593Smuzhiyun ); 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun /* MAC/BB/RF HAL config */ 73*4882a593Smuzhiyun int PHY_BBConfig8710B(PADAPTER Adapter); 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun int PHY_RFConfig8710B(PADAPTER Adapter); 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun s32 PHY_MACConfig8710B(PADAPTER padapter); 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun int 80*4882a593Smuzhiyun PHY_ConfigRFWithParaFile_8710B( 81*4882a593Smuzhiyun PADAPTER Adapter, 82*4882a593Smuzhiyun u8 *pFileName, 83*4882a593Smuzhiyun enum rf_path eRFPath 84*4882a593Smuzhiyun ); 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun void 87*4882a593Smuzhiyun PHY_SetTxPowerIndex_8710B( 88*4882a593Smuzhiyun PADAPTER Adapter, 89*4882a593Smuzhiyun u32 PowerIndex, 90*4882a593Smuzhiyun enum rf_path RFPath, 91*4882a593Smuzhiyun u8 Rate 92*4882a593Smuzhiyun ); 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun void 95*4882a593Smuzhiyun PHY_SetTxPowerLevel8710B( 96*4882a593Smuzhiyun PADAPTER Adapter, 97*4882a593Smuzhiyun u8 channel 98*4882a593Smuzhiyun ); 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun void 101*4882a593Smuzhiyun PHY_SetSwChnlBWMode8710B( 102*4882a593Smuzhiyun PADAPTER Adapter, 103*4882a593Smuzhiyun u8 channel, 104*4882a593Smuzhiyun enum channel_width Bandwidth, 105*4882a593Smuzhiyun u8 Offset40, 106*4882a593Smuzhiyun u8 Offset80 107*4882a593Smuzhiyun ); 108*4882a593Smuzhiyun 109*4882a593Smuzhiyun /*--------------------------Exported Function prototype End---------------------*/ 110*4882a593Smuzhiyun 111*4882a593Smuzhiyun #endif 112