xref: /OK3568_Linux_fs/external/rkwifibt/drivers/rtl8723ds/hal/phydm/halrf/halrf_powertracking_win.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1 /******************************************************************************
2  *
3  * Copyright(c) 2007 - 2017 Realtek Corporation.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of version 2 of the GNU General Public License as
7  * published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12  * more details.
13  *
14  *****************************************************************************/
15 
16 #ifndef __HALRF_POWERTRACKING_H__
17 #define __HALRF_POWERTRACKING_H__
18 
19 #define	DPK_DELTA_MAPPING_NUM	13
20 #define	index_mapping_HP_NUM	15
21 #define	TXSCALE_TABLE_SIZE		37
22 #define	OFDM_TABLE_SIZE			43
23 #define	CCK_TABLE_SIZE			33
24 #define	CCK_TABLE_SIZE_8723D    41
25 #define	TXPWR_TRACK_TABLE_SIZE	30
26 #define	DELTA_SWINGIDX_SIZE     30
27 #define	DELTA_SWINTSSI_SIZE     61
28 #define	BAND_NUM				3
29 #define	MAX_RF_PATH	4
30 #define	CCK_TABLE_SIZE_88F	21
31 /* JJ ADD 20161014 */
32 #define	CCK_TABLE_SIZE_8710B   41
33 #define	CCK_TABLE_SIZE_8192F   41
34 
35 
36 #define	dm_check_txpowertracking	odm_txpowertracking_check
37 
38 #define IQK_MATRIX_SETTINGS_NUM	(14+24+21) /* Channels_2_4G_NUM + Channels_5G_20M_NUM + Channels_5G */
39 #define	AVG_THERMAL_NUM		8
40 #define	iqk_matrix_reg_num	8
41 #define	IQK_MAC_REG_NUM		4
42 #define	IQK_ADDA_REG_NUM		16
43 
44 #define	IQK_BB_REG_NUM		9
45 
46 
47 extern	u32 ofdm_swing_table[OFDM_TABLE_SIZE];
48 extern	u8 cck_swing_table_ch1_ch13[CCK_TABLE_SIZE][8];
49 extern	u8 cck_swing_table_ch14[CCK_TABLE_SIZE][8];
50 
51 extern	u32 ofdm_swing_table_new[OFDM_TABLE_SIZE];
52 extern	u8 cck_swing_table_ch1_ch13_new[CCK_TABLE_SIZE][8];
53 extern	u8 cck_swing_table_ch14_new[CCK_TABLE_SIZE][8];
54 extern	u8 cck_swing_table_ch1_ch14_88f[CCK_TABLE_SIZE_88F][16];
55 extern	u8 cck_swing_table_ch1_ch13_88f[CCK_TABLE_SIZE_88F][16];
56 extern	u8 cck_swing_table_ch14_88f[CCK_TABLE_SIZE_88F][16];
57 extern	u32 cck_swing_table_ch1_ch14_8723d[CCK_TABLE_SIZE_8723D];
58 /* JJ ADD 20161014 */
59 extern	u32 cck_swing_table_ch1_ch14_8710b[CCK_TABLE_SIZE_8710B];
60 extern	u32 cck_swing_table_ch1_ch14_8192f[CCK_TABLE_SIZE_8192F];
61 
62 extern  u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE];
63 
64 /* <20121018, Kordan> In case fail to read TxPowerTrack.txt, we use the table of 88E as the default table. */
65 static u8 delta_swing_table_idx_2ga_p_8188e[] = {0, 0, 0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 4,  4,  4,  4,  4,  4,  5,  5,  7,  7,  8,  8,  8,  9,  9,  9,  9,  9};
66 static u8 delta_swing_table_idx_2ga_n_8188e[] = {0, 0, 0, 2, 2, 3, 3, 4, 4, 4, 4, 5, 5,  6,  6,  7,  7,  7,  7,  8,  8,  9,  9, 10, 10, 10, 11, 11, 11, 11};
67 
68 void
69 odm_txpowertracking_check(
70 	void		*dm_void
71 );
72 
73 void
74 odm_txpowertracking_check_ap(
75 	void		*dm_void
76 );
77 
78 void
79 odm_txpowertracking_thermal_meter_init(
80 	void		*dm_void
81 );
82 
83 void
84 odm_txpowertracking_init(
85 	void		*dm_void
86 );
87 
88 void
89 odm_txpowertracking_check_mp(
90 	void		*dm_void
91 );
92 
93 
94 void
95 odm_txpowertracking_check_ce(
96 	void		*dm_void
97 );
98 
99 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
100 
101 
102 void
103 odm_txpowertracking_thermal_meter_check(
104 	void		*adapter
105 );
106 
107 #endif
108 
109 struct iqk_matrix_regs_setting {
110 	boolean	is_iqk_done;
111 	s32		value[3][iqk_matrix_reg_num];
112 	boolean	is_bw_iqk_result_saved[3];
113 };
114 
115 struct dm_rf_calibration_struct {
116 	/* for tx power tracking */
117 
118 	u32	rega24; /* for TempCCK */
119 	s32	rege94;
120 	s32	rege9c;
121 	s32	regeb4;
122 	s32	regebc;
123 	/* u8 is_txpowertracking; */
124 	u8	tx_powercount;
125 	boolean is_txpowertracking_init;
126 	boolean is_txpowertracking;
127 	u8  	txpowertrack_control; /* for mp mode, turn off txpwrtracking as default */
128 	u8	tm_trigger;
129 	u8  	internal_pa_5g[2];	/* pathA / pathB */
130 
131 	u8  	thermal_meter[2];    /* thermal_meter, index 0 for RFIC0, and 1 for RFIC1 */
132 	u8	thermal_value;
133 	u8	thermal_value_path[MAX_RF_PATH];
134 	u8	thermal_value_lck;
135 	u8	thermal_value_iqk;
136 	u8	thermal_value_dpk;
137 	s8	thermal_value_delta; /* delta of thermal_value and efuse thermal */
138 	u8	thermal_value_avg[AVG_THERMAL_NUM];
139 	u8	thermal_value_avg_path[MAX_RF_PATH][AVG_THERMAL_NUM];
140 	u8	thermal_value_avg_index;
141 	u8	thermal_value_avg_index_path[MAX_RF_PATH];
142 	u8	thermal_value_rx_gain;
143 
144 
145 	boolean	is_reloadtxpowerindex;
146 	u8	is_rf_pi_enable;
147 	u32 	txpowertracking_callback_cnt; /* cosa add for debug */
148 
149 
150 	/* ------------------------- Tx power Tracking ------------------------- */
151 	u8	is_cck_in_ch14;
152 	u8	CCK_index;
153 	u8	OFDM_index[MAX_RF_PATH];
154 	s8	power_index_offset[MAX_RF_PATH];
155 	s8	delta_power_index[MAX_RF_PATH];
156 	s8	delta_power_index_last[MAX_RF_PATH];
157 	boolean is_tx_power_changed;
158 	s8	xtal_offset;
159 	s8	xtal_offset_last;
160 
161 	struct iqk_matrix_regs_setting iqk_matrix_reg_setting[IQK_MATRIX_SETTINGS_NUM];
162 	u8	delta_lck;
163 	s8  bb_swing_diff_2g, bb_swing_diff_5g; /* Unit: dB */
164 	u8  delta_swing_table_idx_2g_cck_a_p[DELTA_SWINGIDX_SIZE];
165 	u8  delta_swing_table_idx_2g_cck_a_n[DELTA_SWINGIDX_SIZE];
166 	u8  delta_swing_table_idx_2g_cck_b_p[DELTA_SWINGIDX_SIZE];
167 	u8  delta_swing_table_idx_2g_cck_b_n[DELTA_SWINGIDX_SIZE];
168 	u8  delta_swing_table_idx_2g_cck_c_p[DELTA_SWINGIDX_SIZE];
169 	u8  delta_swing_table_idx_2g_cck_c_n[DELTA_SWINGIDX_SIZE];
170 	u8  delta_swing_table_idx_2g_cck_d_p[DELTA_SWINGIDX_SIZE];
171 	u8  delta_swing_table_idx_2g_cck_d_n[DELTA_SWINGIDX_SIZE];
172 	u8  delta_swing_table_idx_2ga_p[DELTA_SWINGIDX_SIZE];
173 	u8  delta_swing_table_idx_2ga_n[DELTA_SWINGIDX_SIZE];
174 	u8  delta_swing_table_idx_2gb_p[DELTA_SWINGIDX_SIZE];
175 	u8  delta_swing_table_idx_2gb_n[DELTA_SWINGIDX_SIZE];
176 	u8  delta_swing_table_idx_2gc_p[DELTA_SWINGIDX_SIZE];
177 	u8  delta_swing_table_idx_2gc_n[DELTA_SWINGIDX_SIZE];
178 	u8  delta_swing_table_idx_2gd_p[DELTA_SWINGIDX_SIZE];
179 	u8  delta_swing_table_idx_2gd_n[DELTA_SWINGIDX_SIZE];
180 	u8  delta_swing_table_idx_5ga_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
181 	u8  delta_swing_table_idx_5ga_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
182 	u8  delta_swing_table_idx_5gb_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
183 	u8  delta_swing_table_idx_5gb_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
184 	u8  delta_swing_table_idx_5gc_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
185 	u8  delta_swing_table_idx_5gc_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
186 	u8  delta_swing_table_idx_5gd_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
187 	u8  delta_swing_table_idx_5gd_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
188 	u8  delta_swing_tssi_table_2g_cck_a[DELTA_SWINTSSI_SIZE];
189 	u8  delta_swing_tssi_table_2g_cck_b[DELTA_SWINTSSI_SIZE];
190 	u8  delta_swing_tssi_table_2g_cck_c[DELTA_SWINTSSI_SIZE];
191 	u8  delta_swing_tssi_table_2g_cck_d[DELTA_SWINTSSI_SIZE];
192 	u8  delta_swing_tssi_table_2ga[DELTA_SWINTSSI_SIZE];
193 	u8  delta_swing_tssi_table_2gb[DELTA_SWINTSSI_SIZE];
194 	u8  delta_swing_tssi_table_2gc[DELTA_SWINTSSI_SIZE];
195 	u8  delta_swing_tssi_table_2gd[DELTA_SWINTSSI_SIZE];
196 	u8  delta_swing_tssi_table_5ga[BAND_NUM][DELTA_SWINTSSI_SIZE];
197 	u8  delta_swing_tssi_table_5gb[BAND_NUM][DELTA_SWINTSSI_SIZE];
198 	u8  delta_swing_tssi_table_5gc[BAND_NUM][DELTA_SWINTSSI_SIZE];
199 	u8  delta_swing_tssi_table_5gd[BAND_NUM][DELTA_SWINTSSI_SIZE];
200 	s8  delta_swing_table_xtal_p[DELTA_SWINGIDX_SIZE];
201 	s8  delta_swing_table_xtal_n[DELTA_SWINGIDX_SIZE];
202 	u8  delta_swing_table_idx_2ga_p_8188e[DELTA_SWINGIDX_SIZE];
203 	u8  delta_swing_table_idx_2ga_n_8188e[DELTA_SWINGIDX_SIZE];
204 
205 	u8			bb_swing_idx_ofdm[MAX_RF_PATH];
206 	u8			bb_swing_idx_ofdm_current;
207 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
208 	u8			bb_swing_idx_ofdm_base[MAX_RF_PATH];
209 #else
210 	u8			bb_swing_idx_ofdm_base;
211 #endif
212 	boolean		default_bb_swing_index_flag;
213 	boolean			bb_swing_flag_ofdm;
214 	u8			bb_swing_idx_cck;
215 	u8			bb_swing_idx_cck_current;
216 	u8			bb_swing_idx_cck_base;
217 	u8			default_ofdm_index;
218 	u8			default_cck_index;
219 	s8			default_txagc_index;
220 	boolean			bb_swing_flag_cck;
221 
222 	s8			absolute_ofdm_swing_idx[MAX_RF_PATH];
223 	s8			remnant_ofdm_swing_idx[MAX_RF_PATH];
224 	s8			absolute_cck_swing_idx[MAX_RF_PATH];
225 	s8			remnant_cck_swing_idx;
226 	s8			modify_tx_agc_value;       /*Remnat compensate value at tx_agc */
227 	boolean			modify_tx_agc_flag_path_a;
228 	boolean			modify_tx_agc_flag_path_b;
229 	boolean			modify_tx_agc_flag_path_c;
230 	boolean			modify_tx_agc_flag_path_d;
231 	boolean			modify_tx_agc_flag_path_a_cck;
232 	boolean			modify_tx_agc_flag_path_b_cck;
233 
234 	s8			kfree_offset[MAX_RF_PATH];
235 
236 	/* -------------------------------------------------------------------- */
237 
238 	/* for IQK */
239 	u32	regc04;
240 	u32	reg874;
241 	u32	regc08;
242 	u32	regb68;
243 	u32	regb6c;
244 	u32	reg870;
245 	u32	reg860;
246 	u32	reg864;
247 
248 	boolean	is_iqk_initialized;
249 	boolean is_lck_in_progress;
250 	boolean	is_antenna_detected;
251 	boolean	is_need_iqk;
252 	boolean	is_iqk_in_progress;
253 	boolean	is_iqk_pa_off;
254 	u8	delta_iqk;
255 	u32	ADDA_backup[IQK_ADDA_REG_NUM];
256 	u32	IQK_MAC_backup[IQK_MAC_REG_NUM];
257 	u32	IQK_BB_backup_recover[9];
258 	u32	IQK_BB_backup[IQK_BB_REG_NUM];
259 	u32	tx_iqc_8723b[2][3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}} */
260 	u32	rx_iqc_8723b[2][2][2]; /* { {S1: 0xc14, 0xca0} ,           {S0: 0xc14, 0xca0}} */
261 	u32	tx_iqc_8703b[3][2];	/* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}}*/
262 	u32	rx_iqc_8703b[2][2];	/* { {S1: 0xc14, 0xca0} ,           {S0: 0xc14, 0xca0}}*/
263 	u32	tx_iqc_8723d[2][3][2];	/* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}}*/
264 	u32	rx_iqc_8723d[2][2][2];	/* { {S1: 0xc14, 0xca0} ,           {S0: 0xc14, 0xca0}}*/
265 	/* JJ ADD 20161014 */
266 	u32	tx_iqc_8710b[2][3][2];	/* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}}*/
267 	u32	rx_iqc_8710b[2][2][2];	/* { {S1: 0xc14, 0xca0} ,           {S0: 0xc14, 0xca0}}*/
268 
269 	u64	iqk_start_time;
270 	u64	iqk_total_progressing_time;
271 	u64	iqk_progressing_time;
272 	u64	lck_progressing_time;
273 	u32  lok_result;
274 	u8	iqk_step;
275 	u8	kcount;
276 	u8	retry_count[4][2]; /* [4]: path ABCD, [2] TXK, RXK */
277 	boolean	is_mp_mode;
278 
279 	/* for APK */
280 	u32 	ap_koutput[2][2]; /* path A/B; output1_1a/output1_2a */
281 	u8	is_ap_kdone;
282 	u8	is_apk_thermal_meter_ignore;
283 
284 	/* DPK */
285 	boolean is_dpk_fail;
286 	u8	is_dp_done;
287 	u8	is_dp_path_aok;
288 	u8	is_dp_path_bok;
289 
290 	u32	tx_lok[2];
291 	u32  dpk_tx_agc;
292 	s32  dpk_gain;
293 	u32  dpk_thermal[4];
294 
295 	s8 modify_tx_agc_value_ofdm;
296 	s8 modify_tx_agc_value_cck;
297 
298 	/*Add by Yuchen for Kfree Phydm*/
299 	u8			reg_rf_kfree_enable;	/*for registry*/
300 	u8			rf_kfree_enable;		/*for efuse enable check*/
301 };
302 
303 
304 
305 
306 #endif	/*#ifndef __HALRF_POWER_TRACKING_H__*/
307