1 /****************************************************************************** 2 * 3 * Copyright(c) 2007 - 2017 Realtek Corporation. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * The full GNU General Public License is included in this distribution in the 15 * file called LICENSE. 16 * 17 * Contact Information: 18 * wlanfae <wlanfae@realtek.com> 19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, 20 * Hsinchu 300, Taiwan. 21 * 22 * Larry Finger <Larry.Finger@lwfinger.net> 23 * 24 *****************************************************************************/ 25 26 #ifndef __HALRF_IQK_H__ 27 #define __HALRF_IQK_H__ 28 29 /*@--------------------------Define Parameters-------------------------------*/ 30 #define LOK_delay 1 31 #define WBIQK_delay 10 32 #define TX_IQK 0 33 #define RX_IQK 1 34 #define TXIQK 0 35 #define RXIQK1 1 36 #define RXIQK2 2 37 #define kcount_limit_80m 2 38 #define kcount_limit_others 4 39 #define rxiqk_gs_limit 6 40 #define TXWBIQK_EN 1 41 #define RXWBIQK_EN 1 42 #if (RTL8814A_SUPPORT == 1 || RTL8198F_SUPPORT == 1 ||\ 43 RTL8814B_SUPPORT) 44 #define NUM 4 45 #elif (RTL8822B_SUPPORT == 1 || RTL8822C_SUPPORT == 1 ||\ 46 RTL8812F_SUPPORT == 1 || RTL8197G_SUPPORT == 1 ||\ 47 RTL8723F_SUPPORT == 1) 48 #define NUM 2 49 #else 50 #define NUM 1 51 #endif 52 53 /*@-----------------------End Define Parameters-----------------------*/ 54 55 struct dm_dack_info { 56 boolean dack_en; 57 u16 msbk_d[2][2][15]; 58 u8 dck_d[2][2][2]; 59 u16 biask_d[2][2]; 60 }; 61 62 struct dm_iqk_info { 63 boolean lok_fail[NUM]; 64 boolean iqk_fail[2][NUM]; 65 u32 iqc_matrix[2][NUM]; 66 u8 iqk_times; 67 u32 rf_reg18; 68 u32 rf_reg08; 69 u32 lna_idx; 70 u8 iqk_step; 71 u8 rxiqk_step; 72 u8 tmp1bcc; 73 u8 txgain; 74 u32 txgain56; 75 u8 kcount; 76 u8 rfk_ing; /*bit0:IQKing, bit1:LCKing, bit2:DPKing*/ 77 boolean rfk_forbidden; 78 u8 rxbb; 79 u32 rf_reg58; 80 boolean segment_iqk; 81 boolean is_tssi_mode; 82 u8 iqk_band; 83 u8 iqk_ch; 84 u8 iqk_bw; 85 #if (RTL8814A_SUPPORT == 1 || RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1 ||\ 86 RTL8195B_SUPPORT == 1 || RTL8198F_SUPPORT == 1 ||\ 87 RTL8814B_SUPPORT == 1 || RTL8822C_SUPPORT == 1 ||\ 88 RTL8812F_SUPPORT == 1 || RTL8197G_SUPPORT == 1 ||\ 89 RTL8710C_SUPPORT == 1 || RTL8723F_SUPPORT == 1) 90 u32 iqk_channel[2]; 91 boolean iqk_fail_report[2][NUM][2]; /*channel/path/TRX(TX:0, RX:1) */ 92 /*channel / path / TRX(TX:0, RX:1) / CFIR_real*/ 93 /*channel index = 2 is just for debug*/ 94 #if (RTL8814B_SUPPORT == 1) 95 u16 iqk_cfir_real[3][NUM][2][19]; 96 u16 iqk_cfir_imag[3][NUM][2][19]; 97 #elif (RTL8812F_SUPPORT == 1 || RTL8822C_SUPPORT == 1 ) 98 u16 iqk_cfir_real[3][2][2][17]; 99 /*channel / path / TRX(TX:0, RX:1) / CFIR_imag*/ 100 /*channel index = 2 is just for debug*/ 101 u16 iqk_cfir_imag[3][2][2][17]; 102 /*times/path*/ 103 #elif (RTL8195B_SUPPORT == 1) 104 u32 iqk_cfir_real[3][NUM][2][9]; 105 u32 iqk_cfir_imag[3][NUM][2][9]; 106 /*channel / path / TRX(TX:0, RX:1) / CFIR_imag*/ 107 /*channel index = 2 is just for debug*/ 108 #else 109 u32 iqk_cfir_real[3][NUM][2][8]; 110 /*channel / path / TRX(TX:0, RX:1) / CFIR_imag*/ 111 /*channel index = 2 is just for debug*/ 112 u32 iqk_cfir_imag[3][NUM][2][8]; 113 #endif 114 115 #if (RTL8812F_SUPPORT == 1 || RTL8822C_SUPPORT == 1 ) 116 u32 rx_cfir_real[2][2][17]; 117 u32 rx_cfir_imag[2][2][17]; 118 u32 rx_cfir[2][2]; 119 #endif 120 u8 retry_count[2][NUM][3]; /* channel / path / (TXK:0, RXK1:1, RXK2:2) */ 121 u8 gs_retry_count[2][NUM][2]; /* channel / path / (GSRXK1:0, GSRXK2:1) */ 122 /* channel / path 0:SRXK1 fail, 1:RXK1 fail 2:RXK2 fail */ 123 u8 rxiqk_fail_code[2][NUM]; 124 u32 lok_idac[2][NUM]; /*channel / path*/ 125 u16 rxiqk_agc[2][NUM]; /*channel / path*/ 126 u32 bypass_iqk[2][NUM]; /*channel / 0xc94/0xe94*/ 127 u32 txgap_result[8]; /*txagpK result */ 128 u32 tmp_gntwl; 129 boolean is_btg; 130 boolean isbnd; 131 boolean is_reload; 132 boolean is_hwtx; 133 boolean xym_read; 134 boolean trximr_enable; 135 #if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1 ||\ 136 RTL8814B_SUPPORT == 1 || RTL8822C_SUPPORT == 1) 137 u32 rx_xym[2][10]; 138 u32 tx_xym[2][10]; 139 u32 gs1_xym[2][6]; 140 u32 gs2_xym[2][6]; 141 u32 rxk1_xym[2][6]; 142 u32 nbtxk_1b38[2]; 143 u32 nbrxk_1b3c[2]; 144 #endif 145 #if (RTL8710C_SUPPORT == 1 || RTL8197G_SUPPORT == 1 ) 146 u32 txxy[2][2]; 147 u32 rxxy[2][2]; 148 #endif 149 #if (RTL8723F_SUPPORT == 1) 150 u32 txxy[2][2]; 151 u32 rxxy[2][2][2]; 152 #endif 153 154 #endif 155 }; 156 157 #endif /*__HALRF_IQK_H__*/ 158