1*4882a593Smuzhiyun /****************************************************************************** 2*4882a593Smuzhiyun * 3*4882a593Smuzhiyun * Copyright(c) 2007 - 2017 Realtek Corporation. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify it 6*4882a593Smuzhiyun * under the terms of version 2 of the GNU General Public License as 7*4882a593Smuzhiyun * published by the Free Software Foundation. 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * This program is distributed in the hope that it will be useful, but WITHOUT 10*4882a593Smuzhiyun * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11*4882a593Smuzhiyun * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12*4882a593Smuzhiyun * more details. 13*4882a593Smuzhiyun * 14*4882a593Smuzhiyun *****************************************************************************/ 15*4882a593Smuzhiyun #ifndef __RTL8192F_CMD_H__ 16*4882a593Smuzhiyun #define __RTL8192F_CMD_H__ 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun /* --------------------------------------------------------------------------------------------------------- 19*4882a593Smuzhiyun * ---------------------------------- H2C CMD DEFINITION ------------------------------------------------ 20*4882a593Smuzhiyun * --------------------------------------------------------------------------------------------------------- */ 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun enum h2c_cmd_8192F { 23*4882a593Smuzhiyun /* Common Class: 000 */ 24*4882a593Smuzhiyun H2C_8192F_RSVD_PAGE = 0x00, 25*4882a593Smuzhiyun H2C_8192F_MEDIA_STATUS_RPT = 0x01, 26*4882a593Smuzhiyun H2C_8192F_SCAN_ENABLE = 0x02, 27*4882a593Smuzhiyun H2C_8192F_KEEP_ALIVE = 0x03, 28*4882a593Smuzhiyun H2C_8192F_DISCON_DECISION = 0x04, 29*4882a593Smuzhiyun H2C_8192F_PSD_OFFLOAD = 0x05, 30*4882a593Smuzhiyun H2C_8192F_AP_OFFLOAD = 0x08, 31*4882a593Smuzhiyun H2C_8192F_BCN_RSVDPAGE = 0x09, 32*4882a593Smuzhiyun H2C_8192F_PROBERSP_RSVDPAGE = 0x0A, 33*4882a593Smuzhiyun H2C_8192F_FCS_RSVDPAGE = 0x10, 34*4882a593Smuzhiyun H2C_8192F_FCS_INFO = 0x11, 35*4882a593Smuzhiyun H2C_8192F_AP_WOW_GPIO_CTRL = 0x13, 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun /* PoweSave Class: 001 */ 38*4882a593Smuzhiyun H2C_8192F_SET_PWR_MODE = 0x20, 39*4882a593Smuzhiyun H2C_8192F_PS_TUNING_PARA = 0x21, 40*4882a593Smuzhiyun H2C_8192F_PS_TUNING_PARA2 = 0x22, 41*4882a593Smuzhiyun H2C_8192F_P2P_LPS_PARAM = 0x23, 42*4882a593Smuzhiyun H2C_8192F_P2P_PS_OFFLOAD = 0x24, 43*4882a593Smuzhiyun H2C_8192F_PS_SCAN_ENABLE = 0x25, 44*4882a593Smuzhiyun H2C_8192F_SAP_PS_ = 0x26, 45*4882a593Smuzhiyun H2C_8192F_INACTIVE_PS_ = 0x27,/* Inactive_PS */ 46*4882a593Smuzhiyun H2C_8192F_FWLPS_IN_IPS_ = 0x28, 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun /* Dynamic Mechanism Class: 010 */ 49*4882a593Smuzhiyun H2C_8192F_MACID_CFG = 0x40, 50*4882a593Smuzhiyun H2C_8192F_TXBF = 0x41, 51*4882a593Smuzhiyun H2C_8192F_RSSI_SETTING = 0x42, 52*4882a593Smuzhiyun H2C_8192F_AP_REQ_TXRPT = 0x43, 53*4882a593Smuzhiyun H2C_8192F_INIT_RATE_COLLECT = 0x44, 54*4882a593Smuzhiyun H2C_8192F_RA_PARA_ADJUST = 0x46, 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun /* BT Class: 011 */ 57*4882a593Smuzhiyun H2C_8192F_B_TYPE_TDMA = 0x60, 58*4882a593Smuzhiyun H2C_8192F_BT_INFO = 0x61, 59*4882a593Smuzhiyun H2C_8192F_FORCE_BT_TXPWR = 0x62, 60*4882a593Smuzhiyun H2C_8192F_BT_IGNORE_WLANACT = 0x63, 61*4882a593Smuzhiyun H2C_8192F_DAC_SWING_VALUE = 0x64, 62*4882a593Smuzhiyun H2C_8192F_ANT_SEL_RSV = 0x65, 63*4882a593Smuzhiyun H2C_8192F_WL_OPMODE = 0x66, 64*4882a593Smuzhiyun H2C_8192F_BT_MP_OPER = 0x67, 65*4882a593Smuzhiyun H2C_8192F_BT_CONTROL = 0x68, 66*4882a593Smuzhiyun H2C_8192F_BT_WIFI_CTRL = 0x69, 67*4882a593Smuzhiyun H2C_8192F_BT_FW_PATCH = 0x6A, 68*4882a593Smuzhiyun H2C_8192F_BT_WLAN_CALIBRATION = 0x6D, 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun /* WOWLAN Class: 100 */ 71*4882a593Smuzhiyun H2C_8192F_WOWLAN = 0x80, 72*4882a593Smuzhiyun H2C_8192F_REMOTE_WAKE_CTRL = 0x81, 73*4882a593Smuzhiyun H2C_8192F_AOAC_GLOBAL_INFO = 0x82, 74*4882a593Smuzhiyun H2C_8192F_AOAC_RSVD_PAGE = 0x83, 75*4882a593Smuzhiyun H2C_8192F_AOAC_RSVD_PAGE2 = 0x84, 76*4882a593Smuzhiyun H2C_8192F_D0_SCAN_OFFLOAD_CTRL = 0x85, 77*4882a593Smuzhiyun H2C_8192F_D0_SCAN_OFFLOAD_INFO = 0x86, 78*4882a593Smuzhiyun H2C_8192F_CHNL_SWITCH_OFFLOAD = 0x87, 79*4882a593Smuzhiyun H2C_8192F_P2P_OFFLOAD_RSVD_PAGE = 0x8A, 80*4882a593Smuzhiyun H2C_8192F_P2P_OFFLOAD = 0x8B, 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun H2C_8192F_RESET_TSF = 0xC0, 83*4882a593Smuzhiyun H2C_8192F_MAXID, 84*4882a593Smuzhiyun }; 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun /* --------------------------------------------------------------------------------------------------------- 87*4882a593Smuzhiyun * ---------------------------------- H2C CMD CONTENT -------------------------------------------------- 88*4882a593Smuzhiyun * --------------------------------------------------------------------------------------------------------- 89*4882a593Smuzhiyun * _RSVDPAGE_LOC_CMD_0x00 */ 90*4882a593Smuzhiyun #define SET_8192F_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) 91*4882a593Smuzhiyun #define SET_8192F_H2CCMD_RSVDPAGE_LOC_PSPOLL(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) 92*4882a593Smuzhiyun #define SET_8192F_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) 93*4882a593Smuzhiyun #define SET_8192F_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) 94*4882a593Smuzhiyun #define SET_8192F_H2CCMD_RSVDPAGE_LOC_BT_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun /*_MEDIA_STATUS_RPT_PARM_CMD_0x01*/ 97*4882a593Smuzhiyun #define SET_8192F_H2CCMD_MSRRPT_PARM_OPMODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) 98*4882a593Smuzhiyun #define SET_8192F_H2CCMD_MSRRPT_PARM_MACID_IND(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) 99*4882a593Smuzhiyun #define SET_8192F_H2CCMD_MSRRPT_PARM_MACID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) 100*4882a593Smuzhiyun #define SET_8192F_H2CCMD_MSRRPT_PARM_MACID_END(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 8, __Value) 101*4882a593Smuzhiyun /* _PWR_MOD_CMD_0x20 */ 102*4882a593Smuzhiyun #define SET_8192F_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) 103*4882a593Smuzhiyun #define SET_8192F_H2CCMD_PWRMODE_PARM_RLBM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 4, __Value) 104*4882a593Smuzhiyun #define SET_8192F_H2CCMD_PWRMODE_PARM_SMART_PS(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 4, 4, __Value) 105*4882a593Smuzhiyun #define SET_8192F_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) 106*4882a593Smuzhiyun #define SET_8192F_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) 107*4882a593Smuzhiyun #define SET_8192F_H2CCMD_PWRMODE_PARM_BCN_EARLY_C2H_RPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 2, 1, __Value) 108*4882a593Smuzhiyun #define SET_8192F_H2CCMD_PWRMODE_PARM_PWR_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) 109*4882a593Smuzhiyun 110*4882a593Smuzhiyun #define GET_8192F_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd) LE_BITS_TO_1BYTE(__pH2CCmd, 0, 8) 111*4882a593Smuzhiyun 112*4882a593Smuzhiyun /* _PS_TUNE_PARAM_CMD_0x21 */ 113*4882a593Smuzhiyun #define SET_8192F_H2CCMD_PSTUNE_PARM_BCN_TO_LIMIT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) 114*4882a593Smuzhiyun #define SET_8192F_H2CCMD_PSTUNE_PARM_DTIM_TIMEOUT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) 115*4882a593Smuzhiyun #define SET_8192F_H2CCMD_PSTUNE_PARM_ADOPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 1, __Value) 116*4882a593Smuzhiyun #define SET_8192F_H2CCMD_PSTUNE_PARM_PS_TIMEOUT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 1, 7, __Value) 117*4882a593Smuzhiyun #define SET_8192F_H2CCMD_PSTUNE_PARM_DTIM_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) 118*4882a593Smuzhiyun 119*4882a593Smuzhiyun /* _MACID_CFG_CMD_0x40 */ 120*4882a593Smuzhiyun #define SET_8192F_H2CCMD_MACID_CFG_MACID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) 121*4882a593Smuzhiyun #define SET_8192F_H2CCMD_MACID_CFG_RAID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 5, __Value) 122*4882a593Smuzhiyun #define SET_8192F_H2CCMD_MACID_CFG_SGI_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 7, 1, __Value) 123*4882a593Smuzhiyun #define SET_8192F_H2CCMD_MACID_CFG_BW(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 2, __Value) 124*4882a593Smuzhiyun #define SET_8192F_H2CCMD_MACID_CFG_NO_UPDATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 3, 1, __Value) 125*4882a593Smuzhiyun #define SET_8192F_H2CCMD_MACID_CFG_VHT_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 4, 2, __Value) 126*4882a593Smuzhiyun #define SET_8192F_H2CCMD_MACID_CFG_DISPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 6, 1, __Value) 127*4882a593Smuzhiyun #define SET_8192F_H2CCMD_MACID_CFG_DISRA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 7, 1, __Value) 128*4882a593Smuzhiyun #define SET_8192F_H2CCMD_MACID_CFG_RATE_MASK0(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) 129*4882a593Smuzhiyun #define SET_8192F_H2CCMD_MACID_CFG_RATE_MASK1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+4, 0, 8, __Value) 130*4882a593Smuzhiyun #define SET_8192F_H2CCMD_MACID_CFG_RATE_MASK2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+5, 0, 8, __Value) 131*4882a593Smuzhiyun #define SET_8192F_H2CCMD_MACID_CFG_RATE_MASK3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+6, 0, 8, __Value) 132*4882a593Smuzhiyun 133*4882a593Smuzhiyun /* _RSSI_SETTING_CMD_0x42 */ 134*4882a593Smuzhiyun #define SET_8192F_H2CCMD_RSSI_SETTING_MACID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) 135*4882a593Smuzhiyun #define SET_8192F_H2CCMD_RSSI_SETTING_RSSI(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 7, __Value) 136*4882a593Smuzhiyun #define SET_8192F_H2CCMD_RSSI_SETTING_ULDL_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) 137*4882a593Smuzhiyun 138*4882a593Smuzhiyun /* _AP_REQ_TXRPT_CMD_0x43 */ 139*4882a593Smuzhiyun #define SET_8192F_H2CCMD_APREQRPT_PARM_MACID1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) 140*4882a593Smuzhiyun #define SET_8192F_H2CCMD_APREQRPT_PARM_MACID2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) 141*4882a593Smuzhiyun 142*4882a593Smuzhiyun /* _FORCE_BT_TXPWR_CMD_0x62 */ 143*4882a593Smuzhiyun #define SET_8192F_H2CCMD_BT_PWR_IDX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) 144*4882a593Smuzhiyun 145*4882a593Smuzhiyun /* _FORCE_BT_MP_OPER_CMD_0x67 */ 146*4882a593Smuzhiyun #define SET_8192F_H2CCMD_BT_MPOPER_VER(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 4, __Value) 147*4882a593Smuzhiyun #define SET_8192F_H2CCMD_BT_MPOPER_REQNUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 4, __Value) 148*4882a593Smuzhiyun #define SET_8192F_H2CCMD_BT_MPOPER_IDX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) 149*4882a593Smuzhiyun #define SET_8192F_H2CCMD_BT_MPOPER_PARAM1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 8, __Value) 150*4882a593Smuzhiyun #define SET_8192F_H2CCMD_BT_MPOPER_PARAM2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) 151*4882a593Smuzhiyun #define SET_8192F_H2CCMD_BT_MPOPER_PARAM3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+4, 0, 8, __Value) 152*4882a593Smuzhiyun 153*4882a593Smuzhiyun /* _BT_FW_PATCH_0x6A */ 154*4882a593Smuzhiyun #define SET_8192F_H2CCMD_BT_FW_PATCH_SIZE(__pH2CCmd, __Value) SET_BITS_TO_LE_2BYTE((u8 *)(__pH2CCmd), 0, 16, __Value) 155*4882a593Smuzhiyun #define SET_8192F_H2CCMD_BT_FW_PATCH_ADDR0(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) 156*4882a593Smuzhiyun #define SET_8192F_H2CCMD_BT_FW_PATCH_ADDR1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) 157*4882a593Smuzhiyun #define SET_8192F_H2CCMD_BT_FW_PATCH_ADDR2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) 158*4882a593Smuzhiyun #define SET_8192F_H2CCMD_BT_FW_PATCH_ADDR3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 8, __Value) 159*4882a593Smuzhiyun 160*4882a593Smuzhiyun /* --------------------------------------------------------------------------------------------------------- 161*4882a593Smuzhiyun * ------------------------------------------- Structure -------------------------------------------------- 162*4882a593Smuzhiyun * --------------------------------------------------------------------------------------------------------- */ 163*4882a593Smuzhiyun 164*4882a593Smuzhiyun 165*4882a593Smuzhiyun /* --------------------------------------------------------------------------------------------------------- 166*4882a593Smuzhiyun * ---------------------------------- Function Statement -------------------------------------------------- 167*4882a593Smuzhiyun * --------------------------------------------------------------------------------------------------------- */ 168*4882a593Smuzhiyun 169*4882a593Smuzhiyun /* host message to firmware cmd */ 170*4882a593Smuzhiyun void rtl8192f_set_FwPwrMode_cmd(PADAPTER padapter, u8 Mode); 171*4882a593Smuzhiyun void rtl8192f_set_FwJoinBssRpt_cmd(PADAPTER padapter, u8 mstatus); 172*4882a593Smuzhiyun /* s32 rtl8192f__set_lowpwr_lps_cmd(PADAPTER padapter, u8 enable); */ 173*4882a593Smuzhiyun void rtl8192f_set_FwPsTuneParam_cmd(PADAPTER padapter); 174*4882a593Smuzhiyun void rtl8192f_download_rsvd_page(PADAPTER padapter, u8 mstatus); 175*4882a593Smuzhiyun #ifdef CONFIG_BT_COEXIST 176*4882a593Smuzhiyun void rtl8192f_download_BTCoex_AP_mode_rsvd_page(PADAPTER padapter); 177*4882a593Smuzhiyun #endif /* CONFIG_BT_COEXIST */ 178*4882a593Smuzhiyun #ifdef CONFIG_P2P 179*4882a593Smuzhiyun void rtl8192f_set_p2p_ps_offload_cmd(PADAPTER padapter, u8 p2p_ps_state); 180*4882a593Smuzhiyun #endif /* CONFIG_P2P */ 181*4882a593Smuzhiyun 182*4882a593Smuzhiyun #ifdef CONFIG_TDLS 183*4882a593Smuzhiyun #ifdef CONFIG_TDLS_CH_SW 184*4882a593Smuzhiyun void rtl8192f_set_BcnEarly_C2H_Rpt_cmd(PADAPTER padapter, u8 enable); 185*4882a593Smuzhiyun #endif 186*4882a593Smuzhiyun #endif 187*4882a593Smuzhiyun 188*4882a593Smuzhiyun #ifdef CONFIG_P2P_WOWLAN 189*4882a593Smuzhiyun void rtl8192f_set_p2p_wowlan_offload_cmd(PADAPTER padapter); 190*4882a593Smuzhiyun #endif 191*4882a593Smuzhiyun 192*4882a593Smuzhiyun s32 FillH2CCmd8192F(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer); 193*4882a593Smuzhiyun u8 GetTxBufferRsvdPageNum8192F(_adapter *padapter, bool wowlan); 194*4882a593Smuzhiyun #endif 195