1 /******************************************************************************
2 *
3 * Copyright(c) 2007 - 2017 Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * The full GNU General Public License is included in this distribution in the
15 * file called LICENSE.
16 *
17 * Contact Information:
18 * wlanfae <wlanfae@realtek.com>
19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20 * Hsinchu 300, Taiwan.
21 *
22 * Larry Finger <Larry.Finger@lwfinger.net>
23 *
24 *****************************************************************************/
25
26 /*@************************************************************
27 * include files
28 ************************************************************/
29
30 #include "mp_precomp.h"
31 #include "phydm_precomp.h"
32
phydm_init_debug_setting(struct dm_struct * dm)33 void phydm_init_debug_setting(struct dm_struct *dm)
34 {
35 dm->fw_debug_components = 0;
36 dm->debug_components =
37
38 #if DBG
39 /*@BB Functions*/
40 /*@DBG_DIG |*/
41 /*@DBG_RA_MASK |*/
42 /*@DBG_DYN_TXPWR |*/
43 /*@DBG_FA_CNT |*/
44 /*@DBG_RSSI_MNTR |*/
45 /*@DBG_CCKPD |*/
46 /*@DBG_ANT_DIV |*/
47 /*@DBG_SMT_ANT |*/
48 /*@DBG_PWR_TRAIN |*/
49 /*@DBG_RA |*/
50 /*@DBG_PATH_DIV |*/
51 /*@DBG_DFS |*/
52 /*@DBG_DYN_ARFR |*/
53 /*@DBG_ADPTVTY |*/
54 /*@DBG_CFO_TRK |*/
55 /*@DBG_ENV_MNTR |*/
56 /*@DBG_PRI_CCA |*/
57 /*@DBG_ADPTV_SOML |*/
58 /*@DBG_LNA_SAT_CHK |*/
59 /*@DBG_PHY_STATUS |*/
60 /*@DBG_TMP |*/
61 /*@DBG_FW_TRACE |*/
62 /*@DBG_TXBF |*/
63 /*@DBG_COMMON_FLOW |*/
64 /*@ODM_PHY_CONFIG |*/
65 /*@ODM_COMP_INIT |*/
66 /*@DBG_CMN |*/
67 /*@ODM_COMP_API |*/
68 #endif
69 0;
70
71 dm->fw_buff_is_enpty = true;
72 dm->pre_c2h_seq = 0;
73 dm->c2h_cmd_start = 0;
74 dm->cmn_dbg_msg_cnt = PHYDM_WATCH_DOG_PERIOD;
75 dm->cmn_dbg_msg_period = PHYDM_WATCH_DOG_PERIOD;
76 phydm_reset_rx_rate_distribution(dm);
77 }
78
phydm_bb_dbg_port_header_sel(void * dm_void,u32 header_idx)79 void phydm_bb_dbg_port_header_sel(void *dm_void, u32 header_idx)
80 {
81 struct dm_struct *dm = (struct dm_struct *)dm_void;
82
83 if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
84 odm_set_bb_reg(dm, R_0x8f8, 0x3c00000, header_idx);
85
86 /*@
87 * header_idx:
88 * (0:) '{ofdm_dbg[31:0]}'
89 * (1:) '{cca,crc32_fail,dbg_ofdm[29:0]}'
90 * (2:) '{vbon,crc32_fail,dbg_ofdm[29:0]}'
91 * (3:) '{cca,crc32_ok,dbg_ofdm[29:0]}'
92 * (4:) '{vbon,crc32_ok,dbg_ofdm[29:0]}'
93 * (5:) '{dbg_iqk_anta}'
94 * (6:) '{cca,ofdm_crc_ok,dbg_dp_anta[29:0]}'
95 * (7:) '{dbg_iqk_antb}'
96 * (8:) '{DBGOUT_RFC_b[31:0]}'
97 * (9:) '{DBGOUT_RFC_a[31:0]}'
98 * (a:) '{dbg_ofdm}'
99 * (b:) '{dbg_cck}'
100 */
101 }
102 }
103
phydm_bb_dbg_port_clock_en(void * dm_void,u8 enable)104 void phydm_bb_dbg_port_clock_en(void *dm_void, u8 enable)
105 {
106 struct dm_struct *dm = (struct dm_struct *)dm_void;
107 u32 reg_value = 0;
108
109 if (dm->support_ic_type & ODM_IC_11AC_2_SERIES) {
110 /*@enable/disable debug port clock, for power saving*/
111 reg_value = enable ? 0x7 : 0;
112 odm_set_bb_reg(dm, R_0x198c, 0x7, reg_value);
113 }
114 }
115
phydm_get_bb_dbg_port_idx(void * dm_void)116 u32 phydm_get_bb_dbg_port_idx(void *dm_void)
117 {
118 struct dm_struct *dm = (struct dm_struct *)dm_void;
119 u32 val = 0;
120
121 if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
122 phydm_bb_dbg_port_clock_en(dm, true);
123 val = odm_get_bb_reg(dm, R_0x8fc, MASKDWORD);
124 } else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
125 val = odm_get_bb_reg(dm, R_0x1c3c, 0xfff00);
126 } else { /*@if (dm->support_ic_type & ODM_IC_11N_SERIES)*/
127 val = odm_get_bb_reg(dm, R_0x908, MASKDWORD);
128 }
129 return val;
130 }
131
phydm_set_bb_dbg_port(void * dm_void,u8 curr_dbg_priority,u32 debug_port)132 u8 phydm_set_bb_dbg_port(void *dm_void, u8 curr_dbg_priority, u32 debug_port)
133 {
134 struct dm_struct *dm = (struct dm_struct *)dm_void;
135 u8 dbg_port_result = false;
136
137 if (curr_dbg_priority > dm->pre_dbg_priority) {
138 if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
139 phydm_bb_dbg_port_clock_en(dm, true);
140
141 odm_set_bb_reg(dm, R_0x8fc, MASKDWORD, debug_port);
142 } else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
143 odm_set_bb_reg(dm, R_0x1c3c, 0xfff00, debug_port);
144
145 } else { /*@if (dm->support_ic_type & ODM_IC_11N_SERIES)*/
146 odm_set_bb_reg(dm, R_0x908, MASKDWORD, debug_port);
147 }
148 PHYDM_DBG(dm, ODM_COMP_API,
149 "DbgPort ((0x%x)) set success, Cur_priority=((%d)), Pre_priority=((%d))\n",
150 debug_port, curr_dbg_priority, dm->pre_dbg_priority);
151 dm->pre_dbg_priority = curr_dbg_priority;
152 dbg_port_result = true;
153 }
154
155 return dbg_port_result;
156 }
157
phydm_release_bb_dbg_port(void * dm_void)158 void phydm_release_bb_dbg_port(void *dm_void)
159 {
160 struct dm_struct *dm = (struct dm_struct *)dm_void;
161
162 phydm_bb_dbg_port_clock_en(dm, false);
163 phydm_bb_dbg_port_header_sel(dm, 0);
164
165 dm->pre_dbg_priority = DBGPORT_RELEASE;
166 PHYDM_DBG(dm, ODM_COMP_API, "Release BB dbg_port\n");
167 }
168
phydm_get_bb_dbg_port_val(void * dm_void)169 u32 phydm_get_bb_dbg_port_val(void *dm_void)
170 {
171 struct dm_struct *dm = (struct dm_struct *)dm_void;
172 u32 dbg_port_value = 0;
173
174 if (dm->support_ic_type & ODM_IC_11AC_SERIES)
175 dbg_port_value = odm_get_bb_reg(dm, R_0xfa0, MASKDWORD);
176 else if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
177 dbg_port_value = odm_get_bb_reg(dm, R_0x2dbc, MASKDWORD);
178 else /*@if (dm->support_ic_type & ODM_IC_11N_SERIES)*/
179 dbg_port_value = odm_get_bb_reg(dm, R_0xdf4, MASKDWORD);
180
181 PHYDM_DBG(dm, ODM_COMP_API, "dbg_port_value = 0x%x\n", dbg_port_value);
182 return dbg_port_value;
183 }
184
185 #ifdef CONFIG_PHYDM_DEBUG_FUNCTION
186 #if (ODM_IC_11N_SERIES_SUPPORT)
phydm_bb_hw_dbg_info_n(void * dm_void,u32 * _used,char * output,u32 * _out_len)187 void phydm_bb_hw_dbg_info_n(void *dm_void, u32 *_used, char *output,
188 u32 *_out_len)
189 {
190 struct dm_struct *dm = (struct dm_struct *)dm_void;
191 u32 used = *_used;
192 u32 out_len = *_out_len;
193 u32 value32 = 0, value32_1 = 0;
194 u8 rf_gain_a = 0, rf_gain_b = 0, rf_gain_c = 0, rf_gain_d = 0;
195 u8 rx_snr_a = 0, rx_snr_b = 0, rx_snr_c = 0, rx_snr_d = 0;
196 s8 rxevm_0 = 0, rxevm_1 = 0;
197 #if 1
198 struct phydm_cfo_rpt cfo;
199 u8 i = 0;
200 #else
201 s32 short_cfo_a = 0, short_cfo_b = 0, long_cfo_a = 0, long_cfo_b = 0;
202 s32 scfo_a = 0, scfo_b = 0, avg_cfo_a = 0, avg_cfo_b = 0;
203 s32 cfo_end_a = 0, cfo_end_b = 0, acq_cfo_a = 0, acq_cfo_b = 0;
204 #endif
205
206 PDM_SNPF(out_len, used, output + used, out_len - used, "\r\n %-35s\n",
207 "BB Report Info");
208
209 /*@AGC result*/
210 value32 = odm_get_bb_reg(dm, R_0xdd0, MASKDWORD);
211 rf_gain_a = (u8)(value32 & 0x3f);
212 rf_gain_a = rf_gain_a << 1;
213
214 rf_gain_b = (u8)((value32 >> 8) & 0x3f);
215 rf_gain_b = rf_gain_b << 1;
216
217 rf_gain_c = (u8)((value32 >> 16) & 0x3f);
218 rf_gain_c = rf_gain_c << 1;
219
220 rf_gain_d = (u8)((value32 >> 24) & 0x3f);
221 rf_gain_d = rf_gain_d << 1;
222
223 PDM_SNPF(out_len, used, output + used, out_len - used,
224 "\r\n %-35s = %d / %d / %d / %d", "OFDM RX RF Gain(A/B/C/D)",
225 rf_gain_a, rf_gain_b, rf_gain_c, rf_gain_d);
226
227 /*SNR report*/
228 value32 = odm_get_bb_reg(dm, R_0xdd4, MASKDWORD);
229 rx_snr_a = (u8)(value32 & 0xff);
230 rx_snr_a = rx_snr_a >> 1;
231
232 rx_snr_b = (u8)((value32 >> 8) & 0xff);
233 rx_snr_b = rx_snr_b >> 1;
234
235 rx_snr_c = (u8)((value32 >> 16) & 0xff);
236 rx_snr_c = rx_snr_c >> 1;
237
238 rx_snr_d = (u8)((value32 >> 24) & 0xff);
239 rx_snr_d = rx_snr_d >> 1;
240
241 PDM_SNPF(out_len, used, output + used, out_len - used,
242 "\r\n %-35s = %d / %d / %d / %d", "RXSNR(A/B/C/D, dB)",
243 rx_snr_a, rx_snr_b, rx_snr_c, rx_snr_d);
244
245 /* PostFFT related info*/
246 value32 = odm_get_bb_reg(dm, R_0xdd8, MASKDWORD);
247
248 rxevm_0 = (s8)((value32 & MASKBYTE2) >> 16);
249 rxevm_0 /= 2;
250 if (rxevm_0 < -63)
251 rxevm_0 = 0;
252
253 rxevm_1 = (s8)((value32 & MASKBYTE3) >> 24);
254 rxevm_1 /= 2;
255 if (rxevm_1 < -63)
256 rxevm_1 = 0;
257
258 PDM_SNPF(out_len, used, output + used, out_len - used,
259 "\r\n %-35s = %d / %d", "RXEVM (1ss/2ss)", rxevm_0, rxevm_1);
260
261 #if 1
262 phydm_get_cfo_info(dm, &cfo);
263 for (i = 0; i < dm->num_rf_path; i++) {
264 PDM_SNPF(out_len, used, output + used, out_len - used,
265 "\r\n %s[%d] %-28s = {%d, %d, %d, %d, %d}",
266 "CFO", i, "{S, L, Sec, Acq, End}",
267 cfo.cfo_rpt_s[i], cfo.cfo_rpt_l[i], cfo.cfo_rpt_sec[i],
268 cfo.cfo_rpt_acq[i], cfo.cfo_rpt_end[i]);
269 }
270 #else
271 /*@CFO Report Info*/
272 odm_set_bb_reg(dm, R_0xd00, BIT(26), 1);
273
274 /*Short CFO*/
275 value32 = odm_get_bb_reg(dm, R_0xdac, MASKDWORD);
276 value32_1 = odm_get_bb_reg(dm, R_0xdb0, MASKDWORD);
277
278 short_cfo_b = (s32)(value32 & 0xfff); /*S(12,11)*/
279 short_cfo_a = (s32)((value32 & 0x0fff0000) >> 16);
280
281 long_cfo_b = (s32)(value32_1 & 0x1fff); /*S(13,12)*/
282 long_cfo_a = (s32)((value32_1 & 0x1fff0000) >> 16);
283
284 /*SFO 2's to dec*/
285 if (short_cfo_a > 2047)
286 short_cfo_a = short_cfo_a - 4096;
287 if (short_cfo_b > 2047)
288 short_cfo_b = short_cfo_b - 4096;
289
290 short_cfo_a = (short_cfo_a * 312500) / 2048;
291 short_cfo_b = (short_cfo_b * 312500) / 2048;
292
293 /*@LFO 2's to dec*/
294
295 if (long_cfo_a > 4095)
296 long_cfo_a = long_cfo_a - 8192;
297
298 if (long_cfo_b > 4095)
299 long_cfo_b = long_cfo_b - 8192;
300
301 long_cfo_a = long_cfo_a * 312500 / 4096;
302 long_cfo_b = long_cfo_b * 312500 / 4096;
303
304 PDM_SNPF(out_len, used, output + used, out_len - used, "\r\n %-35s",
305 "CFO Report Info");
306 PDM_SNPF(out_len, used, output + used, out_len - used,
307 "\r\n %-35s = %d / %d", "Short CFO(Hz) <A/B>", short_cfo_a,
308 short_cfo_b);
309 PDM_SNPF(out_len, used, output + used, out_len - used,
310 "\r\n %-35s = %d / %d", "Long CFO(Hz) <A/B>", long_cfo_a,
311 long_cfo_b);
312
313 /*SCFO*/
314 value32 = odm_get_bb_reg(dm, R_0xdb8, MASKDWORD);
315 value32_1 = odm_get_bb_reg(dm, R_0xdb4, MASKDWORD);
316
317 scfo_b = (s32)(value32 & 0x7ff); /*S(11,10)*/
318 scfo_a = (s32)((value32 & 0x07ff0000) >> 16);
319
320 if (scfo_a > 1023)
321 scfo_a = scfo_a - 2048;
322
323 if (scfo_b > 1023)
324 scfo_b = scfo_b - 2048;
325
326 scfo_a = scfo_a * 312500 / 1024;
327 scfo_b = scfo_b * 312500 / 1024;
328
329 avg_cfo_b = (s32)(value32_1 & 0x1fff); /*S(13,12)*/
330 avg_cfo_a = (s32)((value32_1 & 0x1fff0000) >> 16);
331
332 if (avg_cfo_a > 4095)
333 avg_cfo_a = avg_cfo_a - 8192;
334
335 if (avg_cfo_b > 4095)
336 avg_cfo_b = avg_cfo_b - 8192;
337
338 avg_cfo_a = avg_cfo_a * 312500 / 4096;
339 avg_cfo_b = avg_cfo_b * 312500 / 4096;
340
341 PDM_SNPF(out_len, used, output + used, out_len - used,
342 "\r\n %-35s = %d / %d", "value SCFO(Hz) <A/B>", scfo_a,
343 scfo_b);
344 PDM_SNPF(out_len, used, output + used, out_len - used,
345 "\r\n %-35s = %d / %d", "Avg CFO(Hz) <A/B>", avg_cfo_a,
346 avg_cfo_b);
347
348 value32 = odm_get_bb_reg(dm, R_0xdbc, MASKDWORD);
349 value32_1 = odm_get_bb_reg(dm, R_0xde0, MASKDWORD);
350
351 cfo_end_b = (s32)(value32 & 0x1fff); /*S(13,12)*/
352 cfo_end_a = (s32)((value32 & 0x1fff0000) >> 16);
353
354 if (cfo_end_a > 4095)
355 cfo_end_a = cfo_end_a - 8192;
356
357 if (cfo_end_b > 4095)
358 cfo_end_b = cfo_end_b - 8192;
359
360 cfo_end_a = cfo_end_a * 312500 / 4096;
361 cfo_end_b = cfo_end_b * 312500 / 4096;
362
363 acq_cfo_b = (s32)(value32_1 & 0x1fff); /*S(13,12)*/
364 acq_cfo_a = (s32)((value32_1 & 0x1fff0000) >> 16);
365
366 if (acq_cfo_a > 4095)
367 acq_cfo_a = acq_cfo_a - 8192;
368
369 if (acq_cfo_b > 4095)
370 acq_cfo_b = acq_cfo_b - 8192;
371
372 acq_cfo_a = acq_cfo_a * 312500 / 4096;
373 acq_cfo_b = acq_cfo_b * 312500 / 4096;
374
375 PDM_SNPF(out_len, used, output + used, out_len - used,
376 "\r\n %-35s = %d / %d", "End CFO(Hz) <A/B>", cfo_end_a,
377 cfo_end_b);
378 PDM_SNPF(out_len, used, output + used, out_len - used,
379 "\r\n %-35s = %d / %d", "ACQ CFO(Hz) <A/B>", acq_cfo_a,
380 acq_cfo_b);
381 #endif
382 }
383 #endif
384
385 #if (ODM_IC_11AC_SERIES_SUPPORT)
386 #if (RTL8822B_SUPPORT)
phydm_bb_hw_dbg_info_8822b(void * dm_void,u32 * _used,char * output,u32 * _out_len)387 void phydm_bb_hw_dbg_info_8822b(void *dm_void, u32 *_used, char *output,
388 u32 *_out_len)
389 {
390 struct dm_struct *dm = (struct dm_struct *)dm_void;
391 u32 used = *_used;
392 u32 out_len = *_out_len;
393 u32 condi_num = 0;
394 u8 i = 0;
395
396 if (!(dm->support_ic_type == ODM_RTL8822B))
397 return;
398
399 condi_num = phydm_get_condi_num_8822b(dm);
400 phydm_get_condi_num_acc_8822b(dm);
401
402 PDM_SNPF(out_len, used, output + used, out_len - used,
403 "\r\n %-35s = %d.%.4d", "condi_num",
404 condi_num >> 4, phydm_show_fraction_num(condi_num & 0xf, 4));
405
406 for (i = 0; i < CN_CNT_MAX; i++) {
407 PDM_SNPF(out_len, used, output + used, out_len - used,
408 "\r\n Tone_num[CN>%d]%-21s = %d",
409 i, " ", dm->phy_dbg_info.condi_num_cdf[i]);
410 }
411
412 *_used = used;
413 *_out_len = out_len;
414 }
415 #endif
416
phydm_bb_hw_dbg_info_ac(void * dm_void,u32 * _used,char * output,u32 * _out_len)417 void phydm_bb_hw_dbg_info_ac(void *dm_void, u32 *_used, char *output,
418 u32 *_out_len)
419 {
420 struct dm_struct *dm = (struct dm_struct *)dm_void;
421 u32 used = *_used;
422 u32 out_len = *_out_len;
423 char *tmp_string = NULL;
424 u8 rx_ht_bw, rx_vht_bw, rxsc, rx_ht, bw_idx = 0;
425 static u8 v_rx_bw;
426 u32 value32, value32_1, value32_2, value32_3;
427 struct phydm_cfo_rpt cfo;
428 u8 i = 0;
429 static u8 tail, parity, rsv, vrsv, smooth, htsound, agg;
430 static u8 stbc, vstbc, fec, fecext, sgi, sgiext, htltf, vgid, v_nsts;
431 static u8 vtxops, vrsv2, vbrsv, bf, vbcrc;
432 static u16 h_length, htcrc8, length;
433 static u16 vpaid;
434 static u16 v_length, vhtcrc8, v_mcss, v_tail, vb_tail;
435 static u8 hmcss, hrx_bw;
436 u8 pwdb;
437 s8 rxevm_0, rxevm_1, rxevm_2;
438 u8 rf_gain[4];
439 u8 rx_snr[4];
440 s32 sig_power;
441
442 PDM_SNPF(out_len, used, output + used, out_len - used, "\r\n %-35s\n",
443 "BB Report Info");
444
445 /*@ [BW & Mode] =====================================================*/
446
447 value32 = odm_get_bb_reg(dm, R_0xf80, MASKDWORD);
448 rx_ht = (u8)((value32 & 0x180) >> 7);
449
450 if (rx_ht == AD_VHT_MODE) {
451 tmp_string = "VHT";
452 bw_idx = (u8)((value32 >> 1) & 0x3);
453 } else if (rx_ht == AD_HT_MODE) {
454 tmp_string = "HT";
455 bw_idx = (u8)(value32 & 0x1);
456 } else {
457 tmp_string = "Legacy";
458 bw_idx = 0;
459 }
460 PDM_SNPF(out_len, used, output + used, out_len - used,
461 "\r\n %-35s %s %dM", "mode", tmp_string, (20 << bw_idx));
462
463 if (rx_ht != AD_LEGACY_MODE) {
464 rxsc = (u8)(value32 & 0x78);
465
466 if (rxsc == 0)
467 tmp_string = "duplicate/full bw";
468 else if (rxsc == 1)
469 tmp_string = "usc20-1";
470 else if (rxsc == 2)
471 tmp_string = "lsc20-1";
472 else if (rxsc == 3)
473 tmp_string = "usc20-2";
474 else if (rxsc == 4)
475 tmp_string = "lsc20-2";
476 else if (rxsc == 9)
477 tmp_string = "usc40";
478 else if (rxsc == 10)
479 tmp_string = "lsc40";
480
481 PDM_SNPF(out_len, used, output + used, out_len - used,
482 " %-35s", tmp_string);
483 }
484
485 /*@ [RX signal power and AGC related info] ==========================*/
486
487 pwdb = (u8)odm_get_bb_reg(dm, R_0xf90, MASKBYTE1);
488 sig_power = -110 + (pwdb >> 1);
489 PDM_SNPF(out_len, used, output + used, out_len - used,
490 "\r\n %-35s = %d", "OFDM RX Signal Power(dB)", sig_power);
491
492 value32 = odm_get_bb_reg(dm, R_0xd14, MASKDWORD);
493 rx_snr[RF_PATH_A] = (u8)(value32 & 0xFF) >> 1; /*@ S(8,1)*/
494 rf_gain[RF_PATH_A] = (s8)(((value32 & MASKBYTE1) >> 8) * 2);
495
496 value32 = odm_get_bb_reg(dm, R_0xd54, MASKDWORD);
497 rx_snr[RF_PATH_B] = (u8)(value32 & 0xFF) >> 1; /*@ S(8,1)*/
498 rf_gain[RF_PATH_B] = (s8)(((value32 & MASKBYTE1) >> 8) * 2);
499
500 value32 = odm_get_bb_reg(dm, R_0xd94, MASKDWORD);
501 rx_snr[RF_PATH_C] = (u8)(value32 & 0xFF) >> 1; /*@ S(8,1)*/
502 rf_gain[RF_PATH_C] = (s8)(((value32 & MASKBYTE1) >> 8) * 2);
503
504 value32 = odm_get_bb_reg(dm, R_0xdd4, MASKDWORD);
505 rx_snr[RF_PATH_D] = (u8)(value32 & 0xFF) >> 1; /*@ S(8,1)*/
506 rf_gain[RF_PATH_D] = (s8)(((value32 & MASKBYTE1) >> 8) * 2);
507
508 PDM_SNPF(out_len, used, output + used, out_len - used,
509 "\r\n %-35s = %d / %d / %d / %d", "OFDM RX RF Gain(A/B/C/D)",
510 rf_gain[RF_PATH_A], rf_gain[RF_PATH_B],
511 rf_gain[RF_PATH_C], rf_gain[RF_PATH_D]);
512
513 /*@ [RX counter Info] ===============================================*/
514
515 PDM_SNPF(out_len, used, output + used, out_len - used,
516 "\r\n %-35s = %d", "OFDM CCA cnt",
517 odm_get_bb_reg(dm, R_0xf08, 0xFFFF0000));
518
519 PDM_SNPF(out_len, used, output + used, out_len - used,
520 "\r\n %-35s = %d", "OFDM SBD Fail cnt",
521 odm_get_bb_reg(dm, R_0xfd0, 0xFFFF));
522
523 value32 = odm_get_bb_reg(dm, R_0xfc4, MASKDWORD);
524 PDM_SNPF(out_len, used, output + used, out_len - used,
525 "\r\n %-35s = %d / %d", "VHT SIGA/SIGB CRC8 Fail cnt",
526 value32 & 0xFFFF, ((value32 & 0xFFFF0000) >> 16));
527
528 PDM_SNPF(out_len, used, output + used, out_len - used,
529 "\r\n %-35s = %d", "CCK CCA cnt",
530 odm_get_bb_reg(dm, R_0xfcc, 0xFFFF));
531
532 value32 = odm_get_bb_reg(dm, R_0xfbc, MASKDWORD);
533 PDM_SNPF(out_len, used, output + used, out_len - used,
534 "\r\n %-35s = %d / %d",
535 "LSIG (parity Fail/rate Illegal) cnt", value32 & 0xFFFF,
536 ((value32 & 0xFFFF0000) >> 16));
537
538 PDM_SNPF(out_len, used, output + used, out_len - used,
539 "\r\n %-35s = %d / %d", "HT/VHT MCS NOT SUPPORT cnt",
540 odm_get_bb_reg(dm, R_0xfc0, (0xFFFF0000 >> 16)),
541 odm_get_bb_reg(dm, R_0xfc8, 0xFFFF));
542
543 /*@ [PostFFT Info] =================================================*/
544 value32 = odm_get_bb_reg(dm, R_0xf8c, MASKDWORD);
545 rxevm_0 = (s8)((value32 & MASKBYTE2) >> 16);
546 rxevm_0 /= 2;
547 if (rxevm_0 < -63)
548 rxevm_0 = 0;
549
550 rxevm_1 = (s8)((value32 & MASKBYTE3) >> 24);
551 rxevm_1 /= 2;
552 value32 = odm_get_bb_reg(dm, R_0xf88, MASKDWORD);
553 rxevm_2 = (s8)((value32 & MASKBYTE2) >> 16);
554 rxevm_2 /= 2;
555
556 if (rxevm_1 < -63)
557 rxevm_1 = 0;
558 if (rxevm_2 < -63)
559 rxevm_2 = 0;
560
561 PDM_SNPF(out_len, used, output + used, out_len - used,
562 "\r\n %-35s = %d / %d / %d", "RXEVM (1ss/2ss/3ss)", rxevm_0,
563 rxevm_1, rxevm_2);
564 PDM_SNPF(out_len, used, output + used, out_len - used,
565 "\r\n %-35s = %d / %d / %d / %d", "RXSNR(A/B/C/D dB)",
566 rx_snr[RF_PATH_A], rx_snr[RF_PATH_B],
567 rx_snr[RF_PATH_C], rx_snr[RF_PATH_D]);
568
569 value32 = odm_get_bb_reg(dm, R_0xf8c, MASKDWORD);
570 PDM_SNPF(out_len, used, output + used, out_len - used,
571 "\r\n %-35s = %d / %d", "CSI_1st /CSI_2nd", value32 & 0xFFFF,
572 ((value32 & 0xFFFF0000) >> 16));
573
574 /*@ [CFO Report Info] ===============================================*/
575 phydm_get_cfo_info(dm, &cfo);
576 for (i = 0; i < dm->num_rf_path; i++) {
577 PDM_SNPF(out_len, used, output + used, out_len - used,
578 "\r\n %s[%d] %-28s = {%d, %d, %d, %d, %d}",
579 "CFO", i, "{S, L, Sec, Acq, End}",
580 cfo.cfo_rpt_s[i], cfo.cfo_rpt_l[i], cfo.cfo_rpt_sec[i],
581 cfo.cfo_rpt_acq[i], cfo.cfo_rpt_end[i]);
582 }
583
584 /*@ [L-SIG Content] =================================================*/
585 value32 = odm_get_bb_reg(dm, R_0xf20, MASKDWORD);
586
587 tail = (u8)((value32 & 0xfc0000) >> 18);/*@[23:18]*/
588 parity = (u8)((value32 & 0x20000) >> 17);/*@[17]*/
589 length = (u16)((value32 & 0x1ffe0) >> 5);/*@[16:5]*/
590 rsv = (u8)((value32 & 0x10) >> 4);/*@[4]*/
591
592 PDM_SNPF(out_len, used, output + used, out_len - used, "\r\n %-35s",
593 "L-SIG");
594 PDM_SNPF(out_len, used, output + used, out_len - used,
595 "\r\n %-35s = %d M", "rate",
596 phydm_get_l_sig_rate(dm, (u8)(value32 & 0x0f)));
597
598 PDM_SNPF(out_len, used, output + used, out_len - used,
599 "\r\n %-35s = %x / %d / %d", "Rsv/length/parity", rsv, length,
600 parity);
601
602 if (rx_ht == AD_HT_MODE) {
603 /*@ [HT SIG 1] ======================================================*/
604 value32 = odm_get_bb_reg(dm, R_0xf2c, MASKDWORD);
605
606 hmcss = (u8)(value32 & 0x7F);
607 hrx_bw = (u8)((value32 & 0x80) >> 7);
608 h_length = (u16)((value32 & 0x0fff00) >> 8);
609
610 PDM_SNPF(out_len, used, output + used, out_len - used,
611 "\r\n %-35s", "HT-SIG1");
612 PDM_SNPF(out_len, used, output + used, out_len - used,
613 "\r\n %-35s = %d / %d / %d", "MCS/BW/length",
614 hmcss, hrx_bw, h_length);
615 /*@ [HT SIG 2] ======================================================*/
616 value32 = odm_get_bb_reg(dm, R_0xf30, MASKDWORD);
617 smooth = (u8)(value32 & 0x01);
618 htsound = (u8)((value32 & 0x02) >> 1);
619 rsv = (u8)((value32 & 0x04) >> 2);
620 agg = (u8)((value32 & 0x08) >> 3);
621 stbc = (u8)((value32 & 0x30) >> 4);
622 fec = (u8)((value32 & 0x40) >> 6);
623 sgi = (u8)((value32 & 0x80) >> 7);
624 htltf = (u8)((value32 & 0x300) >> 8);
625 htcrc8 = (u16)((value32 & 0x3fc00) >> 10);
626 tail = (u8)((value32 & 0xfc0000) >> 18);
627
628 PDM_SNPF(out_len, used, output + used, out_len - used,
629 "\r\n %-35s",
630 "HT-SIG2");
631 PDM_SNPF(out_len, used, output + used, out_len - used,
632 "\r\n %-35s = %x / %x / %x / %x / %x / %x",
633 "Smooth/NoSound/Rsv/Aggregate/STBC/LDPC",
634 smooth, htsound, rsv, agg, stbc, fec);
635 PDM_SNPF(out_len, used, output + used, out_len - used,
636 "\r\n %-35s = %x / %x / %x / %x",
637 "SGI/E-HT-LTFs/CRC/tail",
638 sgi, htltf, htcrc8, tail);
639 } else if (rx_ht == AD_VHT_MODE) {
640 /*@ [VHT SIG A1] ====================================================*/
641 value32 = odm_get_bb_reg(dm, R_0xf2c, MASKDWORD);
642
643 v_rx_bw = (u8)(value32 & 0x03);
644 vrsv = (u8)((value32 & 0x04) >> 2);
645 vstbc = (u8)((value32 & 0x08) >> 3);
646 vgid = (u8)((value32 & 0x3f0) >> 4);
647 v_nsts = (u8)(((value32 & 0x1c00) >> 10) + 1);
648 vpaid = (u16)((value32 & 0x3fe000) >> 13);
649 vtxops = (u8)((value32 & 0x400000) >> 22);
650 vrsv2 = (u8)((value32 & 0x800000) >> 23);
651
652 PDM_SNPF(out_len, used, output + used, out_len - used,
653 "\r\n %-35s",
654 "VHT-SIG-A1");
655 PDM_SNPF(out_len, used, output + used, out_len - used,
656 "\r\n %-35s = %x / %x / %x / %x / %x / %x / %x / %x",
657 "BW/Rsv1/STBC/GID/Nsts/PAID/TXOPPS/Rsv2", v_rx_bw,
658 vrsv, vstbc, vgid, v_nsts, vpaid, vtxops, vrsv2);
659
660 /*@ [VHT SIG A2] ====================================================*/
661 value32 = odm_get_bb_reg(dm, R_0xf30, MASKDWORD);
662
663 /* @sgi=(u8)(value32&0x01); */
664 sgiext = (u8)(value32 & 0x03);
665 /* @fec = (u8)(value32&0x04); */
666 fecext = (u8)((value32 & 0x0C) >> 2);
667
668 v_mcss = (u8)((value32 & 0xf0) >> 4);
669 bf = (u8)((value32 & 0x100) >> 8);
670 vrsv = (u8)((value32 & 0x200) >> 9);
671 vhtcrc8 = (u16)((value32 & 0x3fc00) >> 10);
672 v_tail = (u8)((value32 & 0xfc0000) >> 18);
673
674 PDM_SNPF(out_len, used, output + used, out_len - used,
675 "\r\n %-35s", "VHT-SIG-A2");
676 PDM_SNPF(out_len, used, output + used, out_len - used,
677 "\r\n %-35s = %x / %x / %x / %x / %x / %x / %x",
678 "SGI/FEC/MCS/BF/Rsv/CRC/tail",
679 sgiext, fecext, v_mcss, bf, vrsv, vhtcrc8, v_tail);
680
681 /*@ [VHT SIG B] ====================================================*/
682 value32 = odm_get_bb_reg(dm, R_0xf34, MASKDWORD);
683
684 #if 0
685 v_length = (u16)(value32 & 0x1fffff);
686 vbrsv = (u8)((value32 & 0x600000) >> 21);
687 vb_tail = (u16)((value32 & 0x1f800000) >> 23);
688 vbcrc = (u8)((value32 & 0x80000000) >> 31);
689 #endif
690
691 PDM_SNPF(out_len, used, output + used, out_len - used,
692 "\r\n %-35s", "VHT-SIG-B");
693 PDM_SNPF(out_len, used, output + used, out_len - used,
694 "\r\n %-35s = %x",
695 "Codeword", value32);
696
697 #if 0
698 PDM_SNPF(out_len, used, output + used, out_len - used,
699 "\r\n %-35s = %x / %x / %x / %x",
700 "length/Rsv/tail/CRC",
701 v_length, vbrsv, vb_tail, vbcrc);
702 #endif
703 }
704
705 *_used = used;
706 *_out_len = out_len;
707 }
708 #endif
709
710 #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
phydm_bb_hw_dbg_info_jgr3(void * dm_void,u32 * _used,char * output,u32 * _out_len)711 void phydm_bb_hw_dbg_info_jgr3(void *dm_void, u32 *_used, char *output,
712 u32 *_out_len)
713 {
714 struct dm_struct *dm = (struct dm_struct *)dm_void;
715 u32 used = *_used;
716 u32 out_len = *_out_len;
717 char *tmp_string = NULL;
718 u8 rx_ht_bw = 0, rx_vht_bw = 0, rx_ht = 0;
719 static u8 v_rx_bw;
720 u32 value32 = 0;
721 u8 i = 0;
722 static u8 tail, parity, rsv, vrsv, smooth, htsound, agg;
723 static u8 stbc, vstbc, fec, fecext, sgi, sgiext, htltf, vgid, v_nsts;
724 static u8 vtxops, vrsv2, vbrsv, bf, vbcrc;
725 static u16 h_length, htcrc8, length;
726 static u16 vpaid;
727 static u16 v_length, vhtcrc8, v_mcss, v_tail, vb_tail;
728 static u8 hmcss, hrx_bw;
729
730 PDM_SNPF(out_len, used, output + used, out_len - used, "\r\n %-35s\n",
731 "BB Report Info");
732
733 /*@ [Mode] =====================================================*/
734
735 value32 = odm_get_bb_reg(dm, R_0x2c20, MASKDWORD);
736 rx_ht = (u8)((value32 & 0xC0000) >> 18);
737 if (rx_ht == AD_VHT_MODE)
738 tmp_string = "VHT";
739 else if (rx_ht == AD_HT_MODE)
740 tmp_string = "HT";
741 else
742 tmp_string = "Legacy";
743
744 PDM_SNPF(out_len, used, output + used, out_len - used,
745 "\r\n %-35s %s", "mode", tmp_string);
746 /*@ [RX counter Info] ===============================================*/
747
748 PDM_SNPF(out_len, used, output + used, out_len - used,
749 "\r\n %-35s = %d", "CCK CCA cnt",
750 odm_get_bb_reg(dm, R_0x2c08, 0xFFFF));
751
752 PDM_SNPF(out_len, used, output + used, out_len - used,
753 "\r\n %-35s = %d", "OFDM CCA cnt",
754 odm_get_bb_reg(dm, R_0x2c08, 0xFFFF0000));
755
756 PDM_SNPF(out_len, used, output + used, out_len - used,
757 "\r\n %-35s = %d", "OFDM SBD Fail cnt",
758 odm_get_bb_reg(dm, R_0x2d20, 0xFFFF0000));
759
760 PDM_SNPF(out_len, used, output + used, out_len - used,
761 "\r\n %-35s = %d / %d",
762 "LSIG (parity Fail/rate Illegal) cnt",
763 odm_get_bb_reg(dm, R_0x2d04, 0xFFFF0000),
764 odm_get_bb_reg(dm, R_0x2d08, 0xFFFF));
765
766 value32 = odm_get_bb_reg(dm, R_0x2d10, MASKDWORD);
767 PDM_SNPF(out_len, used, output + used, out_len - used,
768 "\r\n %-35s = %d / %d", "HT/VHT MCS NOT SUPPORT cnt",
769 value32 & 0xFFFF, ((value32 & 0xFFFF0000) >> 16));
770
771 value32 = odm_get_bb_reg(dm, R_0x2d0c, MASKDWORD);
772 PDM_SNPF(out_len, used, output + used, out_len - used,
773 "\r\n %-35s = %d / %d", "VHT SIGA/SIGB CRC8 Fail cnt",
774 value32 & 0xFFFF, ((value32 & 0xFFFF0000) >> 16));
775 /*@ [L-SIG Content] =================================================*/
776 value32 = odm_get_bb_reg(dm, R_0x2c20, MASKDWORD);
777
778 parity = (u8)((value32 & 0x20000) >> 17);/*@[17]*/
779 length = (u16)((value32 & 0x1ffe0) >> 5);/*@[16:5]*/
780 rsv = (u8)((value32 & 0x10) >> 4);/*@[4]*/
781
782 PDM_SNPF(out_len, used, output + used, out_len - used, "\r\n %-35s",
783 "L-SIG");
784 PDM_SNPF(out_len, used, output + used, out_len - used,
785 "\r\n %-35s = %d M", "rate",
786 phydm_get_l_sig_rate(dm, (u8)(value32 & 0x0f)));
787
788 PDM_SNPF(out_len, used, output + used, out_len - used,
789 "\r\n %-35s = %x / %d / %d", "Rsv/length/parity", rsv, length,
790 parity);
791
792 if (rx_ht == AD_HT_MODE) {
793 /*@ [HT SIG 1] ======================================================*/
794 value32 = odm_get_bb_reg(dm, R_0x2c2c, MASKDWORD);
795
796 hmcss = (u8)(value32 & 0x7F);
797 hrx_bw = (u8)((value32 & 0x80) >> 7);
798 h_length = (u16)((value32 & 0x0fff00) >> 8);
799
800 PDM_SNPF(out_len, used, output + used, out_len - used,
801 "\r\n %-35s", "HT-SIG1");
802 PDM_SNPF(out_len, used, output + used, out_len - used,
803 "\r\n %-35s = %d / %d / %d", "MCS/BW/length",
804 hmcss, hrx_bw, h_length);
805 /*@ [HT SIG 2] ======================================================*/
806 value32 = odm_get_bb_reg(dm, R_0x2c30, MASKDWORD);
807 smooth = (u8)(value32 & 0x01);
808 htsound = (u8)((value32 & 0x02) >> 1);
809 rsv = (u8)((value32 & 0x04) >> 2);
810 agg = (u8)((value32 & 0x08) >> 3);
811 stbc = (u8)((value32 & 0x30) >> 4);
812 fec = (u8)((value32 & 0x40) >> 6);
813 sgi = (u8)((value32 & 0x80) >> 7);
814 htltf = (u8)((value32 & 0x300) >> 8);
815 htcrc8 = (u16)((value32 & 0x3fc00) >> 10);
816 tail = (u8)((value32 & 0xfc0000) >> 18);
817
818 PDM_SNPF(out_len, used, output + used, out_len - used,
819 "\r\n %-35s",
820 "HT-SIG2");
821 PDM_SNPF(out_len, used, output + used, out_len - used,
822 "\r\n %-35s = %x / %x / %x / %x / %x / %x",
823 "Smooth/NoSound/Rsv/Aggregate/STBC/LDPC",
824 smooth, htsound, rsv, agg, stbc, fec);
825 PDM_SNPF(out_len, used, output + used, out_len - used,
826 "\r\n %-35s = %x / %x / %x / %x",
827 "SGI/E-HT-LTFs/CRC/tail",
828 sgi, htltf, htcrc8, tail);
829 } else if (rx_ht == AD_VHT_MODE) {
830 /*@ [VHT SIG A1] ====================================================*/
831 value32 = odm_get_bb_reg(dm, R_0x2c2c, MASKDWORD);
832
833 v_rx_bw = (u8)(value32 & 0x03);
834 vrsv = (u8)((value32 & 0x04) >> 2);
835 vstbc = (u8)((value32 & 0x08) >> 3);
836 vgid = (u8)((value32 & 0x3f0) >> 4);
837 v_nsts = (u8)(((value32 & 0x1c00) >> 10) + 1);
838 vpaid = (u16)((value32 & 0x3fe000) >> 13);
839 vtxops = (u8)((value32 & 0x400000) >> 22);
840 vrsv2 = (u8)((value32 & 0x800000) >> 23);
841
842 PDM_SNPF(out_len, used, output + used, out_len - used,
843 "\r\n %-35s",
844 "VHT-SIG-A1");
845 PDM_SNPF(out_len, used, output + used, out_len - used,
846 "\r\n %-35s = %x / %x / %x / %x / %x / %x / %x / %x",
847 "BW/Rsv1/STBC/GID/Nsts/PAID/TXOPPS/Rsv2", v_rx_bw,
848 vrsv, vstbc, vgid, v_nsts, vpaid, vtxops, vrsv2);
849
850 /*@ [VHT SIG A2] ====================================================*/
851 value32 = odm_get_bb_reg(dm, R_0x2c30, MASKDWORD);
852
853 /* @sgi=(u8)(value32&0x01); */
854 sgiext = (u8)(value32 & 0x03);
855 /* @fec = (u8)(value32&0x04); */
856 fecext = (u8)((value32 & 0x0C) >> 2);
857
858 v_mcss = (u8)((value32 & 0xf0) >> 4);
859 bf = (u8)((value32 & 0x100) >> 8);
860 vrsv = (u8)((value32 & 0x200) >> 9);
861 vhtcrc8 = (u16)((value32 & 0x3fc00) >> 10);
862 v_tail = (u8)((value32 & 0xfc0000) >> 18);
863
864 PDM_SNPF(out_len, used, output + used, out_len - used,
865 "\r\n %-35s", "VHT-SIG-A2");
866 PDM_SNPF(out_len, used, output + used, out_len - used,
867 "\r\n %-35s = %x / %x / %x / %x / %x / %x / %x",
868 "SGI/FEC/MCS/BF/Rsv/CRC/tail",
869 sgiext, fecext, v_mcss, bf, vrsv, vhtcrc8, v_tail);
870
871 /*@ [VHT SIG B] ====================================================*/
872 value32 = odm_get_bb_reg(dm, R_0x2c34, MASKDWORD);
873
874 PDM_SNPF(out_len, used, output + used, out_len - used,
875 "\r\n %-35s", "VHT-SIG-B");
876 PDM_SNPF(out_len, used, output + used, out_len - used,
877 "\r\n %-35s = %x",
878 "Codeword", value32);
879
880 if (v_rx_bw == 0) {
881 v_length = (u16)(value32 & 0x1ffff);
882 vbrsv = (u8)((value32 & 0xE0000) >> 17);
883 vb_tail = (u16)((value32 & 0x03F00000) >> 20);
884 } else if (v_rx_bw == 1) {
885 v_length = (u16)(value32 & 0x7FFFF);
886 vbrsv = (u8)((value32 & 0x180000) >> 19);
887 vb_tail = (u16)((value32 & 0x07E00000) >> 21);
888 } else if (v_rx_bw == 2) {
889 v_length = (u16)(value32 & 0x1fffff);
890 vbrsv = (u8)((value32 & 0x600000) >> 21);
891 vb_tail = (u16)((value32 & 0x1f800000) >> 23);
892 }
893 vbcrc = (u8)((value32 & 0x80000000) >> 31);
894
895 PDM_SNPF(out_len, used, output + used, out_len - used,
896 "\r\n %-35s = %x / %x / %x / %x",
897 "length/Rsv/tail/CRC",
898 v_length, vbrsv, vb_tail, vbcrc);
899 }
900
901 *_used = used;
902 *_out_len = out_len;
903 }
904 #endif
905
phydm_get_l_sig_rate(void * dm_void,u8 rate_idx_l_sig)906 u8 phydm_get_l_sig_rate(void *dm_void, u8 rate_idx_l_sig)
907 {
908 u8 rate_idx = 0xff;
909
910 switch (rate_idx_l_sig) {
911 case 0x0b:
912 rate_idx = 6;
913 break;
914 case 0x0f:
915 rate_idx = 9;
916 break;
917 case 0x0a:
918 rate_idx = 12;
919 break;
920 case 0x0e:
921 rate_idx = 18;
922 break;
923 case 0x09:
924 rate_idx = 24;
925 break;
926 case 0x0d:
927 rate_idx = 36;
928 break;
929 case 0x08:
930 rate_idx = 48;
931 break;
932 case 0x0c:
933 rate_idx = 54;
934 break;
935 default:
936 rate_idx = 0xff;
937 break;
938 }
939
940 return rate_idx;
941 }
942
phydm_bb_hw_dbg_info(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)943 void phydm_bb_hw_dbg_info(void *dm_void, char input[][16], u32 *_used,
944 char *output, u32 *_out_len)
945 {
946 struct dm_struct *dm = (struct dm_struct *)dm_void;
947 u32 used = *_used;
948 u32 out_len = *_out_len;
949
950 switch (dm->ic_ip_series) {
951 #if (ODM_IC_11N_SERIES_SUPPORT)
952 case PHYDM_IC_N:
953 phydm_bb_hw_dbg_info_n(dm, &used, output, &out_len);
954 break;
955 #endif
956
957 #if (ODM_IC_11AC_SERIES_SUPPORT)
958 case PHYDM_IC_AC:
959 phydm_bb_hw_dbg_info_ac(dm, &used, output, &out_len);
960 phydm_reset_bb_hw_cnt(dm);
961 #if (RTL8822B_SUPPORT)
962 phydm_bb_hw_dbg_info_8822b(dm, &used, output, &out_len);
963 #endif
964 break;
965 #endif
966
967 #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
968 case PHYDM_IC_JGR3:
969 phydm_bb_hw_dbg_info_jgr3(dm, &used, output, &out_len);
970 phydm_reset_bb_hw_cnt(dm);
971 break;
972 #endif
973 default:
974 break;
975 }
976
977 *_used = used;
978 *_out_len = out_len;
979 }
980
981 #endif /*@#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/
982
983 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
984
phydm_dm_summary_cli_win(void * dm_void,char * buf,u8 macid)985 void phydm_dm_summary_cli_win(void *dm_void, char *buf, u8 macid)
986 {
987 struct dm_struct *dm = (struct dm_struct *)dm_void;
988 struct phydm_dig_struct *dig_t = &dm->dm_dig_table;
989 struct phydm_cfo_track_struct *cfo_t = &dm->dm_cfo_track;
990 struct cmn_sta_info *sta = NULL;
991 struct ra_sta_info *ra = NULL;
992 struct dtp_info *dtp = NULL;
993 u64 comp = dm->support_ability;
994 u64 pause_comp = dm->pause_ability;
995
996 if (!dm->is_linked) {
997 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "[%s]No Link !!!\n", __func__);
998 RT_PRINT(buf);
999 return;
1000 }
1001
1002 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "00.(%s) %-12s: IGI=0x%x, Dyn_Rng=0x%x~0x%x, FA_th={%d,%d,%d}\n",
1003 ((comp & ODM_BB_DIG) ?
1004 ((pause_comp & ODM_BB_DIG) ? "P" : "V") : "."),
1005 "DIG",
1006 dig_t->cur_ig_value,
1007 dig_t->rx_gain_range_min, dig_t->rx_gain_range_max,
1008 dig_t->fa_th[0], dig_t->fa_th[1], dig_t->fa_th[2]);
1009 RT_PRINT(buf);
1010
1011 sta = dm->phydm_sta_info[macid];
1012 if (is_sta_active(sta)) {
1013 ra = &sta->ra_info;
1014 dtp = &sta->dtp_stat;
1015
1016 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "01.(%s) %-12s: rssi_lv=%d, mask=0x%llx\n",
1017 ((comp & ODM_BB_RA_MASK) ?
1018 ((pause_comp & ODM_BB_RA_MASK) ? "P" : "V") : "."),
1019 "RaMask",
1020 ra->rssi_level, ra->ramask);
1021 RT_PRINT(buf);
1022
1023 #ifdef CONFIG_DYNAMIC_TX_TWR
1024 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "02.(%s) %-12s: pwr_lv=%d\n",
1025 ((comp & ODM_BB_DYNAMIC_TXPWR) ?
1026 ((pause_comp & ODM_BB_DYNAMIC_TXPWR) ? "P" : "V") : "."),
1027 "DynTxPwr",
1028 dtp->sta_tx_high_power_lvl);
1029 RT_PRINT(buf);
1030 #endif
1031 }
1032
1033 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "05.(%s) %-12s: cck_pd_lv=%d\n",
1034 ((comp & ODM_BB_CCK_PD) ?
1035 ((pause_comp & ODM_BB_CCK_PD) ? "P" : "V") : "."),
1036 "CCK_PD", dm->dm_cckpd_table.cck_pd_lv);
1037 RT_PRINT(buf);
1038
1039 #ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY
1040 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "06.(%s) %-12s: div_type=%d, curr_ant=%s\n",
1041 ((comp & ODM_BB_ANT_DIV) ?
1042 ((pause_comp & ODM_BB_ANT_DIV) ? "P" : "V") : "."),
1043 "ANT_DIV",
1044 dm->ant_div_type,
1045 (dm->dm_fat_table.rx_idle_ant == MAIN_ANT) ? "MAIN" : "AUX");
1046 RT_PRINT(buf);
1047 #endif
1048
1049 #ifdef PHYDM_POWER_TRAINING_SUPPORT
1050 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "08.(%s) %-12s: PT_score=%d, disable_PT=%d\n",
1051 ((comp & ODM_BB_PWR_TRAIN) ?
1052 ((pause_comp & ODM_BB_PWR_TRAIN) ? "P" : "V") : "."),
1053 "PwrTrain",
1054 dm->pow_train_table.pow_train_score,
1055 dm->is_disable_power_training);
1056 RT_PRINT(buf);
1057 #endif
1058
1059 #ifdef CONFIG_PHYDM_DFS_MASTER
1060 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "11.(%s) %-12s: dbg_mode=%d, region_domain=%d\n",
1061 ((comp & ODM_BB_DFS) ?
1062 ((pause_comp & ODM_BB_DFS) ? "P" : "V") : "."),
1063 "DFS",
1064 dm->dfs.dbg_mode, dm->dfs_region_domain);
1065 RT_PRINT(buf);
1066 #endif
1067 #ifdef PHYDM_SUPPORT_ADAPTIVITY
1068 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "13.(%s) %-12s: th{l2h, h2l}={%d, %d}, edcca_flag=%d\n",
1069 ((comp & ODM_BB_ADAPTIVITY) ?
1070 ((pause_comp & ODM_BB_ADAPTIVITY) ? "P" : "V") : "."),
1071 "Adaptivity",
1072 dm->adaptivity.th_l2h, dm->adaptivity.th_h2l,
1073 dm->false_alm_cnt.edcca_flag);
1074 RT_PRINT(buf);
1075 #endif
1076 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "14.(%s) %-12s: CFO_avg=%d kHz, CFO_traking=%s%d\n",
1077 ((comp & ODM_BB_CFO_TRACKING) ?
1078 ((pause_comp & ODM_BB_CFO_TRACKING) ? "P" : "V") : "."),
1079 "CfoTrack",
1080 cfo_t->CFO_ave_pre,
1081 ((cfo_t->crystal_cap > cfo_t->def_x_cap) ? "+" : "-"),
1082 DIFF_2(cfo_t->crystal_cap, cfo_t->def_x_cap));
1083 RT_PRINT(buf);
1084
1085 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1086 "15.(%s) %-12s: ratio{nhm, clm}={%d, %d}, level{valid, RSSI}={%d, %d}\n",
1087 ((comp & ODM_BB_ENV_MONITOR) ?
1088 ((pause_comp & ODM_BB_ENV_MONITOR) ? "P" : "V") : "."),
1089 "EnvMntr",
1090 dm->dm_ccx_info.nhm_ratio, dm->dm_ccx_info.clm_ratio,
1091 dm->dm_ccx_info.nhm_level_valid, dm->dm_ccx_info.nhm_level);
1092 RT_PRINT(buf);
1093 #ifdef PHYDM_PRIMARY_CCA
1094 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "16.(%s) %-12s: CCA @ (%s SB)\n",
1095 ((comp & ODM_BB_PRIMARY_CCA) ?
1096 ((pause_comp & ODM_BB_PRIMARY_CCA) ? "P" : "V") : "."),
1097 "PriCCA",
1098 ((dm->dm_pri_cca.mf_state == MF_USC_LSC) ? "D" :
1099 ((dm->dm_pri_cca.mf_state == MF_LSC) ? "L" : "U")));
1100 RT_PRINT(buf);
1101 #endif
1102 #ifdef CONFIG_ADAPTIVE_SOML
1103 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "17.(%s) %-12s: soml_en = %s\n",
1104 ((comp & ODM_BB_ADAPTIVE_SOML) ?
1105 ((pause_comp & ODM_BB_ADAPTIVE_SOML) ? "P" : "V") : "."),
1106 "A-SOML",
1107 (dm->dm_soml_table.soml_last_state == SOML_ON) ?
1108 "ON" : "OFF");
1109 RT_PRINT(buf);
1110 #endif
1111 #ifdef PHYDM_LNA_SAT_CHK_SUPPORT
1112 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "18.(%s) %-12s:\n",
1113 ((comp & ODM_BB_LNA_SAT_CHK) ?
1114 ((pause_comp & ODM_BB_LNA_SAT_CHK) ? "P" : "V") : "."),
1115 "LNA_SAT_CHK");
1116 RT_PRINT(buf);
1117 #endif
1118 }
1119
phydm_basic_dbg_msg_cli_win(void * dm_void,char * buf)1120 void phydm_basic_dbg_msg_cli_win(void *dm_void, char *buf)
1121 {
1122 struct dm_struct *dm = (struct dm_struct *)dm_void;
1123 struct phydm_fa_struct *fa_t = &dm->false_alm_cnt;
1124 struct phydm_cfo_track_struct *cfo_t = &dm->dm_cfo_track;
1125 struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info_win_bkp;
1126 struct phydm_phystatus_statistic *dbg_s = &dbg->physts_statistic_info;
1127 struct phydm_phystatus_avg *dbg_avg = &dbg->phystatus_statistic_avg;
1128
1129 char *rate_type = NULL;
1130 u8 tmp_rssi_avg[4];
1131 u8 tmp_snr_avg[4];
1132 u8 tmp_evm_avg[4];
1133 u32 tmp_cnt = 0;
1134 u8 macid, target_macid = 0;
1135 u8 i = 0;
1136 u8 rate_num = dm->num_rf_path;
1137 u8 ss_ofst = 0;
1138 struct cmn_sta_info *entry = NULL;
1139 char dbg_buf[PHYDM_SNPRINT_SIZE] = {0};
1140
1141
1142 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n PHYDM Common Dbg Msg --------->");
1143 RT_PRINT(buf);
1144 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n System up time=%d", dm->phydm_sys_up_time);
1145 RT_PRINT(buf);
1146
1147 if (dm->is_linked) {
1148 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n ID=((%d)), BW=((%d)), fc=((CH-%d))",
1149 dm->curr_station_id, 20 << *dm->band_width, *dm->channel);
1150 RT_PRINT(buf);
1151
1152 if (((*dm->channel <= 14) && (*dm->band_width == CHANNEL_WIDTH_40)) &&
1153 (dm->support_ic_type & ODM_IC_11N_SERIES)) {
1154 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n Primary CCA at ((%s SB))",
1155 (*dm->sec_ch_offset == SECOND_CH_AT_LSB) ? "U" : "L");
1156 RT_PRINT(buf);
1157 }
1158
1159 if (dm->cck_new_agc || dm->rx_rate > ODM_RATE11M) {
1160 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n [AGC Idx] {0x%x, 0x%x, 0x%x, 0x%x}",
1161 dm->ofdm_agc_idx[0], dm->ofdm_agc_idx[1],
1162 dm->ofdm_agc_idx[2], dm->ofdm_agc_idx[3]);
1163 RT_PRINT(buf);
1164 } else {
1165 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n [CCK AGC Idx] {LNA,VGA}={0x%x, 0x%x}",
1166 dm->cck_lna_idx, dm->cck_vga_idx);
1167 RT_PRINT(buf);
1168 }
1169
1170 phydm_print_rate_2_buff(dm, dm->rx_rate, dbg_buf, PHYDM_SNPRINT_SIZE);
1171 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n RSSI:{%d, %d, %d, %d}, RxRate:%s (0x%x)",
1172 (dm->rssi_a == 0xff) ? 0 : dm->rssi_a,
1173 (dm->rssi_b == 0xff) ? 0 : dm->rssi_b,
1174 (dm->rssi_c == 0xff) ? 0 : dm->rssi_c,
1175 (dm->rssi_d == 0xff) ? 0 : dm->rssi_d,
1176 dbg_buf, dm->rx_rate);
1177 RT_PRINT(buf);
1178
1179 phydm_print_rate_2_buff(dm, dm->phy_dbg_info.beacon_phy_rate, dbg_buf, PHYDM_SNPRINT_SIZE);
1180 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n Beacon_cnt=%d, rate_idx:%s (0x%x)",
1181 dm->phy_dbg_info.beacon_cnt_in_period,
1182 dbg_buf,
1183 dm->phy_dbg_info.beacon_phy_rate);
1184 RT_PRINT(buf);
1185
1186 /*Show phydm_rx_rate_distribution;*/
1187 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n [RxRate Cnt] =============>");
1188 RT_PRINT(buf);
1189
1190 /*@======CCK=================================================*/
1191 if (*dm->channel <= 14) {
1192 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n * CCK = {%d, %d, %d, %d}",
1193 dbg->num_qry_legacy_pkt[0], dbg->num_qry_legacy_pkt[1],
1194 dbg->num_qry_legacy_pkt[2], dbg->num_qry_legacy_pkt[3]);
1195 RT_PRINT(buf);
1196 }
1197 /*@======OFDM================================================*/
1198 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n * OFDM = {%d, %d, %d, %d, %d, %d, %d, %d}",
1199 dbg->num_qry_legacy_pkt[4], dbg->num_qry_legacy_pkt[5],
1200 dbg->num_qry_legacy_pkt[6], dbg->num_qry_legacy_pkt[7],
1201 dbg->num_qry_legacy_pkt[8], dbg->num_qry_legacy_pkt[9],
1202 dbg->num_qry_legacy_pkt[10], dbg->num_qry_legacy_pkt[11]);
1203 RT_PRINT(buf);
1204
1205 /*@======HT==================================================*/
1206 if (dbg->ht_pkt_not_zero) {
1207 for (i = 0; i < rate_num; i++) {
1208 ss_ofst = (i << 3);
1209
1210 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n * HT MCS[%d :%d ] = {%d, %d, %d, %d, %d, %d, %d, %d}",
1211 (ss_ofst), (ss_ofst + 7),
1212 dbg->num_qry_ht_pkt[ss_ofst + 0], dbg->num_qry_ht_pkt[ss_ofst + 1],
1213 dbg->num_qry_ht_pkt[ss_ofst + 2], dbg->num_qry_ht_pkt[ss_ofst + 3],
1214 dbg->num_qry_ht_pkt[ss_ofst + 4], dbg->num_qry_ht_pkt[ss_ofst + 5],
1215 dbg->num_qry_ht_pkt[ss_ofst + 6], dbg->num_qry_ht_pkt[ss_ofst + 7]);
1216 RT_PRINT(buf);
1217 }
1218
1219 if (dbg->low_bw_20_occur) {
1220 for (i = 0; i < rate_num; i++) {
1221 ss_ofst = (i << 3);
1222
1223 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n * [Low BW 20M] HT MCS[%d :%d ] = {%d, %d, %d, %d, %d, %d, %d, %d}",
1224 (ss_ofst), (ss_ofst + 7),
1225 dbg->num_qry_pkt_sc_20m[ss_ofst + 0], dbg->num_qry_pkt_sc_20m[ss_ofst + 1],
1226 dbg->num_qry_pkt_sc_20m[ss_ofst + 2], dbg->num_qry_pkt_sc_20m[ss_ofst + 3],
1227 dbg->num_qry_pkt_sc_20m[ss_ofst + 4], dbg->num_qry_pkt_sc_20m[ss_ofst + 5],
1228 dbg->num_qry_pkt_sc_20m[ss_ofst + 6], dbg->num_qry_pkt_sc_20m[ss_ofst + 7]);
1229 RT_PRINT(buf);
1230 }
1231 }
1232 }
1233
1234 #if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT))
1235 /*@======VHT=================================================*/
1236 if (dbg->vht_pkt_not_zero) {
1237 for (i = 0; i < rate_num; i++) {
1238 ss_ofst = 10 * i;
1239
1240 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n * VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}",
1241 (i + 1),
1242 dbg->num_qry_vht_pkt[ss_ofst + 0], dbg->num_qry_vht_pkt[ss_ofst + 1],
1243 dbg->num_qry_vht_pkt[ss_ofst + 2], dbg->num_qry_vht_pkt[ss_ofst + 3],
1244 dbg->num_qry_vht_pkt[ss_ofst + 4], dbg->num_qry_vht_pkt[ss_ofst + 5],
1245 dbg->num_qry_vht_pkt[ss_ofst + 6], dbg->num_qry_vht_pkt[ss_ofst + 7],
1246 dbg->num_qry_vht_pkt[ss_ofst + 8], dbg->num_qry_vht_pkt[ss_ofst + 9]);
1247 RT_PRINT(buf);
1248 }
1249
1250 if (dbg->low_bw_20_occur) {
1251 for (i = 0; i < rate_num; i++) {
1252 ss_ofst = 10 * i;
1253
1254 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n *[Low BW 20M] VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}",
1255 (i + 1),
1256 dbg->num_qry_pkt_sc_20m[ss_ofst + 0], dbg->num_qry_pkt_sc_20m[ss_ofst + 1],
1257 dbg->num_qry_pkt_sc_20m[ss_ofst + 2], dbg->num_qry_pkt_sc_20m[ss_ofst + 3],
1258 dbg->num_qry_pkt_sc_20m[ss_ofst + 4], dbg->num_qry_pkt_sc_20m[ss_ofst + 5],
1259 dbg->num_qry_pkt_sc_20m[ss_ofst + 6], dbg->num_qry_pkt_sc_20m[ss_ofst + 7],
1260 dbg->num_qry_pkt_sc_20m[ss_ofst + 8], dbg->num_qry_pkt_sc_20m[ss_ofst + 9]);
1261 RT_PRINT(buf);
1262 }
1263 }
1264
1265 if (dbg->low_bw_40_occur) {
1266 for (i = 0; i < rate_num; i++) {
1267 ss_ofst = 10 * i;
1268
1269 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n *[Low BW 40M] VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}",
1270 (i + 1),
1271 dbg->num_qry_pkt_sc_40m[ss_ofst + 0], dbg->num_qry_pkt_sc_40m[ss_ofst + 1],
1272 dbg->num_qry_pkt_sc_40m[ss_ofst + 2], dbg->num_qry_pkt_sc_40m[ss_ofst + 3],
1273 dbg->num_qry_pkt_sc_40m[ss_ofst + 4], dbg->num_qry_pkt_sc_40m[ss_ofst + 5],
1274 dbg->num_qry_pkt_sc_40m[ss_ofst + 6], dbg->num_qry_pkt_sc_40m[ss_ofst + 7],
1275 dbg->num_qry_pkt_sc_40m[ss_ofst + 8], dbg->num_qry_pkt_sc_40m[ss_ofst + 9]);
1276 RT_PRINT(buf);
1277 }
1278 }
1279 }
1280 #endif
1281
1282 //1 Show phydm_avg_phystatus_val
1283 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1284 "\r\n [Avg PHY Statistic] ==============>\n");
1285 RT_PRINT(buf);
1286
1287 /*===[Beacon]===*/
1288 switch (dm->num_rf_path) {
1289 #if (defined(PHYDM_COMPILE_ABOVE_4SS))
1290 case 4:
1291 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1292 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d, %.2d}\n",
1293 "[Beacon]", dbg_s->rssi_beacon_cnt,
1294 dbg_avg->rssi_beacon_avg[0],
1295 dbg_avg->rssi_beacon_avg[1],
1296 dbg_avg->rssi_beacon_avg[2],
1297 dbg_avg->rssi_beacon_avg[3]);
1298 break;
1299 #endif
1300 #if (defined(PHYDM_COMPILE_ABOVE_3SS))
1301 case 3:
1302 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1303 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d}\n",
1304 "[Beacon]", dbg_s->rssi_beacon_cnt,
1305 dbg_avg->rssi_beacon_avg[0],
1306 dbg_avg->rssi_beacon_avg[1],
1307 dbg_avg->rssi_beacon_avg[2]);
1308 break;
1309 #endif
1310 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
1311 case 2:
1312 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1313 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d}\n",
1314 "[Beacon]", dbg_s->rssi_beacon_cnt,
1315 dbg_avg->rssi_beacon_avg[0],
1316 dbg_avg->rssi_beacon_avg[1]);
1317 break;
1318 #endif
1319 default:
1320 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1321 "* %-8s Cnt=((%.3d)) RSSI:{%.2d}\n",
1322 "[Beacon]", dbg_s->rssi_beacon_cnt,
1323 dbg_avg->rssi_beacon_avg[0]);
1324 break;
1325 }
1326 RT_PRINT(buf);
1327
1328 /*===[CCK]===*/
1329 switch (dm->num_rf_path) {
1330 #ifdef PHYSTS_3RD_TYPE_SUPPORT
1331 #if (defined(PHYDM_COMPILE_ABOVE_4SS))
1332 case 4:
1333 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1334 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d, %.2d}\n",
1335 "[CCK]", dbg_s->rssi_cck_cnt,
1336 dbg_avg->rssi_cck_avg,
1337 dbg_avg->rssi_cck_avg_abv_2ss[0],
1338 dbg_avg->rssi_cck_avg_abv_2ss[1],
1339 dbg_avg->rssi_cck_avg_abv_2ss[2]);
1340 break;
1341 #endif
1342 #if (defined(PHYDM_COMPILE_ABOVE_3SS))
1343 case 3:
1344 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1345 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d}\n",
1346 "[CCK]", dbg_s->rssi_cck_cnt,
1347 dbg_avg->rssi_cck_avg,
1348 dbg_avg->rssi_cck_avg_abv_2ss[0],
1349 dbg_avg->rssi_cck_avg_abv_2ss[1]);
1350 break;
1351 #endif
1352 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
1353 case 2:
1354 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1355 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d}\n",
1356 "[CCK]", dbg_s->rssi_cck_cnt,
1357 dbg_avg->rssi_cck_avg,
1358 dbg_avg->rssi_cck_avg_abv_2ss[0]);
1359 break;
1360 #endif
1361 #endif
1362 default:
1363 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1364 "* %-8s Cnt=((%.3d)) RSSI:{%.2d}\n",
1365 "[CCK]", dbg_s->rssi_cck_cnt,
1366 dbg_avg->rssi_cck_avg);
1367 break;
1368 }
1369 RT_PRINT(buf);
1370
1371 for (i = 0; i <= 4; i++) {
1372 if (i > dm->num_rf_path)
1373 break;
1374
1375 odm_memory_set(dm, tmp_rssi_avg, 0, 4);
1376 odm_memory_set(dm, tmp_snr_avg, 0, 4);
1377 odm_memory_set(dm, tmp_evm_avg, 0, 4);
1378
1379 #if (defined(PHYDM_COMPILE_ABOVE_4SS))
1380 if (i == 4) {
1381 rate_type = "[4-SS]";
1382 tmp_cnt = dbg_s->rssi_4ss_cnt;
1383 odm_move_memory(dm, tmp_rssi_avg, dbg_avg->rssi_4ss_avg, dm->num_rf_path);
1384 odm_move_memory(dm, tmp_snr_avg, dbg_avg->snr_4ss_avg, dm->num_rf_path);
1385 odm_move_memory(dm, tmp_evm_avg, dbg_avg->evm_4ss_avg, 4);
1386 } else
1387 #endif
1388 #if (defined(PHYDM_COMPILE_ABOVE_3SS))
1389 if (i == 3) {
1390 rate_type = "[3-SS]";
1391 tmp_cnt = dbg_s->rssi_3ss_cnt;
1392 odm_move_memory(dm, tmp_rssi_avg, dbg_avg->rssi_3ss_avg, dm->num_rf_path);
1393 odm_move_memory(dm, tmp_snr_avg, dbg_avg->snr_3ss_avg, dm->num_rf_path);
1394 odm_move_memory(dm, tmp_evm_avg, dbg_avg->evm_3ss_avg, 3);
1395 } else
1396 #endif
1397 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
1398 if (i == 2) {
1399 rate_type = "[2-SS]";
1400 tmp_cnt = dbg_s->rssi_2ss_cnt;
1401 odm_move_memory(dm, tmp_rssi_avg, dbg_avg->rssi_2ss_avg, dm->num_rf_path);
1402 odm_move_memory(dm, tmp_snr_avg, dbg_avg->snr_2ss_avg, dm->num_rf_path);
1403 odm_move_memory(dm, tmp_evm_avg, dbg_avg->evm_2ss_avg, 2);
1404 } else
1405 #endif
1406 if (i == 1) {
1407 rate_type = "[1-SS]";
1408 tmp_cnt = dbg_s->rssi_1ss_cnt;
1409 odm_move_memory(dm, tmp_rssi_avg, dbg_avg->rssi_1ss_avg, dm->num_rf_path);
1410 odm_move_memory(dm, tmp_snr_avg, dbg_avg->snr_1ss_avg, dm->num_rf_path);
1411 odm_move_memory(dm, tmp_evm_avg, &dbg_avg->evm_1ss_avg, 1);
1412 } else {
1413 rate_type = "[L-OFDM]";
1414 tmp_cnt = dbg_s->rssi_ofdm_cnt;
1415 odm_move_memory(dm, tmp_rssi_avg, dbg_avg->rssi_ofdm_avg, dm->num_rf_path);
1416 odm_move_memory(dm, tmp_snr_avg, dbg_avg->snr_ofdm_avg, dm->num_rf_path);
1417 odm_move_memory(dm, tmp_evm_avg, &dbg_avg->evm_ofdm_avg, 1);
1418 }
1419
1420 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1421 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d, %.2d} SNR:{%.2d, %.2d, %.2d, %.2d} EVM:{-%.2d, -%.2d, -%.2d, -%.2d}\n",
1422 rate_type, tmp_cnt,
1423 tmp_rssi_avg[0], tmp_rssi_avg[1], tmp_rssi_avg[2], tmp_rssi_avg[3],
1424 tmp_snr_avg[0], tmp_snr_avg[1], tmp_snr_avg[2], tmp_snr_avg[3],
1425 tmp_evm_avg[0], tmp_evm_avg[1], tmp_evm_avg[2], tmp_evm_avg[3]);
1426 RT_PRINT(buf);
1427 }
1428 /*@----------------------------------------------------------*/
1429
1430 /*Print TX rate*/
1431 for (macid = 0; macid < ODM_ASSOCIATE_ENTRY_NUM; macid++) {
1432 entry = dm->phydm_sta_info[macid];
1433
1434 if (is_sta_active(entry)) {
1435 phydm_print_rate_2_buff(dm, entry->ra_info.curr_tx_rate, dbg_buf, PHYDM_SNPRINT_SIZE);
1436 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n TxRate[%d]=%s (0x%x)", macid, dbg_buf, entry->ra_info.curr_tx_rate);
1437 RT_PRINT(buf);
1438 target_macid = macid;
1439 break;
1440 }
1441 }
1442
1443 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1444 "\r\n TP {Tx, Rx, Total} = {%d, %d, %d}Mbps, Traffic_Load=(%d))",
1445 dm->tx_tp, dm->rx_tp, dm->total_tp, dm->traffic_load);
1446 RT_PRINT(buf);
1447
1448 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n CFO_avg=((%d kHz)), CFO_traking = ((%s%d))",
1449 cfo_t->CFO_ave_pre,
1450 ((cfo_t->crystal_cap > cfo_t->def_x_cap) ? "+" : "-"),
1451 DIFF_2(cfo_t->crystal_cap, cfo_t->def_x_cap));
1452 RT_PRINT(buf);
1453
1454 /* @Condition number */
1455 #if (RTL8822B_SUPPORT)
1456 if (dm->support_ic_type == ODM_RTL8822B) {
1457 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n Condi_Num=((%d.%.4d))",
1458 dm->phy_dbg_info.condi_num >> 4,
1459 phydm_show_fraction_num(dm->phy_dbg_info.condi_num & 0xf, 4));
1460 RT_PRINT(buf);
1461 }
1462 #endif
1463
1464 #if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT || defined(PHYSTS_3RD_TYPE_SUPPORT))
1465 /*STBC or LDPC pkt*/
1466 if (dm->support_ic_type & (PHYSTS_2ND_TYPE_IC |
1467 PHYSTS_3RD_TYPE_IC))
1468 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n Coding: LDPC=((%s)), STBC=((%s))",
1469 (dm->phy_dbg_info.is_ldpc_pkt) ? "Y" : "N",
1470 (dm->phy_dbg_info.is_stbc_pkt) ? "Y" : "N");
1471 RT_PRINT(buf);
1472 #endif
1473
1474 } else {
1475 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n No Link !!!");
1476 RT_PRINT(buf);
1477 }
1478
1479 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n [CCA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}",
1480 fa_t->cnt_cck_cca, fa_t->cnt_ofdm_cca, fa_t->cnt_cca_all);
1481 RT_PRINT(buf);
1482
1483 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n [FA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}",
1484 fa_t->cnt_cck_fail, fa_t->cnt_ofdm_fail, fa_t->cnt_all);
1485 RT_PRINT(buf);
1486
1487 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1488 "\r\n [OFDM FA] Parity=%d, Rate=%d, Fast_Fsync=%d, SBD=%d",
1489 fa_t->cnt_parity_fail, fa_t->cnt_rate_illegal,
1490 fa_t->cnt_fast_fsync, fa_t->cnt_sb_search_fail);
1491 RT_PRINT(buf);
1492
1493 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n [HT FA] CRC8=%d, MCS=%d",
1494 fa_t->cnt_crc8_fail, fa_t->cnt_mcs_fail);
1495 RT_PRINT(buf);
1496
1497 #if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT))
1498 if (dm->support_ic_type & (ODM_IC_11AC_SERIES | ODM_IC_JGR3_SERIES)) {
1499 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1500 "\r\n [VHT FA] SIGA_CRC8=%d, SIGB_CRC8=%d, MCS=%d",
1501 fa_t->cnt_crc8_fail_vhta, fa_t->cnt_crc8_fail_vhtb,
1502 fa_t->cnt_mcs_fail_vht);
1503 RT_PRINT(buf);
1504 }
1505 #endif
1506
1507 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1508 "\r\n [CRC32 OK Cnt] {CCK, OFDM, HT, VHT, Total} = {%d, %d, %d, %d, %d}",
1509 fa_t->cnt_cck_crc32_ok, fa_t->cnt_ofdm_crc32_ok,
1510 fa_t->cnt_ht_crc32_ok, fa_t->cnt_vht_crc32_ok,
1511 fa_t->cnt_crc32_ok_all);
1512 RT_PRINT(buf);
1513
1514 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1515 "\r\n [CRC32 Err Cnt] {CCK, OFDM, HT, VHT, Total} = {%d, %d, %d, %d, %d}",
1516 fa_t->cnt_cck_crc32_error, fa_t->cnt_ofdm_crc32_error,
1517 fa_t->cnt_ht_crc32_error, fa_t->cnt_vht_crc32_error,
1518 fa_t->cnt_crc32_error_all);
1519 RT_PRINT(buf);
1520
1521 if (fa_t->ofdm2_rate_idx) {
1522 phydm_print_rate_2_buff(dm, fa_t->ofdm2_rate_idx,
1523 dbg_buf, PHYDM_SNPRINT_SIZE);
1524 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1525 "\r\n [OFDM:%s CRC32 Cnt] {error, ok}= {%d, %d} (%d percent)",
1526 dbg_buf, fa_t->cnt_ofdm2_crc32_error,
1527 fa_t->cnt_ofdm2_crc32_ok, fa_t->ofdm2_pcr);
1528 RT_PRINT(buf);
1529 }
1530
1531 if (fa_t->ht2_rate_idx) {
1532 phydm_print_rate_2_buff(dm, fa_t->ht2_rate_idx, dbg_buf,
1533 PHYDM_SNPRINT_SIZE);
1534 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1535 "\r\n [HT :%s CRC32 Cnt] {error, ok}= {%d, %d} (%d percent)",
1536 dbg_buf, fa_t->cnt_ht2_crc32_error,
1537 fa_t->cnt_ht2_crc32_ok, fa_t->ht2_pcr);
1538 RT_PRINT(buf);
1539 }
1540
1541 #if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT))
1542 if (dm->support_ic_type & (ODM_IC_11AC_SERIES | ODM_IC_JGR3_SERIES)) {
1543 if (fa_t->vht2_rate_idx) {
1544 phydm_print_rate_2_buff(dm, fa_t->vht2_rate_idx,
1545 dbg_buf, PHYDM_SNPRINT_SIZE);
1546 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1547 "\r\n [VHT :%s CRC32 Cnt] {error, ok}= {%d, %d} (%d percent)",
1548 dbg_buf, fa_t->cnt_vht2_crc32_error,
1549 fa_t->cnt_vht2_crc32_ok, fa_t->vht2_pcr);
1550 RT_PRINT(buf);
1551 }
1552 }
1553 #endif
1554 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1555 "\r\n is_linked = %d, Num_client = %d, rssi_min = %d, IGI = 0x%x, bNoisy=%d\n",
1556 dm->is_linked, dm->number_linked_client, dm->rssi_min,
1557 dm->dm_dig_table.cur_ig_value, dm->noisy_decision);
1558 RT_PRINT(buf);
1559
1560 phydm_dm_summary_cli_win(dm, buf, target_macid);
1561 }
1562
1563 #ifdef CONFIG_PHYDM_DEBUG_FUNCTION
phydm_sbd_check(struct dm_struct * dm)1564 void phydm_sbd_check(
1565 struct dm_struct *dm)
1566 {
1567 static u32 pkt_cnt;
1568 static boolean sbd_state;
1569 u32 sym_count, count, value32;
1570
1571 if (sbd_state == 0) {
1572 pkt_cnt++;
1573 /*read SBD conter once every 5 packets*/
1574 if (pkt_cnt % 5 == 0) {
1575 odm_set_timer(dm, &dm->sbdcnt_timer, 0); /*@ms*/
1576 sbd_state = 1;
1577 }
1578 } else { /*read counter*/
1579 value32 = odm_get_bb_reg(dm, R_0xf98, MASKDWORD);
1580 sym_count = (value32 & 0x7C000000) >> 26;
1581 count = (value32 & 0x3F00000) >> 20;
1582 pr_debug("#SBD# sym_count %d count %d\n", sym_count, count);
1583 sbd_state = 0;
1584 }
1585 }
1586 #endif
1587
phydm_sbd_callback(struct phydm_timer_list * timer)1588 void phydm_sbd_callback(
1589 struct phydm_timer_list *timer)
1590 {
1591 #ifdef CONFIG_PHYDM_DEBUG_FUNCTION
1592 void *adapter = timer->Adapter;
1593 HAL_DATA_TYPE *hal_data = GET_HAL_DATA((PADAPTER)adapter);
1594 struct dm_struct *dm = &hal_data->DM_OutSrc;
1595
1596 #if USE_WORKITEM
1597 odm_schedule_work_item(&dm->sbdcnt_workitem);
1598 #else
1599 phydm_sbd_check(dm);
1600 #endif
1601 #endif
1602 }
1603
phydm_sbd_workitem_callback(void * context)1604 void phydm_sbd_workitem_callback(
1605 void *context)
1606 {
1607 #ifdef CONFIG_PHYDM_DEBUG_FUNCTION
1608 void *adapter = (void *)context;
1609 HAL_DATA_TYPE *hal_data = GET_HAL_DATA((PADAPTER)adapter);
1610 struct dm_struct *dm = &hal_data->DM_OutSrc;
1611
1612 phydm_sbd_check(dm);
1613 #endif
1614 }
1615 #endif
1616
phydm_reset_rx_rate_distribution(struct dm_struct * dm)1617 void phydm_reset_rx_rate_distribution(struct dm_struct *dm)
1618 {
1619 struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info;
1620
1621 odm_memory_set(dm, &dbg->num_qry_legacy_pkt[0], 0,
1622 (LEGACY_RATE_NUM * 2));
1623 odm_memory_set(dm, &dbg->num_qry_ht_pkt[0], 0,
1624 (HT_RATE_NUM * 2));
1625 odm_memory_set(dm, &dbg->num_qry_pkt_sc_20m[0], 0,
1626 (LOW_BW_RATE_NUM * 2));
1627
1628 dbg->ht_pkt_not_zero = false;
1629 dbg->low_bw_20_occur = false;
1630
1631 #if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT))
1632 odm_memory_set(dm, &dbg->num_qry_vht_pkt[0], 0, VHT_RATE_NUM * 2);
1633 odm_memory_set(dm, &dbg->num_qry_pkt_sc_40m[0], 0, LOW_BW_RATE_NUM * 2);
1634 #if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1) || (defined(PHYSTS_3RD_TYPE_SUPPORT))
1635 odm_memory_set(dm, &dbg->num_mu_vht_pkt[0], 0, VHT_RATE_NUM * 2);
1636 #endif
1637 dbg->vht_pkt_not_zero = false;
1638 dbg->low_bw_40_occur = false;
1639 #endif
1640 }
1641
phydm_rx_rate_distribution(void * dm_void)1642 void phydm_rx_rate_distribution(void *dm_void)
1643 {
1644 struct dm_struct *dm = (struct dm_struct *)dm_void;
1645 struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info;
1646 u8 i = 0;
1647 u8 rate_num = dm->num_rf_path, ss_ofst = 0;
1648
1649 PHYDM_DBG(dm, DBG_CMN, "[RxRate Cnt] =============>\n");
1650
1651 /*@======CCK=========================================================*/
1652 if (*dm->channel <= 14) {
1653 PHYDM_DBG(dm, DBG_CMN, "* CCK = {%d, %d, %d, %d}\n",
1654 dbg->num_qry_legacy_pkt[0],
1655 dbg->num_qry_legacy_pkt[1],
1656 dbg->num_qry_legacy_pkt[2],
1657 dbg->num_qry_legacy_pkt[3]);
1658 }
1659 /*@======OFDM========================================================*/
1660 PHYDM_DBG(dm, DBG_CMN, "* OFDM = {%d, %d, %d, %d, %d, %d, %d, %d}\n",
1661 dbg->num_qry_legacy_pkt[4], dbg->num_qry_legacy_pkt[5],
1662 dbg->num_qry_legacy_pkt[6], dbg->num_qry_legacy_pkt[7],
1663 dbg->num_qry_legacy_pkt[8], dbg->num_qry_legacy_pkt[9],
1664 dbg->num_qry_legacy_pkt[10], dbg->num_qry_legacy_pkt[11]);
1665
1666 /*@======HT==========================================================*/
1667 if (dbg->ht_pkt_not_zero) {
1668 for (i = 0; i < rate_num; i++) {
1669 ss_ofst = (i << 3);
1670
1671 PHYDM_DBG(dm, DBG_CMN,
1672 "* HT MCS[%d :%d ] = {%d, %d, %d, %d, %d, %d, %d, %d}\n",
1673 (ss_ofst), (ss_ofst + 7),
1674 dbg->num_qry_ht_pkt[ss_ofst + 0],
1675 dbg->num_qry_ht_pkt[ss_ofst + 1],
1676 dbg->num_qry_ht_pkt[ss_ofst + 2],
1677 dbg->num_qry_ht_pkt[ss_ofst + 3],
1678 dbg->num_qry_ht_pkt[ss_ofst + 4],
1679 dbg->num_qry_ht_pkt[ss_ofst + 5],
1680 dbg->num_qry_ht_pkt[ss_ofst + 6],
1681 dbg->num_qry_ht_pkt[ss_ofst + 7]);
1682 }
1683
1684 if (dbg->low_bw_20_occur) {
1685 for (i = 0; i < rate_num; i++) {
1686 ss_ofst = (i << 3);
1687
1688 PHYDM_DBG(dm, DBG_CMN,
1689 "* [Low BW 20M] HT MCS[%d :%d ] = {%d, %d, %d, %d, %d, %d, %d, %d}\n",
1690 (ss_ofst), (ss_ofst + 7),
1691 dbg->num_qry_pkt_sc_20m[ss_ofst + 0],
1692 dbg->num_qry_pkt_sc_20m[ss_ofst + 1],
1693 dbg->num_qry_pkt_sc_20m[ss_ofst + 2],
1694 dbg->num_qry_pkt_sc_20m[ss_ofst + 3],
1695 dbg->num_qry_pkt_sc_20m[ss_ofst + 4],
1696 dbg->num_qry_pkt_sc_20m[ss_ofst + 5],
1697 dbg->num_qry_pkt_sc_20m[ss_ofst + 6],
1698 dbg->num_qry_pkt_sc_20m[ss_ofst + 7]);
1699 }
1700 }
1701 }
1702
1703 #if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT))
1704 /*@======VHT==========================================================*/
1705 if (dbg->vht_pkt_not_zero) {
1706 for (i = 0; i < rate_num; i++) {
1707 ss_ofst = 10 * i;
1708
1709 PHYDM_DBG(dm, DBG_CMN,
1710 "* VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}\n",
1711 (i + 1),
1712 dbg->num_qry_vht_pkt[ss_ofst + 0],
1713 dbg->num_qry_vht_pkt[ss_ofst + 1],
1714 dbg->num_qry_vht_pkt[ss_ofst + 2],
1715 dbg->num_qry_vht_pkt[ss_ofst + 3],
1716 dbg->num_qry_vht_pkt[ss_ofst + 4],
1717 dbg->num_qry_vht_pkt[ss_ofst + 5],
1718 dbg->num_qry_vht_pkt[ss_ofst + 6],
1719 dbg->num_qry_vht_pkt[ss_ofst + 7],
1720 dbg->num_qry_vht_pkt[ss_ofst + 8],
1721 dbg->num_qry_vht_pkt[ss_ofst + 9]);
1722 }
1723
1724 if (dbg->low_bw_20_occur) {
1725 for (i = 0; i < rate_num; i++) {
1726 ss_ofst = 10 * i;
1727
1728 PHYDM_DBG(dm, DBG_CMN,
1729 "*[Low BW 20M] VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}\n",
1730 (i + 1),
1731 dbg->num_qry_pkt_sc_20m[ss_ofst + 0],
1732 dbg->num_qry_pkt_sc_20m[ss_ofst + 1],
1733 dbg->num_qry_pkt_sc_20m[ss_ofst + 2],
1734 dbg->num_qry_pkt_sc_20m[ss_ofst + 3],
1735 dbg->num_qry_pkt_sc_20m[ss_ofst + 4],
1736 dbg->num_qry_pkt_sc_20m[ss_ofst + 5],
1737 dbg->num_qry_pkt_sc_20m[ss_ofst + 6],
1738 dbg->num_qry_pkt_sc_20m[ss_ofst + 7],
1739 dbg->num_qry_pkt_sc_20m[ss_ofst + 8],
1740 dbg->num_qry_pkt_sc_20m[ss_ofst + 9]);
1741 }
1742 }
1743
1744 if (dbg->low_bw_40_occur) {
1745 for (i = 0; i < rate_num; i++) {
1746 ss_ofst = 10 * i;
1747
1748 PHYDM_DBG(dm, DBG_CMN,
1749 "*[Low BW 40M] VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}\n",
1750 (i + 1),
1751 dbg->num_qry_pkt_sc_40m[ss_ofst + 0],
1752 dbg->num_qry_pkt_sc_40m[ss_ofst + 1],
1753 dbg->num_qry_pkt_sc_40m[ss_ofst + 2],
1754 dbg->num_qry_pkt_sc_40m[ss_ofst + 3],
1755 dbg->num_qry_pkt_sc_40m[ss_ofst + 4],
1756 dbg->num_qry_pkt_sc_40m[ss_ofst + 5],
1757 dbg->num_qry_pkt_sc_40m[ss_ofst + 6],
1758 dbg->num_qry_pkt_sc_40m[ss_ofst + 7],
1759 dbg->num_qry_pkt_sc_40m[ss_ofst + 8],
1760 dbg->num_qry_pkt_sc_40m[ss_ofst + 9]);
1761 }
1762 }
1763 }
1764 #endif
1765 }
1766
phydm_rx_utility(void * dm_void,u16 avg_phy_rate,u8 rx_max_ss,enum channel_width bw)1767 u16 phydm_rx_utility(void *dm_void, u16 avg_phy_rate, u8 rx_max_ss,
1768 enum channel_width bw)
1769 {
1770 struct dm_struct *dm = (struct dm_struct *)dm_void;
1771 struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info;
1772 u16 utility_primitive = 0, utility = 0;
1773
1774 if (dbg->ht_pkt_not_zero) {
1775 /*@ MCS7 20M: tp = 65, 1000/65 = 15.38, 65*15.5 = 1007*/
1776 utility_primitive = avg_phy_rate * 15 + (avg_phy_rate >> 1);
1777 }
1778 #if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT))
1779 else if (dbg->vht_pkt_not_zero) {
1780 /*@ VHT 1SS MCS9(fake) 20M: tp = 90, 1000/90 = 11.11, 65*11.125 = 1001*/
1781 utility_primitive = avg_phy_rate * 11 + (avg_phy_rate >> 3);
1782 }
1783 #endif
1784 else {
1785 /*@ 54M, 1000/54 = 18.5, 54*18.5 = 999*/
1786 utility_primitive = avg_phy_rate * 18 + (avg_phy_rate >> 1);
1787 }
1788
1789 utility = (utility_primitive / rx_max_ss) >> bw;
1790
1791 if (utility > 1000)
1792 utility = 1000;
1793
1794 return utility;
1795 }
1796
phydm_rx_avg_phy_rate(void * dm_void)1797 u16 phydm_rx_avg_phy_rate(void *dm_void)
1798 {
1799 struct dm_struct *dm = (struct dm_struct *)dm_void;
1800 struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info;
1801 u8 i = 0, rate_num = 0, rate_base = 0;
1802 u16 rate = 0, avg_phy_rate = 0;
1803 u32 pkt_cnt = 0, phy_rate_sum = 0;
1804
1805 if (dbg->ht_pkt_not_zero) {
1806 rate_num = HT_RATE_NUM;
1807 rate_base = ODM_RATEMCS0;
1808 for (i = 0; i < rate_num; i++) {
1809 rate = phy_rate_table[i + rate_base] << *dm->band_width;
1810 phy_rate_sum += dbg->num_qry_ht_pkt[i] * rate;
1811 pkt_cnt += dbg->num_qry_ht_pkt[i];
1812 }
1813 }
1814 #if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT))
1815 else if (dbg->vht_pkt_not_zero) {
1816 rate_num = VHT_RATE_NUM;
1817 rate_base = ODM_RATEVHTSS1MCS0;
1818 for (i = 0; i < rate_num; i++) {
1819 rate = phy_rate_table[i + rate_base] << *dm->band_width;
1820 phy_rate_sum += dbg->num_qry_vht_pkt[i] * rate;
1821 pkt_cnt += dbg->num_qry_vht_pkt[i];
1822 }
1823 }
1824 #endif
1825 else {
1826 for (i = ODM_RATE1M; i <= ODM_RATE54M; i++) {
1827 /*SKIP 1M & 6M for beacon case*/
1828 if (*dm->channel < 36 && i == ODM_RATE1M)
1829 continue;
1830
1831 if (*dm->channel >= 36 && i == ODM_RATE6M)
1832 continue;
1833
1834 rate = phy_rate_table[i];
1835 phy_rate_sum += dbg->num_qry_legacy_pkt[i] * rate;
1836 pkt_cnt += dbg->num_qry_legacy_pkt[i];
1837 }
1838 }
1839
1840 #if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT))
1841 if (dbg->low_bw_40_occur) {
1842 for (i = 0; i < LOW_BW_RATE_NUM; i++) {
1843 rate = phy_rate_table[i + rate_base]
1844 << CHANNEL_WIDTH_40;
1845 phy_rate_sum += dbg->num_qry_pkt_sc_40m[i] * rate;
1846 pkt_cnt += dbg->num_qry_pkt_sc_40m[i];
1847 }
1848 }
1849 #endif
1850
1851 if (dbg->low_bw_20_occur) {
1852 for (i = 0; i < LOW_BW_RATE_NUM; i++) {
1853 rate = phy_rate_table[i + rate_base];
1854 phy_rate_sum += dbg->num_qry_pkt_sc_20m[i] * rate;
1855 pkt_cnt += dbg->num_qry_pkt_sc_20m[i];
1856 }
1857 }
1858
1859 avg_phy_rate = (pkt_cnt == 0) ? 0 : (u16)(phy_rate_sum / pkt_cnt);
1860
1861 return avg_phy_rate;
1862 }
1863
phydm_print_hist_2_buf(void * dm_void,u16 * val,u16 len,char * buf,u16 buf_size)1864 void phydm_print_hist_2_buf(void *dm_void, u16 *val, u16 len, char *buf,
1865 u16 buf_size)
1866 {
1867 struct dm_struct *dm = (struct dm_struct *)dm_void;
1868
1869 if (len == PHY_HIST_SIZE) {
1870 PHYDM_SNPRINTF(buf, buf_size,
1871 "[%.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d]",
1872 val[0], val[1], val[2], val[3], val[4],
1873 val[5], val[6], val[7], val[8], val[9],
1874 val[10], val[11]);
1875 } else if (len == (PHY_HIST_SIZE - 1)) {
1876 PHYDM_SNPRINTF(buf, buf_size,
1877 "[%.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d]",
1878 val[0], val[1], val[2], val[3], val[4],
1879 val[5], val[6], val[7], val[8], val[9],
1880 val[10]);
1881 }
1882 }
1883
phydm_nss_hitogram(void * dm_void,enum PDM_RATE_TYPE rate_type)1884 void phydm_nss_hitogram(void *dm_void, enum PDM_RATE_TYPE rate_type)
1885 {
1886 struct dm_struct *dm = (struct dm_struct *)dm_void;
1887 struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info;
1888 struct phydm_phystatus_statistic *dbg_s = &dbg_i->physts_statistic_info;
1889 char buf[PHYDM_SNPRINT_SIZE] = {0};
1890 u16 buf_size = PHYDM_SNPRINT_SIZE;
1891 u16 h_size = PHY_HIST_SIZE;
1892 u16 *evm_hist = &dbg_s->evm_1ss_hist[0];
1893 u16 *snr_hist = &dbg_s->snr_1ss_hist[0];
1894 u8 i = 0;
1895 u8 ss = phydm_rate_type_2_num_ss(dm, rate_type);
1896
1897 for (i = 0; i < ss; i++) {
1898 if (rate_type == PDM_1SS) {
1899 evm_hist = &dbg_s->evm_1ss_hist[0];
1900 snr_hist = &dbg_s->snr_1ss_hist[0];
1901 } else if (rate_type == PDM_2SS) {
1902 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
1903 evm_hist = &dbg_s->evm_2ss_hist[i][0];
1904 snr_hist = &dbg_s->snr_2ss_hist[i][0];
1905 #endif
1906 } else if (rate_type == PDM_3SS) {
1907 #if (defined(PHYDM_COMPILE_ABOVE_3SS))
1908 evm_hist = &dbg_s->evm_3ss_hist[i][0];
1909 snr_hist = &dbg_s->snr_3ss_hist[i][0];
1910 #endif
1911 } else if (rate_type == PDM_4SS) {
1912 #if (defined(PHYDM_COMPILE_ABOVE_4SS))
1913 evm_hist = &dbg_s->evm_4ss_hist[i][0];
1914 snr_hist = &dbg_s->snr_4ss_hist[i][0];
1915 #endif
1916 }
1917
1918 phydm_print_hist_2_buf(dm, evm_hist, h_size, buf, buf_size);
1919 PHYDM_DBG(dm, DBG_CMN, "[%d-SS][EVM][%d]=%s\n", ss, i, buf);
1920 phydm_print_hist_2_buf(dm, snr_hist, h_size, buf, buf_size);
1921 PHYDM_DBG(dm, DBG_CMN, "[%d-SS][SNR][%d]=%s\n", ss, i, buf);
1922 }
1923 }
1924
1925 #ifdef PHYDM_PHYSTAUS_AUTO_SWITCH
phydm_show_cn_hitogram(void * dm_void)1926 void phydm_show_cn_hitogram(void *dm_void)
1927 {
1928 struct dm_struct *dm = (struct dm_struct *)dm_void;
1929 struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info;
1930 struct phydm_phystatus_statistic *dbg_s = &dbg_i->physts_statistic_info;
1931 u16 th_tmp[PHY_HIST_TH_SIZE];
1932 char buf[PHYDM_SNPRINT_SIZE] = {0};
1933 u8 i = 0;
1934 u16 *cn_hist = NULL;
1935 u32 cn_avg = 0;
1936
1937 if (!dm->pkt_proc_struct.physts_auto_swch_en)
1938 return;
1939
1940 if (dm->num_rf_path == 1)
1941 return;
1942
1943 PHYDM_DBG(dm, DBG_CMN, "[Condition number Histogram] ========>\n");
1944 /*@===[Threshold]=============================================================*/
1945 for (i = 0; i < PHY_HIST_TH_SIZE; i++)
1946 th_tmp[i] = dbg_i->cn_hist_th[i] >> 1;
1947
1948 phydm_print_hist_2_buf(dm, th_tmp,
1949 PHY_HIST_TH_SIZE, buf, PHYDM_SNPRINT_SIZE);
1950 PHYDM_DBG(dm, DBG_CMN, "%-24s=%s\n", "[CN_TH]", buf);
1951
1952 /*@===[Histogram]=============================================================*/
1953
1954 for (i = 1; i <= dm->num_rf_path; i++) {
1955 if (dbg_s->p4_cnt[i] == 0)
1956 continue;
1957
1958 cn_avg = PHYDM_DIV((dbg_s->cn_sum[i] +
1959 (dbg_s->p4_cnt[i] >> 1)) << 2,
1960 dbg_s->p4_cnt[i]); /*u(8,1)<<2 -> u(10,3)*/
1961
1962 cn_hist = &dbg_s->cn_hist[i][0];
1963 phydm_print_hist_2_buf(dm, cn_hist,
1964 PHY_HIST_SIZE, buf, PHYDM_SNPRINT_SIZE);
1965 PHYDM_DBG(dm, DBG_CMN, "[%d-SS]%s=(avg:%d.%4d)%s\n",
1966 i + 1, "[CN]", cn_avg >> 3,
1967 phydm_show_fraction_num(cn_avg & 0x7, 3), buf);
1968 }
1969 }
1970 #endif
1971
phydm_show_phy_hitogram(void * dm_void)1972 void phydm_show_phy_hitogram(void *dm_void)
1973 {
1974 struct dm_struct *dm = (struct dm_struct *)dm_void;
1975 struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info;
1976 struct phydm_phystatus_statistic *dbg_s = &dbg_i->physts_statistic_info;
1977 char buf[PHYDM_SNPRINT_SIZE] = {0};
1978 u16 buf_size = PHYDM_SNPRINT_SIZE;
1979 u16 th_size = PHY_HIST_SIZE - 1;
1980 u8 i = 0;
1981
1982 PHYDM_DBG(dm, DBG_CMN, "[PHY Histogram] ==============>\n");
1983 /*@===[Threshold]=============================================================*/
1984 phydm_print_hist_2_buf(dm, dbg_i->evm_hist_th, th_size, buf, buf_size);
1985 PHYDM_DBG(dm, DBG_CMN, "%-16s=%s\n", "[EVM_TH]", buf);
1986
1987 phydm_print_hist_2_buf(dm, dbg_i->snr_hist_th, th_size, buf, buf_size);
1988 PHYDM_DBG(dm, DBG_CMN, "%-16s=%s\n", "[SNR_TH]", buf);
1989 /*@===[OFDM]==================================================================*/
1990 if (dbg_s->rssi_ofdm_cnt) {
1991 phydm_print_hist_2_buf(dm, dbg_s->evm_ofdm_hist, PHY_HIST_SIZE,
1992 buf, buf_size);
1993 PHYDM_DBG(dm, DBG_CMN, "%-14s=%s\n", "[OFDM][EVM]", buf);
1994
1995 phydm_print_hist_2_buf(dm, dbg_s->snr_ofdm_hist, PHY_HIST_SIZE,
1996 buf, buf_size);
1997 PHYDM_DBG(dm, DBG_CMN, "%-14s=%s\n", "[OFDM][SNR]", buf);
1998 }
1999 /*@===[1-SS]==================================================================*/
2000 if (dbg_s->rssi_1ss_cnt)
2001 phydm_nss_hitogram(dm, PDM_1SS);
2002 /*@===[2-SS]==================================================================*/
2003 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
2004 if ((dm->support_ic_type & PHYDM_IC_ABOVE_2SS) && dbg_s->rssi_2ss_cnt)
2005 phydm_nss_hitogram(dm, PDM_2SS);
2006 #endif
2007 /*@===[3-SS]==================================================================*/
2008 #if (defined(PHYDM_COMPILE_ABOVE_3SS))
2009 if ((dm->support_ic_type & PHYDM_IC_ABOVE_3SS) && dbg_s->rssi_3ss_cnt)
2010 phydm_nss_hitogram(dm, PDM_3SS);
2011 #endif
2012 /*@===[4-SS]==================================================================*/
2013 #if (defined(PHYDM_COMPILE_ABOVE_4SS))
2014 if (dm->support_ic_type & PHYDM_IC_ABOVE_4SS && dbg_s->rssi_4ss_cnt)
2015 phydm_nss_hitogram(dm, PDM_4SS);
2016 #endif
2017 }
2018
phydm_avg_phy_val_nss(void * dm_void,u8 nss)2019 void phydm_avg_phy_val_nss(void *dm_void, u8 nss)
2020 {
2021 struct dm_struct *dm = (struct dm_struct *)dm_void;
2022 struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info;
2023 struct phydm_phystatus_statistic *dbg_s = &dbg_i->physts_statistic_info;
2024 struct phydm_phystatus_avg *dbg_avg = &dbg_i->phystatus_statistic_avg;
2025 char *rate_type = NULL;
2026 u32 *tmp_cnt = NULL;
2027 u8 *tmp_rssi_avg = NULL;
2028 u32 *tmp_rssi_sum = NULL;
2029 u8 *tmp_snr_avg = NULL;
2030 u32 *tmp_snr_sum = NULL;
2031 u8 *tmp_evm_avg = NULL;
2032 u32 *tmp_evm_sum = NULL;
2033 u8 evm_rpt_show[RF_PATH_MEM_SIZE];
2034 u8 i = 0;
2035
2036 odm_memory_set(dm, &evm_rpt_show[0], 0, RF_PATH_MEM_SIZE);
2037
2038 switch (nss) {
2039 #if (defined(PHYDM_COMPILE_ABOVE_4SS))
2040 case 4:
2041 rate_type = "[4-SS]";
2042 tmp_cnt = &dbg_s->rssi_4ss_cnt;
2043 tmp_rssi_avg = &dbg_avg->rssi_4ss_avg[0];
2044 tmp_snr_avg = &dbg_avg->snr_4ss_avg[0];
2045 tmp_rssi_sum = &dbg_s->rssi_4ss_sum[0];
2046 tmp_snr_sum = &dbg_s->snr_4ss_sum[0];
2047 tmp_evm_avg = &dbg_avg->evm_4ss_avg[0];
2048 tmp_evm_sum = &dbg_s->evm_4ss_sum[0];
2049 break;
2050 #endif
2051 #if (defined(PHYDM_COMPILE_ABOVE_3SS))
2052 case 3:
2053 rate_type = "[3-SS]";
2054 tmp_cnt = &dbg_s->rssi_3ss_cnt;
2055 tmp_rssi_avg = &dbg_avg->rssi_3ss_avg[0];
2056 tmp_snr_avg = &dbg_avg->snr_3ss_avg[0];
2057 tmp_rssi_sum = &dbg_s->rssi_3ss_sum[0];
2058 tmp_snr_sum = &dbg_s->snr_3ss_sum[0];
2059 tmp_evm_avg = &dbg_avg->evm_3ss_avg[0];
2060 tmp_evm_sum = &dbg_s->evm_3ss_sum[0];
2061 break;
2062 #endif
2063 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
2064 case 2:
2065 rate_type = "[2-SS]";
2066 tmp_cnt = &dbg_s->rssi_2ss_cnt;
2067 tmp_rssi_avg = &dbg_avg->rssi_2ss_avg[0];
2068 tmp_snr_avg = &dbg_avg->snr_2ss_avg[0];
2069 tmp_rssi_sum = &dbg_s->rssi_2ss_sum[0];
2070 tmp_snr_sum = &dbg_s->snr_2ss_sum[0];
2071 tmp_evm_avg = &dbg_avg->evm_2ss_avg[0];
2072 tmp_evm_sum = &dbg_s->evm_2ss_sum[0];
2073 break;
2074 #endif
2075 case 1:
2076 rate_type = "[1-SS]";
2077 tmp_cnt = &dbg_s->rssi_1ss_cnt;
2078 tmp_rssi_avg = &dbg_avg->rssi_1ss_avg[0];
2079 tmp_snr_avg = &dbg_avg->snr_1ss_avg[0];
2080 tmp_rssi_sum = &dbg_s->rssi_1ss_sum[0];
2081 tmp_snr_sum = &dbg_s->snr_1ss_sum[0];
2082 tmp_evm_avg = &dbg_avg->evm_1ss_avg;
2083 tmp_evm_sum = &dbg_s->evm_1ss_sum;
2084 break;
2085 case 0:
2086 rate_type = "[L-OFDM]";
2087 tmp_cnt = &dbg_s->rssi_ofdm_cnt;
2088 tmp_rssi_avg = &dbg_avg->rssi_ofdm_avg[0];
2089 tmp_snr_avg = &dbg_avg->snr_ofdm_avg[0];
2090 tmp_rssi_sum = &dbg_s->rssi_ofdm_sum[0];
2091 tmp_snr_sum = &dbg_s->snr_ofdm_sum[0];
2092 tmp_evm_avg = &dbg_avg->evm_ofdm_avg;
2093 tmp_evm_sum = &dbg_s->evm_ofdm_sum;
2094 break;
2095 default:
2096 PHYDM_DBG(dm, DBG_CMN, "[warning] %s\n", __func__);
2097 return;
2098 }
2099
2100 if (*tmp_cnt != 0) {
2101 for (i = 0; i < dm->num_rf_path; i++) {
2102 tmp_rssi_avg[i] = (u8)(tmp_rssi_sum[i] / *tmp_cnt);
2103 tmp_snr_avg[i] = (u8)(tmp_snr_sum[i] / *tmp_cnt);
2104 }
2105
2106 if (nss == 0 || nss == 1) {
2107 *tmp_evm_avg = (u8)(*tmp_evm_sum / *tmp_cnt);
2108 evm_rpt_show[0] = *tmp_evm_avg;
2109 } else {
2110 for (i = 0; i < nss; i++) {
2111 tmp_evm_avg[i] = (u8)(tmp_evm_sum[i] /
2112 *tmp_cnt);
2113 evm_rpt_show[i] = tmp_evm_avg[i];
2114 }
2115 }
2116 }
2117
2118 #if (defined(PHYDM_COMPILE_ABOVE_4SS))
2119 PHYDM_DBG(dm, DBG_CMN,
2120 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d, %.2d} SNR:{%.2d, %.2d, %.2d, %.2d} EVM:{-%.2d, -%.2d, -%.2d, -%.2d}\n",
2121 rate_type, *tmp_cnt,
2122 tmp_rssi_avg[0], tmp_rssi_avg[1], tmp_rssi_avg[2],
2123 tmp_rssi_avg[3], tmp_snr_avg[0], tmp_snr_avg[1],
2124 tmp_snr_avg[2], tmp_snr_avg[3], evm_rpt_show[0],
2125 evm_rpt_show[1], evm_rpt_show[2], evm_rpt_show[3]);
2126 #elif (defined(PHYDM_COMPILE_ABOVE_3SS))
2127 PHYDM_DBG(dm, DBG_CMN,
2128 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d} SNR:{%.2d, %.2d, %.2d} EVM:{-%.2d, -%.2d, -%.2d}\n",
2129 rate_type, *tmp_cnt,
2130 tmp_rssi_avg[0], tmp_rssi_avg[1], tmp_rssi_avg[2],
2131 tmp_snr_avg[0], tmp_snr_avg[1], tmp_snr_avg[2],
2132 evm_rpt_show[0], evm_rpt_show[1], evm_rpt_show[2]);
2133 #elif (defined(PHYDM_COMPILE_ABOVE_2SS))
2134 PHYDM_DBG(dm, DBG_CMN,
2135 "* %-8s Cnt= ((%.3d)) RSSI:{%.2d, %.2d} SNR:{%.2d, %.2d} EVM:{-%.2d, -%.2d}\n",
2136 rate_type, *tmp_cnt,
2137 tmp_rssi_avg[0], tmp_rssi_avg[1],
2138 tmp_snr_avg[0], tmp_snr_avg[1],
2139 evm_rpt_show[0], evm_rpt_show[1]);
2140 #else
2141 PHYDM_DBG(dm, DBG_CMN,
2142 "* %-8s Cnt= ((%.3d)) RSSI:{%.2d} SNR:{%.2d} EVM:{-%.2d}\n",
2143 rate_type, *tmp_cnt,
2144 tmp_rssi_avg[0], tmp_snr_avg[0], evm_rpt_show[0]);
2145 #endif
2146 }
2147
phydm_get_avg_phystatus_val(void * dm_void)2148 void phydm_get_avg_phystatus_val(void *dm_void)
2149 {
2150 struct dm_struct *dm = (struct dm_struct *)dm_void;
2151 struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info;
2152 struct phydm_phystatus_statistic *dbg_s = &dbg_i->physts_statistic_info;
2153 struct phydm_phystatus_avg *dbg_avg = &dbg_i->phystatus_statistic_avg;
2154 u32 avg_tmp = 0;
2155 u8 i = 0;
2156
2157 PHYDM_DBG(dm, DBG_CMN, "[PHY Avg] ==============>\n");
2158 phydm_reset_phystatus_avg(dm);
2159
2160 /*@===[Beacon]===*/
2161 if (dbg_s->rssi_beacon_cnt) {
2162 for (i = 0; i < dm->num_rf_path; i++) {
2163 avg_tmp = dbg_s->rssi_beacon_sum[i] /
2164 dbg_s->rssi_beacon_cnt;
2165 dbg_avg->rssi_beacon_avg[i] = (u8)avg_tmp;
2166 }
2167 }
2168
2169 switch (dm->num_rf_path) {
2170 #if (defined(PHYDM_COMPILE_ABOVE_4SS))
2171 case 4:
2172 PHYDM_DBG(dm, DBG_CMN,
2173 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d, %.2d}\n",
2174 "[Beacon]", dbg_s->rssi_beacon_cnt,
2175 dbg_avg->rssi_beacon_avg[0],
2176 dbg_avg->rssi_beacon_avg[1],
2177 dbg_avg->rssi_beacon_avg[2],
2178 dbg_avg->rssi_beacon_avg[3]);
2179 break;
2180 #endif
2181 #if (defined(PHYDM_COMPILE_ABOVE_3SS))
2182 case 3:
2183 PHYDM_DBG(dm, DBG_CMN,
2184 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d}\n",
2185 "[Beacon]", dbg_s->rssi_beacon_cnt,
2186 dbg_avg->rssi_beacon_avg[0],
2187 dbg_avg->rssi_beacon_avg[1],
2188 dbg_avg->rssi_beacon_avg[2]);
2189 break;
2190 #endif
2191 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
2192 case 2:
2193 PHYDM_DBG(dm, DBG_CMN,
2194 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d}\n",
2195 "[Beacon]", dbg_s->rssi_beacon_cnt,
2196 dbg_avg->rssi_beacon_avg[0],
2197 dbg_avg->rssi_beacon_avg[1]);
2198 break;
2199 #endif
2200 default:
2201 PHYDM_DBG(dm, DBG_CMN, "* %-8s Cnt=((%.3d)) RSSI:{%.2d}\n",
2202 "[Beacon]", dbg_s->rssi_beacon_cnt,
2203 dbg_avg->rssi_beacon_avg[0]);
2204 break;
2205 }
2206
2207 /*@===[CCK]===*/
2208 if (dbg_s->rssi_cck_cnt) {
2209 dbg_avg->rssi_cck_avg = (u8)(dbg_s->rssi_cck_sum /
2210 dbg_s->rssi_cck_cnt);
2211 #ifdef PHYSTS_3RD_TYPE_SUPPORT
2212 if (dm->support_ic_type & PHYSTS_3RD_TYPE_IC) {
2213 for (i = 0; i < dm->num_rf_path - 1; i++) {
2214 avg_tmp = dbg_s->rssi_cck_sum_abv_2ss[i] /
2215 dbg_s->rssi_cck_cnt;
2216 dbg_avg->rssi_cck_avg_abv_2ss[i] = (u8)avg_tmp;
2217 }
2218 }
2219 #endif
2220 }
2221
2222 switch (dm->num_rf_path) {
2223 #ifdef PHYSTS_3RD_TYPE_SUPPORT
2224 #if (defined(PHYDM_COMPILE_ABOVE_4SS))
2225 case 4:
2226 PHYDM_DBG(dm, DBG_CMN,
2227 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d, %.2d}\n",
2228 "[CCK]", dbg_s->rssi_cck_cnt, dbg_avg->rssi_cck_avg,
2229 dbg_avg->rssi_cck_avg_abv_2ss[0],
2230 dbg_avg->rssi_cck_avg_abv_2ss[1],
2231 dbg_avg->rssi_cck_avg_abv_2ss[2]);
2232 break;
2233 #endif
2234 #if (defined(PHYDM_COMPILE_ABOVE_3SS))
2235 case 3:
2236 PHYDM_DBG(dm, DBG_CMN,
2237 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d}\n",
2238 "[CCK]", dbg_s->rssi_cck_cnt, dbg_avg->rssi_cck_avg,
2239 dbg_avg->rssi_cck_avg_abv_2ss[0],
2240 dbg_avg->rssi_cck_avg_abv_2ss[1]);
2241 break;
2242 #endif
2243 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
2244 case 2:
2245 PHYDM_DBG(dm, DBG_CMN,
2246 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d}\n",
2247 "[CCK]", dbg_s->rssi_cck_cnt, dbg_avg->rssi_cck_avg,
2248 dbg_avg->rssi_cck_avg_abv_2ss[0]);
2249 break;
2250 #endif
2251 #endif
2252 default:
2253 PHYDM_DBG(dm, DBG_CMN, "* %-8s Cnt=((%.3d)) RSSI:{%.2d}\n",
2254 "[CCK]", dbg_s->rssi_cck_cnt, dbg_avg->rssi_cck_avg);
2255 break;
2256 }
2257
2258 for (i = 0; i <= dm->num_rf_path; i++)
2259 phydm_avg_phy_val_nss(dm, i);
2260 }
2261
phydm_get_phy_statistic(void * dm_void)2262 void phydm_get_phy_statistic(void *dm_void)
2263 {
2264 struct dm_struct *dm = (struct dm_struct *)dm_void;
2265 struct cmn_sta_info *sta = dm->phydm_sta_info[dm->one_entry_macid];
2266 enum channel_width bw;
2267 u16 avg_phy_rate = 0;
2268 u16 utility = 0;
2269 u8 rx_ss = 1;
2270
2271 avg_phy_rate = phydm_rx_avg_phy_rate(dm);
2272
2273 if (dm->is_one_entry_only && is_sta_active(sta)) {
2274 rx_ss = phydm_get_rx_stream_num(dm, sta->mimo_type);
2275 bw = sta->bw_mode;
2276 utility = phydm_rx_utility(dm, avg_phy_rate, rx_ss, bw);
2277 }
2278 PHYDM_DBG(dm, DBG_CMN, "Avg_rx_rate = %d, rx_utility=( %d / 1000 )\n",
2279 avg_phy_rate, utility);
2280
2281 phydm_rx_rate_distribution(dm);
2282 phydm_reset_rx_rate_distribution(dm);
2283
2284 phydm_show_phy_hitogram(dm);
2285 #ifdef PHYDM_PHYSTAUS_AUTO_SWITCH
2286 phydm_show_cn_hitogram(dm);
2287 #endif
2288 phydm_get_avg_phystatus_val(dm);
2289 phydm_reset_phystatus_statistic(dm);
2290 };
2291
phydm_basic_dbg_msg_linked(void * dm_void)2292 void phydm_basic_dbg_msg_linked(void *dm_void)
2293 {
2294 struct dm_struct *dm = (struct dm_struct *)dm_void;
2295 struct phydm_cfo_track_struct *cfo_t = &dm->dm_cfo_track;
2296 struct odm_phy_dbg_info *dbg_t = &dm->phy_dbg_info;
2297 u16 macid, client_cnt = 0;
2298 u8 rate = 0;
2299 struct cmn_sta_info *entry = NULL;
2300 char dbg_buf[PHYDM_SNPRINT_SIZE] = {0};
2301 struct phydm_cfo_rpt cfo;
2302 u8 i = 0;
2303
2304 PHYDM_DBG(dm, DBG_CMN, "ID=((%d)), BW=((%d)), fc=((CH-%d))\n",
2305 dm->curr_station_id, 20 << *dm->band_width, *dm->channel);
2306
2307 #ifdef ODM_IC_11N_SERIES_SUPPORT
2308 #ifdef PHYDM_PRIMARY_CCA
2309 if (((*dm->channel <= 14) && (*dm->band_width == CHANNEL_WIDTH_40)) &&
2310 (dm->support_ic_type & ODM_IC_11N_SERIES) &&
2311 (dm->support_ability & ODM_BB_PRIMARY_CCA)) {
2312 PHYDM_DBG(dm, DBG_CMN, "Primary CCA at ((%s SB))\n",
2313 ((*dm->sec_ch_offset == SECOND_CH_AT_LSB) ? "U" :
2314 "L"));
2315 }
2316 #endif
2317 #endif
2318
2319 if (dm->cck_new_agc || dm->rx_rate > ODM_RATE11M) {
2320 PHYDM_DBG(dm, DBG_CMN, "[AGC Idx] {0x%x, 0x%x, 0x%x, 0x%x}\n",
2321 dm->ofdm_agc_idx[0], dm->ofdm_agc_idx[1],
2322 dm->ofdm_agc_idx[2], dm->ofdm_agc_idx[3]);
2323 } else {
2324 PHYDM_DBG(dm, DBG_CMN, "[CCK AGC Idx] {LNA,VGA}={0x%x, 0x%x}\n",
2325 dm->cck_lna_idx, dm->cck_vga_idx);
2326 }
2327
2328 phydm_print_rate_2_buff(dm, dm->rx_rate, dbg_buf, PHYDM_SNPRINT_SIZE);
2329 PHYDM_DBG(dm, DBG_CMN, "RSSI:{%d, %d, %d, %d}, RxRate:%s (0x%x)\n",
2330 (dm->rssi_a == 0xff) ? 0 : dm->rssi_a,
2331 (dm->rssi_b == 0xff) ? 0 : dm->rssi_b,
2332 (dm->rssi_c == 0xff) ? 0 : dm->rssi_c,
2333 (dm->rssi_d == 0xff) ? 0 : dm->rssi_d,
2334 dbg_buf, dm->rx_rate);
2335
2336 rate = dbg_t->beacon_phy_rate;
2337 phydm_print_rate_2_buff(dm, rate, dbg_buf, PHYDM_SNPRINT_SIZE);
2338
2339 PHYDM_DBG(dm, DBG_CMN, "Beacon_cnt=%d, rate_idx=%s (0x%x)\n",
2340 dbg_t->num_qry_beacon_pkt, dbg_buf, dbg_t->beacon_phy_rate);
2341
2342 phydm_get_phy_statistic(dm);
2343
2344 PHYDM_DBG(dm, DBG_CMN,
2345 "rxsc_idx {Legacy, 20, 40, 80} = {%d, %d, %d, %d}\n",
2346 dm->rxsc_l, dm->rxsc_20, dm->rxsc_40, dm->rxsc_80);
2347
2348 /*Print TX rate*/
2349 for (macid = 0; macid < ODM_ASSOCIATE_ENTRY_NUM; macid++) {
2350 entry = dm->phydm_sta_info[macid];
2351
2352 if (!is_sta_active(entry))
2353 continue;
2354
2355 rate = entry->ra_info.curr_tx_rate;
2356 phydm_print_rate_2_buff(dm, rate, dbg_buf, PHYDM_SNPRINT_SIZE);
2357 PHYDM_DBG(dm, DBG_CMN, "TxRate[%d]=%s (0x%x)\n",
2358 macid, dbg_buf, entry->ra_info.curr_tx_rate);
2359
2360 client_cnt++;
2361
2362 if (client_cnt >= dm->number_linked_client)
2363 break;
2364 }
2365
2366 PHYDM_DBG(dm, DBG_CMN,
2367 "TP {Tx, Rx, Total} = {%d, %d, %d}Mbps, Traffic_Load=(%d))\n",
2368 dm->tx_tp, dm->rx_tp, dm->total_tp, dm->traffic_load);
2369
2370 PHYDM_DBG(dm, DBG_CMN, "CFO_avg=((%d kHz)), CFO_traking = ((%s%d))\n",
2371 cfo_t->CFO_ave_pre,
2372 ((cfo_t->crystal_cap > cfo_t->def_x_cap) ? "+" : "-"),
2373 DIFF_2(cfo_t->crystal_cap, cfo_t->def_x_cap));
2374
2375 /* @CFO report */
2376 switch (dm->ic_ip_series) {
2377 #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
2378 case PHYDM_IC_JGR3:
2379 PHYDM_DBG(dm, DBG_CMN, "cfo_tail = {%d, %d, %d, %d}\n",
2380 dbg_t->cfo_tail[0], dbg_t->cfo_tail[1],
2381 dbg_t->cfo_tail[2], dbg_t->cfo_tail[3]);
2382 break;
2383 #endif
2384 default:
2385 phydm_get_cfo_info(dm, &cfo);
2386 for (i = 0; i < dm->num_rf_path; i++) {
2387 PHYDM_DBG(dm, DBG_CMN,
2388 "CFO[%d] {S, L, Sec, Acq, End} = {%d, %d, %d, %d, %d}\n",
2389 i, cfo.cfo_rpt_s[i], cfo.cfo_rpt_l[i],
2390 cfo.cfo_rpt_sec[i], cfo.cfo_rpt_acq[i],
2391 cfo.cfo_rpt_end[i]);
2392 }
2393 break;
2394 }
2395
2396 /* @Condition number */
2397 #if (RTL8822B_SUPPORT)
2398 if (dm->support_ic_type == ODM_RTL8822B) {
2399 PHYDM_DBG(dm, DBG_CMN, "Condi_Num=((%d.%.4d)), %d\n",
2400 dbg_t->condi_num >> 4,
2401 phydm_show_fraction_num(dbg_t->condi_num & 0xf, 4),
2402 dbg_t->condi_num);
2403 }
2404 #endif
2405 #ifdef PHYSTS_3RD_TYPE_SUPPORT
2406 if (dm->support_ic_type & PHYSTS_3RD_TYPE_IC) {
2407 PHYDM_DBG(dm, DBG_CMN, "Condi_Num=((%d.%4d dB))\n",
2408 dbg_t->condi_num >> 1,
2409 phydm_show_fraction_num(dbg_t->condi_num & 0x1, 1));
2410 }
2411 #endif
2412
2413 #if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT || defined(PHYSTS_3RD_TYPE_SUPPORT))
2414 /*STBC or LDPC pkt*/
2415 if (dm->support_ic_type & (PHYSTS_2ND_TYPE_IC | PHYSTS_3RD_TYPE_IC))
2416 PHYDM_DBG(dm, DBG_CMN, "Coding: LDPC=((%s)), STBC=((%s))\n",
2417 (dbg_t->is_ldpc_pkt) ? "Y" : "N",
2418 (dbg_t->is_stbc_pkt) ? "Y" : "N");
2419 #endif
2420
2421 #if (RTL8822C_SUPPORT)
2422 /*Beamformed pkt*/
2423 if (dm->support_ic_type == ODM_RTL8822C)
2424 PHYDM_DBG(dm, DBG_CMN, "Beamformed=((%s))\n",
2425 (dm->is_beamformed) ? "Y" : "N");
2426 #endif
2427 }
2428
phydm_dm_summary(void * dm_void,u8 macid)2429 void phydm_dm_summary(void *dm_void, u8 macid)
2430 {
2431 struct dm_struct *dm = (struct dm_struct *)dm_void;
2432 struct phydm_dig_struct *dig_t = &dm->dm_dig_table;
2433 struct phydm_cfo_track_struct *cfo_t = &dm->dm_cfo_track;
2434 struct cmn_sta_info *sta = NULL;
2435 struct ra_sta_info *ra = NULL;
2436 struct dtp_info *dtp = NULL;
2437 u64 comp = dm->support_ability;
2438 u64 pause_comp = dm->pause_ability;
2439
2440 if (!(dm->debug_components & DBG_DM_SUMMARY))
2441 return;
2442
2443 if (!dm->is_linked) {
2444 pr_debug("[%s]No Link !!!\n", __func__);
2445 return;
2446 }
2447
2448 sta = dm->phydm_sta_info[macid];
2449
2450 if (!is_sta_active(sta)) {
2451 pr_debug("[Warning] %s invalid STA, macid=%d\n",
2452 __func__, macid);
2453 return;
2454 }
2455
2456 ra = &sta->ra_info;
2457 dtp = &sta->dtp_stat;
2458 pr_debug("[%s]===========>\n", __func__);
2459
2460 pr_debug("00.(%s) %-12s: IGI=0x%x, Dyn_Rng=0x%x~0x%x, FA_th={%d,%d,%d}\n",
2461 ((comp & ODM_BB_DIG) ?
2462 ((pause_comp & ODM_BB_DIG) ? "P" : "V") : "."),
2463 "DIG",
2464 dig_t->cur_ig_value,
2465 dig_t->rx_gain_range_min, dig_t->rx_gain_range_max,
2466 dig_t->fa_th[0], dig_t->fa_th[1], dig_t->fa_th[2]);
2467
2468 pr_debug("01.(%s) %-12s: rssi_lv=%d, mask=0x%llx\n",
2469 ((comp & ODM_BB_RA_MASK) ?
2470 ((pause_comp & ODM_BB_RA_MASK) ? "P" : "V") : "."),
2471 "RaMask",
2472 ra->rssi_level, ra->ramask);
2473
2474 #ifdef CONFIG_DYNAMIC_TX_TWR
2475 pr_debug("02.(%s) %-12s: pwr_lv=%d\n",
2476 ((comp & ODM_BB_DYNAMIC_TXPWR) ?
2477 ((pause_comp & ODM_BB_DYNAMIC_TXPWR) ? "P" : "V") : "."),
2478 "DynTxPwr",
2479 dtp->sta_tx_high_power_lvl);
2480 #endif
2481
2482 pr_debug("05.(%s) %-12s: cck_pd_lv=%d\n",
2483 ((comp & ODM_BB_CCK_PD) ?
2484 ((pause_comp & ODM_BB_CCK_PD) ? "P" : "V") : "."),
2485 "CCK_PD", dm->dm_cckpd_table.cck_pd_lv);
2486
2487 #ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY
2488 pr_debug("06.(%s) %-12s: div_type=%d, curr_ant=%s\n",
2489 ((comp & ODM_BB_ANT_DIV) ?
2490 ((pause_comp & ODM_BB_ANT_DIV) ? "P" : "V") : "."),
2491 "ANT_DIV",
2492 dm->ant_div_type,
2493 (dm->dm_fat_table.rx_idle_ant == MAIN_ANT) ? "MAIN" : "AUX");
2494 #endif
2495
2496 #ifdef PHYDM_POWER_TRAINING_SUPPORT
2497 pr_debug("08.(%s) %-12s: PT_score=%d, disable_PT=%d\n",
2498 ((comp & ODM_BB_PWR_TRAIN) ?
2499 ((pause_comp & ODM_BB_PWR_TRAIN) ? "P" : "V") : "."),
2500 "PwrTrain",
2501 dm->pow_train_table.pow_train_score,
2502 dm->is_disable_power_training);
2503 #endif
2504
2505 #ifdef CONFIG_PHYDM_DFS_MASTER
2506 pr_debug("11.(%s) %-12s: dbg_mode=%d, region_domain=%d\n",
2507 ((comp & ODM_BB_DFS) ?
2508 ((pause_comp & ODM_BB_DFS) ? "P" : "V") : "."),
2509 "DFS",
2510 dm->dfs.dbg_mode, dm->dfs_region_domain);
2511 #endif
2512 #ifdef PHYDM_SUPPORT_ADAPTIVITY
2513 pr_debug("13.(%s) %-12s: th{l2h, h2l}={%d, %d}, edcca_flag=%d\n",
2514 ((comp & ODM_BB_ADAPTIVITY) ?
2515 ((pause_comp & ODM_BB_ADAPTIVITY) ? "P" : "V") : "."),
2516 "Adaptivity",
2517 dm->adaptivity.th_l2h, dm->adaptivity.th_h2l,
2518 dm->false_alm_cnt.edcca_flag);
2519 #endif
2520 pr_debug("14.(%s) %-12s: CFO_avg=%d kHz, CFO_traking=%s%d\n",
2521 ((comp & ODM_BB_CFO_TRACKING) ?
2522 ((pause_comp & ODM_BB_CFO_TRACKING) ? "P" : "V") : "."),
2523 "CfoTrack",
2524 cfo_t->CFO_ave_pre,
2525 ((cfo_t->crystal_cap > cfo_t->def_x_cap) ? "+" : "-"),
2526 DIFF_2(cfo_t->crystal_cap, cfo_t->def_x_cap));
2527
2528 pr_debug("15.(%s) %-12s: ratio{nhm, clm}={%d, %d}\n",
2529 ((comp & ODM_BB_ENV_MONITOR) ?
2530 ((pause_comp & ODM_BB_ENV_MONITOR) ? "P" : "V") : "."),
2531 "EnvMntr",
2532 dm->dm_ccx_info.nhm_ratio, dm->dm_ccx_info.clm_ratio);
2533
2534 #ifdef PHYDM_PRIMARY_CCA
2535 pr_debug("16.(%s) %-12s: CCA @ (%s SB)\n",
2536 ((comp & ODM_BB_PRIMARY_CCA) ?
2537 ((pause_comp & ODM_BB_PRIMARY_CCA) ? "P" : "V") : "."),
2538 "PriCCA",
2539 ((dm->dm_pri_cca.mf_state == MF_USC_LSC) ? "D" :
2540 ((dm->dm_pri_cca.mf_state == MF_LSC) ? "L" : "U")));
2541 #endif
2542 #ifdef CONFIG_ADAPTIVE_SOML
2543 pr_debug("17.(%s) %-12s: soml_en = %s\n",
2544 ((comp & ODM_BB_ADAPTIVE_SOML) ?
2545 ((pause_comp & ODM_BB_ADAPTIVE_SOML) ? "P" : "V") : "."),
2546 "A-SOML",
2547 (dm->dm_soml_table.soml_last_state == SOML_ON) ?
2548 "ON" : "OFF");
2549 #endif
2550 #ifdef PHYDM_LNA_SAT_CHK_SUPPORT
2551 pr_debug("18.(%s) %-12s:\n",
2552 ((comp & ODM_BB_LNA_SAT_CHK) ?
2553 ((pause_comp & ODM_BB_LNA_SAT_CHK) ? "P" : "V") : "."),
2554 "LNA_SAT_CHK");
2555 #endif
2556 }
2557
phydm_basic_dbg_message(void * dm_void)2558 void phydm_basic_dbg_message(void *dm_void)
2559 {
2560 struct dm_struct *dm = (struct dm_struct *)dm_void;
2561 struct phydm_fa_struct *fa_t = &dm->false_alm_cnt;
2562 struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info;
2563 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
2564 struct odm_phy_dbg_info *dbg_b = &dm->phy_dbg_info_win_bkp;
2565 #endif
2566 #ifdef NHM_SUPPORT
2567 struct ccx_info *ccx = &dm->dm_ccx_info;
2568 #endif
2569
2570 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
2571 /* backup memory*/
2572 odm_move_memory(dm, dbg_b, dbg, sizeof(struct odm_phy_dbg_info));
2573 #endif
2574
2575 if (!(dm->debug_components & DBG_CMN)) {
2576 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
2577 /* reset rx rate distribution*/
2578 phydm_reset_rx_rate_distribution(dm);
2579 /* cal & reset avg of rssi/snr/evm*/
2580 phydm_get_avg_phystatus_val(dm);
2581 /* reset sum of rssi/snr/evm*/
2582 phydm_reset_phystatus_statistic(dm);
2583 #endif
2584 return;
2585 }
2586
2587 if (dm->cmn_dbg_msg_cnt >= dm->cmn_dbg_msg_period) {
2588 dm->cmn_dbg_msg_cnt = PHYDM_WATCH_DOG_PERIOD;
2589 } else {
2590 dm->cmn_dbg_msg_cnt += PHYDM_WATCH_DOG_PERIOD;
2591 return;
2592 }
2593
2594 PHYDM_DBG(dm, DBG_CMN, "[%s] System up time: ((%d sec))---->\n",
2595 __func__, dm->phydm_sys_up_time);
2596
2597 if (dm->is_linked)
2598 phydm_basic_dbg_msg_linked(dm);
2599 else
2600 PHYDM_DBG(dm, DBG_CMN, "No Link !!!\n");
2601
2602 PHYDM_DBG(dm, DBG_CMN, "[CCA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}\n",
2603 fa_t->cnt_cck_cca, fa_t->cnt_ofdm_cca, fa_t->cnt_cca_all);
2604 PHYDM_DBG(dm, DBG_CMN, "[FA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}\n",
2605 fa_t->cnt_cck_fail, fa_t->cnt_ofdm_fail, fa_t->cnt_all);
2606 PHYDM_DBG(dm, DBG_CMN,
2607 "[OFDM FA] Parity=%d, Rate=%d, Fast_Fsync=%d, SBD=%d\n",
2608 fa_t->cnt_parity_fail, fa_t->cnt_rate_illegal,
2609 fa_t->cnt_fast_fsync, fa_t->cnt_sb_search_fail);
2610 PHYDM_DBG(dm, DBG_CMN, "[HT FA] CRC8=%d, MCS=%d\n",
2611 fa_t->cnt_crc8_fail, fa_t->cnt_mcs_fail);
2612 #if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT))
2613 if (dm->support_ic_type & (ODM_IC_11AC_SERIES | ODM_IC_JGR3_SERIES)) {
2614 PHYDM_DBG(dm, DBG_CMN,
2615 "[VHT FA] SIGA_CRC8=%d, SIGB_CRC8=%d, MCS=%d\n",
2616 fa_t->cnt_crc8_fail_vhta, fa_t->cnt_crc8_fail_vhtb,
2617 fa_t->cnt_mcs_fail_vht);
2618 }
2619 #endif
2620 PHYDM_DBG(dm, DBG_CMN,
2621 "[CRC32 OK Cnt] {CCK, OFDM, HT, VHT, Total} = {%d, %d, %d, %d, %d}\n",
2622 fa_t->cnt_cck_crc32_ok, fa_t->cnt_ofdm_crc32_ok,
2623 fa_t->cnt_ht_crc32_ok, fa_t->cnt_vht_crc32_ok,
2624 fa_t->cnt_crc32_ok_all);
2625 PHYDM_DBG(dm, DBG_CMN,
2626 "[CRC32 Err Cnt] {CCK, OFDM, HT, VHT, Total} = {%d, %d, %d, %d, %d}\n",
2627 fa_t->cnt_cck_crc32_error, fa_t->cnt_ofdm_crc32_error,
2628 fa_t->cnt_ht_crc32_error, fa_t->cnt_vht_crc32_error,
2629 fa_t->cnt_crc32_error_all);
2630
2631 PHYDM_DBG(dm, DBG_CMN,
2632 "is_linked = %d, Num_client = %d, rssi_min = %d, IGI = 0x%x, bNoisy=%d\n",
2633 dm->is_linked, dm->number_linked_client, dm->rssi_min,
2634 dm->dm_dig_table.cur_ig_value, dm->noisy_decision);
2635
2636 #ifdef NHM_SUPPORT
2637 if (dm->support_ability & ODM_BB_ENV_MONITOR) {
2638 PHYDM_DBG(dm, DBG_CMN,
2639 "[NHM] valid: %d percent, noise(RSSI) = %d\n",
2640 ccx->nhm_level_valid, ccx->nhm_level);
2641 }
2642 #endif
2643 }
2644
phydm_basic_profile(void * dm_void,u32 * _used,char * output,u32 * _out_len)2645 void phydm_basic_profile(void *dm_void, u32 *_used, char *output, u32 *_out_len)
2646 {
2647 #ifdef CONFIG_PHYDM_DEBUG_FUNCTION
2648 struct dm_struct *dm = (struct dm_struct *)dm_void;
2649 char *cut = NULL;
2650 char *ic_type = NULL;
2651 u32 used = *_used;
2652 u32 out_len = *_out_len;
2653 u32 date = 0;
2654 char *commit_by = NULL;
2655 u32 release_ver = 0;
2656
2657 PDM_SNPF(out_len, used, output + used, out_len - used, "%-35s\n",
2658 "% Basic Profile %");
2659
2660 if (dm->support_ic_type == ODM_RTL8188E) {
2661 #if (RTL8188E_SUPPORT)
2662 ic_type = "RTL8188E";
2663 date = RELEASE_DATE_8188E;
2664 commit_by = COMMIT_BY_8188E;
2665 release_ver = RELEASE_VERSION_8188E;
2666 #endif
2667 #if (RTL8812A_SUPPORT)
2668 } else if (dm->support_ic_type == ODM_RTL8812) {
2669 ic_type = "RTL8812A";
2670 date = RELEASE_DATE_8812A;
2671 commit_by = COMMIT_BY_8812A;
2672 release_ver = RELEASE_VERSION_8812A;
2673 #endif
2674 #if (RTL8821A_SUPPORT)
2675 } else if (dm->support_ic_type == ODM_RTL8821) {
2676 ic_type = "RTL8821A";
2677 date = RELEASE_DATE_8821A;
2678 commit_by = COMMIT_BY_8821A;
2679 release_ver = RELEASE_VERSION_8821A;
2680 #endif
2681 #if (RTL8192E_SUPPORT)
2682 } else if (dm->support_ic_type == ODM_RTL8192E) {
2683 ic_type = "RTL8192E";
2684 date = RELEASE_DATE_8192E;
2685 commit_by = COMMIT_BY_8192E;
2686 release_ver = RELEASE_VERSION_8192E;
2687 #endif
2688 #if (RTL8723B_SUPPORT)
2689 } else if (dm->support_ic_type == ODM_RTL8723B) {
2690 ic_type = "RTL8723B";
2691 date = RELEASE_DATE_8723B;
2692 commit_by = COMMIT_BY_8723B;
2693 release_ver = RELEASE_VERSION_8723B;
2694 #endif
2695 #if (RTL8814A_SUPPORT)
2696 } else if (dm->support_ic_type == ODM_RTL8814A) {
2697 ic_type = "RTL8814A";
2698 date = RELEASE_DATE_8814A;
2699 commit_by = COMMIT_BY_8814A;
2700 release_ver = RELEASE_VERSION_8814A;
2701 #endif
2702 #if (RTL8881A_SUPPORT)
2703 } else if (dm->support_ic_type == ODM_RTL8881A) {
2704 ic_type = "RTL8881A";
2705 #endif
2706 #if (RTL8822B_SUPPORT)
2707 } else if (dm->support_ic_type == ODM_RTL8822B) {
2708 ic_type = "RTL8822B";
2709 date = RELEASE_DATE_8822B;
2710 commit_by = COMMIT_BY_8822B;
2711 release_ver = RELEASE_VERSION_8822B;
2712 #endif
2713 #if (RTL8197F_SUPPORT)
2714 } else if (dm->support_ic_type == ODM_RTL8197F) {
2715 ic_type = "RTL8197F";
2716 date = RELEASE_DATE_8197F;
2717 commit_by = COMMIT_BY_8197F;
2718 release_ver = RELEASE_VERSION_8197F;
2719 #endif
2720 #if (RTL8703B_SUPPORT)
2721 } else if (dm->support_ic_type == ODM_RTL8703B) {
2722 ic_type = "RTL8703B";
2723 date = RELEASE_DATE_8703B;
2724 commit_by = COMMIT_BY_8703B;
2725 release_ver = RELEASE_VERSION_8703B;
2726 #endif
2727 #if (RTL8195A_SUPPORT)
2728 } else if (dm->support_ic_type == ODM_RTL8195A) {
2729 ic_type = "RTL8195A";
2730 #endif
2731 #if (RTL8188F_SUPPORT)
2732 } else if (dm->support_ic_type == ODM_RTL8188F) {
2733 ic_type = "RTL8188F";
2734 date = RELEASE_DATE_8188F;
2735 commit_by = COMMIT_BY_8188F;
2736 release_ver = RELEASE_VERSION_8188F;
2737 #endif
2738 #if (RTL8723D_SUPPORT)
2739 } else if (dm->support_ic_type == ODM_RTL8723D) {
2740 ic_type = "RTL8723D";
2741 date = RELEASE_DATE_8723D;
2742 commit_by = COMMIT_BY_8723D;
2743 release_ver = RELEASE_VERSION_8723D;
2744 #endif
2745 }
2746
2747 /* @JJ ADD 20161014 */
2748 #if (RTL8710B_SUPPORT)
2749 else if (dm->support_ic_type == ODM_RTL8710B) {
2750 ic_type = "RTL8710B";
2751 date = RELEASE_DATE_8710B;
2752 commit_by = COMMIT_BY_8710B;
2753 release_ver = RELEASE_VERSION_8710B;
2754 }
2755 #endif
2756
2757 #if (RTL8721D_SUPPORT)
2758 else if (dm->support_ic_type == ODM_RTL8721D) {
2759 ic_type = "RTL8721D";
2760 date = RELEASE_DATE_8721D;
2761 commit_by = COMMIT_BY_8721D;
2762 release_ver = RELEASE_VERSION_8721D;
2763 }
2764 #endif
2765
2766 #if (RTL8710C_SUPPORT)
2767 else if (dm->support_ic_type == ODM_RTL8710C) {
2768 ic_type = "RTL8710C";
2769 date = RELEASE_DATE_8710C;
2770 commit_by = COMMIT_BY_8710C;
2771 release_ver = RELEASE_VERSION_8710C;
2772 }
2773 #endif
2774
2775 #if (RTL8821C_SUPPORT)
2776 else if (dm->support_ic_type == ODM_RTL8821C) {
2777 ic_type = "RTL8821C";
2778 date = RELEASE_DATE_8821C;
2779 commit_by = COMMIT_BY_8821C;
2780 release_ver = RELEASE_VERSION_8821C;
2781 }
2782 #endif
2783
2784 /*@jj add 20170822*/
2785 #if (RTL8192F_SUPPORT)
2786 else if (dm->support_ic_type == ODM_RTL8192F) {
2787 ic_type = "RTL8192F";
2788 date = RELEASE_DATE_8192F;
2789 commit_by = COMMIT_BY_8192F;
2790 release_ver = RELEASE_VERSION_8192F;
2791 }
2792 #endif
2793
2794 #if (RTL8198F_SUPPORT)
2795 else if (dm->support_ic_type == ODM_RTL8198F) {
2796 ic_type = "RTL8198F";
2797 date = RELEASE_DATE_8198F;
2798 commit_by = COMMIT_BY_8198F;
2799 release_ver = RELEASE_VERSION_8198F;
2800 }
2801 #endif
2802
2803 #if (RTL8822C_SUPPORT)
2804 else if (dm->support_ic_type == ODM_RTL8822C) {
2805 ic_type = "RTL8822C";
2806 date = RELEASE_DATE_8822C;
2807 commit_by = COMMIT_BY_8822C;
2808 release_ver = RELEASE_VERSION_8822C;
2809 }
2810 #endif
2811
2812 #if (RTL8812F_SUPPORT)
2813 else if (dm->support_ic_type == ODM_RTL8812F) {
2814 ic_type = "RTL8812F";
2815 date = RELEASE_DATE_8812F;
2816 commit_by = COMMIT_BY_8812F;
2817 release_ver = RELEASE_VERSION_8812F;
2818 }
2819 #endif
2820
2821 #if (RTL8197G_SUPPORT)
2822 else if (dm->support_ic_type == ODM_RTL8197G) {
2823 ic_type = "RTL8197G";
2824 date = RELEASE_DATE_8197G;
2825 commit_by = COMMIT_BY_8197G;
2826 release_ver = RELEASE_VERSION_8197G;
2827 }
2828 #endif
2829
2830 #if (RTL8814B_SUPPORT)
2831 else if (dm->support_ic_type == ODM_RTL8814B) {
2832 ic_type = "RTL8814B";
2833 date = RELEASE_DATE_8814B;
2834 commit_by = COMMIT_BY_8814B;
2835 release_ver = RELEASE_VERSION_8814B;
2836 }
2837 #endif
2838
2839 PDM_SNPF(out_len, used, output + used, out_len - used,
2840 " %-35s: %s (MP Chip: %s)\n", "IC type", ic_type,
2841 dm->is_mp_chip ? "Yes" : "No");
2842
2843 if (dm->cut_version == ODM_CUT_A)
2844 cut = "A";
2845 else if (dm->cut_version == ODM_CUT_B)
2846 cut = "B";
2847 else if (dm->cut_version == ODM_CUT_C)
2848 cut = "C";
2849 else if (dm->cut_version == ODM_CUT_D)
2850 cut = "D";
2851 else if (dm->cut_version == ODM_CUT_E)
2852 cut = "E";
2853 else if (dm->cut_version == ODM_CUT_F)
2854 cut = "F";
2855 else if (dm->cut_version == ODM_CUT_G)
2856 cut = "G";
2857 else if (dm->cut_version == ODM_CUT_H)
2858 cut = "H";
2859 else if (dm->cut_version == ODM_CUT_I)
2860 cut = "I";
2861 else if (dm->cut_version == ODM_CUT_J)
2862 cut = "J";
2863 else if (dm->cut_version == ODM_CUT_K)
2864 cut = "K";
2865 else if (dm->cut_version == ODM_CUT_L)
2866 cut = "L";
2867 else if (dm->cut_version == ODM_CUT_M)
2868 cut = "M";
2869 else if (dm->cut_version == ODM_CUT_N)
2870 cut = "N";
2871 else if (dm->cut_version == ODM_CUT_O)
2872 cut = "O";
2873 else if (dm->cut_version == ODM_CUT_TEST)
2874 cut = "TEST";
2875 else
2876 cut = "UNKNOWN";
2877
2878 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %d\n",
2879 "RFE type", dm->rfe_type);
2880 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2881 "CART_Ver", cut);
2882 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %d\n",
2883 "PHY Para Ver", odm_get_hw_img_version(dm));
2884 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %d\n",
2885 "PHY Para Commit date", date);
2886 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2887 "PHY Para Commit by", commit_by);
2888 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %d\n",
2889 "PHY Para Release Ver", release_ver);
2890
2891 PDM_SNPF(out_len, used, output + used, out_len - used,
2892 " %-35s: %d (Subversion: %d)\n", "FW Ver", dm->fw_version,
2893 dm->fw_sub_version);
2894
2895 /* @1 PHY DM version List */
2896 PDM_SNPF(out_len, used, output + used, out_len - used, "%-35s\n",
2897 "% PHYDM version %");
2898 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2899 "Code base", PHYDM_CODE_BASE);
2900 #ifdef PHYDM_SVN_REV
2901 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2902 "PHYDM SVN Ver", PHYDM_SVN_REV);
2903 #endif
2904 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2905 "Release Date", PHYDM_RELEASE_DATE);
2906 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2907 "Adaptivity", ADAPTIVITY_VERSION);
2908 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2909 "DIG", DIG_VERSION);
2910 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2911 "CFO Tracking", CFO_TRACKING_VERSION);
2912 #ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY
2913 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2914 "AntDiv", ANTDIV_VERSION);
2915 #endif
2916 #ifdef CONFIG_DYNAMIC_TX_TWR
2917 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2918 "Dynamic TxPower", DYNAMIC_TXPWR_VERSION);
2919 #endif
2920 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2921 "RA Info", RAINFO_VERSION);
2922 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
2923 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2924 "AntDetect", ANTDECT_VERSION);
2925 #endif
2926 #ifdef CONFIG_PATH_DIVERSITY
2927 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2928 "PathDiv", PATHDIV_VERSION);
2929 #endif
2930 #ifdef CONFIG_ADAPTIVE_SOML
2931 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2932 "Adaptive SOML", ADAPTIVE_SOML_VERSION);
2933 #endif
2934 #if (PHYDM_LA_MODE_SUPPORT)
2935 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2936 "LA mode", DYNAMIC_LA_MODE);
2937 #endif
2938 #ifdef PHYDM_PRIMARY_CCA
2939 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2940 "Primary CCA", PRIMARYCCA_VERSION);
2941 #endif
2942 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2943 "DFS", DFS_VERSION);
2944
2945 #if (RTL8822B_SUPPORT)
2946 if (dm->support_ic_type & ODM_RTL8822B)
2947 PDM_SNPF(out_len, used, output + used, out_len - used,
2948 " %-35s: %s\n", "PHY config 8822B",
2949 PHY_CONFIG_VERSION_8822B);
2950
2951 #endif
2952 #if (RTL8197F_SUPPORT)
2953 if (dm->support_ic_type & ODM_RTL8197F)
2954 PDM_SNPF(out_len, used, output + used, out_len - used,
2955 " %-35s: %s\n", "PHY config 8197F",
2956 PHY_CONFIG_VERSION_8197F);
2957 #endif
2958
2959 /*@jj add 20170822*/
2960 #if (RTL8192F_SUPPORT)
2961 if (dm->support_ic_type & ODM_RTL8192F)
2962 PDM_SNPF(out_len, used, output + used, out_len - used,
2963 " %-35s: %s\n", "PHY config 8192F",
2964 PHY_CONFIG_VERSION_8192F);
2965 #endif
2966 #if (RTL8721D_SUPPORT)
2967 if (dm->support_ic_type & ODM_RTL8721D)
2968 PDM_SNPF(out_len, used, output + used, out_len - used,
2969 " %-35s: %s\n", "PHY config 8721D",
2970 PHY_CONFIG_VERSION_8721D);
2971 #endif
2972
2973 #if (RTL8710C_SUPPORT)
2974 if (dm->support_ic_type & ODM_RTL8710C)
2975 PDM_SNPF(out_len, used, output + used, out_len - used,
2976 " %-35s: %s\n", "PHY config 8710C",
2977 PHY_CONFIG_VERSION_8710C);
2978 #endif
2979
2980 *_used = used;
2981 *_out_len = out_len;
2982
2983 #endif /*@#if CONFIG_PHYDM_DEBUG_FUNCTION*/
2984 }
2985
2986 #ifdef CONFIG_PHYDM_DEBUG_FUNCTION
phydm_fw_trace_en_h2c(void * dm_void,boolean enable,u32 fw_dbg_comp,u32 monitor_mode,u32 macid)2987 void phydm_fw_trace_en_h2c(void *dm_void, boolean enable,
2988 u32 fw_dbg_comp, u32 monitor_mode, u32 macid)
2989 {
2990 struct dm_struct *dm = (struct dm_struct *)dm_void;
2991 u8 h2c_parameter[7] = {0};
2992 u8 cmd_length;
2993
2994 if (dm->support_ic_type & PHYDM_IC_3081_SERIES) {
2995 h2c_parameter[0] = enable;
2996 h2c_parameter[1] = (u8)(fw_dbg_comp & MASKBYTE0);
2997 h2c_parameter[2] = (u8)((fw_dbg_comp & MASKBYTE1) >> 8);
2998 h2c_parameter[3] = (u8)((fw_dbg_comp & MASKBYTE2) >> 16);
2999 h2c_parameter[4] = (u8)((fw_dbg_comp & MASKBYTE3) >> 24);
3000 h2c_parameter[5] = (u8)monitor_mode;
3001 h2c_parameter[6] = (u8)macid;
3002 cmd_length = 7;
3003
3004 } else {
3005 h2c_parameter[0] = enable;
3006 h2c_parameter[1] = (u8)monitor_mode;
3007 h2c_parameter[2] = (u8)macid;
3008 cmd_length = 3;
3009 }
3010
3011 PHYDM_DBG(dm, DBG_FW_TRACE,
3012 "[H2C] FW_debug_en: (( %d )), mode: (( %d )), macid: (( %d ))\n",
3013 enable, monitor_mode, macid);
3014
3015 odm_fill_h2c_cmd(dm, PHYDM_H2C_FW_TRACE_EN, cmd_length, h2c_parameter);
3016 }
3017
phydm_get_per_path_txagc(void * dm_void,u8 path,u32 * _used,char * output,u32 * _out_len)3018 void phydm_get_per_path_txagc(void *dm_void, u8 path, u32 *_used, char *output,
3019 u32 *_out_len)
3020 {
3021 struct dm_struct *dm = (struct dm_struct *)dm_void;
3022 u8 rate_idx = 0;
3023 u8 txagc = 0;
3024 u32 used = *_used;
3025 u32 out_len = *_out_len;
3026
3027 #ifdef PHYDM_COMMON_API_SUPPORT
3028 if (!(dm->support_ic_type & CMN_API_SUPPORT_IC))
3029 return;
3030
3031 if (dm->num_rf_path == 1 && path > RF_PATH_A)
3032 return;
3033 else if (dm->num_rf_path == 2 && path > RF_PATH_B)
3034 return;
3035 else if (dm->num_rf_path == 3 && path > RF_PATH_C)
3036 return;
3037 else if (dm->num_rf_path == 4 && path > RF_PATH_D)
3038 return;
3039
3040 for (rate_idx = 0; rate_idx <= 0x53; rate_idx++) {
3041 if (!(dm->support_ic_type & PHYDM_IC_ABOVE_3SS) &&
3042 ((rate_idx >= ODM_RATEMCS16 &&
3043 rate_idx < ODM_RATEVHTSS1MCS0) ||
3044 rate_idx >= ODM_RATEVHTSS3MCS0))
3045 continue;
3046
3047 if (rate_idx == ODM_RATE1M)
3048 PDM_SNPF(out_len, used, output + used, out_len - used,
3049 " %-35s\n", "CCK====>");
3050 else if (rate_idx == ODM_RATE6M)
3051 PDM_SNPF(out_len, used, output + used, out_len - used,
3052 "\n %-35s\n", "OFDM====>");
3053 else if (rate_idx == ODM_RATEMCS0)
3054 PDM_SNPF(out_len, used, output + used, out_len - used,
3055 "\n %-35s\n", "HT 1ss====>");
3056 else if (rate_idx == ODM_RATEMCS8)
3057 PDM_SNPF(out_len, used, output + used, out_len - used,
3058 "\n %-35s\n", "HT 2ss====>");
3059 else if (rate_idx == ODM_RATEMCS16)
3060 PDM_SNPF(out_len, used, output + used, out_len - used,
3061 "\n %-35s\n", "HT 3ss====>");
3062 else if (rate_idx == ODM_RATEMCS24)
3063 PDM_SNPF(out_len, used, output + used, out_len - used,
3064 "\n %-35s\n", "HT 4ss====>");
3065 else if (rate_idx == ODM_RATEVHTSS1MCS0)
3066 PDM_SNPF(out_len, used, output + used, out_len - used,
3067 "\n %-35s\n", "VHT 1ss====>");
3068 else if (rate_idx == ODM_RATEVHTSS2MCS0)
3069 PDM_SNPF(out_len, used, output + used, out_len - used,
3070 "\n %-35s\n", "VHT 2ss====>");
3071 else if (rate_idx == ODM_RATEVHTSS3MCS0)
3072 PDM_SNPF(out_len, used, output + used, out_len - used,
3073 "\n %-35s\n", "VHT 3ss====>");
3074 else if (rate_idx == ODM_RATEVHTSS4MCS0)
3075 PDM_SNPF(out_len, used, output + used, out_len - used,
3076 "\n %-35s\n", "VHT 4ss====>");
3077
3078 txagc = phydm_api_get_txagc(dm, (enum rf_path)path, rate_idx);
3079 if (config_phydm_read_txagc_check(txagc))
3080 PDM_SNPF(out_len, used, output + used,
3081 out_len - used, " 0x%02x ", txagc);
3082 else
3083 PDM_SNPF(out_len, used, output + used,
3084 out_len - used, " 0x%s ", "xx");
3085 }
3086 #endif
3087
3088 *_used = used;
3089 *_out_len = out_len;
3090 }
3091
phydm_get_txagc(void * dm_void,u32 * _used,char * output,u32 * _out_len)3092 void phydm_get_txagc(void *dm_void, u32 *_used, char *output, u32 *_out_len)
3093 {
3094 struct dm_struct *dm = (struct dm_struct *)dm_void;
3095 u32 used = *_used;
3096 u32 out_len = *_out_len;
3097 u8 i = 0;
3098
3099 #if (RTL8822C_SUPPORT)
3100 PDM_SNPF(out_len, used, output + used,
3101 out_len - used, "Disabled DPD rate mask: 0x%x\n",
3102 dm->dis_dpd_rate);
3103 #endif
3104
3105 for (i = RF_PATH_A; i < dm->num_rf_path; i++) {
3106 if (i == RF_PATH_A)
3107 PDM_SNPF(out_len, used, output + used, out_len - used,
3108 "%-35s\n", "path-A====================");
3109 else if (i == RF_PATH_B)
3110 PDM_SNPF(out_len, used, output + used, out_len - used,
3111 "\n%-35s\n", "path-B====================");
3112 else if (i == RF_PATH_C)
3113 PDM_SNPF(out_len, used, output + used, out_len - used,
3114 "\n%-35s\n", "path-C====================");
3115 else if (i == RF_PATH_D)
3116 PDM_SNPF(out_len, used, output + used, out_len - used,
3117 "\n%-35s\n", "path-D====================");
3118
3119 phydm_get_per_path_txagc(dm, i, &used, output, &out_len);
3120 }
3121 *_used = used;
3122 *_out_len = out_len;
3123 }
3124
phydm_set_txagc(void * dm_void,u32 * const val,u32 * _used,char * output,u32 * _out_len)3125 void phydm_set_txagc(void *dm_void, u32 *const val, u32 *_used,
3126 char *output, u32 *_out_len)
3127 {
3128 struct dm_struct *dm = (struct dm_struct *)dm_void;
3129 u32 used = *_used;
3130 u32 out_len = *_out_len;
3131 u8 i = 0;
3132 u32 pow = 0; /*power index*/
3133 u8 vht_start_rate = ODM_RATEVHTSS1MCS0;
3134 boolean rpt = true;
3135 enum rf_path path = RF_PATH_A;
3136
3137 /*@val[1] = path*/
3138 /*@val[2] = hw_rate*/
3139 /*@val[3] = power_index*/
3140
3141 #ifdef PHYDM_COMMON_API_SUPPORT
3142 if (!(dm->support_ic_type & CMN_API_SUPPORT_IC))
3143 return;
3144
3145 path = (enum rf_path)val[1];
3146
3147 if (val[1] >= dm->num_rf_path) {
3148 PDM_SNPF(out_len, used, output + used, out_len - used,
3149 "Write path-%d rate_idx-0x%x fail\n", val[1], val[2]);
3150 } else if ((u8)val[2] != 0xff) {
3151 if (phydm_api_set_txagc(dm, val[3], path, (u8)val[2], true))
3152 PDM_SNPF(out_len, used, output + used, out_len - used,
3153 "Write path-%d rate_idx-0x%x = 0x%x\n",
3154 val[1], val[2], val[3]);
3155 else
3156 PDM_SNPF(out_len, used, output + used, out_len - used,
3157 "Write path-%d rate index-0x%x fail\n",
3158 val[1], val[2]);
3159 } else {
3160
3161 if (dm->support_ic_type &
3162 (ODM_RTL8822B | ODM_RTL8821C | ODM_RTL8195B)) {
3163 pow = (val[3] & 0x3f);
3164 pow = BYTE_DUPLICATE_2_DWORD(pow);
3165
3166 for (i = 0; i < ODM_RATEVHTSS2MCS9; i += 4)
3167 rpt &= phydm_api_set_txagc(dm, pow, path, i, 0);
3168 } else if (dm->support_ic_type &
3169 (ODM_RTL8197F | ODM_RTL8192F)) {
3170 pow = (val[3] & 0x3f);
3171 for (i = 0; i <= ODM_RATEMCS15; i++)
3172 rpt &= phydm_api_set_txagc(dm, pow, path, i, 0);
3173 } else if (dm->support_ic_type & ODM_RTL8198F) {
3174 pow = (val[3] & 0x7f);
3175 for (i = 0; i <= ODM_RATEVHTSS4MCS9; i++)
3176 rpt &= phydm_api_set_txagc(dm, pow, path, i, 0);
3177 } else if (dm->support_ic_type &
3178 (ODM_RTL8822C | ODM_RTL8812F | ODM_RTL8197G)) {
3179 pow = (val[3] & 0x7f);
3180 for (i = 0; i <= ODM_RATEMCS15; i++)
3181 rpt &= phydm_api_set_txagc(dm, pow, path, i, 0);
3182 for (i = vht_start_rate; i <= ODM_RATEVHTSS2MCS9; i++)
3183 rpt &= phydm_api_set_txagc(dm, pow, path, i, 0);
3184 } else if (dm->support_ic_type &
3185 (ODM_RTL8721D | ODM_RTL8710C)) {
3186 pow = (val[3] & 0x3f);
3187 for (i = 0; i <= ODM_RATEMCS7; i++)
3188 rpt &= phydm_api_set_txagc(dm, pow, path, i, 0);
3189 }
3190
3191 if (rpt)
3192 PDM_SNPF(out_len, used, output + used, out_len - used,
3193 "Write all TXAGC of path-%d = 0x%x\n",
3194 val[1], val[3]);
3195 else
3196 PDM_SNPF(out_len, used, output + used, out_len - used,
3197 "Write all TXAGC of path-%d fail\n", val[1]);
3198 }
3199
3200 #endif
3201 *_used = used;
3202 *_out_len = out_len;
3203 }
3204
phydm_shift_txagc(void * dm_void,u32 * const val,u32 * _used,char * output,u32 * _out_len)3205 void phydm_shift_txagc(void *dm_void, u32 *const val, u32 *_used, char *output,
3206 u32 *_out_len)
3207 {
3208 struct dm_struct *dm = (struct dm_struct *)dm_void;
3209 u32 used = *_used;
3210 u32 out_len = *_out_len;
3211 u8 i = 0;
3212 u32 pow = 0; /*Power index*/
3213 boolean rpt = true;
3214 u8 vht_start_rate = ODM_RATEVHTSS1MCS0;
3215 enum rf_path path = RF_PATH_A;
3216
3217 #ifdef PHYDM_COMMON_API_SUPPORT
3218 if (!(dm->support_ic_type & CMN_API_SUPPORT_IC))
3219 return;
3220
3221 if (val[1] >= dm->num_rf_path) {
3222 PDM_SNPF(out_len, used, output + used, out_len - used,
3223 "Write path-%d fail\n", val[1]);
3224 return;
3225 }
3226
3227 path = (enum rf_path)val[1];
3228
3229 if ((u8)val[2] == 0) {
3230 /*@{0:-, 1:+} {Pwr Offset}*/
3231 if (dm->support_ic_type & (ODM_RTL8195B | ODM_RTL8821C)) {
3232 for (i = 0; i <= ODM_RATEMCS7; i++) {
3233 pow = phydm_api_get_txagc(dm, path, i) - val[3];
3234 rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
3235 }
3236 for (i = vht_start_rate; i <= ODM_RATEVHTSS1MCS9; i++) {
3237 pow = phydm_api_get_txagc(dm, path, i) - val[3];
3238 rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
3239 }
3240 } else if (dm->support_ic_type & (ODM_RTL8822B)) {
3241 for (i = 0; i <= ODM_RATEMCS15; i++) {
3242 pow = phydm_api_get_txagc(dm, path, i) - val[3];
3243 rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
3244 }
3245 for (i = vht_start_rate; i <= ODM_RATEVHTSS2MCS9; i++) {
3246 pow = phydm_api_get_txagc(dm, path, i) - val[3];
3247 rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
3248 }
3249 } else if (dm->support_ic_type &
3250 (ODM_RTL8197F | ODM_RTL8192F)) {
3251 for (i = 0; i <= ODM_RATEMCS15; i++) {
3252 pow = phydm_api_get_txagc(dm, path, i) - val[3];
3253 rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
3254 }
3255 } else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
3256 rpt &= phydm_api_shift_txagc(dm, val[3], path, 0);
3257 } else if (dm->support_ic_type &
3258 (ODM_RTL8721D | ODM_RTL8710C)) {
3259 for (i = 0; i <= ODM_RATEMCS7; i++) {
3260 pow = phydm_api_get_txagc(dm, path, i) - val[3];
3261 rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
3262 }
3263 }
3264 } else if ((u8)val[2] == 1) {
3265 /*@{0:-, 1:+} {Pwr Offset}*/
3266 if (dm->support_ic_type & (ODM_RTL8195B | ODM_RTL8821C)) {
3267 for (i = 0; i <= ODM_RATEMCS7; i++) {
3268 pow = phydm_api_get_txagc(dm, path, i) + val[3];
3269 rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
3270 }
3271 for (i = vht_start_rate; i <= ODM_RATEVHTSS1MCS9; i++) {
3272 pow = phydm_api_get_txagc(dm, path, i) + val[3];
3273 rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
3274 }
3275 } else if (dm->support_ic_type & (ODM_RTL8822B)) {
3276 for (i = 0; i <= ODM_RATEMCS15; i++) {
3277 pow = phydm_api_get_txagc(dm, path, i) + val[3];
3278 rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
3279 }
3280 for (i = vht_start_rate; i <= ODM_RATEVHTSS2MCS9; i++) {
3281 pow = phydm_api_get_txagc(dm, path, i) + val[3];
3282 rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
3283 }
3284 } else if (dm->support_ic_type &
3285 (ODM_RTL8197F | ODM_RTL8192F)) {
3286 for (i = 0; i <= ODM_RATEMCS15; i++) {
3287 pow = phydm_api_get_txagc(dm, path, i) + val[3];
3288 rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
3289 }
3290 } else if (dm->support_ic_type & (ODM_RTL8721D |
3291 ODM_RTL8710C)) {
3292 for (i = 0; i <= ODM_RATEMCS7; i++) {
3293 pow = phydm_api_get_txagc(dm, path, i) + val[3];
3294 rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
3295 }
3296 } else if (dm->support_ic_type &
3297 (ODM_RTL8822C | ODM_RTL8814B |
3298 ODM_RTL8812F | ODM_RTL8197G)) {
3299 rpt &= phydm_api_shift_txagc(dm, val[3], path, 1);
3300 }
3301 }
3302 #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
3303 if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
3304 PDM_SNPF(out_len, used, output + used, out_len - used,
3305 "[All rate] Set Path-%d Pow_idx: %s %d\n",
3306 val[1], (val[2] ? "+" : "-"), val[3]);
3307 else
3308 #endif
3309 PDM_SNPF(out_len, used, output + used, out_len - used,
3310 "[All rate] Set Path-%d Pow_idx: %s %d(%d.%s dB)\n",
3311 val[1], (val[2] ? "+" : "-"), val[3], val[3] >> 1,
3312 ((val[3] & 1) ? "5" : "0"));
3313
3314 #endif
3315 *_used = used;
3316 *_out_len = out_len;
3317 }
3318
phydm_set_txagc_dbg(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)3319 void phydm_set_txagc_dbg(void *dm_void, char input[][16], u32 *_used,
3320 char *output, u32 *_out_len)
3321 {
3322 struct dm_struct *dm = (struct dm_struct *)dm_void;
3323 u32 used = *_used;
3324 u32 out_len = *_out_len;
3325 u32 var1[10] = {0};
3326 char help[] = "-h";
3327 u8 i = 0, input_idx = 0;
3328
3329 for (i = 0; i < 5; i++) {
3330 if (input[i + 1]) {
3331 PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]);
3332 input_idx++;
3333 }
3334 }
3335
3336 if ((strcmp(input[1], help) == 0)) {
3337 PDM_SNPF(out_len, used, output + used, out_len - used,
3338 "{Dis:0, En:1} {pathA~D(0~3)} {rate_idx(Hex), All_rate:0xff} {txagc_idx (Hex)}\n");
3339 PDM_SNPF(out_len, used, output + used, out_len - used,
3340 "{Pwr Shift(All rate):2} {pathA~D(0~3)} {0:-, 1:+} {Pwr Offset(Hex)}\n");
3341 #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
3342 PDM_SNPF(out_len, used, output + used, out_len - used,
3343 "{reset all rate ref/diff to 0x0:0xff}\n");
3344 #endif
3345 } else if (var1[0] == 0) {
3346 dm->is_disable_phy_api = false;
3347 PDM_SNPF(out_len, used, output + used, out_len - used,
3348 "Disable API debug mode\n");
3349 } else if (var1[0] == 1) {
3350 dm->is_disable_phy_api = false;
3351 #ifdef CONFIG_TXAGC_DEBUG_8822C
3352 config_phydm_write_txagc_8822c(dm, var1[3],
3353 (enum rf_path)var1[1],
3354 (u8)var1[2]);
3355 #elif (defined(CONFIG_TXAGC_DEBUG_8814B))
3356 config_phydm_write_txagc_8814b(dm, var1[3],
3357 (enum rf_path)var1[1],
3358 (u8)var1[2]);
3359 #else
3360 phydm_set_txagc(dm, (u32 *)var1, &used, output, &out_len);
3361 #endif
3362 dm->is_disable_phy_api = true;
3363 } else if (var1[0] == 2) {
3364 PHYDM_SSCANF(input[4], DCMD_HEX, &var1[3]);
3365 dm->is_disable_phy_api = false;
3366 phydm_shift_txagc(dm, (u32 *)var1, &used, output, &out_len);
3367 dm->is_disable_phy_api = true;
3368 }
3369 #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
3370 else if (var1[0] == 0xff) {
3371 dm->is_disable_phy_api = false;
3372 phydm_reset_txagc(dm);
3373 dm->is_disable_phy_api = true;
3374 }
3375 #endif
3376 #ifdef CONFIG_TXAGC_DEBUG_8822C
3377 else if (var1[0] == 3) {
3378 dm->is_disable_phy_api = false;
3379 phydm_txagc_tab_buff_show_8822c(dm);
3380 dm->is_disable_phy_api = true;
3381 } else if (var1[0] == 4) {
3382 dm->is_disable_phy_api = false;
3383 config_phydm_set_txagc_to_hw_8822c(dm);
3384 dm->is_disable_phy_api = true;
3385 }
3386 #elif (defined(CONFIG_TXAGC_DEBUG_8814B))
3387 else if (var1[0] == 3) {
3388 dm->is_disable_phy_api = false;
3389 phydm_txagc_tab_buff_show_8814b(dm);
3390 dm->is_disable_phy_api = true;
3391 } else if (var1[0] == 4) {
3392 dm->is_disable_phy_api = false;
3393 config_phydm_set_txagc_to_hw_8814b(dm);
3394 dm->is_disable_phy_api = true;
3395 }
3396 #endif
3397
3398 *_used = used;
3399 *_out_len = out_len;
3400 }
3401
phydm_cmn_msg_setting(void * dm_void,u32 * val,u32 * _used,char * output,u32 * _out_len)3402 void phydm_cmn_msg_setting(void *dm_void, u32 *val, u32 *_used,
3403 char *output, u32 *_out_len)
3404 {
3405 struct dm_struct *dm = (struct dm_struct *)dm_void;
3406 u32 used = *_used;
3407 u32 out_len = *_out_len;
3408
3409 if (val[1] == 1) {
3410 dm->cmn_dbg_msg_period = (u8)val[2];
3411
3412 if (dm->cmn_dbg_msg_period < PHYDM_WATCH_DOG_PERIOD)
3413 dm->cmn_dbg_msg_period = PHYDM_WATCH_DOG_PERIOD;
3414
3415 PDM_SNPF(out_len, used, output + used, out_len - used,
3416 "cmn_dbg_msg_period=%d\n", dm->cmn_dbg_msg_period);
3417 }
3418
3419 #ifdef PHYDM_PHYSTAUS_AUTO_SWITCH
3420 if (val[1] == 1)
3421 phydm_physts_auto_switch_jgr3_set(dm, true, BIT(4) | BIT(1));
3422 else
3423 phydm_physts_auto_switch_jgr3_set(dm, false, BIT(1));
3424 #endif
3425 *_used = used;
3426 *_out_len = out_len;
3427 }
3428
phydm_debug_trace(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)3429 void phydm_debug_trace(void *dm_void, char input[][16], u32 *_used,
3430 char *output, u32 *_out_len)
3431 {
3432 struct dm_struct *dm = (struct dm_struct *)dm_void;
3433 u64 pre_debug_components, one = 1;
3434 u64 comp = 0;
3435 u32 used = *_used;
3436 u32 out_len = *_out_len;
3437 u32 val[10] = {0};
3438 u8 i = 0;
3439
3440 for (i = 0; i < 5; i++) {
3441 if (input[i + 1])
3442 PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &val[i]);
3443 }
3444 comp = dm->debug_components;
3445 pre_debug_components = dm->debug_components;
3446
3447 PDM_SNPF(out_len, used, output + used, out_len - used,
3448 "\n================================\n");
3449 if (val[0] == 100) {
3450 PDM_SNPF(out_len, used, output + used, out_len - used,
3451 "[DBG MSG] Component Selection\n");
3452 PDM_SNPF(out_len, used, output + used, out_len - used,
3453 "================================\n");
3454 PDM_SNPF(out_len, used, output + used, out_len - used,
3455 "00. (( %s ))DIG\n",
3456 ((comp & DBG_DIG) ? ("V") : (".")));
3457 PDM_SNPF(out_len, used, output + used, out_len - used,
3458 "01. (( %s ))RA_MASK\n",
3459 ((comp & DBG_RA_MASK) ? ("V") : (".")));
3460 PDM_SNPF(out_len, used, output + used, out_len - used,
3461 "02. (( %s ))DYN_TXPWR\n",
3462 ((comp & DBG_DYN_TXPWR) ? ("V") : (".")));
3463 PDM_SNPF(out_len, used, output + used, out_len - used,
3464 "03. (( %s ))FA_CNT\n",
3465 ((comp & DBG_FA_CNT) ? ("V") : (".")));
3466 PDM_SNPF(out_len, used, output + used, out_len - used,
3467 "04. (( %s ))RSSI_MNTR\n",
3468 ((comp & DBG_RSSI_MNTR) ? ("V") : (".")));
3469 PDM_SNPF(out_len, used, output + used, out_len - used,
3470 "05. (( %s ))CCKPD\n",
3471 ((comp & DBG_CCKPD) ? ("V") : (".")));
3472 PDM_SNPF(out_len, used, output + used, out_len - used,
3473 "06. (( %s ))ANT_DIV\n",
3474 ((comp & DBG_ANT_DIV) ? ("V") : (".")));
3475 PDM_SNPF(out_len, used, output + used, out_len - used,
3476 "07. (( %s ))SMT_ANT\n",
3477 ((comp & DBG_SMT_ANT) ? ("V") : (".")));
3478 PDM_SNPF(out_len, used, output + used, out_len - used,
3479 "08. (( %s ))PWR_TRAIN\n",
3480 ((comp & DBG_PWR_TRAIN) ? ("V") : (".")));
3481 PDM_SNPF(out_len, used, output + used, out_len - used,
3482 "09. (( %s ))RA\n",
3483 ((comp & DBG_RA) ? ("V") : (".")));
3484 PDM_SNPF(out_len, used, output + used, out_len - used,
3485 "10. (( %s ))PATH_DIV\n",
3486 ((comp & DBG_PATH_DIV) ? ("V") : (".")));
3487 PDM_SNPF(out_len, used, output + used, out_len - used,
3488 "11. (( %s ))DFS\n",
3489 ((comp & DBG_DFS) ? ("V") : (".")));
3490 PDM_SNPF(out_len, used, output + used, out_len - used,
3491 "12. (( %s ))DYN_ARFR\n",
3492 ((comp & DBG_DYN_ARFR) ? ("V") : (".")));
3493 PDM_SNPF(out_len, used, output + used, out_len - used,
3494 "13. (( %s ))ADAPTIVITY\n",
3495 ((comp & DBG_ADPTVTY) ? ("V") : (".")));
3496 PDM_SNPF(out_len, used, output + used, out_len - used,
3497 "14. (( %s ))CFO_TRK\n",
3498 ((comp & DBG_CFO_TRK) ? ("V") : (".")));
3499 PDM_SNPF(out_len, used, output + used, out_len - used,
3500 "15. (( %s ))ENV_MNTR\n",
3501 ((comp & DBG_ENV_MNTR) ? ("V") : (".")));
3502 PDM_SNPF(out_len, used, output + used, out_len - used,
3503 "16. (( %s ))PRI_CCA\n",
3504 ((comp & DBG_PRI_CCA) ? ("V") : (".")));
3505 PDM_SNPF(out_len, used, output + used, out_len - used,
3506 "17. (( %s ))ADPTV_SOML\n",
3507 ((comp & DBG_ADPTV_SOML) ? ("V") : (".")));
3508 PDM_SNPF(out_len, used, output + used, out_len - used,
3509 "18. (( %s ))LNA_SAT_CHK\n",
3510 ((comp & DBG_LNA_SAT_CHK) ? ("V") : (".")));
3511 PDM_SNPF(out_len, used, output + used, out_len - used,
3512 "20. (( %s ))PHY_STATUS\n",
3513 ((comp & DBG_PHY_STATUS) ? ("V") : (".")));
3514 PDM_SNPF(out_len, used, output + used, out_len - used,
3515 "21. (( %s ))TMP\n",
3516 ((comp & DBG_TMP) ? ("V") : (".")));
3517 PDM_SNPF(out_len, used, output + used, out_len - used,
3518 "22. (( %s ))FW_DBG_TRACE\n",
3519 ((comp & DBG_FW_TRACE) ? ("V") : (".")));
3520 PDM_SNPF(out_len, used, output + used, out_len - used,
3521 "23. (( %s ))TXBF\n",
3522 ((comp & DBG_TXBF) ? ("V") : (".")));
3523 PDM_SNPF(out_len, used, output + used, out_len - used,
3524 "24. (( %s ))COMMON_FLOW\n",
3525 ((comp & DBG_COMMON_FLOW) ? ("V") : (".")));
3526 PDM_SNPF(out_len, used, output + used, out_len - used,
3527 "28. (( %s ))PHY_CONFIG\n",
3528 ((comp & ODM_PHY_CONFIG) ? ("V") : (".")));
3529 PDM_SNPF(out_len, used, output + used, out_len - used,
3530 "29. (( %s ))INIT\n",
3531 ((comp & ODM_COMP_INIT) ? ("V") : (".")));
3532 PDM_SNPF(out_len, used, output + used, out_len - used,
3533 "30. (( %s ))COMMON\n",
3534 ((comp & DBG_CMN) ? ("V") : (".")));
3535 PDM_SNPF(out_len, used, output + used, out_len - used,
3536 "31. (( %s ))API\n",
3537 ((comp & ODM_COMP_API) ? ("V") : (".")));
3538 PDM_SNPF(out_len, used, output + used, out_len - used,
3539 "================================\n");
3540
3541 } else if (val[0] == 101) {
3542 dm->debug_components = 0;
3543 PDM_SNPF(out_len, used, output + used, out_len - used,
3544 "Disable all debug components\n");
3545 } else {
3546 if (val[1] == 1) /*@enable*/
3547 dm->debug_components |= (one << val[0]);
3548 else if (val[1] == 2) /*@disable*/
3549 dm->debug_components &= ~(one << val[0]);
3550 else
3551 PDM_SNPF(out_len, used, output + used, out_len - used,
3552 "[Warning] 1:on, 2:off\n");
3553
3554 if ((BIT(val[0]) == DBG_PHY_STATUS) && val[1] == 1) {
3555 dm->phy_dbg_info.show_phy_sts_all_pkt = (u8)val[2];
3556 dm->phy_dbg_info.show_phy_sts_max_cnt = (u16)val[3];
3557
3558 PDM_SNPF(out_len, used, output + used, out_len - used,
3559 "show_all_pkt=%d, show_max_num=%d\n\n",
3560 dm->phy_dbg_info.show_phy_sts_all_pkt,
3561 dm->phy_dbg_info.show_phy_sts_max_cnt);
3562
3563 } else if (BIT(val[0]) == DBG_CMN) {
3564 phydm_cmn_msg_setting(dm, val, &used, output, &out_len);
3565 }
3566 }
3567 PDM_SNPF(out_len, used, output + used, out_len - used,
3568 "pre-DbgComponents = 0x%llx\n", pre_debug_components);
3569 PDM_SNPF(out_len, used, output + used, out_len - used,
3570 "Curr-DbgComponents = 0x%llx\n", dm->debug_components);
3571 PDM_SNPF(out_len, used, output + used, out_len - used,
3572 "================================\n");
3573
3574 *_used = used;
3575 *_out_len = out_len;
3576 }
3577
phydm_fw_debug_trace(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)3578 void phydm_fw_debug_trace(void *dm_void, char input[][16], u32 *_used,
3579 char *output, u32 *_out_len)
3580 {
3581 struct dm_struct *dm = (struct dm_struct *)dm_void;
3582 u32 used = *_used;
3583 u32 out_len = *_out_len;
3584 u32 val[10] = {0};
3585 u8 i, input_idx = 0;
3586 char help[] = "-h";
3587 u32 pre_fw_debug_components = 0, one = 1;
3588 u32 comp = 0;
3589
3590 for (i = 0; i < 5; i++) {
3591 if (input[i + 1]) {
3592 PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &val[i]);
3593 input_idx++;
3594 }
3595 }
3596
3597 if (input_idx == 0)
3598 return;
3599
3600 pre_fw_debug_components = dm->fw_debug_components;
3601 comp = dm->fw_debug_components;
3602
3603 if ((strcmp(input[1], help) == 0)) {
3604 PDM_SNPF(out_len, used, output + used, out_len - used,
3605 "{dbg_comp} {1:en, 2:dis} {mode} {macid}\n");
3606 } else {
3607 if (val[0] == 101) {
3608 dm->fw_debug_components = 0;
3609 PDM_SNPF(out_len, used, output + used, out_len - used,
3610 "%s\n", "Clear all fw debug components");
3611 } else {
3612 if (val[1] == 1) /*@enable*/
3613 dm->fw_debug_components |= (one << val[0]);
3614 else if (val[1] == 2) /*@disable*/
3615 dm->fw_debug_components &= ~(one << val[0]);
3616 else
3617 PDM_SNPF(out_len, used, output + used,
3618 out_len - used, "%s\n",
3619 "[Warning!!!] 1:enable, 2:disable");
3620 }
3621
3622 comp = dm->fw_debug_components;
3623
3624 if (comp == 0) {
3625 dm->debug_components &= ~DBG_FW_TRACE;
3626 /*@H2C to enable C2H Msg*/
3627 phydm_fw_trace_en_h2c(dm, false, comp, val[2], val[3]);
3628 } else {
3629 dm->debug_components |= DBG_FW_TRACE;
3630 /*@H2C to enable C2H Msg*/
3631 phydm_fw_trace_en_h2c(dm, true, comp, val[2], val[3]);
3632 }
3633 }
3634 }
3635
3636 #if (ODM_IC_11N_SERIES_SUPPORT)
phydm_dump_bb_reg_n(void * dm_void,u32 * _used,char * output,u32 * _out_len)3637 void phydm_dump_bb_reg_n(void *dm_void, u32 *_used, char *output, u32 *_out_len)
3638 {
3639 struct dm_struct *dm = (struct dm_struct *)dm_void;
3640 u32 addr = 0;
3641 u32 used = *_used;
3642 u32 out_len = *_out_len;
3643
3644 /*@For Nseries IC we only need to dump page8 to pageF using 3 digits*/
3645 for (addr = 0x800; addr < 0xfff; addr += 4) {
3646 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3647 "0x%03x 0x%08x\n",
3648 addr, odm_get_bb_reg(dm, addr, MASKDWORD));
3649 }
3650
3651 *_used = used;
3652 *_out_len = out_len;
3653 }
3654 #endif
3655
3656 #if (ODM_IC_11AC_SERIES_SUPPORT)
phydm_dump_bb_reg_ac(void * dm_void,u32 * _used,char * output,u32 * _out_len)3657 void phydm_dump_bb_reg_ac(void *dm_void, u32 *_used, char *output,
3658 u32 *_out_len)
3659 {
3660 struct dm_struct *dm = (struct dm_struct *)dm_void;
3661 u32 addr = 0;
3662 u32 used = *_used;
3663 u32 out_len = *_out_len;
3664
3665 for (addr = 0x800; addr < 0xfff; addr += 4) {
3666 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3667 "0x%04x 0x%08x\n",
3668 addr, odm_get_bb_reg(dm, addr, MASKDWORD));
3669 }
3670
3671 if (!(dm->support_ic_type &
3672 (ODM_RTL8822B | ODM_RTL8814A | ODM_RTL8821C | ODM_RTL8195B)))
3673 goto rpt_reg;
3674
3675 if (dm->rf_type > RF_2T2R) {
3676 for (addr = 0x1800; addr < 0x18ff; addr += 4)
3677 PDM_VAST_SNPF(out_len, used, output + used,
3678 out_len - used, "0x%04x 0x%08x\n",
3679 addr,
3680 odm_get_bb_reg(dm, addr, MASKDWORD));
3681 }
3682
3683 if (dm->rf_type > RF_3T3R) {
3684 for (addr = 0x1a00; addr < 0x1aff; addr += 4)
3685 PDM_VAST_SNPF(out_len, used, output + used,
3686 out_len - used, "0x%04x 0x%08x\n",
3687 addr,
3688 odm_get_bb_reg(dm, addr, MASKDWORD));
3689 }
3690
3691 for (addr = 0x1900; addr < 0x19ff; addr += 4)
3692 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3693 "0x%04x 0x%08x\n",
3694 addr, odm_get_bb_reg(dm, addr, MASKDWORD));
3695
3696 for (addr = 0x1c00; addr < 0x1cff; addr += 4)
3697 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3698 "0x%04x 0x%08x\n",
3699 addr, odm_get_bb_reg(dm, addr, MASKDWORD));
3700
3701 for (addr = 0x1f00; addr < 0x1fff; addr += 4)
3702 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3703 "0x%04x 0x%08x\n",
3704 addr, odm_get_bb_reg(dm, addr, MASKDWORD));
3705
3706 rpt_reg:
3707
3708 *_used = used;
3709 *_out_len = out_len;
3710 }
3711
3712 #endif
3713
3714 #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
phydm_dump_bb_reg_jgr3(void * dm_void,u32 * _used,char * output,u32 * _out_len)3715 void phydm_dump_bb_reg_jgr3(void *dm_void, u32 *_used, char *output,
3716 u32 *_out_len)
3717 {
3718 struct dm_struct *dm = (struct dm_struct *)dm_void;
3719 u32 addr = 0;
3720 u32 used = *_used;
3721 u32 out_len = *_out_len;
3722
3723 if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
3724 for (addr = 0x800; addr < 0xdff; addr += 4)
3725 PDM_VAST_SNPF(out_len, used, output + used,
3726 out_len - used, "0x%04x 0x%08x\n", addr,
3727 odm_get_bb_reg(dm, addr, MASKDWORD));
3728
3729 for (addr = 0x1800; addr < 0x1aff; addr += 4)
3730 PDM_VAST_SNPF(out_len, used, output + used,
3731 out_len - used, "0x%04x 0x%08x\n", addr,
3732 odm_get_bb_reg(dm, addr, MASKDWORD));
3733
3734 for (addr = 0x1c00; addr < 0x1eff; addr += 4)
3735 PDM_VAST_SNPF(out_len, used, output + used,
3736 out_len - used, "0x%04x 0x%08x\n", addr,
3737 odm_get_bb_reg(dm, addr, MASKDWORD));
3738
3739 for (addr = 0x4000; addr < 0x41ff; addr += 4)
3740 PDM_VAST_SNPF(out_len, used, output + used,
3741 out_len - used, "0x%04x 0x%08x\n", addr,
3742 odm_get_bb_reg(dm, addr, MASKDWORD));
3743 }
3744 *_used = used;
3745 *_out_len = out_len;
3746 }
3747
phydm_dump_bb_reg2_jgr3(void * dm_void,u32 * _used,char * output,u32 * _out_len)3748 void phydm_dump_bb_reg2_jgr3(void *dm_void, u32 *_used, char *output,
3749 u32 *_out_len)
3750 {
3751 struct dm_struct *dm = (struct dm_struct *)dm_void;
3752 u32 addr = 0;
3753 u32 used = *_used;
3754 u32 out_len = *_out_len;
3755
3756 if (!(dm->support_ic_type & ODM_IC_JGR3_SERIES))
3757 return;
3758
3759 #if (defined(PHYDM_COMPILE_ABOVE_4SS))
3760 if (dm->support_ic_type & PHYDM_IC_ABOVE_4SS) {
3761 for (addr = 0x5000; addr < 0x53ff; addr += 4) {
3762 PDM_VAST_SNPF(out_len, used, output + used,
3763 out_len - used, "0x%04x 0x%08x\n",
3764 addr,
3765 odm_get_bb_reg(dm, addr, MASKDWORD));
3766 }
3767 }
3768 #endif
3769 /* @Do not change the order of page-2C/2D*/
3770 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3771 "------ BB report-register start ------\n");
3772 for (addr = 0x2c00; addr < 0x2dff; addr += 4) {
3773 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3774 "0x%04x 0x%08x\n",
3775 addr, odm_get_bb_reg(dm, addr, MASKDWORD));
3776 }
3777
3778 *_used = used;
3779 *_out_len = out_len;
3780 }
3781
phydm_get_per_path_anapar_jgr3(void * dm_void,u8 path,u32 * _used,char * output,u32 * _out_len)3782 void phydm_get_per_path_anapar_jgr3(void *dm_void, u8 path, u32 *_used,
3783 char *output, u32 *_out_len)
3784 {
3785 struct dm_struct *dm = (struct dm_struct *)dm_void;
3786 u8 state = 0;
3787 u8 state_bp = 0;
3788 u32 control_bb = 0;
3789 u32 control_pow = 0;
3790 u32 used = *_used;
3791 u32 out_len = *_out_len;
3792 u32 reg_idx = 0;
3793 u32 dbgport_idx = 0;
3794 u32 dbgport_val = 0;
3795
3796 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3797 "path-%d:\n", path);
3798
3799 if (path == RF_PATH_A) {
3800 reg_idx = R_0x1830;
3801 dbgport_idx = 0x9F0;
3802 } else if (path == RF_PATH_B) {
3803 reg_idx = R_0x4130;
3804 dbgport_idx = 0xBF0;
3805 } else if (path == RF_PATH_C) {
3806 reg_idx = R_0x5230;
3807 dbgport_idx = 0xDF0;
3808 } else if (path == RF_PATH_D) {
3809 reg_idx = R_0x5330;
3810 dbgport_idx = 0xFF0;
3811 }
3812
3813 state_bp = (u8)odm_get_bb_reg(dm, reg_idx, 0xf00000);
3814 odm_set_bb_reg(dm, reg_idx, 0x38000000, 0x5); /* @read en*/
3815
3816 for (state = 0; state <= 0xf; state++) {
3817 odm_set_bb_reg(dm, reg_idx, 0xF00000, state);
3818 if (phydm_set_bb_dbg_port(dm, DBGPORT_PRI_3, dbgport_idx)) {
3819 dbgport_val = phydm_get_bb_dbg_port_val(dm);
3820 phydm_release_bb_dbg_port(dm);
3821 } else {
3822 PDM_VAST_SNPF(out_len, used, output + used,
3823 out_len - used,
3824 "state:0x%x = read dbg_port error!\n",
3825 state);
3826 }
3827 control_bb = (dbgport_val & 0xFFFF0) >> 4;
3828 control_pow = dbgport_val & 0xF;
3829 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3830 "state:0x%x = control_bb:0x%x pow_bb:0x%x\n",
3831 state, control_bb, control_pow);
3832 }
3833 odm_set_bb_reg(dm, reg_idx, 0xf00000, state_bp);
3834 odm_set_bb_reg(dm, reg_idx, 0x38000000, 0x6); /* @write en*/
3835
3836 *_used = used;
3837 *_out_len = out_len;
3838 }
3839
3840 #endif
3841
phydm_dump_bb_reg(void * dm_void,u32 * _used,char * output,u32 * _out_len)3842 void phydm_dump_bb_reg(void *dm_void, u32 *_used, char *output, u32 *_out_len)
3843 {
3844 struct dm_struct *dm = (struct dm_struct *)dm_void;
3845 u32 used = *_used;
3846 u32 out_len = *_out_len;
3847
3848 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3849 "BB==========\n");
3850 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3851 "------ BB control register start ------\n");
3852
3853 switch (dm->ic_ip_series) {
3854 #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
3855 case PHYDM_IC_JGR3:
3856 phydm_dump_bb_reg_jgr3(dm, &used, output, &out_len);
3857 break;
3858 #endif
3859
3860 #if (ODM_IC_11AC_SERIES_SUPPORT)
3861 case PHYDM_IC_AC:
3862 phydm_dump_bb_reg_ac(dm, &used, output, &out_len);
3863 break;
3864 #endif
3865
3866 #if (ODM_IC_11N_SERIES_SUPPORT)
3867 case PHYDM_IC_N:
3868 phydm_dump_bb_reg_n(dm, &used, output, &out_len);
3869 break;
3870 #endif
3871
3872 default:
3873 break;
3874 }
3875
3876 *_used = used;
3877 *_out_len = out_len;
3878 }
3879
phydm_dump_rf_reg(void * dm_void,u32 * _used,char * output,u32 * _out_len)3880 void phydm_dump_rf_reg(void *dm_void, u32 *_used, char *output, u32 *_out_len)
3881 {
3882 struct dm_struct *dm = (struct dm_struct *)dm_void;
3883 u32 addr = 0;
3884 u32 used = *_used;
3885 u32 out_len = *_out_len;
3886 u32 reg = 0;
3887
3888 /* @dump RF register */
3889 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3890 "RF-A==========\n");
3891
3892 for (addr = 0; addr <= 0xFF; addr++) {
3893 reg = odm_get_rf_reg(dm, RF_PATH_A, addr, RFREG_MASK);
3894 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3895 "0x%02x 0x%05x\n", addr, reg);
3896 }
3897
3898 #ifdef PHYDM_COMPILE_ABOVE_2SS
3899 if (dm->rf_type > RF_1T1R) {
3900 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3901 "RF-B==========\n");
3902
3903 for (addr = 0; addr <= 0xFF; addr++) {
3904 reg = odm_get_rf_reg(dm, RF_PATH_B, addr, RFREG_MASK);
3905 PDM_VAST_SNPF(out_len, used, output + used,
3906 out_len - used, "0x%02x 0x%05x\n",
3907 addr, reg);
3908 }
3909 }
3910 #endif
3911
3912 #ifdef PHYDM_COMPILE_ABOVE_3SS
3913 if (dm->rf_type > RF_2T2R) {
3914 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3915 "RF-C==========\n");
3916
3917 for (addr = 0; addr <= 0xFF; addr++) {
3918 reg = odm_get_rf_reg(dm, RF_PATH_C, addr, RFREG_MASK);
3919 PDM_VAST_SNPF(out_len, used, output + used,
3920 out_len - used, "0x%02x 0x%05x\n",
3921 addr, reg);
3922 }
3923 }
3924 #endif
3925
3926 #ifdef PHYDM_COMPILE_ABOVE_4SS
3927 if (dm->rf_type > RF_3T3R) {
3928 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3929 "RF-D==========\n");
3930
3931 for (addr = 0; addr <= 0xFF; addr++) {
3932 reg = odm_get_rf_reg(dm, RF_PATH_D, addr, RFREG_MASK);
3933 PDM_VAST_SNPF(out_len, used, output + used,
3934 out_len - used, "0x%02x 0x%05x\n",
3935 addr, reg);
3936 }
3937 }
3938 #endif
3939
3940 *_used = used;
3941 *_out_len = out_len;
3942 }
3943
phydm_dump_mac_reg(void * dm_void,u32 * _used,char * output,u32 * _out_len)3944 void phydm_dump_mac_reg(void *dm_void, u32 *_used, char *output, u32 *_out_len)
3945 {
3946 struct dm_struct *dm = (struct dm_struct *)dm_void;
3947 u32 addr = 0;
3948 u32 used = *_used;
3949 u32 out_len = *_out_len;
3950
3951 /* @dump MAC register */
3952 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3953 "MAC==========\n");
3954
3955 for (addr = 0; addr < 0x7ff; addr += 4)
3956 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3957 "0x%04x 0x%08x\n",
3958 addr, odm_get_bb_reg(dm, addr, MASKDWORD));
3959
3960 for (addr = 0x1000; addr < 0x17ff; addr += 4)
3961 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3962 "0x%04x 0x%08x\n",
3963 addr, odm_get_bb_reg(dm, addr, MASKDWORD));
3964
3965 *_used = used;
3966 *_out_len = out_len;
3967 }
3968
phydm_dump_reg(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)3969 void phydm_dump_reg(void *dm_void, char input[][16], u32 *_used, char *output,
3970 u32 *_out_len)
3971 {
3972 struct dm_struct *dm = (struct dm_struct *)dm_void;
3973 char help[] = "-h";
3974 u32 var1[10] = {0};
3975 u32 used = *_used;
3976 u32 out_len = *_out_len;
3977 u32 addr = 0;
3978
3979 if (input[1])
3980 PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
3981
3982 if ((strcmp(input[1], help) == 0)) {
3983 #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
3984 if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
3985 PDM_SNPF(out_len, used, output + used, out_len - used,
3986 "dumpreg {0:all, 1:BB, 2:RF, 3:MAC 4:BB2 for jgr3}\n");
3987 else
3988 #endif
3989 PDM_SNPF(out_len, used, output + used, out_len - used,
3990 "dumpreg {0:all, 1:BB, 2:RF, 3:MAC}\n");
3991 } else if (var1[0] == 0) {
3992 phydm_dump_mac_reg(dm, &used, output, &out_len);
3993 phydm_dump_bb_reg(dm, &used, output, &out_len);
3994 #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
3995 if (dm->ic_ip_series == PHYDM_IC_JGR3)
3996 phydm_dump_bb_reg2_jgr3(dm, &used, output, &out_len);
3997 #endif
3998
3999 phydm_dump_rf_reg(dm, &used, output, &out_len);
4000 } else if (var1[0] == 1) {
4001 phydm_dump_bb_reg(dm, &used, output, &out_len);
4002 } else if (var1[0] == 2) {
4003 phydm_dump_rf_reg(dm, &used, output, &out_len);
4004 } else if (var1[0] == 3) {
4005 phydm_dump_mac_reg(dm, &used, output, &out_len);
4006 } else if (var1[0] == 4) {
4007 #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
4008 if (dm->ic_ip_series == PHYDM_IC_JGR3)
4009 phydm_dump_bb_reg2_jgr3(dm, &used, output, &out_len);
4010 #endif
4011 }
4012
4013 *_used = used;
4014 *_out_len = out_len;
4015 }
4016
phydm_enable_big_jump(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)4017 void phydm_enable_big_jump(void *dm_void, char input[][16], u32 *_used,
4018 char *output, u32 *_out_len)
4019 {
4020 #if (RTL8822B_SUPPORT)
4021 struct dm_struct *dm = (struct dm_struct *)dm_void;
4022 struct phydm_dig_struct *dig_t = &dm->dm_dig_table;
4023 u32 dm_value[10] = {0};
4024 u8 i, input_idx = 0;
4025 u32 val;
4026
4027 if (!(dm->support_ic_type & ODM_RTL8822B))
4028 return;
4029
4030 for (i = 0; i < 5; i++) {
4031 if (input[i + 1]) {
4032 PHYDM_SSCANF(input[i + 1], DCMD_HEX, &dm_value[i]);
4033 input_idx++;
4034 }
4035 }
4036
4037 if (input_idx == 0)
4038 return;
4039
4040 if (dm_value[0] == 0) {
4041 dm->dm_dig_table.enable_adjust_big_jump = false;
4042
4043 val = (dig_t->big_jump_step3 << 5) |
4044 (dig_t->big_jump_step2 << 3) |
4045 dig_t->big_jump_step1;
4046
4047 odm_set_bb_reg(dm, R_0x8c8, 0xfe, val);
4048 } else {
4049 dm->dm_dig_table.enable_adjust_big_jump = true;
4050 }
4051 #endif
4052 }
4053
phydm_show_rx_rate(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)4054 void phydm_show_rx_rate(void *dm_void, char input[][16], u32 *_used,
4055 char *output, u32 *_out_len)
4056 {
4057 #if (RTL8822B_SUPPORT || RTL8821C_SUPPORT || RTL8814B_SUPPORT ||\
4058 RTL8195B_SUPPORT || RTL8822C_SUPPORT)
4059 struct dm_struct *dm = (struct dm_struct *)dm_void;
4060 struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info;
4061 u32 used = *_used;
4062 u32 out_len = *_out_len;
4063 u32 var1[10] = {0};
4064 char help[] = "-h";
4065 u8 i, input_idx = 0;
4066
4067 for (i = 0; i < 5; i++) {
4068 if (input[i + 1]) {
4069 PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]);
4070 input_idx++;
4071 }
4072 }
4073
4074 if (input_idx == 0)
4075 return;
4076
4077 if ((strcmp(input[1], help) == 0)) {
4078 PDM_SNPF(out_len, used, output + used, out_len - used,
4079 "{1: show Rx rate, 0:reset counter}\n");
4080 *_used = used;
4081 *_out_len = out_len;
4082 return;
4083
4084 } else if (var1[0] == 0) {
4085 phydm_reset_rx_rate_distribution(dm);
4086 *_used = used;
4087 *_out_len = out_len;
4088 return;
4089 }
4090
4091 /* @==Show SU Rate====================================================*/
4092 PDM_SNPF(out_len, used, output + used, out_len - used,
4093 "=====Rx SU rate Statistics=====\n");
4094 PDM_SNPF(out_len, used, output + used, out_len - used,
4095 "[SU][1SS] {%d, %d, %d, %d | %d, %d, %d, %d | %d, %d}\n",
4096 dbg->num_qry_vht_pkt[0], dbg->num_qry_vht_pkt[1],
4097 dbg->num_qry_vht_pkt[2], dbg->num_qry_vht_pkt[3],
4098 dbg->num_qry_vht_pkt[4], dbg->num_qry_vht_pkt[5],
4099 dbg->num_qry_vht_pkt[6], dbg->num_qry_vht_pkt[7],
4100 dbg->num_qry_vht_pkt[8], dbg->num_qry_vht_pkt[9]);
4101
4102 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
4103 if (dm->support_ic_type & (PHYDM_IC_ABOVE_2SS)) {
4104 PDM_SNPF(out_len, used, output + used, out_len - used,
4105 "[SU][2SS] {%d, %d, %d, %d | %d, %d, %d, %d | %d, %d}\n",
4106 dbg->num_qry_vht_pkt[10], dbg->num_qry_vht_pkt[11],
4107 dbg->num_qry_vht_pkt[12], dbg->num_qry_vht_pkt[13],
4108 dbg->num_qry_vht_pkt[14], dbg->num_qry_vht_pkt[15],
4109 dbg->num_qry_vht_pkt[16], dbg->num_qry_vht_pkt[17],
4110 dbg->num_qry_vht_pkt[18], dbg->num_qry_vht_pkt[19]);
4111 }
4112 #endif
4113 /* @==Show MU Rate====================================================*/
4114 #if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT) || (defined(PHYSTS_3RD_TYPE_SUPPORT))
4115 PDM_SNPF(out_len, used, output + used, out_len - used,
4116 "=====Rx MU rate Statistics=====\n");
4117 PDM_SNPF(out_len, used, output + used, out_len - used,
4118 "[MU][1SS] {%d, %d, %d, %d | %d, %d, %d, %d | %d, %d}\n",
4119 dbg->num_mu_vht_pkt[0], dbg->num_mu_vht_pkt[1],
4120 dbg->num_mu_vht_pkt[2], dbg->num_mu_vht_pkt[3],
4121 dbg->num_mu_vht_pkt[4], dbg->num_mu_vht_pkt[5],
4122 dbg->num_mu_vht_pkt[6], dbg->num_mu_vht_pkt[7],
4123 dbg->num_mu_vht_pkt[8], dbg->num_mu_vht_pkt[9]);
4124
4125 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
4126 if (dm->support_ic_type & (PHYDM_IC_ABOVE_2SS)) {
4127 PDM_SNPF(out_len, used, output + used, out_len - used,
4128 "[MU][2SS] {%d, %d, %d, %d | %d, %d, %d, %d | %d, %d}\n",
4129 dbg->num_mu_vht_pkt[10], dbg->num_mu_vht_pkt[11],
4130 dbg->num_mu_vht_pkt[12], dbg->num_mu_vht_pkt[13],
4131 dbg->num_mu_vht_pkt[14], dbg->num_mu_vht_pkt[15],
4132 dbg->num_mu_vht_pkt[16], dbg->num_mu_vht_pkt[17],
4133 dbg->num_mu_vht_pkt[18], dbg->num_mu_vht_pkt[19]);
4134 }
4135 #endif
4136 #endif
4137 *_used = used;
4138 *_out_len = out_len;
4139 #endif
4140 }
4141
phydm_per_tone_evm(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)4142 void phydm_per_tone_evm(void *dm_void, char input[][16], u32 *_used,
4143 char *output, u32 *_out_len)
4144 {
4145 struct dm_struct *dm = (struct dm_struct *)dm_void;
4146 u8 i, j;
4147 u32 used = *_used;
4148 u32 out_len = *_out_len;
4149 u32 var1[4] = {0};
4150 u32 val, tone_num, round;
4151 s8 rxevm_0, rxevm_1;
4152 s32 avg_num, evm_tone_0[256] = {0}, evm_tone_1[256] = {0};
4153 s32 rxevm_sum_0, rxevm_sum_1;
4154
4155 if (dm->support_ic_type & ODM_IC_11N_SERIES) {
4156 pr_debug("n series not support yet !\n");
4157 return;
4158 }
4159
4160 for (i = 0; i < 4; i++) {
4161 if (input[i + 1])
4162 PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]);
4163 }
4164
4165 avg_num = var1[0];
4166 round = var1[1];
4167
4168 if (!dm->is_linked) {
4169 PDM_SNPF(out_len, used, output + used, out_len - used,
4170 "No Link !!\n");
4171
4172 *_used = used;
4173 *_out_len = out_len;
4174
4175 return;
4176 }
4177
4178 pr_debug("ID=((%d)), BW=((%d)), fc=((CH-%d))\n", dm->curr_station_id,
4179 20 << *dm->band_width, *dm->channel);
4180 pr_debug("avg_num =((%d)), round =((%d))\n", avg_num, round);
4181 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
4182 watchdog_stop(dm->priv);
4183 #endif
4184 for (j = 0; j < round; j++) {
4185 pr_debug("\nround((%d))\n", (j + 1));
4186 if (*dm->band_width == CHANNEL_WIDTH_20) {
4187 for (tone_num = 228; tone_num <= 255; tone_num++) {
4188 odm_set_bb_reg(dm, R_0x8c4, 0xff8, tone_num);
4189 rxevm_sum_0 = 0;
4190 rxevm_sum_1 = 0;
4191 for (i = 0; i < avg_num; i++) {
4192 val = odm_read_4byte(dm, R_0xf8c);
4193
4194 rxevm_0 = (s8)((val & MASKBYTE2) >> 16);
4195 rxevm_0 = (rxevm_0 / 2);
4196 if (rxevm_0 < -63)
4197 rxevm_0 = 0;
4198
4199 rxevm_1 = (s8)((val & MASKBYTE3) >> 24);
4200 rxevm_1 = (rxevm_1 / 2);
4201 if (rxevm_1 < -63)
4202 rxevm_1 = 0;
4203 rxevm_sum_0 += rxevm_0;
4204 rxevm_sum_1 += rxevm_1;
4205 ODM_delay_ms(1);
4206 }
4207 evm_tone_0[tone_num] = (rxevm_sum_0 / avg_num);
4208 evm_tone_1[tone_num] = (rxevm_sum_1 / avg_num);
4209 pr_debug("Tone(-%-3d) RXEVM(1ss/2ss)=%d, %d\n",
4210 (256 - tone_num), evm_tone_0[tone_num],
4211 evm_tone_1[tone_num]);
4212 }
4213
4214 for (tone_num = 1; tone_num <= 28; tone_num++) {
4215 odm_set_bb_reg(dm, R_0x8c4, 0xff8, tone_num);
4216 rxevm_sum_0 = 0;
4217 rxevm_sum_1 = 0;
4218 for (i = 0; i < avg_num; i++) {
4219 val = odm_read_4byte(dm, R_0xf8c);
4220
4221 rxevm_0 = (s8)((val & MASKBYTE2) >> 16);
4222 rxevm_0 = (rxevm_0 / 2);
4223 if (rxevm_0 < -63)
4224 rxevm_0 = 0;
4225
4226 rxevm_1 = (s8)((val & MASKBYTE3) >> 24);
4227 rxevm_1 = (rxevm_1 / 2);
4228 if (rxevm_1 < -63)
4229 rxevm_1 = 0;
4230 rxevm_sum_0 += rxevm_0;
4231 rxevm_sum_1 += rxevm_1;
4232 ODM_delay_ms(1);
4233 }
4234 evm_tone_0[tone_num] = (rxevm_sum_0 / avg_num);
4235 evm_tone_1[tone_num] = (rxevm_sum_1 / avg_num);
4236 pr_debug("Tone(%-3d) RXEVM(1ss/2ss)=%d, %d\n",
4237 tone_num, evm_tone_0[tone_num],
4238 evm_tone_1[tone_num]);
4239 }
4240 } else if (*dm->band_width == CHANNEL_WIDTH_40) {
4241 for (tone_num = 198; tone_num <= 254; tone_num++) {
4242 odm_set_bb_reg(dm, R_0x8c4, 0xff8, tone_num);
4243 rxevm_sum_0 = 0;
4244 rxevm_sum_1 = 0;
4245 for (i = 0; i < avg_num; i++) {
4246 val = odm_read_4byte(dm, R_0xf8c);
4247
4248 rxevm_0 = (s8)((val & MASKBYTE2) >> 16);
4249 rxevm_0 = (rxevm_0 / 2);
4250 if (rxevm_0 < -63)
4251 rxevm_0 = 0;
4252
4253 rxevm_1 = (s8)((val & MASKBYTE3) >> 24);
4254 rxevm_1 = (rxevm_1 / 2);
4255 if (rxevm_1 < -63)
4256 rxevm_1 = 0;
4257
4258 rxevm_sum_0 += rxevm_0;
4259 rxevm_sum_1 += rxevm_1;
4260 ODM_delay_ms(1);
4261 }
4262 evm_tone_0[tone_num] = (rxevm_sum_0 / avg_num);
4263 evm_tone_1[tone_num] = (rxevm_sum_1 / avg_num);
4264 pr_debug("Tone(-%-3d) RXEVM(1ss/2ss)=%d, %d\n",
4265 (256 - tone_num), evm_tone_0[tone_num],
4266 evm_tone_1[tone_num]);
4267 }
4268
4269 for (tone_num = 2; tone_num <= 58; tone_num++) {
4270 odm_set_bb_reg(dm, R_0x8c4, 0xff8, tone_num);
4271 rxevm_sum_0 = 0;
4272 rxevm_sum_1 = 0;
4273 for (i = 0; i < avg_num; i++) {
4274 val = odm_read_4byte(dm, R_0xf8c);
4275
4276 rxevm_0 = (s8)((val & MASKBYTE2) >> 16);
4277 rxevm_0 = (rxevm_0 / 2);
4278 if (rxevm_0 < -63)
4279 rxevm_0 = 0;
4280
4281 rxevm_1 = (s8)((val & MASKBYTE3) >> 24);
4282 rxevm_1 = (rxevm_1 / 2);
4283 if (rxevm_1 < -63)
4284 rxevm_1 = 0;
4285 rxevm_sum_0 += rxevm_0;
4286 rxevm_sum_1 += rxevm_1;
4287 ODM_delay_ms(1);
4288 }
4289 evm_tone_0[tone_num] = (rxevm_sum_0 / avg_num);
4290 evm_tone_1[tone_num] = (rxevm_sum_1 / avg_num);
4291 pr_debug("Tone(%-3d) RXEVM(1ss/2ss)=%d, %d\n",
4292 tone_num, evm_tone_0[tone_num],
4293 evm_tone_1[tone_num]);
4294 }
4295 } else if (*dm->band_width == CHANNEL_WIDTH_80) {
4296 for (tone_num = 134; tone_num <= 254; tone_num++) {
4297 odm_set_bb_reg(dm, R_0x8c4, 0xff8, tone_num);
4298 rxevm_sum_0 = 0;
4299 rxevm_sum_1 = 0;
4300 for (i = 0; i < avg_num; i++) {
4301 val = odm_read_4byte(dm, R_0xf8c);
4302
4303 rxevm_0 = (s8)((val & MASKBYTE2) >> 16);
4304 rxevm_0 = (rxevm_0 / 2);
4305 if (rxevm_0 < -63)
4306 rxevm_0 = 0;
4307
4308 rxevm_1 = (s8)((val & MASKBYTE3) >> 24);
4309 rxevm_1 = (rxevm_1 / 2);
4310 if (rxevm_1 < -63)
4311 rxevm_1 = 0;
4312 rxevm_sum_0 += rxevm_0;
4313 rxevm_sum_1 += rxevm_1;
4314 ODM_delay_ms(1);
4315 }
4316 evm_tone_0[tone_num] = (rxevm_sum_0 / avg_num);
4317 evm_tone_1[tone_num] = (rxevm_sum_1 / avg_num);
4318 pr_debug("Tone(-%-3d) RXEVM(1ss/2ss)=%d, %d\n",
4319 (256 - tone_num), evm_tone_0[tone_num],
4320 evm_tone_1[tone_num]);
4321 }
4322
4323 for (tone_num = 2; tone_num <= 122; tone_num++) {
4324 odm_set_bb_reg(dm, R_0x8c4, 0xff8, tone_num);
4325 rxevm_sum_0 = 0;
4326 rxevm_sum_1 = 0;
4327 for (i = 0; i < avg_num; i++) {
4328 val = odm_read_4byte(dm, R_0xf8c);
4329
4330 rxevm_0 = (s8)((val & MASKBYTE2) >> 16);
4331 rxevm_0 = (rxevm_0 / 2);
4332 if (rxevm_0 < -63)
4333 rxevm_0 = 0;
4334
4335 rxevm_1 = (s8)((val & MASKBYTE3) >> 24);
4336 rxevm_1 = (rxevm_1 / 2);
4337 if (rxevm_1 < -63)
4338 rxevm_1 = 0;
4339 rxevm_sum_0 += rxevm_0;
4340 rxevm_sum_1 += rxevm_1;
4341 ODM_delay_ms(1);
4342 }
4343 evm_tone_0[tone_num] = (rxevm_sum_0 / avg_num);
4344 evm_tone_1[tone_num] = (rxevm_sum_1 / avg_num);
4345 pr_debug("Tone(%-3d) RXEVM (1ss/2ss)=%d, %d\n",
4346 tone_num, evm_tone_0[tone_num],
4347 evm_tone_1[tone_num]);
4348 }
4349 }
4350 }
4351 *_used = used;
4352 *_out_len = out_len;
4353 }
4354
phydm_bw_ch_adjust(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)4355 void phydm_bw_ch_adjust(void *dm_void, char input[][16],
4356 u32 *_used, char *output, u32 *_out_len)
4357 {
4358 struct dm_struct *dm = (struct dm_struct *)dm_void;
4359 char help[] = "-h";
4360 u32 var1[10] = {0};
4361 u32 used = *_used;
4362 u32 out_len = *_out_len;
4363 u8 i;
4364 boolean is_enable_dbg_mode;
4365 u8 central_ch, primary_ch_idx;
4366 enum channel_width bw;
4367
4368 #ifdef PHYDM_COMMON_API_SUPPORT
4369
4370 if ((strcmp(input[1], help) == 0)) {
4371 PDM_SNPF(out_len, used, output + used, out_len - used,
4372 "{en} {CH} {pr_ch_idx 1/2/3/4/9/10} {0:20M,1:40M,2:80M}\n");
4373 goto out;
4374 }
4375
4376 if (!(dm->support_ic_type & CMN_API_SUPPORT_IC)) {
4377 PDM_SNPF(out_len, used, output + used, out_len - used,
4378 "Not support this API\n");
4379 goto out;
4380 }
4381
4382 for (i = 0; i < 4; i++) {
4383 if (input[i + 1])
4384 PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]);
4385 }
4386
4387 is_enable_dbg_mode = (boolean)var1[0];
4388 central_ch = (u8)var1[1];
4389 primary_ch_idx = (u8)var1[2];
4390 bw = (enum channel_width)var1[3];
4391
4392 if (is_enable_dbg_mode) {
4393 dm->is_disable_phy_api = false;
4394 phydm_api_switch_bw_channel(dm, central_ch, primary_ch_idx, bw);
4395 dm->is_disable_phy_api = true;
4396 PDM_SNPF(out_len, used, output + used, out_len - used,
4397 "central_ch = %d, primary_ch_idx = %d, bw = %d\n",
4398 central_ch, primary_ch_idx, bw);
4399 }
4400 out:
4401 #endif
4402
4403 *_used = used;
4404 *_out_len = out_len;
4405 }
4406
phydm_ext_rf_element_ctrl(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)4407 void phydm_ext_rf_element_ctrl(void *dm_void, char input[][16], u32 *_used,
4408 char *output, u32 *_out_len)
4409 {
4410 struct dm_struct *dm = (struct dm_struct *)dm_void;
4411 u32 val[10] = {0};
4412 u8 i = 0, input_idx = 0;
4413
4414 for (i = 0; i < 5; i++) {
4415 if (input[i + 1]) {
4416 PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &val[i]);
4417 input_idx++;
4418 }
4419 }
4420
4421 if (input_idx == 0)
4422 return;
4423
4424 if (val[0] == 1) /*@ext switch*/ {
4425 phydm_set_ext_switch(dm, val[1]);
4426 }
4427 }
4428
phydm_print_dbgport(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)4429 void phydm_print_dbgport(void *dm_void, char input[][16], u32 *_used,
4430 char *output, u32 *_out_len)
4431 {
4432 struct dm_struct *dm = (struct dm_struct *)dm_void;
4433 char help[] = "-h";
4434 u32 var1[10] = {0};
4435 u32 used = *_used;
4436 u32 out_len = *_out_len;
4437 u32 dbg_port_value = 0;
4438 u8 val[32];
4439 u8 tmp = 0;
4440 u8 i;
4441
4442 if (strcmp(input[1], help) == 0) {
4443 PDM_SNPF(out_len, used, output + used, out_len - used,
4444 "{dbg_port_idx}\n");
4445 goto out;
4446 }
4447
4448 PHYDM_SSCANF(input[1], DCMD_HEX, &var1[0]);
4449
4450 dm->debug_components |= ODM_COMP_API;
4451 if (phydm_set_bb_dbg_port(dm, DBGPORT_PRI_3, var1[0])) {
4452 dbg_port_value = phydm_get_bb_dbg_port_val(dm);
4453 phydm_release_bb_dbg_port(dm);
4454
4455 for (i = 0; i < 32; i++)
4456 val[i] = (u8)((dbg_port_value & BIT(i)) >> i);
4457
4458 PDM_SNPF(out_len, used, output + used, out_len - used,
4459 "Dbg Port[0x%x] = ((0x%x))\n", var1[0],
4460 dbg_port_value);
4461
4462 for (i = 4; i != 0; i--) {
4463 tmp = 8 * (i - 1);
4464 PDM_SNPF(out_len, used, output + used, out_len - used,
4465 "val[%d:%d] = 8b'%d %d %d %d %d %d %d %d\n",
4466 tmp + 7, tmp, val[tmp + 7], val[tmp + 6],
4467 val[tmp + 5], val[tmp + 4], val[tmp + 3],
4468 val[tmp + 2], val[tmp + 1], val[tmp + 0]);
4469 }
4470 }
4471 dm->debug_components &= (~ODM_COMP_API);
4472 out:
4473 *_used = used;
4474 *_out_len = out_len;
4475 }
4476
phydm_get_anapar_table(void * dm_void,u32 * _used,char * output,u32 * _out_len)4477 void phydm_get_anapar_table(void *dm_void, u32 *_used, char *output,
4478 u32 *_out_len)
4479 {
4480 struct dm_struct *dm = (struct dm_struct *)dm_void;
4481 u32 used = *_used;
4482 u32 out_len = *_out_len;
4483 enum rf_path i = RF_PATH_A;
4484
4485 #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
4486 if (!(dm->support_ic_type & ODM_IC_JGR3_SERIES))
4487 return;
4488
4489 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
4490 "------ Analog parameters start ------\n");
4491
4492 for (i = RF_PATH_A; i < (enum rf_path)dm->num_rf_path; i++)
4493 phydm_get_per_path_anapar_jgr3(dm, i, &used, output, &out_len);
4494 #endif
4495
4496 *_used = used;
4497 *_out_len = out_len;
4498 }
4499
phydm_dd_dbg_dump(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)4500 void phydm_dd_dbg_dump(void *dm_void, char input[][16], u32 *_used,
4501 char *output, u32 *_out_len)
4502 {
4503 struct dm_struct *dm = (struct dm_struct *)dm_void;
4504 char help[] = "-h";
4505 u32 var1[10] = {0};
4506 u32 used = *_used;
4507 u32 out_len = *_out_len;
4508
4509 PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
4510
4511 if ((strcmp(input[1], help) == 0)) {
4512 PDM_SNPF(out_len, used, output + used, out_len - used,
4513 "dump: {1}\n");
4514 return;
4515 } else if (var1[0] == 1) {
4516 /*[Reg]*/
4517 phydm_dump_mac_reg(dm, &used, output, &out_len);
4518 phydm_dump_bb_reg(dm, &used, output, &out_len);
4519 #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
4520 if (dm->ic_ip_series == PHYDM_IC_JGR3)
4521 phydm_dump_bb_reg2_jgr3(dm, &used, output, &out_len);
4522 #endif
4523
4524 phydm_dump_rf_reg(dm, &used, output, &out_len);
4525 /*[Dbg Port]*/
4526 #ifdef PHYDM_AUTO_DEGBUG
4527 phydm_dbg_port_dump(dm, &used, output, &out_len);
4528 #endif
4529 /*[Analog Parameters]*/
4530 phydm_get_anapar_table(dm, &used, output, &out_len);
4531 }
4532 }
4533
phydm_nss_hitogram_mp(void * dm_void,enum PDM_RATE_TYPE rate_type,u32 * _used,char * output,u32 * _out_len)4534 void phydm_nss_hitogram_mp(void *dm_void, enum PDM_RATE_TYPE rate_type,
4535 u32 *_used, char *output, u32 *_out_len)
4536 {
4537 struct dm_struct *dm = (struct dm_struct *)dm_void;
4538 struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info;
4539 struct phydm_phystatus_statistic *dbg_s = &dbg_i->physts_statistic_info;
4540 u32 used = *_used;
4541 u32 out_len = *_out_len;
4542 char buf[PHYDM_SNPRINT_SIZE] = {0};
4543 u16 buf_size = PHYDM_SNPRINT_SIZE;
4544 u16 h_size = PHY_HIST_SIZE;
4545 u16 *evm_hist = &dbg_s->evm_1ss_hist[0];
4546 u16 *snr_hist = &dbg_s->snr_1ss_hist[0];
4547 u8 i = 0;
4548 u8 ss = phydm_rate_type_2_num_ss(dm, rate_type);
4549
4550 if (rate_type == PDM_OFDM) {
4551 phydm_print_hist_2_buf(dm, dbg_s->evm_ofdm_hist, PHY_HIST_SIZE,
4552 buf, buf_size);
4553 PDM_SNPF(out_len, used, output + used, out_len - used,
4554 "%-14s=%s\n", "[OFDM][EVM]", buf);
4555
4556 phydm_print_hist_2_buf(dm, dbg_s->snr_ofdm_hist, PHY_HIST_SIZE,
4557 buf, buf_size);
4558 PDM_SNPF(out_len, used, output + used, out_len - used,
4559 "%-14s=%s\n", "[OFDM][SNR]", buf);
4560
4561 *_used = used;
4562 *_out_len = out_len;
4563 return;
4564 }
4565
4566 for (i = 0; i < ss; i++) {
4567 if (rate_type == PDM_1SS) {
4568 evm_hist = &dbg_s->evm_1ss_hist[0];
4569 snr_hist = &dbg_s->snr_1ss_hist[0];
4570 } else if (rate_type == PDM_2SS) {
4571 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
4572 evm_hist = &dbg_s->evm_2ss_hist[i][0];
4573 snr_hist = &dbg_s->snr_2ss_hist[i][0];
4574 #endif
4575 } else if (rate_type == PDM_3SS) {
4576 #if (defined(PHYDM_COMPILE_ABOVE_3SS))
4577 evm_hist = &dbg_s->evm_3ss_hist[i][0];
4578 snr_hist = &dbg_s->snr_3ss_hist[i][0];
4579 #endif
4580 } else if (rate_type == PDM_4SS) {
4581 #if (defined(PHYDM_COMPILE_ABOVE_4SS))
4582 evm_hist = &dbg_s->evm_4ss_hist[i][0];
4583 snr_hist = &dbg_s->snr_4ss_hist[i][0];
4584 #endif
4585 }
4586
4587 phydm_print_hist_2_buf(dm, evm_hist, h_size, buf, buf_size);
4588 PDM_SNPF(out_len, used, output + used, out_len - used,
4589 "[%d-SS][EVM][%d]=%s\n", ss, i, buf);
4590 phydm_print_hist_2_buf(dm, snr_hist, h_size, buf, buf_size);
4591 PDM_SNPF(out_len, used, output + used, out_len - used,
4592 "[%d-SS][SNR][%d]=%s\n", ss, i, buf);
4593 }
4594 *_used = used;
4595 *_out_len = out_len;
4596 }
4597
phydm_mp_dbg(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)4598 void phydm_mp_dbg(void *dm_void, char input[][16], u32 *_used, char *output,
4599 u32 *_out_len)
4600 {
4601 struct dm_struct *dm = (struct dm_struct *)dm_void;
4602 struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info;
4603 struct phydm_phystatus_statistic *dbg_s = &dbg_i->physts_statistic_info;
4604 struct phydm_phystatus_avg *dbg_avg = &dbg_i->phystatus_statistic_avg;
4605 char *rate_type = NULL;
4606 u8 tmp_rssi_avg[4];
4607 u8 tmp_snr_avg[4];
4608 u8 tmp_evm_avg[4];
4609 u32 tmp_cnt = 0;
4610 char buf[PHYDM_SNPRINT_SIZE] = {0};
4611 u32 used = *_used;
4612 u32 out_len = *_out_len;
4613 u32 var1[10] = {0};
4614 u16 buf_size = PHYDM_SNPRINT_SIZE;
4615 u16 th_size = PHY_HIST_SIZE - 1;
4616 u8 i = 0;
4617
4618 if (!(*dm->mp_mode))
4619 return;
4620
4621 PDM_SNPF(out_len, used, output + used, out_len - used,
4622 "BW=((%d)), fc=((CH-%d))\n",
4623 20 << *dm->band_width, *dm->channel);
4624
4625 /*@===[PHY Histogram]================================================*/
4626 PDM_SNPF(out_len, used, output + used, out_len - used,
4627 "[PHY Histogram] ==============>\n");
4628 /*@===[Threshold]===*/
4629 phydm_print_hist_2_buf(dm, dbg_i->evm_hist_th, th_size, buf, buf_size);
4630 PDM_SNPF(out_len, used, output + used, out_len - used,
4631 "%-16s=%s\n", "[EVM_TH]", buf);
4632 phydm_print_hist_2_buf(dm, dbg_i->snr_hist_th, th_size, buf, buf_size);
4633 PDM_SNPF(out_len, used, output + used, out_len - used,
4634 "%-16s=%s\n", "[SNR_TH]", buf);
4635 /*@===[OFDM]===*/
4636 phydm_nss_hitogram_mp(dm, PDM_OFDM, &used, output, &out_len);
4637 /*@===[1-SS]===*/
4638 phydm_nss_hitogram_mp(dm, PDM_1SS, &used, output, &out_len);
4639 /*@===[2-SS]===*/
4640 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
4641 if (dm->support_ic_type & PHYDM_IC_ABOVE_2SS)
4642 phydm_nss_hitogram_mp(dm, PDM_2SS, &used, output, &out_len);
4643 #endif
4644 /*@===[3-SS]===*/
4645 #if (defined(PHYDM_COMPILE_ABOVE_3SS))
4646 if (dm->support_ic_type & PHYDM_IC_ABOVE_3SS)
4647 phydm_nss_hitogram_mp(dm, PDM_3SS, &used, output, &out_len);
4648 #endif
4649 /*@===[4-SS]===*/
4650 #if (defined(PHYDM_COMPILE_ABOVE_4SS))
4651 if (dm->support_ic_type & PHYDM_IC_ABOVE_4SS)
4652 phydm_nss_hitogram_mp(dm, PDM_4SS, &used, output, &out_len);
4653 #endif
4654 /*@===[PHY Avg]======================================================*/
4655 phydm_get_avg_phystatus_val(dm);
4656 PDM_SNPF(out_len, used, output + used, out_len - used,
4657 "[PHY Avg] ==============>\n");
4658
4659 phydm_get_avg_phystatus_val(dm);
4660
4661 switch (dm->num_rf_path) {
4662 #if (defined(PHYDM_COMPILE_ABOVE_4SS))
4663 case 4:
4664 PDM_SNPF(out_len, used, output + used, out_len - used,
4665 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d, %.2d}\n",
4666 "[Beacon]", dbg_s->rssi_beacon_cnt,
4667 dbg_avg->rssi_beacon_avg[0],
4668 dbg_avg->rssi_beacon_avg[1],
4669 dbg_avg->rssi_beacon_avg[2],
4670 dbg_avg->rssi_beacon_avg[3]);
4671 break;
4672 #endif
4673 #if (defined(PHYDM_COMPILE_ABOVE_3SS))
4674 case 3:
4675 PDM_SNPF(out_len, used, output + used, out_len - used,
4676 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d}\n",
4677 "[Beacon]", dbg_s->rssi_beacon_cnt,
4678 dbg_avg->rssi_beacon_avg[0],
4679 dbg_avg->rssi_beacon_avg[1],
4680 dbg_avg->rssi_beacon_avg[2]);
4681 break;
4682 #endif
4683 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
4684 case 2:
4685 PDM_SNPF(out_len, used, output + used, out_len - used,
4686 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d}\n",
4687 "[Beacon]", dbg_s->rssi_beacon_cnt,
4688 dbg_avg->rssi_beacon_avg[0],
4689 dbg_avg->rssi_beacon_avg[1]);
4690 break;
4691 #endif
4692 default:
4693 PDM_SNPF(out_len, used, output + used, out_len - used,
4694 "* %-8s Cnt=((%.3d)) RSSI:{%.2d}\n",
4695 "[Beacon]", dbg_s->rssi_beacon_cnt,
4696 dbg_avg->rssi_beacon_avg[0]);
4697 break;
4698 }
4699
4700 switch (dm->num_rf_path) {
4701 #ifdef PHYSTS_3RD_TYPE_SUPPORT
4702 #if (defined(PHYDM_COMPILE_ABOVE_4SS))
4703 case 4:
4704 PDM_SNPF(out_len, used, output + used, out_len - used,
4705 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d, %.2d}\n",
4706 "[CCK]", dbg_s->rssi_cck_cnt,
4707 dbg_avg->rssi_cck_avg,
4708 dbg_avg->rssi_cck_avg_abv_2ss[0],
4709 dbg_avg->rssi_cck_avg_abv_2ss[1],
4710 dbg_avg->rssi_cck_avg_abv_2ss[2]);
4711 break;
4712 #endif
4713 #if (defined(PHYDM_COMPILE_ABOVE_3SS))
4714 case 3:
4715 PDM_SNPF(out_len, used, output + used, out_len - used,
4716 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d}\n",
4717 "[CCK]", dbg_s->rssi_cck_cnt,
4718 dbg_avg->rssi_cck_avg,
4719 dbg_avg->rssi_cck_avg_abv_2ss[0],
4720 dbg_avg->rssi_cck_avg_abv_2ss[1]);
4721 break;
4722 #endif
4723 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
4724 case 2:
4725 PDM_SNPF(out_len, used, output + used, out_len - used,
4726 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d}\n",
4727 "[CCK]", dbg_s->rssi_cck_cnt,
4728 dbg_avg->rssi_cck_avg,
4729 dbg_avg->rssi_cck_avg_abv_2ss[0]);
4730 break;
4731 #endif
4732 #endif
4733 default:
4734 PDM_SNPF(out_len, used, output + used, out_len - used,
4735 "* %-8s Cnt=((%.3d)) RSSI:{%.2d}\n",
4736 "[CCK]", dbg_s->rssi_cck_cnt, dbg_avg->rssi_cck_avg);
4737 break;
4738 }
4739
4740 for (i = 0; i <= 4; i++) {
4741 if (i > dm->num_rf_path)
4742 break;
4743
4744 odm_memory_set(dm, tmp_rssi_avg, 0, 4);
4745 odm_memory_set(dm, tmp_snr_avg, 0, 4);
4746 odm_memory_set(dm, tmp_evm_avg, 0, 4);
4747
4748 switch (i) {
4749 #if (defined(PHYDM_COMPILE_ABOVE_4SS))
4750 case 4:
4751 rate_type = "[4-SS]";
4752 tmp_cnt = dbg_s->rssi_4ss_cnt;
4753 odm_move_memory(dm, tmp_rssi_avg,
4754 dbg_avg->rssi_4ss_avg, dm->num_rf_path);
4755 odm_move_memory(dm, tmp_snr_avg,
4756 dbg_avg->snr_4ss_avg, dm->num_rf_path);
4757 odm_move_memory(dm, tmp_evm_avg, dbg_avg->evm_4ss_avg,
4758 4);
4759 break;
4760 #endif
4761 #if (defined(PHYDM_COMPILE_ABOVE_3SS))
4762 case 3:
4763 rate_type = "[3-SS]";
4764 tmp_cnt = dbg_s->rssi_3ss_cnt;
4765 odm_move_memory(dm, tmp_rssi_avg,
4766 dbg_avg->rssi_3ss_avg, dm->num_rf_path);
4767 odm_move_memory(dm, tmp_snr_avg,
4768 dbg_avg->snr_3ss_avg, dm->num_rf_path);
4769 odm_move_memory(dm, tmp_evm_avg,
4770 dbg_avg->evm_3ss_avg, 3);
4771 break;
4772 #endif
4773 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
4774 case 2:
4775 rate_type = "[2-SS]";
4776 tmp_cnt = dbg_s->rssi_2ss_cnt;
4777 odm_move_memory(dm, tmp_rssi_avg,
4778 dbg_avg->rssi_2ss_avg, dm->num_rf_path);
4779 odm_move_memory(dm, tmp_snr_avg, dbg_avg->snr_2ss_avg,
4780 dm->num_rf_path);
4781 odm_move_memory(dm, tmp_evm_avg,
4782 dbg_avg->evm_2ss_avg, 2);
4783 break;
4784 #endif
4785 case 1:
4786 rate_type = "[1-SS]";
4787 tmp_cnt = dbg_s->rssi_1ss_cnt;
4788 odm_move_memory(dm, tmp_rssi_avg,
4789 dbg_avg->rssi_1ss_avg, dm->num_rf_path);
4790 odm_move_memory(dm, tmp_snr_avg,
4791 dbg_avg->snr_1ss_avg, dm->num_rf_path);
4792 odm_move_memory(dm, tmp_evm_avg,
4793 &dbg_avg->evm_1ss_avg, 1);
4794 break;
4795 default:
4796 rate_type = "[L-OFDM]";
4797 tmp_cnt = dbg_s->rssi_ofdm_cnt;
4798 odm_move_memory(dm, tmp_rssi_avg,
4799 dbg_avg->rssi_ofdm_avg,
4800 dm->num_rf_path);
4801 odm_move_memory(dm, tmp_snr_avg,
4802 dbg_avg->snr_ofdm_avg, dm->num_rf_path);
4803 odm_move_memory(dm, tmp_evm_avg,
4804 &dbg_avg->evm_ofdm_avg, 1);
4805 break;
4806 }
4807
4808 PDM_SNPF(out_len, used, output + used, out_len - used,
4809 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d, %.2d} SNR:{%.2d, %.2d, %.2d, %.2d} EVM:{-%.2d, -%.2d, -%.2d, -%.2d}\n",
4810 rate_type, tmp_cnt,
4811 tmp_rssi_avg[0], tmp_rssi_avg[1],
4812 tmp_rssi_avg[2], tmp_rssi_avg[3],
4813 tmp_snr_avg[0], tmp_snr_avg[1],
4814 tmp_snr_avg[2], tmp_snr_avg[3],
4815 tmp_evm_avg[0], tmp_evm_avg[1],
4816 tmp_evm_avg[2], tmp_evm_avg[3]);
4817 }
4818
4819 phydm_reset_phystatus_statistic(dm);
4820
4821 PDM_SNPF(out_len, used, output + used, out_len - used,
4822 "rxsc_idx {Legacy, 20, 40, 80} = {%d, %d, %d, %d}\n",
4823 dm->rxsc_l, dm->rxsc_20, dm->rxsc_40, dm->rxsc_80);
4824
4825 *_used = used;
4826 *_out_len = out_len;
4827 }
4828
phydm_reg_monitor(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)4829 void phydm_reg_monitor(void *dm_void, char input[][16], u32 *_used,
4830 char *output, u32 *_out_len)
4831 {
4832 struct dm_struct *dm = (struct dm_struct *)dm_void;
4833 char help[] = "-h";
4834 u32 var1[10] = {0};
4835 u32 used = *_used;
4836 u32 out_len = *_out_len;
4837 boolean en_mntr = false;
4838 u8 i = 0;
4839
4840 for (i = 0; i < 7; i++) {
4841 if (input[i + 1])
4842 PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]);
4843 }
4844
4845 if ((strcmp(input[1], help) == 0)) {
4846 PDM_SNPF(out_len, used, output + used, out_len - used,
4847 "reg_mntr {en} {0:all, 1:BB, 2:RF, 3:MAC 4:1/2/4 byte}\n");
4848 } else {
4849 if (var1[0] == 1)
4850 en_mntr = true;
4851 else
4852 en_mntr = false;
4853
4854 if (var1[1] == 0) {
4855 dm->en_reg_mntr_bb = en_mntr;
4856 dm->en_reg_mntr_rf = en_mntr;
4857 dm->en_reg_mntr_mac = en_mntr;
4858 dm->en_reg_mntr_byte = en_mntr;
4859 } else if (var1[1] == 1) {
4860 dm->en_reg_mntr_bb = en_mntr;
4861 } else if (var1[1] == 2) {
4862 dm->en_reg_mntr_rf = en_mntr;
4863 } else if (var1[1] == 3) {
4864 dm->en_reg_mntr_mac = en_mntr;
4865 } else if (var1[1] == 4) {
4866 dm->en_reg_mntr_byte = en_mntr;
4867 }
4868 }
4869
4870 PDM_SNPF(out_len, used, output + used, out_len - used,
4871 "en: BB:%d, RF:%d, MAC:%d, byte:%d\n", dm->en_reg_mntr_bb,
4872 dm->en_reg_mntr_rf, dm->en_reg_mntr_mac, dm->en_reg_mntr_byte);
4873
4874 *_used = used;
4875 *_out_len = out_len;
4876 }
4877
4878 #if (RTL8822C_SUPPORT)
phydm_get_agc_rf_gain(void * dm_void,boolean is_mod,u8 tab,u8 mp_gain_i)4879 u16 phydm_get_agc_rf_gain(void *dm_void, boolean is_mod, u8 tab, u8 mp_gain_i)
4880 {
4881 struct dm_struct *dm = (struct dm_struct *)dm_void;
4882 u16 rf_gain = 0x0;
4883
4884 if (is_mod)
4885 rf_gain = dm->agc_rf_gain[tab][mp_gain_i];
4886 else
4887 rf_gain = dm->agc_rf_gain_ori[tab][mp_gain_i];
4888
4889 return rf_gain;
4890 }
4891 #endif
4892
phydm_get_rxagc_table_dbg(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)4893 void phydm_get_rxagc_table_dbg(void *dm_void, char input[][16], u32 *_used,
4894 char *output, u32 *_out_len)
4895 {
4896 struct dm_struct *dm = (struct dm_struct *)dm_void;
4897 char help[] = "-h";
4898 u32 var1[10] = {0};
4899 u32 used = *_used;
4900 u32 out_len = *_out_len;
4901 u8 tab = 0;
4902 boolean is_modified = false;
4903 u8 mp_gain = 0;
4904 u16 rf_gain = 0;
4905 u8 i = 0;
4906
4907 #if (RTL8822C_SUPPORT)
4908 if (!(dm->support_ic_type & ODM_RTL8822C))
4909 return;
4910
4911 if ((strcmp(input[1], help) == 0)) {
4912 PDM_SNPF(out_len, used, output + used, out_len - used,
4913 "get rxagc table : {0:ori, 1:modified} {table:0~15} {mp_gain_idx:0~63, all:0xff}\n");
4914 } else {
4915 for (i = 0; i < 3; i++) {
4916 if (input[i + 1])
4917 PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]);
4918 }
4919
4920 is_modified = (boolean)var1[0];
4921 tab = (u8)var1[1];
4922 mp_gain = (u8)var1[2];
4923
4924 PDM_SNPF(out_len, used, output + used, out_len - used,
4925 "agc_table_cnt:%d, is_agc_tab_pos_shift:%d, agc_table_shift:%d\n",
4926 dm->agc_table_cnt, dm->is_agc_tab_pos_shift,
4927 dm->agc_table_shift);
4928
4929 if (mp_gain == 0xff) {
4930 for (i = 0; i < 64; i++) {
4931 rf_gain = phydm_get_agc_rf_gain(dm, is_modified,
4932 tab, i);
4933
4934 PDM_SNPF(out_len, used, output + used,
4935 out_len - used,
4936 "agc_table:%d, mp_gain_idx:0x%x, rf_gain_idx:0x%x\n",
4937 tab, i, rf_gain);
4938 }
4939 } else {
4940 rf_gain = phydm_get_agc_rf_gain(dm, is_modified, tab,
4941 mp_gain);
4942
4943 PDM_SNPF(out_len, used, output + used, out_len - used,
4944 "agc_table:%d, mp_gain_idx:0x%x, rf_gain_idx:0x%x\n",
4945 tab, mp_gain, rf_gain);
4946 }
4947 }
4948 #endif
4949 *_used = used;
4950 *_out_len = out_len;
4951 }
4952
phydm_shift_rxagc_table_dbg(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)4953 void phydm_shift_rxagc_table_dbg(void *dm_void, char input[][16], u32 *_used,
4954 char *output, u32 *_out_len)
4955 {
4956 struct dm_struct *dm = (struct dm_struct *)dm_void;
4957 char help[] = "-h";
4958 u32 var1[10] = {0};
4959 u32 used = *_used;
4960 u32 out_len = *_out_len;
4961 u8 i = 0;
4962 u16 value_db = 0;
4963
4964 #if (RTL8822C_SUPPORT)
4965 if (!(dm->support_ic_type & ODM_RTL8822C))
4966 return;
4967
4968 if ((strcmp(input[1], help) == 0)) {
4969 PDM_SNPF(out_len, used, output + used, out_len - used,
4970 "shift rxagc table : {0:-, 1:+} {value(0~63, unit:2dB)}\n");
4971 } else {
4972 for (i = 0; i < 3; i++) {
4973 if (input[i + 1])
4974 PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL,
4975 &var1[i]);
4976 }
4977
4978 if ((u8)var1[1] > 63) {
4979 PDM_SNPF(out_len, used, output + used, out_len - used,
4980 "Do not enter the value larger than 63!\n");
4981 } else {
4982 phydm_shift_rxagc_table(dm, (boolean)var1[0],
4983 (u8)var1[1]);
4984
4985 value_db = (u8)var1[1] << 1;
4986 PDM_SNPF(out_len, used, output + used, out_len - used,
4987 "shift %s%d dB gain\n",
4988 (((boolean)var1[0]) ? "+" : "-"), value_db);
4989 }
4990 }
4991 #endif
4992 }
4993
4994 #if (RTL8814B_SUPPORT || RTL8198F_SUPPORT)
phydm_spur_detect_dbg(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)4995 void phydm_spur_detect_dbg(void *dm_void, char input[][16], u32 *_used,
4996 char *output, u32 *_out_len)
4997 {
4998 struct dm_struct *dm = (struct dm_struct *)dm_void;
4999 char help[] = "-h";
5000 u32 var1[10] = {0};
5001 u32 used = *_used;
5002 u32 out_len = *_out_len;
5003 u32 i;
5004
5005 if ((strcmp(input[1], help) == 0)) {
5006 PDM_SNPF(out_len, used, output + used, out_len - used,
5007 "{0: Auto spur detect(NBI+CSI), 1:NBI always ON/ CSI Auto,");
5008 PDM_SNPF(out_len, used, output + used, out_len - used,
5009 "2: CSI always On/ NBI Auto, 3: Disable, 4: CSI & NBI ON}\n");
5010 PDM_SNPF(out_len, used, output + used, out_len - used,
5011 "{If CSI always ON (Mode 2 or 4) -> CSI wgt manual(0~7)}\n");
5012 PDM_SNPF(out_len, used, output + used, out_len - used,
5013 "{5: Adjust CSI weight threshold} {0:-,1:+} {th offset}\n");
5014 } else {
5015 for (i = 0; i < 10; i++) {
5016 if (input[i + 1])
5017 PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL,
5018 &var1[i]);
5019 }
5020
5021 if (var1[0] == 1) {
5022 dm->dsde_sel = DET_NBI;
5023 } else if (var1[0] == 2) {
5024 dm->dsde_sel = DET_CSI;
5025 } else if (var1[0] == 3) {
5026 dm->dsde_sel = DET_DISABLE;
5027 } else if (var1[0] == 4) {
5028 dm->dsde_sel = DET_CSI_NBI_EN;
5029 } else if (var1[0] == 0) {
5030 dm->dsde_sel = DET_AUTO;
5031 } else if (var1[0] == 5) {
5032 if (var1[1] == 0)
5033 for (i = 0; i < 5; i++)
5034 dm->csi_wgt_th_db[i] -= (u8)var1[2];
5035 else if (var1[1] == 1)
5036 for (i = 0; i < 5; i++)
5037 dm->csi_wgt_th_db[i] += (u8)var1[2];
5038 PDM_SNPF(out_len, used, output + used, out_len - used, "current csi weight threshold:\n");
5039 for (i = 0; i < 5; i++)
5040 PDM_SNPF(out_len, used, output + used,
5041 out_len - used, "----%2d",
5042 dm->csi_wgt_th_db[i]);
5043 PDM_SNPF(out_len, used, output + used, out_len - used, "\n");
5044 for (i = 0; i < 5; i++)
5045 PDM_SNPF(out_len, used, output + used,
5046 out_len - used, "--%d--|", i);
5047 PDM_SNPF(out_len, used, output + used, out_len - used, "\n");
5048 } else {
5049 PDM_SNPF(out_len, used, output + used, out_len - used,
5050 "Spur detection mode invalid!\n");
5051 return;
5052 }
5053 if (var1[0] < 5)
5054 PDM_SNPF(out_len, used, output + used, out_len - used,
5055 "spur detect mode = %d\n", dm->dsde_sel);
5056
5057 if (dm->dsde_sel == DET_CSI_NBI_EN) {
5058 if (var1[1] < 8) {
5059 dm->csi_wgt = (u8)var1[1];
5060 PDM_SNPF(out_len, used, output + used,
5061 out_len - used, "CSI wgt %d\n",
5062 dm->csi_wgt);
5063 } else {
5064 PDM_SNPF(out_len, used, output + used,
5065 out_len - used,
5066 "CSI wgt setting invalid. Please set the correct wgt!\n");
5067 return;
5068 }
5069 }
5070 }
5071
5072 *_used = used;
5073 *_out_len = out_len;
5074 }
5075 #endif
5076
5077 struct phydm_command {
5078 char name[16];
5079 u8 id;
5080 };
5081
5082 enum PHYDM_CMD_ID {
5083 PHYDM_HELP,
5084 PHYDM_DEMO,
5085 PHYDM_RF_CMD,
5086 PHYDM_DIG,
5087 PHYDM_RA,
5088 PHYDM_PROFILE,
5089 PHYDM_ANTDIV,
5090 PHYDM_PATHDIV,
5091 PHYDM_DEBUG,
5092 PHYDM_MP_DEBUG,
5093 PHYDM_FW_DEBUG,
5094 PHYDM_SUPPORT_ABILITY,
5095 PHYDM_GET_TXAGC,
5096 PHYDM_SET_TXAGC,
5097 PHYDM_SMART_ANT,
5098 PHYDM_CH_BW,
5099 PHYDM_TRX_PATH,
5100 PHYDM_LA_MODE,
5101 PHYDM_DUMP_REG,
5102 PHYDM_AUTO_DBG,
5103 PHYDM_DD_DBG,
5104 PHYDM_BIG_JUMP,
5105 PHYDM_SHOW_RXRATE,
5106 PHYDM_NBI_EN,
5107 PHYDM_CSI_MASK_EN,
5108 PHYDM_DFS_DEBUG,
5109 PHYDM_DFS_HIST,
5110 PHYDM_NHM,
5111 PHYDM_CLM,
5112 PHYDM_FAHM,
5113 PHYDM_ENV_MNTR,
5114 PHYDM_BB_INFO,
5115 //PHYDM_TXBF,
5116 PHYDM_H2C,
5117 PHYDM_EXT_RF_E_CTRL,
5118 PHYDM_ADAPTIVE_SOML,
5119 PHYDM_PSD,
5120 PHYDM_DEBUG_PORT,
5121 PHYDM_DIS_HTSTF_CONTROL,
5122 PHYDM_CFO_TRK,
5123 PHYDM_ADAPTIVITY_DEBUG,
5124 PHYDM_DIS_DYM_ANT_WEIGHTING,
5125 PHYDM_FORECE_PT_STATE,
5126 PHYDM_STA_INFO,
5127 PHYDM_PAUSE_FUNC,
5128 PHYDM_PER_TONE_EVM,
5129 PHYDM_DYN_TXPWR,
5130 PHYDM_LNA_SAT,
5131 PHYDM_ANAPAR,
5132 PHYDM_CCK_RX_PATHDIV,
5133 PHYDM_BEAM_FORMING,
5134 PHYDM_REG_MONITOR,
5135 #if RTL8814B_SUPPORT
5136 PHYDM_SPUR_DETECT,
5137 #endif
5138 PHYDM_PHY_STATUS,
5139 PHYDM_CRC32_CNT,
5140 PHYDM_DCC,
5141 #ifdef PHYDM_HW_IGI
5142 PHYDM_HWIGI,
5143 #endif
5144 PHYDM_PMAC_TX,
5145 PHYDM_GET_RXAGC,
5146 PHYDM_SHIFT_RXAGC,
5147 PHYDM_IFS_CLM
5148 };
5149
5150 struct phydm_command phy_dm_ary[] = {
5151 {"-h", PHYDM_HELP}, /*@do not move this element to other position*/
5152 {"demo", PHYDM_DEMO}, /*@do not move this element to other position*/
5153 {"rf", PHYDM_RF_CMD},
5154 {"dig", PHYDM_DIG},
5155 {"ra", PHYDM_RA},
5156 {"profile", PHYDM_PROFILE},
5157 {"antdiv", PHYDM_ANTDIV},
5158 {"pathdiv", PHYDM_PATHDIV},
5159 {"dbg", PHYDM_DEBUG},
5160 {"mp_dbg", PHYDM_MP_DEBUG},
5161 {"fw_dbg", PHYDM_FW_DEBUG},
5162 {"ability", PHYDM_SUPPORT_ABILITY},
5163 {"get_txagc", PHYDM_GET_TXAGC},
5164 {"set_txagc", PHYDM_SET_TXAGC},
5165 {"smtant", PHYDM_SMART_ANT},
5166 {"ch_bw", PHYDM_CH_BW},
5167 {"trxpath", PHYDM_TRX_PATH},
5168 {"lamode", PHYDM_LA_MODE},
5169 {"dumpreg", PHYDM_DUMP_REG},
5170 {"auto_dbg", PHYDM_AUTO_DBG},
5171 {"dd_dbg", PHYDM_DD_DBG},
5172 {"bigjump", PHYDM_BIG_JUMP},
5173 {"rxrate", PHYDM_SHOW_RXRATE},
5174 {"nbi", PHYDM_NBI_EN},
5175 {"csi_mask", PHYDM_CSI_MASK_EN},
5176 {"dfs", PHYDM_DFS_DEBUG},
5177 {"dfs_hist", PHYDM_DFS_HIST},
5178 {"nhm", PHYDM_NHM},
5179 {"clm", PHYDM_CLM},
5180 {"fahm", PHYDM_FAHM},
5181 {"env_mntr", PHYDM_ENV_MNTR},
5182 {"bbinfo", PHYDM_BB_INFO},
5183 /*{"txbf", PHYDM_TXBF},*/
5184 {"h2c", PHYDM_H2C},
5185 {"ext_rfe", PHYDM_EXT_RF_E_CTRL},
5186 {"soml", PHYDM_ADAPTIVE_SOML},
5187 {"psd", PHYDM_PSD},
5188 {"dbgport", PHYDM_DEBUG_PORT},
5189 {"dis_htstf", PHYDM_DIS_HTSTF_CONTROL},
5190 {"cfo_trk", PHYDM_CFO_TRK},
5191 {"adapt_debug", PHYDM_ADAPTIVITY_DEBUG},
5192 {"dis_dym_ant_wgt", PHYDM_DIS_DYM_ANT_WEIGHTING},
5193 {"force_pt_state", PHYDM_FORECE_PT_STATE},
5194 {"sta_info", PHYDM_STA_INFO},
5195 {"pause", PHYDM_PAUSE_FUNC},
5196 {"evm", PHYDM_PER_TONE_EVM},
5197 {"dyn_txpwr", PHYDM_DYN_TXPWR},
5198 {"lna_sat", PHYDM_LNA_SAT},
5199 {"anapar", PHYDM_ANAPAR},
5200 {"cck_rx_pathdiv", PHYDM_CCK_RX_PATHDIV},
5201 {"bf", PHYDM_BEAM_FORMING},
5202 {"reg_mntr", PHYDM_REG_MONITOR},
5203 #if RTL8814B_SUPPORT
5204 {"spur_detect", PHYDM_SPUR_DETECT},
5205 #endif
5206 {"physts", PHYDM_PHY_STATUS},
5207 {"crc32_cnt", PHYDM_CRC32_CNT},
5208 #ifdef PHYDM_PMAC_TX_SETTING_SUPPORT
5209 {"pmac_tx", PHYDM_PMAC_TX},
5210 #endif
5211 #ifdef PHYDM_HW_IGI
5212 {"hwigi", PHYDM_HWIGI},
5213 #endif
5214 {"dcc", PHYDM_DCC},
5215 {"get_rxagc", PHYDM_GET_RXAGC},
5216 {"shift_rxagc", PHYDM_SHIFT_RXAGC},
5217 {"ifs_clm", PHYDM_IFS_CLM}
5218 };
5219
5220 #endif /*@#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/
5221
phydm_cmd_parser(struct dm_struct * dm,char input[][MAX_ARGV],u32 input_num,u8 flag,char * output,u32 out_len)5222 void phydm_cmd_parser(struct dm_struct *dm, char input[][MAX_ARGV],
5223 u32 input_num, u8 flag, char *output, u32 out_len)
5224 {
5225 #ifdef CONFIG_PHYDM_DEBUG_FUNCTION
5226 u32 used = 0;
5227 u8 id = 0;
5228 u32 var1[10] = {0};
5229 u32 i;
5230 u32 phydm_ary_size = sizeof(phy_dm_ary) / sizeof(struct phydm_command);
5231
5232 if (flag == 0) {
5233 PDM_SNPF(out_len, used, output + used, out_len - used,
5234 "GET, nothing to print\n");
5235 return;
5236 }
5237
5238 PDM_SNPF(out_len, used, output + used, out_len - used, "\n");
5239
5240 /* Parsing Cmd ID */
5241 if (input_num) {
5242 for (i = 0; i < phydm_ary_size; i++) {
5243 if (strcmp(phy_dm_ary[i].name, input[0]) == 0) {
5244 id = phy_dm_ary[i].id;
5245 break;
5246 }
5247 }
5248 if (i == phydm_ary_size) {
5249 PDM_SNPF(out_len, used, output + used, out_len - used,
5250 "PHYDM command not found!\n");
5251 return;
5252 }
5253 }
5254
5255 switch (id) {
5256 case PHYDM_HELP: {
5257 PDM_SNPF(out_len, used, output + used, out_len - used,
5258 "BB cmd ==>\n");
5259
5260 for (i = 0; i < phydm_ary_size - 2; i++)
5261 PDM_SNPF(out_len, used, output + used, out_len - used,
5262 " %-5d: %s\n", i, phy_dm_ary[i + 2].name);
5263 } break;
5264
5265 case PHYDM_DEMO: { /*@echo demo 10 0x3a z abcde >cmd*/
5266 u32 directory = 0;
5267
5268 #if (DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_AP))
5269 char char_temp;
5270 #else
5271 u32 char_temp = ' ';
5272 #endif
5273
5274 PHYDM_SSCANF(input[1], DCMD_DECIMAL, &directory);
5275 PDM_SNPF(out_len, used, output + used, out_len - used,
5276 "Decimal value = %d\n", directory);
5277 PHYDM_SSCANF(input[2], DCMD_HEX, &directory);
5278 PDM_SNPF(out_len, used, output + used, out_len - used,
5279 "Hex value = 0x%x\n", directory);
5280 PHYDM_SSCANF(input[3], DCMD_CHAR, &char_temp);
5281 PDM_SNPF(out_len, used, output + used, out_len - used,
5282 "Char = %c\n", char_temp);
5283 PDM_SNPF(out_len, used, output + used, out_len - used,
5284 "String = %s\n", input[4]);
5285 } break;
5286 case PHYDM_RF_CMD:
5287 halrf_cmd_parser(dm, input, &used, output, &out_len, input_num);
5288 break;
5289
5290 case PHYDM_DIG:
5291 phydm_dig_debug(dm, input, &used, output, &out_len);
5292 break;
5293
5294 case PHYDM_RA:
5295 phydm_ra_debug(dm, input, &used, output, &out_len);
5296 break;
5297
5298 case PHYDM_ANTDIV:
5299 #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))
5300 phydm_antdiv_debug(dm, input, &used, output, &out_len);
5301 #endif
5302 break;
5303
5304 case PHYDM_PATHDIV:
5305 #if (defined(CONFIG_PATH_DIVERSITY))
5306 phydm_pathdiv_debug(dm, input, &used, output, &out_len);
5307 #endif
5308 break;
5309
5310 case PHYDM_DEBUG:
5311 phydm_debug_trace(dm, input, &used, output, &out_len);
5312 break;
5313
5314 case PHYDM_MP_DEBUG:
5315 phydm_mp_dbg(dm, input, &used, output, &out_len);
5316 break;
5317
5318 case PHYDM_FW_DEBUG:
5319 phydm_fw_debug_trace(dm, input, &used, output, &out_len);
5320 break;
5321
5322 case PHYDM_SUPPORT_ABILITY:
5323 phydm_supportability_en(dm, input, &used, output, &out_len);
5324 break;
5325
5326 case PHYDM_SMART_ANT:
5327 #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))
5328
5329 #ifdef CONFIG_HL_SMART_ANTENNA_TYPE2
5330 phydm_hl_smt_ant_dbg_type2(dm, input, &used, output, &out_len);
5331 #elif (defined(CONFIG_HL_SMART_ANTENNA_TYPE1))
5332 phydm_hl_smart_ant_debug(dm, input, &used, output, &out_len);
5333 #endif
5334
5335 #elif (defined(CONFIG_CUMITEK_SMART_ANTENNA))
5336 phydm_cumitek_smt_ant_debug(dm, input, &used, output, &out_len);
5337 #endif
5338
5339 break;
5340
5341 case PHYDM_CH_BW:
5342 phydm_bw_ch_adjust(dm, input, &used, output, &out_len);
5343 break;
5344
5345 case PHYDM_PROFILE:
5346 phydm_basic_profile(dm, &used, output, &out_len);
5347 break;
5348
5349 case PHYDM_GET_TXAGC:
5350 phydm_get_txagc(dm, &used, output, &out_len);
5351 break;
5352
5353 case PHYDM_SET_TXAGC:
5354 phydm_set_txagc_dbg(dm, input, &used, output, &out_len);
5355 break;
5356
5357 case PHYDM_TRX_PATH:
5358 phydm_config_trx_path(dm, input, &used, output, &out_len);
5359 break;
5360
5361 case PHYDM_LA_MODE:
5362 #if (PHYDM_LA_MODE_SUPPORT)
5363 phydm_la_cmd(dm, input, &used, output, &out_len);
5364 #endif
5365 break;
5366
5367 case PHYDM_DUMP_REG:
5368 phydm_dump_reg(dm, input, &used, output, &out_len);
5369 break;
5370
5371 case PHYDM_BIG_JUMP:
5372 phydm_enable_big_jump(dm, input, &used, output, &out_len);
5373 break;
5374
5375 case PHYDM_AUTO_DBG:
5376 #ifdef PHYDM_AUTO_DEGBUG
5377 phydm_auto_dbg_console(dm, input, &used, output, &out_len);
5378 #endif
5379 break;
5380
5381 case PHYDM_DD_DBG:
5382 phydm_dd_dbg_dump(dm, input, &used, output, &out_len);
5383 break;
5384
5385 case PHYDM_SHOW_RXRATE:
5386 phydm_show_rx_rate(dm, input, &used, output, &out_len);
5387 break;
5388
5389 case PHYDM_NBI_EN:
5390 phydm_nbi_debug(dm, input, &used, output, &out_len);
5391 break;
5392
5393 case PHYDM_CSI_MASK_EN:
5394 phydm_csi_debug(dm, input, &used, output, &out_len);
5395 break;
5396
5397 #ifdef CONFIG_PHYDM_DFS_MASTER
5398 case PHYDM_DFS_DEBUG:
5399 phydm_dfs_debug(dm, input, &used, output, &out_len);
5400 break;
5401
5402 case PHYDM_DFS_HIST:
5403 phydm_dfs_hist_dbg(dm, input, &used, output, &out_len);
5404 break;
5405 #endif
5406
5407 case PHYDM_NHM:
5408 #ifdef NHM_SUPPORT
5409 phydm_nhm_dbg(dm, input, &used, output, &out_len);
5410 #endif
5411 break;
5412
5413 case PHYDM_CLM:
5414 #ifdef CLM_SUPPORT
5415 phydm_clm_dbg(dm, input, &used, output, &out_len);
5416 #endif
5417 break;
5418
5419 #ifdef FAHM_SUPPORT
5420 case PHYDM_FAHM:
5421 phydm_fahm_dbg(dm, input, &used, output, &out_len);
5422 break;
5423 #endif
5424
5425 case PHYDM_ENV_MNTR:
5426 phydm_env_mntr_dbg(dm, input, &used, output, &out_len);
5427 break;
5428
5429 case PHYDM_BB_INFO:
5430 phydm_bb_hw_dbg_info(dm, input, &used, output, &out_len);
5431 break;
5432 /*
5433 case PHYDM_TXBF: {
5434 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
5435 #ifdef PHYDM_BEAMFORMING_SUPPORT
5436 struct _RT_BEAMFORMING_INFO *beamforming_info = NULL;
5437
5438 beamforming_info = &dm->beamforming_info;
5439
5440 PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
5441 if (var1[0] == 0) {
5442 beamforming_info->apply_v_matrix = false;
5443 beamforming_info->snding3ss = true;
5444 PDM_SNPF(out_len, used, output + used, out_len - used,
5445 "\r\n dont apply V matrix and 3SS 789 snding\n");
5446 } else if (var1[0] == 1) {
5447 beamforming_info->apply_v_matrix = true;
5448 beamforming_info->snding3ss = true;
5449 PDM_SNPF(out_len, used, output + used, out_len - used,
5450 "\r\n apply V matrix and 3SS 789 snding\n");
5451 } else if (var1[0] == 2) {
5452 beamforming_info->apply_v_matrix = true;
5453 beamforming_info->snding3ss = false;
5454 PDM_SNPF(out_len, used, output + used, out_len - used,
5455 "\r\n default txbf setting\n");
5456 } else
5457 PDM_SNPF(out_len, used, output + used, out_len - used,
5458 "\r\n unknown cmd!!\n");
5459 #endif
5460 #endif
5461 } break;
5462 */
5463 case PHYDM_H2C:
5464 phydm_h2C_debug(dm, input, &used, output, &out_len);
5465 break;
5466
5467 case PHYDM_EXT_RF_E_CTRL:
5468 phydm_ext_rf_element_ctrl(dm, input, &used, output, &out_len);
5469 break;
5470
5471 case PHYDM_ADAPTIVE_SOML:
5472 #ifdef CONFIG_ADAPTIVE_SOML
5473 phydm_soml_debug(dm, input, &used, output, &out_len);
5474 #endif
5475 break;
5476
5477 case PHYDM_PSD:
5478
5479 #ifdef CONFIG_PSD_TOOL
5480 phydm_psd_debug(dm, input, &used, output, &out_len);
5481 #endif
5482
5483 break;
5484
5485 case PHYDM_DEBUG_PORT:
5486 phydm_print_dbgport(dm, input, &used, output, &out_len);
5487 break;
5488
5489 case PHYDM_DIS_HTSTF_CONTROL: {
5490 if (input[1])
5491 PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
5492
5493 if (var1[0] == 1) {
5494 /* setting being false is for debug */
5495 dm->bhtstfdisabled = true;
5496 PDM_SNPF(out_len, used, output + used, out_len - used,
5497 "Dynamic HT-STF Gain Control is Disable\n");
5498 } else {
5499 /* @default setting should be true,
5500 * always be dynamic control
5501 */
5502 dm->bhtstfdisabled = false;
5503 PDM_SNPF(out_len, used, output + used, out_len - used,
5504 "Dynamic HT-STF Gain Control is Enable\n");
5505 }
5506 } break;
5507
5508 case PHYDM_CFO_TRK:
5509 phydm_cfo_tracking_debug(dm, input, &used, output, &out_len);
5510 break;
5511
5512 case PHYDM_ADAPTIVITY_DEBUG:
5513 #ifdef PHYDM_SUPPORT_ADAPTIVITY
5514 phydm_adaptivity_debug(dm, input, &used, output, &out_len);
5515 #endif
5516 break;
5517
5518 case PHYDM_DIS_DYM_ANT_WEIGHTING:
5519 #ifdef DYN_ANT_WEIGHTING_SUPPORT
5520 phydm_ant_weight_dbg(dm, input, &used, output, &out_len);
5521 #endif
5522 break;
5523
5524 case PHYDM_FORECE_PT_STATE:
5525 #ifdef PHYDM_POWER_TRAINING_SUPPORT
5526 phydm_pow_train_debug(dm, input, &used, output, &out_len);
5527 #endif
5528 break;
5529
5530 case PHYDM_STA_INFO:
5531 phydm_show_sta_info(dm, input, &used, output, &out_len);
5532 break;
5533
5534 case PHYDM_PAUSE_FUNC:
5535 phydm_pause_func_console(dm, input, &used, output, &out_len);
5536 break;
5537
5538 case PHYDM_PER_TONE_EVM:
5539 phydm_per_tone_evm(dm, input, &used, output, &out_len);
5540 break;
5541
5542 #ifdef CONFIG_DYNAMIC_TX_TWR
5543 case PHYDM_DYN_TXPWR:
5544 phydm_dtp_debug(dm, input, &used, output, &out_len);
5545 break;
5546 #endif
5547
5548 case PHYDM_LNA_SAT:
5549 #ifdef PHYDM_LNA_SAT_CHK_SUPPORT
5550 phydm_lna_sat_debug(dm, input, &used, output, &out_len);
5551 #endif
5552 break;
5553
5554 case PHYDM_ANAPAR:
5555 phydm_get_anapar_table(dm, &used, output, &out_len);
5556 break;
5557 case PHYDM_CCK_RX_PATHDIV:
5558 #ifdef PHYDM_CCK_RX_PATHDIV_SUPPORT
5559 phydm_cck_rx_pathdiv_dbg(dm, input, &used, output, &out_len);
5560 #endif
5561 break;
5562
5563 case PHYDM_BEAM_FORMING:
5564 #ifdef CONFIG_BB_TXBF_API
5565 phydm_bf_debug(dm, input, &used, output, &out_len);
5566 #endif
5567 break;
5568 case PHYDM_REG_MONITOR:
5569 phydm_reg_monitor(dm, input, &used, output, &out_len);
5570 break;
5571
5572 #if RTL8814B_SUPPORT
5573 case PHYDM_SPUR_DETECT:
5574 phydm_spur_detect_dbg(dm, input, &used, output, &out_len);
5575 break;
5576 #endif
5577 case PHYDM_CRC32_CNT:
5578 phydm_crc32_cnt_dbg(dm, input, &used, output, &out_len);
5579 break;
5580 case PHYDM_PHY_STATUS:
5581 phydm_physts_dbg(dm, input, &used, output, &out_len);
5582 break;
5583 #ifdef PHYDM_DCC_ENHANCE
5584 case PHYDM_DCC:
5585 phydm_dig_cckpd_coex_dbg(dm, input, &used, output, &out_len);
5586 break;
5587 #endif
5588 #ifdef PHYDM_PMAC_TX_SETTING_SUPPORT
5589 case PHYDM_PMAC_TX:
5590 phydm_pmac_tx_dbg(dm, input, &used, output, &out_len);
5591 break;
5592 #endif
5593 #ifdef PHYDM_HW_IGI
5594 case PHYDM_HWIGI:
5595 phydm_hwigi_dbg(dm, input, &used, output, &out_len);
5596 break;
5597 #endif
5598 case PHYDM_GET_RXAGC:
5599 phydm_get_rxagc_table_dbg(dm, input, &used, output, &out_len);
5600 break;
5601 case PHYDM_SHIFT_RXAGC:
5602 phydm_shift_rxagc_table_dbg(dm, input, &used, output, &out_len);
5603 break;
5604 case PHYDM_IFS_CLM:
5605 #ifdef IFS_CLM_SUPPORT
5606 phydm_ifs_clm_dbg(dm, input, &used, output, &out_len);
5607 #endif
5608 break;
5609
5610 default:
5611 PDM_SNPF(out_len, used, output + used, out_len - used,
5612 "Do not support this command\n");
5613 break;
5614 }
5615 #endif /*@#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/
5616 }
5617
5618 #if defined __ECOS || defined __ICCARM__
5619 #ifndef strsep
strsep(char ** s,const char * ct)5620 char *strsep(char **s, const char *ct)
5621 {
5622 char *sbegin = *s;
5623 char *end;
5624
5625 if (!sbegin)
5626 return NULL;
5627
5628 end = strpbrk(sbegin, ct);
5629 if (end)
5630 *end++ = '\0';
5631 *s = end;
5632 return sbegin;
5633 }
5634 #endif
5635 #endif
5636
5637 #if (DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_AP | ODM_IOT))
phydm_cmd(struct dm_struct * dm,char * input,u32 in_len,u8 flag,char * output,u32 out_len)5638 s32 phydm_cmd(struct dm_struct *dm, char *input, u32 in_len, u8 flag,
5639 char *output, u32 out_len)
5640 {
5641 char *token;
5642 u32 argc = 0;
5643 char argv[MAX_ARGC][MAX_ARGV];
5644
5645 do {
5646 token = strsep(&input, ", ");
5647 if (token) {
5648 if (strlen(token) <= MAX_ARGV)
5649 strcpy(argv[argc], token);
5650
5651 argc++;
5652 } else {
5653 break;
5654 }
5655 } while (argc < MAX_ARGC);
5656
5657 if (argc == 1)
5658 argv[0][strlen(argv[0]) - 1] = '\0';
5659
5660 phydm_cmd_parser(dm, argv, argc, flag, output, out_len);
5661
5662 return 0;
5663 }
5664 #endif
5665
phydm_fw_trace_handler(void * dm_void,u8 * cmd_buf,u8 cmd_len)5666 void phydm_fw_trace_handler(void *dm_void, u8 *cmd_buf, u8 cmd_len)
5667 {
5668 #ifdef CONFIG_PHYDM_DEBUG_FUNCTION
5669 struct dm_struct *dm = (struct dm_struct *)dm_void;
5670
5671 /*@u8 debug_trace_11byte[60];*/
5672 u8 freg_num, c2h_seq, buf_0 = 0;
5673
5674 if (!(dm->support_ic_type & PHYDM_IC_3081_SERIES))
5675 return;
5676
5677 if (cmd_len > 12 || cmd_len == 0) {
5678 pr_debug("[Warning] Error C2H cmd_len=%d\n", cmd_len);
5679 return;
5680 }
5681
5682 buf_0 = cmd_buf[0];
5683 freg_num = (buf_0 & 0xf);
5684 c2h_seq = (buf_0 & 0xf0) >> 4;
5685
5686 #if 0
5687 PHYDM_DBG(dm, DBG_FW_TRACE,
5688 "[FW debug message] freg_num = (( %d )), c2h_seq=(( %d ))\n",
5689 freg_num, c2h_seq);
5690
5691 strncpy(debug_trace_11byte, &cmd_buf[1], (cmd_len - 1));
5692 debug_trace_11byte[cmd_len - 1] = '\0';
5693 PHYDM_DBG(dm, DBG_FW_TRACE, "[FW debug message] %s\n",
5694 debug_trace_11byte);
5695 PHYDM_DBG(dm, DBG_FW_TRACE, "[FW debug message] cmd_len = (( %d ))\n",
5696 cmd_len);
5697 PHYDM_DBG(dm, DBG_FW_TRACE, "[FW debug message] c2h_cmd_start=((%d))\n",
5698 dm->c2h_cmd_start);
5699
5700 PHYDM_DBG(dm, DBG_FW_TRACE, "pre_seq = (( %d )), current_seq=((%d))\n",
5701 dm->pre_c2h_seq, c2h_seq);
5702 PHYDM_DBG(dm, DBG_FW_TRACE, "fw_buff_is_enpty = (( %d ))\n",
5703 dm->fw_buff_is_enpty);
5704 #endif
5705
5706 if (c2h_seq != dm->pre_c2h_seq && dm->fw_buff_is_enpty == false) {
5707 dm->fw_debug_trace[dm->c2h_cmd_start] = '\0';
5708 PHYDM_DBG(dm, DBG_FW_TRACE, "[FW Dbg Queue Overflow] %s\n",
5709 dm->fw_debug_trace);
5710 dm->c2h_cmd_start = 0;
5711 }
5712
5713 if ((cmd_len - 1) > (60 - dm->c2h_cmd_start)) {
5714 dm->fw_debug_trace[dm->c2h_cmd_start] = '\0';
5715 PHYDM_DBG(dm, DBG_FW_TRACE,
5716 "[FW Dbg Queue error: wrong C2H length] %s\n",
5717 dm->fw_debug_trace);
5718 dm->c2h_cmd_start = 0;
5719 return;
5720 }
5721
5722 strncpy((char *)&dm->fw_debug_trace[dm->c2h_cmd_start],
5723 (char *)&cmd_buf[1], (cmd_len - 1));
5724 dm->c2h_cmd_start += (cmd_len - 1);
5725 dm->fw_buff_is_enpty = false;
5726
5727 if (freg_num == 0 || dm->c2h_cmd_start >= 60) {
5728 if (dm->c2h_cmd_start < 60)
5729 dm->fw_debug_trace[dm->c2h_cmd_start] = '\0';
5730 else
5731 dm->fw_debug_trace[59] = '\0';
5732
5733 PHYDM_DBG(dm, DBG_FW_TRACE, "[FW DBG Msg] %s\n",
5734 dm->fw_debug_trace);
5735
5736 dm->c2h_cmd_start = 0;
5737 dm->fw_buff_is_enpty = true;
5738 }
5739
5740 dm->pre_c2h_seq = c2h_seq;
5741 #endif /*@#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/
5742 }
5743
phydm_fw_trace_handler_code(void * dm_void,u8 * buffer,u8 cmd_len)5744 void phydm_fw_trace_handler_code(void *dm_void, u8 *buffer, u8 cmd_len)
5745 {
5746 #ifdef CONFIG_PHYDM_DEBUG_FUNCTION
5747 struct dm_struct *dm = (struct dm_struct *)dm_void;
5748 u8 function = buffer[0];
5749 u8 dbg_num = buffer[1];
5750 u16 content_0 = (((u16)buffer[3]) << 8) | ((u16)buffer[2]);
5751 u16 content_1 = (((u16)buffer[5]) << 8) | ((u16)buffer[4]);
5752 u16 content_2 = (((u16)buffer[7]) << 8) | ((u16)buffer[6]);
5753 u16 content_3 = (((u16)buffer[9]) << 8) | ((u16)buffer[8]);
5754 u16 content_4 = (((u16)buffer[11]) << 8) | ((u16)buffer[10]);
5755
5756 if (cmd_len > 12)
5757 PHYDM_DBG(dm, DBG_FW_TRACE,
5758 "[FW Msg] Invalid cmd length (( %d )) >12\n",
5759 cmd_len);
5760 /*@--------------------------------------------*/
5761 #ifdef CONFIG_RA_FW_DBG_CODE
5762 if (function == RATE_DECISION) {
5763 if (dbg_num == 0) {
5764 if (content_0 == 1)
5765 PHYDM_DBG(dm, DBG_FW_TRACE,
5766 "[FW] RA_CNT=((%d)) Max_device=((%d))--------------------------->\n",
5767 content_1, content_2);
5768 else if (content_0 == 2)
5769 PHYDM_DBG(dm, DBG_FW_TRACE,
5770 "[FW] Check RA macid= ((%d)), MediaStatus=((%d)), Dis_RA=((%d)), try_bit=((0x%x))\n",
5771 content_1, content_2, content_3,
5772 content_4);
5773 else if (content_0 == 3)
5774 PHYDM_DBG(dm, DBG_FW_TRACE,
5775 "[FW] Check RA total=((%d)), drop=((0x%x)), TXRPT_TRY_bit=((%x)), bNoisy=((%x))\n",
5776 content_1, content_2, content_3,
5777 content_4);
5778 } else if (dbg_num == 1) {
5779 if (content_0 == 1)
5780 PHYDM_DBG(dm, DBG_FW_TRACE,
5781 "[FW] RTY[0,1,2,3]=[ %d , %d , %d , %d ]\n",
5782 content_1, content_2, content_3,
5783 content_4);
5784 else if (content_0 == 2) {
5785 PHYDM_DBG(dm, DBG_FW_TRACE,
5786 "[FW] RTY[4]=[ %d ], drop=(( %d )), total=(( %d )), current_rate=((0x %x ))",
5787 content_1, content_2, content_3,
5788 content_4);
5789 phydm_print_rate(dm, (u8)content_4,
5790 DBG_FW_TRACE);
5791 } else if (content_0 == 3)
5792 PHYDM_DBG(dm, DBG_FW_TRACE,
5793 "[FW] penality_idx=(( %d ))\n",
5794 content_1);
5795 else if (content_0 == 4)
5796 PHYDM_DBG(dm, DBG_FW_TRACE,
5797 "[FW] RSSI=(( %d )), ra_stage = (( %d ))\n",
5798 content_1, content_2);
5799 } else if (dbg_num == 3) {
5800 if (content_0 == 1)
5801 PHYDM_DBG(dm, DBG_FW_TRACE,
5802 "[FW] Fast_RA (( DOWN )) total=((%d)), total>>1=((%d)), R4+R3+R2 = ((%d)), RateDownHold = ((%d))\n",
5803 content_1, content_2, content_3,
5804 content_4);
5805 else if (content_0 == 2)
5806 PHYDM_DBG(dm, DBG_FW_TRACE,
5807 "[FW] Fast_RA (( UP )) total_acc=((%d)), total_acc>>1=((%d)), R4+R3+R2 = ((%d)), RateDownHold = ((%d))\n",
5808 content_1, content_2, content_3,
5809 content_4);
5810 else if (content_0 == 3)
5811 PHYDM_DBG(dm, DBG_FW_TRACE,
5812 "[FW] Fast_RA (( UP )) ((rate Down Hold)) RA_CNT=((%d))\n",
5813 content_1);
5814 else if (content_0 == 4)
5815 PHYDM_DBG(dm, DBG_FW_TRACE,
5816 "[FW] Fast_RA (( UP )) ((tota_accl<5 skip)) RA_CNT=((%d))\n",
5817 content_1);
5818 else if (content_0 == 8)
5819 PHYDM_DBG(dm, DBG_FW_TRACE,
5820 "[FW] Fast_RA (( Reset Tx Rpt )) RA_CNT=((%d))\n",
5821 content_1);
5822 } else if (dbg_num == 4) {
5823 if (content_0 == 3)
5824 PHYDM_DBG(dm, DBG_FW_TRACE,
5825 "[FW] RER_CNT PCR_ori =(( %d )), ratio_ori =(( %d )), pcr_updown_bitmap =(( 0x%x )), pcr_var_diff =(( %d ))\n",
5826 content_1, content_2, content_3,
5827 content_4);
5828 else if (content_0 == 4)
5829 PHYDM_DBG(dm, DBG_FW_TRACE,
5830 "[FW] pcr_shift_value =(( %s%d )), rate_down_threshold =(( %d )), rate_up_threshold =(( %d ))\n",
5831 ((content_1) ? "+" : "-"), content_2,
5832 content_3, content_4);
5833 else if (content_0 == 5)
5834 PHYDM_DBG(dm, DBG_FW_TRACE,
5835 "[FW] pcr_mean =(( %d )), PCR_VAR =(( %d )), offset =(( %d )), decision_offset_p =(( %d ))\n",
5836 content_1, content_2, content_3,
5837 content_4);
5838 } else if (dbg_num == 5) {
5839 if (content_0 == 1)
5840 PHYDM_DBG(dm, DBG_FW_TRACE,
5841 "[FW] (( UP)) Nsc=(( %d )), N_High=(( %d )), RateUp_Waiting=(( %d )), RateUp_Fail=(( %d ))\n",
5842 content_1, content_2, content_3,
5843 content_4);
5844 else if (content_0 == 2)
5845 PHYDM_DBG(dm, DBG_FW_TRACE,
5846 "[FW] ((DOWN)) Nsc=(( %d )), N_Low=(( %d ))\n",
5847 content_1, content_2);
5848 else if (content_0 == 3)
5849 PHYDM_DBG(dm, DBG_FW_TRACE,
5850 "[FW] ((HOLD)) Nsc=((%d)), N_High=((%d)), N_Low=((%d)), Reset_CNT=((%d))\n",
5851 content_1, content_2, content_3,
5852 content_4);
5853 } else if (dbg_num == 0x60) {
5854 if (content_0 == 1)
5855 PHYDM_DBG(dm, DBG_FW_TRACE,
5856 "[FW] ((AP RPT)) macid=((%d)), BUPDATE[macid]=((%d))\n",
5857 content_1, content_2);
5858 else if (content_0 == 4)
5859 PHYDM_DBG(dm, DBG_FW_TRACE,
5860 "[FW] ((AP RPT)) pass=((%d)), rty_num=((%d)), drop=((%d)), total=((%d))\n",
5861 content_1, content_2, content_3,
5862 content_4);
5863 else if (content_0 == 5)
5864 PHYDM_DBG(dm, DBG_FW_TRACE,
5865 "[FW] ((AP RPT)) PASS=((%d)), RTY_NUM=((%d)), DROP=((%d)), TOTAL=((%d))\n",
5866 content_1, content_2, content_3,
5867 content_4);
5868 }
5869 } else if (function == INIT_RA_TABLE) {
5870 if (dbg_num == 3)
5871 PHYDM_DBG(dm, DBG_FW_TRACE,
5872 "[FW][INIT_RA_INFO] Ra_init, RA_SKIP_CNT = (( %d ))\n",
5873 content_0);
5874 } else if (function == RATE_UP) {
5875 if (dbg_num == 2) {
5876 if (content_0 == 1)
5877 PHYDM_DBG(dm, DBG_FW_TRACE,
5878 "[FW][RateUp] ((Highest rate->return)), macid=((%d)) Nsc=((%d))\n",
5879 content_1, content_2);
5880 } else if (dbg_num == 5) {
5881 if (content_0 == 0)
5882 PHYDM_DBG(dm, DBG_FW_TRACE,
5883 "[FW][RateUp] ((rate UP)), up_rate_tmp=((0x%x)), rate_idx=((0x%x)), SGI_en=((%d)), SGI=((%d))\n",
5884 content_1, content_2, content_3,
5885 content_4);
5886 else if (content_0 == 1)
5887 PHYDM_DBG(dm, DBG_FW_TRACE,
5888 "[FW][RateUp] ((rate UP)), rate_1=((0x%x)), rate_2=((0x%x)), BW=((%d)), Try_Bit=((%d))\n",
5889 content_1, content_2, content_3,
5890 content_4);
5891 }
5892 } else if (function == RATE_DOWN) {
5893 if (dbg_num == 5) {
5894 if (content_0 == 1)
5895 PHYDM_DBG(dm, DBG_FW_TRACE,
5896 "[FW][RateDownStep] ((rate Down)), macid=((%d)), rate1=((0x%x)), rate2=((0x%x)), BW=((%d))\n",
5897 content_1, content_2, content_3,
5898 content_4);
5899 }
5900 } else if (function == TRY_DONE) {
5901 if (dbg_num == 1) {
5902 if (content_0 == 1)
5903 PHYDM_DBG(dm, DBG_FW_TRACE,
5904 "[FW][Try Done] ((try succsess )) macid=((%d)), Try_Done_cnt=((%d))\n",
5905 content_1, content_2);
5906 } else if (dbg_num == 2) {
5907 if (content_0 == 1)
5908 PHYDM_DBG(dm, DBG_FW_TRACE,
5909 "[FW][Try Done] ((try)) macid=((%d)), Try_Done_cnt=((%d)), rate_2=((%d)), try_succes=((%d))\n",
5910 content_1, content_2, content_3,
5911 content_4);
5912 }
5913 } else if (function == RA_H2C) {
5914 if (dbg_num == 1) {
5915 if (content_0 == 0)
5916 PHYDM_DBG(dm, DBG_FW_TRACE,
5917 "[FW][H2C=0x49] fw_trace_en=((%d)), mode =((%d)), macid=((%d))\n",
5918 content_1, content_2, content_3);
5919 }
5920 } else if (function == F_RATE_AP_RPT) {
5921 if (dbg_num == 1) {
5922 if (content_0 == 1)
5923 PHYDM_DBG(dm, DBG_FW_TRACE,
5924 "[FW][AP RPT] ((1)), SPE_STATIS=((0x%x))---------->\n",
5925 content_3);
5926 } else if (dbg_num == 2) {
5927 if (content_0 == 1)
5928 PHYDM_DBG(dm, DBG_FW_TRACE,
5929 "[FW][AP RPT] RTY_all=((%d))\n",
5930 content_1);
5931 } else if (dbg_num == 3) {
5932 if (content_0 == 1)
5933 PHYDM_DBG(dm, DBG_FW_TRACE,
5934 "[FW][AP RPT] MACID1[%d], TOTAL=((%d)), RTY=((%d))\n",
5935 content_3, content_1, content_2);
5936 } else if (dbg_num == 4) {
5937 if (content_0 == 1)
5938 PHYDM_DBG(dm, DBG_FW_TRACE,
5939 "[FW][AP RPT] MACID2[%d], TOTAL=((%d)), RTY=((%d))\n",
5940 content_3, content_1, content_2);
5941 } else if (dbg_num == 5) {
5942 if (content_0 == 1)
5943 PHYDM_DBG(dm, DBG_FW_TRACE,
5944 "[FW][AP RPT] MACID1[%d], PASS=((%d)), DROP=((%d))\n",
5945 content_3, content_1, content_2);
5946 } else if (dbg_num == 6) {
5947 if (content_0 == 1)
5948 PHYDM_DBG(dm, DBG_FW_TRACE,
5949 "[FW][AP RPT] MACID2[%d],, PASS=((%d)), DROP=((%d))\n",
5950 content_3, content_1, content_2);
5951 }
5952 } else if (function == DBC_FW_CLM) {
5953 PHYDM_DBG(dm, DBG_FW_TRACE,
5954 "[FW][CLM][%d, %d] = {%d, %d, %d, %d}\n", dbg_num,
5955 content_0, content_1, content_2, content_3,
5956 content_4);
5957 } else {
5958 PHYDM_DBG(dm, DBG_FW_TRACE,
5959 "[FW][general][%d, %d, %d] = {%d, %d, %d, %d}\n",
5960 function, dbg_num, content_0, content_1, content_2,
5961 content_3, content_4);
5962 }
5963 #else
5964 PHYDM_DBG(dm, DBG_FW_TRACE,
5965 "[FW][general][%d, %d, %d] = {%d, %d, %d, %d}\n", function,
5966 dbg_num, content_0, content_1, content_2, content_3,
5967 content_4);
5968 #endif
5969 /*@--------------------------------------------*/
5970
5971 #endif /*@#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/
5972 }
5973
phydm_fw_trace_handler_8051(void * dm_void,u8 * buffer,u8 cmd_len)5974 void phydm_fw_trace_handler_8051(void *dm_void, u8 *buffer, u8 cmd_len)
5975 {
5976 #ifdef CONFIG_PHYDM_DEBUG_FUNCTION
5977 struct dm_struct *dm = (struct dm_struct *)dm_void;
5978 int i = 0;
5979 u8 extend_c2h_sub_id = 0, extend_c2h_dbg_len = 0;
5980 u8 extend_c2h_dbg_seq = 0;
5981 u8 fw_debug_trace[128];
5982 u8 *extend_c2h_dbg_content = 0;
5983
5984 if (cmd_len > 127)
5985 return;
5986
5987 extend_c2h_sub_id = buffer[0];
5988 extend_c2h_dbg_len = buffer[1];
5989 extend_c2h_dbg_content = buffer + 2; /*@DbgSeq+DbgContent for show HEX*/
5990
5991 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
5992 RT_DISP(FC2H, C2H_Summary, ("[Extend C2H packet], Extend_c2hSubId=0x%x, extend_c2h_dbg_len=%d\n",
5993 extend_c2h_sub_id, extend_c2h_dbg_len));
5994
5995 RT_DISP_DATA(FC2H, C2H_Summary, "[Extend C2H packet], Content Hex:", extend_c2h_dbg_content, cmd_len - 2);
5996 #endif
5997
5998 go_backfor_aggre_dbg_pkt:
5999 i = 0;
6000 extend_c2h_dbg_seq = buffer[2];
6001 extend_c2h_dbg_content = buffer + 3;
6002
6003 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
6004 RT_DISP(FC2H, C2H_Summary, ("[RTKFW, SEQ= %d] :", extend_c2h_dbg_seq));
6005 #endif
6006
6007 for (;; i++) {
6008 fw_debug_trace[i] = extend_c2h_dbg_content[i];
6009 if (extend_c2h_dbg_content[i + 1] == '\0') {
6010 fw_debug_trace[i + 1] = '\0';
6011 PHYDM_DBG(dm, DBG_FW_TRACE, "[FW DBG Msg] %s",
6012 &fw_debug_trace[0]);
6013 break;
6014 } else if (extend_c2h_dbg_content[i] == '\n') {
6015 fw_debug_trace[i + 1] = '\0';
6016 PHYDM_DBG(dm, DBG_FW_TRACE, "[FW DBG Msg] %s",
6017 &fw_debug_trace[0]);
6018 buffer = extend_c2h_dbg_content + i + 3;
6019 goto go_backfor_aggre_dbg_pkt;
6020 }
6021 }
6022 #endif /*@#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/
6023 }
6024