1*4882a593Smuzhiyun /****************************************************************************** 2*4882a593Smuzhiyun * 3*4882a593Smuzhiyun * Copyright(c) 2007 - 2017 Realtek Corporation. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify it 6*4882a593Smuzhiyun * under the terms of version 2 of the GNU General Public License as 7*4882a593Smuzhiyun * published by the Free Software Foundation. 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * This program is distributed in the hope that it will be useful, but WITHOUT 10*4882a593Smuzhiyun * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11*4882a593Smuzhiyun * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12*4882a593Smuzhiyun * more details. 13*4882a593Smuzhiyun * 14*4882a593Smuzhiyun * The full GNU General Public License is included in this distribution in the 15*4882a593Smuzhiyun * file called LICENSE. 16*4882a593Smuzhiyun * 17*4882a593Smuzhiyun * Contact Information: 18*4882a593Smuzhiyun * wlanfae <wlanfae@realtek.com> 19*4882a593Smuzhiyun * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, 20*4882a593Smuzhiyun * Hsinchu 300, Taiwan. 21*4882a593Smuzhiyun * 22*4882a593Smuzhiyun * Larry Finger <Larry.Finger@lwfinger.net> 23*4882a593Smuzhiyun * 24*4882a593Smuzhiyun *****************************************************************************/ 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun #ifndef __PHYDMCCX_H__ 27*4882a593Smuzhiyun #define __PHYDMCCX_H__ 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun /* 2020.01.10 add nhm_pwr for new nhm utility*/ 30*4882a593Smuzhiyun #define CCX_VERSION "3.7" 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun /* @1 ============================================================ 33*4882a593Smuzhiyun * 1 Definition 34*4882a593Smuzhiyun * 1 ============================================================ 35*4882a593Smuzhiyun */ 36*4882a593Smuzhiyun #define CCX_EN 1 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun #define MAX_ENV_MNTR_TIME 8 /*second*/ 39*4882a593Smuzhiyun #define IGI_TO_NHM_TH_MULTIPLIER 2 40*4882a593Smuzhiyun #define MS_TO_US 1000 41*4882a593Smuzhiyun #define MS_TO_4US_RATIO 250 42*4882a593Smuzhiyun #define CCA_CAP 14 43*4882a593Smuzhiyun #define CLM_MAX_REPORT_TIME 10 44*4882a593Smuzhiyun #define DEVIDER_ERROR 0xffff 45*4882a593Smuzhiyun #define CLM_PERIOD_MAX 65535 46*4882a593Smuzhiyun #define IFS_CLM_PERIOD_MAX 65535 47*4882a593Smuzhiyun #define NHM_PERIOD_MAX 65534 48*4882a593Smuzhiyun #define NHM_TH_NUM 11 /*threshold number of NHM*/ 49*4882a593Smuzhiyun #define NHM_RPT_NUM 12 50*4882a593Smuzhiyun #define IFS_CLM_NUM 4 51*4882a593Smuzhiyun #ifdef NHM_DYM_PW_TH_SUPPORT 52*4882a593Smuzhiyun #define DYM_PWTH_CCA_CAP 24 53*4882a593Smuzhiyun #endif 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun #define IGI_2_NHM_TH(igi) ((igi) << 1)/*NHM_threshold = IGI * 2*/ 56*4882a593Smuzhiyun #define NTH_TH_2_RSSI(th) ((th >> 1) - 10) 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun /*@FAHM*/ 59*4882a593Smuzhiyun #define FAHM_INCLD_FA BIT(0) 60*4882a593Smuzhiyun #define FAHM_INCLD_CRC_OK BIT(1) 61*4882a593Smuzhiyun #define FAHM_INCLD_CRC_ER BIT(2) 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun #define NHM_SUCCESS BIT(0) 64*4882a593Smuzhiyun #define CLM_SUCCESS BIT(1) 65*4882a593Smuzhiyun #define FAHM_SUCCESS BIT(2) 66*4882a593Smuzhiyun #define IFS_CLM_SUCCESS BIT(3) 67*4882a593Smuzhiyun #define ENV_MNTR_FAIL 0xff 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun /* @1 ============================================================ 70*4882a593Smuzhiyun * 1 enumrate 71*4882a593Smuzhiyun * 1 ============================================================ 72*4882a593Smuzhiyun */ 73*4882a593Smuzhiyun enum phydm_clm_level { 74*4882a593Smuzhiyun CLM_RELEASE = 0, 75*4882a593Smuzhiyun CLM_LV_1 = 1, /* @Low Priority function */ 76*4882a593Smuzhiyun CLM_LV_2 = 2, /* @Middle Priority function */ 77*4882a593Smuzhiyun CLM_LV_3 = 3, /* @High priority function (ex: Check hang function) */ 78*4882a593Smuzhiyun CLM_LV_4 = 4, /* @Debug function (the highest priority) */ 79*4882a593Smuzhiyun CLM_MAX_NUM = 5 80*4882a593Smuzhiyun }; 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun enum phydm_nhm_level { 83*4882a593Smuzhiyun NHM_RELEASE = 0, 84*4882a593Smuzhiyun NHM_LV_1 = 1, /* @Low Priority function */ 85*4882a593Smuzhiyun NHM_LV_2 = 2, /* @Middle Priority function */ 86*4882a593Smuzhiyun NHM_LV_3 = 3, /* @High priority function (ex: Check hang function) */ 87*4882a593Smuzhiyun NHM_LV_4 = 4, /* @Debug function (the highest priority) */ 88*4882a593Smuzhiyun NHM_MAX_NUM = 5 89*4882a593Smuzhiyun }; 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun enum phydm_ifs_clm_level { 92*4882a593Smuzhiyun IFS_CLM_RELEASE = 0, 93*4882a593Smuzhiyun IFS_CLM_LV_1 = 1, /* @Low Priority function */ 94*4882a593Smuzhiyun IFS_CLM_LV_2 = 2, /* @Middle Priority function */ 95*4882a593Smuzhiyun IFS_CLM_LV_3 = 3, /* @High priority function (ex: Check hang function) */ 96*4882a593Smuzhiyun IFS_CLM_LV_4 = 4, /* @Debug function (the highest priority) */ 97*4882a593Smuzhiyun IFS_CLM_MAX_NUM = 5 98*4882a593Smuzhiyun }; 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun enum nhm_divider_opt_all { 101*4882a593Smuzhiyun NHM_CNT_ALL = 0, /*nhm SUM report <= 255*/ 102*4882a593Smuzhiyun NHM_VALID = 1, /*nhm SUM report = 255*/ 103*4882a593Smuzhiyun NHM_CNT_INIT 104*4882a593Smuzhiyun }; 105*4882a593Smuzhiyun 106*4882a593Smuzhiyun enum nhm_setting { 107*4882a593Smuzhiyun SET_NHM_SETTING, 108*4882a593Smuzhiyun STORE_NHM_SETTING, 109*4882a593Smuzhiyun RESTORE_NHM_SETTING 110*4882a593Smuzhiyun }; 111*4882a593Smuzhiyun 112*4882a593Smuzhiyun enum nhm_option_cca_all { 113*4882a593Smuzhiyun NHM_EXCLUDE_CCA = 0, 114*4882a593Smuzhiyun NHM_INCLUDE_CCA = 1, 115*4882a593Smuzhiyun NHM_CCA_INIT 116*4882a593Smuzhiyun }; 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun enum nhm_option_txon_all { 119*4882a593Smuzhiyun NHM_EXCLUDE_TXON = 0, 120*4882a593Smuzhiyun NHM_INCLUDE_TXON = 1, 121*4882a593Smuzhiyun NHM_TXON_INIT 122*4882a593Smuzhiyun }; 123*4882a593Smuzhiyun 124*4882a593Smuzhiyun enum nhm_application { 125*4882a593Smuzhiyun NHM_BACKGROUND = 0,/*@default*/ 126*4882a593Smuzhiyun NHM_ACS = 1, 127*4882a593Smuzhiyun IEEE_11K_HIGH = 2, 128*4882a593Smuzhiyun IEEE_11K_LOW = 3, 129*4882a593Smuzhiyun INTEL_XBOX = 4, 130*4882a593Smuzhiyun NHM_DBG = 5, /*@manual trigger*/ 131*4882a593Smuzhiyun }; 132*4882a593Smuzhiyun 133*4882a593Smuzhiyun enum clm_application { 134*4882a593Smuzhiyun CLM_BACKGROUND = 0,/*@default*/ 135*4882a593Smuzhiyun CLM_ACS = 1, 136*4882a593Smuzhiyun }; 137*4882a593Smuzhiyun 138*4882a593Smuzhiyun enum ifs_clm_application { 139*4882a593Smuzhiyun IFS_CLM_BACKGROUND = 0,/*default*/ 140*4882a593Smuzhiyun IFS_CLM_HP_TAS = 1, 141*4882a593Smuzhiyun HP_TAS = 2, 142*4882a593Smuzhiyun IFS_CLM_DBG = 3 143*4882a593Smuzhiyun }; 144*4882a593Smuzhiyun 145*4882a593Smuzhiyun enum clm_monitor_mode { 146*4882a593Smuzhiyun CLM_DRIVER_MNTR = 1, 147*4882a593Smuzhiyun CLM_FW_MNTR = 2 148*4882a593Smuzhiyun }; 149*4882a593Smuzhiyun 150*4882a593Smuzhiyun enum phydm_ifs_clm_unit { 151*4882a593Smuzhiyun IFS_CLM_4 = 0, /*4us*/ 152*4882a593Smuzhiyun IFS_CLM_8 = 1, /*8us*/ 153*4882a593Smuzhiyun IFS_CLM_12 = 2, /*12us*/ 154*4882a593Smuzhiyun IFS_CLM_16 = 3, /*16us*/ 155*4882a593Smuzhiyun IFS_CLM_INIT 156*4882a593Smuzhiyun }; 157*4882a593Smuzhiyun 158*4882a593Smuzhiyun /* @1 ============================================================ 159*4882a593Smuzhiyun * 1 structure 160*4882a593Smuzhiyun * 1 ============================================================ 161*4882a593Smuzhiyun */ 162*4882a593Smuzhiyun struct env_trig_rpt { 163*4882a593Smuzhiyun u8 nhm_rpt_stamp; 164*4882a593Smuzhiyun u8 clm_rpt_stamp; 165*4882a593Smuzhiyun }; 166*4882a593Smuzhiyun 167*4882a593Smuzhiyun 168*4882a593Smuzhiyun struct env_mntr_rpt { 169*4882a593Smuzhiyun u8 nhm_ratio; 170*4882a593Smuzhiyun u8 nhm_result[NHM_RPT_NUM]; 171*4882a593Smuzhiyun u8 clm_ratio; 172*4882a593Smuzhiyun u8 nhm_rpt_stamp; 173*4882a593Smuzhiyun u8 clm_rpt_stamp; 174*4882a593Smuzhiyun u8 nhm_noise_pwr; /*including r[0]~r[10]*/ 175*4882a593Smuzhiyun u8 nhm_pwr; /*including r[0]~r[11]*/ 176*4882a593Smuzhiyun }; 177*4882a593Smuzhiyun 178*4882a593Smuzhiyun struct enhance_mntr_trig_rpt { 179*4882a593Smuzhiyun u8 ifs_clm_rpt_stamp; 180*4882a593Smuzhiyun }; 181*4882a593Smuzhiyun 182*4882a593Smuzhiyun 183*4882a593Smuzhiyun struct enhance_mntr_rpt { 184*4882a593Smuzhiyun u8 ifs_clm_rpt_stamp; 185*4882a593Smuzhiyun u8 ifs_clm_tx_ratio; 186*4882a593Smuzhiyun u8 ifs_clm_edcca_excl_cca_ratio; 187*4882a593Smuzhiyun u8 ifs_clm_fa_ratio; 188*4882a593Smuzhiyun u8 ifs_clm_cca_excl_fa_ratio; 189*4882a593Smuzhiyun }; 190*4882a593Smuzhiyun 191*4882a593Smuzhiyun struct nhm_para_info { 192*4882a593Smuzhiyun enum nhm_option_txon_all incld_txon; /*@Include TX on*/ 193*4882a593Smuzhiyun enum nhm_option_cca_all incld_cca; /*@Include CCA*/ 194*4882a593Smuzhiyun enum nhm_divider_opt_all div_opt; /*@divider option*/ 195*4882a593Smuzhiyun enum nhm_application nhm_app; 196*4882a593Smuzhiyun enum phydm_nhm_level nhm_lv; 197*4882a593Smuzhiyun u16 mntr_time; /*@0~262 unit ms*/ 198*4882a593Smuzhiyun boolean en_1db_mode; 199*4882a593Smuzhiyun u8 nhm_th0_manual; /* for 1-db mode*/ 200*4882a593Smuzhiyun }; 201*4882a593Smuzhiyun 202*4882a593Smuzhiyun struct clm_para_info { 203*4882a593Smuzhiyun enum clm_application clm_app; 204*4882a593Smuzhiyun enum phydm_clm_level clm_lv; 205*4882a593Smuzhiyun u16 mntr_time; /*@0~262 unit ms*/ 206*4882a593Smuzhiyun }; 207*4882a593Smuzhiyun 208*4882a593Smuzhiyun struct ifs_clm_para_info { 209*4882a593Smuzhiyun enum ifs_clm_application ifs_clm_app; 210*4882a593Smuzhiyun enum phydm_ifs_clm_level ifs_clm_lv; 211*4882a593Smuzhiyun enum phydm_ifs_clm_unit ifs_clm_ctrl_unit; /*unit*/ 212*4882a593Smuzhiyun u16 mntr_time; /*ms*/ 213*4882a593Smuzhiyun boolean ifs_clm_th_en[IFS_CLM_NUM]; 214*4882a593Smuzhiyun u16 ifs_clm_th_low[IFS_CLM_NUM]; 215*4882a593Smuzhiyun u16 ifs_clm_th_high[IFS_CLM_NUM]; 216*4882a593Smuzhiyun s16 th_shift; 217*4882a593Smuzhiyun }; 218*4882a593Smuzhiyun 219*4882a593Smuzhiyun struct ccx_info { 220*4882a593Smuzhiyun u32 nhm_trigger_time; 221*4882a593Smuzhiyun u32 clm_trigger_time; 222*4882a593Smuzhiyun u32 ifs_clm_trigger_time; 223*4882a593Smuzhiyun u64 start_time; /*@monitor for the test duration*/ 224*4882a593Smuzhiyun #ifdef NHM_SUPPORT 225*4882a593Smuzhiyun enum nhm_application nhm_app; 226*4882a593Smuzhiyun enum nhm_option_txon_all nhm_include_txon; 227*4882a593Smuzhiyun enum nhm_option_cca_all nhm_include_cca; 228*4882a593Smuzhiyun enum nhm_divider_opt_all nhm_divider_opt; 229*4882a593Smuzhiyun /*Report*/ 230*4882a593Smuzhiyun u8 nhm_th[NHM_TH_NUM]; 231*4882a593Smuzhiyun u8 nhm_result[NHM_RPT_NUM]; 232*4882a593Smuzhiyun u16 nhm_period; /* @4us per unit */ 233*4882a593Smuzhiyun u8 nhm_igi; 234*4882a593Smuzhiyun u8 nhm_manual_ctrl; 235*4882a593Smuzhiyun u8 nhm_ratio; /*@1% per nuit, it means the interference igi can't overcome.*/ 236*4882a593Smuzhiyun u8 nhm_rpt_sum; 237*4882a593Smuzhiyun u16 nhm_duration; /*@Real time of NHM_VALID */ 238*4882a593Smuzhiyun u8 nhm_set_lv; 239*4882a593Smuzhiyun boolean nhm_ongoing; 240*4882a593Smuzhiyun u8 nhm_rpt_stamp; 241*4882a593Smuzhiyun u8 nhm_level; /*including r[0]~r[10]*/ 242*4882a593Smuzhiyun u8 nhm_level_valid; 243*4882a593Smuzhiyun u8 nhm_pwr; /*including r[0]~r[11]*/ 244*4882a593Smuzhiyun #ifdef NHM_DYM_PW_TH_SUPPORT 245*4882a593Smuzhiyun boolean nhm_dym_pw_th_en; 246*4882a593Smuzhiyun boolean dym_pwth_manual_ctrl; 247*4882a593Smuzhiyun u8 pw_th_rf20_ori; 248*4882a593Smuzhiyun u8 pw_th_rf20_cur; 249*4882a593Smuzhiyun u8 nhm_pw_th_max; 250*4882a593Smuzhiyun u8 nhm_period_decre; 251*4882a593Smuzhiyun u8 nhm_sl_pw_th; 252*4882a593Smuzhiyun #endif 253*4882a593Smuzhiyun #endif 254*4882a593Smuzhiyun 255*4882a593Smuzhiyun #ifdef CLM_SUPPORT 256*4882a593Smuzhiyun enum clm_application clm_app; 257*4882a593Smuzhiyun u8 clm_manual_ctrl; 258*4882a593Smuzhiyun u8 clm_set_lv; 259*4882a593Smuzhiyun boolean clm_ongoing; 260*4882a593Smuzhiyun u16 clm_period; /* @4us per unit */ 261*4882a593Smuzhiyun u16 clm_result; 262*4882a593Smuzhiyun u8 clm_ratio; 263*4882a593Smuzhiyun u32 clm_fw_result_acc; 264*4882a593Smuzhiyun u8 clm_fw_result_cnt; 265*4882a593Smuzhiyun enum clm_monitor_mode clm_mntr_mode; 266*4882a593Smuzhiyun u8 clm_rpt_stamp; 267*4882a593Smuzhiyun #endif 268*4882a593Smuzhiyun #ifdef FAHM_SUPPORT 269*4882a593Smuzhiyun boolean fahm_ongoing; 270*4882a593Smuzhiyun u8 env_mntr_igi; 271*4882a593Smuzhiyun u8 fahm_nume_sel; /*@fahm_numerator_sel: select {FA, CRCOK, CRC_fail} */ 272*4882a593Smuzhiyun u8 fahm_denom_sel; /*@fahm_denominator_sel: select {FA, CRCOK, CRC_fail} */ 273*4882a593Smuzhiyun u16 fahm_period; /*unit: 4us*/ 274*4882a593Smuzhiyun #endif 275*4882a593Smuzhiyun #ifdef IFS_CLM_SUPPORT 276*4882a593Smuzhiyun enum ifs_clm_application ifs_clm_app; 277*4882a593Smuzhiyun /*Control*/ 278*4882a593Smuzhiyun enum phydm_ifs_clm_unit ifs_clm_ctrl_unit; /*4,8,12,16us per unit*/ 279*4882a593Smuzhiyun u16 ifs_clm_period; 280*4882a593Smuzhiyun boolean ifs_clm_th_en[IFS_CLM_NUM]; 281*4882a593Smuzhiyun u16 ifs_clm_th_low[IFS_CLM_NUM]; 282*4882a593Smuzhiyun u16 ifs_clm_th_high[IFS_CLM_NUM]; 283*4882a593Smuzhiyun /*Flow control*/ 284*4882a593Smuzhiyun u8 ifs_clm_set_lv; 285*4882a593Smuzhiyun u8 ifs_clm_manual_ctrl; 286*4882a593Smuzhiyun boolean ifs_clm_ongoing; 287*4882a593Smuzhiyun /*Report*/ 288*4882a593Smuzhiyun u8 ifs_clm_rpt_stamp; 289*4882a593Smuzhiyun u16 ifs_clm_tx; 290*4882a593Smuzhiyun u16 ifs_clm_edcca_excl_cca; 291*4882a593Smuzhiyun u16 ifs_clm_ofdmfa; 292*4882a593Smuzhiyun u16 ifs_clm_ofdmcca_excl_fa; 293*4882a593Smuzhiyun u16 ifs_clm_cckfa; 294*4882a593Smuzhiyun u16 ifs_clm_cckcca_excl_fa; 295*4882a593Smuzhiyun u8 ifs_clm_his[IFS_CLM_NUM]; /*trx_neg_edge to CCA/FA posedge per times*/ 296*4882a593Smuzhiyun u16 ifs_clm_total_cca; 297*4882a593Smuzhiyun u16 ifs_clm_avg[IFS_CLM_NUM]; /*4,8,12,16us per unit*/ 298*4882a593Smuzhiyun u16 ifs_clm_avg_cca[IFS_CLM_NUM]; /*4,8,12,16us per unit*/ 299*4882a593Smuzhiyun u8 ifs_clm_tx_ratio; 300*4882a593Smuzhiyun u8 ifs_clm_edcca_excl_cca_ratio; 301*4882a593Smuzhiyun u8 ifs_clm_fa_ratio; 302*4882a593Smuzhiyun u8 ifs_clm_cca_excl_fa_ratio; 303*4882a593Smuzhiyun #endif 304*4882a593Smuzhiyun }; 305*4882a593Smuzhiyun 306*4882a593Smuzhiyun /* @1 ============================================================ 307*4882a593Smuzhiyun * 1 Function Prototype 308*4882a593Smuzhiyun * 1 ============================================================ 309*4882a593Smuzhiyun */ 310*4882a593Smuzhiyun 311*4882a593Smuzhiyun #ifdef FAHM_SUPPORT 312*4882a593Smuzhiyun void phydm_fahm_init(void *dm_void); 313*4882a593Smuzhiyun 314*4882a593Smuzhiyun void phydm_fahm_dbg(void *dm_void, char input[][16], u32 *_used, char *output, 315*4882a593Smuzhiyun u32 *_out_len); 316*4882a593Smuzhiyun #endif 317*4882a593Smuzhiyun 318*4882a593Smuzhiyun #ifdef NHM_SUPPORT 319*4882a593Smuzhiyun void phydm_nhm_dbg(void *dm_void, char input[][16], u32 *_used, char *output, 320*4882a593Smuzhiyun u32 *_out_len); 321*4882a593Smuzhiyun u8 phydm_get_igi(void *dm_void, enum bb_path path); 322*4882a593Smuzhiyun #endif 323*4882a593Smuzhiyun 324*4882a593Smuzhiyun #ifdef CLM_SUPPORT 325*4882a593Smuzhiyun void phydm_clm_c2h_report_handler(void *dm_void, u8 *cmd_buf, u8 cmd_len); 326*4882a593Smuzhiyun 327*4882a593Smuzhiyun void phydm_clm_dbg(void *dm_void, char input[][16], u32 *_used, char *output, 328*4882a593Smuzhiyun u32 *_out_len); 329*4882a593Smuzhiyun #endif 330*4882a593Smuzhiyun 331*4882a593Smuzhiyun u8 phydm_env_mntr_trigger(void *dm_void, struct nhm_para_info *nhm_para, 332*4882a593Smuzhiyun struct clm_para_info *clm_para, 333*4882a593Smuzhiyun struct env_trig_rpt *rpt); 334*4882a593Smuzhiyun 335*4882a593Smuzhiyun u8 phydm_env_mntr_result(void *dm_void, struct env_mntr_rpt *rpt); 336*4882a593Smuzhiyun 337*4882a593Smuzhiyun void phydm_env_mntr_watchdog(void *dm_void); 338*4882a593Smuzhiyun 339*4882a593Smuzhiyun void phydm_env_monitor_init(void *dm_void); 340*4882a593Smuzhiyun 341*4882a593Smuzhiyun void phydm_env_mntr_dbg(void *dm_void, char input[][16], u32 *_used, 342*4882a593Smuzhiyun char *output, u32 *_out_len); 343*4882a593Smuzhiyun 344*4882a593Smuzhiyun #ifdef IFS_CLM_SUPPORT 345*4882a593Smuzhiyun void phydm_ifs_clm_dbg(void *dm_void, char input[][16], u32 *_used, 346*4882a593Smuzhiyun char *output, u32 *_out_len); 347*4882a593Smuzhiyun #endif 348*4882a593Smuzhiyun 349*4882a593Smuzhiyun u8 phydm_enhance_mntr_trigger(void *dm_void, 350*4882a593Smuzhiyun struct ifs_clm_para_info *ifs_clm_para, 351*4882a593Smuzhiyun struct enhance_mntr_trig_rpt *trig_rpt); 352*4882a593Smuzhiyun 353*4882a593Smuzhiyun void phydm_enhance_mntr_result(void *dm_void, struct enhance_mntr_rpt *rpt); 354*4882a593Smuzhiyun 355*4882a593Smuzhiyun void phydm_enhance_mntr_watchdog(void *dm_void); 356*4882a593Smuzhiyun 357*4882a593Smuzhiyun void phydm_enhance_monitor_init(void *dm_void); 358*4882a593Smuzhiyun #endif 359