1 /****************************************************************************** 2 * 3 * Copyright(c) 2007 - 2019 Realtek Corporation. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 *****************************************************************************/ 15 #ifndef _RTW_XMIT_H_ 16 #define _RTW_XMIT_H_ 17 18 19 #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) 20 #ifdef CONFIG_TX_AGGREGATION 21 #ifdef CONFIG_RTL8822C 22 #ifdef CONFIG_SDIO_TX_FORMAT_DUMMY_AUTO 23 #define MAX_XMITBUF_SZ (51200) 24 #else 25 #define MAX_XMITBUF_SZ (32764) 26 #endif 27 #else 28 #define MAX_XMITBUF_SZ (20480) /* 20k */ 29 #endif 30 /* #define SDIO_TX_AGG_MAX 5 */ 31 #else 32 #define MAX_XMITBUF_SZ (1664) 33 #define SDIO_TX_AGG_MAX 1 34 #endif 35 36 #if defined CONFIG_SDIO_HCI 37 #define NR_XMITBUFF (16) 38 #define SDIO_TX_DIV_NUM (2) 39 #endif 40 #if defined(CONFIG_GSPI_HCI) 41 #define NR_XMITBUFF (128) 42 #endif 43 44 #elif defined (CONFIG_USB_HCI) 45 46 #ifdef CONFIG_USB_TX_AGGREGATION 47 #if defined(CONFIG_PLATFORM_ARM_SUNxI) || defined(CONFIG_PLATFORM_ARM_SUN6I) || defined(CONFIG_PLATFORM_ARM_SUN7I) || defined(CONFIG_PLATFORM_ARM_SUN8I) || defined(CONFIG_PLATFORM_ARM_SUN50IW1P1) 48 #define MAX_XMITBUF_SZ (12288) /* 12k 1536*8 */ 49 #elif defined (CONFIG_PLATFORM_MSTAR) 50 #define MAX_XMITBUF_SZ 7680 /* 7.5k */ 51 #else 52 #define MAX_XMITBUF_SZ (20480) /* 20k */ 53 #endif 54 #else 55 #define MAX_XMITBUF_SZ (2048) 56 #endif 57 58 #ifdef CONFIG_SINGLE_XMIT_BUF 59 #define NR_XMITBUFF (1) 60 #else 61 #define NR_XMITBUFF (4) 62 #endif /* CONFIG_SINGLE_XMIT_BUF */ 63 #elif defined (CONFIG_PCI_HCI) 64 #ifdef CONFIG_TX_AMSDU 65 #define MAX_XMITBUF_SZ (3500) 66 #else 67 #define MAX_XMITBUF_SZ (1664) 68 #endif 69 #ifdef CONFIG_PCI_TX_POLLING 70 #define NR_XMITBUFF (256) 71 #else 72 #define NR_XMITBUFF (128) 73 #endif 74 #endif 75 76 77 #ifdef CONFIG_PCI_HCI 78 #define XMITBUF_ALIGN_SZ 4 79 #else 80 #ifdef USB_XMITBUF_ALIGN_SZ 81 #define XMITBUF_ALIGN_SZ (USB_XMITBUF_ALIGN_SZ) 82 #else 83 #define XMITBUF_ALIGN_SZ 512 84 #endif 85 #endif 86 87 88 /* xmit extension buff defination */ 89 #define MAX_XMIT_EXTBUF_SZ (1536) 90 91 #ifdef CONFIG_SINGLE_XMIT_BUF 92 #define NR_XMIT_EXTBUFF (1) 93 #else 94 #define NR_XMIT_EXTBUFF (32) 95 #endif 96 97 #ifdef CONFIG_RTL8812A 98 #define MAX_CMDBUF_SZ (512 * 18) 99 #elif defined(CONFIG_RTL8723D) && defined(CONFIG_LPS_POFF) 100 #define MAX_CMDBUF_SZ (128*70) /*(8960)*/ 101 #else 102 #define MAX_CMDBUF_SZ (5120) /* (4096) */ 103 #endif 104 105 #define MAX_BEACON_LEN 512 106 107 #define MAX_NUMBLKS (1) 108 109 #define XMIT_VO_QUEUE (0) 110 #define XMIT_VI_QUEUE (1) 111 #define XMIT_BE_QUEUE (2) 112 #define XMIT_BK_QUEUE (3) 113 114 #define VO_QUEUE_INX 0 115 #define VI_QUEUE_INX 1 116 #define BE_QUEUE_INX 2 117 #define BK_QUEUE_INX 3 118 #define BCN_QUEUE_INX 4 119 #define MGT_QUEUE_INX 5 120 #define TXCMD_QUEUE_INX 6 121 #define HIGH_QUEUE_INX 7 122 /* keep high queue to be the last one, so we can extend HIQ to port 1, 2, ... */ 123 124 #ifndef CONFIG_PORT_BASED_HIQ 125 #define HW_QUEUE_ENTRY 8 126 #else 127 #define HI_QUEUE_INX(n) (HIGH_QUEUE_INX + (n)) 128 #define HW_QUEUE_ENTRY (8 + CONFIG_IFACE_NUMBER - 1) 129 #endif 130 131 #ifdef CONFIG_PCI_HCI 132 #ifdef CONFIG_TRX_BD_ARCH 133 #define TX_BD_NUM (128+1) /* +1 result from ring buffer */ 134 #else 135 #define TXDESC_NUM 128 136 #endif 137 #endif 138 139 #define WEP_IV(pattrib_iv, dot11txpn, keyidx)\ 140 do {\ 141 dot11txpn.val = (dot11txpn.val == 0xffffff) ? 0 : (dot11txpn.val + 1);\ 142 pattrib_iv[0] = dot11txpn._byte_.TSC0;\ 143 pattrib_iv[1] = dot11txpn._byte_.TSC1;\ 144 pattrib_iv[2] = dot11txpn._byte_.TSC2;\ 145 pattrib_iv[3] = ((keyidx & 0x3)<<6);\ 146 } while (0) 147 148 149 #define TKIP_IV(pattrib_iv, dot11txpn, keyidx)\ 150 do {\ 151 dot11txpn.val = dot11txpn.val == 0xffffffffffffULL ? 0 : (dot11txpn.val + 1);\ 152 pattrib_iv[0] = dot11txpn._byte_.TSC1;\ 153 pattrib_iv[1] = (dot11txpn._byte_.TSC1 | 0x20) & 0x7f;\ 154 pattrib_iv[2] = dot11txpn._byte_.TSC0;\ 155 pattrib_iv[3] = BIT(5) | ((keyidx & 0x3)<<6);\ 156 pattrib_iv[4] = dot11txpn._byte_.TSC2;\ 157 pattrib_iv[5] = dot11txpn._byte_.TSC3;\ 158 pattrib_iv[6] = dot11txpn._byte_.TSC4;\ 159 pattrib_iv[7] = dot11txpn._byte_.TSC5;\ 160 } while (0) 161 162 #define AES_IV(pattrib_iv, dot11txpn, keyidx)\ 163 do {\ 164 dot11txpn.val = dot11txpn.val == 0xffffffffffffULL ? 0 : (dot11txpn.val + 1);\ 165 pattrib_iv[0] = dot11txpn._byte_.TSC0;\ 166 pattrib_iv[1] = dot11txpn._byte_.TSC1;\ 167 pattrib_iv[2] = 0;\ 168 pattrib_iv[3] = BIT(5) | ((keyidx & 0x3)<<6);\ 169 pattrib_iv[4] = dot11txpn._byte_.TSC2;\ 170 pattrib_iv[5] = dot11txpn._byte_.TSC3;\ 171 pattrib_iv[6] = dot11txpn._byte_.TSC4;\ 172 pattrib_iv[7] = dot11txpn._byte_.TSC5;\ 173 } while (0) 174 175 #define GCMP_IV(a, b, c) AES_IV(a, b, c) 176 177 /* Check if AMPDU Tx is supported or not. If it is supported, 178 * it need to check "amsdu in ampdu" is supported or not. 179 * (ampdu_en, amsdu_ampdu_en) = 180 * (0, x) : AMPDU is not enable, but AMSDU is valid to send. 181 * (1, 0) : AMPDU is enable, AMSDU in AMPDU is not enable. So, AMSDU is not valid to send. 182 * (1, 1) : AMPDU and AMSDU in AMPDU are enable. So, AMSDU is valid to send. 183 */ 184 #define IS_AMSDU_AMPDU_NOT_VALID(pattrib)\ 185 ((pattrib->ampdu_en == _TRUE) && (pattrib->amsdu_ampdu_en == _FALSE)) 186 187 #define IS_AMSDU_AMPDU_VALID(pattrib)\ 188 !((pattrib->ampdu_en == _TRUE) && (pattrib->amsdu_ampdu_en == _FALSE)) 189 190 #define HWXMIT_ENTRY 4 191 192 /* For Buffer Descriptor ring architecture */ 193 #if defined(BUF_DESC_ARCH) || defined(CONFIG_TRX_BD_ARCH) 194 #if defined(CONFIG_RTL8192E) 195 #define TX_BUFFER_SEG_NUM 1 /* 0:2 seg, 1: 4 seg, 2: 8 seg. */ 196 #elif defined(CONFIG_RTL8814A) 197 #define TX_BUFFER_SEG_NUM 1 /* 0:2 seg, 1: 4 seg, 2: 8 seg. */ 198 #else 199 #define TX_BUFFER_SEG_NUM 1 /* 0:2 seg, 1: 4 seg, 2: 8 seg. */ 200 #endif 201 #endif 202 203 #if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) ||\ 204 defined(CONFIG_RTL8723B) || defined(CONFIG_RTL8192E) ||\ 205 defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8703B) ||\ 206 defined(CONFIG_RTL8188F) || defined(CONFIG_RTL8188GTV) || defined(CONFIG_RTL8723D) ||\ 207 defined(CONFIG_RTL8710B) || defined(CONFIG_RTL8192F) 208 #define TXDESC_SIZE 40 209 #elif defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8822C) 210 #define TXDESC_SIZE 48 /* HALMAC_TX_DESC_SIZE_8822B */ 211 #elif defined(CONFIG_RTL8821C) 212 #define TXDESC_SIZE 48 /* HALMAC_TX_DESC_SIZE_8821C */ 213 #elif defined(CONFIG_RTL8814B) 214 #define TXDESC_SIZE (16 + 32) 215 #else 216 #define TXDESC_SIZE 32 /* old IC (ex: 8188E) */ 217 #endif 218 219 #ifdef CONFIG_TX_EARLY_MODE 220 #define EARLY_MODE_INFO_SIZE 8 221 #endif 222 223 224 #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) 225 #define TXDESC_OFFSET TXDESC_SIZE 226 #endif 227 228 #ifdef CONFIG_USB_HCI 229 #ifdef USB_PACKET_OFFSET_SZ 230 #define PACKET_OFFSET_SZ (USB_PACKET_OFFSET_SZ) 231 #else 232 #define PACKET_OFFSET_SZ (8) 233 #endif 234 #define TXDESC_OFFSET (TXDESC_SIZE + PACKET_OFFSET_SZ) 235 #endif 236 237 #ifdef CONFIG_PCI_HCI 238 #if defined(CONFIG_RTL8192E) || defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822C) || defined(CONFIG_TRX_BD_ARCH) 239 /* this section is defined for buffer descriptor ring architecture */ 240 #define TX_WIFI_INFO_SIZE (TXDESC_SIZE) /* it may add 802.11 hdr or others... */ 241 /* tx desc and payload are in the same buf */ 242 #define TXDESC_OFFSET (TX_WIFI_INFO_SIZE) 243 #else 244 /* tx desc and payload are NOT in the same buf */ 245 #define TXDESC_OFFSET (0) 246 /* 8188ee/8723be/8812ae/8821ae has extra PCI DMA info in tx desc */ 247 #define TX_DESC_NEXT_DESC_OFFSET (TXDESC_SIZE + 8) 248 #endif 249 #endif /* CONFIG_PCI_HCI */ 250 251 enum TXDESC_SC { 252 SC_DONT_CARE = 0x00, 253 SC_UPPER = 0x01, 254 SC_LOWER = 0x02, 255 SC_DUPLICATE = 0x03 256 }; 257 258 #ifdef CONFIG_PCI_HCI 259 #ifndef CONFIG_TRX_BD_ARCH /* CONFIG_TRX_BD_ARCH doesn't need this */ 260 #define TXDESC_64_BYTES 261 #endif 262 #elif defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) || defined(CONFIG_RTL8723B) \ 263 || defined(CONFIG_RTL8188F) || defined(CONFIG_RTL8188GTV) || defined(CONFIG_RTL8723D) \ 264 || defined(CONFIG_RTL8192F) 265 #define TXDESC_40_BYTES 266 #endif 267 268 #ifdef CONFIG_TRX_BD_ARCH 269 struct tx_buf_desc { 270 #ifdef CONFIG_64BIT_DMA 271 #define TX_BUFFER_SEG_SIZE 4 /* in unit of DWORD */ 272 #else 273 #define TX_BUFFER_SEG_SIZE 2 /* in unit of DWORD */ 274 #endif 275 unsigned int dword[TX_BUFFER_SEG_SIZE * (2 << TX_BUFFER_SEG_NUM)]; 276 } __packed; 277 #elif (defined(CONFIG_RTL8192E) || defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8822C)) && defined(CONFIG_PCI_HCI) /* 8192ee or 8814ae */ 278 /* 8192EE_TODO */ 279 struct tx_desc { 280 unsigned int txdw0; 281 unsigned int txdw1; 282 unsigned int txdw2; 283 unsigned int txdw3; 284 unsigned int txdw4; 285 unsigned int txdw5; 286 unsigned int txdw6; 287 unsigned int txdw7; 288 }; 289 #else 290 struct tx_desc { 291 unsigned int txdw0; 292 unsigned int txdw1; 293 unsigned int txdw2; 294 unsigned int txdw3; 295 unsigned int txdw4; 296 unsigned int txdw5; 297 unsigned int txdw6; 298 unsigned int txdw7; 299 300 #if defined(TXDESC_40_BYTES) || defined(TXDESC_64_BYTES) 301 unsigned int txdw8; 302 unsigned int txdw9; 303 #endif /* TXDESC_40_BYTES */ 304 305 #ifdef TXDESC_64_BYTES 306 unsigned int txdw10; 307 unsigned int txdw11; 308 309 /* 2008/05/15 MH Because PCIE HW memory R/W 4K limit. And now, our descriptor */ 310 /* size is 40 bytes. If you use more than 102 descriptor( 103*40>4096), HW will execute */ 311 /* memoryR/W CRC error. And then all DMA fetch will fail. We must decrease descriptor */ 312 /* number or enlarge descriptor size as 64 bytes. */ 313 unsigned int txdw12; 314 unsigned int txdw13; 315 unsigned int txdw14; 316 unsigned int txdw15; 317 #endif 318 }; 319 #endif 320 321 #ifndef CONFIG_TRX_BD_ARCH 322 union txdesc { 323 struct tx_desc txdesc; 324 unsigned int value[TXDESC_SIZE >> 2]; 325 }; 326 #endif 327 328 #ifdef CONFIG_PCI_HCI 329 #define PCI_MAX_TX_QUEUE_COUNT HW_QUEUE_ENTRY 330 331 struct rtw_tx_ring { 332 unsigned char qid; 333 #ifdef CONFIG_TRX_BD_ARCH 334 struct tx_buf_desc *buf_desc; 335 #else 336 struct tx_desc *desc; 337 #endif 338 dma_addr_t dma; 339 unsigned int idx; 340 unsigned int entries; 341 _queue queue; 342 u32 qlen; 343 #ifdef CONFIG_TRX_BD_ARCH 344 u16 hw_rp_cache; 345 #endif 346 }; 347 348 #ifdef DBG_TXBD_DESC_DUMP 349 350 #define TX_BAK_FRMAE_CNT 10 351 #define TX_BAK_DESC_LEN 48 /* byte */ 352 #define TX_BAK_DATA_LEN 30 /* byte */ 353 354 struct rtw_tx_desc_backup { 355 int tx_bak_rp; 356 int tx_bak_wp; 357 u8 tx_bak_desc[TX_BAK_DESC_LEN]; 358 u8 tx_bak_data_hdr[TX_BAK_DATA_LEN]; 359 u8 tx_desc_size; 360 }; 361 #endif 362 #endif 363 364 struct hw_xmit { 365 /* _lock xmit_lock; */ 366 /* _list pending; */ 367 _queue *sta_queue; 368 /* struct hw_txqueue *phwtxqueue; */ 369 /* sint txcmdcnt; */ 370 int accnt; 371 }; 372 373 #if 0 374 struct pkt_attrib { 375 u8 type; 376 u8 subtype; 377 u8 bswenc; 378 u8 dhcp_pkt; 379 u16 ether_type; 380 int pktlen; /* the original 802.3 pkt raw_data len (not include ether_hdr data) */ 381 int pkt_hdrlen; /* the original 802.3 pkt header len */ 382 int hdrlen; /* the WLAN Header Len */ 383 int nr_frags; 384 int last_txcmdsz; 385 int encrypt; /* when 0 indicate no encrypt. when non-zero, indicate the encrypt algorith */ 386 u8 iv[8]; 387 int iv_len; 388 u8 icv[8]; 389 int icv_len; 390 int priority; 391 int ack_policy; 392 int mac_id; 393 int vcs_mode; /* virtual carrier sense method */ 394 395 u8 dst[ETH_ALEN]; 396 u8 src[ETH_ALEN]; 397 u8 ta[ETH_ALEN]; 398 u8 ra[ETH_ALEN]; 399 400 u8 key_idx; 401 402 u8 qos_en; 403 u8 ht_en; 404 u8 raid;/* rate adpative id */ 405 u8 bwmode; 406 u8 ch_offset;/* PRIME_CHNL_OFFSET */ 407 u8 sgi;/* short GI */ 408 u8 ampdu_en;/* tx ampdu enable */ 409 u8 mdata;/* more data bit */ 410 u8 eosp; 411 412 u8 triggered;/* for ap mode handling Power Saving sta */ 413 414 u32 qsel; 415 u16 seqnum; 416 417 struct sta_info *psta; 418 }; 419 #else 420 /* reduce size */ 421 struct pkt_attrib { 422 u8 type; 423 u8 subtype; 424 u8 bswenc; 425 u8 dhcp_pkt; 426 u16 ether_type; 427 u16 seqnum; 428 u8 hw_ssn_sel; /* for HW_SEQ0,1,2,3 */ 429 u16 pkt_hdrlen; /* the original 802.3 pkt header len */ 430 u16 hdrlen; /* the WLAN Header Len */ 431 u32 pktlen; /* the original 802.3 pkt raw_data len (not include ether_hdr data) */ 432 u32 last_txcmdsz; 433 u8 nr_frags; 434 u8 encrypt; /* when 0 indicate no encrypt. when non-zero, indicate the encrypt algorith */ 435 u8 bmc_camid; 436 u8 iv_len; 437 u8 icv_len; 438 u8 iv[18]; 439 u8 icv[16]; 440 u8 priority; 441 u8 ack_policy; 442 u8 mac_id; 443 u8 vcs_mode; /* virtual carrier sense method */ 444 u8 dst[ETH_ALEN]; 445 u8 src[ETH_ALEN]; 446 u8 ta[ETH_ALEN]; 447 u8 ra[ETH_ALEN]; 448 #ifdef CONFIG_RTW_WDS 449 u8 wds; 450 #endif 451 #ifdef CONFIG_RTW_MESH 452 u8 mda[ETH_ALEN]; /* mesh da */ 453 u8 msa[ETH_ALEN]; /* mesh sa */ 454 u8 meshctrl_len; /* Length of Mesh Control field */ 455 u8 mesh_frame_mode; 456 #if CONFIG_RTW_MESH_DATA_BMC_TO_UC 457 u8 mb2u; 458 #endif 459 u8 mfwd_ttl; 460 u32 mseq; 461 #endif 462 #ifdef CONFIG_TCP_CSUM_OFFLOAD_TX 463 u8 hw_csum; 464 #endif 465 u8 key_idx; 466 u8 qos_en; 467 u8 ht_en; 468 u8 raid;/* rate adpative id */ 469 u8 bwmode; 470 u8 ch_offset;/* PRIME_CHNL_OFFSET */ 471 u8 sgi;/* short GI */ 472 u8 ampdu_en;/* tx ampdu enable */ 473 u8 ampdu_spacing; /* ampdu_min_spacing for peer sta's rx */ 474 u8 amsdu; 475 u8 amsdu_ampdu_en;/* tx amsdu in ampdu enable */ 476 u8 mdata;/* more data bit */ 477 u8 pctrl;/* per packet txdesc control enable */ 478 u8 triggered;/* for ap mode handling Power Saving sta */ 479 u8 qsel; 480 u8 order;/* order bit */ 481 u8 eosp; 482 u8 rate; 483 u8 intel_proxim; 484 u8 retry_ctrl; 485 u8 mbssid; 486 u8 ldpc; 487 u8 stbc; 488 #ifdef CONFIG_WMMPS_STA 489 u8 trigger_frame; 490 #endif /* CONFIG_WMMPS_STA */ 491 492 struct sta_info *psta; 493 494 u8 rtsen; 495 u8 cts2self; 496 union Keytype dot11tkiptxmickey; 497 /* union Keytype dot11tkiprxmickey; */ 498 union Keytype dot118021x_UncstKey; 499 500 #ifdef CONFIG_TDLS 501 u8 direct_link; 502 struct sta_info *ptdls_sta; 503 #endif /* CONFIG_TDLS */ 504 u8 key_type; 505 506 u8 icmp_pkt; 507 u8 hipriority_pkt; /* high priority packet */ 508 509 #ifdef CONFIG_BEAMFORMING 510 u16 txbf_p_aid;/*beamforming Partial_AID*/ 511 u16 txbf_g_id;/*beamforming Group ID*/ 512 513 /* 514 * 2'b00: Unicast NDPA 515 * 2'b01: Broadcast NDPA 516 * 2'b10: Beamforming Report Poll 517 * 2'b11: Final Beamforming Report Poll 518 */ 519 u8 bf_pkt_type; 520 #endif 521 522 }; 523 #endif 524 525 #ifdef CONFIG_RTW_WDS 526 #define XATTRIB_GET_WDS(xattrib) ((xattrib)->wds) 527 #else 528 #define XATTRIB_GET_WDS(xattrib) 0 529 #endif 530 531 #ifdef CONFIG_RTW_MESH 532 #define XATTRIB_GET_MCTRL_LEN(xattrib) ((xattrib)->meshctrl_len) 533 #else 534 #define XATTRIB_GET_MCTRL_LEN(xattrib) 0 535 #endif 536 537 #ifdef CONFIG_TX_AMSDU 538 enum { 539 RTW_AMSDU_TIMER_UNSET = 0, 540 RTW_AMSDU_TIMER_SETTING, 541 RTW_AMSDU_TIMER_TIMEOUT, 542 }; 543 #endif 544 545 #define WLANHDR_OFFSET 64 546 547 #define NULL_FRAMETAG (0x0) 548 #define DATA_FRAMETAG 0x01 549 #define L2_FRAMETAG 0x02 550 #define MGNT_FRAMETAG 0x03 551 #define AMSDU_FRAMETAG 0x04 552 553 #define EII_FRAMETAG 0x05 554 #define IEEE8023_FRAMETAG 0x06 555 556 #define MP_FRAMETAG 0x07 557 558 #define TXAGG_FRAMETAG 0x08 559 560 enum { 561 XMITBUF_DATA = 0, 562 XMITBUF_MGNT = 1, 563 XMITBUF_CMD = 2, 564 }; 565 566 bool rtw_xmit_ac_blocked(_adapter *adapter); 567 568 struct submit_ctx { 569 systime submit_time; /* */ 570 u32 timeout_ms; /* <0: not synchronous, 0: wait forever, >0: up to ms waiting */ 571 int status; /* status for operation */ 572 #ifdef PLATFORM_LINUX 573 struct completion done; 574 #endif 575 }; 576 577 enum { 578 RTW_SCTX_SUBMITTED = -1, 579 RTW_SCTX_DONE_SUCCESS = 0, 580 RTW_SCTX_DONE_UNKNOWN, 581 RTW_SCTX_DONE_TIMEOUT, 582 RTW_SCTX_DONE_BUF_ALLOC, 583 RTW_SCTX_DONE_BUF_FREE, 584 RTW_SCTX_DONE_WRITE_PORT_ERR, 585 RTW_SCTX_DONE_TX_DESC_NA, 586 RTW_SCTX_DONE_TX_DENY, 587 RTW_SCTX_DONE_CCX_PKT_FAIL, 588 RTW_SCTX_DONE_DRV_STOP, 589 RTW_SCTX_DONE_DEV_REMOVE, 590 RTW_SCTX_DONE_CMD_ERROR, 591 RTW_SCTX_DONE_CMD_DROP, 592 RTX_SCTX_CSTR_WAIT_RPT2, 593 }; 594 595 596 void rtw_sctx_init(struct submit_ctx *sctx, int timeout_ms); 597 int rtw_sctx_wait(struct submit_ctx *sctx, const char *msg); 598 void rtw_sctx_done_err(struct submit_ctx **sctx, int status); 599 void rtw_sctx_done(struct submit_ctx **sctx); 600 601 struct xmit_buf { 602 _list list; 603 604 _adapter *padapter; 605 606 u8 *pallocated_buf; 607 608 u8 *pbuf; 609 610 void *priv_data; 611 612 u16 buf_tag; /* 0: Normal xmitbuf, 1: extension xmitbuf, 2:cmd xmitbuf */ 613 u16 flags; 614 u32 alloc_sz; 615 616 u32 len; 617 618 struct submit_ctx *sctx; 619 620 #ifdef CONFIG_USB_HCI 621 622 /* u32 sz[8]; */ 623 u32 ff_hwaddr; 624 #ifdef RTW_HALMAC 625 u8 bulkout_id; /* for halmac */ 626 #endif /* RTW_HALMAC */ 627 628 PURB pxmit_urb[8]; 629 dma_addr_t dma_transfer_addr; /* (in) dma addr for transfer_buffer */ 630 631 u8 bpending[8]; 632 633 sint last[8]; 634 635 #endif 636 637 #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) 638 u8 *phead; 639 u8 *pdata; 640 u8 *ptail; 641 u8 *pend; 642 u32 ff_hwaddr; 643 u8 pg_num; 644 u8 agg_num; 645 #endif 646 647 #ifdef CONFIG_PCI_HCI 648 #ifdef CONFIG_TRX_BD_ARCH 649 /*struct tx_buf_desc *buf_desc;*/ 650 #else 651 struct tx_desc *desc; 652 #endif 653 #endif 654 655 #if defined(DBG_XMIT_BUF) || defined(DBG_XMIT_BUF_EXT) 656 u8 no; 657 #endif 658 659 }; 660 661 662 struct xmit_frame { 663 _list list; 664 665 struct pkt_attrib attrib; 666 667 u16 os_qid; 668 _pkt *pkt; 669 670 int frame_tag; 671 672 _adapter *padapter; 673 674 u8 *buf_addr; 675 676 struct xmit_buf *pxmitbuf; 677 678 #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) 679 u8 pg_num; 680 u8 agg_num; 681 #endif 682 683 #ifdef CONFIG_USB_HCI 684 #ifdef CONFIG_USB_TX_AGGREGATION 685 u8 agg_num; 686 #endif 687 s8 pkt_offset; 688 #endif 689 690 #ifdef CONFIG_XMIT_ACK 691 u8 ack_report; 692 #endif 693 694 u8 *alloc_addr; /* the actual address this xmitframe allocated */ 695 u8 ext_tag; /* 0:data, 1:mgmt */ 696 697 }; 698 699 struct tx_servq { 700 _list tx_pending; 701 _queue sta_pending; 702 int qcnt; 703 }; 704 705 706 struct sta_xmit_priv { 707 _lock lock; 708 sint option; 709 sint apsd_setting; /* When bit mask is on, the associated edca queue supports APSD. */ 710 711 712 /* struct tx_servq blk_q[MAX_NUMBLKS]; */ 713 struct tx_servq be_q; /* priority == 0,3 */ 714 struct tx_servq bk_q; /* priority == 1,2 */ 715 struct tx_servq vi_q; /* priority == 4,5 */ 716 struct tx_servq vo_q; /* priority == 6,7 */ 717 _list legacy_dz; 718 _list apsd; 719 720 u16 txseq_tid[16]; 721 722 /* uint sta_tx_bytes; */ 723 /* u64 sta_tx_pkts; */ 724 /* uint sta_tx_fail; */ 725 726 727 }; 728 729 730 struct hw_txqueue { 731 volatile sint head; 732 volatile sint tail; 733 volatile sint free_sz; /* in units of 64 bytes */ 734 volatile sint free_cmdsz; 735 volatile sint txsz[8]; 736 uint ff_hwaddr; 737 uint cmd_hwaddr; 738 sint ac_tag; 739 }; 740 741 struct agg_pkt_info { 742 u16 offset; 743 u16 pkt_len; 744 }; 745 746 enum cmdbuf_type { 747 CMDBUF_BEACON = 0x00, 748 CMDBUF_RSVD, 749 CMDBUF_MAX 750 }; 751 752 u8 rtw_get_hwseq_no(_adapter *padapter); 753 754 struct xmit_priv { 755 756 _lock lock; 757 758 _sema xmit_sema; 759 760 /* _queue blk_strms[MAX_NUMBLKS]; */ 761 _queue be_pending; 762 _queue bk_pending; 763 _queue vi_pending; 764 _queue vo_pending; 765 _queue bm_pending; 766 767 /* _queue legacy_dz_queue; */ 768 /* _queue apsd_queue; */ 769 770 u8 *pallocated_frame_buf; 771 u8 *pxmit_frame_buf; 772 uint free_xmitframe_cnt; 773 _queue free_xmit_queue; 774 775 /* uint mapping_addr; */ 776 /* uint pkt_sz; */ 777 778 u8 *xframe_ext_alloc_addr; 779 u8 *xframe_ext; 780 uint free_xframe_ext_cnt; 781 _queue free_xframe_ext_queue; 782 783 /* struct hw_txqueue be_txqueue; */ 784 /* struct hw_txqueue bk_txqueue; */ 785 /* struct hw_txqueue vi_txqueue; */ 786 /* struct hw_txqueue vo_txqueue; */ 787 /* struct hw_txqueue bmc_txqueue; */ 788 789 uint frag_len; 790 791 _adapter *adapter; 792 793 u8 vcs_setting; 794 u8 vcs; 795 u8 vcs_type; 796 /* u16 rts_thresh; */ 797 798 u64 tx_bytes; 799 u64 tx_pkts; 800 u64 tx_drop; 801 u64 last_tx_pkts; 802 803 struct hw_xmit *hwxmits; 804 u8 hwxmit_entry; 805 806 u8 wmm_para_seq[4];/* sequence for wmm ac parameter strength from large to small. it's value is 0->vo, 1->vi, 2->be, 3->bk. */ 807 808 #ifdef CONFIG_USB_HCI 809 _sema tx_retevt;/* all tx return event; */ 810 u8 txirp_cnt; 811 812 _tasklet xmit_tasklet; 813 814 /* per AC pending irp */ 815 int beq_cnt; 816 int bkq_cnt; 817 int viq_cnt; 818 int voq_cnt; 819 820 #endif 821 822 #ifdef CONFIG_PCI_HCI 823 /* Tx */ 824 struct rtw_tx_ring tx_ring[PCI_MAX_TX_QUEUE_COUNT]; 825 int txringcount[PCI_MAX_TX_QUEUE_COUNT]; 826 u8 beaconDMAing; /* flag of indicating beacon is transmiting to HW by DMA */ 827 _tasklet xmit_tasklet; 828 #endif 829 830 #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) 831 #ifdef CONFIG_SDIO_TX_TASKLET 832 _tasklet xmit_tasklet; 833 #else 834 _thread_hdl_ SdioXmitThread; 835 _sema SdioXmitSema; 836 #ifdef SDIO_FREE_XMIT_BUF_SEMA 837 _sema sdio_free_xmitbuf_sema; 838 #endif 839 #endif /* CONFIG_SDIO_TX_TASKLET */ 840 #endif /* CONFIG_SDIO_HCI */ 841 842 _queue free_xmitbuf_queue; 843 _queue pending_xmitbuf_queue; 844 u8 *pallocated_xmitbuf; 845 u8 *pxmitbuf; 846 uint free_xmitbuf_cnt; 847 848 _queue free_xmit_extbuf_queue; 849 u8 *pallocated_xmit_extbuf; 850 u8 *pxmit_extbuf; 851 uint free_xmit_extbuf_cnt; 852 853 struct xmit_buf pcmd_xmitbuf[CMDBUF_MAX]; 854 u8 hw_ssn_seq_no;/* mapping to REG_HW_SEQ 0,1,2,3 */ 855 u16 nqos_ssn; 856 #ifdef CONFIG_TX_EARLY_MODE 857 858 #ifdef CONFIG_SDIO_HCI 859 #define MAX_AGG_PKT_NUM 20 860 #else 861 #define MAX_AGG_PKT_NUM 256 /* Max tx ampdu coounts */ 862 #endif 863 864 struct agg_pkt_info agg_pkt[MAX_AGG_PKT_NUM]; 865 #endif 866 867 #ifdef CONFIG_XMIT_ACK 868 int ack_tx; 869 _mutex ack_tx_mutex; 870 struct submit_ctx ack_tx_ops; 871 u8 seq_no; 872 #ifdef CONFIG_REMOVE_DUP_TX_STATE 873 u8 retry_count; 874 #endif 875 #endif 876 877 #ifdef CONFIG_TX_AMSDU 878 _timer amsdu_vo_timer; 879 u8 amsdu_vo_timeout; 880 881 _timer amsdu_vi_timer; 882 u8 amsdu_vi_timeout; 883 884 _timer amsdu_be_timer; 885 u8 amsdu_be_timeout; 886 887 _timer amsdu_bk_timer; 888 u8 amsdu_bk_timeout; 889 890 u32 amsdu_debug_set_timer; 891 u32 amsdu_debug_timeout; 892 u32 amsdu_debug_coalesce_one; 893 u32 amsdu_debug_coalesce_two; 894 895 #endif 896 #ifdef DBG_TXBD_DESC_DUMP 897 BOOLEAN dump_txbd_desc; 898 #endif 899 #ifdef CONFIG_PCI_TX_POLLING 900 _timer tx_poll_timer; 901 #endif 902 _lock lock_sctx; 903 904 }; 905 906 extern struct xmit_frame *__rtw_alloc_cmdxmitframe(struct xmit_priv *pxmitpriv, 907 enum cmdbuf_type buf_type); 908 #define rtw_alloc_cmdxmitframe(p) __rtw_alloc_cmdxmitframe(p, CMDBUF_RSVD) 909 #if defined(CONFIG_RTL8192E) && defined(CONFIG_PCI_HCI) 910 extern struct xmit_frame *__rtw_alloc_cmdxmitframe_8192ee(struct xmit_priv *pxmitpriv, 911 enum cmdbuf_type buf_type); 912 #define rtw_alloc_bcnxmitframe(p) __rtw_alloc_cmdxmitframe_8192ee(p, CMDBUF_BEACON) 913 #elif defined(CONFIG_RTL8822B) && defined(CONFIG_PCI_HCI) 914 extern struct xmit_frame *__rtw_alloc_cmdxmitframe_8822be(struct xmit_priv *pxmitpriv, 915 enum cmdbuf_type buf_type); 916 #define rtw_alloc_bcnxmitframe(p) __rtw_alloc_cmdxmitframe_8822be(p, CMDBUF_BEACON) 917 #elif defined(CONFIG_RTL8822C) && defined(CONFIG_PCI_HCI) 918 extern struct xmit_frame *__rtw_alloc_cmdxmitframe_8822ce(struct xmit_priv *pxmitpriv, 919 enum cmdbuf_type buf_type); 920 #define rtw_alloc_bcnxmitframe(p) __rtw_alloc_cmdxmitframe_8822ce(p, CMDBUF_BEACON) 921 #elif defined(CONFIG_RTL8821C) && defined(CONFIG_PCI_HCI) 922 extern struct xmit_frame *__rtw_alloc_cmdxmitframe_8821ce(struct xmit_priv *pxmitpriv, 923 enum cmdbuf_type buf_type); 924 #define rtw_alloc_bcnxmitframe(p) __rtw_alloc_cmdxmitframe_8821ce(p, CMDBUF_BEACON) 925 #elif defined(CONFIG_RTL8192F) && defined(CONFIG_PCI_HCI) 926 extern struct xmit_frame *__rtw_alloc_cmdxmitframe_8192fe(struct xmit_priv *pxmitpriv, 927 enum cmdbuf_type buf_type); 928 #define rtw_alloc_bcnxmitframe(p) __rtw_alloc_cmdxmitframe_8192fe(p, CMDBUF_BEACON) 929 #elif defined(CONFIG_RTL8812A) && defined(CONFIG_PCI_HCI) 930 extern struct xmit_frame *__rtw_alloc_cmdxmitframe_8812ae(struct xmit_priv *pxmitpriv, 931 enum cmdbuf_type buf_type); 932 #define rtw_alloc_bcnxmitframe(p) __rtw_alloc_cmdxmitframe_8812ae(p, CMDBUF_BEACON) 933 #elif defined(CONFIG_RTL8723D) && defined(CONFIG_PCI_HCI) 934 extern struct xmit_frame *__rtw_alloc_cmdxmitframe_8723de(struct xmit_priv *pxmitpriv, 935 enum cmdbuf_type buf_type); 936 #define rtw_alloc_bcnxmitframe(p) __rtw_alloc_cmdxmitframe_8723de(p, CMDBUF_BEACON) 937 #elif defined(CONFIG_RTL8723B) && defined(CONFIG_PCI_HCI) 938 extern struct xmit_frame *__rtw_alloc_cmdxmitframe_8723be(struct xmit_priv *pxmitpriv, 939 enum cmdbuf_type buf_type); 940 #define rtw_alloc_bcnxmitframe(p) __rtw_alloc_cmdxmitframe_8723be(p, CMDBUF_BEACON) 941 #elif defined(CONFIG_RTL8814A) && defined(CONFIG_PCI_HCI) 942 extern struct xmit_frame *__rtw_alloc_cmdxmitframe_8814ae(struct xmit_priv *pxmitpriv, 943 enum cmdbuf_type buf_type); 944 #define rtw_alloc_bcnxmitframe(p) __rtw_alloc_cmdxmitframe_8814ae(p, CMDBUF_BEACON) 945 #elif defined(CONFIG_RTL8814B) && defined(CONFIG_PCI_HCI) 946 extern struct xmit_frame *__rtw_alloc_cmdxmitframe_8814be(struct xmit_priv *pxmitpriv, 947 enum cmdbuf_type buf_type); 948 #define rtw_alloc_bcnxmitframe(p) __rtw_alloc_cmdxmitframe_8814be(p, CMDBUF_BEACON) 949 #else 950 #define rtw_alloc_bcnxmitframe(p) __rtw_alloc_cmdxmitframe(p, CMDBUF_BEACON) 951 #endif 952 953 extern struct xmit_buf *rtw_alloc_xmitbuf_ext(struct xmit_priv *pxmitpriv); 954 extern s32 rtw_free_xmitbuf_ext(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); 955 956 extern struct xmit_buf *rtw_alloc_xmitbuf(struct xmit_priv *pxmitpriv); 957 extern s32 rtw_free_xmitbuf(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); 958 959 void rtw_count_tx_stats(_adapter *padapter, struct xmit_frame *pxmitframe, int sz); 960 extern void rtw_update_protection(_adapter *padapter, u8 *ie, uint ie_len); 961 962 extern s32 rtw_make_wlanhdr(_adapter *padapter, u8 *hdr, struct pkt_attrib *pattrib); 963 extern s32 rtw_put_snap(u8 *data, u16 h_proto); 964 965 extern struct xmit_frame *rtw_alloc_xmitframe(struct xmit_priv *pxmitpriv, u16 os_qid); 966 struct xmit_frame *rtw_alloc_xmitframe_ext(struct xmit_priv *pxmitpriv); 967 struct xmit_frame *rtw_alloc_xmitframe_once(struct xmit_priv *pxmitpriv); 968 extern s32 rtw_free_xmitframe(struct xmit_priv *pxmitpriv, struct xmit_frame *pxmitframe); 969 extern void rtw_free_xmitframe_queue(struct xmit_priv *pxmitpriv, _queue *pframequeue); 970 struct tx_servq *rtw_get_sta_pending(_adapter *padapter, struct sta_info *psta, sint up, u8 *ac); 971 extern s32 rtw_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); 972 extern struct xmit_frame *rtw_dequeue_xframe(struct xmit_priv *pxmitpriv, struct hw_xmit *phwxmit_i, sint entry); 973 974 extern s32 rtw_xmit_classifier(_adapter *padapter, struct xmit_frame *pxmitframe); 975 extern u32 rtw_calculate_wlan_pkt_size_by_attribue(struct pkt_attrib *pattrib); 976 #define rtw_wlan_pkt_size(f) rtw_calculate_wlan_pkt_size_by_attribue(&f->attrib) 977 extern s32 rtw_xmitframe_coalesce(_adapter *padapter, _pkt *pkt, struct xmit_frame *pxmitframe); 978 #if defined(CONFIG_IEEE80211W) || defined(CONFIG_RTW_MESH) 979 extern s32 rtw_mgmt_xmitframe_coalesce(_adapter *padapter, _pkt *pkt, struct xmit_frame *pxmitframe); 980 #endif 981 #ifdef CONFIG_TDLS 982 extern struct tdls_txmgmt *ptxmgmt; 983 s32 rtw_xmit_tdls_coalesce(_adapter *padapter, struct xmit_frame *pxmitframe, struct tdls_txmgmt *ptxmgmt); 984 s32 update_tdls_attrib(_adapter *padapter, struct pkt_attrib *pattrib); 985 #endif 986 s32 _rtw_init_hw_txqueue(struct hw_txqueue *phw_txqueue, u8 ac_tag); 987 void _rtw_init_sta_xmit_priv(struct sta_xmit_priv *psta_xmitpriv); 988 989 990 s32 rtw_txframes_pending(_adapter *padapter); 991 s32 rtw_txframes_sta_ac_pending(_adapter *padapter, struct pkt_attrib *pattrib); 992 void rtw_init_hwxmits(struct hw_xmit *phwxmit, sint entry); 993 994 995 s32 _rtw_init_xmit_priv(struct xmit_priv *pxmitpriv, _adapter *padapter); 996 void _rtw_free_xmit_priv(struct xmit_priv *pxmitpriv); 997 998 999 void rtw_alloc_hwxmits(_adapter *padapter); 1000 void rtw_free_hwxmits(_adapter *padapter); 1001 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 24)) 1002 s32 rtw_monitor_xmit_entry(struct sk_buff *skb, struct net_device *ndev); 1003 #endif 1004 void rtw_xmit_dequeue_callback(_workitem *work); 1005 void rtw_xmit_queue_set(struct sta_info *sta); 1006 void rtw_xmit_queue_clear(struct sta_info *sta); 1007 s32 rtw_xmit_posthandle(_adapter *padapter, struct xmit_frame *pxmitframe, _pkt *pkt); 1008 s32 rtw_xmit(_adapter *padapter, _pkt **pkt, u16 os_qid); 1009 bool xmitframe_hiq_filter(struct xmit_frame *xmitframe); 1010 #if defined(CONFIG_AP_MODE) || defined(CONFIG_TDLS) 1011 sint xmitframe_enqueue_for_sleeping_sta(_adapter *padapter, struct xmit_frame *pxmitframe); 1012 void stop_sta_xmit(_adapter *padapter, struct sta_info *psta); 1013 void wakeup_sta_to_xmit(_adapter *padapter, struct sta_info *psta); 1014 void xmit_delivery_enabled_frames(_adapter *padapter, struct sta_info *psta); 1015 #endif 1016 1017 u8 rtw_get_tx_bw_mode(_adapter *adapter, struct sta_info *sta); 1018 1019 void rtw_update_tx_rate_bmp(struct dvobj_priv *dvobj); 1020 u8 rtw_get_tx_bw_bmp_of_ht_rate(struct dvobj_priv *dvobj, u8 rate, u8 max_bw); 1021 u8 rtw_get_tx_bw_bmp_of_vht_rate(struct dvobj_priv *dvobj, u8 rate, u8 max_bw); 1022 s16 rtw_adapter_get_oper_txpwr_max_mbm(_adapter *adapter); 1023 s16 rtw_get_oper_txpwr_max_mbm(struct dvobj_priv *dvobj); 1024 1025 u8 query_ra_short_GI(struct sta_info *psta, u8 bw); 1026 1027 u8 qos_acm(u8 acm_mask, u8 priority); 1028 1029 #ifdef CONFIG_XMIT_THREAD_MODE 1030 void enqueue_pending_xmitbuf(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); 1031 void enqueue_pending_xmitbuf_to_head(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); 1032 struct xmit_buf *dequeue_pending_xmitbuf(struct xmit_priv *pxmitpriv); 1033 struct xmit_buf *select_and_dequeue_pending_xmitbuf(_adapter *padapter); 1034 sint check_pending_xmitbuf(struct xmit_priv *pxmitpriv); 1035 thread_return rtw_xmit_thread(thread_context context); 1036 #endif 1037 1038 #ifdef CONFIG_TX_AMSDU 1039 extern void rtw_amsdu_vo_timeout_handler(void *FunctionContext); 1040 extern void rtw_amsdu_vi_timeout_handler(void *FunctionContext); 1041 extern void rtw_amsdu_be_timeout_handler(void *FunctionContext); 1042 extern void rtw_amsdu_bk_timeout_handler(void *FunctionContext); 1043 1044 extern u8 rtw_amsdu_get_timer_status(_adapter *padapter, u8 priority); 1045 extern void rtw_amsdu_set_timer_status(_adapter *padapter, u8 priority, u8 status); 1046 extern void rtw_amsdu_set_timer(_adapter *padapter, u8 priority); 1047 extern void rtw_amsdu_cancel_timer(_adapter *padapter, u8 priority); 1048 1049 extern s32 rtw_xmitframe_coalesce_amsdu(_adapter *padapter, struct xmit_frame *pxmitframe, struct xmit_frame *pxmitframe_queue); 1050 extern s32 check_amsdu(struct xmit_frame *pxmitframe); 1051 extern s32 check_amsdu_tx_support(_adapter *padapter); 1052 extern struct xmit_frame *rtw_get_xframe(struct xmit_priv *pxmitpriv, int *num_frame); 1053 #endif 1054 1055 #ifdef DBG_TXBD_DESC_DUMP 1056 void rtw_tx_desc_backup(_adapter *padapter, struct xmit_frame *pxmitframe, u8 desc_size, u8 hwq); 1057 void rtw_tx_desc_backup_reset(void); 1058 u8 rtw_get_tx_desc_backup(_adapter *padapter, u8 hwq, struct rtw_tx_desc_backup **pbak); 1059 #endif 1060 1061 #ifdef CONFIG_PCI_TX_POLLING 1062 void rtw_tx_poll_init(_adapter *padapter); 1063 void rtw_tx_poll_timeout_handler(void *FunctionContext); 1064 void rtw_tx_poll_timer_set(_adapter *padapter, u32 delay); 1065 void rtw_tx_poll_timer_cancel(_adapter *padapter); 1066 #endif 1067 1068 u32 rtw_get_ff_hwaddr(struct xmit_frame *pxmitframe); 1069 1070 #ifdef CONFIG_XMIT_ACK 1071 int rtw_ack_tx_wait(struct xmit_priv *pxmitpriv, u32 timeout_ms); 1072 void rtw_ack_tx_done(struct xmit_priv *pxmitpriv, int status); 1073 #endif /* CONFIG_XMIT_ACK */ 1074 1075 enum XMIT_BLOCK_REASON { 1076 XMIT_BLOCK_NONE = 0, 1077 XMIT_BLOCK_REDLMEM = BIT0, /*LPS-PG*/ 1078 XMIT_BLOCK_SUSPEND = BIT1, /*WOW*/ 1079 XMIT_BLOCK_MAX = 0xFF, 1080 }; 1081 void rtw_init_xmit_block(_adapter *padapter); 1082 void rtw_deinit_xmit_block(_adapter *padapter); 1083 1084 #ifdef DBG_XMIT_BLOCK 1085 void dump_xmit_block(void *sel, _adapter *padapter); 1086 #endif 1087 void rtw_set_xmit_block(_adapter *padapter, enum XMIT_BLOCK_REASON reason); 1088 void rtw_clr_xmit_block(_adapter *padapter, enum XMIT_BLOCK_REASON reason); 1089 bool rtw_is_xmit_blocked(_adapter *padapter); 1090 1091 /* include after declaring struct xmit_buf, in order to avoid warning */ 1092 #include <xmit_osdep.h> 1093 1094 #endif /* _RTL871X_XMIT_H_ */ 1095