1*4882a593Smuzhiyun /****************************************************************************** 2*4882a593Smuzhiyun * 3*4882a593Smuzhiyun * Copyright(c) 2007 - 2017 Realtek Corporation. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify it 6*4882a593Smuzhiyun * under the terms of version 2 of the GNU General Public License as 7*4882a593Smuzhiyun * published by the Free Software Foundation. 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * This program is distributed in the hope that it will be useful, but WITHOUT 10*4882a593Smuzhiyun * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11*4882a593Smuzhiyun * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12*4882a593Smuzhiyun * more details. 13*4882a593Smuzhiyun * 14*4882a593Smuzhiyun *****************************************************************************/ 15*4882a593Smuzhiyun #ifndef _RTW_VHT_H_ 16*4882a593Smuzhiyun #define _RTW_VHT_H_ 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun #define VHT_CAP_IE_LEN 12 19*4882a593Smuzhiyun #define VHT_OP_IE_LEN 5 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun #define LDPC_VHT_ENABLE_RX BIT0 22*4882a593Smuzhiyun #define LDPC_VHT_ENABLE_TX BIT1 23*4882a593Smuzhiyun #define LDPC_VHT_TEST_TX_ENABLE BIT2 24*4882a593Smuzhiyun #define LDPC_VHT_CAP_TX BIT3 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun #define STBC_VHT_ENABLE_RX BIT0 27*4882a593Smuzhiyun #define STBC_VHT_ENABLE_TX BIT1 28*4882a593Smuzhiyun #define STBC_VHT_TEST_TX_ENABLE BIT2 29*4882a593Smuzhiyun #define STBC_VHT_CAP_TX BIT3 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun /* VHT capability info */ 32*4882a593Smuzhiyun #define SET_VHT_CAPABILITY_ELE_MAX_MPDU_LENGTH(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart, 0, 2, _val) 33*4882a593Smuzhiyun #define SET_VHT_CAPABILITY_ELE_CHL_WIDTH(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart, 2, 2, _val) 34*4882a593Smuzhiyun #define SET_VHT_CAPABILITY_ELE_RX_LDPC(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart, 4, 1, _val) 35*4882a593Smuzhiyun #define SET_VHT_CAPABILITY_ELE_SHORT_GI80M(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart, 5, 1, _val) 36*4882a593Smuzhiyun #define SET_VHT_CAPABILITY_ELE_SHORT_GI160M(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart, 6, 1, _val) 37*4882a593Smuzhiyun #define SET_VHT_CAPABILITY_ELE_TX_STBC(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart, 7, 1, _val) 38*4882a593Smuzhiyun #define SET_VHT_CAPABILITY_ELE_RX_STBC(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+1, 0, 3, _val) 39*4882a593Smuzhiyun #define SET_VHT_CAPABILITY_ELE_SU_BFER(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+1, 3, 1, _val) 40*4882a593Smuzhiyun #define SET_VHT_CAPABILITY_ELE_SU_BFEE(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+1, 4, 1, _val) 41*4882a593Smuzhiyun #define SET_VHT_CAPABILITY_ELE_BFER_ANT_SUPP(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+1, 5, 3, _val) 42*4882a593Smuzhiyun #define SET_VHT_CAPABILITY_ELE_SOUNDING_DIMENSIONS(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+2, 0, 3, _val) 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun #define SET_VHT_CAPABILITY_ELE_MU_BFER(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+2, 3, 1, _val) 45*4882a593Smuzhiyun #define SET_VHT_CAPABILITY_ELE_MU_BFEE(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+2, 4, 1, _val) 46*4882a593Smuzhiyun #define SET_VHT_CAPABILITY_ELE_TXOP_PS(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+2, 5, 1, _val) 47*4882a593Smuzhiyun #define SET_VHT_CAPABILITY_ELE_HTC_VHT(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+2, 6, 1, _val) 48*4882a593Smuzhiyun #define SET_VHT_CAPABILITY_ELE_MAX_RXAMPDU_FACTOR(_pEleStart, _val) SET_BITS_TO_LE_2BYTE((_pEleStart)+2, 7, 3, _val) /* B23~B25 */ 49*4882a593Smuzhiyun #define SET_VHT_CAPABILITY_ELE_LINK_ADAPTION(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+2, 2, 2, _val) 50*4882a593Smuzhiyun #define SET_VHT_CAPABILITY_ELE_MCS_RX_MAP(_pEleStart, _val) SET_BITS_TO_LE_2BYTE((_pEleStart)+4, 0, 16, _val) /* B0~B15 indicate Rx MCS MAP, we write 0 to indicate MCS0~7. by page */ 51*4882a593Smuzhiyun #define SET_VHT_CAPABILITY_ELE_MCS_RX_HIGHEST_RATE(_pEleStart, _val) SET_BITS_TO_LE_2BYTE((_pEleStart)+6, 0, 13, _val) 52*4882a593Smuzhiyun #define SET_VHT_CAPABILITY_ELE_MCS_TX_MAP(_pEleStart, _val) SET_BITS_TO_LE_2BYTE((_pEleStart)+8, 0, 16, _val) /* B0~B15 indicate Tx MCS MAP, we write 0 to indicate MCS0~7. by page */ 53*4882a593Smuzhiyun #define SET_VHT_CAPABILITY_ELE_MCS_TX_HIGHEST_RATE(_pEleStart, _val) SET_BITS_TO_LE_2BYTE((_pEleStart)+10, 0, 13, _val) 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun #define GET_VHT_CAPABILITY_ELE_MAX_MPDU_LENGTH(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 0, 2) 57*4882a593Smuzhiyun #define GET_VHT_CAPABILITY_ELE_CHL_WIDTH(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 2, 2) 58*4882a593Smuzhiyun #define GET_VHT_CAPABILITY_ELE_RX_LDPC(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 4, 1) 59*4882a593Smuzhiyun #define GET_VHT_CAPABILITY_ELE_SHORT_GI80M(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 5, 1) 60*4882a593Smuzhiyun #define GET_VHT_CAPABILITY_ELE_SHORT_GI160M(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 6, 1) 61*4882a593Smuzhiyun #define GET_VHT_CAPABILITY_ELE_TX_STBC(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 7, 1) 62*4882a593Smuzhiyun #define GET_VHT_CAPABILITY_ELE_RX_STBC(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart)+1, 0, 3) 63*4882a593Smuzhiyun #define GET_VHT_CAPABILITY_ELE_SU_BFER(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart)+1, 3, 1) 64*4882a593Smuzhiyun #define GET_VHT_CAPABILITY_ELE_SU_BFEE(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart)+1, 4, 1) 65*4882a593Smuzhiyun /*phydm-beamforming*/ 66*4882a593Smuzhiyun #define GET_VHT_CAPABILITY_ELE_SU_BFEE_STS_CAP(_pEleStart) LE_BITS_TO_2BYTE((_pEleStart)+1, 5, 3) 67*4882a593Smuzhiyun #define GET_VHT_CAPABILITY_ELE_SU_BFER_SOUND_DIM_NUM(_pEleStart) LE_BITS_TO_2BYTE((_pEleStart)+2, 0, 3) 68*4882a593Smuzhiyun #define GET_VHT_CAPABILITY_ELE_MU_BFER(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart)+2, 3, 1) 69*4882a593Smuzhiyun #define GET_VHT_CAPABILITY_ELE_MU_BFEE(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart)+2, 4, 1) 70*4882a593Smuzhiyun #define GET_VHT_CAPABILITY_ELE_TXOP_PS(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart)+2, 5, 1) 71*4882a593Smuzhiyun #define GET_VHT_CAPABILITY_ELE_MAX_RXAMPDU_FACTOR(_pEleStart) LE_BITS_TO_2BYTE((_pEleStart)+2, 7, 3) 72*4882a593Smuzhiyun #define GET_VHT_CAPABILITY_ELE_RX_MCS(_pEleStart) ((_pEleStart)+4) 73*4882a593Smuzhiyun #define GET_VHT_CAPABILITY_ELE_MCS_RX_HIGHEST_RATE(_pEleStart) LE_BITS_TO_2BYTE((_pEleStart)+6, 0, 13) 74*4882a593Smuzhiyun #define GET_VHT_CAPABILITY_ELE_TX_MCS(_pEleStart) ((_pEleStart)+8) 75*4882a593Smuzhiyun #define GET_VHT_CAPABILITY_ELE_MCS_TX_HIGHEST_RATE(_pEleStart) LE_BITS_TO_2BYTE((_pEleStart)+10, 0, 13) 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun /* VHT Operation Information Element */ 79*4882a593Smuzhiyun #define SET_VHT_OPERATION_ELE_CHL_WIDTH(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart, 0, 8, _val) 80*4882a593Smuzhiyun #define SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ1(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart+1, 0, 8, _val) 81*4882a593Smuzhiyun #define SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ2(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart+2, 0, 8, _val) 82*4882a593Smuzhiyun #define SET_VHT_OPERATION_ELE_BASIC_MCS_SET(_pEleStart, _val) SET_BITS_TO_LE_2BYTE((_pEleStart)+3, 0, 16, _val) 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun #define GET_VHT_OPERATION_ELE_CHL_WIDTH(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 0, 8) 85*4882a593Smuzhiyun #define GET_VHT_OPERATION_ELE_CENTER_FREQ1(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart)+1, 0, 8) 86*4882a593Smuzhiyun #define GET_VHT_OPERATION_ELE_CENTER_FREQ2(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart)+2, 0, 8) 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun /* VHT Operating Mode */ 89*4882a593Smuzhiyun #define SET_VHT_OPERATING_MODE_FIELD_CHNL_WIDTH(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart, 0, 2, _val) 90*4882a593Smuzhiyun #define SET_VHT_OPERATING_MODE_FIELD_RX_NSS(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart, 4, 3, _val) 91*4882a593Smuzhiyun #define SET_VHT_OPERATING_MODE_FIELD_RX_NSS_TYPE(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart, 7, 1, _val) 92*4882a593Smuzhiyun #define GET_VHT_OPERATING_MODE_FIELD_CHNL_WIDTH(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 0, 2) 93*4882a593Smuzhiyun #define GET_VHT_OPERATING_MODE_FIELD_RX_NSS(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 4, 3) 94*4882a593Smuzhiyun #define GET_VHT_OPERATING_MODE_FIELD_RX_NSS_TYPE(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 7, 1) 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun #define SET_EXT_CAPABILITY_ELE_OP_MODE_NOTIF(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+7, 6, 1, _val) 97*4882a593Smuzhiyun #define GET_EXT_CAPABILITY_ELE_OP_MODE_NOTIF(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart)+7, 6, 1) 98*4882a593Smuzhiyun 99*4882a593Smuzhiyun #define VHT_MAX_MPDU_LEN_MAX 3 100*4882a593Smuzhiyun extern const u16 _vht_max_mpdu_len[]; 101*4882a593Smuzhiyun #define vht_max_mpdu_len(val) (((val) >= VHT_MAX_MPDU_LEN_MAX) ? _vht_max_mpdu_len[VHT_MAX_MPDU_LEN_MAX] : _vht_max_mpdu_len[(val)]) 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun #define VHT_SUP_CH_WIDTH_SET_MAX 3 104*4882a593Smuzhiyun extern const u8 _vht_sup_ch_width_set_to_bw_cap[]; 105*4882a593Smuzhiyun #define vht_sup_ch_width_set_to_bw_cap(set) (((set) >= VHT_SUP_CH_WIDTH_SET_MAX) ? _vht_sup_ch_width_set_to_bw_cap[VHT_SUP_CH_WIDTH_SET_MAX] : _vht_sup_ch_width_set_to_bw_cap[(set)]) 106*4882a593Smuzhiyun #define VHT_MAX_AMPDU_LEN(f) ((1 << (13 + f)) - 1) 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun #ifdef CONFIG_RTW_DEBUG 109*4882a593Smuzhiyun extern const char *const _vht_sup_ch_width_set_str[]; 110*4882a593Smuzhiyun #define vht_sup_ch_width_set_str(set) (((set) >= VHT_SUP_CH_WIDTH_SET_MAX) ? _vht_sup_ch_width_set_str[VHT_SUP_CH_WIDTH_SET_MAX] : _vht_sup_ch_width_set_str[(set)]) 111*4882a593Smuzhiyun 112*4882a593Smuzhiyun void dump_vht_cap_ie(void *sel, const u8 *ie, u32 ie_len); 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun #define VHT_OP_CH_WIDTH_MAX 4 115*4882a593Smuzhiyun extern const char *const _vht_op_ch_width_str[]; 116*4882a593Smuzhiyun #define vht_op_ch_width_str(ch_width) (((ch_width) >= VHT_OP_CH_WIDTH_MAX) ? _vht_op_ch_width_str[VHT_OP_CH_WIDTH_MAX] : _vht_op_ch_width_str[(ch_width)]) 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun void dump_vht_op_ie(void *sel, const u8 *ie, u32 ie_len); 119*4882a593Smuzhiyun #endif 120*4882a593Smuzhiyun 121*4882a593Smuzhiyun struct vht_bf_cap { 122*4882a593Smuzhiyun u8 is_mu_bfer; 123*4882a593Smuzhiyun u8 su_sound_dim; 124*4882a593Smuzhiyun }; 125*4882a593Smuzhiyun 126*4882a593Smuzhiyun struct vht_priv { 127*4882a593Smuzhiyun u8 vht_option; 128*4882a593Smuzhiyun 129*4882a593Smuzhiyun u8 ldpc_cap; 130*4882a593Smuzhiyun u8 stbc_cap; 131*4882a593Smuzhiyun u16 beamform_cap; 132*4882a593Smuzhiyun struct vht_bf_cap ap_bf_cap; 133*4882a593Smuzhiyun 134*4882a593Smuzhiyun u8 sgi_80m;/* short GI */ 135*4882a593Smuzhiyun u8 ampdu_len; 136*4882a593Smuzhiyun 137*4882a593Smuzhiyun u8 vht_highest_rate; 138*4882a593Smuzhiyun u8 vht_mcs_map[2]; 139*4882a593Smuzhiyun 140*4882a593Smuzhiyun u8 op_present:1; /* vht_op is present */ 141*4882a593Smuzhiyun u8 notify_present:1; /* vht_op_mode_notify is present */ 142*4882a593Smuzhiyun 143*4882a593Smuzhiyun u8 vht_cap[32]; 144*4882a593Smuzhiyun u8 vht_op[VHT_OP_IE_LEN]; 145*4882a593Smuzhiyun u8 vht_op_mode_notify; 146*4882a593Smuzhiyun }; 147*4882a593Smuzhiyun 148*4882a593Smuzhiyun #ifdef ROKU_PRIVATE 149*4882a593Smuzhiyun struct vht_priv_infra_ap { 150*4882a593Smuzhiyun 151*4882a593Smuzhiyun /* Infra mode, only store for AP's info, not intersection of STA and AP*/ 152*4882a593Smuzhiyun u8 ldpc_cap_infra_ap; 153*4882a593Smuzhiyun u8 stbc_cap_infra_ap; 154*4882a593Smuzhiyun u16 beamform_cap_infra_ap; 155*4882a593Smuzhiyun u8 vht_mcs_map_infra_ap[2]; 156*4882a593Smuzhiyun u8 vht_mcs_map_tx_infra_ap[2]; 157*4882a593Smuzhiyun u8 channel_width_infra_ap; 158*4882a593Smuzhiyun u8 number_of_streams_infra_ap; 159*4882a593Smuzhiyun }; 160*4882a593Smuzhiyun #endif /* ROKU_PRIVATE */ 161*4882a593Smuzhiyun 162*4882a593Smuzhiyun u8 rtw_get_vht_highest_rate(u8 *pvht_mcs_map); 163*4882a593Smuzhiyun u16 rtw_vht_mcs_to_data_rate(u8 bw, u8 short_GI, u8 vht_mcs_rate); 164*4882a593Smuzhiyun u64 rtw_vht_mcs_map_to_bitmap(u8 *mcs_map, u8 nss); 165*4882a593Smuzhiyun void rtw_vht_use_default_setting(_adapter *padapter); 166*4882a593Smuzhiyun u32 rtw_build_vht_operation_ie(_adapter *padapter, u8 *pbuf, u8 channel); 167*4882a593Smuzhiyun u32 rtw_build_vht_op_mode_notify_ie(_adapter *padapter, u8 *pbuf, u8 bw); 168*4882a593Smuzhiyun u32 rtw_build_vht_cap_ie(_adapter *padapter, u8 *pbuf); 169*4882a593Smuzhiyun void update_sta_vht_info_apmode(_adapter *padapter, void *psta); 170*4882a593Smuzhiyun void update_hw_vht_param(_adapter *padapter); 171*4882a593Smuzhiyun void VHT_caps_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE); 172*4882a593Smuzhiyun #ifdef ROKU_PRIVATE 173*4882a593Smuzhiyun void VHT_caps_handler_infra_ap(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE); 174*4882a593Smuzhiyun #endif /* ROKU_PRIVATE */ 175*4882a593Smuzhiyun void VHT_operation_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE); 176*4882a593Smuzhiyun void rtw_process_vht_op_mode_notify(_adapter *padapter, u8 *pframe, void *sta); 177*4882a593Smuzhiyun u32 rtw_restructure_vht_ie(_adapter *padapter, u8 *in_ie, u8 *out_ie, uint in_len, uint *pout_len); 178*4882a593Smuzhiyun void VHTOnAssocRsp(_adapter *padapter); 179*4882a593Smuzhiyun u8 rtw_vht_mcsmap_to_nss(u8 *pvht_mcs_map); 180*4882a593Smuzhiyun void rtw_vht_nss_to_mcsmap(u8 nss, u8 *target_mcs_map, u8 *cur_mcs_map); 181*4882a593Smuzhiyun void rtw_vht_ies_attach(_adapter *padapter, WLAN_BSSID_EX *pcur_network); 182*4882a593Smuzhiyun void rtw_vht_ies_detach(_adapter *padapter, WLAN_BSSID_EX *pcur_network); 183*4882a593Smuzhiyun void rtw_check_for_vht20(_adapter *adapter, u8 *ies, int ies_len); 184*4882a593Smuzhiyun #endif /* _RTW_VHT_H_ */ 185