xref: /OK3568_Linux_fs/external/rkwifibt/drivers/rtl8188fu/include/rtw_rf.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /******************************************************************************
2*4882a593Smuzhiyun  *
3*4882a593Smuzhiyun  * Copyright(c) 2007 - 2017 Realtek Corporation.
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * This program is free software; you can redistribute it and/or modify it
6*4882a593Smuzhiyun  * under the terms of version 2 of the GNU General Public License as
7*4882a593Smuzhiyun  * published by the Free Software Foundation.
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  * This program is distributed in the hope that it will be useful, but WITHOUT
10*4882a593Smuzhiyun  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11*4882a593Smuzhiyun  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12*4882a593Smuzhiyun  * more details.
13*4882a593Smuzhiyun  *
14*4882a593Smuzhiyun  *****************************************************************************/
15*4882a593Smuzhiyun #ifndef	__RTW_RF_H_
16*4882a593Smuzhiyun #define __RTW_RF_H_
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun #define NumRates	(13)
19*4882a593Smuzhiyun #define	B_MODE_RATE_NUM	(4)
20*4882a593Smuzhiyun #define	G_MODE_RATE_NUM	(8)
21*4882a593Smuzhiyun #define	G_MODE_BASIC_RATE_NUM	(3)
22*4882a593Smuzhiyun /* slot time for 11g */
23*4882a593Smuzhiyun #define SHORT_SLOT_TIME					9
24*4882a593Smuzhiyun #define NON_SHORT_SLOT_TIME				20
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun #define CENTER_CH_2G_40M_NUM	9
27*4882a593Smuzhiyun #define CENTER_CH_2G_NUM		14
28*4882a593Smuzhiyun #define CENTER_CH_5G_20M_NUM	28	/* 20M center channels */
29*4882a593Smuzhiyun #define CENTER_CH_5G_40M_NUM	14	/* 40M center channels */
30*4882a593Smuzhiyun #define CENTER_CH_5G_80M_NUM	7	/* 80M center channels */
31*4882a593Smuzhiyun #define CENTER_CH_5G_160M_NUM	3	/* 160M center channels */
32*4882a593Smuzhiyun #define CENTER_CH_5G_ALL_NUM	(CENTER_CH_5G_20M_NUM + CENTER_CH_5G_40M_NUM + CENTER_CH_5G_80M_NUM)
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun #define	MAX_CHANNEL_NUM_2G	CENTER_CH_2G_NUM
35*4882a593Smuzhiyun #define	MAX_CHANNEL_NUM_5G	CENTER_CH_5G_20M_NUM
36*4882a593Smuzhiyun #define	MAX_CHANNEL_NUM		(MAX_CHANNEL_NUM_2G + MAX_CHANNEL_NUM_5G)
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun extern u8 center_ch_2g[CENTER_CH_2G_NUM];
39*4882a593Smuzhiyun extern u8 center_ch_2g_40m[CENTER_CH_2G_40M_NUM];
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun u8 center_chs_2g_num(u8 bw);
42*4882a593Smuzhiyun u8 center_chs_2g(u8 bw, u8 id);
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun extern u8 center_ch_5g_20m[CENTER_CH_5G_20M_NUM];
45*4882a593Smuzhiyun extern u8 center_ch_5g_40m[CENTER_CH_5G_40M_NUM];
46*4882a593Smuzhiyun extern u8 center_ch_5g_20m_40m[CENTER_CH_5G_20M_NUM + CENTER_CH_5G_40M_NUM];
47*4882a593Smuzhiyun extern u8 center_ch_5g_80m[CENTER_CH_5G_80M_NUM];
48*4882a593Smuzhiyun extern u8 center_ch_5g_all[CENTER_CH_5G_ALL_NUM];
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun u8 center_chs_5g_num(u8 bw);
51*4882a593Smuzhiyun u8 center_chs_5g(u8 bw, u8 id);
52*4882a593Smuzhiyun 
53*4882a593Smuzhiyun u8 rtw_get_scch_by_cch_offset(u8 cch, u8 bw, u8 offset);
54*4882a593Smuzhiyun u8 rtw_get_scch_by_cch_opch(u8 cch, u8 bw, u8 opch);
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun u8 rtw_get_op_chs_by_cch_bw(u8 cch, u8 bw, u8 **op_chs, u8 *op_ch_num);
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun u8 rtw_get_offset_by_chbw(u8 ch, u8 bw, u8 *r_offset);
59*4882a593Smuzhiyun u8 rtw_get_center_ch(u8 ch, u8 bw, u8 offset);
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun u8 rtw_get_ch_group(u8 ch, u8 *group, u8 *cck_group);
62*4882a593Smuzhiyun 
63*4882a593Smuzhiyun typedef enum _CAPABILITY {
64*4882a593Smuzhiyun 	cESS			= 0x0001,
65*4882a593Smuzhiyun 	cIBSS			= 0x0002,
66*4882a593Smuzhiyun 	cPollable		= 0x0004,
67*4882a593Smuzhiyun 	cPollReq			= 0x0008,
68*4882a593Smuzhiyun 	cPrivacy		= 0x0010,
69*4882a593Smuzhiyun 	cShortPreamble	= 0x0020,
70*4882a593Smuzhiyun 	cPBCC			= 0x0040,
71*4882a593Smuzhiyun 	cChannelAgility	= 0x0080,
72*4882a593Smuzhiyun 	cSpectrumMgnt	= 0x0100,
73*4882a593Smuzhiyun 	cQos			= 0x0200,	/* For HCCA, use with CF-Pollable and CF-PollReq */
74*4882a593Smuzhiyun 	cShortSlotTime	= 0x0400,
75*4882a593Smuzhiyun 	cAPSD			= 0x0800,
76*4882a593Smuzhiyun 	cRM				= 0x1000,	/* RRM (Radio Request Measurement) */
77*4882a593Smuzhiyun 	cDSSS_OFDM	= 0x2000,
78*4882a593Smuzhiyun 	cDelayedBA		= 0x4000,
79*4882a593Smuzhiyun 	cImmediateBA	= 0x8000,
80*4882a593Smuzhiyun } CAPABILITY, *PCAPABILITY;
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun enum	_REG_PREAMBLE_MODE {
83*4882a593Smuzhiyun 	PREAMBLE_LONG	= 1,
84*4882a593Smuzhiyun 	PREAMBLE_AUTO	= 2,
85*4882a593Smuzhiyun 	PREAMBLE_SHORT	= 3,
86*4882a593Smuzhiyun };
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun #define rf_path_char(path) (((path) >= RF_PATH_MAX) ? 'X' : 'A' + (path))
89*4882a593Smuzhiyun 
90*4882a593Smuzhiyun /* Bandwidth Offset */
91*4882a593Smuzhiyun #define HAL_PRIME_CHNL_OFFSET_DONT_CARE	0
92*4882a593Smuzhiyun #define HAL_PRIME_CHNL_OFFSET_LOWER	1
93*4882a593Smuzhiyun #define HAL_PRIME_CHNL_OFFSET_UPPER	2
94*4882a593Smuzhiyun 
95*4882a593Smuzhiyun typedef enum _BAND_TYPE {
96*4882a593Smuzhiyun 	BAND_ON_2_4G = 0,
97*4882a593Smuzhiyun 	BAND_ON_5G = 1,
98*4882a593Smuzhiyun 	BAND_MAX,
99*4882a593Smuzhiyun } BAND_TYPE, *PBAND_TYPE;
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun #ifdef CONFIG_NARROWBAND_SUPPORTING
102*4882a593Smuzhiyun enum nb_config {
103*4882a593Smuzhiyun 	RTW_NB_CONFIG_NONE		= 0,
104*4882a593Smuzhiyun 	RTW_NB_CONFIG_WIDTH_5	= 5,
105*4882a593Smuzhiyun 	RTW_NB_CONFIG_WIDTH_10	= 6,
106*4882a593Smuzhiyun };
107*4882a593Smuzhiyun #endif
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun extern const char *const _band_str[];
110*4882a593Smuzhiyun #define band_str(band) (((band) >= BAND_MAX) ? _band_str[BAND_MAX] : _band_str[(band)])
111*4882a593Smuzhiyun 
112*4882a593Smuzhiyun extern const u8 _band_to_band_cap[];
113*4882a593Smuzhiyun #define band_to_band_cap(band) (((band) >= BAND_MAX) ? _band_to_band_cap[BAND_MAX] : _band_to_band_cap[(band)])
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun extern const char *const _ch_width_str[];
117*4882a593Smuzhiyun #define ch_width_str(bw) (((bw) < CHANNEL_WIDTH_MAX) ? _ch_width_str[(bw)] : "CHANNEL_WIDTH_MAX")
118*4882a593Smuzhiyun 
119*4882a593Smuzhiyun extern const u8 _ch_width_to_bw_cap[];
120*4882a593Smuzhiyun #define ch_width_to_bw_cap(bw) (((bw) < CHANNEL_WIDTH_MAX) ? _ch_width_to_bw_cap[(bw)] : 0)
121*4882a593Smuzhiyun 
122*4882a593Smuzhiyun enum opc_bw {
123*4882a593Smuzhiyun 	OPC_BW20		= 0,
124*4882a593Smuzhiyun 	OPC_BW40PLUS	= 1,
125*4882a593Smuzhiyun 	OPC_BW40MINUS	= 2,
126*4882a593Smuzhiyun 	OPC_BW80		= 3,
127*4882a593Smuzhiyun 	OPC_BW160		= 4,
128*4882a593Smuzhiyun 	OPC_BW80P80		= 5,
129*4882a593Smuzhiyun 	OPC_BW_NUM,
130*4882a593Smuzhiyun };
131*4882a593Smuzhiyun 
132*4882a593Smuzhiyun extern const char *const _opc_bw_str[OPC_BW_NUM];
133*4882a593Smuzhiyun #define opc_bw_str(bw) (((bw) < OPC_BW_NUM) ? _opc_bw_str[(bw)] : "N/A")
134*4882a593Smuzhiyun 
135*4882a593Smuzhiyun extern const u8 _opc_bw_to_ch_width[OPC_BW_NUM];
136*4882a593Smuzhiyun #define opc_bw_to_ch_width(bw) (((bw) < OPC_BW_NUM) ? _opc_bw_to_ch_width[(bw)] : CHANNEL_WIDTH_MAX)
137*4882a593Smuzhiyun 
138*4882a593Smuzhiyun struct op_class_map {
139*4882a593Smuzhiyun 	u8 op_class;
140*4882a593Smuzhiyun 	BAND_TYPE band;
141*4882a593Smuzhiyun 	enum opc_bw bw;
142*4882a593Smuzhiyun 	u32 ch_bmp;
143*4882a593Smuzhiyun };
144*4882a593Smuzhiyun 
145*4882a593Smuzhiyun #define RTW_GLOBAL_OP_CLASS_NUM 19
146*4882a593Smuzhiyun 
147*4882a593Smuzhiyun void dump_global_op_class(void *sel);
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun u8 rtw_get_op_class_by_chbw(u8 ch, u8 bw, u8 offset);
150*4882a593Smuzhiyun u8 rtw_get_bw_offset_by_op_class_ch(u8 op_class, u8 ch, u8 *bw, u8 *offset);
151*4882a593Smuzhiyun 
152*4882a593Smuzhiyun struct _RT_CHANNEL_INFO;
153*4882a593Smuzhiyun u8 init_op_class_ch_bmp(_adapter *adapter, struct _RT_CHANNEL_INFO *chset, u32 op_class_ch_bmp[]);
154*4882a593Smuzhiyun struct rf_ctl_t;
155*4882a593Smuzhiyun void dump_cap_spt_op_class_ch(void *sel, struct rf_ctl_t *rfctl, bool negtive);
156*4882a593Smuzhiyun void dump_cur_spt_op_class_ch(void *sel, struct rf_ctl_t *rfctl, bool negtive);
157*4882a593Smuzhiyun 
158*4882a593Smuzhiyun /*
159*4882a593Smuzhiyun  * Represent Extention Channel Offset in HT Capabilities
160*4882a593Smuzhiyun  * This is available only in 40Mhz mode.
161*4882a593Smuzhiyun  *   */
162*4882a593Smuzhiyun typedef enum _EXTCHNL_OFFSET {
163*4882a593Smuzhiyun 	EXTCHNL_OFFSET_NO_EXT = 0,
164*4882a593Smuzhiyun 	EXTCHNL_OFFSET_UPPER = 1,
165*4882a593Smuzhiyun 	EXTCHNL_OFFSET_NO_DEF = 2,
166*4882a593Smuzhiyun 	EXTCHNL_OFFSET_LOWER = 3,
167*4882a593Smuzhiyun } EXTCHNL_OFFSET, *PEXTCHNL_OFFSET;
168*4882a593Smuzhiyun 
169*4882a593Smuzhiyun typedef enum _VHT_DATA_SC {
170*4882a593Smuzhiyun 	VHT_DATA_SC_DONOT_CARE = 0,
171*4882a593Smuzhiyun 	VHT_DATA_SC_20_UPPER_OF_80MHZ = 1,
172*4882a593Smuzhiyun 	VHT_DATA_SC_20_LOWER_OF_80MHZ = 2,
173*4882a593Smuzhiyun 	VHT_DATA_SC_20_UPPERST_OF_80MHZ = 3,
174*4882a593Smuzhiyun 	VHT_DATA_SC_20_LOWEST_OF_80MHZ = 4,
175*4882a593Smuzhiyun 	VHT_DATA_SC_20_RECV1 = 5,
176*4882a593Smuzhiyun 	VHT_DATA_SC_20_RECV2 = 6,
177*4882a593Smuzhiyun 	VHT_DATA_SC_20_RECV3 = 7,
178*4882a593Smuzhiyun 	VHT_DATA_SC_20_RECV4 = 8,
179*4882a593Smuzhiyun 	VHT_DATA_SC_40_UPPER_OF_80MHZ = 9,
180*4882a593Smuzhiyun 	VHT_DATA_SC_40_LOWER_OF_80MHZ = 10,
181*4882a593Smuzhiyun } VHT_DATA_SC, *PVHT_DATA_SC_E;
182*4882a593Smuzhiyun 
183*4882a593Smuzhiyun typedef enum _PROTECTION_MODE {
184*4882a593Smuzhiyun 	PROTECTION_MODE_AUTO = 0,
185*4882a593Smuzhiyun 	PROTECTION_MODE_FORCE_ENABLE = 1,
186*4882a593Smuzhiyun 	PROTECTION_MODE_FORCE_DISABLE = 2,
187*4882a593Smuzhiyun } PROTECTION_MODE, *PPROTECTION_MODE;
188*4882a593Smuzhiyun 
189*4882a593Smuzhiyun #define RF_TYPE_VALID(rf_type) (rf_type < RF_TYPE_MAX)
190*4882a593Smuzhiyun 
191*4882a593Smuzhiyun extern const u8 _rf_type_to_rf_tx_cnt[];
192*4882a593Smuzhiyun #define rf_type_to_rf_tx_cnt(rf_type) (RF_TYPE_VALID(rf_type) ? _rf_type_to_rf_tx_cnt[rf_type] : 0)
193*4882a593Smuzhiyun 
194*4882a593Smuzhiyun extern const u8 _rf_type_to_rf_rx_cnt[];
195*4882a593Smuzhiyun #define rf_type_to_rf_rx_cnt(rf_type) (RF_TYPE_VALID(rf_type) ? _rf_type_to_rf_rx_cnt[rf_type] : 0)
196*4882a593Smuzhiyun 
197*4882a593Smuzhiyun extern const char *const _rf_type_to_rfpath_str[];
198*4882a593Smuzhiyun #define rf_type_to_rfpath_str(rf_type) (RF_TYPE_VALID(rf_type) ? _rf_type_to_rfpath_str[rf_type] : "UNKNOWN")
199*4882a593Smuzhiyun 
200*4882a593Smuzhiyun void rf_type_to_default_trx_bmp(enum rf_type rf, enum bb_path *tx, enum bb_path *rx);
201*4882a593Smuzhiyun 
202*4882a593Smuzhiyun enum rf_type trx_num_to_rf_type(u8 tx_num, u8 rx_num);
203*4882a593Smuzhiyun enum rf_type trx_bmp_to_rf_type(u8 tx_bmp, u8 rx_bmp);
204*4882a593Smuzhiyun bool rf_type_is_a_in_b(enum rf_type a, enum rf_type b);
205*4882a593Smuzhiyun u8 rtw_restrict_trx_path_bmp_by_trx_num_lmt(u8 trx_path_bmp, u8 tx_num_lmt, u8 rx_num_lmt, u8 *tx_num, u8 *rx_num);
206*4882a593Smuzhiyun u8 rtw_restrict_trx_path_bmp_by_rftype(u8 trx_path_bmp, enum rf_type type, u8 *tx_num, u8 *rx_num);
207*4882a593Smuzhiyun void tx_path_nss_set_default(enum bb_path txpath_nss[], u8 txpath_num_nss[], u8 txpath);
208*4882a593Smuzhiyun void tx_path_nss_set_full_tx(enum bb_path txpath_nss[], u8 txpath_num_nss[], u8 txpath);
209*4882a593Smuzhiyun 
210*4882a593Smuzhiyun int rtw_ch2freq(int chan);
211*4882a593Smuzhiyun int rtw_freq2ch(int freq);
212*4882a593Smuzhiyun bool rtw_chbw_to_freq_range(u8 ch, u8 bw, u8 offset, u32 *hi, u32 *lo);
213*4882a593Smuzhiyun 
214*4882a593Smuzhiyun struct rf_ctl_t;
215*4882a593Smuzhiyun 
216*4882a593Smuzhiyun typedef enum _REGULATION_TXPWR_LMT {
217*4882a593Smuzhiyun 	TXPWR_LMT_NONE = 0, /* no limit */
218*4882a593Smuzhiyun 	TXPWR_LMT_FCC = 1,
219*4882a593Smuzhiyun 	TXPWR_LMT_MKK = 2,
220*4882a593Smuzhiyun 	TXPWR_LMT_ETSI = 3,
221*4882a593Smuzhiyun 	TXPWR_LMT_IC = 4,
222*4882a593Smuzhiyun 	TXPWR_LMT_KCC = 5,
223*4882a593Smuzhiyun 	TXPWR_LMT_ACMA = 6,
224*4882a593Smuzhiyun 	TXPWR_LMT_CHILE = 7,
225*4882a593Smuzhiyun 	TXPWR_LMT_UKRAINE = 8,
226*4882a593Smuzhiyun 	TXPWR_LMT_MEXICO = 9,
227*4882a593Smuzhiyun 	TXPWR_LMT_CN = 10,
228*4882a593Smuzhiyun 	TXPWR_LMT_WW, /* smallest of all available limit, keep last */
229*4882a593Smuzhiyun } REGULATION_TXPWR_LMT;
230*4882a593Smuzhiyun 
231*4882a593Smuzhiyun extern const char *const _regd_str[];
232*4882a593Smuzhiyun #define regd_str(regd) (((regd) > TXPWR_LMT_WW) ? _regd_str[TXPWR_LMT_WW] : _regd_str[(regd)])
233*4882a593Smuzhiyun 
234*4882a593Smuzhiyun void txpwr_idx_get_dbm_str(s8 idx, u8 txgi_max, u8 txgi_pdbm, SIZE_T cwidth, char dbm_str[], u8 dbm_str_len);
235*4882a593Smuzhiyun 
236*4882a593Smuzhiyun #define MBM_PDBM 100
237*4882a593Smuzhiyun #define UNSPECIFIED_MBM 32767 /* maximum of s16 */
238*4882a593Smuzhiyun 
239*4882a593Smuzhiyun void txpwr_mbm_get_dbm_str(s16 mbm, SIZE_T cwidth, char dbm_str[], u8 dbm_str_len);
240*4882a593Smuzhiyun s16 mb_of_ntx(u8 ntx);
241*4882a593Smuzhiyun 
242*4882a593Smuzhiyun #if CONFIG_TXPWR_LIMIT
243*4882a593Smuzhiyun struct regd_exc_ent {
244*4882a593Smuzhiyun 	_list list;
245*4882a593Smuzhiyun 	char country[2];
246*4882a593Smuzhiyun 	u8 domain;
247*4882a593Smuzhiyun 	char regd_name[0];
248*4882a593Smuzhiyun };
249*4882a593Smuzhiyun 
250*4882a593Smuzhiyun void dump_regd_exc_list(void *sel, struct rf_ctl_t *rfctl);
251*4882a593Smuzhiyun void rtw_regd_exc_add_with_nlen(struct rf_ctl_t *rfctl, const char *country, u8 domain, const char *regd_name, u32 nlen);
252*4882a593Smuzhiyun void rtw_regd_exc_add(struct rf_ctl_t *rfctl, const char *country, u8 domain, const char *regd_name);
253*4882a593Smuzhiyun struct regd_exc_ent *_rtw_regd_exc_search(struct rf_ctl_t *rfctl, const char *country, u8 domain);
254*4882a593Smuzhiyun struct regd_exc_ent *rtw_regd_exc_search(struct rf_ctl_t *rfctl, const char *country, u8 domain);
255*4882a593Smuzhiyun void rtw_regd_exc_list_free(struct rf_ctl_t *rfctl);
256*4882a593Smuzhiyun 
257*4882a593Smuzhiyun void dump_txpwr_lmt(void *sel, _adapter *adapter);
258*4882a593Smuzhiyun void rtw_txpwr_lmt_add_with_nlen(struct rf_ctl_t *rfctl, const char *regd_name, u32 nlen
259*4882a593Smuzhiyun 	, u8 band, u8 bw, u8 tlrs, u8 ntx_idx, u8 ch_idx, s8 lmt);
260*4882a593Smuzhiyun void rtw_txpwr_lmt_add(struct rf_ctl_t *rfctl, const char *regd_name
261*4882a593Smuzhiyun 	, u8 band, u8 bw, u8 tlrs, u8 ntx_idx, u8 ch_idx, s8 lmt);
262*4882a593Smuzhiyun struct txpwr_lmt_ent *_rtw_txpwr_lmt_get_by_name(struct rf_ctl_t *rfctl, const char *regd_name);
263*4882a593Smuzhiyun struct txpwr_lmt_ent *rtw_txpwr_lmt_get_by_name(struct rf_ctl_t *rfctl, const char *regd_name);
264*4882a593Smuzhiyun void rtw_txpwr_lmt_list_free(struct rf_ctl_t *rfctl);
265*4882a593Smuzhiyun #endif /* CONFIG_TXPWR_LIMIT */
266*4882a593Smuzhiyun 
267*4882a593Smuzhiyun #define BB_GAIN_2G 0
268*4882a593Smuzhiyun #if CONFIG_IEEE80211_BAND_5GHZ
269*4882a593Smuzhiyun #define BB_GAIN_5GLB1 1
270*4882a593Smuzhiyun #define BB_GAIN_5GLB2 2
271*4882a593Smuzhiyun #define BB_GAIN_5GMB1 3
272*4882a593Smuzhiyun #define BB_GAIN_5GMB2 4
273*4882a593Smuzhiyun #define BB_GAIN_5GHB 5
274*4882a593Smuzhiyun #endif
275*4882a593Smuzhiyun 
276*4882a593Smuzhiyun #if CONFIG_IEEE80211_BAND_5GHZ
277*4882a593Smuzhiyun #define BB_GAIN_NUM 6
278*4882a593Smuzhiyun #else
279*4882a593Smuzhiyun #define BB_GAIN_NUM 1
280*4882a593Smuzhiyun #endif
281*4882a593Smuzhiyun 
282*4882a593Smuzhiyun int rtw_ch_to_bb_gain_sel(int ch);
283*4882a593Smuzhiyun void rtw_rf_set_tx_gain_offset(_adapter *adapter, u8 path, s8 offset);
284*4882a593Smuzhiyun void rtw_rf_apply_tx_gain_offset(_adapter *adapter, u8 ch);
285*4882a593Smuzhiyun 
286*4882a593Smuzhiyun /* only check channel ranges */
287*4882a593Smuzhiyun #define rtw_is_2g_ch(ch) (ch >= 1 && ch <= 14)
288*4882a593Smuzhiyun #define rtw_is_5g_ch(ch) ((ch) >= 36 && (ch) <= 177)
289*4882a593Smuzhiyun #define rtw_is_same_band(a, b) \
290*4882a593Smuzhiyun 	((rtw_is_2g_ch(a) && rtw_is_2g_ch(b)) \
291*4882a593Smuzhiyun 	|| (rtw_is_5g_ch(a) && rtw_is_5g_ch(b)))
292*4882a593Smuzhiyun 
293*4882a593Smuzhiyun #define rtw_is_5g_band1(ch) ((ch) >= 36 && (ch) <= 48)
294*4882a593Smuzhiyun #define rtw_is_5g_band2(ch) ((ch) >= 52 && (ch) <= 64)
295*4882a593Smuzhiyun #define rtw_is_5g_band3(ch) ((ch) >= 100 && (ch) <= 144)
296*4882a593Smuzhiyun #define rtw_is_5g_band4(ch) ((ch) >= 149 && (ch) <= 177)
297*4882a593Smuzhiyun #define rtw_is_same_5g_band(a, b) \
298*4882a593Smuzhiyun 	((rtw_is_5g_band1(a) && rtw_is_5g_band1(b)) \
299*4882a593Smuzhiyun 	|| (rtw_is_5g_band2(a) && rtw_is_5g_band2(b)) \
300*4882a593Smuzhiyun 	|| (rtw_is_5g_band3(a) && rtw_is_5g_band3(b)) \
301*4882a593Smuzhiyun 	|| (rtw_is_5g_band4(a) && rtw_is_5g_band4(b)))
302*4882a593Smuzhiyun 
303*4882a593Smuzhiyun bool rtw_is_long_cac_range(u32 hi, u32 lo, u8 dfs_region);
304*4882a593Smuzhiyun bool rtw_is_long_cac_ch(u8 ch, u8 bw, u8 offset, u8 dfs_region);
305*4882a593Smuzhiyun 
306*4882a593Smuzhiyun #endif /* _RTL8711_RF_H_ */
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