xref: /OK3568_Linux_fs/external/rkwifibt/drivers/rtl8188fu/include/rtw_recv.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /******************************************************************************
2*4882a593Smuzhiyun  *
3*4882a593Smuzhiyun  * Copyright(c) 2007 - 2017 Realtek Corporation.
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * This program is free software; you can redistribute it and/or modify it
6*4882a593Smuzhiyun  * under the terms of version 2 of the GNU General Public License as
7*4882a593Smuzhiyun  * published by the Free Software Foundation.
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  * This program is distributed in the hope that it will be useful, but WITHOUT
10*4882a593Smuzhiyun  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11*4882a593Smuzhiyun  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12*4882a593Smuzhiyun  * more details.
13*4882a593Smuzhiyun  *
14*4882a593Smuzhiyun  *****************************************************************************/
15*4882a593Smuzhiyun #ifndef _RTW_RECV_H_
16*4882a593Smuzhiyun #define _RTW_RECV_H_
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun #define RTW_RX_MSDU_ACT_NONE		0
19*4882a593Smuzhiyun #define RTW_RX_MSDU_ACT_INDICATE	BIT0
20*4882a593Smuzhiyun #define RTW_RX_MSDU_ACT_FORWARD		BIT1
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun #ifdef CONFIG_SINGLE_RECV_BUF
23*4882a593Smuzhiyun 	#define NR_RECVBUFF (1)
24*4882a593Smuzhiyun #else
25*4882a593Smuzhiyun 	#if defined(CONFIG_GSPI_HCI)
26*4882a593Smuzhiyun 		#define NR_RECVBUFF (32)
27*4882a593Smuzhiyun 	#elif defined(CONFIG_SDIO_HCI)
28*4882a593Smuzhiyun 		#define NR_RECVBUFF (8)
29*4882a593Smuzhiyun 	#else
30*4882a593Smuzhiyun 		#define NR_RECVBUFF (8)
31*4882a593Smuzhiyun 	#endif
32*4882a593Smuzhiyun #endif /* CONFIG_SINGLE_RECV_BUF */
33*4882a593Smuzhiyun #ifdef CONFIG_PREALLOC_RX_SKB_BUFFER
34*4882a593Smuzhiyun 	#define NR_PREALLOC_RECV_SKB (rtw_rtkm_get_nr_recv_skb()>>1)
35*4882a593Smuzhiyun #else /*!CONFIG_PREALLOC_RX_SKB_BUFFER */
36*4882a593Smuzhiyun 	#define NR_PREALLOC_RECV_SKB 8
37*4882a593Smuzhiyun #endif /* CONFIG_PREALLOC_RX_SKB_BUFFER */
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun #ifdef CONFIG_RTW_NAPI
40*4882a593Smuzhiyun 	#define RTL_NAPI_WEIGHT (32)
41*4882a593Smuzhiyun #endif
42*4882a593Smuzhiyun 
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun #if defined(CONFIG_RTL8821C) && defined(CONFIG_SDIO_HCI) && defined(CONFIG_RECV_THREAD_MODE)
45*4882a593Smuzhiyun 	#ifdef NR_RECVBUFF
46*4882a593Smuzhiyun 	#undef NR_RECVBUFF
47*4882a593Smuzhiyun 	#define NR_RECVBUFF (32)
48*4882a593Smuzhiyun 	#endif
49*4882a593Smuzhiyun #endif
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun #define NR_RECVFRAME 256
52*4882a593Smuzhiyun 
53*4882a593Smuzhiyun #define RXFRAME_ALIGN	8
54*4882a593Smuzhiyun #define RXFRAME_ALIGN_SZ	(1<<RXFRAME_ALIGN)
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun #define DRVINFO_SZ	4 /* unit is 8bytes */
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun #define MAX_RXFRAME_CNT	512
59*4882a593Smuzhiyun #define MAX_RX_NUMBLKS		(32)
60*4882a593Smuzhiyun #define RECVFRAME_HDR_ALIGN 128
61*4882a593Smuzhiyun #define MAX_CONTINUAL_NORXPACKET_COUNT 4    /*  In MAX_CONTINUAL_NORXPACKET_COUNT*2 sec  , no rx traffict would issue DELBA*/
62*4882a593Smuzhiyun 
63*4882a593Smuzhiyun #define PHY_RSSI_SLID_WIN_MAX				100
64*4882a593Smuzhiyun #define PHY_LINKQUALITY_SLID_WIN_MAX		20
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun #define SNAP_SIZE sizeof(struct ieee80211_snap_hdr)
68*4882a593Smuzhiyun 
69*4882a593Smuzhiyun #define RX_MPDU_QUEUE				0
70*4882a593Smuzhiyun #define RX_CMD_QUEUE				1
71*4882a593Smuzhiyun #define RX_MAX_QUEUE				2
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun #define MAX_SUBFRAME_COUNT	64
74*4882a593Smuzhiyun /* Bridge-Tunnel header (for EtherTypes ETH_P_AARP and ETH_P_IPX) */
75*4882a593Smuzhiyun extern u8 rtw_bridge_tunnel_header[];
76*4882a593Smuzhiyun extern u8 rtw_rfc1042_header[];
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun enum addba_rsp_ack_state {
79*4882a593Smuzhiyun 	RTW_RECV_ACK_OR_TIMEOUT,
80*4882a593Smuzhiyun };
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun /* for Rx reordering buffer control */
83*4882a593Smuzhiyun struct recv_reorder_ctrl {
84*4882a593Smuzhiyun 	_adapter	*padapter;
85*4882a593Smuzhiyun 	u8 tid;
86*4882a593Smuzhiyun 	u8 enable;
87*4882a593Smuzhiyun 	u16 indicate_seq;/* =wstart_b, init_value=0xffff */
88*4882a593Smuzhiyun 	u16 wend_b;
89*4882a593Smuzhiyun 	u8 wsize_b;
90*4882a593Smuzhiyun 	u8 ampdu_size;
91*4882a593Smuzhiyun 	_queue pending_recvframe_queue;
92*4882a593Smuzhiyun 	_timer reordering_ctrl_timer;
93*4882a593Smuzhiyun 	u8 bReorderWaiting;
94*4882a593Smuzhiyun 	unsigned long rec_abba_rsp_ack;
95*4882a593Smuzhiyun };
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun struct	stainfo_rxcache	{
98*4882a593Smuzhiyun 	u16	tid_rxseq[16];
99*4882a593Smuzhiyun 	u8 iv[16][8];
100*4882a593Smuzhiyun 	u8 last_tid;
101*4882a593Smuzhiyun #if 0
102*4882a593Smuzhiyun 	unsigned short	tid0_rxseq;
103*4882a593Smuzhiyun 	unsigned short	tid1_rxseq;
104*4882a593Smuzhiyun 	unsigned short	tid2_rxseq;
105*4882a593Smuzhiyun 	unsigned short	tid3_rxseq;
106*4882a593Smuzhiyun 	unsigned short	tid4_rxseq;
107*4882a593Smuzhiyun 	unsigned short	tid5_rxseq;
108*4882a593Smuzhiyun 	unsigned short	tid6_rxseq;
109*4882a593Smuzhiyun 	unsigned short	tid7_rxseq;
110*4882a593Smuzhiyun 	unsigned short	tid8_rxseq;
111*4882a593Smuzhiyun 	unsigned short	tid9_rxseq;
112*4882a593Smuzhiyun 	unsigned short	tid10_rxseq;
113*4882a593Smuzhiyun 	unsigned short	tid11_rxseq;
114*4882a593Smuzhiyun 	unsigned short	tid12_rxseq;
115*4882a593Smuzhiyun 	unsigned short	tid13_rxseq;
116*4882a593Smuzhiyun 	unsigned short	tid14_rxseq;
117*4882a593Smuzhiyun 	unsigned short	tid15_rxseq;
118*4882a593Smuzhiyun #endif
119*4882a593Smuzhiyun };
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun 
122*4882a593Smuzhiyun struct smooth_rssi_data {
123*4882a593Smuzhiyun 	u32	elements[100];	/* array to store values */
124*4882a593Smuzhiyun 	u32	index;			/* index to current array to store */
125*4882a593Smuzhiyun 	u32	total_num;		/* num of valid elements */
126*4882a593Smuzhiyun 	u32	total_val;		/* sum of valid elements */
127*4882a593Smuzhiyun };
128*4882a593Smuzhiyun 
129*4882a593Smuzhiyun struct signal_stat {
130*4882a593Smuzhiyun 	u8	update_req;		/* used to indicate */
131*4882a593Smuzhiyun 	u8	avg_val;		/* avg of valid elements */
132*4882a593Smuzhiyun 	u32	total_num;		/* num of valid elements */
133*4882a593Smuzhiyun 	u32	total_val;		/* sum of valid elements	 */
134*4882a593Smuzhiyun };
135*4882a593Smuzhiyun 
136*4882a593Smuzhiyun struct rx_raw_rssi {
137*4882a593Smuzhiyun 	u8 data_rate;
138*4882a593Smuzhiyun 	u8 pwdball;
139*4882a593Smuzhiyun 	s8 pwr_all;
140*4882a593Smuzhiyun 
141*4882a593Smuzhiyun 	u8 mimo_signal_strength[4];/* in 0~100 index */
142*4882a593Smuzhiyun 	u8 mimo_signal_quality[4];
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun 	s8 ofdm_pwr[4];
145*4882a593Smuzhiyun 	u8 ofdm_snr[4];
146*4882a593Smuzhiyun };
147*4882a593Smuzhiyun 
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun #include "cmn_info/rtw_sta_info.h"
150*4882a593Smuzhiyun 
151*4882a593Smuzhiyun struct rx_pkt_attrib	{
152*4882a593Smuzhiyun 	u16	pkt_len;
153*4882a593Smuzhiyun 	u8	physt;
154*4882a593Smuzhiyun 	u8	drvinfo_sz;
155*4882a593Smuzhiyun 	u8	shift_sz;
156*4882a593Smuzhiyun 	u8	hdrlen; /* the WLAN Header Len */
157*4882a593Smuzhiyun 	u8	to_fr_ds;
158*4882a593Smuzhiyun 	u8	amsdu;
159*4882a593Smuzhiyun 	u8	qos;
160*4882a593Smuzhiyun 	u8	priority;
161*4882a593Smuzhiyun 	u8	pw_save;
162*4882a593Smuzhiyun 	u8	mdata;
163*4882a593Smuzhiyun 	u16	seq_num;
164*4882a593Smuzhiyun 	u8	frag_num;
165*4882a593Smuzhiyun 	u8	mfrag;
166*4882a593Smuzhiyun 	u8	order;
167*4882a593Smuzhiyun 	u8	privacy; /* in frame_ctrl field */
168*4882a593Smuzhiyun 	u8	bdecrypted;
169*4882a593Smuzhiyun 	u8	encrypt; /* when 0 indicate no encrypt. when non-zero, indicate the encrypt algorith */
170*4882a593Smuzhiyun 	u8	iv_len;
171*4882a593Smuzhiyun 	u8	icv_len;
172*4882a593Smuzhiyun 	u8	crc_err;
173*4882a593Smuzhiyun 	u8	icv_err;
174*4882a593Smuzhiyun 
175*4882a593Smuzhiyun 	u8	dst[ETH_ALEN];
176*4882a593Smuzhiyun 	u8	src[ETH_ALEN];
177*4882a593Smuzhiyun 	u8	ta[ETH_ALEN];
178*4882a593Smuzhiyun 	u8	ra[ETH_ALEN];
179*4882a593Smuzhiyun 	u8	bssid[ETH_ALEN];
180*4882a593Smuzhiyun #ifdef CONFIG_RTW_MESH
181*4882a593Smuzhiyun 	u8	msa[ETH_ALEN]; /* mesh sa */
182*4882a593Smuzhiyun 	u8	mda[ETH_ALEN]; /* mesh da */
183*4882a593Smuzhiyun 	u8 mesh_ctrl_present;
184*4882a593Smuzhiyun 	u8	mesh_ctrl_len; /* length of mesh control field */
185*4882a593Smuzhiyun #endif
186*4882a593Smuzhiyun 
187*4882a593Smuzhiyun 	u8	ack_policy;
188*4882a593Smuzhiyun 
189*4882a593Smuzhiyun 	u8	key_index;
190*4882a593Smuzhiyun 
191*4882a593Smuzhiyun 	u8	data_rate;
192*4882a593Smuzhiyun 	u8 ch; /* RX channel */
193*4882a593Smuzhiyun 	u8	bw;
194*4882a593Smuzhiyun 	u8	stbc;
195*4882a593Smuzhiyun 	u8	ldpc;
196*4882a593Smuzhiyun 	u8	sgi;
197*4882a593Smuzhiyun 	u8	pkt_rpt_type;
198*4882a593Smuzhiyun 	u32	MacIDValidEntry[2];	/* 64 bits present 64 entry. */
199*4882a593Smuzhiyun 	u8	ampdu;
200*4882a593Smuzhiyun 	u8	ppdu_cnt;
201*4882a593Smuzhiyun 	u8	ampdu_eof;
202*4882a593Smuzhiyun 	u32 	free_cnt;		/* free run counter */
203*4882a593Smuzhiyun 	struct phydm_phyinfo_struct phy_info;
204*4882a593Smuzhiyun #ifdef CONFIG_WIFI_MONITOR
205*4882a593Smuzhiyun 	u8 moif[16];
206*4882a593Smuzhiyun #endif
207*4882a593Smuzhiyun 
208*4882a593Smuzhiyun #ifdef CONFIG_TCP_CSUM_OFFLOAD_RX
209*4882a593Smuzhiyun 	/* checksum offload realted varaiables */
210*4882a593Smuzhiyun 	u8 csum_valid;		/* Checksum valid, 0: not check, 1: checked */
211*4882a593Smuzhiyun 	u8 csum_err;		/* Checksum Error occurs */
212*4882a593Smuzhiyun #endif /* CONFIG_TCP_CSUM_OFFLOAD_RX */
213*4882a593Smuzhiyun };
214*4882a593Smuzhiyun 
215*4882a593Smuzhiyun #ifdef CONFIG_RTW_MESH
216*4882a593Smuzhiyun #define RATTRIB_GET_MCTRL_LEN(rattrib) ((rattrib)->mesh_ctrl_len)
217*4882a593Smuzhiyun #else
218*4882a593Smuzhiyun #define RATTRIB_GET_MCTRL_LEN(rattrib) 0
219*4882a593Smuzhiyun #endif
220*4882a593Smuzhiyun 
221*4882a593Smuzhiyun /* These definition is used for Rx packet reordering. */
222*4882a593Smuzhiyun #define SN_LESS(a, b)		(((a-b) & 0x800) != 0)
223*4882a593Smuzhiyun #define SN_EQUAL(a, b)	(a == b)
224*4882a593Smuzhiyun /* #define REORDER_WIN_SIZE	128 */
225*4882a593Smuzhiyun /* #define REORDER_ENTRY_NUM	128 */
226*4882a593Smuzhiyun #define REORDER_WAIT_TIME	(50) /* (ms) */
227*4882a593Smuzhiyun 
228*4882a593Smuzhiyun #if defined(CONFIG_PLATFORM_RTK390X) && defined(CONFIG_USB_HCI)
229*4882a593Smuzhiyun 	#define RECVBUFF_ALIGN_SZ 32
230*4882a593Smuzhiyun #else
231*4882a593Smuzhiyun 	#define RECVBUFF_ALIGN_SZ 8
232*4882a593Smuzhiyun #endif
233*4882a593Smuzhiyun 
234*4882a593Smuzhiyun #ifdef CONFIG_TRX_BD_ARCH
235*4882a593Smuzhiyun 	#define RX_WIFI_INFO_SIZE	24
236*4882a593Smuzhiyun #elif (defined(CONFIG_RTL8192E) || defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B)) && defined(CONFIG_PCI_HCI)
237*4882a593Smuzhiyun 	#define RXBD_SIZE	sizeof(struct recv_stat)
238*4882a593Smuzhiyun #endif
239*4882a593Smuzhiyun 
240*4882a593Smuzhiyun #define RXDESC_SIZE	24
241*4882a593Smuzhiyun #define RXDESC_OFFSET RXDESC_SIZE
242*4882a593Smuzhiyun 
243*4882a593Smuzhiyun #ifdef CONFIG_TRX_BD_ARCH
244*4882a593Smuzhiyun struct rx_buf_desc {
245*4882a593Smuzhiyun 	/* RX has exactly one segment */
246*4882a593Smuzhiyun #ifdef CONFIG_64BIT_DMA
247*4882a593Smuzhiyun 	unsigned int dword[4];
248*4882a593Smuzhiyun #else
249*4882a593Smuzhiyun 	unsigned int dword[2];
250*4882a593Smuzhiyun #endif
251*4882a593Smuzhiyun };
252*4882a593Smuzhiyun 
253*4882a593Smuzhiyun struct recv_stat {
254*4882a593Smuzhiyun 	unsigned int rxdw[8];
255*4882a593Smuzhiyun };
256*4882a593Smuzhiyun #else
257*4882a593Smuzhiyun struct recv_stat {
258*4882a593Smuzhiyun 	unsigned int rxdw0;
259*4882a593Smuzhiyun 
260*4882a593Smuzhiyun 	unsigned int rxdw1;
261*4882a593Smuzhiyun 
262*4882a593Smuzhiyun #if !((defined(CONFIG_RTL8192E) || defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822C)) && defined(CONFIG_PCI_HCI))  /* exclude 8192ee, 8814ae, 8822be, 8821ce */
263*4882a593Smuzhiyun 	unsigned int rxdw2;
264*4882a593Smuzhiyun 
265*4882a593Smuzhiyun 	unsigned int rxdw3;
266*4882a593Smuzhiyun #endif
267*4882a593Smuzhiyun 
268*4882a593Smuzhiyun #ifndef BUF_DESC_ARCH
269*4882a593Smuzhiyun 	unsigned int rxdw4;
270*4882a593Smuzhiyun 
271*4882a593Smuzhiyun 	unsigned int rxdw5;
272*4882a593Smuzhiyun 
273*4882a593Smuzhiyun #ifdef CONFIG_PCI_HCI
274*4882a593Smuzhiyun 	unsigned int rxdw6;
275*4882a593Smuzhiyun 
276*4882a593Smuzhiyun 	unsigned int rxdw7;
277*4882a593Smuzhiyun #endif
278*4882a593Smuzhiyun #endif /* if BUF_DESC_ARCH is defined, rx_buf_desc occupy 4 double words */
279*4882a593Smuzhiyun };
280*4882a593Smuzhiyun #endif
281*4882a593Smuzhiyun 
282*4882a593Smuzhiyun #define EOR BIT(30)
283*4882a593Smuzhiyun 
284*4882a593Smuzhiyun #ifdef CONFIG_PCI_HCI
285*4882a593Smuzhiyun #define PCI_MAX_RX_QUEUE		1/* MSDU packet queue, Rx Command Queue */
286*4882a593Smuzhiyun #define PCI_MAX_RX_COUNT		128
287*4882a593Smuzhiyun #ifdef CONFIG_TRX_BD_ARCH
288*4882a593Smuzhiyun #define RX_BD_NUM				PCI_MAX_RX_COUNT	/* alias */
289*4882a593Smuzhiyun #endif
290*4882a593Smuzhiyun 
291*4882a593Smuzhiyun struct rtw_rx_ring {
292*4882a593Smuzhiyun #ifdef CONFIG_TRX_BD_ARCH
293*4882a593Smuzhiyun 	struct rx_buf_desc	*buf_desc;
294*4882a593Smuzhiyun #else
295*4882a593Smuzhiyun 	struct recv_stat	*desc;
296*4882a593Smuzhiyun #endif
297*4882a593Smuzhiyun 	dma_addr_t		dma;
298*4882a593Smuzhiyun 	unsigned int		idx;
299*4882a593Smuzhiyun 	struct sk_buff	*rx_buf[PCI_MAX_RX_COUNT];
300*4882a593Smuzhiyun };
301*4882a593Smuzhiyun #endif
302*4882a593Smuzhiyun 
303*4882a593Smuzhiyun 
304*4882a593Smuzhiyun 
305*4882a593Smuzhiyun /*
306*4882a593Smuzhiyun accesser of recv_priv: rtw_recv_entry(dispatch / passive level); recv_thread(passive) ; returnpkt(dispatch)
307*4882a593Smuzhiyun ; halt(passive) ;
308*4882a593Smuzhiyun 
309*4882a593Smuzhiyun using enter_critical section to protect
310*4882a593Smuzhiyun */
311*4882a593Smuzhiyun 
312*4882a593Smuzhiyun #ifndef DBG_RX_BH_TRACKING
313*4882a593Smuzhiyun #define DBG_RX_BH_TRACKING 0
314*4882a593Smuzhiyun #endif
315*4882a593Smuzhiyun 
316*4882a593Smuzhiyun struct recv_priv {
317*4882a593Smuzhiyun 	_lock	lock;
318*4882a593Smuzhiyun 
319*4882a593Smuzhiyun #ifdef CONFIG_RECV_THREAD_MODE
320*4882a593Smuzhiyun 	_sema	recv_sema;
321*4882a593Smuzhiyun 
322*4882a593Smuzhiyun #endif
323*4882a593Smuzhiyun 
324*4882a593Smuzhiyun 	/* _queue	blk_strms[MAX_RX_NUMBLKS];    */ /* keeping the block ack frame until return ack */
325*4882a593Smuzhiyun 	_queue	free_recv_queue;
326*4882a593Smuzhiyun 	_queue	recv_pending_queue;
327*4882a593Smuzhiyun 	_queue	uc_swdec_pending_queue;
328*4882a593Smuzhiyun 
329*4882a593Smuzhiyun 
330*4882a593Smuzhiyun 	u8 *pallocated_frame_buf;
331*4882a593Smuzhiyun 	u8 *precv_frame_buf;
332*4882a593Smuzhiyun 
333*4882a593Smuzhiyun 	uint free_recvframe_cnt;
334*4882a593Smuzhiyun 
335*4882a593Smuzhiyun 	#if DBG_RX_BH_TRACKING
336*4882a593Smuzhiyun 	u32 rx_bh_stage;
337*4882a593Smuzhiyun 	u32 rx_bh_buf_dq_cnt;
338*4882a593Smuzhiyun 	void *rx_bh_lbuf;
339*4882a593Smuzhiyun 	void *rx_bh_cbuf;
340*4882a593Smuzhiyun 	void *rx_bh_cbuf_data;
341*4882a593Smuzhiyun 	u32 rx_bh_cbuf_dlen;
342*4882a593Smuzhiyun 	u32 rx_bh_cbuf_pos;
343*4882a593Smuzhiyun 	void *rx_bh_cframe;
344*4882a593Smuzhiyun 	#endif
345*4882a593Smuzhiyun 
346*4882a593Smuzhiyun 	_adapter	*adapter;
347*4882a593Smuzhiyun 
348*4882a593Smuzhiyun 	u32 is_any_non_be_pkts;
349*4882a593Smuzhiyun 
350*4882a593Smuzhiyun 	u64	rx_bytes;
351*4882a593Smuzhiyun 	u64	rx_pkts;
352*4882a593Smuzhiyun 	u64	rx_drop;
353*4882a593Smuzhiyun 
354*4882a593Smuzhiyun 	u64 dbg_rx_drop_count;
355*4882a593Smuzhiyun 	u64 dbg_rx_ampdu_drop_count;
356*4882a593Smuzhiyun 	u64 dbg_rx_ampdu_forced_indicate_count;
357*4882a593Smuzhiyun 	u64 dbg_rx_ampdu_loss_count;
358*4882a593Smuzhiyun 	u64 dbg_rx_dup_mgt_frame_drop_count;
359*4882a593Smuzhiyun 	u64 dbg_rx_ampdu_window_shift_cnt;
360*4882a593Smuzhiyun 	u64 dbg_rx_conflic_mac_addr_cnt;
361*4882a593Smuzhiyun 
362*4882a593Smuzhiyun 	uint  rx_icv_err;
363*4882a593Smuzhiyun 	uint  rx_largepacket_crcerr;
364*4882a593Smuzhiyun 	uint  rx_smallpacket_crcerr;
365*4882a593Smuzhiyun 	uint  rx_middlepacket_crcerr;
366*4882a593Smuzhiyun 
367*4882a593Smuzhiyun #ifdef CONFIG_USB_HCI
368*4882a593Smuzhiyun 	/* u8 *pallocated_urb_buf; */
369*4882a593Smuzhiyun 	_sema allrxreturnevt;
370*4882a593Smuzhiyun 	uint	ff_hwaddr;
371*4882a593Smuzhiyun 	ATOMIC_T	rx_pending_cnt;
372*4882a593Smuzhiyun 
373*4882a593Smuzhiyun #ifdef CONFIG_USB_INTERRUPT_IN_PIPE
374*4882a593Smuzhiyun #ifdef PLATFORM_LINUX
375*4882a593Smuzhiyun 	PURB	int_in_urb;
376*4882a593Smuzhiyun #endif
377*4882a593Smuzhiyun 
378*4882a593Smuzhiyun 	u8	*int_in_buf;
379*4882a593Smuzhiyun #endif /* CONFIG_USB_INTERRUPT_IN_PIPE */
380*4882a593Smuzhiyun 
381*4882a593Smuzhiyun #endif
382*4882a593Smuzhiyun #if defined(PLATFORM_LINUX) || defined(PLATFORM_FREEBSD)
383*4882a593Smuzhiyun 	_tasklet irq_prepare_beacon_tasklet;
384*4882a593Smuzhiyun 	_tasklet recv_tasklet;
385*4882a593Smuzhiyun 
386*4882a593Smuzhiyun 	struct sk_buff_head free_recv_skb_queue;
387*4882a593Smuzhiyun 	struct sk_buff_head rx_skb_queue;
388*4882a593Smuzhiyun #ifdef CONFIG_RTW_NAPI
389*4882a593Smuzhiyun 		struct sk_buff_head rx_napi_skb_queue;
390*4882a593Smuzhiyun #endif
391*4882a593Smuzhiyun #ifdef CONFIG_RX_INDICATE_QUEUE
392*4882a593Smuzhiyun 	_tasklet rx_indicate_tasklet;
393*4882a593Smuzhiyun 	struct ifqueue rx_indicate_queue;
394*4882a593Smuzhiyun #endif /* CONFIG_RX_INDICATE_QUEUE */
395*4882a593Smuzhiyun 
396*4882a593Smuzhiyun #endif /* defined(PLATFORM_LINUX) || defined(PLATFORM_FREEBSD) */
397*4882a593Smuzhiyun 
398*4882a593Smuzhiyun 	u8 *pallocated_recv_buf;
399*4882a593Smuzhiyun 	u8 *precv_buf;    /* 4 alignment */
400*4882a593Smuzhiyun 	_queue	free_recv_buf_queue;
401*4882a593Smuzhiyun 	u32	free_recv_buf_queue_cnt;
402*4882a593Smuzhiyun 
403*4882a593Smuzhiyun #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) || defined(CONFIG_USB_HCI)
404*4882a593Smuzhiyun 	_queue	recv_buf_pending_queue;
405*4882a593Smuzhiyun #endif
406*4882a593Smuzhiyun 
407*4882a593Smuzhiyun #if defined(CONFIG_SDIO_HCI)
408*4882a593Smuzhiyun #ifdef CONFIG_SDIO_RECVBUF_PWAIT
409*4882a593Smuzhiyun 	struct rtw_pwait_ctx recvbuf_pwait;
410*4882a593Smuzhiyun #endif
411*4882a593Smuzhiyun #ifdef CONFIG_SDIO_RECVBUF_AGGREGATION
412*4882a593Smuzhiyun 	bool recvbuf_agg;
413*4882a593Smuzhiyun #endif
414*4882a593Smuzhiyun #endif /* CONFIG_SDIO_HCI */
415*4882a593Smuzhiyun 
416*4882a593Smuzhiyun #ifdef CONFIG_PCI_HCI
417*4882a593Smuzhiyun 	/* Rx */
418*4882a593Smuzhiyun 	struct rtw_rx_ring	rx_ring[PCI_MAX_RX_QUEUE];
419*4882a593Smuzhiyun 	int rxringcount;	/* size should be PCI_MAX_RX_QUEUE */
420*4882a593Smuzhiyun 	u32	rxbuffersize;
421*4882a593Smuzhiyun #endif
422*4882a593Smuzhiyun 
423*4882a593Smuzhiyun 	/* For display the phy informatiom */
424*4882a593Smuzhiyun 	u8 is_signal_dbg;	/* for debug */
425*4882a593Smuzhiyun 	u8 signal_strength_dbg;	/* for debug */
426*4882a593Smuzhiyun 
427*4882a593Smuzhiyun 	u8 signal_strength;
428*4882a593Smuzhiyun 	u8 signal_qual;
429*4882a593Smuzhiyun 	s8 rssi;	/* translate_percentage_to_dbm(ptarget_wlan->network.PhyInfo.SignalStrength); */
430*4882a593Smuzhiyun 	struct rx_raw_rssi raw_rssi_info;
431*4882a593Smuzhiyun 	/* s8 rxpwdb;	 */
432*4882a593Smuzhiyun 	/* int RxSNRdB[2]; */
433*4882a593Smuzhiyun 	/* s8 RxRssi[2]; */
434*4882a593Smuzhiyun 	/* int FalseAlmCnt_all; */
435*4882a593Smuzhiyun 
436*4882a593Smuzhiyun 
437*4882a593Smuzhiyun #ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS
438*4882a593Smuzhiyun 	_timer signal_stat_timer;
439*4882a593Smuzhiyun 	u32 signal_stat_sampling_interval;
440*4882a593Smuzhiyun 	/* u32 signal_stat_converging_constant; */
441*4882a593Smuzhiyun 	struct signal_stat signal_qual_data;
442*4882a593Smuzhiyun 	struct signal_stat signal_strength_data;
443*4882a593Smuzhiyun #else /* CONFIG_NEW_SIGNAL_STAT_PROCESS */
444*4882a593Smuzhiyun 	struct smooth_rssi_data signal_qual_data;
445*4882a593Smuzhiyun 	struct smooth_rssi_data signal_strength_data;
446*4882a593Smuzhiyun #endif /* CONFIG_NEW_SIGNAL_STAT_PROCESS */
447*4882a593Smuzhiyun 	u16 sink_udpport, pre_rtp_rxseq, cur_rtp_rxseq;
448*4882a593Smuzhiyun 
449*4882a593Smuzhiyun 	BOOLEAN store_law_data_flag;
450*4882a593Smuzhiyun };
451*4882a593Smuzhiyun 
452*4882a593Smuzhiyun #ifdef CONFIG_SDIO_RECVBUF_AGGREGATION
453*4882a593Smuzhiyun #define recv_buf_agg(recvpriv) recvpriv->recvbuf_agg
454*4882a593Smuzhiyun #ifndef CONFIG_SDIO_RECVBUF_AGGREGATION_EN
455*4882a593Smuzhiyun #define CONFIG_SDIO_RECVBUF_AGGREGATION_EN 1
456*4882a593Smuzhiyun #endif
457*4882a593Smuzhiyun #else
458*4882a593Smuzhiyun #define recv_buf_agg(recvpriv) 0
459*4882a593Smuzhiyun #endif
460*4882a593Smuzhiyun 
461*4882a593Smuzhiyun #define RX_BH_STG_UNKNOWN		0
462*4882a593Smuzhiyun #define RX_BH_STG_HDL_ENTER		1
463*4882a593Smuzhiyun #define RX_BH_STG_HDL_EXIT		2
464*4882a593Smuzhiyun #define RX_BH_STG_NEW_BUF		3
465*4882a593Smuzhiyun #define RX_BH_STG_NEW_FRAME		4
466*4882a593Smuzhiyun #define RX_BH_STG_NORMAL_RX		5
467*4882a593Smuzhiyun #define RX_BH_STG_NORMAL_RX_END	6
468*4882a593Smuzhiyun #define RX_BH_STG_C2H			7
469*4882a593Smuzhiyun #define RX_BH_STG_C2H_END		8
470*4882a593Smuzhiyun 
471*4882a593Smuzhiyun #if DBG_RX_BH_TRACKING
472*4882a593Smuzhiyun void rx_bh_tk_set_stage(struct recv_priv *recv, u32 s);
473*4882a593Smuzhiyun void rx_bh_tk_set_buf(struct recv_priv *recv, void *buf, void *data, u32 dlen);
474*4882a593Smuzhiyun void rx_bh_tk_set_buf_pos(struct recv_priv *recv, void *pos);
475*4882a593Smuzhiyun void rx_bh_tk_set_frame(struct recv_priv *recv, void *frame);
476*4882a593Smuzhiyun void dump_rx_bh_tk(void *sel, struct recv_priv *recv);
477*4882a593Smuzhiyun #else
478*4882a593Smuzhiyun #define rx_bh_tk_set_stage(recv, s) do {} while (0)
479*4882a593Smuzhiyun #define rx_bh_tk_set_buf(recv, buf, data, dlen) do {} while (0)
480*4882a593Smuzhiyun #define rx_bh_tk_set_buf_pos(recv, pos) do {} while (0)
481*4882a593Smuzhiyun #define rx_bh_tk_set_frame(recv, frame) do {} while (0)
482*4882a593Smuzhiyun #define dump_rx_bh_tk(sel, recv) do {} while (0)
483*4882a593Smuzhiyun #endif
484*4882a593Smuzhiyun 
485*4882a593Smuzhiyun #ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS
486*4882a593Smuzhiyun #define rtw_set_signal_stat_timer(recvpriv) _set_timer(&(recvpriv)->signal_stat_timer, (recvpriv)->signal_stat_sampling_interval)
487*4882a593Smuzhiyun #endif /* CONFIG_NEW_SIGNAL_STAT_PROCESS */
488*4882a593Smuzhiyun 
489*4882a593Smuzhiyun struct sta_recv_priv {
490*4882a593Smuzhiyun 
491*4882a593Smuzhiyun 	_lock	lock;
492*4882a593Smuzhiyun 	sint	option;
493*4882a593Smuzhiyun 
494*4882a593Smuzhiyun 	/* _queue	blk_strms[MAX_RX_NUMBLKS]; */
495*4882a593Smuzhiyun 	_queue defrag_q;	 /* keeping the fragment frame until defrag */
496*4882a593Smuzhiyun 
497*4882a593Smuzhiyun 	struct	stainfo_rxcache rxcache;
498*4882a593Smuzhiyun 	u16	bmc_tid_rxseq[16];
499*4882a593Smuzhiyun 	u16	nonqos_rxseq;
500*4882a593Smuzhiyun 	u16	nonqos_bmc_rxseq;
501*4882a593Smuzhiyun 
502*4882a593Smuzhiyun 	/* uint	sta_rx_bytes; */
503*4882a593Smuzhiyun 	/* uint	sta_rx_pkts; */
504*4882a593Smuzhiyun 	/* uint	sta_rx_fail; */
505*4882a593Smuzhiyun 
506*4882a593Smuzhiyun };
507*4882a593Smuzhiyun 
508*4882a593Smuzhiyun 
509*4882a593Smuzhiyun #define RBUF_TYPE_PREALLOC	0
510*4882a593Smuzhiyun #define RBUF_TYPE_TMP		1
511*4882a593Smuzhiyun #define RBUF_TYPE_PWAIT_ADJ	2
512*4882a593Smuzhiyun 
513*4882a593Smuzhiyun struct recv_buf {
514*4882a593Smuzhiyun 	_list list;
515*4882a593Smuzhiyun 
516*4882a593Smuzhiyun #ifdef PLATFORM_WINDOWS
517*4882a593Smuzhiyun 	_lock recvbuf_lock;
518*4882a593Smuzhiyun #endif
519*4882a593Smuzhiyun 
520*4882a593Smuzhiyun #ifdef CONFIG_SDIO_RECVBUF_PWAIT_RUNTIME_ADJUST
521*4882a593Smuzhiyun 	u8 type;
522*4882a593Smuzhiyun #endif
523*4882a593Smuzhiyun 
524*4882a593Smuzhiyun 	u32	ref_cnt;
525*4882a593Smuzhiyun 
526*4882a593Smuzhiyun 	PADAPTER adapter;
527*4882a593Smuzhiyun 
528*4882a593Smuzhiyun 	u8	*pbuf;
529*4882a593Smuzhiyun 	u8	*pallocated_buf;
530*4882a593Smuzhiyun 
531*4882a593Smuzhiyun 	u32	len;
532*4882a593Smuzhiyun 	u8	*phead;
533*4882a593Smuzhiyun 	u8	*pdata;
534*4882a593Smuzhiyun 	u8	*ptail;
535*4882a593Smuzhiyun 	u8	*pend;
536*4882a593Smuzhiyun 
537*4882a593Smuzhiyun #ifdef CONFIG_USB_HCI
538*4882a593Smuzhiyun 	PURB	purb;
539*4882a593Smuzhiyun 	dma_addr_t dma_transfer_addr;	/* (in) dma addr for transfer_buffer */
540*4882a593Smuzhiyun 	u32 alloc_sz;
541*4882a593Smuzhiyun 
542*4882a593Smuzhiyun 	u8  irp_pending;
543*4882a593Smuzhiyun 	int  transfer_len;
544*4882a593Smuzhiyun #endif
545*4882a593Smuzhiyun 
546*4882a593Smuzhiyun #if defined(PLATFORM_LINUX)
547*4882a593Smuzhiyun 	_pkt *pskb;
548*4882a593Smuzhiyun #elif defined(PLATFORM_FREEBSD) /* skb solution */
549*4882a593Smuzhiyun 	struct sk_buff *pskb;
550*4882a593Smuzhiyun #endif
551*4882a593Smuzhiyun };
552*4882a593Smuzhiyun 
553*4882a593Smuzhiyun #ifdef CONFIG_SDIO_RECVBUF_PWAIT_RUNTIME_ADJUST
554*4882a593Smuzhiyun #define RBUF_IS_PREALLOC(rbuf) ((rbuf)->type == RBUF_TYPE_PREALLOC)
555*4882a593Smuzhiyun #else
556*4882a593Smuzhiyun #define RBUF_IS_PREALLOC(rbuf) 1
557*4882a593Smuzhiyun #endif
558*4882a593Smuzhiyun 
559*4882a593Smuzhiyun /*
560*4882a593Smuzhiyun 	head  ----->
561*4882a593Smuzhiyun 
562*4882a593Smuzhiyun 		data  ----->
563*4882a593Smuzhiyun 
564*4882a593Smuzhiyun 			payload
565*4882a593Smuzhiyun 
566*4882a593Smuzhiyun 		tail  ----->
567*4882a593Smuzhiyun 
568*4882a593Smuzhiyun 
569*4882a593Smuzhiyun 	end   ----->
570*4882a593Smuzhiyun 
571*4882a593Smuzhiyun 	len = (unsigned int )(tail - data);
572*4882a593Smuzhiyun 
573*4882a593Smuzhiyun */
574*4882a593Smuzhiyun struct recv_frame_hdr {
575*4882a593Smuzhiyun 	_list	list;
576*4882a593Smuzhiyun 	_pkt *pkt;
577*4882a593Smuzhiyun 
578*4882a593Smuzhiyun 	_adapter  *adapter;
579*4882a593Smuzhiyun 
580*4882a593Smuzhiyun 	u8 fragcnt;
581*4882a593Smuzhiyun 
582*4882a593Smuzhiyun 	int frame_tag;
583*4882a593Smuzhiyun 	int keytrack;
584*4882a593Smuzhiyun 	struct rx_pkt_attrib attrib;
585*4882a593Smuzhiyun 
586*4882a593Smuzhiyun 	uint  len;
587*4882a593Smuzhiyun 	u8 *rx_head;
588*4882a593Smuzhiyun 	u8 *rx_data;
589*4882a593Smuzhiyun 	u8 *rx_tail;
590*4882a593Smuzhiyun 	u8 *rx_end;
591*4882a593Smuzhiyun 
592*4882a593Smuzhiyun 	void *precvbuf;
593*4882a593Smuzhiyun 
594*4882a593Smuzhiyun 
595*4882a593Smuzhiyun 	/*  */
596*4882a593Smuzhiyun 	struct sta_info *psta;
597*4882a593Smuzhiyun 
598*4882a593Smuzhiyun 	/* for A-MPDU Rx reordering buffer control */
599*4882a593Smuzhiyun 	struct recv_reorder_ctrl *preorder_ctrl;
600*4882a593Smuzhiyun 
601*4882a593Smuzhiyun #ifdef CONFIG_WAPI_SUPPORT
602*4882a593Smuzhiyun 	u8 UserPriority;
603*4882a593Smuzhiyun 	u8 WapiTempPN[16];
604*4882a593Smuzhiyun 	u8 WapiSrcAddr[6];
605*4882a593Smuzhiyun 	u8 bWapiCheckPNInDecrypt;
606*4882a593Smuzhiyun 	u8 bIsWaiPacket;
607*4882a593Smuzhiyun #endif
608*4882a593Smuzhiyun 
609*4882a593Smuzhiyun };
610*4882a593Smuzhiyun 
611*4882a593Smuzhiyun 
612*4882a593Smuzhiyun union recv_frame {
613*4882a593Smuzhiyun 
614*4882a593Smuzhiyun 	union {
615*4882a593Smuzhiyun 		_list list;
616*4882a593Smuzhiyun 		struct recv_frame_hdr hdr;
617*4882a593Smuzhiyun 		uint mem[RECVFRAME_HDR_ALIGN >> 2];
618*4882a593Smuzhiyun 	} u;
619*4882a593Smuzhiyun 
620*4882a593Smuzhiyun 	/* uint mem[MAX_RXSZ>>2]; */
621*4882a593Smuzhiyun 
622*4882a593Smuzhiyun };
623*4882a593Smuzhiyun 
624*4882a593Smuzhiyun enum rtw_rx_llc_hdl {
625*4882a593Smuzhiyun 	RTW_RX_LLC_KEEP		= 0,
626*4882a593Smuzhiyun 	RTW_RX_LLC_REMOVE	= 1,
627*4882a593Smuzhiyun 	RTW_RX_LLC_VLAN		= 2,
628*4882a593Smuzhiyun };
629*4882a593Smuzhiyun 
630*4882a593Smuzhiyun bool rtw_rframe_del_wfd_ie(union recv_frame *rframe, u8 ies_offset);
631*4882a593Smuzhiyun 
632*4882a593Smuzhiyun typedef enum _RX_PACKET_TYPE {
633*4882a593Smuzhiyun 	NORMAL_RX,/* Normal rx packet */
634*4882a593Smuzhiyun 	TX_REPORT1,/* CCX */
635*4882a593Smuzhiyun 	TX_REPORT2,/* TX RPT */
636*4882a593Smuzhiyun 	HIS_REPORT,/* USB HISR RPT */
637*4882a593Smuzhiyun 	C2H_PACKET
638*4882a593Smuzhiyun } RX_PACKET_TYPE, *PRX_PACKET_TYPE;
639*4882a593Smuzhiyun 
640*4882a593Smuzhiyun extern union recv_frame *_rtw_alloc_recvframe(_queue *pfree_recv_queue);   /* get a free recv_frame from pfree_recv_queue */
641*4882a593Smuzhiyun extern union recv_frame *rtw_alloc_recvframe(_queue *pfree_recv_queue);   /* get a free recv_frame from pfree_recv_queue */
642*4882a593Smuzhiyun extern void rtw_init_recvframe(union recv_frame *precvframe , struct recv_priv *precvpriv);
643*4882a593Smuzhiyun extern int	 rtw_free_recvframe(union recv_frame *precvframe, _queue *pfree_recv_queue);
644*4882a593Smuzhiyun 
645*4882a593Smuzhiyun #define rtw_dequeue_recvframe(queue) rtw_alloc_recvframe(queue)
646*4882a593Smuzhiyun extern int _rtw_enqueue_recvframe(union recv_frame *precvframe, _queue *queue);
647*4882a593Smuzhiyun extern int rtw_enqueue_recvframe(union recv_frame *precvframe, _queue *queue);
648*4882a593Smuzhiyun 
649*4882a593Smuzhiyun extern void rtw_free_recvframe_queue(_queue *pframequeue,  _queue *pfree_recv_queue);
650*4882a593Smuzhiyun u32 rtw_free_uc_swdec_pending_queue(_adapter *adapter);
651*4882a593Smuzhiyun 
652*4882a593Smuzhiyun sint rtw_enqueue_recvbuf_to_head(struct recv_buf *precvbuf, _queue *queue);
653*4882a593Smuzhiyun sint rtw_enqueue_recvbuf(struct recv_buf *precvbuf, _queue *queue);
654*4882a593Smuzhiyun struct recv_buf *rtw_dequeue_recvbuf(_queue *queue);
655*4882a593Smuzhiyun 
656*4882a593Smuzhiyun void process_pwrbit_data(_adapter *padapter, union recv_frame *precv_frame, struct sta_info *psta);
657*4882a593Smuzhiyun void process_wmmps_data(_adapter *padapter, union recv_frame *precv_frame, struct sta_info *psta);
658*4882a593Smuzhiyun 
659*4882a593Smuzhiyun #if defined(CONFIG_80211N_HT) && defined(CONFIG_RECV_REORDERING_CTRL)
660*4882a593Smuzhiyun void rtw_reordering_ctrl_timeout_handler(void *pcontext);
661*4882a593Smuzhiyun #endif
662*4882a593Smuzhiyun 
663*4882a593Smuzhiyun void rx_query_phy_status(union recv_frame *rframe, u8 *phy_stat);
664*4882a593Smuzhiyun int rtw_inc_and_chk_continual_no_rx_packet(struct sta_info *sta, int tid_index);
665*4882a593Smuzhiyun void rtw_reset_continual_no_rx_packet(struct sta_info *sta, int tid_index);
666*4882a593Smuzhiyun 
667*4882a593Smuzhiyun #ifdef CONFIG_RECV_THREAD_MODE
668*4882a593Smuzhiyun thread_return rtw_recv_thread(thread_context context);
669*4882a593Smuzhiyun #endif
670*4882a593Smuzhiyun 
get_rxmem(union recv_frame * precvframe)671*4882a593Smuzhiyun __inline static u8 *get_rxmem(union recv_frame *precvframe)
672*4882a593Smuzhiyun {
673*4882a593Smuzhiyun 	/* always return rx_head... */
674*4882a593Smuzhiyun 	if (precvframe == NULL)
675*4882a593Smuzhiyun 		return NULL;
676*4882a593Smuzhiyun 
677*4882a593Smuzhiyun 	return precvframe->u.hdr.rx_head;
678*4882a593Smuzhiyun }
679*4882a593Smuzhiyun 
get_rx_status(union recv_frame * precvframe)680*4882a593Smuzhiyun __inline static u8 *get_rx_status(union recv_frame *precvframe)
681*4882a593Smuzhiyun {
682*4882a593Smuzhiyun 
683*4882a593Smuzhiyun 	return get_rxmem(precvframe);
684*4882a593Smuzhiyun 
685*4882a593Smuzhiyun }
686*4882a593Smuzhiyun 
get_recvframe_data(union recv_frame * precvframe)687*4882a593Smuzhiyun __inline static u8 *get_recvframe_data(union recv_frame *precvframe)
688*4882a593Smuzhiyun {
689*4882a593Smuzhiyun 
690*4882a593Smuzhiyun 	/* alwasy return rx_data */
691*4882a593Smuzhiyun 	if (precvframe == NULL)
692*4882a593Smuzhiyun 		return NULL;
693*4882a593Smuzhiyun 
694*4882a593Smuzhiyun 	return precvframe->u.hdr.rx_data;
695*4882a593Smuzhiyun 
696*4882a593Smuzhiyun }
697*4882a593Smuzhiyun 
recvframe_push(union recv_frame * precvframe,sint sz)698*4882a593Smuzhiyun __inline static u8 *recvframe_push(union recv_frame *precvframe, sint sz)
699*4882a593Smuzhiyun {
700*4882a593Smuzhiyun 	/* append data before rx_data */
701*4882a593Smuzhiyun 
702*4882a593Smuzhiyun 	/* add data to the start of recv_frame
703*4882a593Smuzhiyun 	*
704*4882a593Smuzhiyun 	*      This function extends the used data area of the recv_frame at the buffer
705*4882a593Smuzhiyun 	*      start. rx_data must be still larger than rx_head, after pushing.
706*4882a593Smuzhiyun 	*/
707*4882a593Smuzhiyun 
708*4882a593Smuzhiyun 	if (precvframe == NULL)
709*4882a593Smuzhiyun 		return NULL;
710*4882a593Smuzhiyun 
711*4882a593Smuzhiyun 
712*4882a593Smuzhiyun 	precvframe->u.hdr.rx_data -= sz ;
713*4882a593Smuzhiyun 	if (precvframe->u.hdr.rx_data < precvframe->u.hdr.rx_head) {
714*4882a593Smuzhiyun 		precvframe->u.hdr.rx_data += sz ;
715*4882a593Smuzhiyun 		return NULL;
716*4882a593Smuzhiyun 	}
717*4882a593Smuzhiyun 
718*4882a593Smuzhiyun 	precvframe->u.hdr.len += sz;
719*4882a593Smuzhiyun 
720*4882a593Smuzhiyun 	return precvframe->u.hdr.rx_data;
721*4882a593Smuzhiyun 
722*4882a593Smuzhiyun }
723*4882a593Smuzhiyun 
724*4882a593Smuzhiyun 
recvframe_pull(union recv_frame * precvframe,sint sz)725*4882a593Smuzhiyun __inline static u8 *recvframe_pull(union recv_frame *precvframe, sint sz)
726*4882a593Smuzhiyun {
727*4882a593Smuzhiyun 	/* rx_data += sz; move rx_data sz bytes  hereafter */
728*4882a593Smuzhiyun 
729*4882a593Smuzhiyun 	/* used for extract sz bytes from rx_data, update rx_data and return the updated rx_data to the caller */
730*4882a593Smuzhiyun 
731*4882a593Smuzhiyun 
732*4882a593Smuzhiyun 	if (precvframe == NULL)
733*4882a593Smuzhiyun 		return NULL;
734*4882a593Smuzhiyun 
735*4882a593Smuzhiyun 
736*4882a593Smuzhiyun 	precvframe->u.hdr.rx_data += sz;
737*4882a593Smuzhiyun 
738*4882a593Smuzhiyun 	if (precvframe->u.hdr.rx_data > precvframe->u.hdr.rx_tail) {
739*4882a593Smuzhiyun 		precvframe->u.hdr.rx_data -= sz;
740*4882a593Smuzhiyun 		return NULL;
741*4882a593Smuzhiyun 	}
742*4882a593Smuzhiyun 
743*4882a593Smuzhiyun 	precvframe->u.hdr.len -= sz;
744*4882a593Smuzhiyun 
745*4882a593Smuzhiyun 	return precvframe->u.hdr.rx_data;
746*4882a593Smuzhiyun 
747*4882a593Smuzhiyun }
748*4882a593Smuzhiyun 
recvframe_put(union recv_frame * precvframe,sint sz)749*4882a593Smuzhiyun __inline static u8 *recvframe_put(union recv_frame *precvframe, sint sz)
750*4882a593Smuzhiyun {
751*4882a593Smuzhiyun 	/* rx_tai += sz; move rx_tail sz bytes  hereafter */
752*4882a593Smuzhiyun 
753*4882a593Smuzhiyun 	/* used for append sz bytes from ptr to rx_tail, update rx_tail and return the updated rx_tail to the caller */
754*4882a593Smuzhiyun 	/* after putting, rx_tail must be still larger than rx_end. */
755*4882a593Smuzhiyun 	unsigned char *prev_rx_tail;
756*4882a593Smuzhiyun 
757*4882a593Smuzhiyun 	/* RTW_INFO("recvframe_put: len=%d\n", sz); */
758*4882a593Smuzhiyun 
759*4882a593Smuzhiyun 	if (precvframe == NULL)
760*4882a593Smuzhiyun 		return NULL;
761*4882a593Smuzhiyun 
762*4882a593Smuzhiyun 	prev_rx_tail = precvframe->u.hdr.rx_tail;
763*4882a593Smuzhiyun 
764*4882a593Smuzhiyun 	precvframe->u.hdr.rx_tail += sz;
765*4882a593Smuzhiyun 
766*4882a593Smuzhiyun 	if (precvframe->u.hdr.rx_tail > precvframe->u.hdr.rx_end) {
767*4882a593Smuzhiyun 		precvframe->u.hdr.rx_tail -= sz;
768*4882a593Smuzhiyun 		return NULL;
769*4882a593Smuzhiyun 	}
770*4882a593Smuzhiyun 
771*4882a593Smuzhiyun 	precvframe->u.hdr.len += sz;
772*4882a593Smuzhiyun 
773*4882a593Smuzhiyun 	return precvframe->u.hdr.rx_tail;
774*4882a593Smuzhiyun 
775*4882a593Smuzhiyun }
776*4882a593Smuzhiyun 
777*4882a593Smuzhiyun 
778*4882a593Smuzhiyun 
recvframe_pull_tail(union recv_frame * precvframe,sint sz)779*4882a593Smuzhiyun __inline static u8 *recvframe_pull_tail(union recv_frame *precvframe, sint sz)
780*4882a593Smuzhiyun {
781*4882a593Smuzhiyun 	/* rmv data from rx_tail (by yitsen) */
782*4882a593Smuzhiyun 
783*4882a593Smuzhiyun 	/* used for extract sz bytes from rx_end, update rx_end and return the updated rx_end to the caller */
784*4882a593Smuzhiyun 	/* after pulling, rx_end must be still larger than rx_data. */
785*4882a593Smuzhiyun 
786*4882a593Smuzhiyun 	if (precvframe == NULL)
787*4882a593Smuzhiyun 		return NULL;
788*4882a593Smuzhiyun 
789*4882a593Smuzhiyun 	precvframe->u.hdr.rx_tail -= sz;
790*4882a593Smuzhiyun 
791*4882a593Smuzhiyun 	if (precvframe->u.hdr.rx_tail < precvframe->u.hdr.rx_data) {
792*4882a593Smuzhiyun 		precvframe->u.hdr.rx_tail += sz;
793*4882a593Smuzhiyun 		return NULL;
794*4882a593Smuzhiyun 	}
795*4882a593Smuzhiyun 
796*4882a593Smuzhiyun 	precvframe->u.hdr.len -= sz;
797*4882a593Smuzhiyun 
798*4882a593Smuzhiyun 	return precvframe->u.hdr.rx_tail;
799*4882a593Smuzhiyun 
800*4882a593Smuzhiyun }
801*4882a593Smuzhiyun 
rxmem_to_recvframe(u8 * rxmem)802*4882a593Smuzhiyun __inline static union recv_frame *rxmem_to_recvframe(u8 *rxmem)
803*4882a593Smuzhiyun {
804*4882a593Smuzhiyun 	/* due to the design of 2048 bytes alignment of recv_frame, we can reference the union recv_frame */
805*4882a593Smuzhiyun 	/* from any given member of recv_frame. */
806*4882a593Smuzhiyun 	/* rxmem indicates the any member/address in recv_frame */
807*4882a593Smuzhiyun 
808*4882a593Smuzhiyun 	return (union recv_frame *)(((SIZE_PTR)rxmem >> RXFRAME_ALIGN) << RXFRAME_ALIGN);
809*4882a593Smuzhiyun 
810*4882a593Smuzhiyun }
811*4882a593Smuzhiyun 
pkt_to_recvframe(_pkt * pkt)812*4882a593Smuzhiyun __inline static union recv_frame *pkt_to_recvframe(_pkt *pkt)
813*4882a593Smuzhiyun {
814*4882a593Smuzhiyun 
815*4882a593Smuzhiyun 	u8 *buf_star;
816*4882a593Smuzhiyun 	union recv_frame *precv_frame;
817*4882a593Smuzhiyun 	precv_frame = rxmem_to_recvframe((unsigned char *)buf_star);
818*4882a593Smuzhiyun 
819*4882a593Smuzhiyun 	return precv_frame;
820*4882a593Smuzhiyun }
821*4882a593Smuzhiyun 
pkt_to_recvmem(_pkt * pkt)822*4882a593Smuzhiyun __inline static u8 *pkt_to_recvmem(_pkt *pkt)
823*4882a593Smuzhiyun {
824*4882a593Smuzhiyun 	/* return the rx_head */
825*4882a593Smuzhiyun 
826*4882a593Smuzhiyun 	union recv_frame *precv_frame = pkt_to_recvframe(pkt);
827*4882a593Smuzhiyun 
828*4882a593Smuzhiyun 	return	precv_frame->u.hdr.rx_head;
829*4882a593Smuzhiyun 
830*4882a593Smuzhiyun }
831*4882a593Smuzhiyun 
pkt_to_recvdata(_pkt * pkt)832*4882a593Smuzhiyun __inline static u8 *pkt_to_recvdata(_pkt *pkt)
833*4882a593Smuzhiyun {
834*4882a593Smuzhiyun 	/* return the rx_data */
835*4882a593Smuzhiyun 
836*4882a593Smuzhiyun 	union recv_frame *precv_frame = pkt_to_recvframe(pkt);
837*4882a593Smuzhiyun 
838*4882a593Smuzhiyun 	return	precv_frame->u.hdr.rx_data;
839*4882a593Smuzhiyun 
840*4882a593Smuzhiyun }
841*4882a593Smuzhiyun 
842*4882a593Smuzhiyun 
get_recvframe_len(union recv_frame * precvframe)843*4882a593Smuzhiyun __inline static sint get_recvframe_len(union recv_frame *precvframe)
844*4882a593Smuzhiyun {
845*4882a593Smuzhiyun 	return precvframe->u.hdr.len;
846*4882a593Smuzhiyun }
847*4882a593Smuzhiyun 
848*4882a593Smuzhiyun 
translate_percentage_to_dbm(u32 SignalStrengthIndex)849*4882a593Smuzhiyun __inline static s32 translate_percentage_to_dbm(u32 SignalStrengthIndex)
850*4882a593Smuzhiyun {
851*4882a593Smuzhiyun 	s32	SignalPower; /* in dBm. */
852*4882a593Smuzhiyun 
853*4882a593Smuzhiyun 	/* Translate to dBm (x=y-100) */
854*4882a593Smuzhiyun 	SignalPower = SignalStrengthIndex - 100;
855*4882a593Smuzhiyun 	return SignalPower;
856*4882a593Smuzhiyun }
857*4882a593Smuzhiyun 
858*4882a593Smuzhiyun struct sta_info;
859*4882a593Smuzhiyun 
860*4882a593Smuzhiyun extern void _rtw_init_sta_recv_priv(struct sta_recv_priv *psta_recvpriv);
861*4882a593Smuzhiyun 
862*4882a593Smuzhiyun extern void  mgt_dispatcher(_adapter *padapter, union recv_frame *precv_frame);
863*4882a593Smuzhiyun 
864*4882a593Smuzhiyun u8 adapter_allow_bmc_data_rx(_adapter *adapter);
865*4882a593Smuzhiyun s32 pre_recv_entry(union recv_frame *precvframe, u8 *pphy_status);
866*4882a593Smuzhiyun void count_rx_stats(_adapter *padapter, union recv_frame *prframe, struct sta_info *sta);
867*4882a593Smuzhiyun 
868*4882a593Smuzhiyun #endif
869