xref: /OK3568_Linux_fs/external/rkwifibt/drivers/rtl8188fu/include/rtw_bt_mp.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /******************************************************************************
2*4882a593Smuzhiyun  *
3*4882a593Smuzhiyun  * Copyright(c) 2007 - 2017 Realtek Corporation.
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * This program is free software; you can redistribute it and/or modify it
6*4882a593Smuzhiyun  * under the terms of version 2 of the GNU General Public License as
7*4882a593Smuzhiyun  * published by the Free Software Foundation.
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  * This program is distributed in the hope that it will be useful, but WITHOUT
10*4882a593Smuzhiyun  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11*4882a593Smuzhiyun  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12*4882a593Smuzhiyun  * more details.
13*4882a593Smuzhiyun  *
14*4882a593Smuzhiyun  *****************************************************************************/
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun #ifndef __RTW_BT_MP_H
17*4882a593Smuzhiyun #define __RTW_BT_MP_H
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun #if (MP_DRIVER == 1)
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun #pragma pack(1)
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun /* definition for BT_UP_OP_BT_READY */
25*4882a593Smuzhiyun #define	MP_BT_NOT_READY						0
26*4882a593Smuzhiyun #define	MP_BT_READY							1
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun /* definition for BT_UP_OP_BT_SET_MODE */
29*4882a593Smuzhiyun typedef enum _MP_BT_MODE {
30*4882a593Smuzhiyun 	MP_BT_MODE_RF_TXRX_TEST_MODE							= 0,
31*4882a593Smuzhiyun 	MP_BT_MODE_BT20_DUT_TEST_MODE							= 1,
32*4882a593Smuzhiyun 	MP_BT_MODE_BT40_DIRECT_TEST_MODE						= 2,
33*4882a593Smuzhiyun 	MP_BT_MODE_CONNECT_TEST_MODE							= 3,
34*4882a593Smuzhiyun 	MP_BT_MODE_MAX
35*4882a593Smuzhiyun } MP_BT_MODE, *PMP_BT_MODE;
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun /* definition for BT_UP_OP_BT_SET_TX_RX_PARAMETER */
39*4882a593Smuzhiyun typedef struct _BT_TXRX_PARAMETERS {
40*4882a593Smuzhiyun 	u8		txrxChannel;
41*4882a593Smuzhiyun 	u32		txrxTxPktCnt;
42*4882a593Smuzhiyun 	u8		txrxTxPktInterval;
43*4882a593Smuzhiyun 	u8		txrxPayloadType;
44*4882a593Smuzhiyun 	u8		txrxPktType;
45*4882a593Smuzhiyun 	u16		txrxPayloadLen;
46*4882a593Smuzhiyun 	u32		txrxPktHeader;
47*4882a593Smuzhiyun 	u8		txrxWhitenCoeff;
48*4882a593Smuzhiyun 	u8		txrxBdaddr[6];
49*4882a593Smuzhiyun 	u8		txrxTxGainIndex;
50*4882a593Smuzhiyun } BT_TXRX_PARAMETERS, *PBT_TXRX_PARAMETERS;
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun /* txrxPktType */
53*4882a593Smuzhiyun typedef enum _MP_BT_PKT_TYPE {
54*4882a593Smuzhiyun 	MP_BT_PKT_DH1							= 0,
55*4882a593Smuzhiyun 	MP_BT_PKT_DH3							= 1,
56*4882a593Smuzhiyun 	MP_BT_PKT_DH5							= 2,
57*4882a593Smuzhiyun 	MP_BT_PKT_2DH1							= 3,
58*4882a593Smuzhiyun 	MP_BT_PKT_2DH3							= 4,
59*4882a593Smuzhiyun 	MP_BT_PKT_2DH5							= 5,
60*4882a593Smuzhiyun 	MP_BT_PKT_3DH1							= 6,
61*4882a593Smuzhiyun 	MP_BT_PKT_3DH3							= 7,
62*4882a593Smuzhiyun 	MP_BT_PKT_3DH5							= 8,
63*4882a593Smuzhiyun 	MP_BT_PKT_LE							= 9,
64*4882a593Smuzhiyun 	MP_BT_PKT_MAX
65*4882a593Smuzhiyun } MP_BT_PKT_TYPE, *PMP_BT_PKT_TYPE;
66*4882a593Smuzhiyun /* txrxPayloadType */
67*4882a593Smuzhiyun typedef enum _MP_BT_PAYLOAD_TYPE {
68*4882a593Smuzhiyun 	MP_BT_PAYLOAD_01010101					= 0,
69*4882a593Smuzhiyun 	MP_BT_PAYLOAD_ALL_1						= 1,
70*4882a593Smuzhiyun 	MP_BT_PAYLOAD_ALL_0						= 2,
71*4882a593Smuzhiyun 	MP_BT_PAYLOAD_11110000					= 3,
72*4882a593Smuzhiyun 	MP_BT_PAYLOAD_PRBS9						= 4,
73*4882a593Smuzhiyun 	MP_BT_PAYLOAD_MAX						= 8,
74*4882a593Smuzhiyun } MP_BT_PAYLOAD_TYPE, *PMP_BT_PAYLOAD_TYPE;
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun 
77*4882a593Smuzhiyun /* definition for BT_UP_OP_BT_TEST_CTRL */
78*4882a593Smuzhiyun typedef enum _MP_BT_TEST_CTRL {
79*4882a593Smuzhiyun 	MP_BT_TEST_STOP_ALL_TESTS						= 0,
80*4882a593Smuzhiyun 	MP_BT_TEST_START_RX_TEST						= 1,
81*4882a593Smuzhiyun 	MP_BT_TEST_START_PACKET_TX_TEST					= 2,
82*4882a593Smuzhiyun 	MP_BT_TEST_START_CONTINUOUS_TX_TEST			= 3,
83*4882a593Smuzhiyun 	MP_BT_TEST_START_INQUIRY_SCAN_TEST				= 4,
84*4882a593Smuzhiyun 	MP_BT_TEST_START_PAGE_SCAN_TEST					= 5,
85*4882a593Smuzhiyun 	MP_BT_TEST_START_INQUIRY_PAGE_SCAN_TEST			= 6,
86*4882a593Smuzhiyun 	MP_BT_TEST_START_LEGACY_CONNECT_TEST			= 7,
87*4882a593Smuzhiyun 	MP_BT_TEST_START_LE_CONNECT_TEST_INITIATOR		= 8,
88*4882a593Smuzhiyun 	MP_BT_TEST_START_LE_CONNECT_TEST_ADVERTISER	= 9,
89*4882a593Smuzhiyun 	MP_BT_TEST_MAX
90*4882a593Smuzhiyun } MP_BT_TEST_CTRL, *PMP_BT_TEST_CTRL;
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun typedef enum _RTL_EXT_C2H_EVT {
94*4882a593Smuzhiyun 	EXT_C2H_WIFI_FW_ACTIVE_RSP = 0,
95*4882a593Smuzhiyun 	EXT_C2H_TRIG_BY_BT_FW = 1,
96*4882a593Smuzhiyun 	MAX_EXT_C2HEVENT
97*4882a593Smuzhiyun } RTL_EXT_C2H_EVT;
98*4882a593Smuzhiyun 
99*4882a593Smuzhiyun /* OP codes definition between the user layer and driver */
100*4882a593Smuzhiyun typedef enum _BT_CTRL_OPCODE_UPPER {
101*4882a593Smuzhiyun 	BT_UP_OP_BT_READY										= 0x00,
102*4882a593Smuzhiyun 	BT_UP_OP_BT_SET_MODE									= 0x01,
103*4882a593Smuzhiyun 	BT_UP_OP_BT_SET_TX_RX_PARAMETER						= 0x02,
104*4882a593Smuzhiyun 	BT_UP_OP_BT_SET_GENERAL								= 0x03,
105*4882a593Smuzhiyun 	BT_UP_OP_BT_GET_GENERAL								= 0x04,
106*4882a593Smuzhiyun 	BT_UP_OP_BT_TEST_CTRL									= 0x05,
107*4882a593Smuzhiyun 	BT_UP_OP_TEST_BT										= 0x06,
108*4882a593Smuzhiyun 	BT_UP_OP_MAX
109*4882a593Smuzhiyun } BT_CTRL_OPCODE_UPPER, *PBT_CTRL_OPCODE_UPPER;
110*4882a593Smuzhiyun 
111*4882a593Smuzhiyun 
112*4882a593Smuzhiyun typedef enum _BT_SET_GENERAL {
113*4882a593Smuzhiyun 	BT_GSET_REG											= 0x00,
114*4882a593Smuzhiyun 	BT_GSET_RESET											= 0x01,
115*4882a593Smuzhiyun 	BT_GSET_TARGET_BD_ADDR									= 0x02,
116*4882a593Smuzhiyun 	BT_GSET_TX_PWR_FINETUNE								= 0x03,
117*4882a593Smuzhiyun 	BT_SET_TRACKING_INTERVAL								= 0x04,
118*4882a593Smuzhiyun 	BT_SET_THERMAL_METER									= 0x05,
119*4882a593Smuzhiyun 	BT_ENABLE_CFO_TRACKING									= 0x06,
120*4882a593Smuzhiyun 	BT_GSET_UPDATE_BT_PATCH								= 0x07,
121*4882a593Smuzhiyun 	BT_GSET_MAX
122*4882a593Smuzhiyun } BT_SET_GENERAL, *PBT_SET_GENERAL;
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun typedef enum _BT_GET_GENERAL {
125*4882a593Smuzhiyun 	BT_GGET_REG											= 0x00,
126*4882a593Smuzhiyun 	BT_GGET_STATUS											= 0x01,
127*4882a593Smuzhiyun 	BT_GGET_REPORT											= 0x02,
128*4882a593Smuzhiyun 	BT_GGET_AFH_MAP										= 0x03,
129*4882a593Smuzhiyun 	BT_GGET_AFH_STATUS										= 0x04,
130*4882a593Smuzhiyun 	BT_GGET_MAX
131*4882a593Smuzhiyun } BT_GET_GENERAL, *PBT_GET_GENERAL;
132*4882a593Smuzhiyun 
133*4882a593Smuzhiyun /* definition for BT_UP_OP_BT_SET_GENERAL */
134*4882a593Smuzhiyun typedef enum _BT_REG_TYPE {
135*4882a593Smuzhiyun 	BT_REG_RF								= 0,
136*4882a593Smuzhiyun 	BT_REG_MODEM							= 1,
137*4882a593Smuzhiyun 	BT_REG_BLUEWIZE						= 2,
138*4882a593Smuzhiyun 	BT_REG_VENDOR							= 3,
139*4882a593Smuzhiyun 	BT_REG_LE								= 4,
140*4882a593Smuzhiyun 	BT_REG_MAX
141*4882a593Smuzhiyun } BT_REG_TYPE, *PBT_REG_TYPE;
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun /* definition for BT_LO_OP_GET_AFH_MAP */
144*4882a593Smuzhiyun typedef enum _BT_AFH_MAP_TYPE {
145*4882a593Smuzhiyun 	BT_AFH_MAP_RESULT						= 0,
146*4882a593Smuzhiyun 	BT_AFH_MAP_WIFI_PSD_ONLY				= 1,
147*4882a593Smuzhiyun 	BT_AFH_MAP_WIFI_CH_BW_ONLY				= 2,
148*4882a593Smuzhiyun 	BT_AFH_MAP_BT_PSD_ONLY					= 3,
149*4882a593Smuzhiyun 	BT_AFH_MAP_HOST_CLASSIFICATION_ONLY	= 4,
150*4882a593Smuzhiyun 	BT_AFH_MAP_MAX
151*4882a593Smuzhiyun } BT_AFH_MAP_TYPE, *PBT_AFH_MAP_TYPE;
152*4882a593Smuzhiyun 
153*4882a593Smuzhiyun /* definition for BT_UP_OP_BT_GET_GENERAL */
154*4882a593Smuzhiyun typedef enum _BT_REPORT_TYPE {
155*4882a593Smuzhiyun 	BT_REPORT_RX_PACKET_CNT				= 0,
156*4882a593Smuzhiyun 	BT_REPORT_RX_ERROR_BITS				= 1,
157*4882a593Smuzhiyun 	BT_REPORT_RSSI							= 2,
158*4882a593Smuzhiyun 	BT_REPORT_CFO_HDR_QUALITY				= 3,
159*4882a593Smuzhiyun 	BT_REPORT_CONNECT_TARGET_BD_ADDR		= 4,
160*4882a593Smuzhiyun 	BT_REPORT_MAX
161*4882a593Smuzhiyun } BT_REPORT_TYPE, *PBT_REPORT_TYPE;
162*4882a593Smuzhiyun 
163*4882a593Smuzhiyun void
164*4882a593Smuzhiyun MPTBT_Test(
165*4882a593Smuzhiyun 		PADAPTER	Adapter,
166*4882a593Smuzhiyun 		u8		opCode,
167*4882a593Smuzhiyun 		u8		byte1,
168*4882a593Smuzhiyun 		u8		byte2,
169*4882a593Smuzhiyun 		u8		byte3
170*4882a593Smuzhiyun );
171*4882a593Smuzhiyun 
172*4882a593Smuzhiyun uint
173*4882a593Smuzhiyun MPTBT_SendOidBT(
174*4882a593Smuzhiyun 		PADAPTER		pAdapter,
175*4882a593Smuzhiyun 		void				*InformationBuffer,
176*4882a593Smuzhiyun 		u32				InformationBufferLength,
177*4882a593Smuzhiyun 		u32 				*BytesRead,
178*4882a593Smuzhiyun 		u32 				*BytesNeeded
179*4882a593Smuzhiyun );
180*4882a593Smuzhiyun 
181*4882a593Smuzhiyun void
182*4882a593Smuzhiyun MPTBT_FwC2hBtMpCtrl(
183*4882a593Smuzhiyun 	PADAPTER	Adapter,
184*4882a593Smuzhiyun 	u8 			*tmpBuf,
185*4882a593Smuzhiyun 	u8			length
186*4882a593Smuzhiyun );
187*4882a593Smuzhiyun 
188*4882a593Smuzhiyun void MPh2c_timeout_handle(void *FunctionContext);
189*4882a593Smuzhiyun 
190*4882a593Smuzhiyun void mptbt_BtControlProcess(
191*4882a593Smuzhiyun 	PADAPTER	Adapter,
192*4882a593Smuzhiyun 	void			*pInBuf
193*4882a593Smuzhiyun );
194*4882a593Smuzhiyun 
195*4882a593Smuzhiyun #define	BT_H2C_MAX_RETRY								1
196*4882a593Smuzhiyun #define	BT_MAX_C2H_LEN								20
197*4882a593Smuzhiyun 
198*4882a593Smuzhiyun typedef struct _BT_REQ_CMD {
199*4882a593Smuzhiyun 	u8       opCodeVer;
200*4882a593Smuzhiyun 	u8       OpCode;
201*4882a593Smuzhiyun 	u16      paraLength;
202*4882a593Smuzhiyun 	u8       pParamStart[100];
203*4882a593Smuzhiyun } BT_REQ_CMD, *PBT_REQ_CMD;
204*4882a593Smuzhiyun 
205*4882a593Smuzhiyun typedef struct _BT_RSP_CMD {
206*4882a593Smuzhiyun 	u16      status;
207*4882a593Smuzhiyun 	u16      paraLength;
208*4882a593Smuzhiyun 	u8       pParamStart[100];
209*4882a593Smuzhiyun } BT_RSP_CMD, *PBT_RSP_CMD;
210*4882a593Smuzhiyun 
211*4882a593Smuzhiyun 
212*4882a593Smuzhiyun typedef struct _BT_H2C {
213*4882a593Smuzhiyun 	u8	opCodeVer:4;
214*4882a593Smuzhiyun 	u8	reqNum:4;
215*4882a593Smuzhiyun 	u8	opCode;
216*4882a593Smuzhiyun 	u8	buf[100];
217*4882a593Smuzhiyun } BT_H2C, *PBT_H2C;
218*4882a593Smuzhiyun 
219*4882a593Smuzhiyun 
220*4882a593Smuzhiyun 
221*4882a593Smuzhiyun typedef struct _BT_EXT_C2H {
222*4882a593Smuzhiyun 	u8	extendId;
223*4882a593Smuzhiyun 	u8	statusCode:4;
224*4882a593Smuzhiyun 	u8	retLen:4;
225*4882a593Smuzhiyun 	u8	opCodeVer:4;
226*4882a593Smuzhiyun 	u8	reqNum:4;
227*4882a593Smuzhiyun 	u8	buf[100];
228*4882a593Smuzhiyun } BT_EXT_C2H, *PBT_EXT_C2H;
229*4882a593Smuzhiyun 
230*4882a593Smuzhiyun 
231*4882a593Smuzhiyun typedef enum _BT_OPCODE_STATUS {
232*4882a593Smuzhiyun 	BT_OP_STATUS_SUCCESS									= 0x00, /* Success */
233*4882a593Smuzhiyun 	BT_OP_STATUS_VERSION_MISMATCH							= 0x01,
234*4882a593Smuzhiyun 	BT_OP_STATUS_UNKNOWN_OPCODE								= 0x02,
235*4882a593Smuzhiyun 	BT_OP_STATUS_ERROR_PARAMETER							= 0x03,
236*4882a593Smuzhiyun 	BT_OP_STATUS_MAX
237*4882a593Smuzhiyun } BT_OPCODE_STATUS, *PBT_OPCODE_STATUS;
238*4882a593Smuzhiyun 
239*4882a593Smuzhiyun 
240*4882a593Smuzhiyun 
241*4882a593Smuzhiyun /* OP codes definition between driver and bt fw */
242*4882a593Smuzhiyun typedef enum _BT_CTRL_OPCODE_LOWER {
243*4882a593Smuzhiyun 	BT_LO_OP_GET_BT_VERSION									= 0x00,
244*4882a593Smuzhiyun 	BT_LO_OP_RESET												= 0x01,
245*4882a593Smuzhiyun 	BT_LO_OP_TEST_CTRL											= 0x02,
246*4882a593Smuzhiyun 	BT_LO_OP_SET_BT_MODE										= 0x03,
247*4882a593Smuzhiyun 	BT_LO_OP_SET_CHNL_TX_GAIN									= 0x04,
248*4882a593Smuzhiyun 	BT_LO_OP_SET_PKT_TYPE_LEN									= 0x05,
249*4882a593Smuzhiyun 	BT_LO_OP_SET_PKT_CNT_L_PL_TYPE								= 0x06,
250*4882a593Smuzhiyun 	BT_LO_OP_SET_PKT_CNT_H_PKT_INTV							= 0x07,
251*4882a593Smuzhiyun 	BT_LO_OP_SET_PKT_HEADER									= 0x08,
252*4882a593Smuzhiyun 	BT_LO_OP_SET_WHITENCOEFF									= 0x09,
253*4882a593Smuzhiyun 	BT_LO_OP_SET_BD_ADDR_L										= 0x0a,
254*4882a593Smuzhiyun 	BT_LO_OP_SET_BD_ADDR_H										= 0x0b,
255*4882a593Smuzhiyun 	BT_LO_OP_WRITE_REG_ADDR									= 0x0c,
256*4882a593Smuzhiyun 	BT_LO_OP_WRITE_REG_VALUE									= 0x0d,
257*4882a593Smuzhiyun 	BT_LO_OP_GET_BT_STATUS										= 0x0e,
258*4882a593Smuzhiyun 	BT_LO_OP_GET_BD_ADDR_L										= 0x0f,
259*4882a593Smuzhiyun 	BT_LO_OP_GET_BD_ADDR_H										= 0x10,
260*4882a593Smuzhiyun 	BT_LO_OP_READ_REG											= 0x11,
261*4882a593Smuzhiyun 	BT_LO_OP_SET_TARGET_BD_ADDR_L								= 0x12,
262*4882a593Smuzhiyun 	BT_LO_OP_SET_TARGET_BD_ADDR_H								= 0x13,
263*4882a593Smuzhiyun 	BT_LO_OP_SET_TX_POWER_CALIBRATION							= 0x14,
264*4882a593Smuzhiyun 	BT_LO_OP_GET_RX_PKT_CNT_L									= 0x15,
265*4882a593Smuzhiyun 	BT_LO_OP_GET_RX_PKT_CNT_H									= 0x16,
266*4882a593Smuzhiyun 	BT_LO_OP_GET_RX_ERROR_BITS_L								= 0x17,
267*4882a593Smuzhiyun 	BT_LO_OP_GET_RX_ERROR_BITS_H								= 0x18,
268*4882a593Smuzhiyun 	BT_LO_OP_GET_RSSI											= 0x19,
269*4882a593Smuzhiyun 	BT_LO_OP_GET_CFO_HDR_QUALITY_L								= 0x1a,
270*4882a593Smuzhiyun 	BT_LO_OP_GET_CFO_HDR_QUALITY_H								= 0x1b,
271*4882a593Smuzhiyun 	BT_LO_OP_GET_TARGET_BD_ADDR_L								= 0x1c,
272*4882a593Smuzhiyun 	BT_LO_OP_GET_TARGET_BD_ADDR_H								= 0x1d,
273*4882a593Smuzhiyun 	BT_LO_OP_GET_AFH_MAP_L										= 0x1e,
274*4882a593Smuzhiyun 	BT_LO_OP_GET_AFH_MAP_M										= 0x1f,
275*4882a593Smuzhiyun 	BT_LO_OP_GET_AFH_MAP_H										= 0x20,
276*4882a593Smuzhiyun 	BT_LO_OP_GET_AFH_STATUS									= 0x21,
277*4882a593Smuzhiyun 	BT_LO_OP_SET_TRACKING_INTERVAL								= 0x22,
278*4882a593Smuzhiyun 	BT_LO_OP_SET_THERMAL_METER									= 0x23,
279*4882a593Smuzhiyun 	BT_LO_OP_ENABLE_CFO_TRACKING								= 0x24,
280*4882a593Smuzhiyun 	BT_LO_OP_MAX
281*4882a593Smuzhiyun } BT_CTRL_OPCODE_LOWER, *PBT_CTRL_OPCODE_LOWER;
282*4882a593Smuzhiyun 
283*4882a593Smuzhiyun 
284*4882a593Smuzhiyun 
285*4882a593Smuzhiyun 
286*4882a593Smuzhiyun #endif  /* #if(MP_DRIVER == 1) */
287*4882a593Smuzhiyun 
288*4882a593Smuzhiyun #endif /*  #ifndef __INC_MPT_BT_H */
289