1*4882a593Smuzhiyun /****************************************************************************** 2*4882a593Smuzhiyun * 3*4882a593Smuzhiyun * Copyright(c) 2007 - 2017 Realtek Corporation. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify it 6*4882a593Smuzhiyun * under the terms of version 2 of the GNU General Public License as 7*4882a593Smuzhiyun * published by the Free Software Foundation. 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * This program is distributed in the hope that it will be useful, but WITHOUT 10*4882a593Smuzhiyun * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11*4882a593Smuzhiyun * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12*4882a593Smuzhiyun * more details. 13*4882a593Smuzhiyun * 14*4882a593Smuzhiyun *****************************************************************************/ 15*4882a593Smuzhiyun #ifndef __RTL8723B_HAL_H__ 16*4882a593Smuzhiyun #define __RTL8723B_HAL_H__ 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun #include "hal_data.h" 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun #include "rtl8723b_spec.h" 21*4882a593Smuzhiyun #include "rtl8723b_rf.h" 22*4882a593Smuzhiyun #include "rtl8723b_dm.h" 23*4882a593Smuzhiyun #include "rtl8723b_recv.h" 24*4882a593Smuzhiyun #include "rtl8723b_xmit.h" 25*4882a593Smuzhiyun #include "rtl8723b_cmd.h" 26*4882a593Smuzhiyun #include "rtl8723b_led.h" 27*4882a593Smuzhiyun #include "Hal8723BPwrSeq.h" 28*4882a593Smuzhiyun #include "Hal8723BPhyReg.h" 29*4882a593Smuzhiyun #include "Hal8723BPhyCfg.h" 30*4882a593Smuzhiyun #ifdef DBG_CONFIG_ERROR_DETECT 31*4882a593Smuzhiyun #include "rtl8723b_sreset.h" 32*4882a593Smuzhiyun #endif 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun #define FW_8723B_SIZE 0x8000 35*4882a593Smuzhiyun #define FW_8723B_START_ADDRESS 0x1000 36*4882a593Smuzhiyun #define FW_8723B_END_ADDRESS 0x1FFF /* 0x5FFF */ 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun #define IS_FW_HEADER_EXIST_8723B(_pFwHdr) ((le16_to_cpu(_pFwHdr->Signature) & 0xFFF0) == 0x5300) 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun typedef struct _RT_FIRMWARE { 41*4882a593Smuzhiyun FIRMWARE_SOURCE eFWSource; 42*4882a593Smuzhiyun #ifdef CONFIG_EMBEDDED_FWIMG 43*4882a593Smuzhiyun u8 *szFwBuffer; 44*4882a593Smuzhiyun #else 45*4882a593Smuzhiyun u8 szFwBuffer[FW_8723B_SIZE]; 46*4882a593Smuzhiyun #endif 47*4882a593Smuzhiyun u32 ulFwLength; 48*4882a593Smuzhiyun } RT_FIRMWARE_8723B, *PRT_FIRMWARE_8723B; 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun /* 51*4882a593Smuzhiyun * This structure must be cared byte-ordering 52*4882a593Smuzhiyun * 53*4882a593Smuzhiyun * Added by tynli. 2009.12.04. */ 54*4882a593Smuzhiyun typedef struct _RT_8723B_FIRMWARE_HDR { 55*4882a593Smuzhiyun /* 8-byte alinment required */ 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun /* --- LONG WORD 0 ---- */ 58*4882a593Smuzhiyun u16 Signature; /* 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut */ 59*4882a593Smuzhiyun u8 Category; /* AP/NIC and USB/PCI */ 60*4882a593Smuzhiyun u8 Function; /* Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions */ 61*4882a593Smuzhiyun u16 Version; /* FW Version */ 62*4882a593Smuzhiyun u16 Subversion; /* FW Subversion, default 0x00 */ 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun /* --- LONG WORD 1 ---- */ 65*4882a593Smuzhiyun u8 Month; /* Release time Month field */ 66*4882a593Smuzhiyun u8 Date; /* Release time Date field */ 67*4882a593Smuzhiyun u8 Hour; /* Release time Hour field */ 68*4882a593Smuzhiyun u8 Minute; /* Release time Minute field */ 69*4882a593Smuzhiyun u16 RamCodeSize; /* The size of RAM code */ 70*4882a593Smuzhiyun u16 Rsvd2; 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun /* --- LONG WORD 2 ---- */ 73*4882a593Smuzhiyun u32 SvnIdx; /* The SVN entry index */ 74*4882a593Smuzhiyun u32 Rsvd3; 75*4882a593Smuzhiyun 76*4882a593Smuzhiyun /* --- LONG WORD 3 ---- */ 77*4882a593Smuzhiyun u32 Rsvd4; 78*4882a593Smuzhiyun u32 Rsvd5; 79*4882a593Smuzhiyun } RT_8723B_FIRMWARE_HDR, *PRT_8723B_FIRMWARE_HDR; 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun #define DRIVER_EARLY_INT_TIME_8723B 0x05 82*4882a593Smuzhiyun #define BCN_DMA_ATIME_INT_TIME_8723B 0x02 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun /* for 8723B 85*4882a593Smuzhiyun * TX 32K, RX 16K, Page size 128B for TX, 8B for RX */ 86*4882a593Smuzhiyun #define PAGE_SIZE_TX_8723B 128 87*4882a593Smuzhiyun #define PAGE_SIZE_RX_8723B 8 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun #define TX_DMA_SIZE_8723B 0x8000 /* 32K(TX) */ 90*4882a593Smuzhiyun #define RX_DMA_SIZE_8723B 0x4000 /* 16K(RX) */ 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun #ifdef CONFIG_WOWLAN 93*4882a593Smuzhiyun #define RESV_FMWF (WKFMCAM_SIZE * MAX_WKFM_CAM_NUM) /* 16 entries, for each is 24 bytes*/ 94*4882a593Smuzhiyun #else 95*4882a593Smuzhiyun #define RESV_FMWF 0 96*4882a593Smuzhiyun #endif 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun #ifdef CONFIG_FW_C2H_DEBUG 99*4882a593Smuzhiyun #define RX_DMA_RESERVED_SIZE_8723B 0x100 /* 256B, reserved for c2h debug message */ 100*4882a593Smuzhiyun #else 101*4882a593Smuzhiyun #define RX_DMA_RESERVED_SIZE_8723B 0x80 /* 128B, reserved for tx report */ 102*4882a593Smuzhiyun #endif 103*4882a593Smuzhiyun #define RX_DMA_BOUNDARY_8723B (RX_DMA_SIZE_8723B - RX_DMA_RESERVED_SIZE_8723B - 1) 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun 106*4882a593Smuzhiyun /* Note: We will divide number of page equally for each queue other than public queue! */ 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun /* For General Reserved Page Number(Beacon Queue is reserved page) 109*4882a593Smuzhiyun * Beacon:MAX_BEACON_LEN/PAGE_SIZE_TX_8723B 110*4882a593Smuzhiyun * PS-Poll:1, Null Data:1,Qos Null Data:1,BT Qos Null Data:1,CTS-2-SELF,LTE QoS Null*/ 111*4882a593Smuzhiyun #define BCNQ_PAGE_NUM_8723B (MAX_BEACON_LEN / PAGE_SIZE_TX_8723B + 6) /*0x08*/ 112*4882a593Smuzhiyun 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun /* For WoWLan , more reserved page 115*4882a593Smuzhiyun * ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:2,GTK EXT MEM:2, AOAC rpt: 1,PNO: 6 116*4882a593Smuzhiyun * NS offload: 2 NDP info: 1 117*4882a593Smuzhiyun */ 118*4882a593Smuzhiyun #ifdef CONFIG_WOWLAN 119*4882a593Smuzhiyun #define WOWLAN_PAGE_NUM_8723B 0x0b 120*4882a593Smuzhiyun #else 121*4882a593Smuzhiyun #define WOWLAN_PAGE_NUM_8723B 0x00 122*4882a593Smuzhiyun #endif 123*4882a593Smuzhiyun 124*4882a593Smuzhiyun #ifdef CONFIG_PNO_SUPPORT 125*4882a593Smuzhiyun #undef WOWLAN_PAGE_NUM_8723B 126*4882a593Smuzhiyun #define WOWLAN_PAGE_NUM_8723B 0x15 127*4882a593Smuzhiyun #endif 128*4882a593Smuzhiyun 129*4882a593Smuzhiyun #ifdef CONFIG_AP_WOWLAN 130*4882a593Smuzhiyun #define AP_WOWLAN_PAGE_NUM_8723B 0x02 131*4882a593Smuzhiyun #endif 132*4882a593Smuzhiyun 133*4882a593Smuzhiyun #define TX_TOTAL_PAGE_NUMBER_8723B (0xFF - BCNQ_PAGE_NUM_8723B - WOWLAN_PAGE_NUM_8723B) 134*4882a593Smuzhiyun #define TX_PAGE_BOUNDARY_8723B (TX_TOTAL_PAGE_NUMBER_8723B + 1) 135*4882a593Smuzhiyun 136*4882a593Smuzhiyun #define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8723B TX_TOTAL_PAGE_NUMBER_8723B 137*4882a593Smuzhiyun #define WMM_NORMAL_TX_PAGE_BOUNDARY_8723B (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8723B + 1) 138*4882a593Smuzhiyun 139*4882a593Smuzhiyun /* For Normal Chip Setting 140*4882a593Smuzhiyun * (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_8723B */ 141*4882a593Smuzhiyun #define NORMAL_PAGE_NUM_HPQ_8723B 0x0C 142*4882a593Smuzhiyun #define NORMAL_PAGE_NUM_LPQ_8723B 0x02 143*4882a593Smuzhiyun #define NORMAL_PAGE_NUM_NPQ_8723B 0x02 144*4882a593Smuzhiyun #define NORMAL_PAGE_NUM_EPQ_8723B 0x04 145*4882a593Smuzhiyun 146*4882a593Smuzhiyun /* Note: For Normal Chip Setting, modify later */ 147*4882a593Smuzhiyun #define WMM_NORMAL_PAGE_NUM_HPQ_8723B 0x30 148*4882a593Smuzhiyun #define WMM_NORMAL_PAGE_NUM_LPQ_8723B 0x20 149*4882a593Smuzhiyun #define WMM_NORMAL_PAGE_NUM_NPQ_8723B 0x20 150*4882a593Smuzhiyun #define WMM_NORMAL_PAGE_NUM_EPQ_8723B 0x00 151*4882a593Smuzhiyun 152*4882a593Smuzhiyun 153*4882a593Smuzhiyun #include "HalVerDef.h" 154*4882a593Smuzhiyun #include "hal_com.h" 155*4882a593Smuzhiyun 156*4882a593Smuzhiyun #define EFUSE_OOB_PROTECT_BYTES 15 157*4882a593Smuzhiyun 158*4882a593Smuzhiyun #define HAL_EFUSE_MEMORY 159*4882a593Smuzhiyun 160*4882a593Smuzhiyun #define HWSET_MAX_SIZE_8723B 512 161*4882a593Smuzhiyun #define EFUSE_REAL_CONTENT_LEN_8723B 512 162*4882a593Smuzhiyun #define EFUSE_MAP_LEN_8723B 512 163*4882a593Smuzhiyun #define EFUSE_MAX_SECTION_8723B 64 164*4882a593Smuzhiyun 165*4882a593Smuzhiyun #define EFUSE_IC_ID_OFFSET 506 /* For some inferiority IC purpose. added by Roger, 2009.09.02. */ 166*4882a593Smuzhiyun #define AVAILABLE_EFUSE_ADDR(addr) (addr < EFUSE_REAL_CONTENT_LEN_8723B) 167*4882a593Smuzhiyun 168*4882a593Smuzhiyun #define EFUSE_ACCESS_ON 0x69 /* For RTL8723 only. */ 169*4882a593Smuzhiyun #define EFUSE_ACCESS_OFF 0x00 /* For RTL8723 only. */ 170*4882a593Smuzhiyun 171*4882a593Smuzhiyun /* ******************************************************** 172*4882a593Smuzhiyun * EFUSE for BT definition 173*4882a593Smuzhiyun * ******************************************************** */ 174*4882a593Smuzhiyun #define EFUSE_BT_REAL_BANK_CONTENT_LEN 512 175*4882a593Smuzhiyun #define EFUSE_BT_REAL_CONTENT_LEN 1536 /* 512*3 */ 176*4882a593Smuzhiyun #define EFUSE_BT_MAP_LEN 1024 /* 1k bytes */ 177*4882a593Smuzhiyun #define EFUSE_BT_MAX_SECTION 128 /* 1024/8 */ 178*4882a593Smuzhiyun 179*4882a593Smuzhiyun #define EFUSE_PROTECT_BYTES_BANK 16 180*4882a593Smuzhiyun 181*4882a593Smuzhiyun typedef enum tag_Package_Definition { 182*4882a593Smuzhiyun PACKAGE_DEFAULT, 183*4882a593Smuzhiyun PACKAGE_QFN68, 184*4882a593Smuzhiyun PACKAGE_TFBGA90, 185*4882a593Smuzhiyun PACKAGE_TFBGA80, 186*4882a593Smuzhiyun PACKAGE_TFBGA79 187*4882a593Smuzhiyun } PACKAGE_TYPE_E; 188*4882a593Smuzhiyun 189*4882a593Smuzhiyun #define INCLUDE_MULTI_FUNC_BT(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT) 190*4882a593Smuzhiyun #define INCLUDE_MULTI_FUNC_GPS(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS) 191*4882a593Smuzhiyun 192*4882a593Smuzhiyun /* rtl8723a_hal_init.c */ 193*4882a593Smuzhiyun s32 rtl8723b_FirmwareDownload(PADAPTER padapter, BOOLEAN bUsedWoWLANFw); 194*4882a593Smuzhiyun void rtl8723b_FirmwareSelfReset(PADAPTER padapter); 195*4882a593Smuzhiyun void rtl8723b_InitializeFirmwareVars(PADAPTER padapter); 196*4882a593Smuzhiyun 197*4882a593Smuzhiyun void rtl8723b_InitAntenna_Selection(PADAPTER padapter); 198*4882a593Smuzhiyun void rtl8723b_DeinitAntenna_Selection(PADAPTER padapter); 199*4882a593Smuzhiyun void rtl8723b_CheckAntenna_Selection(PADAPTER padapter); 200*4882a593Smuzhiyun void rtl8723b_init_default_value(PADAPTER padapter); 201*4882a593Smuzhiyun 202*4882a593Smuzhiyun s32 rtl8723b_InitLLTTable(PADAPTER padapter); 203*4882a593Smuzhiyun 204*4882a593Smuzhiyun s32 CardDisableHWSM(PADAPTER padapter, u8 resetMCU); 205*4882a593Smuzhiyun s32 CardDisableWithoutHWSM(PADAPTER padapter); 206*4882a593Smuzhiyun 207*4882a593Smuzhiyun /* EFuse */ 208*4882a593Smuzhiyun u8 GetEEPROMSize8723B(PADAPTER padapter); 209*4882a593Smuzhiyun void Hal_InitPGData(PADAPTER padapter, u8 *PROMContent); 210*4882a593Smuzhiyun void Hal_EfuseParseIDCode(PADAPTER padapter, u8 *hwinfo); 211*4882a593Smuzhiyun void Hal_EfuseParseTxPowerInfo_8723B(PADAPTER padapter, u8 *PROMContent, BOOLEAN AutoLoadFail); 212*4882a593Smuzhiyun void Hal_EfuseParseBTCoexistInfo_8723B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); 213*4882a593Smuzhiyun void Hal_EfuseParseEEPROMVer_8723B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); 214*4882a593Smuzhiyun void Hal_EfuseParseChnlPlan_8723B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); 215*4882a593Smuzhiyun void Hal_EfuseParseCustomerID_8723B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); 216*4882a593Smuzhiyun void Hal_EfuseParseAntennaDiversity_8723B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); 217*4882a593Smuzhiyun void Hal_EfuseParseXtal_8723B(PADAPTER pAdapter, u8 *hwinfo, u8 AutoLoadFail); 218*4882a593Smuzhiyun void Hal_EfuseParseThermalMeter_8723B(PADAPTER padapter, u8 *hwinfo, u8 AutoLoadFail); 219*4882a593Smuzhiyun void Hal_EfuseParsePackageType_8723B(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); 220*4882a593Smuzhiyun void Hal_EfuseParseVoltage_8723B(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); 221*4882a593Smuzhiyun void Hal_EfuseParseBoardType_8723B(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); 222*4882a593Smuzhiyun 223*4882a593Smuzhiyun void rtl8723b_set_hal_ops(struct hal_ops *pHalFunc); 224*4882a593Smuzhiyun void init_hal_spec_8723b(_adapter *adapter); 225*4882a593Smuzhiyun u8 SetHwReg8723B(PADAPTER padapter, u8 variable, u8 *val); 226*4882a593Smuzhiyun void GetHwReg8723B(PADAPTER padapter, u8 variable, u8 *val); 227*4882a593Smuzhiyun u8 SetHalDefVar8723B(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); 228*4882a593Smuzhiyun u8 GetHalDefVar8723B(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); 229*4882a593Smuzhiyun 230*4882a593Smuzhiyun /* register */ 231*4882a593Smuzhiyun void rtl8723b_InitBeaconParameters(PADAPTER padapter); 232*4882a593Smuzhiyun void rtl8723b_InitBeaconMaxError(PADAPTER padapter, u8 InfraMode); 233*4882a593Smuzhiyun void _InitBurstPktLen_8723BS(PADAPTER Adapter); 234*4882a593Smuzhiyun void _8051Reset8723(PADAPTER padapter); 235*4882a593Smuzhiyun #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) 236*4882a593Smuzhiyun void Hal_DetectWoWMode(PADAPTER pAdapter); 237*4882a593Smuzhiyun #endif /* CONFIG_WOWLAN */ 238*4882a593Smuzhiyun 239*4882a593Smuzhiyun void rtl8723b_start_thread(_adapter *padapter); 240*4882a593Smuzhiyun void rtl8723b_stop_thread(_adapter *padapter); 241*4882a593Smuzhiyun 242*4882a593Smuzhiyun #if defined(CONFIG_CHECK_BT_HANG) && defined(CONFIG_BT_COEXIST) 243*4882a593Smuzhiyun void rtl8723bs_init_checkbthang_workqueue(_adapter *adapter); 244*4882a593Smuzhiyun void rtl8723bs_free_checkbthang_workqueue(_adapter *adapter); 245*4882a593Smuzhiyun void rtl8723bs_cancle_checkbthang_workqueue(_adapter *adapter); 246*4882a593Smuzhiyun void rtl8723bs_hal_check_bt_hang(_adapter *adapter); 247*4882a593Smuzhiyun #endif 248*4882a593Smuzhiyun 249*4882a593Smuzhiyun #ifdef CONFIG_GPIO_WAKEUP 250*4882a593Smuzhiyun void HalSetOutPutGPIO(PADAPTER padapter, u8 index, u8 OutPutValue); 251*4882a593Smuzhiyun #endif 252*4882a593Smuzhiyun #ifdef CONFIG_MP_INCLUDED 253*4882a593Smuzhiyun int FirmwareDownloadBT(PADAPTER Adapter, PRT_MP_FIRMWARE pFirmware); 254*4882a593Smuzhiyun #endif 255*4882a593Smuzhiyun void CCX_FwC2HTxRpt_8723b(PADAPTER padapter, u8 *pdata, u8 len); 256*4882a593Smuzhiyun 257*4882a593Smuzhiyun u8 MRateToHwRate8723B(u8 rate); 258*4882a593Smuzhiyun u8 HwRateToMRate8723B(u8 rate); 259*4882a593Smuzhiyun 260*4882a593Smuzhiyun #ifdef CONFIG_RF_POWER_TRIM 261*4882a593Smuzhiyun void Hal_ReadRFGainOffset(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); 262*4882a593Smuzhiyun #endif /*CONFIG_RF_POWER_TRIM*/ 263*4882a593Smuzhiyun 264*4882a593Smuzhiyun #ifdef CONFIG_PCI_HCI 265*4882a593Smuzhiyun BOOLEAN InterruptRecognized8723BE(PADAPTER Adapter); 266*4882a593Smuzhiyun void UpdateInterruptMask8723BE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1); 267*4882a593Smuzhiyun #endif 268*4882a593Smuzhiyun 269*4882a593Smuzhiyun #ifdef CONFIG_GPIO_API 270*4882a593Smuzhiyun int rtl8723b_GpioFuncCheck(PADAPTER adapter, u8 gpio_num); 271*4882a593Smuzhiyun void rtl8723b_GpioMultiFuncReset(PADAPTER adapter, u8 gpio_num); 272*4882a593Smuzhiyun #endif 273*4882a593Smuzhiyun 274*4882a593Smuzhiyun #endif 275