1*4882a593Smuzhiyun /****************************************************************************** 2*4882a593Smuzhiyun * 3*4882a593Smuzhiyun * Copyright(c) 2007 - 2017 Realtek Corporation. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify it 6*4882a593Smuzhiyun * under the terms of version 2 of the GNU General Public License as 7*4882a593Smuzhiyun * published by the Free Software Foundation. 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * This program is distributed in the hope that it will be useful, but WITHOUT 10*4882a593Smuzhiyun * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11*4882a593Smuzhiyun * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12*4882a593Smuzhiyun * more details. 13*4882a593Smuzhiyun * 14*4882a593Smuzhiyun *****************************************************************************/ 15*4882a593Smuzhiyun #ifndef __HAL_PHY_H__ 16*4882a593Smuzhiyun #define __HAL_PHY_H__ 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun #if DISABLE_BB_RF 20*4882a593Smuzhiyun #define HAL_FW_ENABLE 0 21*4882a593Smuzhiyun #define HAL_MAC_ENABLE 0 22*4882a593Smuzhiyun #define HAL_BB_ENABLE 0 23*4882a593Smuzhiyun #define HAL_RF_ENABLE 0 24*4882a593Smuzhiyun #else /* FPGA_PHY and ASIC */ 25*4882a593Smuzhiyun #define HAL_FW_ENABLE 1 26*4882a593Smuzhiyun #define HAL_MAC_ENABLE 1 27*4882a593Smuzhiyun #define HAL_BB_ENABLE 1 28*4882a593Smuzhiyun #define HAL_RF_ENABLE 1 29*4882a593Smuzhiyun #endif 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun #define RF6052_MAX_TX_PWR 0x3F 32*4882a593Smuzhiyun #define RF6052_MAX_REG_88E 0xFF 33*4882a593Smuzhiyun #define RF6052_MAX_REG_92C 0x7F 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun #define RF6052_MAX_REG \ 36*4882a593Smuzhiyun ((RF6052_MAX_REG_88E > RF6052_MAX_REG_92C) ? RF6052_MAX_REG_88E : RF6052_MAX_REG_92C) 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun #define GET_RF6052_REAL_MAX_REG(_Adapter) \ 39*4882a593Smuzhiyun (IS_HARDWARE_TYPE_8188E(_Adapter) ? RF6052_MAX_REG_88E : RF6052_MAX_REG_92C) 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun #define RF6052_MAX_PATH 2 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun /* 44*4882a593Smuzhiyun * Antenna detection method, i.e., using single tone detection or RSSI reported from each antenna detected. 45*4882a593Smuzhiyun * Added by Roger, 2013.05.22. 46*4882a593Smuzhiyun * */ 47*4882a593Smuzhiyun #define ANT_DETECT_BY_SINGLE_TONE BIT0 48*4882a593Smuzhiyun #define ANT_DETECT_BY_RSSI BIT1 49*4882a593Smuzhiyun #define IS_ANT_DETECT_SUPPORT_SINGLE_TONE(__Adapter) ((GET_HAL_DATA(__Adapter)->AntDetection) & ANT_DETECT_BY_SINGLE_TONE) 50*4882a593Smuzhiyun #define IS_ANT_DETECT_SUPPORT_RSSI(__Adapter) ((GET_HAL_DATA(__Adapter)->AntDetection) & ANT_DETECT_BY_RSSI) 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun /*--------------------------Define Parameters-------------------------------*/ 54*4882a593Smuzhiyun typedef enum _RF_CHIP { 55*4882a593Smuzhiyun RF_CHIP_MIN = 0, /* 0 */ 56*4882a593Smuzhiyun RF_8225 = 1, /* 1 11b/g RF for verification only */ 57*4882a593Smuzhiyun RF_8256 = 2, /* 2 11b/g/n */ 58*4882a593Smuzhiyun RF_8258 = 3, /* 3 11a/b/g/n RF */ 59*4882a593Smuzhiyun RF_6052 = 4, /* 4 11b/g/n RF */ 60*4882a593Smuzhiyun RF_PSEUDO_11N = 5, /* 5, It is a temporality RF. */ 61*4882a593Smuzhiyun RF_CHIP_MAX 62*4882a593Smuzhiyun } RF_CHIP_E, *PRF_CHIP_E; 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun typedef enum _ANTENNA_PATH { 65*4882a593Smuzhiyun ANTENNA_NONE = 0, 66*4882a593Smuzhiyun ANTENNA_D = 1, 67*4882a593Smuzhiyun ANTENNA_C = 2, 68*4882a593Smuzhiyun ANTENNA_CD = 3, 69*4882a593Smuzhiyun ANTENNA_B = 4, 70*4882a593Smuzhiyun ANTENNA_BD = 5, 71*4882a593Smuzhiyun ANTENNA_BC = 6, 72*4882a593Smuzhiyun ANTENNA_BCD = 7, 73*4882a593Smuzhiyun ANTENNA_A = 8, 74*4882a593Smuzhiyun ANTENNA_AD = 9, 75*4882a593Smuzhiyun ANTENNA_AC = 10, 76*4882a593Smuzhiyun ANTENNA_ACD = 11, 77*4882a593Smuzhiyun ANTENNA_AB = 12, 78*4882a593Smuzhiyun ANTENNA_ABD = 13, 79*4882a593Smuzhiyun ANTENNA_ABC = 14, 80*4882a593Smuzhiyun ANTENNA_ABCD = 15 81*4882a593Smuzhiyun } ANTENNA_PATH; 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun typedef enum _RF_CONTENT { 84*4882a593Smuzhiyun radioa_txt = 0x1000, 85*4882a593Smuzhiyun radiob_txt = 0x1001, 86*4882a593Smuzhiyun radioc_txt = 0x1002, 87*4882a593Smuzhiyun radiod_txt = 0x1003 88*4882a593Smuzhiyun } RF_CONTENT; 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun typedef enum _BaseBand_Config_Type { 91*4882a593Smuzhiyun BaseBand_Config_PHY_REG = 0, /* Radio Path A */ 92*4882a593Smuzhiyun BaseBand_Config_AGC_TAB = 1, /* Radio Path B */ 93*4882a593Smuzhiyun BaseBand_Config_AGC_TAB_2G = 2, 94*4882a593Smuzhiyun BaseBand_Config_AGC_TAB_5G = 3, 95*4882a593Smuzhiyun BaseBand_Config_PHY_REG_PG 96*4882a593Smuzhiyun } BaseBand_Config_Type, *PBaseBand_Config_Type; 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun typedef enum _HW_BLOCK { 99*4882a593Smuzhiyun HW_BLOCK_MAC = 0, 100*4882a593Smuzhiyun HW_BLOCK_PHY0 = 1, 101*4882a593Smuzhiyun HW_BLOCK_PHY1 = 2, 102*4882a593Smuzhiyun HW_BLOCK_RF = 3, 103*4882a593Smuzhiyun HW_BLOCK_MAXIMUM = 4, /* Never use this */ 104*4882a593Smuzhiyun } HW_BLOCK_E, *PHW_BLOCK_E; 105*4882a593Smuzhiyun 106*4882a593Smuzhiyun typedef enum _WIRELESS_MODE { 107*4882a593Smuzhiyun WIRELESS_MODE_UNKNOWN = 0x00, 108*4882a593Smuzhiyun WIRELESS_MODE_A = 0x01, 109*4882a593Smuzhiyun WIRELESS_MODE_B = 0x02, 110*4882a593Smuzhiyun WIRELESS_MODE_G = 0x04, 111*4882a593Smuzhiyun WIRELESS_MODE_AUTO = 0x08, 112*4882a593Smuzhiyun WIRELESS_MODE_N_24G = 0x10, 113*4882a593Smuzhiyun WIRELESS_MODE_N_5G = 0x20, 114*4882a593Smuzhiyun WIRELESS_MODE_AC_5G = 0x40, 115*4882a593Smuzhiyun WIRELESS_MODE_AC_24G = 0x80, 116*4882a593Smuzhiyun WIRELESS_MODE_AC_ONLY = 0x100, 117*4882a593Smuzhiyun } WIRELESS_MODE; 118*4882a593Smuzhiyun 119*4882a593Smuzhiyun typedef enum _SwChnlCmdID { 120*4882a593Smuzhiyun CmdID_End, 121*4882a593Smuzhiyun CmdID_SetTxPowerLevel, 122*4882a593Smuzhiyun CmdID_BBRegWrite10, 123*4882a593Smuzhiyun CmdID_WritePortUlong, 124*4882a593Smuzhiyun CmdID_WritePortUshort, 125*4882a593Smuzhiyun CmdID_WritePortUchar, 126*4882a593Smuzhiyun CmdID_RF_WriteReg, 127*4882a593Smuzhiyun } SwChnlCmdID; 128*4882a593Smuzhiyun 129*4882a593Smuzhiyun typedef struct _SwChnlCmd { 130*4882a593Smuzhiyun SwChnlCmdID CmdID; 131*4882a593Smuzhiyun u32 Para1; 132*4882a593Smuzhiyun u32 Para2; 133*4882a593Smuzhiyun u32 msDelay; 134*4882a593Smuzhiyun } SwChnlCmd; 135*4882a593Smuzhiyun 136*4882a593Smuzhiyun typedef struct _R_ANTENNA_SELECT_OFDM { 137*4882a593Smuzhiyun u32 r_tx_antenna:4; 138*4882a593Smuzhiyun u32 r_ant_l:4; 139*4882a593Smuzhiyun u32 r_ant_non_ht:4; 140*4882a593Smuzhiyun u32 r_ant_ht1:4; 141*4882a593Smuzhiyun u32 r_ant_ht2:4; 142*4882a593Smuzhiyun u32 r_ant_ht_s1:4; 143*4882a593Smuzhiyun u32 r_ant_non_ht_s1:4; 144*4882a593Smuzhiyun u32 OFDM_TXSC:2; 145*4882a593Smuzhiyun u32 Reserved:2; 146*4882a593Smuzhiyun } R_ANTENNA_SELECT_OFDM; 147*4882a593Smuzhiyun 148*4882a593Smuzhiyun typedef struct _R_ANTENNA_SELECT_CCK { 149*4882a593Smuzhiyun u8 r_cckrx_enable_2:2; 150*4882a593Smuzhiyun u8 r_cckrx_enable:2; 151*4882a593Smuzhiyun u8 r_ccktx_enable:4; 152*4882a593Smuzhiyun } R_ANTENNA_SELECT_CCK; 153*4882a593Smuzhiyun 154*4882a593Smuzhiyun 155*4882a593Smuzhiyun /*--------------------------Exported Function prototype---------------------*/ 156*4882a593Smuzhiyun u32 157*4882a593Smuzhiyun PHY_CalculateBitShift( 158*4882a593Smuzhiyun u32 BitMask 159*4882a593Smuzhiyun ); 160*4882a593Smuzhiyun 161*4882a593Smuzhiyun #ifdef CONFIG_RF_SHADOW_RW 162*4882a593Smuzhiyun typedef struct RF_Shadow_Compare_Map { 163*4882a593Smuzhiyun /* Shadow register value */ 164*4882a593Smuzhiyun u32 Value; 165*4882a593Smuzhiyun /* Compare or not flag */ 166*4882a593Smuzhiyun u8 Compare; 167*4882a593Smuzhiyun /* Record If it had ever modified unpredicted */ 168*4882a593Smuzhiyun u8 ErrorOrNot; 169*4882a593Smuzhiyun /* Recorver Flag */ 170*4882a593Smuzhiyun u8 Recorver; 171*4882a593Smuzhiyun /* */ 172*4882a593Smuzhiyun u8 Driver_Write; 173*4882a593Smuzhiyun } RF_SHADOW_T; 174*4882a593Smuzhiyun 175*4882a593Smuzhiyun u32 176*4882a593Smuzhiyun PHY_RFShadowRead( 177*4882a593Smuzhiyun PADAPTER Adapter, 178*4882a593Smuzhiyun enum rf_path eRFPath, 179*4882a593Smuzhiyun u32 Offset); 180*4882a593Smuzhiyun 181*4882a593Smuzhiyun void 182*4882a593Smuzhiyun PHY_RFShadowWrite( 183*4882a593Smuzhiyun PADAPTER Adapter, 184*4882a593Smuzhiyun enum rf_path eRFPath, 185*4882a593Smuzhiyun u32 Offset, 186*4882a593Smuzhiyun u32 Data); 187*4882a593Smuzhiyun 188*4882a593Smuzhiyun BOOLEAN 189*4882a593Smuzhiyun PHY_RFShadowCompare( 190*4882a593Smuzhiyun PADAPTER Adapter, 191*4882a593Smuzhiyun enum rf_path eRFPath, 192*4882a593Smuzhiyun u32 Offset); 193*4882a593Smuzhiyun 194*4882a593Smuzhiyun void 195*4882a593Smuzhiyun PHY_RFShadowRecorver( 196*4882a593Smuzhiyun PADAPTER Adapter, 197*4882a593Smuzhiyun enum rf_path eRFPath, 198*4882a593Smuzhiyun u32 Offset); 199*4882a593Smuzhiyun 200*4882a593Smuzhiyun void 201*4882a593Smuzhiyun PHY_RFShadowCompareAll( 202*4882a593Smuzhiyun PADAPTER Adapter); 203*4882a593Smuzhiyun 204*4882a593Smuzhiyun void 205*4882a593Smuzhiyun PHY_RFShadowRecorverAll( 206*4882a593Smuzhiyun PADAPTER Adapter); 207*4882a593Smuzhiyun 208*4882a593Smuzhiyun void 209*4882a593Smuzhiyun PHY_RFShadowCompareFlagSet( 210*4882a593Smuzhiyun PADAPTER Adapter, 211*4882a593Smuzhiyun enum rf_path eRFPath, 212*4882a593Smuzhiyun u32 Offset, 213*4882a593Smuzhiyun u8 Type); 214*4882a593Smuzhiyun 215*4882a593Smuzhiyun void 216*4882a593Smuzhiyun PHY_RFShadowRecorverFlagSet( 217*4882a593Smuzhiyun PADAPTER Adapter, 218*4882a593Smuzhiyun enum rf_path eRFPath, 219*4882a593Smuzhiyun u32 Offset, 220*4882a593Smuzhiyun u8 Type); 221*4882a593Smuzhiyun 222*4882a593Smuzhiyun void 223*4882a593Smuzhiyun PHY_RFShadowCompareFlagSetAll( 224*4882a593Smuzhiyun PADAPTER Adapter); 225*4882a593Smuzhiyun 226*4882a593Smuzhiyun void 227*4882a593Smuzhiyun PHY_RFShadowRecorverFlagSetAll( 228*4882a593Smuzhiyun PADAPTER Adapter); 229*4882a593Smuzhiyun 230*4882a593Smuzhiyun void 231*4882a593Smuzhiyun PHY_RFShadowRefresh( 232*4882a593Smuzhiyun PADAPTER Adapter); 233*4882a593Smuzhiyun #endif /*#CONFIG_RF_SHADOW_RW*/ 234*4882a593Smuzhiyun #endif /* __HAL_COMMON_H__ */ 235