1*4882a593Smuzhiyun /******************************************************************************
2*4882a593Smuzhiyun *
3*4882a593Smuzhiyun * Copyright(c) 2007 - 2017 Realtek Corporation.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify it
6*4882a593Smuzhiyun * under the terms of version 2 of the GNU General Public License as
7*4882a593Smuzhiyun * published by the Free Software Foundation.
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * This program is distributed in the hope that it will be useful, but WITHOUT
10*4882a593Smuzhiyun * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11*4882a593Smuzhiyun * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12*4882a593Smuzhiyun * more details.
13*4882a593Smuzhiyun *
14*4882a593Smuzhiyun *****************************************************************************/
15*4882a593Smuzhiyun #define _RTL8188F_SRESET_C_
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun #include <rtl8188f_hal.h>
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun #ifdef DBG_CONFIG_ERROR_DETECT
rtl8188f_sreset_xmit_status_check(_adapter * padapter)21*4882a593Smuzhiyun void rtl8188f_sreset_xmit_status_check(_adapter *padapter)
22*4882a593Smuzhiyun {
23*4882a593Smuzhiyun HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
24*4882a593Smuzhiyun struct sreset_priv *psrtpriv = &pHalData->srestpriv;
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun systime current_time;
27*4882a593Smuzhiyun struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
28*4882a593Smuzhiyun unsigned int diff_time;
29*4882a593Smuzhiyun u32 txdma_status;
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun txdma_status = rtw_read32(padapter, REG_TXDMA_STATUS);
32*4882a593Smuzhiyun if (txdma_status != 0x00 && txdma_status != 0xeaeaeaea) {
33*4882a593Smuzhiyun RTW_INFO("%s REG_TXDMA_STATUS:0x%08x\n", __func__, txdma_status);
34*4882a593Smuzhiyun rtw_hal_sreset_reset(padapter);
35*4882a593Smuzhiyun }
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun #ifdef CONFIG_USB_HCI
38*4882a593Smuzhiyun /*total xmit irp = 4 */
39*4882a593Smuzhiyun /*RTW_INFO("==>%s free_xmitbuf_cnt(%d),txirp_cnt(%d)\n",__func__,pxmitpriv->free_xmitbuf_cnt,pxmitpriv->txirp_cnt); */
40*4882a593Smuzhiyun /*if(pxmitpriv->txirp_cnt == NR_XMITBUFF+1) */
41*4882a593Smuzhiyun current_time = rtw_get_current_time();
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun if (0 == pxmitpriv->free_xmitbuf_cnt || 0 == pxmitpriv->free_xmit_extbuf_cnt) {
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun diff_time = rtw_get_passing_time_ms(psrtpriv->last_tx_time);
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun if (diff_time > 2000) {
48*4882a593Smuzhiyun if (psrtpriv->last_tx_complete_time == 0)
49*4882a593Smuzhiyun psrtpriv->last_tx_complete_time = current_time;
50*4882a593Smuzhiyun else {
51*4882a593Smuzhiyun diff_time = rtw_get_passing_time_ms(psrtpriv->last_tx_complete_time);
52*4882a593Smuzhiyun if (diff_time > 4000) {
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun /* padapter->Wifi_Error_Status = WIFI_TX_HANG; */
56*4882a593Smuzhiyun RTW_INFO("%s tx hang %s\n", __FUNCTION__,
57*4882a593Smuzhiyun (rtw_odm_adaptivity_needed(padapter)) ? "ODM_BB_ADAPTIVITY" : "");
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun if (!rtw_odm_adaptivity_needed(padapter))
60*4882a593Smuzhiyun rtw_hal_sreset_reset(padapter);
61*4882a593Smuzhiyun }
62*4882a593Smuzhiyun }
63*4882a593Smuzhiyun }
64*4882a593Smuzhiyun }
65*4882a593Smuzhiyun #endif /* #ifdef CONFIG_USB_HCI */
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun if (psrtpriv->dbg_trigger_point == SRESET_TGP_XMIT_STATUS) {
68*4882a593Smuzhiyun psrtpriv->dbg_trigger_point = SRESET_TGP_NULL;
69*4882a593Smuzhiyun rtw_hal_sreset_reset(padapter);
70*4882a593Smuzhiyun return;
71*4882a593Smuzhiyun }
72*4882a593Smuzhiyun }
73*4882a593Smuzhiyun
rtl8188f_sreset_linked_status_check(_adapter * padapter)74*4882a593Smuzhiyun void rtl8188f_sreset_linked_status_check(_adapter *padapter)
75*4882a593Smuzhiyun {
76*4882a593Smuzhiyun HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
77*4882a593Smuzhiyun struct sreset_priv *psrtpriv = &pHalData->srestpriv;
78*4882a593Smuzhiyun #if 0
79*4882a593Smuzhiyun u32 regc50, regc58, reg824, reg800;
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun regc50 = rtw_read32(padapter, 0xc50);
82*4882a593Smuzhiyun regc58 = rtw_read32(padapter, 0xc58);
83*4882a593Smuzhiyun reg824 = rtw_read32(padapter, 0x824);
84*4882a593Smuzhiyun reg800 = rtw_read32(padapter, 0x800);
85*4882a593Smuzhiyun if (((regc50 & 0xFFFFFF00) != 0x69543400) ||
86*4882a593Smuzhiyun ((regc58 & 0xFFFFFF00) != 0x69543400) ||
87*4882a593Smuzhiyun (((reg824 & 0xFFFFFF00) != 0x00390000) && (((reg824 & 0xFFFFFF00) != 0x80390000))) ||
88*4882a593Smuzhiyun (((reg800 & 0xFFFFFF00) != 0x03040000) && ((reg800 & 0xFFFFFF00) != 0x83040000))) {
89*4882a593Smuzhiyun RTW_INFO("%s regc50:0x%08x, regc58:0x%08x, reg824:0x%08x, reg800:0x%08x,\n", __func__,
90*4882a593Smuzhiyun regc50, regc58, reg824, reg800);
91*4882a593Smuzhiyun rtw_hal_sreset_reset(padapter);
92*4882a593Smuzhiyun }
93*4882a593Smuzhiyun #endif
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun if (psrtpriv->dbg_trigger_point == SRESET_TGP_LINK_STATUS) {
96*4882a593Smuzhiyun psrtpriv->dbg_trigger_point = SRESET_TGP_NULL;
97*4882a593Smuzhiyun rtw_hal_sreset_reset(padapter);
98*4882a593Smuzhiyun return;
99*4882a593Smuzhiyun }
100*4882a593Smuzhiyun }
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun #endif
103