xref: /OK3568_Linux_fs/external/rkwifibt/drivers/rtl8188fu/hal/rtl8188f/rtl8188f_rf6052.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /******************************************************************************
2*4882a593Smuzhiyun  *
3*4882a593Smuzhiyun  * Copyright(c) 2007 - 2017 Realtek Corporation.
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * This program is free software; you can redistribute it and/or modify it
6*4882a593Smuzhiyun  * under the terms of version 2 of the GNU General Public License as
7*4882a593Smuzhiyun  * published by the Free Software Foundation.
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  * This program is distributed in the hope that it will be useful, but WITHOUT
10*4882a593Smuzhiyun  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11*4882a593Smuzhiyun  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12*4882a593Smuzhiyun  * more details.
13*4882a593Smuzhiyun  *
14*4882a593Smuzhiyun  *****************************************************************************/
15*4882a593Smuzhiyun /******************************************************************************
16*4882a593Smuzhiyun  *
17*4882a593Smuzhiyun  *
18*4882a593Smuzhiyun  * Module:	rtl8192c_rf6052.c	( Source C File)
19*4882a593Smuzhiyun  *
20*4882a593Smuzhiyun  * Note:	Provide RF 6052 series relative API.
21*4882a593Smuzhiyun  *
22*4882a593Smuzhiyun  * Function:
23*4882a593Smuzhiyun  *
24*4882a593Smuzhiyun  * Export:
25*4882a593Smuzhiyun  *
26*4882a593Smuzhiyun  * Abbrev:
27*4882a593Smuzhiyun  *
28*4882a593Smuzhiyun  * History:
29*4882a593Smuzhiyun  * Data			Who		Remark
30*4882a593Smuzhiyun  *
31*4882a593Smuzhiyun  * 09/25/2008	MHC		Create initial version.
32*4882a593Smuzhiyun  * 11/05/2008	MHC		Add API for tw power setting.
33*4882a593Smuzhiyun  *
34*4882a593Smuzhiyun  *
35*4882a593Smuzhiyun ******************************************************************************/
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun #include <rtl8188f_hal.h>
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun /*---------------------------Define Local Constant---------------------------*/
40*4882a593Smuzhiyun /*---------------------------Define Local Constant---------------------------*/
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun 
43*4882a593Smuzhiyun /*------------------------Define global variable-----------------------------*/
44*4882a593Smuzhiyun /*------------------------Define global variable-----------------------------*/
45*4882a593Smuzhiyun 
46*4882a593Smuzhiyun 
47*4882a593Smuzhiyun /*------------------------Define local variable------------------------------*/
48*4882a593Smuzhiyun #ifdef CONFIG_RF_SHADOW_RW
49*4882a593Smuzhiyun /* 2008/11/20 MH For Debug only, RF */
50*4882a593Smuzhiyun /*static	RF_SHADOW_T	RF_Shadow[RF6052_MAX_PATH][RF6052_MAX_REG] = {0}; */
51*4882a593Smuzhiyun static	RF_SHADOW_T	RF_Shadow[RF6052_MAX_PATH][RF6052_MAX_REG];
52*4882a593Smuzhiyun #endif /*CONFIG_RF_SHADOW_RW*/
53*4882a593Smuzhiyun /*------------------------Define local variable------------------------------*/
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun /*-----------------------------------------------------------------------------
56*4882a593Smuzhiyun  * Function:    PHY_RF6052SetBandwidth()
57*4882a593Smuzhiyun  *
58*4882a593Smuzhiyun  * Overview:    This function is called by SetBWModeCallback8190Pci() only
59*4882a593Smuzhiyun  *
60*4882a593Smuzhiyun  * Input:       PADAPTER				Adapter
61*4882a593Smuzhiyun  *              WIRELESS_BANDWIDTH_E	Bandwidth	20M or 40M
62*4882a593Smuzhiyun  *
63*4882a593Smuzhiyun  * Output:      NONE
64*4882a593Smuzhiyun  *
65*4882a593Smuzhiyun  * Return:      NONE
66*4882a593Smuzhiyun  *
67*4882a593Smuzhiyun  * Note:		For RF type 0222D
68*4882a593Smuzhiyun  *---------------------------------------------------------------------------*/
69*4882a593Smuzhiyun void
PHY_RF6052SetBandwidth8188F(PADAPTER Adapter,enum channel_width Bandwidth)70*4882a593Smuzhiyun PHY_RF6052SetBandwidth8188F(
71*4882a593Smuzhiyun 		PADAPTER				Adapter,
72*4882a593Smuzhiyun 		enum channel_width		Bandwidth)	/*20M or 40M */
73*4882a593Smuzhiyun {
74*4882a593Smuzhiyun 	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun 	switch (Bandwidth) {
77*4882a593Smuzhiyun 	case CHANNEL_WIDTH_20:
78*4882a593Smuzhiyun 		/*
79*4882a593Smuzhiyun 		RF_A_reg 0x18[11:10]=2'b11
80*4882a593Smuzhiyun 		RF_A_reg 0x87=0x00065
81*4882a593Smuzhiyun 		RF_A_reg 0x1c=0x00000
82*4882a593Smuzhiyun 		RF_A_reg 0xDF=0x00140
83*4882a593Smuzhiyun 		RF_A_reg 0x1b=0x00c6c (for SDIO)
84*4882a593Smuzhiyun 		RF_A_reg 0x1b=0x01c6c (for USB)
85*4882a593Smuzhiyun 		*/
86*4882a593Smuzhiyun 		pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff) | BIT10 | BIT11);
87*4882a593Smuzhiyun 		phy_set_rf_reg(Adapter, RF_PATH_A, 0x18, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]); /* RF TRX_BW */
88*4882a593Smuzhiyun 
89*4882a593Smuzhiyun 		phy_set_rf_reg(Adapter, RF_PATH_A, 0x87, bRFRegOffsetMask, 0x00065); /* FILTER BW&RC Corner (ACPR) */
90*4882a593Smuzhiyun 		phy_set_rf_reg(Adapter, RF_PATH_A, 0x1C, bRFRegOffsetMask, 0x00000); /* FILTER BW&RC Corner (ACPR) */
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun 		phy_set_rf_reg(Adapter, RF_PATH_A, 0xDF, bRFRegOffsetMask, 0x00140); /* RC Corner */
93*4882a593Smuzhiyun #ifdef CONFIG_SDIO_HCI
94*4882a593Smuzhiyun 		phy_set_rf_reg(Adapter, RF_PATH_A, 0x1B, bRFRegOffsetMask, 0x00C6C); /* RC Corner */
95*4882a593Smuzhiyun #endif /* CONFIG_SDIO_HCI */
96*4882a593Smuzhiyun #ifdef CONFIG_USB_HCI
97*4882a593Smuzhiyun 		phy_set_rf_reg(Adapter, RF_PATH_A, 0x1B, bRFRegOffsetMask, 0x01C6C); /* RC Corner */
98*4882a593Smuzhiyun #endif
99*4882a593Smuzhiyun 		break;
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun 	case CHANNEL_WIDTH_40:
102*4882a593Smuzhiyun 		/*
103*4882a593Smuzhiyun 		RF_A_reg 0x18[11:10]=2'b01
104*4882a593Smuzhiyun 		RF_A_reg 0x87=0x00025
105*4882a593Smuzhiyun 		RF_A_reg 0x1c=0x00800 (for SDIO)
106*4882a593Smuzhiyun 		RF_A_reg 0x1c=0x01000 (for USB)
107*4882a593Smuzhiyun 		RF_A_reg 0xDF=0x00140
108*4882a593Smuzhiyun 		RF_A_reg 0x1b=0x00c6c (for SDIO)
109*4882a593Smuzhiyun 		RF_A_reg 0x1b=0x01c6c (for USB)
110*4882a593Smuzhiyun 		*/
111*4882a593Smuzhiyun 		pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff) | BIT10);
112*4882a593Smuzhiyun 		phy_set_rf_reg(Adapter, RF_PATH_A, 0x18, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]); /* RF TRX_BW */
113*4882a593Smuzhiyun 
114*4882a593Smuzhiyun 		phy_set_rf_reg(Adapter, RF_PATH_A, 0x87, bRFRegOffsetMask, 0x00025); /* FILTER BW&RC Corner (ACPR) */
115*4882a593Smuzhiyun #ifdef CONFIG_SDIO_HCI
116*4882a593Smuzhiyun 		phy_set_rf_reg(Adapter, RF_PATH_A, 0x1C, bRFRegOffsetMask, 0x00800); /* FILTER BW&RC Corner (ACPR) */
117*4882a593Smuzhiyun 		phy_set_rf_reg(Adapter, RF_PATH_A, 0xDF, bRFRegOffsetMask, 0x00140); /* RC Corner */
118*4882a593Smuzhiyun 		phy_set_rf_reg(Adapter, RF_PATH_A, 0x1B, bRFRegOffsetMask, 0x00C6C); /* RC Corner */
119*4882a593Smuzhiyun #endif /* CONFIG_SDIO_HCI */
120*4882a593Smuzhiyun #ifdef CONFIG_USB_HCI
121*4882a593Smuzhiyun 		phy_set_rf_reg(Adapter, RF_PATH_A, 0x1C, bRFRegOffsetMask, 0x01000); /* FILTER BW&RC Corner (ACPR) */
122*4882a593Smuzhiyun 		phy_set_rf_reg(Adapter, RF_PATH_A, 0xDF, bRFRegOffsetMask, 0x00140); /* RC Corner */
123*4882a593Smuzhiyun 		phy_set_rf_reg(Adapter, RF_PATH_A, 0x1B, bRFRegOffsetMask, 0x01C6C); /* RC Corner */
124*4882a593Smuzhiyun #endif
125*4882a593Smuzhiyun 		break;
126*4882a593Smuzhiyun 
127*4882a593Smuzhiyun 	default:
128*4882a593Smuzhiyun 		break;
129*4882a593Smuzhiyun 	}
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun }
132*4882a593Smuzhiyun 
133*4882a593Smuzhiyun static int
phy_RF6052_Config_ParaFile(PADAPTER Adapter)134*4882a593Smuzhiyun phy_RF6052_Config_ParaFile(
135*4882a593Smuzhiyun 		PADAPTER		Adapter
136*4882a593Smuzhiyun )
137*4882a593Smuzhiyun {
138*4882a593Smuzhiyun 	u32					u4RegValue = 0;
139*4882a593Smuzhiyun 	enum rf_path			eRFPath;
140*4882a593Smuzhiyun 	BB_REGISTER_DEFINITION_T	*pPhyReg;
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun 	int					rtStatus = _SUCCESS;
143*4882a593Smuzhiyun 	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(Adapter);
144*4882a593Smuzhiyun 	struct hal_spec_t *hal_spec = GET_HAL_SPEC(Adapter);
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun 	/*3//----------------------------------------------------------------- */
147*4882a593Smuzhiyun 	/*3// <2> Initialize RF */
148*4882a593Smuzhiyun 	/*3//----------------------------------------------------------------- */
149*4882a593Smuzhiyun 	for (eRFPath = RF_PATH_A; eRFPath < hal_spec->rf_reg_path_num; eRFPath++) {
150*4882a593Smuzhiyun 
151*4882a593Smuzhiyun 		pPhyReg = &pHalData->PHYRegDef[eRFPath];
152*4882a593Smuzhiyun 
153*4882a593Smuzhiyun 		/*----Store original RFENV control type----*/
154*4882a593Smuzhiyun 		switch (eRFPath) {
155*4882a593Smuzhiyun 		case RF_PATH_A:
156*4882a593Smuzhiyun 		case RF_PATH_C:
157*4882a593Smuzhiyun 			u4RegValue = phy_query_bb_reg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV);
158*4882a593Smuzhiyun 			break;
159*4882a593Smuzhiyun 		case RF_PATH_B:
160*4882a593Smuzhiyun 		case RF_PATH_D:
161*4882a593Smuzhiyun 			u4RegValue = phy_query_bb_reg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV << 16);
162*4882a593Smuzhiyun 			break;
163*4882a593Smuzhiyun 		default:
164*4882a593Smuzhiyun 			RTW_ERR("Invalid rf_path:%d\n", eRFPath);
165*4882a593Smuzhiyun 			break;
166*4882a593Smuzhiyun 		}
167*4882a593Smuzhiyun 
168*4882a593Smuzhiyun 		/*----Set RF_ENV enable----*/
169*4882a593Smuzhiyun 		phy_set_bb_reg(Adapter, pPhyReg->rfintfe, bRFSI_RFENV << 16, 0x1);
170*4882a593Smuzhiyun 		rtw_udelay_os(1);/*PlatformStallExecution(1); */
171*4882a593Smuzhiyun 
172*4882a593Smuzhiyun 		/*----Set RF_ENV output high----*/
173*4882a593Smuzhiyun 		phy_set_bb_reg(Adapter, pPhyReg->rfintfo, bRFSI_RFENV, 0x1);
174*4882a593Smuzhiyun 		rtw_udelay_os(1);/*PlatformStallExecution(1); */
175*4882a593Smuzhiyun 
176*4882a593Smuzhiyun 		/* Set bit number of Address and Data for RF register */
177*4882a593Smuzhiyun 		phy_set_bb_reg(Adapter, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0);	/* Set 1 to 4 bits for 8255 */
178*4882a593Smuzhiyun 		rtw_udelay_os(1);/*PlatformStallExecution(1); */
179*4882a593Smuzhiyun 
180*4882a593Smuzhiyun 		phy_set_bb_reg(Adapter, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0);	/* Set 0 to 12  bits for 8255 */
181*4882a593Smuzhiyun 		rtw_udelay_os(1);/*PlatformStallExecution(1); */
182*4882a593Smuzhiyun 
183*4882a593Smuzhiyun 		/*----Initialize RF fom connfiguration file----*/
184*4882a593Smuzhiyun 		switch (eRFPath) {
185*4882a593Smuzhiyun 		case RF_PATH_A:
186*4882a593Smuzhiyun #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE
187*4882a593Smuzhiyun 			if (PHY_ConfigRFWithParaFile(Adapter, PHY_FILE_RADIO_A, eRFPath) == _FAIL)
188*4882a593Smuzhiyun #endif
189*4882a593Smuzhiyun 			{
190*4882a593Smuzhiyun #ifdef CONFIG_EMBEDDED_FWIMG
191*4882a593Smuzhiyun 				if (odm_config_rf_with_header_file(&pHalData->odmpriv, CONFIG_RF_RADIO, eRFPath) == HAL_STATUS_FAILURE)
192*4882a593Smuzhiyun 					rtStatus = _FAIL;
193*4882a593Smuzhiyun #endif
194*4882a593Smuzhiyun 			}
195*4882a593Smuzhiyun 			break;
196*4882a593Smuzhiyun 		case RF_PATH_B:
197*4882a593Smuzhiyun #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE
198*4882a593Smuzhiyun 			if (PHY_ConfigRFWithParaFile(Adapter, PHY_FILE_RADIO_B, eRFPath) == _FAIL)
199*4882a593Smuzhiyun #endif
200*4882a593Smuzhiyun 			{
201*4882a593Smuzhiyun #ifdef CONFIG_EMBEDDED_FWIMG
202*4882a593Smuzhiyun 				if (odm_config_rf_with_header_file(&pHalData->odmpriv, CONFIG_RF_RADIO, eRFPath) == HAL_STATUS_FAILURE)
203*4882a593Smuzhiyun 					rtStatus = _FAIL;
204*4882a593Smuzhiyun #endif
205*4882a593Smuzhiyun 			}
206*4882a593Smuzhiyun 			break;
207*4882a593Smuzhiyun 		case RF_PATH_C:
208*4882a593Smuzhiyun 			break;
209*4882a593Smuzhiyun 		case RF_PATH_D:
210*4882a593Smuzhiyun 			break;
211*4882a593Smuzhiyun 		default:
212*4882a593Smuzhiyun 			RTW_ERR("Invalid rf_path:%d\n", eRFPath);
213*4882a593Smuzhiyun 			break;
214*4882a593Smuzhiyun 		}
215*4882a593Smuzhiyun 
216*4882a593Smuzhiyun 		/*----Restore RFENV control type----*/;
217*4882a593Smuzhiyun 		switch (eRFPath) {
218*4882a593Smuzhiyun 		case RF_PATH_A:
219*4882a593Smuzhiyun 		case RF_PATH_C:
220*4882a593Smuzhiyun 			phy_set_bb_reg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue);
221*4882a593Smuzhiyun 			break;
222*4882a593Smuzhiyun 		case RF_PATH_B:
223*4882a593Smuzhiyun 		case RF_PATH_D:
224*4882a593Smuzhiyun 			phy_set_bb_reg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV << 16, u4RegValue);
225*4882a593Smuzhiyun 			break;
226*4882a593Smuzhiyun 		default:
227*4882a593Smuzhiyun 			RTW_ERR("Invalid rf_path:%d\n", eRFPath);
228*4882a593Smuzhiyun 			break;
229*4882a593Smuzhiyun 		}
230*4882a593Smuzhiyun 
231*4882a593Smuzhiyun 		if (rtStatus != _SUCCESS) {
232*4882a593Smuzhiyun 			goto phy_RF6052_Config_ParaFile_Fail;
233*4882a593Smuzhiyun 		}
234*4882a593Smuzhiyun 
235*4882a593Smuzhiyun 	}
236*4882a593Smuzhiyun 
237*4882a593Smuzhiyun 	/*3 ----------------------------------------------------------------- */
238*4882a593Smuzhiyun 	/*3 Configuration of Tx Power Tracking */
239*4882a593Smuzhiyun 	/*3 ----------------------------------------------------------------- */
240*4882a593Smuzhiyun 
241*4882a593Smuzhiyun #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE
242*4882a593Smuzhiyun 	if (PHY_ConfigRFWithTxPwrTrackParaFile(Adapter, PHY_FILE_TXPWR_TRACK) == _FAIL)
243*4882a593Smuzhiyun #endif
244*4882a593Smuzhiyun 	{
245*4882a593Smuzhiyun #ifdef CONFIG_EMBEDDED_FWIMG
246*4882a593Smuzhiyun 		odm_config_rf_with_tx_pwr_track_header_file(&pHalData->odmpriv);
247*4882a593Smuzhiyun #endif
248*4882a593Smuzhiyun 	}
249*4882a593Smuzhiyun 
250*4882a593Smuzhiyun 	return rtStatus;
251*4882a593Smuzhiyun 
252*4882a593Smuzhiyun phy_RF6052_Config_ParaFile_Fail:
253*4882a593Smuzhiyun 	return rtStatus;
254*4882a593Smuzhiyun }
255*4882a593Smuzhiyun 
256*4882a593Smuzhiyun 
257*4882a593Smuzhiyun int
PHY_RF6052_Config8188F(PADAPTER Adapter)258*4882a593Smuzhiyun PHY_RF6052_Config8188F(
259*4882a593Smuzhiyun 		PADAPTER		Adapter)
260*4882a593Smuzhiyun {
261*4882a593Smuzhiyun 	int					rtStatus = _SUCCESS;
262*4882a593Smuzhiyun 
263*4882a593Smuzhiyun 	/* */
264*4882a593Smuzhiyun 	/* Config BB and RF */
265*4882a593Smuzhiyun 	/* */
266*4882a593Smuzhiyun 	rtStatus = phy_RF6052_Config_ParaFile(Adapter);
267*4882a593Smuzhiyun 	return rtStatus;
268*4882a593Smuzhiyun }
269*4882a593Smuzhiyun 
270*4882a593Smuzhiyun /* End of HalRf6052.c */
271