xref: /OK3568_Linux_fs/external/rkwifibt/drivers/infineon/include/hndoobr.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * HND OOBR interface header
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * Portions of this code are copyright (c) 2021 Cypress Semiconductor Corporation
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * Copyright (C) 1999-2017, Broadcom Corporation
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  *      Unless you and Broadcom execute a separate written software license
9*4882a593Smuzhiyun  * agreement governing use of this software, this software is licensed to you
10*4882a593Smuzhiyun  * under the terms of the GNU General Public License version 2 (the "GPL"),
11*4882a593Smuzhiyun  * available at http://www.broadcom.com/licenses/GPLv2.php, with the
12*4882a593Smuzhiyun  * following added to such license:
13*4882a593Smuzhiyun  *
14*4882a593Smuzhiyun  *      As a special exception, the copyright holders of this software give you
15*4882a593Smuzhiyun  * permission to link this software with independent modules, and to copy and
16*4882a593Smuzhiyun  * distribute the resulting executable under terms of your choice, provided that
17*4882a593Smuzhiyun  * you also meet, for each linked independent module, the terms and conditions of
18*4882a593Smuzhiyun  * the license of that module.  An independent module is a module which is not
19*4882a593Smuzhiyun  * derived from this software.  The special exception does not apply to any
20*4882a593Smuzhiyun  * modifications of the software.
21*4882a593Smuzhiyun  *
22*4882a593Smuzhiyun  *      Notwithstanding the above, under no circumstances may you combine this
23*4882a593Smuzhiyun  * software in any way with any other Broadcom software provided under a license
24*4882a593Smuzhiyun  * other than the GPL, without Broadcom's express prior written consent.
25*4882a593Smuzhiyun  *
26*4882a593Smuzhiyun  *
27*4882a593Smuzhiyun  * <<Broadcom-WL-IPTag/Open:>>
28*4882a593Smuzhiyun  *
29*4882a593Smuzhiyun  * $Id: hndoobr.h 772387 2018-07-17 00:58:05Z $
30*4882a593Smuzhiyun  */
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun #ifndef _hndoobr_h_
33*4882a593Smuzhiyun #define _hndoobr_h_
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun #include <typedefs.h>
36*4882a593Smuzhiyun #include <siutils.h>
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun /* for 'srcpidx' of hnd_oobr_get_intr_config() */
39*4882a593Smuzhiyun #define HND_CORE_MAIN_INTR	0
40*4882a593Smuzhiyun #define HND_CORE_ALT_INTR	1
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun uint32 hnd_oobr_get_intstatus(si_t *sih);
43*4882a593Smuzhiyun int hnd_oobr_get_intr_config(si_t *sih, uint srccidx, uint srcpidx, uint dstcidx, uint *dstpidx);
44*4882a593Smuzhiyun int hnd_oobr_set_intr_src(si_t *sih, uint dstcidx, uint dstpidx, uint intrnum);
45*4882a593Smuzhiyun void hnd_oobr_init(si_t *sih);
46*4882a593Smuzhiyun 
47*4882a593Smuzhiyun #define OOBR_INVALID_PORT       0xFFu
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun /* per core source/dest sel reg */
50*4882a593Smuzhiyun #define OOBR_INTR_PER_CONFREG           4u           /* 4 interrupts per configure reg */
51*4882a593Smuzhiyun #define OOBR_INTR_NUM_MASK              0x7Fu
52*4882a593Smuzhiyun #define OOBR_INTR_EN                    0x80u
53*4882a593Smuzhiyun /* per core config reg */
54*4882a593Smuzhiyun #define OOBR_CORECNF_OUTPUT_MASK        0x0000FF00u
55*4882a593Smuzhiyun #define OOBR_CORECNF_OUTPUT_SHIFT       8u
56*4882a593Smuzhiyun #define OOBR_CORECNF_INPUT_MASK         0x00FF0000u
57*4882a593Smuzhiyun #define OOBR_CORECNF_INPUT_SHIFT        16u
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun typedef volatile struct hndoobr_percore_reg {
60*4882a593Smuzhiyun 	uint32 sourcesel[OOBR_INTR_PER_CONFREG];        /* 0x00 - 0x0c */
61*4882a593Smuzhiyun 	uint32 destsel[OOBR_INTR_PER_CONFREG];          /* 0x10 - 0x1c */
62*4882a593Smuzhiyun 	uint32 reserved[6];
63*4882a593Smuzhiyun 	uint32 config;                                  /* 0x38 */
64*4882a593Smuzhiyun 	uint32 reserved1[17];                           /* 0x3c to 0x7c */
65*4882a593Smuzhiyun } hndoobr_percore_reg_t;
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun /* capability reg */
68*4882a593Smuzhiyun #define OOBR_CAP_CORECNT_MASK   0x1fu
69*4882a593Smuzhiyun typedef volatile struct hndoobr_reg {
70*4882a593Smuzhiyun 	uint32 capability;                      /* 0x00 */
71*4882a593Smuzhiyun 	uint32 reserved[3];
72*4882a593Smuzhiyun 	uint32 intstatus[4];                    /* 0x10 - 0x1c */
73*4882a593Smuzhiyun 	uint32 reserved1[56];                   /* 0x20 - 0xfc */
74*4882a593Smuzhiyun 	hndoobr_percore_reg_t percore_reg[1];   /* 0x100 */
75*4882a593Smuzhiyun } hndoobr_reg_t;
76*4882a593Smuzhiyun 
77*4882a593Smuzhiyun #endif /* _hndoobr_h_ */
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