1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * HND SiliconBackplane chipcommon support - OS independent. 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Portions of this code are copyright (c) 2021 Cypress Semiconductor Corporation 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * Copyright (C) 1999-2017, Broadcom Corporation 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun * Unless you and Broadcom execute a separate written software license 9*4882a593Smuzhiyun * agreement governing use of this software, this software is licensed to you 10*4882a593Smuzhiyun * under the terms of the GNU General Public License version 2 (the "GPL"), 11*4882a593Smuzhiyun * available at http://www.broadcom.com/licenses/GPLv2.php, with the 12*4882a593Smuzhiyun * following added to such license: 13*4882a593Smuzhiyun * 14*4882a593Smuzhiyun * As a special exception, the copyright holders of this software give you 15*4882a593Smuzhiyun * permission to link this software with independent modules, and to copy and 16*4882a593Smuzhiyun * distribute the resulting executable under terms of your choice, provided that 17*4882a593Smuzhiyun * you also meet, for each linked independent module, the terms and conditions of 18*4882a593Smuzhiyun * the license of that module. An independent module is a module which is not 19*4882a593Smuzhiyun * derived from this software. The special exception does not apply to any 20*4882a593Smuzhiyun * modifications of the software. 21*4882a593Smuzhiyun * 22*4882a593Smuzhiyun * Notwithstanding the above, under no circumstances may you combine this 23*4882a593Smuzhiyun * software in any way with any other Broadcom software provided under a license 24*4882a593Smuzhiyun * other than the GPL, without Broadcom's express prior written consent. 25*4882a593Smuzhiyun * 26*4882a593Smuzhiyun * 27*4882a593Smuzhiyun * <<Broadcom-WL-IPTag/Open:>> 28*4882a593Smuzhiyun * 29*4882a593Smuzhiyun * $Id: hndchipc.h 689775 2017-03-13 12:37:05Z $ 30*4882a593Smuzhiyun */ 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun #ifndef _hndchipc_h_ 33*4882a593Smuzhiyun #define _hndchipc_h_ 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun #include <typedefs.h> 36*4882a593Smuzhiyun #include <siutils.h> 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun #ifdef RTE_UART 39*4882a593Smuzhiyun typedef void (*si_serial_init_fn)(si_t *sih, void *regs, uint irq, uint baud_base, uint reg_shift); 40*4882a593Smuzhiyun #else 41*4882a593Smuzhiyun typedef void (*si_serial_init_fn)(void *regs, uint irq, uint baud_base, uint reg_shift); 42*4882a593Smuzhiyun #endif // endif 43*4882a593Smuzhiyun extern void si_serial_init(si_t *sih, si_serial_init_fn add); 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun extern volatile void *hnd_jtagm_init(si_t *sih, uint clkd, bool exttap); 46*4882a593Smuzhiyun extern void hnd_jtagm_disable(si_t *sih, volatile void *h); 47*4882a593Smuzhiyun extern uint32 jtag_scan(si_t *sih, volatile void *h, uint irsz, uint32 ir0, uint32 ir1, 48*4882a593Smuzhiyun uint drsz, uint32 dr0, uint32 *dr1, bool rti); 49*4882a593Smuzhiyun extern uint32 jtag_read_128(si_t *sih, volatile void *h, uint irsz, uint32 ir0, uint drsz, 50*4882a593Smuzhiyun uint32 dr0, uint32 *dr1, uint32 *dr2, uint32 *dr3); 51*4882a593Smuzhiyun extern uint32 jtag_write_128(si_t *sih, volatile void *h, uint irsz, uint32 ir0, uint drsz, 52*4882a593Smuzhiyun uint32 dr0, uint32 *dr1, uint32 *dr2, uint32 *dr3); 53*4882a593Smuzhiyun extern int jtag_setbit_128(si_t *sih, uint32 jtagureg_addr, uint8 bit_pos, uint8 bit_val); 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun #endif /* _hndchipc_h_ */ 56