1 /* 2 * 'Standard' SDIO HOST CONTROLLER driver 3 * 4 * Portions of this code are copyright (c) 2021 Cypress Semiconductor Corporation 5 * 6 * Copyright (C) 1999-2017, Broadcom Corporation 7 * 8 * Unless you and Broadcom execute a separate written software license 9 * agreement governing use of this software, this software is licensed to you 10 * under the terms of the GNU General Public License version 2 (the "GPL"), 11 * available at http://www.broadcom.com/licenses/GPLv2.php, with the 12 * following added to such license: 13 * 14 * As a special exception, the copyright holders of this software give you 15 * permission to link this software with independent modules, and to copy and 16 * distribute the resulting executable under terms of your choice, provided that 17 * you also meet, for each linked independent module, the terms and conditions of 18 * the license of that module. An independent module is a module which is not 19 * derived from this software. The special exception does not apply to any 20 * modifications of the software. 21 * 22 * Notwithstanding the above, under no circumstances may you combine this 23 * software in any way with any other Broadcom software provided under a license 24 * other than the GPL, without Broadcom's express prior written consent. 25 * 26 * 27 * <<Broadcom-WL-IPTag/Open:>> 28 * 29 * $Id: bcmsdstd.h 663318 2016-10-04 19:02:16Z $ 30 */ 31 #ifndef _BCM_SD_STD_H 32 #define _BCM_SD_STD_H 33 34 /* global msglevel for debug messages - bitvals come from sdiovar.h */ 35 #define sd_err(x) do { if (sd_msglevel & SDH_ERROR_VAL) printf x; } while (0) 36 #define sd_trace(x) 37 #define sd_info(x) 38 #define sd_debug(x) 39 #define sd_data(x) 40 #define sd_ctrl(x) 41 #define sd_dma(x) 42 43 #define sd_sync_dma(sd, read, nbytes) 44 #define sd_init_dma(sd) 45 #define sd_ack_intr(sd) 46 #define sd_wakeup(sd); 47 /* Allocate/init/free per-OS private data */ 48 extern int sdstd_osinit(sdioh_info_t *sd); 49 extern void sdstd_osfree(sdioh_info_t *sd); 50 51 #define sd_log(x) 52 53 #define SDIOH_ASSERT(exp) \ 54 do { if (!(exp)) \ 55 printf("!!!ASSERT fail: file %s lines %d", __FILE__, __LINE__); \ 56 } while (0) 57 58 #define BLOCK_SIZE_4318 64 59 #define BLOCK_SIZE_4328 512 60 61 /* internal return code */ 62 #define SUCCESS 0 63 #define ERROR 1 64 65 /* private bus modes */ 66 #define SDIOH_MODE_SPI 0 67 #define SDIOH_MODE_SD1 1 68 #define SDIOH_MODE_SD4 2 69 70 #define MAX_SLOTS 6 /* For PCI: Only 6 BAR entries => 6 slots */ 71 #define SDIOH_REG_WINSZ 0x100 /* Number of registers in Standard Host Controller */ 72 73 #define SDIOH_TYPE_ARASAN_HDK 1 74 #define SDIOH_TYPE_BCM27XX 2 75 #define SDIOH_TYPE_TI_PCIXX21 4 /* TI PCIxx21 Standard Host Controller */ 76 #define SDIOH_TYPE_RICOH_R5C822 5 /* Ricoh Co Ltd R5C822 SD/SDIO/MMC/MS/MSPro Host Adapter */ 77 #define SDIOH_TYPE_JMICRON 6 /* JMicron Standard SDIO Host Controller */ 78 79 /* For linux, allow yielding for dongle */ 80 #define BCMSDYIELD 81 82 /* Expected card status value for CMD7 */ 83 #define SDIOH_CMD7_EXP_STATUS 0x00001E00 84 85 #define RETRIES_LARGE 100000 86 #ifdef BCMQT 87 extern void sdstd_os_yield(sdioh_info_t *sd); 88 #define RETRIES_SMALL 10000 89 #else 90 #define sdstd_os_yield(sd) do {} while (0) 91 #define RETRIES_SMALL 100 92 #endif // endif 93 94 #define USE_BLOCKMODE 0x2 /* Block mode can be single block or multi */ 95 #define USE_MULTIBLOCK 0x4 96 97 #define USE_FIFO 0x8 /* Fifo vs non-fifo */ 98 99 #define CLIENT_INTR 0x100 /* Get rid of this! */ 100 101 #define HC_INTR_RETUNING 0x1000 102 103 #ifdef BCMSDIOH_TXGLOM 104 /* Total glom pkt can not exceed 64K 105 * need one more slot for glom padding packet 106 */ 107 #define SDIOH_MAXGLOM_SIZE (40+1) 108 109 typedef struct glom_buf { 110 uint32 count; /* Total number of pkts queued */ 111 void *dma_buf_arr[SDIOH_MAXGLOM_SIZE]; /* Frame address */ 112 ulong dma_phys_arr[SDIOH_MAXGLOM_SIZE]; /* DMA_MAPed address of frames */ 113 uint16 nbytes[SDIOH_MAXGLOM_SIZE]; /* Size of each frame */ 114 } glom_buf_t; 115 #endif // endif 116 117 struct sdioh_info { 118 uint cfg_bar; /* pci cfg address for bar */ 119 uint32 caps; /* cached value of capabilities reg */ 120 uint32 curr_caps; /* max current capabilities reg */ 121 122 osl_t *osh; /* osh handler */ 123 volatile char *mem_space; /* pci device memory va */ 124 uint lockcount; /* nest count of sdstd_lock() calls */ 125 bool client_intr_enabled; /* interrupt connnected flag */ 126 bool intr_handler_valid; /* client driver interrupt handler valid */ 127 sdioh_cb_fn_t intr_handler; /* registered interrupt handler */ 128 void *intr_handler_arg; /* argument to call interrupt handler */ 129 bool initialized; /* card initialized */ 130 uint target_dev; /* Target device ID */ 131 uint16 intmask; /* Current active interrupts */ 132 void *sdos_info; /* Pointer to per-OS private data */ 133 void *bcmsdh; /* handler to upper layer stack (bcmsdh) */ 134 135 uint32 controller_type; /* Host controller type */ 136 uint8 version; /* Host Controller Spec Compliance Version */ 137 uint irq; /* Client irq */ 138 int intrcount; /* Client interrupts */ 139 int local_intrcount; /* Controller interrupts */ 140 bool host_init_done; /* Controller initted */ 141 bool card_init_done; /* Client SDIO interface initted */ 142 bool polled_mode; /* polling for command completion */ 143 144 bool sd_blockmode; /* sd_blockmode == FALSE => 64 Byte Cmd 53s. */ 145 /* Must be on for sd_multiblock to be effective */ 146 bool use_client_ints; /* If this is false, make sure to restore */ 147 /* polling hack in wl_linux.c:wl_timer() */ 148 int adapter_slot; /* Maybe dealing with multiple slots/controllers */ 149 int sd_mode; /* SD1/SD4/SPI */ 150 int client_block_size[SDIOD_MAX_IOFUNCS]; /* Blocksize */ 151 uint32 data_xfer_count; /* Current transfer */ 152 uint16 card_rca; /* Current Address */ 153 int8 sd_dma_mode; /* DMA Mode (PIO, SDMA, ... ADMA2) on CMD53 */ 154 uint8 num_funcs; /* Supported funcs on client */ 155 uint32 com_cis_ptr; 156 uint32 func_cis_ptr[SDIOD_MAX_IOFUNCS]; 157 void *dma_buf; /* DMA Buffer virtual address */ 158 ulong dma_phys; /* DMA Buffer physical address */ 159 void *adma2_dscr_buf; /* ADMA2 Descriptor Buffer virtual address */ 160 ulong adma2_dscr_phys; /* ADMA2 Descriptor Buffer physical address */ 161 162 /* adjustments needed to make the dma align properly */ 163 void *dma_start_buf; 164 ulong dma_start_phys; 165 uint alloced_dma_size; 166 void *adma2_dscr_start_buf; 167 ulong adma2_dscr_start_phys; 168 uint alloced_adma2_dscr_size; 169 170 int r_cnt; /* rx count */ 171 int t_cnt; /* tx_count */ 172 bool got_hcint; /* local interrupt flag */ 173 uint16 last_intrstatus; /* to cache intrstatus */ 174 int host_UHSISupported; /* whether UHSI is supported for HC. */ 175 int card_UHSI_voltage_Supported; /* whether UHSI is supported for 176 * Card in terms of Voltage [1.8 or 3.3]. 177 */ 178 int global_UHSI_Supp; /* type of UHSI support in both host and card. 179 * HOST_SDR_UNSUPP: capabilities not supported/matched 180 * HOST_SDR_12_25: SDR12 and SDR25 supported 181 * HOST_SDR_50_104_DDR: one of SDR50/SDR104 or DDR50 supptd 182 */ 183 volatile int sd3_dat_state; /* data transfer state used for retuning check */ 184 volatile int sd3_tun_state; /* tuning state used for retuning check */ 185 bool sd3_tuning_reqd; /* tuning requirement parameter */ 186 bool sd3_tuning_disable; /* tuning disable due to bus sleeping */ 187 uint32 caps3; /* cached value of 32 MSbits capabilities reg (SDIO 3.0) */ 188 #ifdef BCMSDIOH_TXGLOM 189 glom_buf_t glom_info; /* pkt information used for glomming */ 190 uint txglom_mode; /* Txglom mode: 0 - copy, 1 - multi-descriptor */ 191 #endif // endif 192 }; 193 194 #define DMA_MODE_NONE 0 195 #define DMA_MODE_SDMA 1 196 #define DMA_MODE_ADMA1 2 197 #define DMA_MODE_ADMA2 3 198 #define DMA_MODE_ADMA2_64 4 199 #define DMA_MODE_AUTO -1 200 201 #define USE_DMA(sd) ((bool)((sd->sd_dma_mode > 0) ? TRUE : FALSE)) 202 203 /* States for Tuning and corr data */ 204 #define TUNING_IDLE 0 205 #define TUNING_START 1 206 #define TUNING_START_AFTER_DAT 2 207 #define TUNING_ONGOING 3 208 209 #define DATA_TRANSFER_IDLE 0 210 #define DATA_TRANSFER_ONGOING 1 211 212 #define CHECK_TUNING_PRE_DATA 1 213 #define CHECK_TUNING_POST_DATA 2 214 215 #ifdef DHD_DEBUG 216 #define SD_DHD_DISABLE_PERIODIC_TUNING 0x01 217 #define SD_DHD_ENABLE_PERIODIC_TUNING 0x00 218 #endif // endif 219 220 /************************************************************ 221 * Internal interfaces: per-port references into bcmsdstd.c 222 */ 223 224 /* Global message bits */ 225 extern uint sd_msglevel; 226 227 /* OS-independent interrupt handler */ 228 extern bool check_client_intr(sdioh_info_t *sd); 229 230 /* Core interrupt enable/disable of device interrupts */ 231 extern void sdstd_devintr_on(sdioh_info_t *sd); 232 extern void sdstd_devintr_off(sdioh_info_t *sd); 233 234 /* Enable/disable interrupts for local controller events */ 235 extern void sdstd_intrs_on(sdioh_info_t *sd, uint16 norm, uint16 err); 236 extern void sdstd_intrs_off(sdioh_info_t *sd, uint16 norm, uint16 err); 237 238 /* Wait for specified interrupt and error bits to be set */ 239 extern void sdstd_spinbits(sdioh_info_t *sd, uint16 norm, uint16 err); 240 241 /************************************************************** 242 * Internal interfaces: bcmsdstd.c references to per-port code 243 */ 244 245 /* Register mapping routines */ 246 extern uint32 *sdstd_reg_map(osl_t *osh, ulong addr, int size); 247 extern void sdstd_reg_unmap(osl_t *osh, ulong addr, int size); 248 249 /* Interrupt (de)registration routines */ 250 extern int sdstd_register_irq(sdioh_info_t *sd, uint irq); 251 extern void sdstd_free_irq(uint irq, sdioh_info_t *sd); 252 253 /* OS-specific interrupt wrappers (atomic interrupt enable/disable) */ 254 extern void sdstd_lock(sdioh_info_t *sd); 255 extern void sdstd_unlock(sdioh_info_t *sd); 256 extern void sdstd_waitlockfree(sdioh_info_t *sd); 257 258 /* OS-specific wrappers for safe concurrent register access */ 259 extern void sdstd_os_lock_irqsave(sdioh_info_t *sd, ulong* flags); 260 extern void sdstd_os_unlock_irqrestore(sdioh_info_t *sd, ulong* flags); 261 262 /* OS-specific wait-for-interrupt-or-status */ 263 extern int sdstd_waitbits(sdioh_info_t *sd, uint16 norm, uint16 err, bool yield, uint16 *bits); 264 265 /* used by bcmsdstd_linux [implemented in sdstd] */ 266 extern void sdstd_3_enable_retuning_int(sdioh_info_t *sd); 267 extern void sdstd_3_disable_retuning_int(sdioh_info_t *sd); 268 extern bool sdstd_3_is_retuning_int_set(sdioh_info_t *sd); 269 extern void sdstd_3_check_and_do_tuning(sdioh_info_t *sd, int tuning_param); 270 extern bool sdstd_3_check_and_set_retuning(sdioh_info_t *sd); 271 extern int sdstd_3_get_tune_state(sdioh_info_t *sd); 272 extern int sdstd_3_get_data_state(sdioh_info_t *sd); 273 extern void sdstd_3_set_tune_state(sdioh_info_t *sd, int state); 274 extern void sdstd_3_set_data_state(sdioh_info_t *sd, int state); 275 extern uint8 sdstd_3_get_tuning_exp(sdioh_info_t *sd); 276 extern uint32 sdstd_3_get_uhsi_clkmode(sdioh_info_t *sd); 277 extern int sdstd_3_clk_tuning(sdioh_info_t *sd, uint32 sd3ClkMode); 278 279 /* used by sdstd [implemented in bcmsdstd_linux/ndis] */ 280 extern void sdstd_3_start_tuning(sdioh_info_t *sd); 281 extern void sdstd_3_osinit_tuning(sdioh_info_t *sd); 282 extern void sdstd_3_osclean_tuning(sdioh_info_t *sd); 283 284 extern void sdstd_enable_disable_periodic_timer(sdioh_info_t * sd, uint val); 285 286 extern sdioh_info_t *sdioh_attach(osl_t *osh, void *bar0, uint irq); 287 extern SDIOH_API_RC sdioh_detach(osl_t *osh, sdioh_info_t *sd); 288 #endif /* _BCM_SD_STD_H */ 289