1 /*
2 * Utility routines for configuring different memories in Broadcom chips.
3 *
4 * Portions of this code are copyright (c) 2021 Cypress Semiconductor Corporation
5 *
6 * Copyright (C) 1999-2017, Broadcom Corporation
7 *
8 * Unless you and Broadcom execute a separate written software license
9 * agreement governing use of this software, this software is licensed to you
10 * under the terms of the GNU General Public License version 2 (the "GPL"),
11 * available at http://www.broadcom.com/licenses/GPLv2.php, with the
12 * following added to such license:
13 *
14 * As a special exception, the copyright holders of this software give you
15 * permission to link this software with independent modules, and to copy and
16 * distribute the resulting executable under terms of your choice, provided that
17 * you also meet, for each linked independent module, the terms and conditions of
18 * the license of that module. An independent module is a module which is not
19 * derived from this software. The special exception does not apply to any
20 * modifications of the software.
21 *
22 * Notwithstanding the above, under no circumstances may you combine this
23 * software in any way with any other Broadcom software provided under a license
24 * other than the GPL, without Broadcom's express prior written consent.
25 *
26 *
27 * <<Broadcom-WL-IPTag/Open:>>
28 *
29 * $Id: $
30 */
31
32 #include <typedefs.h>
33 #include <sbchipc.h>
34 #include <hndsoc.h>
35 #include <bcmdevs.h>
36 #include <osl.h>
37 #include <sbgci.h>
38 #include <siutils.h>
39 #include <bcmutils.h>
40 #include <hndmem.h>
41
42 #define IS_MEMTYPE_VALID(mem) ((mem >= MEM_SOCRAM) && (mem < MEM_MAX))
43 #define IS_MEMCONFIG_VALID(cfg) ((cfg >= PDA_CONFIG_CLEAR) && (cfg < PDA_CONFIG_MAX))
44
45 /* Returns the number of banks in a given memory */
46 int
hndmem_num_banks(si_t * sih,int mem)47 hndmem_num_banks(si_t *sih, int mem)
48 {
49 uint32 savecore, mem_info;
50 int num_banks = 0;
51 gciregs_t *gciregs;
52 osl_t *osh = si_osh(sih);
53
54 if (!IS_MEMTYPE_VALID(mem)) {
55 goto exit;
56 }
57
58 savecore = si_coreidx(sih);
59
60 /* TODO: Check whether SOCRAM core is present or not. If not, bail out */
61 /* In future we need to add code for TCM based chips as well */
62 if (!si_setcore(sih, SOCRAM_CORE_ID, 0)) {
63 goto exit;
64 }
65
66 if (sih->gcirev >= 9) {
67 gciregs = si_setcore(sih, GCI_CORE_ID, 0);
68
69 mem_info = R_REG(osh, &gciregs->wlan_mem_info);
70
71 switch (mem) {
72 case MEM_SOCRAM:
73 num_banks = (mem_info & WLAN_MEM_INFO_REG_NUMSOCRAMBANKS_MASK) >>
74 WLAN_MEM_INFO_REG_NUMSOCRAMBANKS_SHIFT;
75 break;
76 case MEM_BM:
77 num_banks = (mem_info & WLAN_MEM_INFO_REG_NUMD11MACBM_MASK) >>
78 WLAN_MEM_INFO_REG_NUMD11MACBM_SHIFT;
79 break;
80 case MEM_UCM:
81 num_banks = (mem_info & WLAN_MEM_INFO_REG_NUMD11MACUCM_MASK) >>
82 WLAN_MEM_INFO_REG_NUMD11MACUCM_SHIFT;
83 break;
84 case MEM_SHM:
85 num_banks = (mem_info & WLAN_MEM_INFO_REG_NUMD11MACSHM_MASK) >>
86 WLAN_MEM_INFO_REG_NUMD11MACSHM_SHIFT;
87 break;
88 default:
89 ASSERT(0);
90 break;
91 }
92 } else {
93 /* TODO: Figure out bank information using SOCRAM registers */
94 }
95
96 si_setcoreidx(sih, savecore);
97 exit:
98 return num_banks;
99 }
100
101 /* Returns the size of a give bank in a given memory */
102 int
hndmem_bank_size(si_t * sih,hndmem_type_t mem,int bank_num)103 hndmem_bank_size(si_t *sih, hndmem_type_t mem, int bank_num)
104 {
105 uint32 savecore, bank_info, reg_data;
106 int bank_sz = 0;
107 gciregs_t *gciregs;
108 osl_t *osh = si_osh(sih);
109
110 if (!IS_MEMTYPE_VALID(mem)) {
111 goto exit;
112 }
113
114 savecore = si_coreidx(sih);
115
116 /* TODO: Check whether SOCRAM core is present or not. If not, bail out */
117 /* In future we need to add code for TCM based chips as well */
118 if (!si_setcore(sih, SOCRAM_CORE_ID, 0)) {
119 goto exit;
120 }
121
122 if (sih->gcirev >= 9) {
123 gciregs = si_setcore(sih, GCI_CORE_ID, 0);
124
125 reg_data = ((mem &
126 GCI_INDIRECT_ADDRESS_REG_GPIOINDEX_MASK) <<
127 GCI_INDIRECT_ADDRESS_REG_GPIOINDEX_SHIFT) |
128 ((bank_num & GCI_INDIRECT_ADDRESS_REG_REGINDEX_MASK)
129 << GCI_INDIRECT_ADDRESS_REG_REGINDEX_SHIFT);
130 W_REG(osh, &gciregs->gci_indirect_addr, reg_data);
131
132 bank_info = R_REG(osh, &gciregs->wlan_bankxinfo);
133 bank_sz = (bank_info & WLAN_BANKXINFO_BANK_SIZE_MASK) >>
134 WLAN_BANKXINFO_BANK_SIZE_SHIFT;
135 } else {
136 /* TODO: Figure out bank size using SOCRAM registers */
137 }
138
139 si_setcoreidx(sih, savecore);
140 exit:
141 return bank_sz;
142 }
143
144 /* Returns the start address of given memory */
145 uint32
hndmem_mem_base(si_t * sih,hndmem_type_t mem)146 hndmem_mem_base(si_t *sih, hndmem_type_t mem)
147 {
148 uint32 savecore, base_addr = 0;
149
150 /* Currently only support of SOCRAM is available in hardware */
151 if (mem != MEM_SOCRAM) {
152 goto exit;
153 }
154
155 savecore = si_coreidx(sih);
156
157 if (si_setcore(sih, SOCRAM_CORE_ID, 0))
158 {
159 base_addr = si_get_slaveport_addr(sih, CORE_SLAVE_PORT_1,
160 CORE_BASE_ADDR_0, SOCRAM_CORE_ID, 0);
161 } else {
162 /* TODO: Add code to get the base address of TCM */
163 base_addr = 0;
164 }
165
166 si_setcoreidx(sih, savecore);
167
168 exit:
169 return base_addr;
170 }
171
172 #ifdef BCMDEBUG
173 char *hndmem_type_str[] =
174 {
175 "SOCRAM", /* 0 */
176 "BM", /* 1 */
177 "UCM", /* 2 */
178 "SHM", /* 3 */
179 };
180
181 /* Dumps the complete memory information */
182 void
hndmem_dump_meminfo_all(si_t * sih)183 hndmem_dump_meminfo_all(si_t *sih)
184 {
185 int mem, bank, bank_cnt, bank_sz;
186
187 for (mem = MEM_SOCRAM; mem < MEM_MAX; mem++) {
188 bank_cnt = hndmem_num_banks(sih, mem);
189
190 printf("\nMemtype: %s\n", hndmem_type_str[mem]);
191 for (bank = 0; bank < bank_cnt; bank++) {
192 bank_sz = hndmem_bank_size(sih, mem, bank);
193 printf("Bank-%d: %d KB\n", bank, bank_sz);
194 }
195 }
196 }
197 #endif /* BCMDEBUG */
198
199 /* Configures the Sleep PDA for a particular bank for a given memory type */
200 int
hndmem_sleeppda_bank_config(si_t * sih,hndmem_type_t mem,int bank_num,hndmem_config_t config,uint32 pda)201 hndmem_sleeppda_bank_config(si_t *sih, hndmem_type_t mem, int bank_num,
202 hndmem_config_t config, uint32 pda)
203 {
204 uint32 savecore, reg_data;
205 gciregs_t *gciregs;
206 int err = BCME_OK;
207 osl_t *osh = si_osh(sih);
208
209 /* TODO: Check whether SOCRAM core is present or not. If not, bail out */
210 /* In future we need to add code for TCM based chips as well */
211 if (!si_setcore(sih, SOCRAM_CORE_ID, 0)) {
212 err = BCME_UNSUPPORTED;
213 goto exit;
214 }
215
216 /* Sleep PDA is supported only by GCI rev >= 9 */
217 if (sih->gcirev < 9) {
218 err = BCME_UNSUPPORTED;
219 goto exit;
220 }
221
222 if (!IS_MEMTYPE_VALID(mem)) {
223 err = BCME_BADOPTION;
224 goto exit;
225 }
226
227 if (!IS_MEMCONFIG_VALID(config)) {
228 err = BCME_BADOPTION;
229 goto exit;
230 }
231
232 savecore = si_coreidx(sih);
233 gciregs = si_setcore(sih, GCI_CORE_ID, 0);
234
235 reg_data = ((mem &
236 GCI_INDIRECT_ADDRESS_REG_GPIOINDEX_MASK) <<
237 GCI_INDIRECT_ADDRESS_REG_GPIOINDEX_SHIFT) |
238 ((bank_num & GCI_INDIRECT_ADDRESS_REG_REGINDEX_MASK)
239 << GCI_INDIRECT_ADDRESS_REG_REGINDEX_SHIFT);
240
241 W_REG(osh, &gciregs->gci_indirect_addr, reg_data);
242
243 if (config == PDA_CONFIG_SET_PARTIAL) {
244 W_REG(osh, &gciregs->wlan_bankxsleeppda, pda);
245 W_REG(osh, &gciregs->wlan_bankxkill, 0);
246 }
247 else if (config == PDA_CONFIG_SET_FULL) {
248 W_REG(osh, &gciregs->wlan_bankxsleeppda, WLAN_BANKX_SLEEPPDA_REG_SLEEPPDA_MASK);
249 W_REG(osh, &gciregs->wlan_bankxkill, WLAN_BANKX_PKILL_REG_SLEEPPDA_MASK);
250 } else {
251 W_REG(osh, &gciregs->wlan_bankxsleeppda, 0);
252 W_REG(osh, &gciregs->wlan_bankxkill, 0);
253 }
254
255 si_setcoreidx(sih, savecore);
256
257 exit:
258 return err;
259 }
260
261 /* Configures the Active PDA for a particular bank for a given memory type */
262 int
hndmem_activepda_bank_config(si_t * sih,hndmem_type_t mem,int bank_num,hndmem_config_t config,uint32 pda)263 hndmem_activepda_bank_config(si_t *sih, hndmem_type_t mem,
264 int bank_num, hndmem_config_t config, uint32 pda)
265 {
266 uint32 savecore, reg_data;
267 gciregs_t *gciregs;
268 int err = BCME_OK;
269 osl_t *osh = si_osh(sih);
270
271 if (!IS_MEMTYPE_VALID(mem)) {
272 err = BCME_BADOPTION;
273 goto exit;
274 }
275
276 if (!IS_MEMCONFIG_VALID(config)) {
277 err = BCME_BADOPTION;
278 goto exit;
279 }
280
281 savecore = si_coreidx(sih);
282
283 /* TODO: Check whether SOCRAM core is present or not. If not, bail out */
284 /* In future we need to add code for TCM based chips as well */
285 if (!si_setcore(sih, SOCRAM_CORE_ID, 0)) {
286 err = BCME_UNSUPPORTED;
287 goto exit;
288 }
289
290 if (sih->gcirev >= 9) {
291 gciregs = si_setcore(sih, GCI_CORE_ID, 0);
292
293 reg_data = ((mem &
294 GCI_INDIRECT_ADDRESS_REG_GPIOINDEX_MASK) <<
295 GCI_INDIRECT_ADDRESS_REG_GPIOINDEX_SHIFT) |
296 ((bank_num & GCI_INDIRECT_ADDRESS_REG_REGINDEX_MASK)
297 << GCI_INDIRECT_ADDRESS_REG_REGINDEX_SHIFT);
298
299 W_REG(osh, &gciregs->gci_indirect_addr, reg_data);
300
301 if (config == PDA_CONFIG_SET_PARTIAL) {
302 W_REG(osh, &gciregs->wlan_bankxactivepda, pda);
303 }
304 else if (config == PDA_CONFIG_SET_FULL) {
305 W_REG(osh, &gciregs->wlan_bankxactivepda,
306 WLAN_BANKX_SLEEPPDA_REG_SLEEPPDA_MASK);
307 } else {
308 W_REG(osh, &gciregs->wlan_bankxactivepda, 0);
309 }
310 } else {
311 /* TODO: Configure SOCRAM PDA using SOCRAM registers */
312 err = BCME_UNSUPPORTED;
313 }
314
315 si_setcoreidx(sih, savecore);
316
317 exit:
318 return err;
319 }
320
321 /* Configures the Sleep PDA for all the banks for a given memory type */
322 int
hndmem_sleeppda_config(si_t * sih,hndmem_type_t mem,hndmem_config_t config)323 hndmem_sleeppda_config(si_t *sih, hndmem_type_t mem, hndmem_config_t config)
324 {
325 int bank;
326 int num_banks = hndmem_num_banks(sih, mem);
327 int err = BCME_OK;
328
329 /* Sleep PDA is supported only by GCI rev >= 9 */
330 if (sih->gcirev < 9) {
331 err = BCME_UNSUPPORTED;
332 goto exit;
333 }
334
335 if (!IS_MEMTYPE_VALID(mem)) {
336 err = BCME_BADOPTION;
337 goto exit;
338 }
339
340 if (!IS_MEMCONFIG_VALID(config)) {
341 err = BCME_BADOPTION;
342 goto exit;
343 }
344
345 for (bank = 0; bank < num_banks; bank++)
346 {
347 err = hndmem_sleeppda_bank_config(sih, mem, bank, config, 0);
348 }
349
350 exit:
351 return err;
352 }
353
354 /* Configures the Active PDA for all the banks for a given memory type */
355 int
hndmem_activepda_config(si_t * sih,hndmem_type_t mem,hndmem_config_t config)356 hndmem_activepda_config(si_t *sih, hndmem_type_t mem, hndmem_config_t config)
357 {
358 int bank;
359 int num_banks = hndmem_num_banks(sih, mem);
360 int err = BCME_OK;
361
362 if (!IS_MEMTYPE_VALID(mem)) {
363 err = BCME_BADOPTION;
364 goto exit;
365 }
366
367 if (!IS_MEMCONFIG_VALID(config)) {
368 err = BCME_BADOPTION;
369 goto exit;
370 }
371
372 for (bank = 0; bank < num_banks; bank++)
373 {
374 err = hndmem_activepda_bank_config(sih, mem, bank, config, 0);
375 }
376
377 exit:
378 return err;
379 }
380
381 /* Turn off/on all the possible banks in a given memory range.
382 * Currently this works only for SOCRAM as this is restricted by HW.
383 */
384 int
hndmem_activepda_mem_config(si_t * sih,hndmem_type_t mem,uint32 mem_start,uint32 size,hndmem_config_t config)385 hndmem_activepda_mem_config(si_t *sih, hndmem_type_t mem, uint32 mem_start,
386 uint32 size, hndmem_config_t config)
387 {
388 int bank, bank_sz, num_banks;
389 int mem_end;
390 int bank_start_addr, bank_end_addr;
391 int err = BCME_OK;
392
393 /* We can get bank size for only SOCRAM/TCM only. Support is not avilable
394 * for other memories (BM, UCM and SHM)
395 */
396 if (mem != MEM_SOCRAM) {
397 err = BCME_UNSUPPORTED;
398 goto exit;
399 }
400
401 num_banks = hndmem_num_banks(sih, mem);
402 bank_start_addr = hndmem_mem_base(sih, mem);
403 mem_end = mem_start + size - 1;
404
405 for (bank = 0; bank < num_banks; bank++)
406 {
407 /* Bank size is spcified in bankXinfo register in terms on KBs */
408 bank_sz = 1024 * hndmem_bank_size(sih, mem, bank);
409
410 bank_end_addr = bank_start_addr + bank_sz - 1;
411
412 if (config == PDA_CONFIG_SET_FULL) {
413 /* Check if the bank is completely overlapping with the given mem range */
414 if ((mem_start <= bank_start_addr) && (mem_end >= bank_end_addr)) {
415 err = hndmem_activepda_bank_config(sih, mem, bank, config, 0);
416 }
417 } else {
418 /* Check if the bank is completely overlaped with the given mem range */
419 if (((mem_start <= bank_start_addr) && (mem_end >= bank_end_addr)) ||
420 /* Check if the bank is partially overlaped with the given range */
421 ((mem_start <= bank_end_addr) && (mem_end >= bank_start_addr))) {
422 err = hndmem_activepda_bank_config(sih, mem, bank, config, 0);
423 }
424 }
425
426 bank_start_addr += bank_sz;
427 }
428
429 exit:
430 return err;
431 }
432