1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Debug/trace/assert driver definitions for Dongle Host Driver. 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Portions of this code are copyright (c) 2021 Cypress Semiconductor Corporation 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * Copyright (C) 1999-2017, Broadcom Corporation 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun * Unless you and Broadcom execute a separate written software license 9*4882a593Smuzhiyun * agreement governing use of this software, this software is licensed to you 10*4882a593Smuzhiyun * under the terms of the GNU General Public License version 2 (the "GPL"), 11*4882a593Smuzhiyun * available at http://www.broadcom.com/licenses/GPLv2.php, with the 12*4882a593Smuzhiyun * following added to such license: 13*4882a593Smuzhiyun * 14*4882a593Smuzhiyun * As a special exception, the copyright holders of this software give you 15*4882a593Smuzhiyun * permission to link this software with independent modules, and to copy and 16*4882a593Smuzhiyun * distribute the resulting executable under terms of your choice, provided that 17*4882a593Smuzhiyun * you also meet, for each linked independent module, the terms and conditions of 18*4882a593Smuzhiyun * the license of that module. An independent module is a module which is not 19*4882a593Smuzhiyun * derived from this software. The special exception does not apply to any 20*4882a593Smuzhiyun * modifications of the software. 21*4882a593Smuzhiyun * 22*4882a593Smuzhiyun * Notwithstanding the above, under no circumstances may you combine this 23*4882a593Smuzhiyun * software in any way with any other Broadcom software provided under a license 24*4882a593Smuzhiyun * other than the GPL, without Broadcom's express prior written consent. 25*4882a593Smuzhiyun * 26*4882a593Smuzhiyun * 27*4882a593Smuzhiyun * <<Broadcom-WL-IPTag/Open:>> 28*4882a593Smuzhiyun * 29*4882a593Smuzhiyun * $Id: dhd_dbg.h 700979 2017-05-23 05:31:00Z $ 30*4882a593Smuzhiyun */ 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun #ifndef _dhd_dbg_ 33*4882a593Smuzhiyun #define _dhd_dbg_ 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun #ifdef DHD_LOG_DUMP 36*4882a593Smuzhiyun extern char *dhd_log_dump_get_timestamp(void); 37*4882a593Smuzhiyun extern void dhd_log_dump_write(int type, char *binary_data, 38*4882a593Smuzhiyun int binary_len, const char *fmt, ...); 39*4882a593Smuzhiyun #ifndef _DHD_LOG_DUMP_DEFINITIONS_ 40*4882a593Smuzhiyun #define _DHD_LOG_DUMP_DEFINITIONS_ 41*4882a593Smuzhiyun #define GENERAL_LOG_HDR "\n-------------------- General log ---------------------------\n" 42*4882a593Smuzhiyun #define PRESERVE_LOG_HDR "\n-------------------- Preserve log ---------------------------\n" 43*4882a593Smuzhiyun #define SPECIAL_LOG_HDR "\n-------------------- Special log ---------------------------\n" 44*4882a593Smuzhiyun #define DHD_DUMP_LOG_HDR "\n-------------------- 'dhd dump' log -----------------------\n" 45*4882a593Smuzhiyun #define EXT_TRAP_LOG_HDR "\n-------------------- Extended trap data -------------------\n" 46*4882a593Smuzhiyun #define HEALTH_CHK_LOG_HDR "\n-------------------- Health check data --------------------\n" 47*4882a593Smuzhiyun #ifdef DHD_DUMP_PCIE_RINGS 48*4882a593Smuzhiyun #define FLOWRING_DUMP_HDR "\n-------------------- Flowring dump --------------------\n" 49*4882a593Smuzhiyun #endif /* DHD_DUMP_PCIE_RINGS */ 50*4882a593Smuzhiyun #define DHD_LOG_DUMP_WRITE(fmt, ...) \ 51*4882a593Smuzhiyun dhd_log_dump_write(DLD_BUF_TYPE_GENERAL, NULL, 0, fmt, ##__VA_ARGS__) 52*4882a593Smuzhiyun #define DHD_LOG_DUMP_WRITE_EX(fmt, ...) \ 53*4882a593Smuzhiyun dhd_log_dump_write(DLD_BUF_TYPE_SPECIAL, NULL, 0, fmt, ##__VA_ARGS__) 54*4882a593Smuzhiyun #define DHD_LOG_DUMP_WRITE_PRSRV(fmt, ...) \ 55*4882a593Smuzhiyun dhd_log_dump_write(DLD_BUF_TYPE_PRESERVE, NULL, 0, fmt, ##__VA_ARGS__) 56*4882a593Smuzhiyun #endif /* !_DHD_LOG_DUMP_DEFINITIONS_ */ 57*4882a593Smuzhiyun #define CONCISE_DUMP_BUFLEN 16 * 1024 58*4882a593Smuzhiyun #define ECNTRS_LOG_HDR "\n-------------------- Ecounters log --------------------------\n" 59*4882a593Smuzhiyun #ifdef DHD_STATUS_LOGGING 60*4882a593Smuzhiyun #define STATUS_LOG_HDR "\n-------------------- Status log -----------------------\n" 61*4882a593Smuzhiyun #endif /* DHD_STATUS_LOGGING */ 62*4882a593Smuzhiyun #define RTT_LOG_HDR "\n-------------------- RTT log --------------------------\n" 63*4882a593Smuzhiyun #define COOKIE_LOG_HDR "\n-------------------- Cookie List ----------------------------\n" 64*4882a593Smuzhiyun #endif /* DHD_LOG_DUMP */ 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun #if defined(DHD_DEBUG) 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun /* NON-NDIS cases */ 69*4882a593Smuzhiyun #ifdef DHD_LOG_DUMP 70*4882a593Smuzhiyun /* Common case for EFI and non EFI */ 71*4882a593Smuzhiyun #define DHD_ERROR(args) \ 72*4882a593Smuzhiyun do { \ 73*4882a593Smuzhiyun if (dhd_msg_level & DHD_ERROR_VAL) { \ 74*4882a593Smuzhiyun printf args; \ 75*4882a593Smuzhiyun DHD_LOG_DUMP_WRITE("[%s]: ", dhd_log_dump_get_timestamp()); \ 76*4882a593Smuzhiyun DHD_LOG_DUMP_WRITE args; \ 77*4882a593Smuzhiyun } \ 78*4882a593Smuzhiyun } while (0) 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun /* !defined(DHD_EFI) and defined(DHD_LOG_DUMP) */ 81*4882a593Smuzhiyun #define DHD_INFO(args) do {if (dhd_msg_level & DHD_INFO_VAL) printf args;} while (0) 82*4882a593Smuzhiyun #else /* DHD_LOG_DUMP */ 83*4882a593Smuzhiyun /* !defined(DHD_LOG_DUMP cases) */ 84*4882a593Smuzhiyun #define DHD_ERROR(args) do {if (dhd_msg_level & DHD_ERROR_VAL) printf args;} while (0) 85*4882a593Smuzhiyun #define DHD_INFO(args) do {if (dhd_msg_level & DHD_INFO_VAL) printf args;} while (0) 86*4882a593Smuzhiyun #endif /* DHD_LOG_DUMP */ 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun #define DHD_TRACE(args) do {if (dhd_msg_level & DHD_TRACE_VAL) printf args;} while (0) 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun #ifdef DHD_LOG_DUMP 91*4882a593Smuzhiyun /* LOG_DUMP defines common to EFI and NON-EFI */ 92*4882a593Smuzhiyun #define DHD_ERROR_MEM(args) \ 93*4882a593Smuzhiyun do { \ 94*4882a593Smuzhiyun if (dhd_msg_level & DHD_ERROR_VAL) { \ 95*4882a593Smuzhiyun if (dhd_msg_level & DHD_ERROR_MEM_VAL) { \ 96*4882a593Smuzhiyun printf args; \ 97*4882a593Smuzhiyun } \ 98*4882a593Smuzhiyun DHD_LOG_DUMP_WRITE("[%s]: ", dhd_log_dump_get_timestamp()); \ 99*4882a593Smuzhiyun DHD_LOG_DUMP_WRITE args; \ 100*4882a593Smuzhiyun } \ 101*4882a593Smuzhiyun } while (0) 102*4882a593Smuzhiyun #define DHD_IOVAR_MEM(args) \ 103*4882a593Smuzhiyun do { \ 104*4882a593Smuzhiyun if (dhd_msg_level & DHD_ERROR_VAL) { \ 105*4882a593Smuzhiyun if (dhd_msg_level & DHD_IOVAR_MEM_VAL) { \ 106*4882a593Smuzhiyun printf args; \ 107*4882a593Smuzhiyun } \ 108*4882a593Smuzhiyun DHD_LOG_DUMP_WRITE("[%s]: ", dhd_log_dump_get_timestamp()); \ 109*4882a593Smuzhiyun DHD_LOG_DUMP_WRITE args; \ 110*4882a593Smuzhiyun } \ 111*4882a593Smuzhiyun } while (0) 112*4882a593Smuzhiyun #define DHD_LOG_MEM(args) \ 113*4882a593Smuzhiyun do { \ 114*4882a593Smuzhiyun if (dhd_msg_level & DHD_ERROR_VAL) { \ 115*4882a593Smuzhiyun DHD_LOG_DUMP_WRITE("[%s]: ", dhd_log_dump_get_timestamp()); \ 116*4882a593Smuzhiyun DHD_LOG_DUMP_WRITE args; \ 117*4882a593Smuzhiyun } \ 118*4882a593Smuzhiyun } while (0) 119*4882a593Smuzhiyun /* NON-EFI builds with LOG DUMP enabled */ 120*4882a593Smuzhiyun #define DHD_EVENT(args) \ 121*4882a593Smuzhiyun do { \ 122*4882a593Smuzhiyun if (dhd_msg_level & DHD_EVENT_VAL) { \ 123*4882a593Smuzhiyun printf args; \ 124*4882a593Smuzhiyun DHD_LOG_DUMP_WRITE("[%s]: ", dhd_log_dump_get_timestamp()); \ 125*4882a593Smuzhiyun DHD_LOG_DUMP_WRITE args; \ 126*4882a593Smuzhiyun } \ 127*4882a593Smuzhiyun } while (0) 128*4882a593Smuzhiyun #define DHD_PRSRV_MEM(args) \ 129*4882a593Smuzhiyun do { \ 130*4882a593Smuzhiyun if (dhd_msg_level & DHD_EVENT_VAL) { \ 131*4882a593Smuzhiyun if (dhd_msg_level & DHD_PRSRV_MEM_VAL) \ 132*4882a593Smuzhiyun printf args; \ 133*4882a593Smuzhiyun DHD_LOG_DUMP_WRITE_PRSRV("[%s]: ", dhd_log_dump_get_timestamp()); \ 134*4882a593Smuzhiyun DHD_LOG_DUMP_WRITE_PRSRV args; \ 135*4882a593Smuzhiyun } \ 136*4882a593Smuzhiyun } while (0) 137*4882a593Smuzhiyun 138*4882a593Smuzhiyun /* Re-using 'DHD_MSGTRACE_VAL' for controlling printing of ecounter binary event 139*4882a593Smuzhiyun * logs to console and debug dump -- need to cleanup in the future to use separate 140*4882a593Smuzhiyun * 'DHD_ECNTR_VAL' bitmap flag. 'DHD_MSGTRACE_VAL' will be defined only 141*4882a593Smuzhiyun * for non-android builds. 142*4882a593Smuzhiyun */ 143*4882a593Smuzhiyun #define DHD_ECNTR_LOG(args) \ 144*4882a593Smuzhiyun do { \ 145*4882a593Smuzhiyun if (dhd_msg_level & DHD_EVENT_VAL) { \ 146*4882a593Smuzhiyun if (dhd_msg_level & DHD_MSGTRACE_VAL) { \ 147*4882a593Smuzhiyun printf args; \ 148*4882a593Smuzhiyun DHD_LOG_DUMP_WRITE("[%s]: ", dhd_log_dump_get_timestamp()); \ 149*4882a593Smuzhiyun DHD_LOG_DUMP_WRITE args; \ 150*4882a593Smuzhiyun } \ 151*4882a593Smuzhiyun } \ 152*4882a593Smuzhiyun } while (0) 153*4882a593Smuzhiyun 154*4882a593Smuzhiyun #define DHD_ERROR_EX(args) \ 155*4882a593Smuzhiyun do { \ 156*4882a593Smuzhiyun if (dhd_msg_level & DHD_ERROR_VAL) { \ 157*4882a593Smuzhiyun printf args; \ 158*4882a593Smuzhiyun DHD_LOG_DUMP_WRITE_EX("[%s]: ", dhd_log_dump_get_timestamp()); \ 159*4882a593Smuzhiyun DHD_LOG_DUMP_WRITE_EX args; \ 160*4882a593Smuzhiyun } \ 161*4882a593Smuzhiyun } while (0) 162*4882a593Smuzhiyun 163*4882a593Smuzhiyun #define DHD_MSGTRACE_LOG(args) \ 164*4882a593Smuzhiyun do { \ 165*4882a593Smuzhiyun if (dhd_msg_level & DHD_MSGTRACE_VAL) { \ 166*4882a593Smuzhiyun printf args; \ 167*4882a593Smuzhiyun } \ 168*4882a593Smuzhiyun DHD_LOG_DUMP_WRITE("[%s]: ", dhd_log_dump_get_timestamp()); \ 169*4882a593Smuzhiyun DHD_LOG_DUMP_WRITE args; \ 170*4882a593Smuzhiyun } while (0) 171*4882a593Smuzhiyun #else /* DHD_LOG_DUMP */ 172*4882a593Smuzhiyun /* !DHD_LOG_DUMP */ 173*4882a593Smuzhiyun #define DHD_MSGTRACE_LOG(args) do {if (dhd_msg_level & DHD_MSGTRACE_VAL) printf args;} while (0) 174*4882a593Smuzhiyun #define DHD_ERROR_MEM(args) DHD_ERROR(args) 175*4882a593Smuzhiyun #define DHD_IOVAR_MEM(args) DHD_ERROR(args) 176*4882a593Smuzhiyun #define DHD_LOG_MEM(args) DHD_ERROR(args) 177*4882a593Smuzhiyun #define DHD_EVENT(args) do {if (dhd_msg_level & DHD_EVENT_VAL) printf args;} while (0) 178*4882a593Smuzhiyun #define DHD_ECNTR_LOG(args) DHD_EVENT(args) 179*4882a593Smuzhiyun #define DHD_PRSRV_MEM(args) DHD_EVENT(args) 180*4882a593Smuzhiyun #define DHD_ERROR_EX(args) DHD_ERROR(args) 181*4882a593Smuzhiyun #endif /* DHD_LOG_DUMP */ 182*4882a593Smuzhiyun 183*4882a593Smuzhiyun #define DHD_DATA(args) do {if (dhd_msg_level & DHD_DATA_VAL) printf args;} while (0) 184*4882a593Smuzhiyun #define DHD_CTL(args) do {if (dhd_msg_level & DHD_CTL_VAL) printf args;} while (0) 185*4882a593Smuzhiyun #define DHD_TIMER(args) do {if (dhd_msg_level & DHD_TIMER_VAL) printf args;} while (0) 186*4882a593Smuzhiyun #define DHD_HDRS(args) do {if (dhd_msg_level & DHD_HDRS_VAL) printf args;} while (0) 187*4882a593Smuzhiyun #define DHD_BYTES(args) do {if (dhd_msg_level & DHD_BYTES_VAL) printf args;} while (0) 188*4882a593Smuzhiyun #define DHD_INTR(args) do {if (dhd_msg_level & DHD_INTR_VAL) printf args;} while (0) 189*4882a593Smuzhiyun #define DHD_GLOM(args) do {if (dhd_msg_level & DHD_GLOM_VAL) printf args;} while (0) 190*4882a593Smuzhiyun #define DHD_BTA(args) do {if (dhd_msg_level & DHD_BTA_VAL) printf args;} while (0) 191*4882a593Smuzhiyun #define DHD_ISCAN(args) do {if (dhd_msg_level & DHD_ISCAN_VAL) printf args;} while (0) 192*4882a593Smuzhiyun #define DHD_ARPOE(args) do {if (dhd_msg_level & DHD_ARPOE_VAL) printf args;} while (0) 193*4882a593Smuzhiyun #define DHD_REORDER(args) do {if (dhd_msg_level & DHD_REORDER_VAL) printf args;} while (0) 194*4882a593Smuzhiyun #define DHD_PNO(args) do {if (dhd_msg_level & DHD_PNO_VAL) printf args;} while (0) 195*4882a593Smuzhiyun #define DHD_RTT(args) do {if (dhd_msg_level & DHD_RTT_VAL) printf args;} while (0) 196*4882a593Smuzhiyun #define DHD_PKT_MON(args) do {if (dhd_msg_level & DHD_PKT_MON_VAL) printf args;} while (0) 197*4882a593Smuzhiyun 198*4882a593Smuzhiyun #if defined(DHD_LOG_DUMP) 199*4882a593Smuzhiyun #if defined(DHD_LOG_PRINT_RATE_LIMIT) 200*4882a593Smuzhiyun #define DHD_FWLOG(args) \ 201*4882a593Smuzhiyun do { \ 202*4882a593Smuzhiyun if (dhd_msg_level & DHD_FWLOG_VAL) { \ 203*4882a593Smuzhiyun if (!log_print_threshold) \ 204*4882a593Smuzhiyun printf args; \ 205*4882a593Smuzhiyun DHD_LOG_DUMP_WRITE args; \ 206*4882a593Smuzhiyun } \ 207*4882a593Smuzhiyun } while (0) 208*4882a593Smuzhiyun #else 209*4882a593Smuzhiyun #define DHD_FWLOG(args) \ 210*4882a593Smuzhiyun do { \ 211*4882a593Smuzhiyun if (dhd_msg_level & DHD_FWLOG_VAL) { \ 212*4882a593Smuzhiyun printf args; \ 213*4882a593Smuzhiyun DHD_LOG_DUMP_WRITE args; \ 214*4882a593Smuzhiyun } \ 215*4882a593Smuzhiyun } while (0) 216*4882a593Smuzhiyun #endif // endif 217*4882a593Smuzhiyun #else /* DHD_LOG_DUMP */ 218*4882a593Smuzhiyun #define DHD_FWLOG(args) do {if (dhd_msg_level & DHD_FWLOG_VAL) printf args;} while (0) 219*4882a593Smuzhiyun #endif /* DHD_LOG_DUMP */ 220*4882a593Smuzhiyun 221*4882a593Smuzhiyun #define DHD_DBGIF(args) do {if (dhd_msg_level & DHD_DBGIF_VAL) printf args;} while (0) 222*4882a593Smuzhiyun 223*4882a593Smuzhiyun #ifdef DHD_PCIE_NATIVE_RUNTIMEPM 224*4882a593Smuzhiyun #define DHD_RPM(args) do {if (dhd_msg_level & DHD_RPM_VAL) printf args;} while (0) 225*4882a593Smuzhiyun #endif /* DHD_PCIE_NATIVE_RUNTIMEPM */ 226*4882a593Smuzhiyun 227*4882a593Smuzhiyun #ifdef CUSTOMER_HW4_DEBUG 228*4882a593Smuzhiyun #define DHD_TRACE_HW4 DHD_ERROR 229*4882a593Smuzhiyun #define DHD_INFO_HW4 DHD_ERROR 230*4882a593Smuzhiyun #define DHD_ERROR_NO_HW4 DHD_INFO 231*4882a593Smuzhiyun #else 232*4882a593Smuzhiyun #define DHD_TRACE_HW4 DHD_TRACE 233*4882a593Smuzhiyun #define DHD_INFO_HW4 DHD_INFO 234*4882a593Smuzhiyun #define DHD_ERROR_NO_HW4 DHD_ERROR 235*4882a593Smuzhiyun #endif /* CUSTOMER_HW4_DEBUG */ 236*4882a593Smuzhiyun 237*4882a593Smuzhiyun #define DHD_ERROR_ON() (dhd_msg_level & DHD_ERROR_VAL) 238*4882a593Smuzhiyun #define DHD_TRACE_ON() (dhd_msg_level & DHD_TRACE_VAL) 239*4882a593Smuzhiyun #define DHD_INFO_ON() (dhd_msg_level & DHD_INFO_VAL) 240*4882a593Smuzhiyun #define DHD_DATA_ON() (dhd_msg_level & DHD_DATA_VAL) 241*4882a593Smuzhiyun #define DHD_CTL_ON() (dhd_msg_level & DHD_CTL_VAL) 242*4882a593Smuzhiyun #define DHD_TIMER_ON() (dhd_msg_level & DHD_TIMER_VAL) 243*4882a593Smuzhiyun #define DHD_HDRS_ON() (dhd_msg_level & DHD_HDRS_VAL) 244*4882a593Smuzhiyun #define DHD_BYTES_ON() (dhd_msg_level & DHD_BYTES_VAL) 245*4882a593Smuzhiyun #define DHD_INTR_ON() (dhd_msg_level & DHD_INTR_VAL) 246*4882a593Smuzhiyun #define DHD_GLOM_ON() (dhd_msg_level & DHD_GLOM_VAL) 247*4882a593Smuzhiyun #define DHD_EVENT_ON() (dhd_msg_level & DHD_EVENT_VAL) 248*4882a593Smuzhiyun #define DHD_BTA_ON() (dhd_msg_level & DHD_BTA_VAL) 249*4882a593Smuzhiyun #define DHD_ISCAN_ON() (dhd_msg_level & DHD_ISCAN_VAL) 250*4882a593Smuzhiyun #define DHD_ARPOE_ON() (dhd_msg_level & DHD_ARPOE_VAL) 251*4882a593Smuzhiyun #define DHD_REORDER_ON() (dhd_msg_level & DHD_REORDER_VAL) 252*4882a593Smuzhiyun #define DHD_NOCHECKDIED_ON() (dhd_msg_level & DHD_NOCHECKDIED_VAL) 253*4882a593Smuzhiyun #define DHD_PNO_ON() (dhd_msg_level & DHD_PNO_VAL) 254*4882a593Smuzhiyun #define DHD_RTT_ON() (dhd_msg_level & DHD_RTT_VAL) 255*4882a593Smuzhiyun #define DHD_MSGTRACE_ON() (dhd_msg_level & DHD_MSGTRACE_VAL) 256*4882a593Smuzhiyun #define DHD_FWLOG_ON() (dhd_msg_level & DHD_FWLOG_VAL) 257*4882a593Smuzhiyun #define DHD_DBGIF_ON() (dhd_msg_level & DHD_DBGIF_VAL) 258*4882a593Smuzhiyun #define DHD_PKT_MON_ON() (dhd_msg_level & DHD_PKT_MON_VAL) 259*4882a593Smuzhiyun #define DHD_PKT_MON_DUMP_ON() (dhd_msg_level & DHD_PKT_MON_DUMP_VAL) 260*4882a593Smuzhiyun #ifdef DHD_PCIE_NATIVE_RUNTIMEPM 261*4882a593Smuzhiyun #define DHD_RPM_ON() (dhd_msg_level & DHD_RPM_VAL) 262*4882a593Smuzhiyun #endif /* DHD_PCIE_NATIVE_RUNTIMEPM */ 263*4882a593Smuzhiyun 264*4882a593Smuzhiyun #else /* defined(BCMDBG) || defined(DHD_DEBUG) */ 265*4882a593Smuzhiyun 266*4882a593Smuzhiyun #define DHD_ERROR(args) do {if (dhd_msg_level & DHD_ERROR_VAL) \ 267*4882a593Smuzhiyun printf args;} while (0) 268*4882a593Smuzhiyun #define DHD_TRACE(args) 269*4882a593Smuzhiyun #define DHD_INFO(args) 270*4882a593Smuzhiyun 271*4882a593Smuzhiyun #define DHD_DATA(args) 272*4882a593Smuzhiyun #define DHD_CTL(args) 273*4882a593Smuzhiyun #define DHD_TIMER(args) 274*4882a593Smuzhiyun #define DHD_HDRS(args) 275*4882a593Smuzhiyun #define DHD_BYTES(args) 276*4882a593Smuzhiyun #define DHD_INTR(args) 277*4882a593Smuzhiyun #define DHD_GLOM(args) 278*4882a593Smuzhiyun 279*4882a593Smuzhiyun #define DHD_EVENT(args) 280*4882a593Smuzhiyun #define DHD_ECNTR_LOG(args) DHD_EVENT(args) 281*4882a593Smuzhiyun 282*4882a593Smuzhiyun #define DHD_PRSRV_MEM(args) DHD_EVENT(args) 283*4882a593Smuzhiyun 284*4882a593Smuzhiyun #define DHD_BTA(args) 285*4882a593Smuzhiyun #define DHD_ISCAN(args) 286*4882a593Smuzhiyun #define DHD_ARPOE(args) 287*4882a593Smuzhiyun #define DHD_REORDER(args) 288*4882a593Smuzhiyun #define DHD_PNO(args) 289*4882a593Smuzhiyun #define DHD_RTT(args) 290*4882a593Smuzhiyun #define DHD_PKT_MON(args) 291*4882a593Smuzhiyun 292*4882a593Smuzhiyun #define DHD_MSGTRACE_LOG(args) 293*4882a593Smuzhiyun #define DHD_FWLOG(args) 294*4882a593Smuzhiyun 295*4882a593Smuzhiyun #define DHD_DBGIF(args) 296*4882a593Smuzhiyun 297*4882a593Smuzhiyun #define DHD_ERROR_MEM(args) DHD_ERROR(args) 298*4882a593Smuzhiyun #define DHD_IOVAR_MEM(args) DHD_ERROR(args) 299*4882a593Smuzhiyun #define DHD_LOG_MEM(args) DHD_ERROR(args) 300*4882a593Smuzhiyun #define DHD_ERROR_EX(args) DHD_ERROR(args) 301*4882a593Smuzhiyun 302*4882a593Smuzhiyun #ifdef CUSTOMER_HW4_DEBUG 303*4882a593Smuzhiyun #define DHD_TRACE_HW4 DHD_ERROR 304*4882a593Smuzhiyun #define DHD_INFO_HW4 DHD_ERROR 305*4882a593Smuzhiyun #define DHD_ERROR_NO_HW4 DHD_INFO 306*4882a593Smuzhiyun #else 307*4882a593Smuzhiyun #define DHD_TRACE_HW4 DHD_TRACE 308*4882a593Smuzhiyun #define DHD_INFO_HW4 DHD_INFO 309*4882a593Smuzhiyun #define DHD_ERROR_NO_HW4 DHD_ERROR 310*4882a593Smuzhiyun #endif /* CUSTOMER_HW4_DEBUG */ 311*4882a593Smuzhiyun 312*4882a593Smuzhiyun #define DHD_ERROR_ON() 0 313*4882a593Smuzhiyun #define DHD_TRACE_ON() 0 314*4882a593Smuzhiyun #define DHD_INFO_ON() 0 315*4882a593Smuzhiyun #define DHD_DATA_ON() 0 316*4882a593Smuzhiyun #define DHD_CTL_ON() 0 317*4882a593Smuzhiyun #define DHD_TIMER_ON() 0 318*4882a593Smuzhiyun #define DHD_HDRS_ON() 0 319*4882a593Smuzhiyun #define DHD_BYTES_ON() 0 320*4882a593Smuzhiyun #define DHD_INTR_ON() 0 321*4882a593Smuzhiyun #define DHD_GLOM_ON() 0 322*4882a593Smuzhiyun #define DHD_EVENT_ON() 0 323*4882a593Smuzhiyun #define DHD_BTA_ON() 0 324*4882a593Smuzhiyun #define DHD_ISCAN_ON() 0 325*4882a593Smuzhiyun #define DHD_ARPOE_ON() 0 326*4882a593Smuzhiyun #define DHD_REORDER_ON() 0 327*4882a593Smuzhiyun #define DHD_NOCHECKDIED_ON() 0 328*4882a593Smuzhiyun #define DHD_PNO_ON() 0 329*4882a593Smuzhiyun #define DHD_RTT_ON() 0 330*4882a593Smuzhiyun #define DHD_PKT_MON_ON() 0 331*4882a593Smuzhiyun #define DHD_PKT_MON_DUMP_ON() 0 332*4882a593Smuzhiyun #define DHD_MSGTRACE_ON() 0 333*4882a593Smuzhiyun #define DHD_FWLOG_ON() 0 334*4882a593Smuzhiyun #define DHD_DBGIF_ON() 0 335*4882a593Smuzhiyun #ifdef DHD_PCIE_NATIVE_RUNTIMEPM 336*4882a593Smuzhiyun #define DHD_RPM_ON() 0 337*4882a593Smuzhiyun #endif /* DHD_PCIE_NATIVE_RUNTIMEPM */ 338*4882a593Smuzhiyun #endif // endif 339*4882a593Smuzhiyun 340*4882a593Smuzhiyun #define PRINT_RATE_LIMIT_PERIOD 5000000u /* 5s in units of us */ 341*4882a593Smuzhiyun #define DHD_ERROR_RLMT(args) \ 342*4882a593Smuzhiyun do { \ 343*4882a593Smuzhiyun if (dhd_msg_level & DHD_ERROR_VAL) { \ 344*4882a593Smuzhiyun static uint64 __err_ts = 0; \ 345*4882a593Smuzhiyun static uint32 __err_cnt = 0; \ 346*4882a593Smuzhiyun uint64 __cur_ts = 0; \ 347*4882a593Smuzhiyun __cur_ts = OSL_SYSUPTIME_US(); \ 348*4882a593Smuzhiyun if (__err_ts == 0 || (__cur_ts > __err_ts && \ 349*4882a593Smuzhiyun (__cur_ts - __err_ts > PRINT_RATE_LIMIT_PERIOD))) { \ 350*4882a593Smuzhiyun __err_ts = __cur_ts; \ 351*4882a593Smuzhiyun DHD_ERROR(args); \ 352*4882a593Smuzhiyun DHD_ERROR(("[Repeats %u times]\n", __err_cnt)); \ 353*4882a593Smuzhiyun __err_cnt = 0; \ 354*4882a593Smuzhiyun } else { \ 355*4882a593Smuzhiyun ++__err_cnt; \ 356*4882a593Smuzhiyun } \ 357*4882a593Smuzhiyun } \ 358*4882a593Smuzhiyun } while (0) 359*4882a593Smuzhiyun 360*4882a593Smuzhiyun /* even in non-BCMDBG builds, logging of dongle iovars should be available */ 361*4882a593Smuzhiyun #define DHD_DNGL_IOVAR_SET(args) \ 362*4882a593Smuzhiyun do {if (dhd_msg_level & DHD_DNGL_IOVAR_SET_VAL) printf args;} while (0) 363*4882a593Smuzhiyun 364*4882a593Smuzhiyun #define DHD_LOG(args) 365*4882a593Smuzhiyun 366*4882a593Smuzhiyun #define DHD_BLOG(cp, size) 367*4882a593Smuzhiyun 368*4882a593Smuzhiyun #define DHD_NONE(args) 369*4882a593Smuzhiyun extern int dhd_msg_level; 370*4882a593Smuzhiyun #ifdef DHD_LOG_PRINT_RATE_LIMIT 371*4882a593Smuzhiyun extern int log_print_threshold; 372*4882a593Smuzhiyun #endif /* DHD_LOG_PRINT_RATE_LIMIT */ 373*4882a593Smuzhiyun 374*4882a593Smuzhiyun #define DHD_RTT_MEM(args) DHD_LOG_MEM(args) 375*4882a593Smuzhiyun #define DHD_RTT_ERR(args) DHD_ERROR(args) 376*4882a593Smuzhiyun 377*4882a593Smuzhiyun /* Defines msg bits */ 378*4882a593Smuzhiyun #include <dhdioctl.h> 379*4882a593Smuzhiyun 380*4882a593Smuzhiyun #endif /* _dhd_dbg_ */ 381