1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Broadcom USB remote download definitions 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright (C) 1999-2016, Broadcom Corporation 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * Unless you and Broadcom execute a separate written software license 7*4882a593Smuzhiyun * agreement governing use of this software, this software is licensed to you 8*4882a593Smuzhiyun * under the terms of the GNU General Public License version 2 (the "GPL"), 9*4882a593Smuzhiyun * available at http://www.broadcom.com/licenses/GPLv2.php, with the 10*4882a593Smuzhiyun * following added to such license: 11*4882a593Smuzhiyun * 12*4882a593Smuzhiyun * As a special exception, the copyright holders of this software give you 13*4882a593Smuzhiyun * permission to link this software with independent modules, and to copy and 14*4882a593Smuzhiyun * distribute the resulting executable under terms of your choice, provided that 15*4882a593Smuzhiyun * you also meet, for each linked independent module, the terms and conditions of 16*4882a593Smuzhiyun * the license of that module. An independent module is a module which is not 17*4882a593Smuzhiyun * derived from this software. The special exception does not apply to any 18*4882a593Smuzhiyun * modifications of the software. 19*4882a593Smuzhiyun * 20*4882a593Smuzhiyun * Notwithstanding the above, under no circumstances may you combine this 21*4882a593Smuzhiyun * software in any way with any other Broadcom software provided under a license 22*4882a593Smuzhiyun * other than the GPL, without Broadcom's express prior written consent. 23*4882a593Smuzhiyun * 24*4882a593Smuzhiyun * 25*4882a593Smuzhiyun * <<Broadcom-WL-IPTag/Open:>> 26*4882a593Smuzhiyun * 27*4882a593Smuzhiyun * $Id: usbrdl.h 597933 2015-11-06 18:52:06Z $ 28*4882a593Smuzhiyun */ 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun #ifndef _USB_RDL_H 31*4882a593Smuzhiyun #define _USB_RDL_H 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun /* Control messages: bRequest values */ 34*4882a593Smuzhiyun #define DL_GETSTATE 0 /* returns the rdl_state_t struct */ 35*4882a593Smuzhiyun #define DL_CHECK_CRC 1 /* currently unused */ 36*4882a593Smuzhiyun #define DL_GO 2 /* execute downloaded image */ 37*4882a593Smuzhiyun #define DL_START 3 /* initialize dl state */ 38*4882a593Smuzhiyun #define DL_REBOOT 4 /* reboot the device in 2 seconds */ 39*4882a593Smuzhiyun #define DL_GETVER 5 /* returns the bootrom_id_t struct */ 40*4882a593Smuzhiyun #define DL_GO_PROTECTED 6 /* execute the downloaded code and set reset event 41*4882a593Smuzhiyun * to occur in 2 seconds. It is the responsibility 42*4882a593Smuzhiyun * of the downloaded code to clear this event 43*4882a593Smuzhiyun */ 44*4882a593Smuzhiyun #define DL_EXEC 7 /* jump to a supplied address */ 45*4882a593Smuzhiyun #define DL_RESETCFG 8 /* To support single enum on dongle 46*4882a593Smuzhiyun * - Not used by bootloader 47*4882a593Smuzhiyun */ 48*4882a593Smuzhiyun #define DL_DEFER_RESP_OK 9 /* Potentially defer the response to setup 49*4882a593Smuzhiyun * if resp unavailable 50*4882a593Smuzhiyun */ 51*4882a593Smuzhiyun #define DL_CHGSPD 0x0A 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun #define DL_HWCMD_MASK 0xfc /* Mask for hardware read commands: */ 54*4882a593Smuzhiyun #define DL_RDHW 0x10 /* Read a hardware address (Ctl-in) */ 55*4882a593Smuzhiyun #define DL_RDHW32 0x10 /* Read a 32 bit word */ 56*4882a593Smuzhiyun #define DL_RDHW16 0x11 /* Read 16 bits */ 57*4882a593Smuzhiyun #define DL_RDHW8 0x12 /* Read an 8 bit byte */ 58*4882a593Smuzhiyun #define DL_WRHW 0x14 /* Write a hardware address (Ctl-out) */ 59*4882a593Smuzhiyun #define DL_WRHW_BLK 0x13 /* Block write to hardware access */ 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun #define DL_CMD_WRHW 2 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun /* states */ 65*4882a593Smuzhiyun #define DL_WAITING 0 /* waiting to rx first pkt that includes the hdr info */ 66*4882a593Smuzhiyun #define DL_READY 1 /* hdr was good, waiting for more of the compressed image */ 67*4882a593Smuzhiyun #define DL_BAD_HDR 2 /* hdr was corrupted */ 68*4882a593Smuzhiyun #define DL_BAD_CRC 3 /* compressed image was corrupted */ 69*4882a593Smuzhiyun #define DL_RUNNABLE 4 /* download was successful, waiting for go cmd */ 70*4882a593Smuzhiyun #define DL_START_FAIL 5 /* failed to initialize correctly */ 71*4882a593Smuzhiyun #define DL_NVRAM_TOOBIG 6 /* host specified nvram data exceeds DL_NVRAM value */ 72*4882a593Smuzhiyun #define DL_IMAGE_TOOBIG 7 /* download image too big (exceeds DATA_START for rdl) */ 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun #define TIMEOUT 5000 /* Timeout for usb commands */ 75*4882a593Smuzhiyun 76*4882a593Smuzhiyun struct bcm_device_id { 77*4882a593Smuzhiyun char *name; 78*4882a593Smuzhiyun uint32 vend; 79*4882a593Smuzhiyun uint32 prod; 80*4882a593Smuzhiyun }; 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun typedef struct { 83*4882a593Smuzhiyun uint32 state; 84*4882a593Smuzhiyun uint32 bytes; 85*4882a593Smuzhiyun } rdl_state_t; 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun typedef struct { 88*4882a593Smuzhiyun uint32 chip; /* Chip id */ 89*4882a593Smuzhiyun uint32 chiprev; /* Chip rev */ 90*4882a593Smuzhiyun uint32 ramsize; /* Size of RAM */ 91*4882a593Smuzhiyun uint32 remapbase; /* Current remap base address */ 92*4882a593Smuzhiyun uint32 boardtype; /* Type of board */ 93*4882a593Smuzhiyun uint32 boardrev; /* Board revision */ 94*4882a593Smuzhiyun } bootrom_id_t; 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun /* struct for backplane & jtag accesses */ 97*4882a593Smuzhiyun typedef struct { 98*4882a593Smuzhiyun uint32 cmd; /* tag to identify the cmd */ 99*4882a593Smuzhiyun uint32 addr; /* backplane address for write */ 100*4882a593Smuzhiyun uint32 len; /* length of data: 1, 2, 4 bytes */ 101*4882a593Smuzhiyun uint32 data; /* data to write */ 102*4882a593Smuzhiyun } hwacc_t; 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun /* struct for querying nvram params from bootloader */ 106*4882a593Smuzhiyun #define QUERY_STRING_MAX 32 107*4882a593Smuzhiyun typedef struct { 108*4882a593Smuzhiyun uint32 cmd; /* tag to identify the cmd */ 109*4882a593Smuzhiyun char var[QUERY_STRING_MAX]; /* param name */ 110*4882a593Smuzhiyun } nvparam_t; 111*4882a593Smuzhiyun 112*4882a593Smuzhiyun typedef void (*exec_fn_t)(void *sih); 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun #define USB_CTRL_IN (USB_TYPE_VENDOR | 0x80 | USB_RECIP_INTERFACE) 115*4882a593Smuzhiyun #define USB_CTRL_OUT (USB_TYPE_VENDOR | 0 | USB_RECIP_INTERFACE) 116*4882a593Smuzhiyun 117*4882a593Smuzhiyun #define USB_CTRL_EP_TIMEOUT 500 /* Timeout used in USB control_msg transactions. */ 118*4882a593Smuzhiyun #define USB_BULK_EP_TIMEOUT 500 /* Timeout used in USB bulk transactions. */ 119*4882a593Smuzhiyun 120*4882a593Smuzhiyun #define RDL_CHUNK_MAX (64 * 1024) /* max size of each dl transfer */ 121*4882a593Smuzhiyun #define RDL_CHUNK 1500 /* size of each dl transfer */ 122*4882a593Smuzhiyun 123*4882a593Smuzhiyun /* bootloader makes special use of trx header "offsets" array */ 124*4882a593Smuzhiyun #define TRX_OFFSETS_DLFWLEN_IDX 0 /* Size of the fw; used in uncompressed case */ 125*4882a593Smuzhiyun #define TRX_OFFSETS_JUMPTO_IDX 1 /* RAM address for jumpto after download */ 126*4882a593Smuzhiyun #define TRX_OFFSETS_NVM_LEN_IDX 2 /* Length of appended NVRAM data */ 127*4882a593Smuzhiyun #ifdef BCMTRXV2 128*4882a593Smuzhiyun #define TRX_OFFSETS_DSG_LEN_IDX 3 /* Length of digital signature for the first image */ 129*4882a593Smuzhiyun #define TRX_OFFSETS_CFG_LEN_IDX 4 /* Length of config region, which is not digitally signed */ 130*4882a593Smuzhiyun #endif /* BCMTRXV2 */ 131*4882a593Smuzhiyun 132*4882a593Smuzhiyun #define TRX_OFFSETS_DLBASE_IDX 0 /* RAM start address for download */ 133*4882a593Smuzhiyun 134*4882a593Smuzhiyun #endif /* _USB_RDL_H */ 135