1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Generic Broadcom Home Networking Division (HND) PIO engine HW interface 3*4882a593Smuzhiyun * This supports the following chips: BCM42xx, 44xx, 47xx . 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2020, Broadcom. 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Unless you and Broadcom execute a separate written software license 8*4882a593Smuzhiyun * agreement governing use of this software, this software is licensed to you 9*4882a593Smuzhiyun * under the terms of the GNU General Public License version 2 (the "GPL"), 10*4882a593Smuzhiyun * available at http://www.broadcom.com/licenses/GPLv2.php, with the 11*4882a593Smuzhiyun * following added to such license: 12*4882a593Smuzhiyun * 13*4882a593Smuzhiyun * As a special exception, the copyright holders of this software give you 14*4882a593Smuzhiyun * permission to link this software with independent modules, and to copy and 15*4882a593Smuzhiyun * distribute the resulting executable under terms of your choice, provided that 16*4882a593Smuzhiyun * you also meet, for each linked independent module, the terms and conditions of 17*4882a593Smuzhiyun * the license of that module. An independent module is a module which is not 18*4882a593Smuzhiyun * derived from this software. The special exception does not apply to any 19*4882a593Smuzhiyun * modifications of the software. 20*4882a593Smuzhiyun * 21*4882a593Smuzhiyun * 22*4882a593Smuzhiyun * <<Broadcom-WL-IPTag/Dual:>> 23*4882a593Smuzhiyun */ 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun #ifndef _sbhndpio_h_ 26*4882a593Smuzhiyun #define _sbhndpio_h_ 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun /* PIO structure, 29*4882a593Smuzhiyun * support two PIO format: 2 bytes access and 4 bytes access 30*4882a593Smuzhiyun * basic FIFO register set is per channel(transmit or receive) 31*4882a593Smuzhiyun * a pair of channels is defined for convenience 32*4882a593Smuzhiyun */ 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun /* 2byte-wide pio register set per channel(xmt or rcv) */ 35*4882a593Smuzhiyun typedef volatile struct { 36*4882a593Smuzhiyun uint16 fifocontrol; 37*4882a593Smuzhiyun uint16 fifodata; 38*4882a593Smuzhiyun uint16 fifofree; /* only valid in xmt channel, not in rcv channel */ 39*4882a593Smuzhiyun uint16 PAD; 40*4882a593Smuzhiyun } pio2regs_t; 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun /* a pair of pio channels(tx and rx) */ 43*4882a593Smuzhiyun typedef volatile struct { 44*4882a593Smuzhiyun pio2regs_t tx; 45*4882a593Smuzhiyun pio2regs_t rx; 46*4882a593Smuzhiyun } pio2regp_t; 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun /* 4byte-wide pio register set per channel(xmt or rcv) */ 49*4882a593Smuzhiyun typedef volatile struct { 50*4882a593Smuzhiyun uint32 fifocontrol; 51*4882a593Smuzhiyun uint32 fifodata; 52*4882a593Smuzhiyun } pio4regs_t; 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun /* a pair of pio channels(tx and rx) */ 55*4882a593Smuzhiyun typedef volatile struct { 56*4882a593Smuzhiyun pio4regs_t tx; 57*4882a593Smuzhiyun pio4regs_t rx; 58*4882a593Smuzhiyun } pio4regp_t; 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun #endif /* _sbhndpio_h_ */ 61