xref: /OK3568_Linux_fs/external/rkwifibt/drivers/bcmdhd/include/hndoobr.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1 /*
2  * HND OOBR interface header
3  *
4  * Copyright (C) 2020, Broadcom.
5  *
6  *      Unless you and Broadcom execute a separate written software license
7  * agreement governing use of this software, this software is licensed to you
8  * under the terms of the GNU General Public License version 2 (the "GPL"),
9  * available at http://www.broadcom.com/licenses/GPLv2.php, with the
10  * following added to such license:
11  *
12  *      As a special exception, the copyright holders of this software give you
13  * permission to link this software with independent modules, and to copy and
14  * distribute the resulting executable under terms of your choice, provided that
15  * you also meet, for each linked independent module, the terms and conditions of
16  * the license of that module.  An independent module is a module which is not
17  * derived from this software.  The special exception does not apply to any
18  * modifications of the software.
19  *
20  *
21  * <<Broadcom-WL-IPTag/Dual:>>
22  */
23 
24 #ifndef _hndoobr_h_
25 #define _hndoobr_h_
26 
27 #include <typedefs.h>
28 #include <siutils.h>
29 
30 /* for 'srcpidx' of hnd_oobr_get_intr_config() */
31 #define HND_CORE_MAIN_INTR	0
32 #define HND_CORE_ALT_INTR	1
33 
34 uint32 hnd_oobr_get_clkpwrreq(si_t *sih, uint coreid);
35 uint32 hnd_oobr_get_intstatus(si_t *sih);
36 int hnd_oobr_get_intr_config(si_t *sih, uint srccidx, uint srcpidx, uint dstcidx, uint *dstpidx);
37 int hnd_oobr_set_intr_src(si_t *sih, uint dstcidx, uint dstpidx, uint intrnum);
38 void hnd_oobr_init(si_t *sih);
39 
40 #ifdef BCMDBG
41 /* dump oobr registers values to console */
42 void hnd_oobr_dump(si_t *sih);
43 #endif
44 
45 #define OOBR_INVALID_PORT       0xFFu
46 
47 /* per core source/dest sel reg */
48 #define OOBR_INTR_PER_CONFREG           4u           /* 4 interrupts per configure reg */
49 #define OOBR_INTR_NUM_MASK              0x7Fu
50 #define OOBR_INTR_EN                    0x80u
51 /* per core config reg */
52 #define OOBR_CORECNF_OUTPUT_MASK        0x0000FF00u
53 #define OOBR_CORECNF_OUTPUT_SHIFT       8u
54 #define OOBR_CORECNF_INPUT_MASK         0x00FF0000u
55 #define OOBR_CORECNF_INPUT_SHIFT        16u
56 
57 #define OOBR_EXT_RSRC_REQ_PERCORE_OFFSET 0x34u
58 #define OOBR_EXT_RSRC_OFFSET 0x100u
59 #define OOBR_EXT_RSRC_SHIFT 7u
60 #define OOBR_EXT_RSRC_REQ_ADDR(oodr_base, core_idx) (uint32)((uintptr)(oodr_base) +\
61 	 OOBR_EXT_RSRC_OFFSET + ((core_idx) << OOBR_EXT_RSRC_SHIFT) +\
62 	 OOBR_EXT_RSRC_REQ_PERCORE_OFFSET)
63 
64 typedef volatile struct hndoobr_percore_reg {
65 	uint32 sourcesel[OOBR_INTR_PER_CONFREG];        /* 0x00 - 0x0c */
66 	uint32 destsel[OOBR_INTR_PER_CONFREG];          /* 0x10 - 0x1c */
67 	uint32 reserved[4];
68 	uint32 clkpwrreq;                               /* 0x30 */
69 	uint32 extrsrcreq;                              /* 0x34 */
70 	uint32 config;                                  /* 0x38 */
71 	uint32 reserved1[17];                           /* 0x3c to 0x7c */
72 } hndoobr_percore_reg_t;
73 
74 /* capability reg */
75 #define OOBR_CAP_CORECNT_MASK				0x0000001Fu
76 #define OOBR_CAP_MAX_INT2CORE_MASK			0x00F00000u
77 #define OOBR_CAP_MAX_INT2CORE_SHIFT			20u
78 
79 #define OOBR_MAX_INT_PER_REG				4u
80 
81 /* CoreNConfig reg */
82 #define OOBR_PERCORE_CORENCONFIG_INTOUTPUTS_MASK	0x0000FF00u
83 #define OOBR_PERCORE_CORENCONFIG_INTOUTPUTS_SHIFT	8u
84 
85 typedef volatile struct hndoobr_reg {
86 	uint32 capability;                      /* 0x00 */
87 	uint32 reserved[3];
88 	uint32 intstatus[4];                    /* 0x10 - 0x1c */
89 	uint32 reserved1[56];                   /* 0x20 - 0xfc */
90 	hndoobr_percore_reg_t percore_reg[1];   /* 0x100 */
91 } hndoobr_reg_t;
92 
93 #endif /* _hndoobr_h_ */
94