1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * HND arm trap handling. 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright (C) 2020, Broadcom. 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * Unless you and Broadcom execute a separate written software license 7*4882a593Smuzhiyun * agreement governing use of this software, this software is licensed to you 8*4882a593Smuzhiyun * under the terms of the GNU General Public License version 2 (the "GPL"), 9*4882a593Smuzhiyun * available at http://www.broadcom.com/licenses/GPLv2.php, with the 10*4882a593Smuzhiyun * following added to such license: 11*4882a593Smuzhiyun * 12*4882a593Smuzhiyun * As a special exception, the copyright holders of this software give you 13*4882a593Smuzhiyun * permission to link this software with independent modules, and to copy and 14*4882a593Smuzhiyun * distribute the resulting executable under terms of your choice, provided that 15*4882a593Smuzhiyun * you also meet, for each linked independent module, the terms and conditions of 16*4882a593Smuzhiyun * the license of that module. An independent module is a module which is not 17*4882a593Smuzhiyun * derived from this software. The special exception does not apply to any 18*4882a593Smuzhiyun * modifications of the software. 19*4882a593Smuzhiyun * 20*4882a593Smuzhiyun * 21*4882a593Smuzhiyun * <<Broadcom-WL-IPTag/Dual:>> 22*4882a593Smuzhiyun */ 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun #ifndef _hnd_armtrap_h_ 25*4882a593Smuzhiyun #define _hnd_armtrap_h_ 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun /* ARM trap handling */ 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun /* Trap types defined by ARM (see arminc.h) */ 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun /* Trap locations in lo memory */ 32*4882a593Smuzhiyun #define TRAP_STRIDE 4 33*4882a593Smuzhiyun #define FIRST_TRAP TR_RST 34*4882a593Smuzhiyun #define LAST_TRAP (TR_FIQ * TRAP_STRIDE) 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun #if defined(__ARM_ARCH_7M__) 37*4882a593Smuzhiyun #define MAX_TRAP_TYPE (TR_ISR + ARMCM3_NUMINTS) 38*4882a593Smuzhiyun #endif /* __ARM_ARCH_7M__ */ 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun /* The trap structure is defined here as offsets for assembly */ 41*4882a593Smuzhiyun #define TR_TYPE 0x00 42*4882a593Smuzhiyun #define TR_EPC 0x04 43*4882a593Smuzhiyun #define TR_CPSR 0x08 44*4882a593Smuzhiyun #define TR_SPSR 0x0c 45*4882a593Smuzhiyun #define TR_REGS 0x10 46*4882a593Smuzhiyun #define TR_REG(n) (TR_REGS + (n) * 4) 47*4882a593Smuzhiyun #define TR_SP TR_REG(13) 48*4882a593Smuzhiyun #define TR_LR TR_REG(14) 49*4882a593Smuzhiyun #define TR_PC TR_REG(15) 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun /* Number of core ARM registers. */ 52*4882a593Smuzhiyun #define TR_REGS_NUM 16u 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun #define TRAP_T_SIZE 80 55*4882a593Smuzhiyun #define ASSERT_TRAP_SVC_NUMBER 255 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun #ifndef _LANGUAGE_ASSEMBLY 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun #include <typedefs.h> 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun typedef struct _trap_struct { 62*4882a593Smuzhiyun uint32 type; 63*4882a593Smuzhiyun uint32 epc; 64*4882a593Smuzhiyun uint32 cpsr; 65*4882a593Smuzhiyun uint32 spsr; 66*4882a593Smuzhiyun uint32 r0; /* a1 */ 67*4882a593Smuzhiyun uint32 r1; /* a2 */ 68*4882a593Smuzhiyun uint32 r2; /* a3 */ 69*4882a593Smuzhiyun uint32 r3; /* a4 */ 70*4882a593Smuzhiyun uint32 r4; /* v1 */ 71*4882a593Smuzhiyun uint32 r5; /* v2 */ 72*4882a593Smuzhiyun uint32 r6; /* v3 */ 73*4882a593Smuzhiyun uint32 r7; /* v4 */ 74*4882a593Smuzhiyun uint32 r8; /* v5 */ 75*4882a593Smuzhiyun uint32 r9; /* sb/v6 */ 76*4882a593Smuzhiyun uint32 r10; /* sl/v7 */ 77*4882a593Smuzhiyun uint32 r11; /* fp/v8 */ 78*4882a593Smuzhiyun uint32 r12; /* ip */ 79*4882a593Smuzhiyun uint32 r13; /* sp */ 80*4882a593Smuzhiyun uint32 r14; /* lr */ 81*4882a593Smuzhiyun uint32 pc; /* r15 */ 82*4882a593Smuzhiyun } trap_t; 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun #endif /* !_LANGUAGE_ASSEMBLY */ 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun #endif /* _hnd_armtrap_h_ */ 87