1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * SDIO host client driver interface of Broadcom HNBU 3*4882a593Smuzhiyun * export functions to client drivers 4*4882a593Smuzhiyun * abstract OS and BUS specific details of SDIO 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * Copyright (C) 2020, Broadcom. 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun * Unless you and Broadcom execute a separate written software license 9*4882a593Smuzhiyun * agreement governing use of this software, this software is licensed to you 10*4882a593Smuzhiyun * under the terms of the GNU General Public License version 2 (the "GPL"), 11*4882a593Smuzhiyun * available at http://www.broadcom.com/licenses/GPLv2.php, with the 12*4882a593Smuzhiyun * following added to such license: 13*4882a593Smuzhiyun * 14*4882a593Smuzhiyun * As a special exception, the copyright holders of this software give you 15*4882a593Smuzhiyun * permission to link this software with independent modules, and to copy and 16*4882a593Smuzhiyun * distribute the resulting executable under terms of your choice, provided that 17*4882a593Smuzhiyun * you also meet, for each linked independent module, the terms and conditions of 18*4882a593Smuzhiyun * the license of that module. An independent module is a module which is not 19*4882a593Smuzhiyun * derived from this software. The special exception does not apply to any 20*4882a593Smuzhiyun * modifications of the software. 21*4882a593Smuzhiyun * 22*4882a593Smuzhiyun * 23*4882a593Smuzhiyun * <<Broadcom-WL-IPTag/Dual:>> 24*4882a593Smuzhiyun */ 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun /** 27*4882a593Smuzhiyun * @file bcmsdh.h 28*4882a593Smuzhiyun */ 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun #ifndef _bcmsdh_h_ 31*4882a593Smuzhiyun #define _bcmsdh_h_ 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun #define BCMSDH_ERROR_VAL 0x0001 /* Error */ 34*4882a593Smuzhiyun #define BCMSDH_INFO_VAL 0x0002 /* Info */ 35*4882a593Smuzhiyun extern const uint bcmsdh_msglevel; 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun #ifdef BCMDBG 38*4882a593Smuzhiyun #define BCMSDH_ERROR(x) do { if (bcmsdh_msglevel & BCMSDH_ERROR_VAL) printf x; } while (0) 39*4882a593Smuzhiyun #define BCMSDH_INFO(x) do { if (bcmsdh_msglevel & BCMSDH_INFO_VAL) printf x; } while (0) 40*4882a593Smuzhiyun #else /* BCMDBG */ 41*4882a593Smuzhiyun #define BCMSDH_ERROR(x) 42*4882a593Smuzhiyun #define BCMSDH_INFO(x) 43*4882a593Smuzhiyun #endif /* BCMDBG */ 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun #if defined(BCMSDIO) && (defined(BCMSDIOH_STD) || defined(BCMSDIOH_BCM) || defined(BCMSDIOH_SPI)) 46*4882a593Smuzhiyun #define BCMSDH_ADAPTER 47*4882a593Smuzhiyun #endif /* BCMSDIO && (BCMSDIOH_STD || BCMSDIOH_BCM || BCMSDIOH_SPI) */ 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun /* forward declarations */ 50*4882a593Smuzhiyun typedef struct bcmsdh_info bcmsdh_info_t; 51*4882a593Smuzhiyun typedef void (*bcmsdh_cb_fn_t)(void *); 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun #if defined(NDIS) && (NDISVER >= 0x0630) && defined(BCMDONGLEHOST) 54*4882a593Smuzhiyun extern bcmsdh_info_t *bcmsdh_attach(osl_t *osh, void *cfghdl, 55*4882a593Smuzhiyun void **regsva, uint irq, shared_info_t *sh); 56*4882a593Smuzhiyun #else 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun #if defined(BT_OVER_SDIO) 59*4882a593Smuzhiyun typedef enum { 60*4882a593Smuzhiyun NO_HANG_STATE = 0, 61*4882a593Smuzhiyun HANG_START_STATE = 1, 62*4882a593Smuzhiyun HANG_RECOVERY_STATE = 2 63*4882a593Smuzhiyun } dhd_hang_state_t; 64*4882a593Smuzhiyun #endif 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun extern bcmsdh_info_t *bcmsdh_attach(osl_t *osh, void *sdioh, ulong *regsva); 67*4882a593Smuzhiyun /** 68*4882a593Smuzhiyun * BCMSDH API context 69*4882a593Smuzhiyun */ 70*4882a593Smuzhiyun struct bcmsdh_info 71*4882a593Smuzhiyun { 72*4882a593Smuzhiyun bool init_success; /* underlying driver successfully attached */ 73*4882a593Smuzhiyun void *sdioh; /* handler for sdioh */ 74*4882a593Smuzhiyun uint32 vendevid; /* Target Vendor and Device ID on SD bus */ 75*4882a593Smuzhiyun osl_t *osh; 76*4882a593Smuzhiyun bool regfail; /* Save status of last reg_read/reg_write call */ 77*4882a593Smuzhiyun uint32 sbwad; /* Save backplane window address */ 78*4882a593Smuzhiyun void *os_cxt; /* Pointer to per-OS private data */ 79*4882a593Smuzhiyun bool force_sbwad_calc; /* forces calculation of sbwad instead of using cached value */ 80*4882a593Smuzhiyun #ifdef DHD_WAKE_STATUS 81*4882a593Smuzhiyun unsigned int total_wake_count; 82*4882a593Smuzhiyun int pkt_wake; 83*4882a593Smuzhiyun #endif /* DHD_WAKE_STATUS */ 84*4882a593Smuzhiyun }; 85*4882a593Smuzhiyun #endif /* defined(NDIS) && (NDISVER >= 0x0630) && defined(BCMDONGLEHOST) */ 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun /* Detach - freeup resources allocated in attach */ 88*4882a593Smuzhiyun extern int bcmsdh_detach(osl_t *osh, void *sdh); 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun /* Query if SD device interrupts are enabled */ 91*4882a593Smuzhiyun extern bool bcmsdh_intr_query(void *sdh); 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun /* Enable/disable SD interrupt */ 94*4882a593Smuzhiyun extern int bcmsdh_intr_enable(void *sdh); 95*4882a593Smuzhiyun extern int bcmsdh_intr_disable(void *sdh); 96*4882a593Smuzhiyun 97*4882a593Smuzhiyun /* Register/deregister device interrupt handler. */ 98*4882a593Smuzhiyun extern int bcmsdh_intr_reg(void *sdh, bcmsdh_cb_fn_t fn, void *argh); 99*4882a593Smuzhiyun extern int bcmsdh_intr_dereg(void *sdh); 100*4882a593Smuzhiyun /* Enable/disable SD card interrupt forward */ 101*4882a593Smuzhiyun extern void bcmsdh_intr_forward(void *sdh, bool pass); 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun #if defined(DHD_DEBUG) || defined(BCMDBG) 104*4882a593Smuzhiyun /* Query pending interrupt status from the host controller */ 105*4882a593Smuzhiyun extern bool bcmsdh_intr_pending(void *sdh); 106*4882a593Smuzhiyun #endif 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun /* Register a callback to be called if and when bcmsdh detects 109*4882a593Smuzhiyun * device removal. No-op in the case of non-removable/hardwired devices. 110*4882a593Smuzhiyun */ 111*4882a593Smuzhiyun extern int bcmsdh_devremove_reg(void *sdh, bcmsdh_cb_fn_t fn, void *argh); 112*4882a593Smuzhiyun 113*4882a593Smuzhiyun /* Access SDIO address space (e.g. CCCR) using CMD52 (single-byte interface). 114*4882a593Smuzhiyun * fn: function number 115*4882a593Smuzhiyun * addr: unmodified SDIO-space address 116*4882a593Smuzhiyun * data: data byte to write 117*4882a593Smuzhiyun * err: pointer to error code (or NULL) 118*4882a593Smuzhiyun */ 119*4882a593Smuzhiyun extern uint8 bcmsdh_cfg_read(void *sdh, uint func, uint32 addr, int *err); 120*4882a593Smuzhiyun extern void bcmsdh_cfg_write(void *sdh, uint func, uint32 addr, uint8 data, int *err); 121*4882a593Smuzhiyun 122*4882a593Smuzhiyun /* Read/Write 4bytes from/to cfg space */ 123*4882a593Smuzhiyun extern uint32 bcmsdh_cfg_read_word(void *sdh, uint fnc_num, uint32 addr, int *err); 124*4882a593Smuzhiyun extern void bcmsdh_cfg_write_word(void *sdh, uint fnc_num, uint32 addr, uint32 data, int *err); 125*4882a593Smuzhiyun 126*4882a593Smuzhiyun /* Read CIS content for specified function. 127*4882a593Smuzhiyun * fn: function whose CIS is being requested (0 is common CIS) 128*4882a593Smuzhiyun * cis: pointer to memory location to place results 129*4882a593Smuzhiyun * length: number of bytes to read 130*4882a593Smuzhiyun * Internally, this routine uses the values from the cis base regs (0x9-0xB) 131*4882a593Smuzhiyun * to form an SDIO-space address to read the data from. 132*4882a593Smuzhiyun */ 133*4882a593Smuzhiyun extern int bcmsdh_cis_read(void *sdh, uint func, uint8 *cis, uint length); 134*4882a593Smuzhiyun extern int bcmsdh_cisaddr_read(void *sdh, uint func, uint8 *cisd, uint offset); 135*4882a593Smuzhiyun 136*4882a593Smuzhiyun /* Synchronous access to device (client) core registers via CMD53 to F1. 137*4882a593Smuzhiyun * addr: backplane address (i.e. >= regsva from attach) 138*4882a593Smuzhiyun * size: register width in bytes (2 or 4) 139*4882a593Smuzhiyun * data: data for register write 140*4882a593Smuzhiyun */ 141*4882a593Smuzhiyun extern uint32 bcmsdh_reg_read(void *sdh, uintptr addr, uint size); 142*4882a593Smuzhiyun extern uint32 bcmsdh_reg_write(void *sdh, uintptr addr, uint size, uint32 data); 143*4882a593Smuzhiyun 144*4882a593Smuzhiyun /* set sb address window */ 145*4882a593Smuzhiyun extern int bcmsdhsdio_set_sbaddr_window(void *sdh, uint32 address, bool force_set); 146*4882a593Smuzhiyun 147*4882a593Smuzhiyun /* Indicate if last reg read/write failed */ 148*4882a593Smuzhiyun /* Replace this with status pointers in reg_read/write */ 149*4882a593Smuzhiyun extern bool bcmsdh_regfail(void *sdh); 150*4882a593Smuzhiyun 151*4882a593Smuzhiyun /* Buffer transfer to/from device (client) core via cmd53. 152*4882a593Smuzhiyun * fn: function number 153*4882a593Smuzhiyun * addr: backplane address (i.e. >= regsva from attach) 154*4882a593Smuzhiyun * flags: backplane width, address increment, sync/async 155*4882a593Smuzhiyun * buf: pointer to memory data buffer 156*4882a593Smuzhiyun * nbytes: number of bytes to transfer to/from buf 157*4882a593Smuzhiyun * pkt: pointer to packet associated with buf (if any) 158*4882a593Smuzhiyun * complete: callback function for command completion (async only) 159*4882a593Smuzhiyun * handle: handle for completion callback (first arg in callback) 160*4882a593Smuzhiyun * Returns 0 or error code. 161*4882a593Smuzhiyun * NOTE: Async operation is not currently supported. 162*4882a593Smuzhiyun */ 163*4882a593Smuzhiyun 164*4882a593Smuzhiyun typedef void (*bcmsdh_cmplt_fn_t)(void *handle, int status, bool sync_waiting); 165*4882a593Smuzhiyun extern int bcmsdh_send_buf(void *sdh, uint32 addr, uint fn, uint flags, 166*4882a593Smuzhiyun uint8 *buf, uint nbytes, void *pkt, 167*4882a593Smuzhiyun bcmsdh_cmplt_fn_t complete_fn, void *handle); 168*4882a593Smuzhiyun extern int bcmsdh_recv_buf(void *sdh, uint32 addr, uint fn, uint flags, 169*4882a593Smuzhiyun uint8 *buf, uint nbytes, void *pkt, 170*4882a593Smuzhiyun bcmsdh_cmplt_fn_t complete_fn, void *handle); 171*4882a593Smuzhiyun 172*4882a593Smuzhiyun extern void bcmsdh_glom_post(void *sdh, uint8 *frame, void *pkt, uint len); 173*4882a593Smuzhiyun extern void bcmsdh_glom_clear(void *sdh); 174*4882a593Smuzhiyun extern uint bcmsdh_set_mode(void *sdh, uint mode); 175*4882a593Smuzhiyun extern bool bcmsdh_glom_enabled(void); 176*4882a593Smuzhiyun #ifdef PKT_STATICS 177*4882a593Smuzhiyun extern uint32 bcmsdh_get_spend_time(void *sdh) ; 178*4882a593Smuzhiyun #endif 179*4882a593Smuzhiyun /* Flags bits */ 180*4882a593Smuzhiyun #define SDIO_REQ_4BYTE 0x1 /* Four-byte target (backplane) width (vs. two-byte) */ 181*4882a593Smuzhiyun #define SDIO_REQ_FIXED 0x2 /* Fixed address (FIFO) (vs. incrementing address) */ 182*4882a593Smuzhiyun #define SDIO_REQ_ASYNC 0x4 /* Async request (vs. sync request) */ 183*4882a593Smuzhiyun #define SDIO_BYTE_MODE 0x8 /* Byte mode request(non-block mode) */ 184*4882a593Smuzhiyun 185*4882a593Smuzhiyun /* Pending (non-error) return code */ 186*4882a593Smuzhiyun #define BCME_PENDING 1 187*4882a593Smuzhiyun 188*4882a593Smuzhiyun /* Read/write to memory block (F1, no FIFO) via CMD53 (sync only). 189*4882a593Smuzhiyun * rw: read or write (0/1) 190*4882a593Smuzhiyun * addr: direct SDIO address 191*4882a593Smuzhiyun * buf: pointer to memory data buffer 192*4882a593Smuzhiyun * nbytes: number of bytes to transfer to/from buf 193*4882a593Smuzhiyun * Returns 0 or error code. 194*4882a593Smuzhiyun */ 195*4882a593Smuzhiyun extern int bcmsdh_rwdata(void *sdh, uint rw, uint32 addr, uint8 *buf, uint nbytes); 196*4882a593Smuzhiyun 197*4882a593Smuzhiyun /* Issue an abort to the specified function */ 198*4882a593Smuzhiyun extern int bcmsdh_abort(void *sdh, uint fn); 199*4882a593Smuzhiyun 200*4882a593Smuzhiyun /* Start SDIO Host Controller communication */ 201*4882a593Smuzhiyun extern int bcmsdh_start(void *sdh, int stage); 202*4882a593Smuzhiyun 203*4882a593Smuzhiyun /* Stop SDIO Host Controller communication */ 204*4882a593Smuzhiyun extern int bcmsdh_stop(void *sdh); 205*4882a593Smuzhiyun 206*4882a593Smuzhiyun /* Wait system lock free */ 207*4882a593Smuzhiyun extern int bcmsdh_waitlockfree(void *sdh); 208*4882a593Smuzhiyun 209*4882a593Smuzhiyun /* Bogosity alert. This should only know about devids gleaned through 210*4882a593Smuzhiyun * the standard CIS (versus some client dependent method), and we already 211*4882a593Smuzhiyun * have an interface for the CIS. 212*4882a593Smuzhiyun * Remove me. 213*4882a593Smuzhiyun */ 214*4882a593Smuzhiyun /* Returns the "Device ID" of target device on the SDIO bus. */ 215*4882a593Smuzhiyun extern int bcmsdh_query_device(void *sdh); 216*4882a593Smuzhiyun 217*4882a593Smuzhiyun /* Returns the number of IO functions reported by the device */ 218*4882a593Smuzhiyun extern uint bcmsdh_query_iofnum(void *sdh); 219*4882a593Smuzhiyun 220*4882a593Smuzhiyun /* Miscellaneous knob tweaker. */ 221*4882a593Smuzhiyun extern int bcmsdh_iovar_op(void *sdh, const char *name, 222*4882a593Smuzhiyun void *params, uint plen, void *arg, uint len, bool set); 223*4882a593Smuzhiyun 224*4882a593Smuzhiyun /* Reset and reinitialize the device */ 225*4882a593Smuzhiyun extern int bcmsdh_reset(bcmsdh_info_t *sdh); 226*4882a593Smuzhiyun 227*4882a593Smuzhiyun /* helper functions */ 228*4882a593Smuzhiyun 229*4882a593Smuzhiyun /* callback functions */ 230*4882a593Smuzhiyun typedef struct { 231*4882a593Smuzhiyun /* probe the device */ 232*4882a593Smuzhiyun void *(*probe)(uint16 vend_id, uint16 dev_id, uint16 bus, uint16 slot, 233*4882a593Smuzhiyun uint16 func, uint bustype, void * regsva, osl_t * osh, 234*4882a593Smuzhiyun void * param); 235*4882a593Smuzhiyun /* remove the device */ 236*4882a593Smuzhiyun void (*remove)(void *context); 237*4882a593Smuzhiyun /* can we suspend now */ 238*4882a593Smuzhiyun int (*suspend)(void *context); 239*4882a593Smuzhiyun /* resume from suspend */ 240*4882a593Smuzhiyun int (*resume)(void *context); 241*4882a593Smuzhiyun } bcmsdh_driver_t; 242*4882a593Smuzhiyun 243*4882a593Smuzhiyun /* platform specific/high level functions */ 244*4882a593Smuzhiyun extern int bcmsdh_register(bcmsdh_driver_t *driver); 245*4882a593Smuzhiyun extern void bcmsdh_unregister(void); 246*4882a593Smuzhiyun extern bool bcmsdh_chipmatch(uint16 vendor, uint16 device); 247*4882a593Smuzhiyun extern void bcmsdh_device_remove(void * sdh); 248*4882a593Smuzhiyun 249*4882a593Smuzhiyun extern int bcmsdh_reg_sdio_notify(void* semaphore); 250*4882a593Smuzhiyun extern void bcmsdh_unreg_sdio_notify(void); 251*4882a593Smuzhiyun 252*4882a593Smuzhiyun #if defined(OOB_INTR_ONLY) || defined(BCMSPI_ANDROID) 253*4882a593Smuzhiyun extern int bcmsdh_oob_intr_register(bcmsdh_info_t *bcmsdh, bcmsdh_cb_fn_t oob_irq_handler, 254*4882a593Smuzhiyun void* oob_irq_handler_context); 255*4882a593Smuzhiyun extern void bcmsdh_oob_intr_unregister(bcmsdh_info_t *sdh); 256*4882a593Smuzhiyun extern void bcmsdh_oob_intr_set(bcmsdh_info_t *sdh, bool enable); 257*4882a593Smuzhiyun extern int bcmsdh_get_oob_intr_num(bcmsdh_info_t *bcmsdh); 258*4882a593Smuzhiyun #endif /* defined(OOB_INTR_ONLY) || defined(BCMSPI_ANDROID) */ 259*4882a593Smuzhiyun extern void *bcmsdh_get_dev(bcmsdh_info_t *sdh); 260*4882a593Smuzhiyun extern void bcmsdh_dev_pm_stay_awake(bcmsdh_info_t *sdh); 261*4882a593Smuzhiyun extern void bcmsdh_dev_relax(bcmsdh_info_t *sdh); 262*4882a593Smuzhiyun extern bool bcmsdh_dev_pm_enabled(bcmsdh_info_t *sdh); 263*4882a593Smuzhiyun 264*4882a593Smuzhiyun int bcmsdh_suspend(bcmsdh_info_t *bcmsdh); 265*4882a593Smuzhiyun int bcmsdh_resume(bcmsdh_info_t *bcmsdh); 266*4882a593Smuzhiyun 267*4882a593Smuzhiyun /* Function to pass device-status bits to DHD. */ 268*4882a593Smuzhiyun extern uint32 bcmsdh_get_dstatus(void *sdh); 269*4882a593Smuzhiyun 270*4882a593Smuzhiyun /* Function to return current window addr */ 271*4882a593Smuzhiyun extern uint32 bcmsdh_cur_sbwad(void *sdh); 272*4882a593Smuzhiyun 273*4882a593Smuzhiyun /* function to force sbwad calculation instead of using cached value */ 274*4882a593Smuzhiyun extern void bcmsdh_force_sbwad_calc(void *sdh, bool force); 275*4882a593Smuzhiyun 276*4882a593Smuzhiyun /* Function to pass chipid and rev to lower layers for controlling pr's */ 277*4882a593Smuzhiyun extern void bcmsdh_chipinfo(void *sdh, uint32 chip, uint32 chiprev); 278*4882a593Smuzhiyun 279*4882a593Smuzhiyun #ifdef BCMSPI 280*4882a593Smuzhiyun extern void bcmsdh_dwordmode(void *sdh, bool set); 281*4882a593Smuzhiyun #endif /* BCMSPI */ 282*4882a593Smuzhiyun 283*4882a593Smuzhiyun extern int bcmsdh_sleep(void *sdh, bool enab); 284*4882a593Smuzhiyun 285*4882a593Smuzhiyun /* GPIO support */ 286*4882a593Smuzhiyun extern int bcmsdh_gpio_init(void *sd); 287*4882a593Smuzhiyun extern bool bcmsdh_gpioin(void *sd, uint32 gpio); 288*4882a593Smuzhiyun extern int bcmsdh_gpioouten(void *sd, uint32 gpio); 289*4882a593Smuzhiyun extern int bcmsdh_gpioout(void *sd, uint32 gpio, bool enab); 290*4882a593Smuzhiyun 291*4882a593Smuzhiyun #endif /* _bcmsdh_h_ */ 292