xref: /OK3568_Linux_fs/external/rkwifibt/drivers/bcmdhd/dhd_bus.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Header file describing the internal (inter-module) DHD interfaces.
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * Provides type definitions and function prototypes used to link the
5*4882a593Smuzhiyun  * DHD OS, bus, and protocol modules.
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Copyright (C) 2020, Broadcom.
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  *      Unless you and Broadcom execute a separate written software license
10*4882a593Smuzhiyun  * agreement governing use of this software, this software is licensed to you
11*4882a593Smuzhiyun  * under the terms of the GNU General Public License version 2 (the "GPL"),
12*4882a593Smuzhiyun  * available at http://www.broadcom.com/licenses/GPLv2.php, with the
13*4882a593Smuzhiyun  * following added to such license:
14*4882a593Smuzhiyun  *
15*4882a593Smuzhiyun  *      As a special exception, the copyright holders of this software give you
16*4882a593Smuzhiyun  * permission to link this software with independent modules, and to copy and
17*4882a593Smuzhiyun  * distribute the resulting executable under terms of your choice, provided that
18*4882a593Smuzhiyun  * you also meet, for each linked independent module, the terms and conditions of
19*4882a593Smuzhiyun  * the license of that module.  An independent module is a module which is not
20*4882a593Smuzhiyun  * derived from this software.  The special exception does not apply to any
21*4882a593Smuzhiyun  * modifications of the software.
22*4882a593Smuzhiyun  *
23*4882a593Smuzhiyun  *
24*4882a593Smuzhiyun  * <<Broadcom-WL-IPTag/Open:>>
25*4882a593Smuzhiyun  *
26*4882a593Smuzhiyun  * $Id$
27*4882a593Smuzhiyun  */
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun #ifndef _dhd_bus_h_
30*4882a593Smuzhiyun #define _dhd_bus_h_
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun extern int dbus_up(struct dhd_bus *pub);
33*4882a593Smuzhiyun extern int dbus_stop(struct dhd_bus *pub);
34*4882a593Smuzhiyun /*
35*4882a593Smuzhiyun  * Exported from dhd bus module (dhd_usb, dhd_sdio)
36*4882a593Smuzhiyun  */
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun /* global variable for the bus */
39*4882a593Smuzhiyun extern struct dhd_bus *g_dhd_bus;
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun /* Indicate (dis)interest in finding dongles. */
42*4882a593Smuzhiyun extern int dhd_bus_register(void);
43*4882a593Smuzhiyun extern void dhd_bus_unregister(void);
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun /* Download firmware image and nvram image */
46*4882a593Smuzhiyun extern int dhd_bus_download_firmware(struct dhd_bus *bus, osl_t *osh,
47*4882a593Smuzhiyun 	char *fw_path, char *nv_path, char *clm_path, char *conf_path);
48*4882a593Smuzhiyun #if defined(BT_OVER_SDIO)
49*4882a593Smuzhiyun extern int dhd_bus_download_btfw(struct dhd_bus *bus, osl_t *osh, char *btfw_path);
50*4882a593Smuzhiyun #endif /* defined (BT_OVER_SDIO) */
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun /* Stop bus module: clear pending frames, disable data flow */
53*4882a593Smuzhiyun extern void dhd_bus_stop(struct dhd_bus *bus, bool enforce_mutex);
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun /* Initialize bus module: prepare for communication w/dongle */
56*4882a593Smuzhiyun extern int dhd_bus_init(dhd_pub_t *dhdp, bool enforce_mutex);
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun /* Get the Bus Idle Time */
59*4882a593Smuzhiyun extern void dhd_bus_getidletime(dhd_pub_t *dhdp, int *idletime);
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun /* Set the Bus Idle Time */
62*4882a593Smuzhiyun extern void dhd_bus_setidletime(dhd_pub_t *dhdp, int idle_time);
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun /* Send a data frame to the dongle.  Callee disposes of txp. */
65*4882a593Smuzhiyun #ifdef BCMPCIE
66*4882a593Smuzhiyun extern int dhd_bus_txdata(struct dhd_bus *bus, void *txp, uint8 ifidx);
67*4882a593Smuzhiyun #else
68*4882a593Smuzhiyun extern int dhd_bus_txdata(struct dhd_bus *bus, void *txp);
69*4882a593Smuzhiyun #endif
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun #ifdef BCMPCIE
72*4882a593Smuzhiyun extern uint16 dhd_prot_get_rxbufpost_sz(dhd_pub_t *dhd);
73*4882a593Smuzhiyun extern uint16 dhd_prot_get_h2d_rx_post_active(dhd_pub_t *dhd);
74*4882a593Smuzhiyun extern uint16 dhd_prot_get_d2h_rx_cpln_active(dhd_pub_t *dhd);
75*4882a593Smuzhiyun extern void dhdpcie_cto_recovery_handler(dhd_pub_t *dhd);
76*4882a593Smuzhiyun #endif /* BCMPCIE */
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun /* Send/receive a control message to/from the dongle.
79*4882a593Smuzhiyun  * Expects caller to enforce a single outstanding transaction.
80*4882a593Smuzhiyun  */
81*4882a593Smuzhiyun extern int dhd_bus_txctl(struct dhd_bus *bus, uchar *msg, uint msglen);
82*4882a593Smuzhiyun extern int dhd_bus_rxctl(struct dhd_bus *bus, uchar *msg, uint msglen);
83*4882a593Smuzhiyun 
84*4882a593Smuzhiyun /* Watchdog timer function */
85*4882a593Smuzhiyun extern bool dhd_bus_watchdog(dhd_pub_t *dhd);
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun extern int dhd_bus_oob_intr_register(dhd_pub_t *dhdp);
88*4882a593Smuzhiyun extern void dhd_bus_oob_intr_unregister(dhd_pub_t *dhdp);
89*4882a593Smuzhiyun extern void dhd_bus_oob_intr_set(dhd_pub_t *dhdp, bool enable);
90*4882a593Smuzhiyun extern int dhd_bus_get_oob_irq_num(dhd_pub_t *dhdp);
91*4882a593Smuzhiyun extern struct device * dhd_bus_to_dev(struct dhd_bus *bus);
92*4882a593Smuzhiyun extern void dhd_bus_dev_pm_stay_awake(dhd_pub_t *dhdpub);
93*4882a593Smuzhiyun extern void dhd_bus_dev_pm_relax(dhd_pub_t *dhdpub);
94*4882a593Smuzhiyun extern bool dhd_bus_dev_pm_enabled(dhd_pub_t *dhdpub);
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun /* Device console input function */
97*4882a593Smuzhiyun extern int dhd_bus_console_in(dhd_pub_t *dhd, uchar *msg, uint msglen);
98*4882a593Smuzhiyun #ifdef CONSOLE_DPC
99*4882a593Smuzhiyun extern int dhd_bus_txcons(dhd_pub_t *dhd, uchar *msg, uint msglen);
100*4882a593Smuzhiyun #endif
101*4882a593Smuzhiyun 
102*4882a593Smuzhiyun /* Deferred processing for the bus, return TRUE requests reschedule */
103*4882a593Smuzhiyun extern bool dhd_bus_dpc(struct dhd_bus *bus);
104*4882a593Smuzhiyun extern void dhd_bus_isr(bool * InterruptRecognized, bool * QueueMiniportHandleInterrupt, void *arg);
105*4882a593Smuzhiyun 
106*4882a593Smuzhiyun /* Check for and handle local prot-specific iovar commands */
107*4882a593Smuzhiyun extern int dhd_bus_iovar_op(dhd_pub_t *dhdp, const char *name,
108*4882a593Smuzhiyun                             void *params, uint plen, void *arg, uint len, bool set);
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun /* Add bus dump output to a buffer */
111*4882a593Smuzhiyun extern void dhd_bus_dump(dhd_pub_t *dhdp, struct bcmstrbuf *strbuf);
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun /* Clear any bus counters */
114*4882a593Smuzhiyun extern void dhd_bus_clearcounts(dhd_pub_t *dhdp);
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun /* return the dongle chipid */
117*4882a593Smuzhiyun extern uint dhd_bus_chip(struct dhd_bus *bus);
118*4882a593Smuzhiyun 
119*4882a593Smuzhiyun /* return the dongle chiprev */
120*4882a593Smuzhiyun extern uint dhd_bus_chiprev(struct dhd_bus *bus);
121*4882a593Smuzhiyun 
122*4882a593Smuzhiyun /* Set user-specified nvram parameters. */
123*4882a593Smuzhiyun extern void dhd_bus_set_nvram_params(struct dhd_bus * bus, const char *nvram_params);
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun extern void *dhd_bus_pub(struct dhd_bus *bus);
126*4882a593Smuzhiyun extern void *dhd_bus_txq(struct dhd_bus *bus);
127*4882a593Smuzhiyun extern void *dhd_bus_sih(struct dhd_bus *bus);
128*4882a593Smuzhiyun extern uint dhd_bus_hdrlen(struct dhd_bus *bus);
129*4882a593Smuzhiyun #ifdef BCMSDIO
130*4882a593Smuzhiyun extern void dhd_bus_set_dotxinrx(struct dhd_bus *bus, bool val);
131*4882a593Smuzhiyun /* return sdio io status */
132*4882a593Smuzhiyun extern uint8 dhd_bus_is_ioready(struct dhd_bus *bus);
133*4882a593Smuzhiyun #else
134*4882a593Smuzhiyun #define dhd_bus_set_dotxinrx(a, b) do {} while (0)
135*4882a593Smuzhiyun #endif
136*4882a593Smuzhiyun 
137*4882a593Smuzhiyun #define DHD_SET_BUS_STATE_DOWN(_bus)  do { \
138*4882a593Smuzhiyun 	(_bus)->dhd->busstate = DHD_BUS_DOWN; \
139*4882a593Smuzhiyun } while (0)
140*4882a593Smuzhiyun 
141*4882a593Smuzhiyun /* Register a dummy SDIO client driver in order to be notified of new SDIO device */
142*4882a593Smuzhiyun extern int dhd_bus_reg_sdio_notify(void* semaphore);
143*4882a593Smuzhiyun extern void dhd_bus_unreg_sdio_notify(void);
144*4882a593Smuzhiyun extern void dhd_txglom_enable(dhd_pub_t *dhdp, bool enable);
145*4882a593Smuzhiyun extern int dhd_bus_get_ids(struct dhd_bus *bus, uint32 *bus_type, uint32 *bus_num,
146*4882a593Smuzhiyun 	uint32 *slot_num);
147*4882a593Smuzhiyun 
148*4882a593Smuzhiyun #if defined(DHD_FW_COREDUMP) && (defined(BCMPCIE) || defined(BCMSDIO))
149*4882a593Smuzhiyun extern int dhd_bus_mem_dump(dhd_pub_t *dhd);
150*4882a593Smuzhiyun extern int dhd_bus_get_mem_dump(dhd_pub_t *dhdp);
151*4882a593Smuzhiyun #else
152*4882a593Smuzhiyun #define dhd_bus_mem_dump(x)
153*4882a593Smuzhiyun #define dhd_bus_get_mem_dump(x)
154*4882a593Smuzhiyun #endif /* DHD_FW_COREDUMP && (BCMPCIE || BCMSDIO) */
155*4882a593Smuzhiyun 
156*4882a593Smuzhiyun #ifdef BCMPCIE
157*4882a593Smuzhiyun enum {
158*4882a593Smuzhiyun 	/* Scratch buffer confiuguration update */
159*4882a593Smuzhiyun 	D2H_DMA_SCRATCH_BUF,
160*4882a593Smuzhiyun 	D2H_DMA_SCRATCH_BUF_LEN,
161*4882a593Smuzhiyun 
162*4882a593Smuzhiyun 	/* DMA Indices array buffers for: H2D WR and RD, and D2H WR and RD */
163*4882a593Smuzhiyun 	H2D_DMA_INDX_WR_BUF, /* update H2D WR dma indices buf base addr to dongle */
164*4882a593Smuzhiyun 	H2D_DMA_INDX_RD_BUF, /* update H2D RD dma indices buf base addr to dongle */
165*4882a593Smuzhiyun 	D2H_DMA_INDX_WR_BUF, /* update D2H WR dma indices buf base addr to dongle */
166*4882a593Smuzhiyun 	D2H_DMA_INDX_RD_BUF, /* update D2H RD dma indices buf base addr to dongle */
167*4882a593Smuzhiyun 
168*4882a593Smuzhiyun 	/* DHD sets/gets WR or RD index, in host's H2D and D2H DMA indices buffer */
169*4882a593Smuzhiyun 	H2D_DMA_INDX_WR_UPD, /* update H2D WR index in H2D WR dma indices buf */
170*4882a593Smuzhiyun 	H2D_DMA_INDX_RD_UPD, /* update H2D RD index in H2D RD dma indices buf */
171*4882a593Smuzhiyun 	D2H_DMA_INDX_WR_UPD, /* update D2H WR index in D2H WR dma indices buf */
172*4882a593Smuzhiyun 	D2H_DMA_INDX_RD_UPD, /* update D2H RD index in D2H RD dma indices buf */
173*4882a593Smuzhiyun 
174*4882a593Smuzhiyun 	/* DHD Indices array buffers and update for: H2D flow ring WR */
175*4882a593Smuzhiyun 	H2D_IFRM_INDX_WR_BUF, /* update H2D WR dma indices buf base addr to dongle */
176*4882a593Smuzhiyun 	H2D_IFRM_INDX_WR_UPD, /* update H2D WR dma indices buf base addr to dongle */
177*4882a593Smuzhiyun 
178*4882a593Smuzhiyun 	/* H2D and D2H Mailbox data update */
179*4882a593Smuzhiyun 	H2D_MB_DATA,
180*4882a593Smuzhiyun 	D2H_MB_DATA,
181*4882a593Smuzhiyun 
182*4882a593Smuzhiyun 	/* (Common) MsgBuf Ring configuration update */
183*4882a593Smuzhiyun 	RING_BUF_ADDR,       /* update ring base address to dongle */
184*4882a593Smuzhiyun 	RING_ITEM_LEN,       /* update ring item size to dongle */
185*4882a593Smuzhiyun 	RING_MAX_ITEMS,      /* update ring max items to dongle */
186*4882a593Smuzhiyun 
187*4882a593Smuzhiyun 	/* Update of WR or RD index, for a MsgBuf Ring */
188*4882a593Smuzhiyun 	RING_RD_UPD,         /* update ring read index from/to dongle */
189*4882a593Smuzhiyun 	RING_WR_UPD,         /* update ring write index from/to dongle */
190*4882a593Smuzhiyun 
191*4882a593Smuzhiyun 	TOTAL_LFRAG_PACKET_CNT,
192*4882a593Smuzhiyun 	MAX_HOST_RXBUFS,
193*4882a593Smuzhiyun 	HOST_API_VERSION,
194*4882a593Smuzhiyun #ifdef D2H_MINIDUMP
195*4882a593Smuzhiyun 	DNGL_TO_HOST_TRAP_ADDR_LEN,
196*4882a593Smuzhiyun #endif /* D2H_MINIDUMP */
197*4882a593Smuzhiyun 	DNGL_TO_HOST_TRAP_ADDR,
198*4882a593Smuzhiyun 	HOST_SCB_ADDR,		/* update host scb base address to dongle */
199*4882a593Smuzhiyun };
200*4882a593Smuzhiyun 
201*4882a593Smuzhiyun typedef void (*dhd_mb_ring_t) (struct dhd_bus *, uint32);
202*4882a593Smuzhiyun typedef void (*dhd_mb_ring_2_t) (struct dhd_bus *, uint32, bool);
203*4882a593Smuzhiyun extern void dhd_bus_cmn_writeshared(struct dhd_bus *bus, void * data, uint32 len, uint8 type,
204*4882a593Smuzhiyun 	uint16 ringid);
205*4882a593Smuzhiyun extern void dhd_bus_ringbell(struct dhd_bus *bus, uint32 value);
206*4882a593Smuzhiyun extern void dhd_bus_ringbell_2(struct dhd_bus *bus, uint32 value, bool devwake);
207*4882a593Smuzhiyun extern void dhd_bus_cmn_readshared(struct dhd_bus *bus, void* data, uint8 type, uint16 ringid);
208*4882a593Smuzhiyun extern uint32 dhd_bus_get_sharedflags(struct dhd_bus *bus);
209*4882a593Smuzhiyun extern void dhd_bus_rx_frame(struct dhd_bus *bus, void* pkt, int ifidx, uint pkt_count);
210*4882a593Smuzhiyun extern void dhd_bus_start_queue(struct dhd_bus *bus);
211*4882a593Smuzhiyun extern void dhd_bus_stop_queue(struct dhd_bus *bus);
212*4882a593Smuzhiyun extern dhd_mb_ring_t dhd_bus_get_mbintr_fn(struct dhd_bus *bus);
213*4882a593Smuzhiyun extern dhd_mb_ring_2_t dhd_bus_get_mbintr_2_fn(struct dhd_bus *bus);
214*4882a593Smuzhiyun extern void dhd_bus_write_flow_ring_states(struct dhd_bus *bus,
215*4882a593Smuzhiyun 	void * data, uint16 flowid);
216*4882a593Smuzhiyun extern void dhd_bus_read_flow_ring_states(struct dhd_bus *bus,
217*4882a593Smuzhiyun 	void * data, uint8 flowid);
218*4882a593Smuzhiyun extern int dhd_bus_flow_ring_create_request(struct dhd_bus *bus, void *flow_ring_node);
219*4882a593Smuzhiyun extern void dhd_bus_clean_flow_ring(struct dhd_bus *bus, void *flow_ring_node);
220*4882a593Smuzhiyun extern void dhd_bus_flow_ring_create_response(struct dhd_bus *bus, uint16 flow_id, int32 status);
221*4882a593Smuzhiyun extern int dhd_bus_flow_ring_delete_request(struct dhd_bus *bus, void *flow_ring_node);
222*4882a593Smuzhiyun extern void dhd_bus_flow_ring_delete_response(struct dhd_bus *bus, uint16 flowid, uint32 status);
223*4882a593Smuzhiyun extern int dhd_bus_flow_ring_flush_request(struct dhd_bus *bus, void *flow_ring_node);
224*4882a593Smuzhiyun extern void dhd_bus_flow_ring_flush_response(struct dhd_bus *bus, uint16 flowid, uint32 status);
225*4882a593Smuzhiyun extern uint32 dhd_bus_max_h2d_queues(struct dhd_bus *bus);
226*4882a593Smuzhiyun extern int dhd_bus_schedule_queue(struct dhd_bus *bus, uint16 flow_id, bool txs);
227*4882a593Smuzhiyun 
228*4882a593Smuzhiyun #ifdef IDLE_TX_FLOW_MGMT
229*4882a593Smuzhiyun extern void dhd_bus_flow_ring_resume_response(struct dhd_bus *bus, uint16 flowid, int32 status);
230*4882a593Smuzhiyun #endif /* IDLE_TX_FLOW_MGMT */
231*4882a593Smuzhiyun 
232*4882a593Smuzhiyun #ifdef BCMDBG
233*4882a593Smuzhiyun extern void
234*4882a593Smuzhiyun dhd_bus_flow_ring_cnt_update(struct dhd_bus *bus, uint16 flowid, uint32 txstatus);
235*4882a593Smuzhiyun #endif
236*4882a593Smuzhiyun 
237*4882a593Smuzhiyun #if defined(LINUX) || defined(linux)
238*4882a593Smuzhiyun extern int dhdpcie_bus_start_host_dev(struct dhd_bus *bus);
239*4882a593Smuzhiyun extern int dhdpcie_bus_stop_host_dev(struct dhd_bus *bus);
240*4882a593Smuzhiyun extern int dhdpcie_bus_enable_device(struct dhd_bus *bus);
241*4882a593Smuzhiyun extern int dhdpcie_bus_disable_device(struct dhd_bus *bus);
242*4882a593Smuzhiyun extern int dhdpcie_bus_alloc_resource(struct dhd_bus *bus);
243*4882a593Smuzhiyun extern void dhdpcie_bus_free_resource(struct dhd_bus *bus);
244*4882a593Smuzhiyun extern bool dhdpcie_bus_dongle_attach(struct dhd_bus *bus);
245*4882a593Smuzhiyun extern int dhd_bus_release_dongle(struct dhd_bus *bus);
246*4882a593Smuzhiyun extern int dhd_bus_request_irq(struct dhd_bus *bus);
247*4882a593Smuzhiyun extern int dhdpcie_get_pcieirq(struct dhd_bus *bus, unsigned int *irq);
248*4882a593Smuzhiyun extern void dhd_bus_aer_config(struct dhd_bus *bus);
249*4882a593Smuzhiyun #else
dhd_bus_aer_config(struct dhd_bus * bus)250*4882a593Smuzhiyun static INLINE void dhd_bus_aer_config(struct dhd_bus *bus) { }
251*4882a593Smuzhiyun #endif /* LINUX || linux */
252*4882a593Smuzhiyun 
253*4882a593Smuzhiyun extern int dhdpcie_cto_init(struct dhd_bus *bus, bool enable);
254*4882a593Smuzhiyun extern int dhdpcie_cto_cfg_init(struct dhd_bus *bus, bool enable);
255*4882a593Smuzhiyun 
256*4882a593Smuzhiyun extern void dhdpcie_ssreset_dis_enum_rst(struct dhd_bus *bus);
257*4882a593Smuzhiyun 
258*4882a593Smuzhiyun #ifdef DHD_FW_COREDUMP
259*4882a593Smuzhiyun extern int dhd_dongle_mem_dump(void);
260*4882a593Smuzhiyun #endif /* DHD_FW_COREDUMP */
261*4882a593Smuzhiyun 
262*4882a593Smuzhiyun #ifdef IDLE_TX_FLOW_MGMT
263*4882a593Smuzhiyun extern void dhd_bus_idle_tx_ring_suspend(dhd_pub_t *dhd, uint16 flow_ring_id);
264*4882a593Smuzhiyun #endif /* IDLE_TX_FLOW_MGMT */
265*4882a593Smuzhiyun extern void dhd_bus_handle_mb_data(struct dhd_bus *bus, uint32 d2h_mb_data);
266*4882a593Smuzhiyun #endif /* BCMPCIE */
267*4882a593Smuzhiyun 
268*4882a593Smuzhiyun /* dump the device trap informtation  */
269*4882a593Smuzhiyun extern void dhd_bus_dump_trap_info(struct dhd_bus *bus, struct bcmstrbuf *b);
270*4882a593Smuzhiyun extern void dhd_bus_copy_trap_sig(struct dhd_bus *bus,  trap_t *tr);
271*4882a593Smuzhiyun #ifdef WL_CFGVENDOR_SEND_HANG_EVENT
272*4882a593Smuzhiyun extern void dhd_dump_pcie_rc_regs_for_linkdown(dhd_pub_t *dhd, int *bytes_written);
273*4882a593Smuzhiyun void copy_hang_info_linkdown(dhd_pub_t *dhd);
274*4882a593Smuzhiyun void copy_ext_trap_sig(dhd_pub_t *dhd, trap_t *tr);
275*4882a593Smuzhiyun void copy_hang_info_trap(dhd_pub_t *dhd);
276*4882a593Smuzhiyun #endif /* WL_CFGVENDOR_SEND_HANG_EVENT */
277*4882a593Smuzhiyun 
278*4882a593Smuzhiyun /* Function to set default min res mask */
279*4882a593Smuzhiyun extern bool dhd_bus_set_default_min_res_mask(struct dhd_bus *bus);
280*4882a593Smuzhiyun 
281*4882a593Smuzhiyun /* Function to reset PMU registers */
282*4882a593Smuzhiyun extern void dhd_bus_pmu_reg_reset(dhd_pub_t *dhdp);
283*4882a593Smuzhiyun 
284*4882a593Smuzhiyun extern void dhd_bus_ucode_download(struct dhd_bus *bus);
285*4882a593Smuzhiyun 
286*4882a593Smuzhiyun extern int dhd_bus_readwrite_bp_addr(dhd_pub_t *dhdp, uint addr, uint size, uint* data, bool read);
287*4882a593Smuzhiyun extern int dhd_get_idletime(dhd_pub_t *dhd);
288*4882a593Smuzhiyun extern bool dhd_get_rpm_state(dhd_pub_t *dhd);
289*4882a593Smuzhiyun extern void dhd_set_rpm_state(dhd_pub_t *dhd, bool state);
290*4882a593Smuzhiyun #ifdef BCMPCIE
291*4882a593Smuzhiyun extern void dhd_bus_dump_console_buffer(struct dhd_bus *bus);
292*4882a593Smuzhiyun extern void dhd_bus_intr_count_dump(dhd_pub_t *dhdp);
293*4882a593Smuzhiyun extern bool dhd_bus_query_dpc_sched_errors(dhd_pub_t *dhdp);
294*4882a593Smuzhiyun extern int dhd_bus_dmaxfer_lpbk(dhd_pub_t *dhdp, uint32 type);
295*4882a593Smuzhiyun extern bool dhd_bus_check_driver_up(void);
296*4882a593Smuzhiyun extern int dhd_bus_get_cto(dhd_pub_t *dhdp);
297*4882a593Smuzhiyun extern void dhd_bus_set_linkdown(dhd_pub_t *dhdp, bool val);
298*4882a593Smuzhiyun extern int dhd_bus_get_linkdown(dhd_pub_t *dhdp);
299*4882a593Smuzhiyun #ifdef CONFIG_ARCH_MSM
300*4882a593Smuzhiyun extern void dhd_bus_inform_ep_loaded_to_rc(dhd_pub_t *dhdp, bool up);
301*4882a593Smuzhiyun #endif /* CONFIG_ARCH_MSM */
302*4882a593Smuzhiyun extern int dhd_bus_checkdied(struct dhd_bus *bus, char *data, uint size);
303*4882a593Smuzhiyun #else
304*4882a593Smuzhiyun #define dhd_bus_dump_console_buffer(x)
dhd_bus_intr_count_dump(dhd_pub_t * dhdp)305*4882a593Smuzhiyun static INLINE void dhd_bus_intr_count_dump(dhd_pub_t *dhdp) { UNUSED_PARAMETER(dhdp); }
dhd_bus_query_dpc_sched_errors(dhd_pub_t * dhdp)306*4882a593Smuzhiyun static INLINE bool dhd_bus_query_dpc_sched_errors(dhd_pub_t *dhdp) { return 0; }
dhd_bus_dmaxfer_lpbk(dhd_pub_t * dhdp,uint32 type)307*4882a593Smuzhiyun static INLINE int dhd_bus_dmaxfer_lpbk(dhd_pub_t *dhdp, uint32 type) { return 0; }
dhd_bus_check_driver_up(void)308*4882a593Smuzhiyun static INLINE bool dhd_bus_check_driver_up(void) { return FALSE; }
dhd_bus_set_linkdown(dhd_pub_t * dhdp,bool val)309*4882a593Smuzhiyun static INLINE void dhd_bus_set_linkdown(dhd_pub_t *dhdp, bool val) { }
dhd_bus_get_linkdown(dhd_pub_t * dhdp)310*4882a593Smuzhiyun static INLINE int dhd_bus_get_linkdown(dhd_pub_t *dhdp) { return 0; }
dhd_bus_get_cto(dhd_pub_t * dhdp)311*4882a593Smuzhiyun static INLINE int dhd_bus_get_cto(dhd_pub_t *dhdp) { return 0; }
dhd_bus_checkdied(struct dhd_bus * bus,char * data,uint size)312*4882a593Smuzhiyun static INLINE int dhd_bus_checkdied(struct dhd_bus *bus, char *data, uint size) { return 0; }
313*4882a593Smuzhiyun #endif /* BCMPCIE */
314*4882a593Smuzhiyun 
315*4882a593Smuzhiyun #if defined(BCMPCIE) && defined(EWP_ETD_PRSRV_LOGS)
316*4882a593Smuzhiyun void dhdpcie_get_etd_preserve_logs(dhd_pub_t *dhd, uint8 *ext_trap_data,
317*4882a593Smuzhiyun 		void *event_decode_data);
318*4882a593Smuzhiyun #endif
319*4882a593Smuzhiyun 
320*4882a593Smuzhiyun extern uint16 dhd_get_chipid(struct dhd_bus *bus);
321*4882a593Smuzhiyun 
322*4882a593Smuzhiyun #ifdef BTLOG
323*4882a593Smuzhiyun extern void dhd_bus_rx_bt_log(struct dhd_bus *bus, void* pkt);
324*4882a593Smuzhiyun #endif	/* BTLOG */
325*4882a593Smuzhiyun 
326*4882a593Smuzhiyun #ifdef DHD_WAKE_STATUS
327*4882a593Smuzhiyun extern wake_counts_t* dhd_bus_get_wakecount(dhd_pub_t *dhd);
328*4882a593Smuzhiyun extern int dhd_bus_get_bus_wake(dhd_pub_t * dhd);
329*4882a593Smuzhiyun #endif /* DHD_WAKE_STATUS */
330*4882a593Smuzhiyun 
331*4882a593Smuzhiyun #ifdef BT_OVER_SDIO
332*4882a593Smuzhiyun /*
333*4882a593Smuzhiyun  * SDIO layer clock control functions exposed to be called from other layers.
334*4882a593Smuzhiyun  * This is required especially in the case where the BUS is shared between
335*4882a593Smuzhiyun  * BT and SDIO and we have to control the clock. The callers of this function
336*4882a593Smuzhiyun  * are expected to hold the sdlock
337*4882a593Smuzhiyun  */
338*4882a593Smuzhiyun int __dhdsdio_clk_enable(struct dhd_bus *bus, bus_owner_t owner, int can_wait);
339*4882a593Smuzhiyun int __dhdsdio_clk_disable(struct dhd_bus *bus, bus_owner_t owner, int can_wait);
340*4882a593Smuzhiyun void dhdsdio_reset_bt_use_count(struct dhd_bus *bus);
341*4882a593Smuzhiyun #endif /* BT_OVER_SDIO */
342*4882a593Smuzhiyun 
343*4882a593Smuzhiyun int dhd_bus_perform_flr(struct dhd_bus *bus, bool force_fail);
344*4882a593Smuzhiyun extern bool dhd_bus_get_flr_force_fail(struct dhd_bus *bus);
345*4882a593Smuzhiyun 
346*4882a593Smuzhiyun extern bool dhd_bus_aspm_enable_rc_ep(struct dhd_bus *bus, bool enable);
347*4882a593Smuzhiyun extern void dhd_bus_l1ss_enable_rc_ep(struct dhd_bus *bus, bool enable);
348*4882a593Smuzhiyun 
349*4882a593Smuzhiyun bool dhd_bus_is_multibp_capable(struct dhd_bus *bus);
350*4882a593Smuzhiyun 
351*4882a593Smuzhiyun #ifdef BT_OVER_PCIE
352*4882a593Smuzhiyun int dhd_bus_pwr_off(dhd_pub_t *dhdp, int reason);
353*4882a593Smuzhiyun int dhd_bus_pwr_on(dhd_pub_t *dhdp, int reason);
354*4882a593Smuzhiyun int dhd_bus_pwr_toggle(dhd_pub_t *dhdp, int reason);
355*4882a593Smuzhiyun bool dhdpcie_is_btop_chip(struct dhd_bus *bus);
356*4882a593Smuzhiyun bool dhdpcie_is_bt_loaded(struct dhd_bus *bus);
357*4882a593Smuzhiyun int dhdpcie_redownload_fw(dhd_pub_t *dhdp);
358*4882a593Smuzhiyun extern void dhd_bus_pcie_pwr_req_reload_war(struct dhd_bus *bus);
359*4882a593Smuzhiyun int dhd_bus_perform_flr_with_quiesce(dhd_pub_t *dhdp, struct dhd_bus *bus,
360*4882a593Smuzhiyun 		bool init_deinit_path);
361*4882a593Smuzhiyun #endif /* BT_OVER_PCIE */
362*4882a593Smuzhiyun 
363*4882a593Smuzhiyun #ifdef BCMPCIE
364*4882a593Smuzhiyun extern void dhdpcie_advertise_bus_cleanup(dhd_pub_t  *dhdp);
365*4882a593Smuzhiyun extern void dhd_msgbuf_iovar_timeout_dump(dhd_pub_t *dhd);
366*4882a593Smuzhiyun extern void dhdpcie_induce_cbp_hang(dhd_pub_t *dhd);
367*4882a593Smuzhiyun #endif /* BCMPCIE */
368*4882a593Smuzhiyun 
369*4882a593Smuzhiyun extern bool dhd_bus_force_bt_quiesce_enabled(struct dhd_bus *bus);
370*4882a593Smuzhiyun extern void dhd_bwm_bt_quiesce(struct dhd_bus *bus);
371*4882a593Smuzhiyun extern void dhd_bwm_bt_resume(struct dhd_bus *bus);
372*4882a593Smuzhiyun 
373*4882a593Smuzhiyun #ifdef DHD_SSSR_DUMP
374*4882a593Smuzhiyun extern int dhd_bus_fis_trigger(dhd_pub_t *dhd);
375*4882a593Smuzhiyun extern int dhd_bus_fis_dump(dhd_pub_t *dhd);
376*4882a593Smuzhiyun #endif /* DHD_SSSR_DUMP */
377*4882a593Smuzhiyun 
378*4882a593Smuzhiyun #ifdef PCIE_FULL_DONGLE
379*4882a593Smuzhiyun extern int dhdpcie_set_dma_ring_indices(dhd_pub_t *dhd, int32 int_val);
380*4882a593Smuzhiyun #endif /* PCIE_FULL_DONGLE */
381*4882a593Smuzhiyun 
382*4882a593Smuzhiyun #ifdef D2H_MINIDUMP
383*4882a593Smuzhiyun #ifndef DHD_FW_COREDUMP
384*4882a593Smuzhiyun /* Minidump depends on DHD_FW_COREDUMP to dump minidup
385*4882a593Smuzhiyun  * This dependency is intentional to avoid multiple work queue
386*4882a593Smuzhiyun  * to dump the SOCRAM, minidum ..etc.
387*4882a593Smuzhiyun  */
388*4882a593Smuzhiyun #error "Minidump doesnot work as DHD_FW_COREDUMP is not defined"
389*4882a593Smuzhiyun #endif /* DHD_FW_COREDUMP */
390*4882a593Smuzhiyun #ifdef BCM_BUZZZ
391*4882a593Smuzhiyun /*
392*4882a593Smuzhiyun  * In pciedev_shared_t buzz_dbg_ptr and device_trap_debug_buffer_len
393*4882a593Smuzhiyun  * are overloaded. So when BCM_BUZZZ is defined MINIDUMP should not be defined or
394*4882a593Smuzhiyun  * vice versa.
395*4882a593Smuzhiyun  */
396*4882a593Smuzhiyun #error "Minidump doesnot work as BCM_BUZZZ is defined"
397*4882a593Smuzhiyun #endif /* BCM_BUZZZ */
398*4882a593Smuzhiyun extern bool dhd_bus_is_minidump_enabled(dhd_pub_t  *dhdp);
399*4882a593Smuzhiyun dhd_dma_buf_t* dhd_prot_get_minidump_buf(dhd_pub_t *dhd);
400*4882a593Smuzhiyun #endif /* D2H_MINIDUMP */
401*4882a593Smuzhiyun 
402*4882a593Smuzhiyun #ifdef DHD_CFG80211_SUSPEND_RESUME
403*4882a593Smuzhiyun extern void dhd_cfg80211_suspend(dhd_pub_t *dhdp);
404*4882a593Smuzhiyun extern void dhd_cfg80211_resume(dhd_pub_t *dhdp);
405*4882a593Smuzhiyun #endif /* DHD_CFG80211_SUSPEND_RESUME */
406*4882a593Smuzhiyun 
407*4882a593Smuzhiyun #ifdef DHD_SDTC_ETB_DUMP
408*4882a593Smuzhiyun extern int dhd_bus_get_etb_info(dhd_pub_t *dhd, uint32 etb_info_addr, etb_info_t *etb_info);
409*4882a593Smuzhiyun extern int dhd_bus_get_sdtc_etb(dhd_pub_t *dhd, uint8 *sdtc_etb_mempool,
410*4882a593Smuzhiyun 	uint addr, uint read_bytes);
411*4882a593Smuzhiyun #endif /* DHD_SDTC_ETB_DUMP */
412*4882a593Smuzhiyun 
413*4882a593Smuzhiyun extern int dhd_socram_dump(struct dhd_bus *bus);
414*4882a593Smuzhiyun 
415*4882a593Smuzhiyun extern int dhdpcie_get_max_eventbufpost(struct dhd_bus *bus);
416*4882a593Smuzhiyun 
417*4882a593Smuzhiyun #ifdef DHD_FLOW_RING_STATUS_TRACE
418*4882a593Smuzhiyun extern void dhd_bus_flow_ring_status_isr_trace(dhd_pub_t *dhd);
419*4882a593Smuzhiyun extern void dhd_bus_flow_ring_status_dpc_trace(dhd_pub_t *dhd);
420*4882a593Smuzhiyun #endif /* DHD_FLOW_RING_STATUS_TRACE */
421*4882a593Smuzhiyun #endif /* _dhd_bus_h_ */
422