xref: /OK3568_Linux_fs/external/rk_pcba_test/pcbatest_server.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  *  pcbatest_server.h
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  *  Copyright (c) 2017 Rockchip Electronics Co. Ltd.
5*4882a593Smuzhiyun  *  Author: Bin Yang <yangbin@rock-chips.com>
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Licensed under the Apache License, Version 2.0 (the "License");
8*4882a593Smuzhiyun  * you may not use this file except in compliance with the License.
9*4882a593Smuzhiyun  * You may obtain a copy of the License at
10*4882a593Smuzhiyun  *
11*4882a593Smuzhiyun  * 	 http://www.apache.org/licenses/LICENSE-2.0
12*4882a593Smuzhiyun  *
13*4882a593Smuzhiyun  * Unless required by applicable law or agreed to in writing, software
14*4882a593Smuzhiyun  * distributed under the License is distributed on an "AS IS" BASIS,
15*4882a593Smuzhiyun  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
16*4882a593Smuzhiyun  * See the License for the specific language governing permissions and
17*4882a593Smuzhiyun  * limitations under the License.
18*4882a593Smuzhiyun  */
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun #ifndef __TCP_SERVER_H__
21*4882a593Smuzhiyun #define __TCP_SERVER_H__
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun #define TCP_QUEUE_LINE 10
25*4882a593Smuzhiyun #define SOURCE_PORT 6666
26*4882a593Smuzhiyun #define RECV_BUFFER_SIZE 200
27*4882a593Smuzhiyun #define SEND_BUFFER_SIZE 200
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun typedef enum _PCBA_COMMAND_FORMAT {
30*4882a593Smuzhiyun 	INDEX_TYPE = 0,
31*4882a593Smuzhiyun 	INDEX_TEST_ITEM = 1,
32*4882a593Smuzhiyun 	INDEX_CMD = 2,
33*4882a593Smuzhiyun 	INDEX_RES = 2,
34*4882a593Smuzhiyun 	INDEX_MSG = 3,
35*4882a593Smuzhiyun 	INDEX_STATUS = 4,
36*4882a593Smuzhiyun 	INDEX_RESULT = 5,
37*4882a593Smuzhiyun 	INDEX_ERRCODE = 6,
38*4882a593Smuzhiyun }PCBA_COMMAND_FORMAT;
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun typedef struct _PCBA_SINGLE_PARA {
41*4882a593Smuzhiyun 	char name[COMMAND_NAMESIZE];
42*4882a593Smuzhiyun 	char valuestr[COMMAND_VALUESIZE];
43*4882a593Smuzhiyun 	int value;
44*4882a593Smuzhiyun 	bool opt;
45*4882a593Smuzhiyun } PCBA_SINGLE_PARA;
46*4882a593Smuzhiyun 
47*4882a593Smuzhiyun PCBA_SINGLE_PARA recv_cmd_target[] = {
48*4882a593Smuzhiyun 	[INDEX_TYPE] = {
49*4882a593Smuzhiyun 		.name = "TYPE",
50*4882a593Smuzhiyun 		.opt = false,
51*4882a593Smuzhiyun 	},
52*4882a593Smuzhiyun 	[INDEX_TEST_ITEM] = {
53*4882a593Smuzhiyun 		.name = "TEST_ITEM",
54*4882a593Smuzhiyun 		.opt = true,
55*4882a593Smuzhiyun 	},
56*4882a593Smuzhiyun 	[INDEX_CMD] = {
57*4882a593Smuzhiyun 		.name = "CMD",
58*4882a593Smuzhiyun 		.opt = false,
59*4882a593Smuzhiyun 	},
60*4882a593Smuzhiyun 	[INDEX_MSG] = {
61*4882a593Smuzhiyun 		.name = "MSG",
62*4882a593Smuzhiyun 		.opt = true,
63*4882a593Smuzhiyun 	},
64*4882a593Smuzhiyun };
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun PCBA_SINGLE_PARA send_cmd_target[] = {
67*4882a593Smuzhiyun 	[INDEX_TYPE] = {
68*4882a593Smuzhiyun 		.name = "TYPE",
69*4882a593Smuzhiyun 	},
70*4882a593Smuzhiyun 	[INDEX_TEST_ITEM] = {
71*4882a593Smuzhiyun 		.name = "TEST_ITEM",
72*4882a593Smuzhiyun 	},
73*4882a593Smuzhiyun 	[INDEX_RES] = {
74*4882a593Smuzhiyun 		.name = "RES",
75*4882a593Smuzhiyun 	},
76*4882a593Smuzhiyun 	[INDEX_MSG] = {
77*4882a593Smuzhiyun 		.name = "MSG",
78*4882a593Smuzhiyun 	},
79*4882a593Smuzhiyun 	[INDEX_STATUS] = {
80*4882a593Smuzhiyun 		.name = "STATUS",
81*4882a593Smuzhiyun 	},
82*4882a593Smuzhiyun 	[INDEX_RESULT] = {
83*4882a593Smuzhiyun 		.name = "RESULT",
84*4882a593Smuzhiyun 	},
85*4882a593Smuzhiyun 	[INDEX_ERRCODE] = {
86*4882a593Smuzhiyun 		.name = "ERR_CODE",
87*4882a593Smuzhiyun 	},
88*4882a593Smuzhiyun };
89*4882a593Smuzhiyun 
90*4882a593Smuzhiyun #define RECV_COMMAND_PARANUM (sizeof(recv_cmd_target) / sizeof(PCBA_SINGLE_PARA))
91*4882a593Smuzhiyun #define SEND_COMMAND_PARANUM (sizeof(send_cmd_target) / sizeof(PCBA_SINGLE_PARA))
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun typedef struct _PCBA_COMMAND_PARA {
94*4882a593Smuzhiyun 	PCBA_SINGLE_PARA recv_paras[RECV_COMMAND_PARANUM];
95*4882a593Smuzhiyun 	PCBA_SINGLE_PARA send_paras[SEND_COMMAND_PARANUM];
96*4882a593Smuzhiyun } PCBA_COMMAND_PARA;
97*4882a593Smuzhiyun 
98*4882a593Smuzhiyun typedef enum _PCBA_CMD_NUM {
99*4882a593Smuzhiyun 	ENTER_CMD = 0,
100*4882a593Smuzhiyun 	EXIT_CMD = 1,
101*4882a593Smuzhiyun 	START_CMD = 2,
102*4882a593Smuzhiyun 	STOP_CMD = 3,
103*4882a593Smuzhiyun 	QUERY_CMD = 4,
104*4882a593Smuzhiyun 	HEARBEAT_CMD = 5,
105*4882a593Smuzhiyun 	CAPTURE_CMD = 6,
106*4882a593Smuzhiyun }PCBA_CMD_NUM;
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun typedef struct _PCBA_CMD_TYPE {
109*4882a593Smuzhiyun 	char name[COMMAND_NAMESIZE];
110*4882a593Smuzhiyun } PCBA_CMD_TYPE;
111*4882a593Smuzhiyun 
112*4882a593Smuzhiyun PCBA_CMD_TYPE recv_cmd_type[] = {
113*4882a593Smuzhiyun 	[ENTER_CMD] = {
114*4882a593Smuzhiyun 		.name = "ENTER",
115*4882a593Smuzhiyun 	},
116*4882a593Smuzhiyun 	[EXIT_CMD] = {
117*4882a593Smuzhiyun 		.name = "EXIT",
118*4882a593Smuzhiyun 	},
119*4882a593Smuzhiyun 	[START_CMD] = {
120*4882a593Smuzhiyun 		.name = "START",
121*4882a593Smuzhiyun 	},
122*4882a593Smuzhiyun 	[STOP_CMD] = {
123*4882a593Smuzhiyun 		.name = "STOP",
124*4882a593Smuzhiyun 	},
125*4882a593Smuzhiyun 	[QUERY_CMD] = {
126*4882a593Smuzhiyun 		.name = "QUERY",
127*4882a593Smuzhiyun 	},
128*4882a593Smuzhiyun 	[HEARBEAT_CMD] = {
129*4882a593Smuzhiyun 		.name = "HEARBEAT",
130*4882a593Smuzhiyun 	},
131*4882a593Smuzhiyun 	[CAPTURE_CMD] = {
132*4882a593Smuzhiyun 		.name = "CAPTURE_IMAGE",
133*4882a593Smuzhiyun 	},
134*4882a593Smuzhiyun };
135*4882a593Smuzhiyun 
136*4882a593Smuzhiyun #define RECV_CMD_NUM (sizeof(recv_cmd_type) / sizeof(PCBA_CMD_TYPE))
137*4882a593Smuzhiyun #define RECV_TYPE_NAME "CMD"
138*4882a593Smuzhiyun #define STORAGE_TESTITEM "write_storage"
139*4882a593Smuzhiyun #define NAK_STA "NAK"
140*4882a593Smuzhiyun #define ACK_STA "ACK"
141*4882a593Smuzhiyun #define DEV_WDT_NAME "/dev/watchdog"
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun #endif
144