1*4882a593Smuzhiyun #ifndef CPU_TEST_H 2*4882a593Smuzhiyun #define CPU_TEST_H 3*4882a593Smuzhiyun #include "rk_pcba_test_led.h" 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun #define _CPU_0_FREQ_TABLE "/sys/devices/system/cpu/cpu0/cpufreq/scaling_available_frequencies" 6*4882a593Smuzhiyun #define _CPU_1_FREQ_TABLE "/sys/devices/system/cpu/cpu1/cpufreq/scaling_available_frequencies" 7*4882a593Smuzhiyun #define _CPU_2_FREQ_TABLE "/sys/devices/system/cpu/cpu2/cpufreq/scaling_available_frequencies" 8*4882a593Smuzhiyun #define _CPU_3_FREQ_TABLE "/sys/devices/system/cpu/cpu3/cpufreq/scaling_available_frequencies" 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #define _CPU_0_FREQ_GOVERNOR "/sys/devices/system/cpu/cpu0/cpufreq/scaling_governor" 11*4882a593Smuzhiyun #define _CPU_1_FREQ_GOVERNOR "/sys/devices/system/cpu/cpu1/cpufreq/scaling_governor" 12*4882a593Smuzhiyun #define _CPU_2_FREQ_GOVERNOR "/sys/devices/system/cpu/cpu2/cpufreq/scaling_governor" 13*4882a593Smuzhiyun #define _CPU_3_FREQ_GOVERNOR "/sys/devices/system/cpu/cpu3/cpufreq/scaling_governor" 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #define _CPU_0_FREQ_SET "/sys/devices/system/cpu/cpu0/cpufreq/scaling_setspeed" 16*4882a593Smuzhiyun #define _CPU_1_FREQ_SET "/sys/devices/system/cpu/cpu1/cpufreq/scaling_setspeed" 17*4882a593Smuzhiyun #define _CPU_2_FREQ_SET "/sys/devices/system/cpu/cpu2/cpufreq/scaling_setspeed" 18*4882a593Smuzhiyun #define _CPU_3_FREQ_SET "/sys/devices/system/cpu/cpu3/cpufreq/scaling_setspeed" 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun #define _CPU_0_FREQ_GET "/sys/devices/system/cpu/cpu0/cpufreq/scaling_cur_freq" 21*4882a593Smuzhiyun #define _CPU_1_FREQ_GET "/sys/devices/system/cpu/cpu1/cpufreq/scaling_cur_freq" 22*4882a593Smuzhiyun #define _CPU_2_FREQ_GET "/sys/devices/system/cpu/cpu2/cpufreq/scaling_cur_freq" 23*4882a593Smuzhiyun #define _CPU_3_FREQ_GET "/sys/devices/system/cpu/cpu3/cpufreq/scaling_cur_freq" 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun #define _CPU_MODE_USER "userspace" 26*4882a593Smuzhiyun #define _CPU_MODE_ONDEMAND "ondemand" 27*4882a593Smuzhiyun #define _CPU_MODE_INTERACTIVE "interactive" 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun //#define _CPU_FREQ_TXT "/data/cpu%d_freq_table.txt" 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun #define ACCELERATION_RATIO_ANDROID_TO_HW (9.80665f / 1000000) 32*4882a593Smuzhiyun #define __MAX 32 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun #define BOOT_MODE_NORMAL 0 35*4882a593Smuzhiyun #define BOOT_MODE_FACTORY2 1 36*4882a593Smuzhiyun #define BOOT_MODE_RECOVERY 2 37*4882a593Smuzhiyun #define BOOT_MODE_CHARGE 3 38*4882a593Smuzhiyun #define BOOT_MODE_POWER_TEST 4 39*4882a593Smuzhiyun #define BOOT_MODE_OFFMODE_CHARGING 5 40*4882a593Smuzhiyun #define BOOT_MODE_REBOOT 6 41*4882a593Smuzhiyun #define BOOT_MODE_PANIC 7 42*4882a593Smuzhiyun #define BOOT_MODE_WATCHDOG 8 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun typedef struct _CPU_FREQ_ { 45*4882a593Smuzhiyun int freq; 46*4882a593Smuzhiyun struct _CPU_FREQ_ *next; 47*4882a593Smuzhiyun } CPU_FREQ; 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun typedef struct _CPU_ { 50*4882a593Smuzhiyun int num0; 51*4882a593Smuzhiyun struct CPU_FREQ *cpu_0; 52*4882a593Smuzhiyun int num1; 53*4882a593Smuzhiyun struct CPU_FREQ *cpu_1; 54*4882a593Smuzhiyun int num2; 55*4882a593Smuzhiyun struct CPU_FREQ *cpu_2; 56*4882a593Smuzhiyun int num3; 57*4882a593Smuzhiyun struct CPU_FREQ *cpu_3; 58*4882a593Smuzhiyun } CPU_INFO; 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun void *cpu_test(void *argv); 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun #endif 63