1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright 2020 Rockchip Electronics Co. LTD 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Licensed under the Apache License, Version 2.0 (the "License"); 5*4882a593Smuzhiyun * you may not use this file except in compliance with the License. 6*4882a593Smuzhiyun * You may obtain a copy of the License at 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun * http://www.apache.org/licenses/LICENSE-2.0 9*4882a593Smuzhiyun * 10*4882a593Smuzhiyun * Unless required by applicable law or agreed to in writing, software 11*4882a593Smuzhiyun * distributed under the License is distributed on an "AS IS" BASIS, 12*4882a593Smuzhiyun * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13*4882a593Smuzhiyun * See the License for the specific language governing permissions and 14*4882a593Smuzhiyun * limitations under the License. 15*4882a593Smuzhiyun */ 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun #ifndef __VCODEC_SERVICE_H__ 18*4882a593Smuzhiyun #define __VCODEC_SERVICE_H__ 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun #include "rk_type.h" 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun #define EXTRA_INFO_MAGIC (0x4C4A46) 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun #define VPU_IOC_MAGIC 'l' 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun #define VPU_IOC_SET_CLIENT_TYPE _IOW(VPU_IOC_MAGIC, 1, unsigned long) 27*4882a593Smuzhiyun #define VPU_IOC_GET_HW_FUSE_STATUS _IOW(VPU_IOC_MAGIC, 2, unsigned long) 28*4882a593Smuzhiyun #define VPU_IOC_SET_REG _IOW(VPU_IOC_MAGIC, 3, unsigned long) 29*4882a593Smuzhiyun #define VPU_IOC_GET_REG _IOW(VPU_IOC_MAGIC, 4, unsigned long) 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun #define VPU_IOC_SET_CLIENT_TYPE_U32 _IOW(VPU_IOC_MAGIC, 1, unsigned int) 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun #define VPU_IOC_WRITE(nr, size) _IOC(_IOC_WRITE, VPU_IOC_MAGIC, (nr), (size)) 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun #define VDPU1_REGISTERS (101) 36*4882a593Smuzhiyun #define VDPU2_REGISTERS (159) 37*4882a593Smuzhiyun #define VDPU1_PP_REGISTERS (164) 38*4882a593Smuzhiyun #define VDPU2_PP_REGISTERS (184) 39*4882a593Smuzhiyun #define RKHEVC_REGISTERS (68) 40*4882a593Smuzhiyun #define RKVDEC_REGISTERS (78) 41*4882a593Smuzhiyun #define AVSD_REGISTERS (60) 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun #define VEPU1_REGISTERS (164) 44*4882a593Smuzhiyun #define VEPU2_REGISTERS (184) 45*4882a593Smuzhiyun #define RKVENC_REGISTERS (140) 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun #define EXTRA_INFO_SIZE (sizeof(RK_U32) * 34) 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun #ifdef __cplusplus 50*4882a593Smuzhiyun extern "C" { 51*4882a593Smuzhiyun #endif 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun const char *mpp_get_vcodec_dev_name(MppCtxType type, MppCodingType coding); 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun #ifdef __cplusplus 56*4882a593Smuzhiyun } 57*4882a593Smuzhiyun #endif 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun #endif /* __VCODEC_SERVICE_H__ */ 60