xref: /OK3568_Linux_fs/external/mpp/mpp/hal/inc/mpp_hal.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright 2015 Rockchip Electronics Co. LTD
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * Licensed under the Apache License, Version 2.0 (the "License");
5*4882a593Smuzhiyun  * you may not use this file except in compliance with the License.
6*4882a593Smuzhiyun  * You may obtain a copy of the License at
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  *      http://www.apache.org/licenses/LICENSE-2.0
9*4882a593Smuzhiyun  *
10*4882a593Smuzhiyun  * Unless required by applicable law or agreed to in writing, software
11*4882a593Smuzhiyun  * distributed under the License is distributed on an "AS IS" BASIS,
12*4882a593Smuzhiyun  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13*4882a593Smuzhiyun  * See the License for the specific language governing permissions and
14*4882a593Smuzhiyun  * limitations under the License.
15*4882a593Smuzhiyun  */
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun #ifndef __MPP_HAL_H__
18*4882a593Smuzhiyun #define __MPP_HAL_H__
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun #include "rk_mpi_cmd.h"
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun #include "mpp_buf_slot.h"
23*4882a593Smuzhiyun #include "mpp_platform.h"
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun #include "hal_dec_task.h"
26*4882a593Smuzhiyun #include "mpp_dec_cfg.h"
27*4882a593Smuzhiyun #include "mpp_device.h"
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun typedef enum VpuHwMode_e {
30*4882a593Smuzhiyun     MODE_NULL   = 0,
31*4882a593Smuzhiyun     RKVDEC_MODE = 0x01,
32*4882a593Smuzhiyun     VDPU1_MODE  = 0x02,
33*4882a593Smuzhiyun     VDPU2_MODE  = 0x04,
34*4882a593Smuzhiyun     RKVENC_MODE = 0x05,
35*4882a593Smuzhiyun     MODE_BUTT,
36*4882a593Smuzhiyun } VpuHwMode;
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun typedef struct MppHalCfg_t {
39*4882a593Smuzhiyun     // input
40*4882a593Smuzhiyun     MppCtxType          type;
41*4882a593Smuzhiyun     MppCodingType       coding;
42*4882a593Smuzhiyun     MppBufSlots         frame_slots;
43*4882a593Smuzhiyun     MppBufSlots         packet_slots;
44*4882a593Smuzhiyun     MppDecCfgSet        *cfg;
45*4882a593Smuzhiyun     MppCbCtx            *dec_cb;
46*4882a593Smuzhiyun 
47*4882a593Smuzhiyun     // output from hardware module
48*4882a593Smuzhiyun     const MppDecHwCap   *hw_info;
49*4882a593Smuzhiyun     // codec dev
50*4882a593Smuzhiyun     MppDev              dev;
51*4882a593Smuzhiyun     RK_S32              support_fast_mode;
52*4882a593Smuzhiyun } MppHalCfg;
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun typedef struct MppHalApi_t {
55*4882a593Smuzhiyun     char            *name;
56*4882a593Smuzhiyun     MppCtxType      type;
57*4882a593Smuzhiyun     MppCodingType   coding;
58*4882a593Smuzhiyun     RK_U32          ctx_size;
59*4882a593Smuzhiyun     RK_U32          flag;
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun     MPP_RET (*init)(void *ctx, MppHalCfg *cfg);
62*4882a593Smuzhiyun     MPP_RET (*deinit)(void *ctx);
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun     // task preprocess function
65*4882a593Smuzhiyun     MPP_RET (*reg_gen)(void *ctx, HalTaskInfo *syn);
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun     // hw operation function
68*4882a593Smuzhiyun     MPP_RET (*start)(void *ctx, HalTaskInfo *task);
69*4882a593Smuzhiyun     MPP_RET (*wait)(void *ctx, HalTaskInfo *task);
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun     MPP_RET (*reset)(void *ctx);
72*4882a593Smuzhiyun     MPP_RET (*flush)(void *ctx);
73*4882a593Smuzhiyun     MPP_RET (*control)(void *ctx, MpiCmd cmd, void *param);
74*4882a593Smuzhiyun } MppHalApi;
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun typedef void* MppHal;
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun #ifdef __cplusplus
79*4882a593Smuzhiyun extern "C" {
80*4882a593Smuzhiyun #endif
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun MPP_RET mpp_hal_init(MppHal *ctx, MppHalCfg *cfg);
83*4882a593Smuzhiyun MPP_RET mpp_hal_deinit(MppHal ctx);
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun MPP_RET mpp_hal_reg_gen(MppHal ctx, HalTaskInfo *task);
86*4882a593Smuzhiyun MPP_RET mpp_hal_hw_start(MppHal ctx, HalTaskInfo *task);
87*4882a593Smuzhiyun MPP_RET mpp_hal_hw_wait(MppHal ctx, HalTaskInfo *task);
88*4882a593Smuzhiyun 
89*4882a593Smuzhiyun MPP_RET mpp_hal_reset(MppHal ctx);
90*4882a593Smuzhiyun MPP_RET mpp_hal_flush(MppHal ctx);
91*4882a593Smuzhiyun MPP_RET mpp_hal_control(MppHal ctx, MpiCmd cmd, void *param);
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun #ifdef __cplusplus
94*4882a593Smuzhiyun }
95*4882a593Smuzhiyun #endif
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun #endif /*__MPP_HAL_H__*/
98